File: /usr/src/linux/arch/parisc/kernel/irq.c
1 /* $Id: irq.c,v 1.8 2000/02/08 02:01:17 grundler Exp $
2 *
3 * Code to handle x86 style IRQs plus some generic interrupt stuff.
4 *
5 * This is not in any way SMP-clean.
6 *
7 * Copyright (C) 1992 Linus Torvalds
8 * Copyright (C) 1994, 1995, 1996, 1997, 1998 Ralf Baechle
9 * Copyright (C) 1999 SuSE GmbH (Author: Philipp Rumpf, prumpf@tux.org)
10 * Copyright (C) 2000 Hewlett Packard Corp (Co-Author: Grant Grundler, grundler@cup.hp.com)
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26 #include <linux/config.h>
27 #include <linux/bitops.h>
28 #include <asm/bitops.h>
29 #include <asm/pdc.h>
30 #include <linux/errno.h>
31 #include <linux/init.h>
32 #include <linux/kernel_stat.h>
33 #include <linux/signal.h>
34 #include <linux/sched.h>
35 #include <linux/types.h>
36 #include <linux/ioport.h>
37 #include <linux/timex.h>
38 #include <linux/slab.h>
39 #include <linux/random.h>
40 #include <linux/interrupt.h>
41 #include <linux/irq.h>
42
43 #include <asm/cache.h>
44
45 #undef DEBUG_IRQ
46
47 extern void timer_interrupt(int, void *, struct pt_regs *);
48 extern void ipi_interrupt(int, void *, struct pt_regs *);
49
50 #ifdef DEBUG_IRQ
51 #define DBG_IRQ(x...) printk(x)
52 #else /* DEBUG_IRQ */
53 #define DBG_IRQ(x...)
54 #endif /* DEBUG_IRQ */
55
56 #define EIEM_MASK(irq) (1L<<(MAX_CPU_IRQ-IRQ_OFFSET(irq)))
57 #define CLEAR_EIEM_BIT(irq) set_eiem(get_eiem() & ~EIEM_MASK(irq))
58 #define SET_EIEM_BIT(irq) set_eiem(get_eiem() | EIEM_MASK(irq))
59
60 static void disable_cpu_irq(void *unused, int irq)
61 {
62 CLEAR_EIEM_BIT(irq);
63 }
64
65 static void enable_cpu_irq(void *unused, int irq)
66 {
67 unsigned long mask = EIEM_MASK(irq);
68
69 mtctl(mask, 23);
70 SET_EIEM_BIT(irq);
71 }
72
73 static struct irqaction cpu_irq_actions[IRQ_PER_REGION] = {
74 [IRQ_OFFSET(TIMER_IRQ)] { timer_interrupt, 0, 0, "timer", NULL, NULL },
75 [IRQ_OFFSET(IPI_IRQ)] { ipi_interrupt, 0, 0, "IPI", NULL, NULL },
76 };
77
78 struct irq_region cpu_irq_region = {
79 { disable_cpu_irq, enable_cpu_irq, NULL, NULL },
80 { &cpu_data[0], "PA-PIC", IRQ_REG_MASK|IRQ_REG_DIS, IRQ_FROM_REGION(CPU_IRQ_REGION)},
81 cpu_irq_actions
82 };
83
84 struct irq_region *irq_region[NR_IRQ_REGS] = {
85 [ 0 ] NULL, /* abuse will data page fault (aka code 15) */
86 [ CPU_IRQ_REGION ] &cpu_irq_region,
87 };
88
89
90
91 /* we special-case the real IRQs here, which feels right given the relatively
92 * high cost of indirect calls. If anyone is bored enough to benchmark this
93 * and find out whether I am right, feel free to. prumpf */
94
95 static inline void mask_irq(int irq)
96 {
97 struct irq_region *region;
98
99 #ifdef DEBUG_IRQ
100 if (irq != TIMER_IRQ)
101 #endif
102 DBG_IRQ("mask_irq(%d) %d+%d\n", irq, IRQ_REGION(irq), IRQ_OFFSET(irq));
103
104 if(IRQ_REGION(irq) != CPU_IRQ_REGION) {
105 region = irq_region[IRQ_REGION(irq)];
106 if(region->data.flags & IRQ_REG_MASK)
107 region->ops.mask_irq(region->data.dev, IRQ_OFFSET(irq));
108 } else {
109 CLEAR_EIEM_BIT(irq);
110 }
111 }
112
113 static inline void unmask_irq(int irq)
114 {
115 struct irq_region *region;
116
117 #ifdef DEBUG_IRQ
118 if (irq != TIMER_IRQ)
119 #endif
120 DBG_IRQ("unmask_irq(%d) %d+%d\n", irq, IRQ_REGION(irq), IRQ_OFFSET(irq));
121
122 if(IRQ_REGION(irq) != CPU_IRQ_REGION) {
123 region = irq_region[IRQ_REGION(irq)];
124 if(region->data.flags & IRQ_REG_MASK)
125 region->ops.unmask_irq(region->data.dev, IRQ_OFFSET(irq));
126 } else {
127 SET_EIEM_BIT(irq);
128 }
129 }
130
131 void disable_irq(int irq)
132 {
133 struct irq_region *region;
134
135 #ifdef DEBUG_IRQ
136 if (irq != TIMER_IRQ)
137 #endif
138 DBG_IRQ("disable_irq(%d) %d+%d\n", irq, IRQ_REGION(irq), IRQ_OFFSET(irq));
139 region = irq_region[IRQ_REGION(irq)];
140
141 if(region->data.flags & IRQ_REG_DIS)
142 region->ops.disable_irq(region->data.dev, IRQ_OFFSET(irq));
143 else
144 BUG();
145 }
146
147 void enable_irq(int irq)
148 {
149 struct irq_region *region;
150
151 #ifdef DEBUG_IRQ
152 if (irq != TIMER_IRQ)
153 #endif
154 DBG_IRQ("enable_irq(%d) %d+%d\n", irq, IRQ_REGION(irq), IRQ_OFFSET(irq));
155 region = irq_region[IRQ_REGION(irq)];
156
157 if(region->data.flags & IRQ_REG_DIS)
158 region->ops.enable_irq(region->data.dev, IRQ_OFFSET(irq));
159 else
160 BUG();
161 }
162
163 int get_irq_list(char *buf)
164 {
165 #ifdef CONFIG_PROC_FS
166 char *p = buf;
167 int i, j;
168 int regnr, irq_no;
169 struct irq_region *region;
170 struct irqaction *action, *mainaction;
171
172 p += sprintf(p, " ");
173 for (j=0; j<smp_num_cpus; j++)
174 p += sprintf(p, "CPU%d ",j);
175 *p++ = '\n';
176
177 for (regnr = 0; regnr < NR_IRQ_REGS; regnr++) {
178 region = irq_region[regnr];
179 if (!region || !region->action)
180 continue;
181
182 mainaction = region->action;
183
184 for (i = 0; i <= MAX_CPU_IRQ; i++) {
185 action = mainaction++;
186 if (!action || !action->name)
187 continue;
188
189 irq_no = IRQ_FROM_REGION(regnr) + i;
190
191 p += sprintf(p, "%3d: ", irq_no);
192 #ifndef CONFIG_SMP
193 p += sprintf(p, "%10u ", kstat_irqs(irq_no));
194 #else
195 for (j = 0; j < smp_num_cpus; j++)
196 p += sprintf(p, "%10u ",
197 kstat.irqs[cpu_logical_map(j)][irq_no]);
198 #endif
199 p += sprintf(p, " %14s",
200 region->data.name ? region->data.name : "N/A");
201 p += sprintf(p, " %s", action->name);
202
203 for (action=action->next; action; action = action->next)
204 p += sprintf(p, ", %s", action->name);
205 *p++ = '\n';
206 }
207 }
208
209 p += sprintf(p, "\n");
210 #if CONFIG_SMP
211 p += sprintf(p, "LOC: ");
212 for (j = 0; j < smp_num_cpus; j++)
213 p += sprintf(p, "%10u ",
214 apic_timer_irqs[cpu_logical_map(j)]);
215 p += sprintf(p, "\n");
216 #endif
217
218 return p - buf;
219
220 #else /* CONFIG_PROC_FS */
221
222 return 0;
223
224 #endif /* CONFIG_PROC_FS */
225 }
226
227
228
229 /*
230 ** The following form a "set": Virtual IRQ, Transaction Address, Trans Data.
231 ** Respectively, these map to IRQ region+EIRR, Processor HPA, EIRR bit.
232 **
233 ** To use txn_XXX() interfaces, get a Virtual IRQ first.
234 ** Then use that to get the Transaction address and data.
235 */
236
237 int
238 txn_alloc_irq(void)
239 {
240 int irq;
241
242 /* never return irq 0 cause that's the interval timer */
243 for(irq=1; irq<=MAX_CPU_IRQ; irq++) {
244 if(cpu_irq_region.action[irq].handler == NULL) {
245 return (IRQ_FROM_REGION(CPU_IRQ_REGION) + irq);
246 }
247 }
248
249 /* unlikely, but be prepared */
250 return -1;
251 }
252
253 int
254 txn_claim_irq(int irq)
255 {
256 if (irq_region[IRQ_REGION(irq)]->action[IRQ_OFFSET(irq)].handler ==NULL)
257 {
258 return irq;
259 }
260
261 /* unlikely, but be prepared */
262 return -1;
263 }
264
265 unsigned long
266 txn_alloc_addr(int virt_irq)
267 {
268 struct cpuinfo_parisc *dev = (struct cpuinfo_parisc *) (irq_region[IRQ_REGION(virt_irq)]->data.dev);
269
270 if (0==dev) {
271 printk(KERN_ERR "txn_alloc_addr(0x%x): CPU IRQ region? dev %p\n",
272 virt_irq,dev);
273 return(0UL);
274 }
275 return (dev->txn_addr);
276 }
277
278
279 /*
280 ** The alloc process needs to accept a parameter to accomodate limitations
281 ** of the HW/SW which use these bits:
282 ** Legacy PA I/O (GSC/NIO): 5 bits (architected EIM register)
283 ** V-class (EPIC): 6 bits
284 ** N/L-class/A500: 8 bits (iosapic)
285 ** PCI 2.2 MSI: 16 bits (I think)
286 ** Existing PCI devices: 32-bits (NCR c720/ATM/GigE/HyperFabric)
287 **
288 ** On the service provider side:
289 ** o PA 1.1 (and PA2.0 narrow mode) 5-bits (width of EIR register)
290 ** o PA 2.0 wide mode 6-bits (per processor)
291 ** o IA64 8-bits (0-256 total)
292 **
293 ** So a Legacy PA I/O device on a PA 2.0 box can't use all
294 ** the bits supported by the processor...and the N/L-class
295 ** I/O subsystem supports more bits than PA2.0 has. The first
296 ** case is the problem.
297 */
298 unsigned int
299 txn_alloc_data(int virt_irq, unsigned int bits_wide)
300 {
301 /* XXX FIXME : bits_wide indicates how wide the transaction
302 ** data is allowed to be...we may need a different virt_irq
303 ** if this one won't work. Another reason to index virtual
304 ** irq's into a table which can manage CPU/IRQ bit seperately.
305 */
306 if (IRQ_OFFSET(virt_irq) > (1 << (bits_wide -1)))
307 {
308 panic("Sorry -- didn't allocate valid IRQ for this device\n");
309 }
310
311 return(IRQ_OFFSET(virt_irq));
312 }
313
314
315 /* FIXME: SMP, flags, bottom halves, rest */
316 void do_irq(struct irqaction *action, int irq, struct pt_regs * regs)
317 {
318 int cpu = smp_processor_id();
319
320 irq_enter(cpu, irq);
321
322 #ifdef DEBUG_IRQ
323 if (irq != TIMER_IRQ)
324 #endif
325 DBG_IRQ("do_irq(%d) %d+%d\n", irq, IRQ_REGION(irq), IRQ_OFFSET(irq));
326 if (action->handler == NULL)
327 printk(KERN_ERR "No handler for interrupt %d !\n", irq);
328
329 for(; action && action->handler; action = action->next) {
330 action->handler(irq, action->dev_id, regs);
331 }
332
333 irq_exit(cpu, irq);
334
335 /* don't need to care about unmasking and stuff */
336 do_softirq();
337 }
338
339 void do_irq_mask(unsigned long mask, struct irq_region *region, struct pt_regs *regs)
340 {
341 unsigned long bit;
342 int irq;
343 int cpu = smp_processor_id();
344
345 #ifdef DEBUG_IRQ
346 if (mask != (1L << MAX_CPU_IRQ))
347 printk("do_irq_mask %08lx %p %p\n", mask, region, regs);
348 #endif
349
350 for(bit=(1L<<MAX_CPU_IRQ), irq = 0; mask && bit; bit>>=1, irq++) {
351 int irq_num;
352 if(!(bit&mask))
353 continue;
354
355 irq_num = region->data.irqbase + irq;
356
357 ++kstat.irqs[cpu][IRQ_FROM_REGION(CPU_IRQ_REGION) | irq];
358 if (IRQ_REGION(irq_num) != CPU_IRQ_REGION)
359 ++kstat.irqs[cpu][irq_num];
360
361 mask_irq(irq_num);
362 do_irq(®ion->action[irq], irq_num, regs);
363 unmask_irq(irq_num);
364 }
365 }
366
367 static inline int alloc_irqregion(void)
368 {
369 int irqreg;
370
371 for(irqreg=1; irqreg<=(NR_IRQ_REGS); irqreg++) {
372 if(irq_region[irqreg] == NULL)
373 return irqreg;
374 }
375
376 return 0;
377 }
378
379 struct irq_region *alloc_irq_region(
380 int count, struct irq_region_ops *ops, unsigned long flags,
381 const char *name, void *dev)
382 {
383 struct irq_region *region;
384 int index;
385
386 index = alloc_irqregion();
387
388 if((IRQ_REGION(count-1)))
389 return NULL;
390
391 if (count < IRQ_PER_REGION) {
392 DBG_IRQ("alloc_irq_region() using minimum of %d irq lines for %s (%d)\n",
393 IRQ_PER_REGION, name, count);
394 count = IRQ_PER_REGION;
395 }
396
397 if(flags & IRQ_REG_MASK)
398 if(!(ops->mask_irq && ops->unmask_irq))
399 return NULL;
400
401 if(flags & IRQ_REG_DIS)
402 if(!(ops->disable_irq && ops->enable_irq))
403 return NULL;
404
405 if((irq_region[index]))
406 return NULL;
407
408 region = kmalloc(sizeof *region, GFP_ATOMIC);
409 if(!region)
410 return NULL;
411
412 region->action = kmalloc(sizeof *region->action * count, GFP_ATOMIC);
413 if(!region->action) {
414 kfree(region);
415 return NULL;
416 }
417 memset(region->action, 0, sizeof *region->action * count);
418
419 region->ops = *ops;
420 region->data.irqbase = IRQ_FROM_REGION(index);
421 region->data.flags = flags;
422 region->data.name = name;
423 region->data.dev = dev;
424
425 irq_region[index] = region;
426
427 return irq_region[index];
428 }
429
430
431
432 /* FIXME: SMP, flags, bottom halves, rest */
433
434 int request_irq(unsigned int irq,
435 void (*handler)(int, void *, struct pt_regs *),
436 unsigned long irqflags,
437 const char * devname,
438 void *dev_id)
439 {
440 struct irqaction * action;
441
442 #if 0
443 printk(KERN_INFO "request_irq(%d, %p, 0x%lx, %s, %p)\n",irq, handler, irqflags, devname, dev_id);
444 #endif
445 if(!handler) {
446 printk(KERN_ERR "request_irq(%d,...): Augh! No handler for irq!\n",
447 irq);
448 return -EINVAL;
449 }
450
451 if ((IRQ_REGION(irq) == 0) || irq_region[IRQ_REGION(irq)] == NULL) {
452 /*
453 ** Bug catcher for drivers which use "char" or u8 for
454 ** the IRQ number. They lose the region number which
455 ** is in pcidev->irq (an int).
456 */
457 printk(KERN_ERR "%p (%s?) called request_irq with an invalid irq %d\n",
458 __builtin_return_address(0), devname, irq);
459 return -EINVAL;
460 }
461
462 action = &irq_region[IRQ_REGION(irq)]->action[IRQ_OFFSET(irq)];
463
464 if(action->handler) {
465 while(action->next)
466 action = action->next;
467
468 action->next = kmalloc(sizeof *action, GFP_ATOMIC);
469
470 action = action->next;
471 }
472
473 if(!action) {
474 printk(KERN_ERR "request_irq():Augh! No action!\n") ;
475 return -ENOMEM;
476 }
477
478 action->handler = handler;
479 action->flags = irqflags;
480 action->mask = 0;
481 action->name = devname;
482 action->next = NULL;
483 action->dev_id = dev_id;
484
485 enable_irq(irq);
486 return 0;
487 }
488
489 void free_irq(unsigned int irq, void *dev_id)
490 {
491 struct irqaction *action, **p;
492
493 action = &irq_region[IRQ_REGION(irq)]->action[IRQ_OFFSET(irq)];
494
495 if(action->dev_id == dev_id) {
496 if(action->next == NULL)
497 action->handler = NULL;
498 else
499 memcpy(action, action->next, sizeof *action);
500
501 return;
502 }
503
504 p = &action->next;
505 action = action->next;
506
507 for (; (action = *p) != NULL; p = &action->next) {
508 if (action->dev_id != dev_id)
509 continue;
510
511 /* Found it - now free it */
512 *p = action->next;
513 kfree(action);
514
515 return;
516 }
517
518 printk(KERN_ERR "Trying to free free IRQ%d\n",irq);
519 }
520
521 unsigned long probe_irq_on (void)
522 {
523 return 0;
524 }
525
526 int probe_irq_off (unsigned long irqs)
527 {
528 return 0;
529 }
530
531
532 void __init init_IRQ(void)
533 {
534 }
535
536 void init_irq_proc(void)
537 {
538 }
539