File: /usr/src/linux/arch/ppc/boot/prep/vreset.c
1 /*
2 * BK Id: SCCS/s.vreset.c 1.11 07/25/01 18:13:07 trini
3 */
4 /*
5 * vreset.c
6 *
7 * Initialize the VGA control registers to 80x25 text mode.
8 *
9 * Adapted from a program by:
10 * Steve Sellgren
11 * San Francisco Indigo Company
12 * sfindigo!sellgren@uunet.uu.net
13 *
14 * Original concept by:
15 * Gary Thomas <gdt@linuxppc.org>
16 * Adapted for Moto boxes by:
17 * Pat Kane & Mark Scott, 1996
18 * Adapted for IBM portables by:
19 * Takeshi Ishimoto
20 * Multi-console support:
21 * Terje Malmedal <terje.malmedal@usit.uio.no>
22 */
23
24 #include "iso_font.h"
25 #include "nonstdio.h"
26
27 extern char *vidmem;
28 extern int lines, cols;
29 struct VaRegs;
30
31 /*
32 * VGA Register
33 */
34 struct VgaRegs
35 {
36 unsigned short io_port;
37 unsigned char io_index;
38 unsigned char io_value;
39 };
40
41 void unlockVideo(int slot);
42 void setTextRegs(struct VgaRegs *svp);
43 void setTextCLUT(int shift);
44 void clearVideoMemory(void);
45 void loadFont(unsigned char *ISA_mem);
46
47 static void mdelay(int ms)
48 {
49 for (; ms > 0; --ms)
50 udelay(1000);
51 }
52
53 /*
54 * Default console text mode registers used to reset
55 * graphics adapter.
56 */
57 #define NREGS 54
58 #define ENDMK 0xFFFF /* End marker */
59
60 #define S3Vendor 0x5333
61 #define CirrusVendor 0x1013
62 #define DiamondVendor 0x100E
63 #define MatroxVendor 0x102B
64 #define ParadiseVendor 0x101C
65
66 struct VgaRegs GenVgaTextRegs[NREGS+1] = {
67 /* port index value */
68 /* SR Regs */
69 { 0x3c4, 0x1, 0x0 },
70 { 0x3c4, 0x2, 0x3 },
71 { 0x3c4, 0x3, 0x0 },
72 { 0x3c4, 0x4, 0x2 },
73 /* CR Regs */
74 { 0x3d4, 0x0, 0x5f },
75 { 0x3d4, 0x1, 0x4f },
76 { 0x3d4, 0x2, 0x50 },
77 { 0x3d4, 0x3, 0x82 },
78 { 0x3d4, 0x4, 0x55 },
79 { 0x3d4, 0x5, 0x81 },
80 { 0x3d4, 0x6, 0xbf },
81 { 0x3d4, 0x7, 0x1f },
82 { 0x3d4, 0x8, 0x00 },
83 { 0x3d4, 0x9, 0x4f },
84 { 0x3d4, 0xa, 0x0d },
85 { 0x3d4, 0xb, 0x0e },
86 { 0x3d4, 0xc, 0x00 },
87 { 0x3d4, 0xd, 0x00 },
88 { 0x3d4, 0xe, 0x00 },
89 { 0x3d4, 0xf, 0x00 },
90 { 0x3d4, 0x10, 0x9c },
91 { 0x3d4, 0x11, 0x8e },
92 { 0x3d4, 0x12, 0x8f },
93 { 0x3d4, 0x13, 0x28 },
94 { 0x3d4, 0x14, 0x1f },
95 { 0x3d4, 0x15, 0x96 },
96 { 0x3d4, 0x16, 0xb9 },
97 { 0x3d4, 0x17, 0xa3 },
98 /* GR Regs */
99 { 0x3ce, 0x0, 0x0 },
100 { 0x3ce, 0x1, 0x0 },
101 { 0x3ce, 0x2, 0x0 },
102 { 0x3ce, 0x3, 0x0 },
103 { 0x3ce, 0x4, 0x0 },
104 { 0x3ce, 0x5, 0x10 },
105 { 0x3ce, 0x6, 0xe },
106 { 0x3ce, 0x7, 0x0 },
107 { 0x3ce, 0x8, 0xff },
108 { ENDMK }
109 };
110
111 struct VgaRegs S3TextRegs[NREGS+1] = {
112 /* port index value */
113 /* SR Regs */
114 { 0x3c4, 0x1, 0x0 },
115 { 0x3c4, 0x2, 0x3 },
116 { 0x3c4, 0x3, 0x0 },
117 { 0x3c4, 0x4, 0x2 },
118 /* CR Regs */
119 { 0x3d4, 0x0, 0x5f },
120 { 0x3d4, 0x1, 0x4f },
121 { 0x3d4, 0x2, 0x50 },
122 { 0x3d4, 0x3, 0x82 },
123 { 0x3d4, 0x4, 0x55 },
124 { 0x3d4, 0x5, 0x81 },
125 { 0x3d4, 0x6, 0xbf },
126 { 0x3d4, 0x7, 0x1f },
127 { 0x3d4, 0x8, 0x00 },
128 { 0x3d4, 0x9, 0x4f },
129 { 0x3d4, 0xa, 0x0d },
130 { 0x3d4, 0xb, 0x0e },
131 { 0x3d4, 0xc, 0x00 },
132 { 0x3d4, 0xd, 0x00 },
133 { 0x3d4, 0xe, 0x00 },
134 { 0x3d4, 0xf, 0x00 },
135 { 0x3d4, 0x10, 0x9c },
136 { 0x3d4, 0x11, 0x8e },
137 { 0x3d4, 0x12, 0x8f },
138 { 0x3d4, 0x13, 0x28 },
139 { 0x3d4, 0x14, 0x1f },
140 { 0x3d4, 0x15, 0x96 },
141 { 0x3d4, 0x16, 0xb9 },
142 { 0x3d4, 0x17, 0xa3 },
143 /* GR Regs */
144 { 0x3ce, 0x0, 0x0 },
145 { 0x3ce, 0x1, 0x0 },
146 { 0x3ce, 0x2, 0x0 },
147 { 0x3ce, 0x3, 0x0 },
148 { 0x3ce, 0x4, 0x0 },
149 { 0x3ce, 0x5, 0x10 },
150 { 0x3ce, 0x6, 0xe },
151 { 0x3ce, 0x7, 0x0 },
152 { 0x3ce, 0x8, 0xff },
153 { ENDMK }
154 };
155
156 struct RGBColors
157 {
158 unsigned char r, g, b;
159 };
160
161 /*
162 * Default console text mode color table.
163 * These values were obtained by booting Linux with
164 * text mode firmware & then dumping the registers.
165 */
166 struct RGBColors TextCLUT[256] =
167 {
168 /* red green blue */
169 { 0x0, 0x0, 0x0 },
170 { 0x0, 0x0, 0x2a },
171 { 0x0, 0x2a, 0x0 },
172 { 0x0, 0x2a, 0x2a },
173 { 0x2a, 0x0, 0x0 },
174 { 0x2a, 0x0, 0x2a },
175 { 0x2a, 0x2a, 0x0 },
176 { 0x2a, 0x2a, 0x2a },
177 { 0x0, 0x0, 0x15 },
178 { 0x0, 0x0, 0x3f },
179 { 0x0, 0x2a, 0x15 },
180 { 0x0, 0x2a, 0x3f },
181 { 0x2a, 0x0, 0x15 },
182 { 0x2a, 0x0, 0x3f },
183 { 0x2a, 0x2a, 0x15 },
184 { 0x2a, 0x2a, 0x3f },
185 { 0x0, 0x15, 0x0 },
186 { 0x0, 0x15, 0x2a },
187 { 0x0, 0x3f, 0x0 },
188 { 0x0, 0x3f, 0x2a },
189 { 0x2a, 0x15, 0x0 },
190 { 0x2a, 0x15, 0x2a },
191 { 0x2a, 0x3f, 0x0 },
192 { 0x2a, 0x3f, 0x2a },
193 { 0x0, 0x15, 0x15 },
194 { 0x0, 0x15, 0x3f },
195 { 0x0, 0x3f, 0x15 },
196 { 0x0, 0x3f, 0x3f },
197 { 0x2a, 0x15, 0x15 },
198 { 0x2a, 0x15, 0x3f },
199 { 0x2a, 0x3f, 0x15 },
200 { 0x2a, 0x3f, 0x3f },
201 { 0x15, 0x0, 0x0 },
202 { 0x15, 0x0, 0x2a },
203 { 0x15, 0x2a, 0x0 },
204 { 0x15, 0x2a, 0x2a },
205 { 0x3f, 0x0, 0x0 },
206 { 0x3f, 0x0, 0x2a },
207 { 0x3f, 0x2a, 0x0 },
208 { 0x3f, 0x2a, 0x2a },
209 { 0x15, 0x0, 0x15 },
210 { 0x15, 0x0, 0x3f },
211 { 0x15, 0x2a, 0x15 },
212 { 0x15, 0x2a, 0x3f },
213 { 0x3f, 0x0, 0x15 },
214 { 0x3f, 0x0, 0x3f },
215 { 0x3f, 0x2a, 0x15 },
216 { 0x3f, 0x2a, 0x3f },
217 { 0x15, 0x15, 0x0 },
218 { 0x15, 0x15, 0x2a },
219 { 0x15, 0x3f, 0x0 },
220 { 0x15, 0x3f, 0x2a },
221 { 0x3f, 0x15, 0x0 },
222 { 0x3f, 0x15, 0x2a },
223 { 0x3f, 0x3f, 0x0 },
224 { 0x3f, 0x3f, 0x2a },
225 { 0x15, 0x15, 0x15 },
226 { 0x15, 0x15, 0x3f },
227 { 0x15, 0x3f, 0x15 },
228 { 0x15, 0x3f, 0x3f },
229 { 0x3f, 0x15, 0x15 },
230 { 0x3f, 0x15, 0x3f },
231 { 0x3f, 0x3f, 0x15 },
232 { 0x3f, 0x3f, 0x3f },
233 { 0x39, 0xc, 0x5 },
234 { 0x15, 0x2c, 0xf },
235 { 0x26, 0x10, 0x3d },
236 { 0x29, 0x29, 0x38 },
237 { 0x4, 0x1a, 0xe },
238 { 0x2, 0x1e, 0x3a },
239 { 0x3c, 0x25, 0x33 },
240 { 0x3c, 0xc, 0x2c },
241 { 0x3f, 0x3, 0x2b },
242 { 0x1c, 0x9, 0x13 },
243 { 0x25, 0x2a, 0x35 },
244 { 0x1e, 0xa, 0x38 },
245 { 0x24, 0x8, 0x3 },
246 { 0x3, 0xe, 0x36 },
247 { 0xc, 0x6, 0x2a },
248 { 0x26, 0x3, 0x32 },
249 { 0x5, 0x2f, 0x33 },
250 { 0x3c, 0x35, 0x2f },
251 { 0x2d, 0x26, 0x3e },
252 { 0xd, 0xa, 0x10 },
253 { 0x25, 0x3c, 0x11 },
254 { 0xd, 0x4, 0x2e },
255 { 0x5, 0x19, 0x3e },
256 { 0xc, 0x13, 0x34 },
257 { 0x2b, 0x6, 0x24 },
258 { 0x4, 0x3, 0xd },
259 { 0x2f, 0x3c, 0xc },
260 { 0x2a, 0x37, 0x1f },
261 { 0xf, 0x12, 0x38 },
262 { 0x38, 0xe, 0x2a },
263 { 0x12, 0x2f, 0x19 },
264 { 0x29, 0x2e, 0x31 },
265 { 0x25, 0x13, 0x3e },
266 { 0x33, 0x3e, 0x33 },
267 { 0x1d, 0x2c, 0x25 },
268 { 0x15, 0x15, 0x5 },
269 { 0x32, 0x25, 0x39 },
270 { 0x1a, 0x7, 0x1f },
271 { 0x13, 0xe, 0x1d },
272 { 0x36, 0x17, 0x34 },
273 { 0xf, 0x15, 0x23 },
274 { 0x2, 0x35, 0xd },
275 { 0x15, 0x3f, 0xc },
276 { 0x14, 0x2f, 0xf },
277 { 0x19, 0x21, 0x3e },
278 { 0x27, 0x11, 0x2f },
279 { 0x38, 0x3f, 0x3c },
280 { 0x36, 0x2d, 0x15 },
281 { 0x16, 0x17, 0x2 },
282 { 0x1, 0xa, 0x3d },
283 { 0x1b, 0x11, 0x3f },
284 { 0x21, 0x3c, 0xd },
285 { 0x1a, 0x39, 0x3d },
286 { 0x8, 0xe, 0xe },
287 { 0x22, 0x21, 0x23 },
288 { 0x1e, 0x30, 0x5 },
289 { 0x1f, 0x22, 0x3d },
290 { 0x1e, 0x2f, 0xa },
291 { 0x0, 0x1c, 0xe },
292 { 0x0, 0x1c, 0x15 },
293 { 0x0, 0x1c, 0x1c },
294 { 0x0, 0x15, 0x1c },
295 { 0x0, 0xe, 0x1c },
296 { 0x0, 0x7, 0x1c },
297 { 0xe, 0xe, 0x1c },
298 { 0x11, 0xe, 0x1c },
299 { 0x15, 0xe, 0x1c },
300 { 0x18, 0xe, 0x1c },
301 { 0x1c, 0xe, 0x1c },
302 { 0x1c, 0xe, 0x18 },
303 { 0x1c, 0xe, 0x15 },
304 { 0x1c, 0xe, 0x11 },
305 { 0x1c, 0xe, 0xe },
306 { 0x1c, 0x11, 0xe },
307 { 0x1c, 0x15, 0xe },
308 { 0x1c, 0x18, 0xe },
309 { 0x1c, 0x1c, 0xe },
310 { 0x18, 0x1c, 0xe },
311 { 0x15, 0x1c, 0xe },
312 { 0x11, 0x1c, 0xe },
313 { 0xe, 0x1c, 0xe },
314 { 0xe, 0x1c, 0x11 },
315 { 0xe, 0x1c, 0x15 },
316 { 0xe, 0x1c, 0x18 },
317 { 0xe, 0x1c, 0x1c },
318 { 0xe, 0x18, 0x1c },
319 { 0xe, 0x15, 0x1c },
320 { 0xe, 0x11, 0x1c },
321 { 0x14, 0x14, 0x1c },
322 { 0x16, 0x14, 0x1c },
323 { 0x18, 0x14, 0x1c },
324 { 0x1a, 0x14, 0x1c },
325 { 0x1c, 0x14, 0x1c },
326 { 0x1c, 0x14, 0x1a },
327 { 0x1c, 0x14, 0x18 },
328 { 0x1c, 0x14, 0x16 },
329 { 0x1c, 0x14, 0x14 },
330 { 0x1c, 0x16, 0x14 },
331 { 0x1c, 0x18, 0x14 },
332 { 0x1c, 0x1a, 0x14 },
333 { 0x1c, 0x1c, 0x14 },
334 { 0x1a, 0x1c, 0x14 },
335 { 0x18, 0x1c, 0x14 },
336 { 0x16, 0x1c, 0x14 },
337 { 0x14, 0x1c, 0x14 },
338 { 0x14, 0x1c, 0x16 },
339 { 0x14, 0x1c, 0x18 },
340 { 0x14, 0x1c, 0x1a },
341 { 0x14, 0x1c, 0x1c },
342 { 0x14, 0x1a, 0x1c },
343 { 0x14, 0x18, 0x1c },
344 { 0x14, 0x16, 0x1c },
345 { 0x0, 0x0, 0x10 },
346 { 0x4, 0x0, 0x10 },
347 { 0x8, 0x0, 0x10 },
348 { 0xc, 0x0, 0x10 },
349 { 0x10, 0x0, 0x10 },
350 { 0x10, 0x0, 0xc },
351 { 0x10, 0x0, 0x8 },
352 { 0x10, 0x0, 0x4 },
353 { 0x10, 0x0, 0x0 },
354 { 0x10, 0x4, 0x0 },
355 { 0x10, 0x8, 0x0 },
356 { 0x10, 0xc, 0x0 },
357 { 0x10, 0x10, 0x0 },
358 { 0xc, 0x10, 0x0 },
359 { 0x8, 0x10, 0x0 },
360 { 0x4, 0x10, 0x0 },
361 { 0x0, 0x10, 0x0 },
362 { 0x0, 0x10, 0x4 },
363 { 0x0, 0x10, 0x8 },
364 { 0x0, 0x10, 0xc },
365 { 0x0, 0x10, 0x10 },
366 { 0x0, 0xc, 0x10 },
367 { 0x0, 0x8, 0x10 },
368 { 0x0, 0x4, 0x10 },
369 { 0x8, 0x8, 0x10 },
370 { 0xa, 0x8, 0x10 },
371 { 0xc, 0x8, 0x10 },
372 { 0xe, 0x8, 0x10 },
373 { 0x10, 0x8, 0x10 },
374 { 0x10, 0x8, 0xe },
375 { 0x10, 0x8, 0xc },
376 { 0x10, 0x8, 0xa },
377 { 0x10, 0x8, 0x8 },
378 { 0x10, 0xa, 0x8 },
379 { 0x10, 0xc, 0x8 },
380 { 0x10, 0xe, 0x8 },
381 { 0x10, 0x10, 0x8 },
382 { 0xe, 0x10, 0x8 },
383 { 0xc, 0x10, 0x8 },
384 { 0xa, 0x10, 0x8 },
385 { 0x8, 0x10, 0x8 },
386 { 0x8, 0x10, 0xa },
387 { 0x8, 0x10, 0xc },
388 { 0x8, 0x10, 0xe },
389 { 0x8, 0x10, 0x10 },
390 { 0x8, 0xe, 0x10 },
391 { 0x8, 0xc, 0x10 },
392 { 0x8, 0xa, 0x10 },
393 { 0xb, 0xb, 0x10 },
394 { 0xc, 0xb, 0x10 },
395 { 0xd, 0xb, 0x10 },
396 { 0xf, 0xb, 0x10 },
397 { 0x10, 0xb, 0x10 },
398 { 0x10, 0xb, 0xf },
399 { 0x10, 0xb, 0xd },
400 { 0x10, 0xb, 0xc },
401 { 0x10, 0xb, 0xb },
402 { 0x10, 0xc, 0xb },
403 { 0x10, 0xd, 0xb },
404 { 0x10, 0xf, 0xb },
405 { 0x10, 0x10, 0xb },
406 { 0xf, 0x10, 0xb },
407 { 0xd, 0x10, 0xb },
408 { 0xc, 0x10, 0xb },
409 { 0xb, 0x10, 0xb },
410 { 0xb, 0x10, 0xc },
411 { 0xb, 0x10, 0xd },
412 { 0xb, 0x10, 0xf },
413 { 0xb, 0x10, 0x10 },
414 { 0xb, 0xf, 0x10 },
415 { 0xb, 0xd, 0x10 },
416 { 0xb, 0xc, 0x10 },
417 { 0x0, 0x0, 0x0 },
418 { 0x0, 0x0, 0x0 },
419 { 0x0, 0x0, 0x0 },
420 { 0x0, 0x0, 0x0 },
421 { 0x0, 0x0, 0x0 },
422 { 0x0, 0x0, 0x0 },
423 { 0x0, 0x0, 0x0 }
424 };
425
426 unsigned char AC[21] = {
427 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
428 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
429 0x0C, 0x00, 0x0F, 0x08, 0x00};
430
431 static int scanPCI(int start_slt);
432 static int PCIVendor(int);
433 #ifdef DEBUG
434 static void printslots(void);
435 #endif
436 extern void puthex(unsigned long);
437 extern void puts(const char *);
438 static void unlockS3(void);
439
440 static void inline
441 outw(int port, unsigned short val)
442 {
443 outb(port, val >> 8);
444 outb(port+1, val);
445 }
446
447 #define PPC_601 1
448
449 int
450 vga_init(unsigned char *ISA_mem)
451 {
452 int slot;
453 struct VgaRegs *VgaTextRegs;
454 #if 0
455 if ((_get_PVR()>>16) == PPC_601) {
456 return(old_vga_init(ISA_mem));
457 }
458 #endif
459
460 /* See if VGA already in TEXT mode - exit if so! */
461 outb(0x3CE, 0x06);
462 if ((inb(0x3CF) & 0x01) == 0){
463 puts("VGA already in text mode\n");
464 return 0;
465 }
466
467 /* If no VGA responding in text mode, then we have some work to do...
468 */
469 slot = -1;
470 while((slot = scanPCI(slot)) > -1) { /* find video card in use */
471 unlockVideo(slot); /* enable I/O to card */
472 VgaTextRegs = GenVgaTextRegs;
473
474 switch (PCIVendor(slot)) {
475 default:
476 break;
477 case(S3Vendor):
478 unlockS3();
479 VgaTextRegs = S3TextRegs;
480 break;
481
482 case(CirrusVendor):
483 outw(0x3C4, 0x0612); /* unlock ext regs */
484 outw(0x3C4, 0x0700); /* reset ext sequence mode */
485 break;
486
487 case(ParadiseVendor): /* IBM Portable 850 */
488 outw(0x3ce, 0x0f05); /* unlock pardise registers */
489 outw(0x3c4, 0x0648);
490 outw(0x3d4, 0x2985);
491 outw(0x3d4, 0x34a6);
492 outb(0x3ce, 0x0b); /* disable linear addressing */
493 outb(0x3cf, inb(0x3cf) & ~0x30);
494 outw(0x3c4, 0x1400);
495 outb(0x3ce, 0x0e); /* disable 256 color mode */
496 outb(0x3cf, inb(0x3cf) & ~0x01);
497 outb(0xd00, 0xff); /* enable auto-centering */
498 if (!(inb(0xd01) & 0x03)) {
499 outb(0x3d4, 0x33);
500 outb(0x3d5, inb(0x3d5) & ~0x90);
501 outb(0x3d4, 0x32);
502 outb(0x3d5, inb(0x3d5) | 0x04);
503 outw(0x3d4, 0x0250);
504 outw(0x3d4, 0x07ba);
505 outw(0x3d4, 0x0900);
506 outw(0x3d4, 0x15e7);
507 outw(0x3d4, 0x2a95);
508 }
509 outw(0x3d4, 0x34a0);
510 break;
511
512 #if 0 /* Untested - probably doesn't work */
513 case(MatroxVendor):
514 case(DiamondVendor):
515 puts("VGA Chip Vendor ID: ");
516 puthex(PCIVendor(slot));
517 puts("\n");
518 mdelay(1000);
519 #endif
520 };
521
522 outw(0x3C4, 0x0120); /* disable video */
523 setTextRegs(VgaTextRegs); /* initial register setup */
524 setTextCLUT(0); /* load color lookup table */
525 loadFont(ISA_mem); /* load font */
526 setTextRegs(VgaTextRegs); /* reload registers */
527 outw(0x3C4, 0x0100); /* re-enable video */
528 clearVideoMemory();
529
530 if (PCIVendor(slot) == S3Vendor) {
531 outb(0x3c2, 0x63); /* MISC */
532 } /* endif */
533
534 #ifdef DEBUG
535 printslots();
536 mdelay(5000);
537 #endif
538
539 mdelay(1000); /* give time for the video monitor to come up */
540 }
541 return (1); /* 'CRT' I/O supported */
542 }
543
544 /*
545 * Write to VGA Attribute registers.
546 */
547 void
548 writeAttr(unsigned char index, unsigned char data, unsigned char videoOn)
549 {
550 unsigned char v;
551 v = inb(0x3da); /* reset attr. address toggle */
552 if (videoOn)
553 outb(0x3c0, (index & 0x1F) | 0x20);
554 else
555 outb(0x3c0, (index & 0x1F));
556 outb(0x3c0, data);
557 }
558
559 void
560 setTextRegs(struct VgaRegs *svp)
561 {
562 int i;
563
564 /*
565 * saved settings
566 */
567 while( svp->io_port != ENDMK ) {
568 outb(svp->io_port, svp->io_index);
569 outb(svp->io_port+1, svp->io_value);
570 svp++;
571 }
572
573 outb(0x3c2, 0x67); /* MISC */
574 outb(0x3c6, 0xff); /* MASK */
575
576 for ( i = 0; i < 0x10; i++)
577 writeAttr(i, AC[i], 0); /* pallete */
578 writeAttr(0x10, 0x0c, 0); /* text mode */
579 writeAttr(0x11, 0x00, 0); /* overscan color (border) */
580 writeAttr(0x12, 0x0f, 0); /* plane enable */
581 writeAttr(0x13, 0x08, 0); /* pixel panning */
582 writeAttr(0x14, 0x00, 1); /* color select; video on */
583 }
584
585 void
586 setTextCLUT(int shift)
587 {
588 int i;
589
590 outb(0x3C6, 0xFF);
591 i = inb(0x3C7);
592 outb(0x3C8, 0);
593 i = inb(0x3C7);
594
595 for ( i = 0; i < 256; i++) {
596 outb(0x3C9, TextCLUT[i].r << shift);
597 outb(0x3C9, TextCLUT[i].g << shift);
598 outb(0x3C9, TextCLUT[i].b << shift);
599 }
600 }
601
602 void
603 loadFont(unsigned char *ISA_mem)
604 {
605 int i, j;
606 unsigned char *font_page = (unsigned char *) &ISA_mem[0xA0000];
607
608 outb(0x3C2, 0x67);
609 /*
610 * Load font
611 */
612 i = inb(0x3DA); /* Reset Attr toggle */
613
614 outb(0x3C0,0x30);
615 outb(0x3C0, 0x01); /* graphics mode */
616
617 outw(0x3C4, 0x0001); /* reset sequencer */
618 outw(0x3C4, 0x0204); /* write to plane 2 */
619 outw(0x3C4, 0x0406); /* enable plane graphics */
620 outw(0x3C4, 0x0003); /* reset sequencer */
621 outw(0x3CE, 0x0402); /* read plane 2 */
622 outw(0x3CE, 0x0500); /* write mode 0, read mode 0 */
623 outw(0x3CE, 0x0605); /* set graphics mode */
624
625 for (i = 0; i < sizeof(font); i += 16) {
626 for (j = 0; j < 16; j++) {
627 __asm__ volatile("eieio");
628 font_page[(2*i)+j] = font[i+j];
629 }
630 }
631 }
632
633 static void
634 unlockS3(void)
635 {
636 int s3_device_id;
637 outw(0x3d4, 0x3848);
638 outw(0x3d4, 0x39a5);
639 outb(0x3d4, 0x2d);
640 s3_device_id = inb(0x3d5) << 8;
641 outb(0x3d4, 0x2e);
642 s3_device_id |= inb(0x3d5);
643
644 if (s3_device_id != 0x8812) {
645 /* From the S3 manual */
646 outb(0x46E8, 0x10); /* Put into setup mode */
647 outb(0x3C3, 0x10);
648 outb(0x102, 0x01); /* Enable registers */
649 outb(0x46E8, 0x08); /* Enable video */
650 outb(0x3C3, 0x08);
651 outb(0x4AE8, 0x00);
652
653 #if 0
654 outb(0x42E8, 0x80); /* Reset graphics engine? */
655 #endif
656
657 outb(0x3D4, 0x38); /* Unlock all registers */
658 outb(0x3D5, 0x48);
659 outb(0x3D4, 0x39);
660 outb(0x3D5, 0xA5);
661 outb(0x3D4, 0x40);
662 outb(0x3D5, inb(0x3D5)|0x01);
663 outb(0x3D4, 0x33);
664 outb(0x3D5, inb(0x3D5)&~0x52);
665 outb(0x3D4, 0x35);
666 outb(0x3D5, inb(0x3D5)&~0x30);
667 outb(0x3D4, 0x3A);
668 outb(0x3D5, 0x00);
669 outb(0x3D4, 0x53);
670 outb(0x3D5, 0x00);
671 outb(0x3D4, 0x31);
672 outb(0x3D5, inb(0x3D5)&~0x4B);
673 outb(0x3D4, 0x58);
674
675 outb(0x3D5, 0);
676
677 outb(0x3D4, 0x54);
678 outb(0x3D5, 0x38);
679 outb(0x3D4, 0x60);
680 outb(0x3D5, 0x07);
681 outb(0x3D4, 0x61);
682 outb(0x3D5, 0x80);
683 outb(0x3D4, 0x62);
684 outb(0x3D5, 0xA1);
685 outb(0x3D4, 0x69); /* High order bits for cursor address */
686 outb(0x3D5, 0);
687
688 outb(0x3D4, 0x32);
689 outb(0x3D5, inb(0x3D5)&~0x10);
690 } else {
691 outw(0x3c4, 0x0806); /* IBM Portable 860 */
692 outw(0x3c4, 0x1041);
693 outw(0x3c4, 0x1128);
694 outw(0x3d4, 0x4000);
695 outw(0x3d4, 0x3100);
696 outw(0x3d4, 0x3a05);
697 outw(0x3d4, 0x6688);
698 outw(0x3d4, 0x5800); /* disable linear addressing */
699 outw(0x3d4, 0x4500); /* disable H/W cursor */
700 outw(0x3c4, 0x5410); /* enable auto-centering */
701 outw(0x3c4, 0x561f);
702 outw(0x3c4, 0x1b80); /* lock DCLK selection */
703 outw(0x3d4, 0x3900); /* lock S3 registers */
704 outw(0x3d4, 0x3800);
705 } /* endif */
706 }
707
708 /*
709 * cursor() sets an offset (0-1999) into the 80x25 text area
710 */
711 void
712 cursor(int x, int y)
713 {
714 int pos = (y*cols)+x;
715 outb(0x3D4, 14);
716 outb(0x3D5, pos >> 8);
717 outb(0x3D4, 15);
718 outb(0x3D5, pos);
719 }
720
721 void
722 clearVideoMemory(void)
723 {
724 int i, j;
725 for (i = 0; i < lines; i++) {
726 for (j = 0; j < cols; j++) {
727 vidmem[((i*cols)+j)*2] = 0x20; /* fill with space character */
728 vidmem[((i*cols)+j)*2+1] = 0x07; /* set bg & fg attributes */
729 }
730 }
731 }
732
733 /* ============ */
734
735
736 #define NSLOTS 8
737 #define NPCIREGS 5
738
739
740 /*
741 should use devfunc number/indirect method to be totally safe on
742 all machines, this works for now on 3 slot Moto boxes
743 */
744
745 struct PCI_ConfigInfo {
746 unsigned long * config_addr;
747 unsigned long regs[NPCIREGS];
748 } PCI_slots [NSLOTS] = {
749
750 { (unsigned long *)0x80808000, 0xDEADBEEF }, /* onboard */
751 { (unsigned long *)0x80800800, 0xDEADBEEF }, /* onboard */
752 { (unsigned long *)0x80801000, 0xDEADBEEF }, /* onboard */
753 { (unsigned long *)0x80802000, 0xDEADBEEF }, /* onboard */
754 { (unsigned long *)0x80804000, 0xDEADBEEF }, /* onboard */
755 { (unsigned long *)0x80810000, 0xDEADBEEF }, /* slot A/1 */
756 { (unsigned long *)0x80820000, 0xDEADBEEF }, /* slot B/2 */
757 { (unsigned long *)0x80840000, 0xDEADBEEF } /* slot C/3 */
758 };
759
760
761
762 /*
763 * The following code modifies the PCI Command register
764 * to enable memory and I/O accesses.
765 */
766 void
767 unlockVideo(int slot)
768 {
769 volatile unsigned char * ppci;
770
771 ppci = (unsigned char * )PCI_slots[slot].config_addr;
772 ppci[4] = 0x0003; /* enable memory and I/O accesses */
773 ppci[0x10] = 0x00000; /* turn off memory mapping */
774 ppci[0x11] = 0x00000; /* mem_base = 0 */
775 ppci[0x12] = 0x00000;
776 ppci[0x13] = 0x00000;
777 __asm__ volatile("eieio");
778
779 outb(0x3d4, 0x11);
780 outb(0x3d5, 0x0e); /* unlock CR0-CR7 */
781 }
782
783 long
784 SwapBytes(long lv) /* turn little endian into big indian long */
785 {
786 long t;
787 t = (lv&0x000000FF) << 24;
788 t |= (lv&0x0000FF00) << 8;
789 t |= (lv&0x00FF0000) >> 8;
790 t |= (lv&0xFF000000) >> 24;
791 return(t);
792 }
793
794
795 #define DEVID 0
796 #define CMD 1
797 #define CLASS 2
798 #define MEMBASE 4
799
800 int
801 scanPCI(int start_slt)
802 {
803 int slt, r;
804 struct PCI_ConfigInfo *pslot;
805 int theSlot = -1;
806 int highVgaSlot = 0;
807
808 for ( slt = start_slt + 1; slt < NSLOTS; slt++) {
809 pslot = &PCI_slots[slt];
810 for ( r = 0; r < NPCIREGS; r++) {
811 pslot->regs[r] = SwapBytes ( pslot->config_addr[r] );
812 }
813 /* card in slot ? */
814 if ( pslot->regs[DEVID] != 0xFFFFFFFF ) {
815 /* VGA ? */
816 if ( ((pslot->regs[CLASS] & 0xFFFFFF00) == 0x03000000) ||
817 ((pslot->regs[CLASS] & 0xFFFFFF00) == 0x00010000)) {
818 highVgaSlot = slt;
819 /* did firmware enable it ? */
820 if ( (pslot->regs[CMD] & 0x03) ) {
821 theSlot = slt;
822 break;
823 }
824 }
825 }
826 }
827
828 return ( theSlot );
829 }
830
831 /* return Vendor ID of card in the slot */
832 static
833 int PCIVendor(int slotnum) {
834 struct PCI_ConfigInfo *pslot;
835
836 pslot = &PCI_slots[slotnum];
837
838 return (pslot->regs[DEVID] & 0xFFFF);
839 }
840
841 #ifdef DEBUG
842 static
843 void printslots(void)
844 {
845 int i;
846 #if 0
847 struct PCI_ConfigInfo *pslot;
848 #endif
849 for(i=0; i < NSLOTS; i++) {
850 #if 0
851 pslot = &PCI_slots[i];
852 printf("Slot: %d, Addr: %x, Vendor: %08x, Class: %08x\n",
853 i, pslot->config_addr, pslot->regs[0], pslot->regs[2]);
854 #else
855 puts("PCI Slot number: "); puthex(i);
856 puts(" Vendor ID: ");
857 puthex(PCIVendor(i)); puts("\n");
858 #endif
859 }
860 }
861 #endif /* DEBUG */
862