File: /usr/src/linux/arch/ppc/kernel/pmac_pic.c
1 /*
2 * BK Id: SCCS/s.pmac_pic.c 1.20 09/08/01 15:47:42 paulus
3 */
4 #include <linux/config.h>
5 #include <linux/stddef.h>
6 #include <linux/init.h>
7 #include <linux/sched.h>
8 #include <linux/signal.h>
9 #include <linux/pci.h>
10
11 #include <asm/sections.h>
12 #include <asm/io.h>
13 #include <asm/smp.h>
14 #include <asm/prom.h>
15 #include <asm/pci-bridge.h>
16 #include <asm/time.h>
17
18 #include "pmac_pic.h"
19 #include "open_pic.h"
20
21 /* pmac */struct pmac_irq_hw {
22 unsigned int flag;
23 unsigned int enable;
24 unsigned int ack;
25 unsigned int level;
26 };
27
28 /* XXX these addresses should be obtained from the device tree */
29 static volatile struct pmac_irq_hw *pmac_irq_hw[4] = {
30 (struct pmac_irq_hw *) 0xf3000020,
31 (struct pmac_irq_hw *) 0xf3000010,
32 (struct pmac_irq_hw *) 0xf4000020,
33 (struct pmac_irq_hw *) 0xf4000010,
34 };
35
36 static int max_irqs;
37 static int max_real_irqs;
38
39 spinlock_t pmac_pic_lock = SPIN_LOCK_UNLOCKED;
40
41
42 #define GATWICK_IRQ_POOL_SIZE 10
43 static struct interrupt_info gatwick_int_pool[GATWICK_IRQ_POOL_SIZE];
44
45 /*
46 * Mark an irq as "lost". This is only used on the pmac
47 * since it can lose interrupts (see pmac_set_irq_mask).
48 * -- Cort
49 */
50 void __pmac __set_lost(unsigned long irq_nr)
51 {
52 if (!test_and_set_bit(irq_nr, ppc_lost_interrupts)) {
53 atomic_inc(&ppc_n_lost_interrupts);
54 set_dec(1);
55 }
56 }
57
58 static void __pmac pmac_mask_and_ack_irq(unsigned int irq_nr)
59 {
60 unsigned long bit = 1UL << (irq_nr & 0x1f);
61 int i = irq_nr >> 5;
62 unsigned long flags;
63
64 if ((unsigned)irq_nr >= max_irqs)
65 return;
66
67 clear_bit(irq_nr, ppc_cached_irq_mask);
68 if (test_and_clear_bit(irq_nr, ppc_lost_interrupts))
69 atomic_dec(&ppc_n_lost_interrupts);
70 spin_lock_irqsave(&pmac_pic_lock, flags);
71 out_le32(&pmac_irq_hw[i]->ack, bit);
72 out_le32(&pmac_irq_hw[i]->enable, ppc_cached_irq_mask[i]);
73 out_le32(&pmac_irq_hw[i]->ack, bit);
74 do {
75 /* make sure ack gets to controller before we enable
76 interrupts */
77 mb();
78 } while(in_le32(&pmac_irq_hw[i]->flag) & bit);
79 spin_unlock_irqrestore(&pmac_pic_lock, flags);
80 }
81
82 static void __pmac pmac_set_irq_mask(unsigned int irq_nr)
83 {
84 unsigned long bit = 1UL << (irq_nr & 0x1f);
85 int i = irq_nr >> 5;
86 unsigned long flags;
87
88 if ((unsigned)irq_nr >= max_irqs)
89 return;
90
91 spin_lock_irqsave(&pmac_pic_lock, flags);
92 /* enable unmasked interrupts */
93 out_le32(&pmac_irq_hw[i]->enable, ppc_cached_irq_mask[i]);
94
95 do {
96 /* make sure mask gets to controller before we
97 return to user */
98 mb();
99 } while((in_le32(&pmac_irq_hw[i]->enable) & bit)
100 != (ppc_cached_irq_mask[i] & bit));
101
102 /*
103 * Unfortunately, setting the bit in the enable register
104 * when the device interrupt is already on *doesn't* set
105 * the bit in the flag register or request another interrupt.
106 */
107 if ((bit & ppc_cached_irq_mask[i])
108 && (ld_le32(&pmac_irq_hw[i]->level) & bit)
109 && !(ld_le32(&pmac_irq_hw[i]->flag) & bit))
110 __set_lost((ulong)irq_nr);
111 spin_unlock_irqrestore(&pmac_pic_lock, flags);
112 }
113
114 static void __pmac pmac_mask_irq(unsigned int irq_nr)
115 {
116 clear_bit(irq_nr, ppc_cached_irq_mask);
117 pmac_set_irq_mask(irq_nr);
118 mb();
119 }
120
121 static void __pmac pmac_unmask_irq(unsigned int irq_nr)
122 {
123 set_bit(irq_nr, ppc_cached_irq_mask);
124 pmac_set_irq_mask(irq_nr);
125 }
126
127 static void __pmac pmac_end_irq(unsigned int irq_nr)
128 {
129 if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {
130 set_bit(irq_nr, ppc_cached_irq_mask);
131 pmac_set_irq_mask(irq_nr);
132 }
133 }
134
135
136 struct hw_interrupt_type pmac_pic = {
137 " PMAC-PIC ",
138 NULL,
139 NULL,
140 pmac_unmask_irq,
141 pmac_mask_irq,
142 pmac_mask_and_ack_irq,
143 pmac_end_irq,
144 NULL
145 };
146
147 struct hw_interrupt_type gatwick_pic = {
148 " GATWICK ",
149 NULL,
150 NULL,
151 pmac_unmask_irq,
152 pmac_mask_irq,
153 pmac_mask_and_ack_irq,
154 pmac_end_irq,
155 NULL
156 };
157
158 static void gatwick_action(int cpl, void *dev_id, struct pt_regs *regs)
159 {
160 int irq, bits;
161
162 for (irq = max_irqs; (irq -= 32) >= max_real_irqs; ) {
163 int i = irq >> 5;
164 bits = ld_le32(&pmac_irq_hw[i]->flag)
165 | ppc_lost_interrupts[i];
166 if (bits == 0)
167 continue;
168 irq += __ilog2(bits);
169 break;
170 }
171 /* The previous version of this code allowed for this case, we
172 * don't. Put this here to check for it.
173 * -- Cort
174 */
175 if ( irq_desc[irq].handler != &gatwick_pic )
176 printk("gatwick irq not from gatwick pic\n");
177 else
178 ppc_irq_dispatch_handler( regs, irq );
179 }
180
181 int
182 pmac_get_irq(struct pt_regs *regs)
183 {
184 int irq;
185 unsigned long bits = 0;
186
187 #ifdef CONFIG_SMP
188 void psurge_smp_message_recv(struct pt_regs *);
189
190 /* IPI's are a hack on the powersurge -- Cort */
191 if ( smp_processor_id() != 0 ) {
192 psurge_smp_message_recv(regs);
193 return -2; /* ignore, already handled */
194 }
195 #endif /* CONFIG_SMP */
196 for (irq = max_real_irqs; (irq -= 32) >= 0; ) {
197 int i = irq >> 5;
198 bits = ld_le32(&pmac_irq_hw[i]->flag)
199 | ppc_lost_interrupts[i];
200 if (bits == 0)
201 continue;
202 irq += __ilog2(bits);
203 break;
204 }
205
206 return irq;
207 }
208
209 /* This routine will fix some missing interrupt values in the device tree
210 * on the gatwick mac-io controller used by some PowerBooks
211 */
212 static void __init
213 pmac_fix_gatwick_interrupts(struct device_node *gw, int irq_base)
214 {
215 struct device_node *node;
216 int count;
217
218 memset(gatwick_int_pool, 0, sizeof(gatwick_int_pool));
219 node = gw->child;
220 count = 0;
221 while(node)
222 {
223 /* Fix SCC */
224 if (strcasecmp(node->name, "escc") == 0)
225 if (node->child) {
226 if (node->child->n_intrs < 3) {
227 node->child->intrs = &gatwick_int_pool[count];
228 count += 3;
229 }
230 node->child->n_intrs = 3;
231 node->child->intrs[0].line = 15+irq_base;
232 node->child->intrs[1].line = 4+irq_base;
233 node->child->intrs[2].line = 5+irq_base;
234 printk(KERN_INFO "irq: fixed SCC on second controller (%d,%d,%d)\n",
235 node->child->intrs[0].line,
236 node->child->intrs[1].line,
237 node->child->intrs[2].line);
238 }
239 /* Fix media-bay & left SWIM */
240 if (strcasecmp(node->name, "media-bay") == 0) {
241 struct device_node* ya_node;
242
243 if (node->n_intrs == 0)
244 node->intrs = &gatwick_int_pool[count++];
245 node->n_intrs = 1;
246 node->intrs[0].line = 29+irq_base;
247 printk(KERN_INFO "irq: fixed media-bay on second controller (%d)\n",
248 node->intrs[0].line);
249
250 ya_node = node->child;
251 while(ya_node)
252 {
253 if (strcasecmp(ya_node->name, "floppy") == 0) {
254 if (ya_node->n_intrs < 2) {
255 ya_node->intrs = &gatwick_int_pool[count];
256 count += 2;
257 }
258 ya_node->n_intrs = 2;
259 ya_node->intrs[0].line = 19+irq_base;
260 ya_node->intrs[1].line = 1+irq_base;
261 printk(KERN_INFO "irq: fixed floppy on second controller (%d,%d)\n",
262 ya_node->intrs[0].line, ya_node->intrs[1].line);
263 }
264 if (strcasecmp(ya_node->name, "ata4") == 0) {
265 if (ya_node->n_intrs < 2) {
266 ya_node->intrs = &gatwick_int_pool[count];
267 count += 2;
268 }
269 ya_node->n_intrs = 2;
270 ya_node->intrs[0].line = 14+irq_base;
271 ya_node->intrs[1].line = 3+irq_base;
272 printk(KERN_INFO "irq: fixed ide on second controller (%d,%d)\n",
273 ya_node->intrs[0].line, ya_node->intrs[1].line);
274 }
275 ya_node = ya_node->sibling;
276 }
277 }
278 node = node->sibling;
279 }
280 if (count > 10) {
281 printk("WARNING !! Gatwick interrupt pool overflow\n");
282 printk(" GATWICK_IRQ_POOL_SIZE = %d\n", GATWICK_IRQ_POOL_SIZE);
283 printk(" requested = %d\n", count);
284 }
285 }
286
287 /*
288 * The PowerBook 3400/2400/3500 can have a combo ethernet/modem
289 * card which includes an ohare chip that acts as a second interrupt
290 * controller. If we find this second ohare, set it up and fix the
291 * interrupt value in the device tree for the ethernet chip.
292 */
293 static int __init enable_second_ohare(void)
294 {
295 unsigned char bus, devfn;
296 unsigned short cmd;
297 unsigned long addr;
298 struct device_node *irqctrler = find_devices("pci106b,7");
299 struct device_node *ether;
300
301 if (irqctrler == NULL || irqctrler->n_addrs <= 0)
302 return -1;
303 addr = (unsigned long) ioremap(irqctrler->addrs[0].address, 0x40);
304 pmac_irq_hw[1] = (volatile struct pmac_irq_hw *)(addr + 0x20);
305 max_irqs = 64;
306 if (pci_device_from_OF_node(irqctrler, &bus, &devfn) == 0) {
307 struct pci_controller* hose = pci_find_hose_for_OF_device(irqctrler);
308 if (!hose)
309 printk(KERN_ERR "Can't find PCI hose for OHare2 !\n");
310 else {
311 early_read_config_word(hose, bus, devfn, PCI_COMMAND, &cmd);
312 cmd |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
313 cmd &= ~PCI_COMMAND_IO;
314 early_write_config_word(hose, bus, devfn, PCI_COMMAND, cmd);
315 }
316 }
317
318 /* Fix interrupt for the modem/ethernet combo controller. The number
319 in the device tree (27) is bogus (correct for the ethernet-only
320 board but not the combo ethernet/modem board).
321 The real interrupt is 28 on the second controller -> 28+32 = 60.
322 */
323 ether = find_devices("pci1011,14");
324 if (ether && ether->n_intrs > 0) {
325 ether->intrs[0].line = 60;
326 printk(KERN_INFO "irq: Fixed ethernet IRQ to %d\n",
327 ether->intrs[0].line);
328 }
329
330 /* Return the interrupt number of the cascade */
331 return irqctrler->intrs[0].line;
332 }
333
334 void __init
335 pmac_pic_init(void)
336 {
337 int i;
338 struct device_node *irqctrler;
339 unsigned long addr;
340 int irq_cascade = -1;
341
342 /* We first try to detect Apple's new Core99 chipset, since mac-io
343 * is quite different on those machines and contains an IBM MPIC2.
344 */
345 irqctrler = find_type_devices("open-pic");
346 if (irqctrler != NULL)
347 {
348 printk("PowerMac using OpenPIC irq controller\n");
349 if (irqctrler->n_addrs > 0)
350 {
351 int nmi_irq = -1;
352 unsigned char senses[NR_IRQS];
353 #ifdef CONFIG_XMON
354 struct device_node* pswitch;
355
356 pswitch = find_devices("programmer-switch");
357 if (pswitch && pswitch->n_intrs)
358 nmi_irq = pswitch->intrs[0].line;
359 #endif /* CONFIG_XMON */
360 prom_get_irq_senses(senses, 0, NR_IRQS);
361 OpenPIC_InitSenses = senses;
362 OpenPIC_NumInitSenses = NR_IRQS;
363 ppc_md.get_irq = openpic_get_irq;
364 OpenPIC_Addr = ioremap(irqctrler->addrs[0].address,
365 irqctrler->addrs[0].size);
366 openpic_init(1, 0, 0, nmi_irq);
367 #ifdef CONFIG_XMON
368 if (nmi_irq >= 0)
369 request_irq(nmi_irq, xmon_irq, 0,
370 "NMI - XMON", 0);
371 #endif /* CONFIG_XMON */
372 return;
373 }
374 irqctrler = NULL;
375 }
376
377 /*
378 * G3 powermacs and 1999 G3 PowerBooks have 64 interrupts,
379 * 1998 G3 Series PowerBooks have 128,
380 * other powermacs have 32.
381 * The combo ethernet/modem card for the Powerstar powerbooks
382 * (2400/3400/3500, ohare based) has a second ohare chip
383 * effectively making a total of 64.
384 */
385 max_irqs = max_real_irqs = 32;
386 irqctrler = find_devices("mac-io");
387 if (irqctrler)
388 {
389 max_real_irqs = 64;
390 if (irqctrler->next)
391 max_irqs = 128;
392 else
393 max_irqs = 64;
394 }
395 for ( i = 0; i < max_real_irqs ; i++ )
396 irq_desc[i].handler = &pmac_pic;
397
398 /* get addresses of first controller */
399 if (irqctrler) {
400 if (irqctrler->n_addrs > 0) {
401 addr = (unsigned long)
402 ioremap(irqctrler->addrs[0].address, 0x40);
403 for (i = 0; i < 2; ++i)
404 pmac_irq_hw[i] = (volatile struct pmac_irq_hw*)
405 (addr + (2 - i) * 0x10);
406 }
407
408 /* get addresses of second controller */
409 irqctrler = irqctrler->next;
410 if (irqctrler && irqctrler->n_addrs > 0) {
411 addr = (unsigned long)
412 ioremap(irqctrler->addrs[0].address, 0x40);
413 for (i = 2; i < 4; ++i)
414 pmac_irq_hw[i] = (volatile struct pmac_irq_hw*)
415 (addr + (4 - i) * 0x10);
416 irq_cascade = irqctrler->intrs[0].line;
417 if (device_is_compatible(irqctrler, "gatwick"))
418 pmac_fix_gatwick_interrupts(irqctrler, max_real_irqs);
419 }
420 } else {
421 /* older powermacs have a GC (grand central) or ohare at
422 f3000000, with interrupt control registers at f3000020. */
423 addr = (unsigned long) ioremap(0xf3000000, 0x40);
424 pmac_irq_hw[0] = (volatile struct pmac_irq_hw *) (addr + 0x20);
425 }
426
427 /* PowerBooks 3400 and 3500 can have a second controller in a second
428 ohare chip, on the combo ethernet/modem card */
429 if (machine_is_compatible("AAPL,3400/2400")
430 || machine_is_compatible("AAPL,3500"))
431 irq_cascade = enable_second_ohare();
432
433 /* disable all interrupts in all controllers */
434 for (i = 0; i * 32 < max_irqs; ++i)
435 out_le32(&pmac_irq_hw[i]->enable, 0);
436
437 /* get interrupt line of secondary interrupt controller */
438 if (irq_cascade >= 0) {
439 printk(KERN_INFO "irq: secondary controller on irq %d\n",
440 (int)irq_cascade);
441 for ( i = max_real_irqs ; i < max_irqs ; i++ )
442 irq_desc[i].handler = &gatwick_pic;
443 request_irq( irq_cascade, gatwick_action, SA_INTERRUPT,
444 "cascade", 0 );
445 }
446 printk("System has %d possible interrupts\n", max_irqs);
447 if (max_irqs != max_real_irqs)
448 printk(KERN_DEBUG "%d interrupts on main controller\n",
449 max_real_irqs);
450
451 #ifdef CONFIG_XMON
452 request_irq(20, xmon_irq, 0, "NMI - XMON", 0);
453 #endif /* CONFIG_XMON */
454 }
455
456 #ifdef CONFIG_PMAC_PBOOK
457 /*
458 * These procedures are used in implementing sleep on the powerbooks.
459 * sleep_save_intrs() saves the states of all interrupt enables
460 * and disables all interrupts except for the nominated one.
461 * sleep_restore_intrs() restores the states of all interrupt enables.
462 */
463 unsigned int sleep_save_mask[2];
464
465 void __pmac
466 pmac_sleep_save_intrs(int viaint)
467 {
468 sleep_save_mask[0] = ppc_cached_irq_mask[0];
469 sleep_save_mask[1] = ppc_cached_irq_mask[1];
470 ppc_cached_irq_mask[0] = 0;
471 ppc_cached_irq_mask[1] = 0;
472 if (viaint > 0)
473 set_bit(viaint, ppc_cached_irq_mask);
474 out_le32(&pmac_irq_hw[0]->enable, ppc_cached_irq_mask[0]);
475 if (max_real_irqs > 32)
476 out_le32(&pmac_irq_hw[1]->enable, ppc_cached_irq_mask[1]);
477 (void)in_le32(&pmac_irq_hw[0]->flag);
478 /* make sure mask gets to controller before we return to caller */
479 mb();
480 (void)in_le32(&pmac_irq_hw[0]->enable);
481 }
482
483 void __pmac
484 pmac_sleep_restore_intrs(void)
485 {
486 int i;
487
488 out_le32(&pmac_irq_hw[0]->enable, 0);
489 if (max_real_irqs > 32)
490 out_le32(&pmac_irq_hw[1]->enable, 0);
491 mb();
492 for (i = 0; i < max_real_irqs; ++i)
493 if (test_bit(i, sleep_save_mask))
494 pmac_unmask_irq(i);
495 }
496 #endif /* CONFIG_PMAC_PBOOK */
497