File: /usr/src/linux/include/asm-sparc/vac-ops.h
1 /* $Id: vac-ops.h,v 1.13 1998/01/30 10:59:59 jj Exp $ */
2 #ifndef _SPARC_VAC_OPS_H
3 #define _SPARC_VAC_OPS_H
4
5 /* vac-ops.h: Inline assembly routines to do operations on the Sparc
6 * VAC (virtual address cache) for the sun4c.
7 *
8 * Copyright (C) 1994, David S. Miller (davem@caip.rutgers.edu)
9 */
10
11 #include <linux/config.h>
12 #include <asm/sysen.h>
13 #include <asm/contregs.h>
14 #include <asm/asi.h>
15
16 /* The SUN4C models have a virtually addressed write-through
17 * cache.
18 *
19 * The cache tags are directly accessible through an ASI and
20 * each have the form:
21 *
22 * ------------------------------------------------------------
23 * | MBZ | CONTEXT | WRITE | PRIV | VALID | MBZ | TagID | MBZ |
24 * ------------------------------------------------------------
25 * 31 25 24 22 21 20 19 18 16 15 2 1 0
26 *
27 * MBZ: These bits are either unused and/or reserved and should
28 * be written as zeroes.
29 *
30 * CONTEXT: Records the context to which this cache line belongs.
31 *
32 * WRITE: A copy of the writable bit from the mmu pte access bits.
33 *
34 * PRIV: A copy of the privileged bit from the pte access bits.
35 *
36 * VALID: If set, this line is valid, else invalid.
37 *
38 * TagID: Fourteen bits of tag ID.
39 *
40 * Every virtual address is seen by the cache like this:
41 *
42 * ----------------------------------------
43 * | RESV | TagID | LINE | BYTE-in-LINE |
44 * ----------------------------------------
45 * 31 30 29 16 15 4 3 0
46 *
47 * RESV: Unused/reserved.
48 *
49 * TagID: Used to match the Tag-ID in that vac tags.
50 *
51 * LINE: Which line within the cache
52 *
53 * BYTE-in-LINE: Which byte within the cache line.
54 */
55
56 /* Sun4c VAC Tags */
57 #define S4CVACTAG_CID 0x01c00000
58 #define S4CVACTAG_W 0x00200000
59 #define S4CVACTAG_P 0x00100000
60 #define S4CVACTAG_V 0x00080000
61 #define S4CVACTAG_TID 0x0000fffc
62
63 /* Sun4c VAC Virtual Address */
64 /* These aren't used, why bother? (Anton) */
65 #if 0
66 #define S4CVACVA_TID 0x3fff0000
67 #define S4CVACVA_LINE 0x0000fff0
68 #define S4CVACVA_BIL 0x0000000f
69 #endif
70
71 /* The indexing of cache lines creates a problem. Because the line
72 * field of a virtual address extends past the page offset within
73 * the virtual address it is possible to have what are called
74 * 'bad aliases' which will create inconsistencies. So we must make
75 * sure that within a context that if a physical page is mapped
76 * more than once, that 'extra' line bits are the same. If this is
77 * not the case, and thus is a 'bad alias' we must turn off the
78 * cacheable bit in the pte's of all such pages.
79 */
80
81 #ifdef CONFIG_SUN4
82 #define S4CVAC_BADBITS 0x0001e000
83 #else
84 #define S4CVAC_BADBITS 0x0000f000
85 #endif
86
87 /* The following is true if vaddr1 and vaddr2 would cause
88 * a 'bad alias'.
89 */
90 #define S4CVAC_BADALIAS(vaddr1, vaddr2) \
91 ((((unsigned long) (vaddr1)) ^ ((unsigned long) (vaddr2))) & \
92 (S4CVAC_BADBITS))
93
94 /* The following structure describes the characteristics of a sun4c
95 * VAC as probed from the prom during boot time.
96 */
97 struct sun4c_vac_props {
98 unsigned int num_bytes; /* Size of the cache */
99 unsigned int num_lines; /* Number of cache lines */
100 unsigned int do_hwflushes; /* Hardware flushing available? */
101 enum { NONE, WRITE_THROUGH,
102 WRITE_BACK } type; /* What type of VAC? */
103 unsigned int linesize; /* Size of each line in bytes */
104 unsigned int log2lsize; /* log2(linesize) */
105 unsigned int on; /* VAC is enabled */
106 };
107
108 extern struct sun4c_vac_props sun4c_vacinfo;
109
110 extern void sun4c_flush_all(void);
111
112 /* sun4c_enable_vac() enables the sun4c virtual address cache. */
113 extern __inline__ void sun4c_enable_vac(void)
114 {
115 __asm__ __volatile__("lduba [%0] %1, %%g1\n\t"
116 "or %%g1, %2, %%g1\n\t"
117 "stba %%g1, [%0] %1\n\t" : :
118 "r" ((unsigned int) AC_SENABLE),
119 "i" (ASI_CONTROL), "i" (SENABLE_CACHE) :
120 "g1");
121 sun4c_vacinfo.on = 1;
122 }
123
124 /* sun4c_disable_vac() disables the virtual address cache. */
125 extern __inline__ void sun4c_disable_vac(void)
126 {
127 __asm__ __volatile__("lduba [%0] %1, %%g1\n\t"
128 "andn %%g1, %2, %%g1\n\t"
129 "stba %%g1, [%0] %1\n\t" : :
130 "r" ((unsigned int) AC_SENABLE),
131 "i" (ASI_CONTROL), "i" (SENABLE_CACHE) :
132 "g1");
133 sun4c_vacinfo.on = 0;
134 }
135
136 #endif /* !(_SPARC_VAC_OPS_H) */
137