File: /usr/src/linux/arch/alpha/kernel/core_polaris.c
1 /*
2 * linux/arch/alpha/kernel/core_polaris.c
3 *
4 * POLARIS chip-specific code
5 */
6
7 #include <linux/kernel.h>
8 #include <linux/types.h>
9 #include <linux/pci.h>
10 #include <linux/sched.h>
11 #include <linux/init.h>
12
13 #include <asm/system.h>
14 #include <asm/ptrace.h>
15
16 #define __EXTERN_INLINE inline
17 #include <asm/io.h>
18 #include <asm/core_polaris.h>
19 #undef __EXTERN_INLINE
20
21 #include "proto.h"
22 #include "pci_impl.h"
23
24 /*
25 * BIOS32-style PCI interface:
26 */
27
28 #define DEBUG_CONFIG 0
29
30 #if DEBUG_CONFIG
31 # define DBG_CFG(args) printk args
32 #else
33 # define DBG_CFG(args)
34 #endif
35
36
37 /*
38 * Given a bus, device, and function number, compute resulting
39 * configuration space address. This is fairly straightforward
40 * on POLARIS, since the chip itself generates Type 0 or Type 1
41 * cycles automatically depending on the bus number (Bus 0 is
42 * hardwired to Type 0, all others are Type 1. Peer bridges
43 * are not supported).
44 *
45 * All types:
46 *
47 * 3 3 3 3|3 3 3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1
48 * 9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
49 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
50 * |1|1|1|1|1|0|0|1|1|1|1|1|1|1|1|0|B|B|B|B|B|B|B|B|D|D|D|D|D|F|F|F|R|R|R|R|R|R|x|x|
51 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
52 *
53 * 23:16 bus number (8 bits = 128 possible buses)
54 * 15:11 Device number (5 bits)
55 * 10:8 function number
56 * 7:2 register number
57 *
58 * Notes:
59 * The function number selects which function of a multi-function device
60 * (e.g., scsi and ethernet).
61 *
62 * The register selects a DWORD (32 bit) register offset. Hence it
63 * doesn't get shifted by 2 bits as we want to "drop" the bottom two
64 * bits.
65 */
66
67 static int
68 mk_conf_addr(struct pci_dev *dev, int where, unsigned long *pci_addr, u8 *type1)
69 {
70 u8 bus = dev->bus->number;
71 u8 device_fn = dev->devfn;
72
73 *type1 = (bus == 0) ? 0 : 1;
74 *pci_addr = (bus << 16) | (device_fn << 8) | (where) |
75 POLARIS_DENSE_CONFIG_BASE;
76
77 DBG_CFG(("mk_conf_addr(bus=%d ,device_fn=0x%x, where=0x%x,"
78 " returning address 0x%p\n"
79 bus, device_fn, where, *pci_addr));
80
81 return 0;
82 }
83
84 static int
85 polaris_read_config_byte(struct pci_dev *dev, int where, u8 *value)
86 {
87 unsigned long pci_addr;
88 unsigned char type1;
89
90 if (mk_conf_addr(dev, where, &pci_addr, &type1))
91 return PCIBIOS_DEVICE_NOT_FOUND;
92
93 *value = __kernel_ldbu(*(vucp)pci_addr);
94 return PCIBIOS_SUCCESSFUL;
95 }
96
97 static int
98 polaris_read_config_word(struct pci_dev *dev, int where, u16 *value)
99 {
100 unsigned long pci_addr;
101 unsigned char type1;
102
103 if (mk_conf_addr(dev, where, &pci_addr, &type1))
104 return PCIBIOS_DEVICE_NOT_FOUND;
105
106 *value = __kernel_ldwu(*(vusp)pci_addr);
107 return PCIBIOS_SUCCESSFUL;
108 }
109
110 int
111 polaris_read_config_dword(struct pci_dev *dev, int where, u32 *value)
112 {
113 unsigned long pci_addr;
114 unsigned char type1;
115
116 if (mk_conf_addr(dev, where, &pci_addr, &type1))
117 return PCIBIOS_DEVICE_NOT_FOUND;
118
119 *value = *(vuip)pci_addr;
120 return PCIBIOS_SUCCESSFUL;
121 }
122
123 static int
124 polaris_write_config_byte(struct pci_dev *dev, int where, u8 value)
125 {
126 unsigned long pci_addr;
127 unsigned char type1;
128
129 if (mk_conf_addr(dev, where, &pci_addr, &type1))
130 return PCIBIOS_DEVICE_NOT_FOUND;
131
132 __kernel_stb(value, *(vucp)pci_addr);
133 mb();
134 __kernel_ldbu(*(vucp)pci_addr);
135 return PCIBIOS_SUCCESSFUL;
136 }
137
138 static int
139 polaris_write_config_word(struct pci_dev *dev, int where, u16 value)
140 {
141 unsigned long pci_addr;
142 unsigned char type1;
143
144 if (mk_conf_addr(dev, where, &pci_addr, &type1))
145 return PCIBIOS_DEVICE_NOT_FOUND;
146
147 __kernel_stw(value, *(vusp)pci_addr);
148 mb();
149 __kernel_ldwu(*(vusp)pci_addr);
150 return PCIBIOS_SUCCESSFUL;
151 }
152
153 int
154 polaris_write_config_dword(struct pci_dev *dev, int where, u32 value)
155 {
156 unsigned long pci_addr;
157 unsigned char type1;
158
159 if (mk_conf_addr(dev, where, &pci_addr, &type1))
160 return PCIBIOS_DEVICE_NOT_FOUND;
161
162 *(vuip)pci_addr = value;
163 mb();
164 *(vuip)pci_addr;
165 return PCIBIOS_SUCCESSFUL;
166 }
167
168 struct pci_ops polaris_pci_ops =
169 {
170 read_byte: polaris_read_config_byte,
171 read_word: polaris_read_config_word,
172 read_dword: polaris_read_config_dword,
173 write_byte: polaris_write_config_byte,
174 write_word: polaris_write_config_word,
175 write_dword: polaris_write_config_dword
176 };
177
178 void __init
179 polaris_init_arch(void)
180 {
181 struct pci_controller *hose;
182
183 /* May need to initialize error reporting (see PCICTL0/1), but
184 * for now assume that the firmware has done the right thing
185 * already.
186 */
187 #if 0
188 printk("polaris_init_arch(): trusting firmware for setup\n");
189 #endif
190
191 /*
192 * Create our single hose.
193 */
194
195 pci_isa_hose = hose = alloc_pci_controller();
196 hose->io_space = &ioport_resource;
197 hose->mem_space = &iomem_resource;
198 hose->index = 0;
199
200 hose->sparse_mem_base = 0;
201 hose->dense_mem_base = POLARIS_DENSE_MEM_BASE - IDENT_ADDR;
202 hose->sparse_io_base = 0;
203 hose->dense_io_base = POLARIS_DENSE_IO_BASE - IDENT_ADDR;
204
205 hose->sg_isa = hose->sg_pci = NULL;
206
207 /* The I/O window is fixed at 2G @ 2G. */
208 __direct_map_base = 0x80000000;
209 __direct_map_size = 0x80000000;
210 }
211
212 static inline void
213 polaris_pci_clr_err(void)
214 {
215 *(vusp)POLARIS_W_STATUS;
216 /* Write 1's to settable bits to clear errors */
217 *(vusp)POLARIS_W_STATUS = 0x7800;
218 mb();
219 *(vusp)POLARIS_W_STATUS;
220 }
221
222 void
223 polaris_machine_check(unsigned long vector, unsigned long la_ptr,
224 struct pt_regs * regs)
225 {
226 /* Clear the error before any reporting. */
227 mb();
228 mb();
229 draina();
230 polaris_pci_clr_err();
231 wrmces(0x7);
232 mb();
233
234 process_mcheck_info(vector, la_ptr, regs, "POLARIS",
235 mcheck_expected(0));
236 }
237