File: /usr/src/linux/drivers/atm/fore200e.c
1 /*
2 $Id: fore200e.c,v 1.5 2000/04/14 10:10:34 davem Exp $
3
4 A FORE Systems 200E-series driver for ATM on Linux.
5 Christophe Lizzi (lizzi@cnam.fr), October 1999-March 2000.
6
7 Based on the PCA-200E driver from Uwe Dannowski (Uwe.Dannowski@inf.tu-dresden.de).
8
9 This driver simultaneously supports PCA-200E and SBA-200E adapters
10 on i386, alpha (untested), powerpc, sparc and sparc64 architectures.
11
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
16
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
21
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software
24 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27
28 #include <linux/version.h>
29 #include <linux/config.h>
30 #include <linux/kernel.h>
31 #include <linux/slab.h>
32 #include <linux/init.h>
33 #include <linux/capability.h>
34 #include <linux/sched.h>
35 #include <linux/interrupt.h>
36 #include <linux/bitops.h>
37 #include <linux/atmdev.h>
38 #include <linux/sonet.h>
39 #include <linux/atm_suni.h>
40 #include <asm/io.h>
41 #include <asm/string.h>
42 #include <asm/segment.h>
43 #include <asm/page.h>
44 #include <asm/irq.h>
45 #include <asm/dma.h>
46 #include <asm/byteorder.h>
47 #include <asm/uaccess.h>
48 #include <asm/atomic.h>
49 #include <linux/pci.h>
50
51 #ifdef CONFIG_ATM_FORE200E_SBA
52 #include <asm/idprom.h>
53 #include <asm/sbus.h>
54 #include <asm/openprom.h>
55 #include <asm/oplib.h>
56 #include <asm/pgtable.h>
57 #endif
58
59 #include <linux/module.h>
60
61 #include "fore200e.h"
62 #include "suni.h"
63
64 #if 1 /* ensure correct handling of 52-byte AAL0 SDUs used by atmdump-like apps */
65 #define FORE200E_52BYTE_AAL0_SDU
66 #endif
67
68 #define FORE200E_VERSION "0.2d"
69
70
71 #define FORE200E "fore200e: "
72
73 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
74 #define DPRINTK(level, format, args...) do { if (CONFIG_ATM_FORE200E_DEBUG >= (level)) \
75 printk(FORE200E format, ##args); } while(0)
76 #else
77 #define DPRINTK(level, format, args...) while(0)
78 #endif
79
80
81 #define FORE200E_ALIGN(addr, alignment) \
82 ((((unsigned long)(addr) + (alignment - 1)) & ~(alignment - 1)) - (unsigned long)(addr))
83
84 #define FORE200E_DMA_INDEX(dma_addr, type, index) ((dma_addr) + (index) * sizeof(type))
85
86 #define FORE200E_INDEX(virt_addr, type, index) (&((type *)(virt_addr))[ index ])
87
88 #define FORE200E_NEXT_ENTRY(index, modulo) (index = ++(index) % (modulo))
89
90
91 #define MSECS(ms) (((ms)*HZ/1000)+1)
92
93
94 extern const struct atmdev_ops fore200e_ops;
95 extern const struct fore200e_bus fore200e_bus[];
96
97 static struct fore200e* fore200e_boards = NULL;
98
99
100 #ifdef MODULE
101 MODULE_AUTHOR("Christophe Lizzi - credits to Uwe Dannowski and Heikki Vatiainen");
102 MODULE_DESCRIPTION("FORE Systems 200E-series ATM driver - version " FORE200E_VERSION);
103 MODULE_SUPPORTED_DEVICE("PCA-200E, SBA-200E");
104 #endif
105
106
107 static const int fore200e_rx_buf_nbr[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
108 { BUFFER_S1_NBR, BUFFER_L1_NBR },
109 { BUFFER_S2_NBR, BUFFER_L2_NBR }
110 };
111
112 static const int fore200e_rx_buf_size[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
113 { BUFFER_S1_SIZE, BUFFER_L1_SIZE },
114 { BUFFER_S2_SIZE, BUFFER_L2_SIZE }
115 };
116
117
118 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
119 static const char* fore200e_traffic_class[] = { "NONE", "UBR", "CBR", "VBR", "ABR", "ANY" };
120 #endif
121
122
123 #if 0 /* currently unused */
124 static int
125 fore200e_fore2atm_aal(enum fore200e_aal aal)
126 {
127 switch(aal) {
128 case FORE200E_AAL0: return ATM_AAL0;
129 case FORE200E_AAL34: return ATM_AAL34;
130 case FORE200E_AAL5: return ATM_AAL5;
131 }
132
133 return -EINVAL;
134 }
135 #endif
136
137
138 static enum fore200e_aal
139 fore200e_atm2fore_aal(int aal)
140 {
141 switch(aal) {
142 case ATM_AAL0: return FORE200E_AAL0;
143 case ATM_AAL34: return FORE200E_AAL34;
144 case ATM_AAL1:
145 case ATM_AAL2:
146 case ATM_AAL5: return FORE200E_AAL5;
147 }
148
149 return -EINVAL;
150 }
151
152
153 static char*
154 fore200e_irq_itoa(int irq)
155 {
156 #if defined(__sparc_v9__)
157 return __irq_itoa(irq);
158 #else
159 static char str[8];
160 sprintf(str, "%d", irq);
161 return str;
162 #endif
163 }
164
165
166 static void*
167 fore200e_kmalloc(int size, int flags)
168 {
169 void* chunk = kmalloc(size, flags);
170
171 if (chunk)
172 memset(chunk, 0x00, size);
173 else
174 printk(FORE200E "kmalloc() failed, requested size = %d, flags = 0x%x\n", size, flags);
175
176 return chunk;
177 }
178
179
180 static void
181 fore200e_kfree(void* chunk)
182 {
183 kfree(chunk);
184 }
185
186
187 /* allocate and align a chunk of memory intended to hold the data behing exchanged
188 between the driver and the adapter (using streaming DVMA) */
189
190 static int
191 fore200e_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk, int size, int alignment, int direction)
192 {
193 unsigned long offset = 0;
194
195 if (alignment <= sizeof(int))
196 alignment = 0;
197
198 chunk->alloc_size = size + alignment;
199 chunk->align_size = size;
200 chunk->direction = direction;
201
202 chunk->alloc_addr = fore200e_kmalloc(chunk->alloc_size, GFP_KERNEL | GFP_DMA);
203 if (chunk->alloc_addr == NULL)
204 return -ENOMEM;
205
206 if (alignment > 0)
207 offset = FORE200E_ALIGN(chunk->alloc_addr, alignment);
208
209 chunk->align_addr = chunk->alloc_addr + offset;
210
211 chunk->dma_addr = fore200e->bus->dma_map(fore200e, chunk->align_addr, chunk->align_size, direction);
212
213 return 0;
214 }
215
216
217 /* free a chunk of memory */
218
219 static void
220 fore200e_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
221 {
222 fore200e->bus->dma_unmap(fore200e, chunk->dma_addr, chunk->dma_size, chunk->direction);
223
224 fore200e_kfree(chunk->alloc_addr);
225 }
226
227
228
229 #if 0 /* currently unused */
230 static int
231 fore200e_checkup(struct fore200e* fore200e)
232 {
233 u32 hb1, hb2;
234
235 hb1 = fore200e->bus->read(&fore200e->cp_queues->heartbeat);
236 fore200e_spin(10);
237 hb2 = fore200e->bus->read(&fore200e->cp_queues->heartbeat);
238
239 if (hb2 <= hb1) {
240 printk(FORE200E "device %s heartbeat is not counting upwards, hb1 = %x; hb2 = %x\n",
241 fore200e->name, hb1, hb2);
242 return -EIO;
243 }
244 printk(FORE200E "device %s heartbeat is ok\n", fore200e->name);
245
246 return 0;
247 }
248 #endif
249
250
251 static void
252 fore200e_spin(int msecs)
253 {
254 unsigned long timeout = jiffies + MSECS(msecs);
255 while (jiffies < timeout);
256 }
257
258
259 static int
260 fore200e_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs)
261 {
262 unsigned long timeout = jiffies + MSECS(msecs);
263 int ok;
264
265 mb();
266 do {
267 if ((ok = (*addr == val)) || (*addr & STATUS_ERROR))
268 break;
269
270 } while (jiffies < timeout);
271
272 #if 1
273 if (!ok) {
274 printk(FORE200E "cmd polling failed, got status 0x%08x, expected 0x%08x\n",
275 *addr, val);
276 }
277 #endif
278
279 return ok;
280 }
281
282
283 static int
284 fore200e_io_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs)
285 {
286 unsigned long timeout = jiffies + MSECS(msecs);
287 int ok;
288
289 do {
290 if ((ok = (fore200e->bus->read(addr) == val)))
291 break;
292
293 } while (jiffies < timeout);
294
295 #if 1
296 if (!ok) {
297 printk(FORE200E "I/O polling failed, got status 0x%08x, expected 0x%08x\n",
298 fore200e->bus->read(addr), val);
299 }
300 #endif
301
302 return ok;
303 }
304
305
306 static void
307 fore200e_free_rx_buf(struct fore200e* fore200e)
308 {
309 int scheme, magn, nbr;
310 struct buffer* buffer;
311
312 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
313 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
314
315 if ((buffer = fore200e->host_bsq[ scheme ][ magn ].buffer) != NULL) {
316
317 for (nbr = 0; nbr < fore200e_rx_buf_nbr[ scheme ][ magn ]; nbr++) {
318
319 struct chunk* data = &buffer[ nbr ].data;
320
321 if (data->alloc_addr != NULL)
322 fore200e_chunk_free(fore200e, data);
323 }
324 }
325 }
326 }
327 }
328
329
330 static void
331 fore200e_uninit_bs_queue(struct fore200e* fore200e)
332 {
333 int scheme, magn;
334
335 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
336 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
337
338 struct chunk* status = &fore200e->host_bsq[ scheme ][ magn ].status;
339 struct chunk* rbd_block = &fore200e->host_bsq[ scheme ][ magn ].rbd_block;
340
341 if (status->alloc_addr)
342 fore200e->bus->dma_chunk_free(fore200e, status);
343
344 if (rbd_block->alloc_addr)
345 fore200e->bus->dma_chunk_free(fore200e, rbd_block);
346 }
347 }
348 }
349
350
351 static int
352 fore200e_reset(struct fore200e* fore200e, int diag)
353 {
354 int ok;
355
356 fore200e->cp_monitor = (struct cp_monitor*)(fore200e->virt_base + FORE200E_CP_MONITOR_OFFSET);
357
358 fore200e->bus->write(BSTAT_COLD_START, &fore200e->cp_monitor->bstat);
359
360 fore200e->bus->reset(fore200e);
361
362 if (diag) {
363 ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_SELFTEST_OK, 1000);
364 if (ok == 0) {
365
366 printk(FORE200E "device %s self-test failed\n", fore200e->name);
367 return -ENODEV;
368 }
369
370 printk(FORE200E "device %s self-test passed\n", fore200e->name);
371
372 fore200e->state = FORE200E_STATE_RESET;
373 }
374
375 return 0;
376 }
377
378
379 static void
380 fore200e_shutdown(struct fore200e* fore200e)
381 {
382 printk(FORE200E "removing device %s at 0x%lx, IRQ %s\n",
383 fore200e->name, fore200e->phys_base,
384 fore200e_irq_itoa(fore200e->irq));
385
386 if (fore200e->state > FORE200E_STATE_RESET) {
387 /* first, reset the board to prevent further interrupts or data transfers */
388 fore200e_reset(fore200e, 0);
389 }
390
391 /* then, release all allocated resources */
392 switch(fore200e->state) {
393
394 case FORE200E_STATE_COMPLETE:
395 if (fore200e->stats)
396 kfree(fore200e->stats);
397
398 case FORE200E_STATE_IRQ:
399 free_irq(fore200e->irq, fore200e->atm_dev);
400
401 case FORE200E_STATE_ALLOC_BUF:
402 fore200e_free_rx_buf(fore200e);
403
404 case FORE200E_STATE_INIT_BSQ:
405 fore200e_uninit_bs_queue(fore200e);
406
407 case FORE200E_STATE_INIT_RXQ:
408 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.status);
409 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.rpd);
410
411 case FORE200E_STATE_INIT_TXQ:
412 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.status);
413 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.tpd);
414
415 case FORE200E_STATE_INIT_CMDQ:
416 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_cmdq.status);
417
418 case FORE200E_STATE_INITIALIZE:
419 /* nothing to do for that state */
420
421 case FORE200E_STATE_START_FW:
422 /* nothing to do for that state */
423
424 case FORE200E_STATE_LOAD_FW:
425 /* nothing to do for that state */
426
427 case FORE200E_STATE_RESET:
428 /* nothing to do for that state */
429
430 case FORE200E_STATE_MAP:
431 fore200e->bus->unmap(fore200e);
432
433 case FORE200E_STATE_CONFIGURE:
434 /* nothing to do for that state */
435
436 case FORE200E_STATE_REGISTER:
437 /* XXX shouldn't we *start* by deregistering the device? */
438 atm_dev_deregister(fore200e->atm_dev);
439
440 case FORE200E_STATE_BLANK:
441 /* nothing to do for that state */
442 break;
443 }
444 }
445
446
447
448 #ifdef CONFIG_ATM_FORE200E_PCA
449
450 static u32 fore200e_pca_read(volatile u32* addr)
451 {
452 /* on big-endian hosts, the board is configured to convert
453 the endianess of slave RAM accesses */
454 return le32_to_cpu(readl(addr));
455 }
456
457
458 static void fore200e_pca_write(u32 val, volatile u32* addr)
459 {
460 /* on big-endian hosts, the board is configured to convert
461 the endianess of slave RAM accesses */
462 writel(cpu_to_le32(val), addr);
463 }
464
465
466 static u32
467 fore200e_pca_dma_map(struct fore200e* fore200e, void* virt_addr, int size, int direction)
468 {
469 u32 dma_addr = pci_map_single((struct pci_dev*)fore200e->bus_dev, virt_addr, size, direction);
470
471 DPRINTK(3, "PCI DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d, --> dma_addr = 0x%08x\n",
472 virt_addr, size, direction, dma_addr);
473
474 return dma_addr;
475 }
476
477
478 static void
479 fore200e_pca_dma_unmap(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
480 {
481 DPRINTK(3, "PCI DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d\n",
482 dma_addr, size, direction);
483
484 pci_unmap_single((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
485 }
486
487
488 static void
489 fore200e_pca_dma_sync(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
490 {
491 DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
492
493 pci_dma_sync_single((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
494 }
495
496
497 /* allocate a DMA consistent chunk of memory intended to act as a communication mechanism
498 (to hold descriptors, status, queues, etc.) shared by the driver and the adapter */
499
500 static int
501 fore200e_pca_dma_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk,
502 int size, int nbr, int alignment)
503 {
504 #if defined(__sparc_v9__)
505 /* returned chunks are page-aligned */
506 chunk->alloc_addr = pci_alloc_consistent((struct pci_dev*)fore200e->bus_dev,
507 chunk->alloc_size,
508 &chunk->dma_addr);
509
510 if (chunk->alloc_addr == NULL || chunk->dma_addr == 0)
511 return -ENOMEM;
512
513 chunk->align_addr = chunk->alloc_addr;
514 #else
515 if (fore200e_chunk_alloc(fore200e, chunk, size * nbr, alignment, FORE200E_DMA_BIDIRECTIONAL) < 0)
516 return -ENOMEM;
517 #endif
518
519 return 0;
520 }
521
522
523 /* free a DMA consistent chunk of memory */
524
525 static void
526 fore200e_pca_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
527 {
528 #if defined(__sparc_v9__)
529 pci_free_consistent((struct pci_dev*)fore200e->bus_dev,
530 chunk->alloc_size,
531 chunk->alloc_addr,
532 chunk->dma_addr);
533 #else
534 fore200e_chunk_free(fore200e, chunk);
535 #endif
536 }
537
538
539 static int
540 fore200e_pca_irq_check(struct fore200e* fore200e)
541 {
542 /* this is a 1 bit register */
543 return readl(fore200e->regs.pca.psr);
544 }
545
546
547 static void
548 fore200e_pca_irq_ack(struct fore200e* fore200e)
549 {
550 writel(PCA200E_HCR_CLRINTR, fore200e->regs.pca.hcr);
551 }
552
553
554 static void
555 fore200e_pca_reset(struct fore200e* fore200e)
556 {
557 writel(PCA200E_HCR_RESET, fore200e->regs.pca.hcr);
558 fore200e_spin(10);
559 writel(0, fore200e->regs.pca.hcr);
560 }
561
562
563 static int __init
564 fore200e_pca_map(struct fore200e* fore200e)
565 {
566 DPRINTK(2, "device %s being mapped in memory\n", fore200e->name);
567
568 fore200e->virt_base = ioremap(fore200e->phys_base, PCA200E_IOSPACE_LENGTH);
569
570 if (fore200e->virt_base == NULL) {
571 printk(FORE200E "can't map device %s\n", fore200e->name);
572 return -EFAULT;
573 }
574
575 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
576
577 /* gain access to the PCA-200E specific registers */
578 fore200e->regs.pca.hcr = (u32*)(fore200e->virt_base + PCA200E_HCR_OFFSET);
579 fore200e->regs.pca.imr = (u32*)(fore200e->virt_base + PCA200E_IMR_OFFSET);
580 fore200e->regs.pca.psr = (u32*)(fore200e->virt_base + PCA200E_PSR_OFFSET);
581
582 fore200e->state = FORE200E_STATE_MAP;
583 return 0;
584 }
585
586
587 static void
588 fore200e_pca_unmap(struct fore200e* fore200e)
589 {
590 DPRINTK(2, "device %s being unmapped from memory\n", fore200e->name);
591
592 /* XXX iounmap() does nothing on PowerPC (at least in 2.2.12 and 2.3.41),
593 this leads to a kernel panic if the module is loaded and unloaded several times */
594 if (fore200e->virt_base != NULL)
595 iounmap(fore200e->virt_base);
596 }
597
598
599 static int __init
600 fore200e_pca_configure(struct fore200e* fore200e)
601 {
602 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
603 u8 master_ctrl;
604
605 DPRINTK(2, "device %s being configured\n", fore200e->name);
606
607 if ((pci_dev->irq == 0) || (pci_dev->irq == 0xFF)) {
608 printk(FORE200E "incorrect IRQ setting - misconfigured PCI-PCI bridge?\n");
609 return -EIO;
610 }
611
612 pci_read_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, &master_ctrl);
613
614 master_ctrl = master_ctrl
615 #if 0
616 | PCA200E_CTRL_DIS_CACHE_RD
617 | PCA200E_CTRL_DIS_WRT_INVAL
618 #endif
619 #if defined(__BIG_ENDIAN)
620 /* request the PCA board to convert the endianess of slave RAM accesses */
621 | PCA200E_CTRL_CONVERT_ENDIAN
622 #endif
623 | PCA200E_CTRL_LARGE_PCI_BURSTS;
624
625 pci_write_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, master_ctrl);
626
627 fore200e->state = FORE200E_STATE_CONFIGURE;
628 return 0;
629 }
630
631
632 static struct fore200e* __init
633 fore200e_pca_detect(const struct fore200e_bus* bus, int index)
634 {
635 struct fore200e* fore200e;
636 struct pci_dev* pci_dev = NULL;
637 int count = index;
638
639 if (pci_present() == 0) {
640 printk(FORE200E "no PCI subsystem\n");
641 return NULL;
642 }
643
644 do {
645 pci_dev = pci_find_device(PCI_VENDOR_ID_FORE, PCI_DEVICE_ID_FORE_PCA200E, pci_dev);
646 if (pci_dev == NULL)
647 return NULL;
648 } while (count--);
649
650 if (pci_enable_device(pci_dev))
651 return NULL;
652
653 fore200e = fore200e_kmalloc(sizeof(struct fore200e), GFP_KERNEL);
654 if (fore200e == NULL)
655 return NULL;
656
657 fore200e->bus = bus;
658 fore200e->bus_dev = pci_dev;
659 fore200e->irq = pci_dev->irq;
660 fore200e->phys_base = pci_resource_start (pci_dev, 0);
661
662 #if defined(__powerpc__)
663 fore200e->phys_base += KERNELBASE;
664 #endif
665
666 sprintf(fore200e->name, "%s-%d", bus->model_name, index - 1);
667
668 pci_set_master(pci_dev);
669
670 return fore200e;
671 }
672
673
674 static int __init
675 fore200e_pca_prom_read(struct fore200e* fore200e, struct prom_data* prom)
676 {
677 struct host_cmdq* cmdq = &fore200e->host_cmdq;
678 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
679 struct prom_opcode opcode;
680 int ok;
681 u32 prom_dma;
682
683 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
684
685 opcode.opcode = OPCODE_GET_PROM;
686 opcode.pad = 0;
687
688 prom_dma = fore200e->bus->dma_map(fore200e, prom, sizeof(struct prom_data), FORE200E_DMA_FROMDEVICE);
689
690 fore200e->bus->write(prom_dma, &entry->cp_entry->cmd.prom_block.prom_haddr);
691
692 *entry->status = STATUS_PENDING;
693
694 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.prom_block.opcode);
695
696 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
697
698 *entry->status = STATUS_FREE;
699
700 fore200e->bus->dma_unmap(fore200e, prom_dma, sizeof(struct prom_data), FORE200E_DMA_FROMDEVICE);
701
702 if (ok == 0) {
703 printk(FORE200E "unable to get PROM data from device %s\n", fore200e->name);
704 return -EIO;
705 }
706
707 #if defined(__BIG_ENDIAN)
708
709 #define swap_here(addr) (*((u32*)(addr)) = swab32( *((u32*)(addr)) ))
710
711 /* MAC address is stored as little-endian */
712 swap_here(&prom->mac_addr[0]);
713 swap_here(&prom->mac_addr[4]);
714 #endif
715
716 return 0;
717 }
718
719
720 static int
721 fore200e_pca_proc_read(struct fore200e* fore200e, char *page)
722 {
723 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
724
725 return sprintf(page, " PCI bus/slot/function:\t%d/%d/%d\n",
726 pci_dev->bus->number, PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn));
727 }
728
729 #endif /* CONFIG_ATM_FORE200E_PCA */
730
731
732
733
734 #ifdef CONFIG_ATM_FORE200E_SBA
735
736 static u32
737 fore200e_sba_read(volatile u32* addr)
738 {
739 return sbus_readl(addr);
740 }
741
742
743 static void
744 fore200e_sba_write(u32 val, volatile u32* addr)
745 {
746 sbus_writel(val, addr);
747 }
748
749
750 static u32
751 fore200e_sba_dma_map(struct fore200e* fore200e, void* virt_addr, int size, int direction)
752 {
753 u32 dma_addr = sbus_map_single((struct sbus_dev*)fore200e->bus_dev, virt_addr, size, direction);
754
755 DPRINTK(3, "SBUS DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d --> dma_addr = 0x%08x\n",
756 virt_addr, size, direction, dma_addr);
757
758 return dma_addr;
759 }
760
761
762 static void
763 fore200e_sba_dma_unmap(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
764 {
765 DPRINTK(3, "SBUS DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d,\n",
766 dma_addr, size, direction);
767
768 sbus_unmap_single((struct sbus_dev*)fore200e->bus_dev, dma_addr, size, direction);
769 }
770
771
772 static void
773 fore200e_sba_dma_sync(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
774 {
775 DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
776
777 sbus_dma_sync_single((struct sbus_dev*)fore200e->bus_dev, dma_addr, size, direction);
778 }
779
780
781 /* allocate a DVMA consistent chunk of memory intended to act as a communication mechanism
782 (to hold descriptors, status, queues, etc.) shared by the driver and the adapter */
783
784 static int
785 fore200e_sba_dma_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk,
786 int size, int nbr, int alignment)
787 {
788 chunk->alloc_size = chunk->align_size = size * nbr;
789
790 /* returned chunks are page-aligned */
791 chunk->alloc_addr = sbus_alloc_consistent((struct sbus_dev*)fore200e->bus_dev,
792 chunk->alloc_size,
793 &chunk->dma_addr);
794
795 if (chunk->alloc_addr == NULL || chunk->dma_addr == 0)
796 return -ENOMEM;
797
798 chunk->align_addr = chunk->alloc_addr;
799
800 return 0;
801 }
802
803
804 /* free a DVMA consistent chunk of memory */
805
806 static void
807 fore200e_sba_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
808 {
809 sbus_free_consistent((struct sbus_dev*)fore200e->bus_dev,
810 chunk->alloc_size,
811 chunk->alloc_addr,
812 chunk->dma_addr);
813 }
814
815
816 static void
817 fore200e_sba_irq_enable(struct fore200e* fore200e)
818 {
819 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
820 fore200e->bus->write(hcr | SBA200E_HCR_INTR_ENA, fore200e->regs.sba.hcr);
821 }
822
823
824 static int
825 fore200e_sba_irq_check(struct fore200e* fore200e)
826 {
827 return fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_INTR_REQ;
828 }
829
830
831 static void
832 fore200e_sba_irq_ack(struct fore200e* fore200e)
833 {
834 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
835 fore200e->bus->write(hcr | SBA200E_HCR_INTR_CLR, fore200e->regs.sba.hcr);
836 }
837
838
839 static void
840 fore200e_sba_reset(struct fore200e* fore200e)
841 {
842 fore200e->bus->write(SBA200E_HCR_RESET, fore200e->regs.sba.hcr);
843 fore200e_spin(10);
844 fore200e->bus->write(0, fore200e->regs.sba.hcr);
845 }
846
847
848 static int __init
849 fore200e_sba_map(struct fore200e* fore200e)
850 {
851 struct sbus_dev* sbus_dev = (struct sbus_dev*)fore200e->bus_dev;
852 unsigned int bursts;
853
854 /* gain access to the SBA-200E specific registers */
855
856 fore200e->regs.sba.hcr = (u32*)sbus_ioremap(&sbus_dev->resource[0], 0, SBA200E_HCR_LENGTH, "SBA HCR");
857 fore200e->regs.sba.bsr = (u32*)sbus_ioremap(&sbus_dev->resource[1], 0, SBA200E_BSR_LENGTH, "SBA BSR");
858 fore200e->regs.sba.isr = (u32*)sbus_ioremap(&sbus_dev->resource[2], 0, SBA200E_ISR_LENGTH, "SBA ISR");
859 fore200e->virt_base = (u32*)sbus_ioremap(&sbus_dev->resource[3], 0, SBA200E_RAM_LENGTH, "SBA RAM");
860
861 if (fore200e->virt_base == NULL) {
862 printk(FORE200E "unable to map RAM of device %s\n", fore200e->name);
863 return -EFAULT;
864 }
865
866 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
867
868 fore200e->bus->write(0x02, fore200e->regs.sba.isr); /* XXX hardwired interrupt level */
869
870 /* get the supported DVMA burst sizes */
871 bursts = prom_getintdefault(sbus_dev->bus->prom_node, "burst-sizes", 0x00);
872
873 if (sbus_can_dma_64bit(sbus_dev))
874 sbus_set_sbus64(sbus_dev, bursts);
875
876 #if 0
877 if (bursts & DMA_BURST16)
878 fore200e->bus->write(SBA200E_BSR_BURST16, fore200e->regs.sba.bsr);
879 else
880 if (bursts & DMA_BURST8)
881 fore200e->bus->write(SBA200E_BSR_BURST8, fore200e->regs.sba.bsr);
882 else
883 if (bursts & DMA_BURST4)
884 fore200e->bus->write(SBA200E_BSR_BURST4, fore200e->regs.sba.bsr);
885 #endif
886
887 fore200e->state = FORE200E_STATE_MAP;
888 return 0;
889 }
890
891
892 static void
893 fore200e_sba_unmap(struct fore200e* fore200e)
894 {
895 sbus_iounmap((ulong)fore200e->regs.sba.hcr, SBA200E_HCR_LENGTH);
896 sbus_iounmap((ulong)fore200e->regs.sba.bsr, SBA200E_BSR_LENGTH);
897 sbus_iounmap((ulong)fore200e->regs.sba.isr, SBA200E_ISR_LENGTH);
898 sbus_iounmap((ulong)fore200e->virt_base, SBA200E_RAM_LENGTH);
899 }
900
901
902 static int __init
903 fore200e_sba_configure(struct fore200e* fore200e)
904 {
905 fore200e->state = FORE200E_STATE_CONFIGURE;
906 return 0;
907 }
908
909
910 static struct fore200e* __init
911 fore200e_sba_detect(const struct fore200e_bus* bus, int index)
912 {
913 struct fore200e* fore200e;
914 struct sbus_bus* sbus_bus;
915 struct sbus_dev* sbus_dev = NULL;
916
917 unsigned int count = 0;
918
919 for_each_sbus (sbus_bus) {
920 for_each_sbusdev (sbus_dev, sbus_bus) {
921 if (strcmp(sbus_dev->prom_name, SBA200E_PROM_NAME) == 0) {
922 if (count >= index)
923 goto found;
924 count++;
925 }
926 }
927 }
928 return NULL;
929
930 found:
931 #if 1
932 if (sbus_dev->num_registers != 4) {
933 printk(FORE200E "this %s device has %d instead of 4 registers\n",
934 bus->model_name, sbus_dev->num_registers);
935 return NULL;
936 }
937 #endif
938
939 fore200e = fore200e_kmalloc(sizeof(struct fore200e), GFP_KERNEL);
940 if (fore200e == NULL)
941 return NULL;
942
943 fore200e->bus = bus;
944 fore200e->bus_dev = sbus_dev;
945 fore200e->irq = sbus_dev->irqs[ 0 ];
946
947 fore200e->phys_base = (unsigned long)sbus_dev;
948
949 sprintf(fore200e->name, "%s-%d", bus->model_name, index - 1);
950
951 return fore200e;
952 }
953
954
955 static int __init
956 fore200e_sba_prom_read(struct fore200e* fore200e, struct prom_data* prom)
957 {
958 struct sbus_dev* sbus_dev = (struct sbus_dev*) fore200e->bus_dev;
959 int len;
960
961 len = prom_getproperty(sbus_dev->prom_node, "macaddrlo2", &prom->mac_addr[ 4 ], 4);
962 if (len < 0)
963 return -EBUSY;
964
965 len = prom_getproperty(sbus_dev->prom_node, "macaddrhi4", &prom->mac_addr[ 2 ], 4);
966 if (len < 0)
967 return -EBUSY;
968
969 prom_getproperty(sbus_dev->prom_node, "serialnumber",
970 (char*)&prom->serial_number, sizeof(prom->serial_number));
971
972 prom_getproperty(sbus_dev->prom_node, "promversion",
973 (char*)&prom->hw_revision, sizeof(prom->hw_revision));
974
975 return 0;
976 }
977
978
979 static int
980 fore200e_sba_proc_read(struct fore200e* fore200e, char *page)
981 {
982 struct sbus_dev* sbus_dev = (struct sbus_dev*)fore200e->bus_dev;
983
984 return sprintf(page, " SBUS slot/device:\t\t%d/'%s'\n", sbus_dev->slot, sbus_dev->prom_name);
985 }
986 #endif /* CONFIG_ATM_FORE200E_SBA */
987
988
989 static void
990 fore200e_irq_tx(struct fore200e* fore200e)
991 {
992 struct host_txq_entry* entry;
993 int i;
994
995 entry = fore200e->host_txq.host_entry;
996
997 for (i = 0; i < QUEUE_SIZE_TX; i++) {
998
999 if (*entry->status & STATUS_COMPLETE) {
1000
1001 DPRINTK(3, "TX COMPLETED: entry = %p, vcc = %p, skb = %p\n", entry, entry->vcc, entry->skb);
1002
1003 /* free copy of misaligned data */
1004 if (entry->data)
1005 kfree(entry->data);
1006
1007 /* remove DMA mapping */
1008 fore200e->bus->dma_unmap(fore200e, entry->tpd->tsd[ 0 ].buffer, entry->tpd->tsd[ 0 ].length,
1009 FORE200E_DMA_TODEVICE);
1010
1011 /* notify tx completion */
1012 if (entry->vcc->pop)
1013 entry->vcc->pop(entry->vcc, entry->skb);
1014 else
1015 dev_kfree_skb_irq(entry->skb);
1016
1017 /* check error condition */
1018 if (*entry->status & STATUS_ERROR)
1019 atomic_inc(&entry->vcc->stats->tx_err);
1020 else
1021 atomic_inc(&entry->vcc->stats->tx);
1022
1023 *entry->status = STATUS_FREE;
1024
1025 fore200e->host_txq.txing--;
1026 }
1027 entry++;
1028 }
1029 }
1030
1031
1032 static void
1033 fore200e_supply(struct fore200e* fore200e)
1034 {
1035 int scheme, magn, i;
1036
1037 struct host_bsq* bsq;
1038 struct host_bsq_entry* entry;
1039 struct buffer* buffer;
1040
1041 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
1042 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
1043
1044 bsq = &fore200e->host_bsq[ scheme ][ magn ];
1045
1046 if (fore200e_rx_buf_nbr[ scheme ][ magn ] - bsq->count > RBD_BLK_SIZE) {
1047
1048 DPRINTK(2, "supplying rx buffers to queue %d / %d, count = %d\n",
1049 scheme, magn, bsq->count);
1050
1051 entry = &bsq->host_entry[ bsq->head ];
1052
1053 FORE200E_NEXT_ENTRY(bsq->head, QUEUE_SIZE_BS);
1054
1055 for (i = 0; i < RBD_BLK_SIZE; i++) {
1056
1057 buffer = &bsq->buffer[ bsq->free ];
1058
1059 FORE200E_NEXT_ENTRY(bsq->free, fore200e_rx_buf_nbr[ scheme ][ magn ]);
1060
1061 entry->rbd_block->rbd[ i ].buffer_haddr = buffer->data.dma_addr;
1062 entry->rbd_block->rbd[ i ].handle = FORE200E_BUF2HDL(buffer);
1063 }
1064
1065 /* increase the number of supplied rx buffers */
1066 bsq->count += RBD_BLK_SIZE;
1067
1068 *entry->status = STATUS_PENDING;
1069 fore200e->bus->write(entry->rbd_block_dma, &entry->cp_entry->rbd_block_haddr);
1070 }
1071 }
1072 }
1073 }
1074
1075
1076
1077 static struct atm_vcc*
1078 fore200e_find_vcc(struct fore200e* fore200e, struct rpd* rpd)
1079 {
1080 struct atm_vcc* vcc;
1081
1082 for (vcc = fore200e->atm_dev->vccs; vcc; vcc = vcc->next) {
1083
1084 if (vcc->vpi == rpd->atm_header.vpi && vcc->vci == rpd->atm_header.vci)
1085 break;
1086 }
1087
1088 return vcc;
1089 }
1090
1091
1092 static void
1093 fore200e_push_rpd(struct fore200e* fore200e, struct rpd* rpd)
1094 {
1095 struct atm_vcc* vcc;
1096 struct sk_buff* skb;
1097 struct buffer* buffer;
1098 struct fore200e_vcc* fore200e_vcc;
1099 int i, pdu_len = 0;
1100 #ifdef FORE200E_52BYTE_AAL0_SDU
1101 u32 cell_header = 0;
1102 #endif
1103
1104 vcc = fore200e_find_vcc(fore200e, rpd);
1105 if (vcc == NULL) {
1106
1107 printk(FORE200E "no vcc found for PDU received on %d.%d.%d\n",
1108 fore200e->atm_dev->number, rpd->atm_header.vpi, rpd->atm_header.vci);
1109 return;
1110 }
1111
1112 fore200e_vcc = FORE200E_VCC(vcc);
1113
1114 #ifdef FORE200E_52BYTE_AAL0_SDU
1115 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.rxtp.max_sdu == ATM_AAL0_SDU)) {
1116
1117 cell_header = (rpd->atm_header.gfc << ATM_HDR_GFC_SHIFT) |
1118 (rpd->atm_header.vpi << ATM_HDR_VPI_SHIFT) |
1119 (rpd->atm_header.vci << ATM_HDR_VCI_SHIFT) |
1120 (rpd->atm_header.plt << ATM_HDR_PTI_SHIFT) |
1121 rpd->atm_header.clp;
1122 pdu_len = 4;
1123 }
1124 #endif
1125
1126 /* compute total PDU length */
1127 for (i = 0; i < rpd->nseg; i++)
1128 pdu_len += rpd->rsd[ i ].length;
1129
1130 skb = alloc_skb(pdu_len, GFP_ATOMIC);
1131 if (skb == NULL) {
1132
1133 printk(FORE200E "unable to alloc new skb, rx PDU length = %d\n", pdu_len);
1134 atomic_inc(&vcc->stats->rx_drop);
1135 return;
1136 }
1137
1138 skb->stamp = vcc->timestamp = xtime;
1139
1140 #ifdef FORE200E_52BYTE_AAL0_SDU
1141 if (cell_header) {
1142 *((u32*)skb_put(skb, 4)) = cell_header;
1143 }
1144 #endif
1145
1146 /* reassemble segments */
1147 for (i = 0; i < rpd->nseg; i++) {
1148
1149 /* rebuild rx buffer address from rsd handle */
1150 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1151
1152 /* ensure DMA synchronisation */
1153 fore200e->bus->dma_sync(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, FORE200E_DMA_FROMDEVICE);
1154
1155 memcpy(skb_put(skb, rpd->rsd[ i ].length), buffer->data.align_addr, rpd->rsd[ i ].length);
1156 }
1157
1158 DPRINTK(3, "rx skb: len = %d, truesize = %d\n", skb->len, skb->truesize);
1159
1160 if (pdu_len < fore200e_vcc->rx_min_pdu)
1161 fore200e_vcc->rx_min_pdu = pdu_len;
1162 if (pdu_len > fore200e_vcc->rx_max_pdu)
1163 fore200e_vcc->rx_max_pdu = pdu_len;
1164
1165 /* push PDU */
1166 if (atm_charge(vcc, skb->truesize) == 0) {
1167
1168 DPRINTK(2, "receive buffers saturated for %d.%d.%d - PDU dropped\n",
1169 vcc->itf, vcc->vpi, vcc->vci);
1170
1171 dev_kfree_skb_irq(skb);
1172 return;
1173 }
1174
1175 vcc->push(vcc, skb);
1176 atomic_inc(&vcc->stats->rx);
1177 }
1178
1179
1180 static void
1181 fore200e_collect_rpd(struct fore200e* fore200e, struct rpd* rpd)
1182 {
1183 struct buffer* buffer;
1184 int i;
1185
1186 for (i = 0; i < rpd->nseg; i++) {
1187
1188 /* rebuild rx buffer address from rsd handle */
1189 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1190
1191 /* decrease the number of supplied rx buffers */
1192 fore200e->host_bsq[ buffer->scheme ][ buffer->magn ].count--;
1193 }
1194 }
1195
1196
1197 static void
1198 fore200e_irq_rx(struct fore200e* fore200e)
1199 {
1200 struct host_rxq* rxq = &fore200e->host_rxq;
1201 struct host_rxq_entry* entry;
1202
1203 for (;;) {
1204
1205 entry = &rxq->host_entry[ rxq->head ];
1206
1207 /* no more received PDUs */
1208 if ((*entry->status & STATUS_COMPLETE) == 0)
1209 break;
1210
1211 FORE200E_NEXT_ENTRY(rxq->head, QUEUE_SIZE_RX);
1212
1213 if ((*entry->status & STATUS_ERROR) == 0) {
1214
1215 fore200e_push_rpd(fore200e, entry->rpd);
1216 }
1217 else {
1218 printk(FORE200E "damaged PDU on %d.%d.%d\n",
1219 fore200e->atm_dev->number, entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1220 }
1221
1222 fore200e_collect_rpd(fore200e, entry->rpd);
1223
1224 fore200e_supply(fore200e);
1225
1226 /* rewrite the rpd address to ack the received PDU */
1227 fore200e->bus->write(entry->rpd_dma, &entry->cp_entry->rpd_haddr);
1228 *entry->status = STATUS_FREE;
1229 }
1230 }
1231
1232
1233 static void
1234 fore200e_interrupt(int irq, void* dev, struct pt_regs* regs)
1235 {
1236 struct fore200e* fore200e = FORE200E_DEV((struct atm_dev*)dev);
1237
1238 if (fore200e->bus->irq_check(fore200e) == 0) {
1239
1240 DPRINTK(3, "unexpected interrupt on device %c\n", fore200e->name[9]);
1241 return;
1242 }
1243 DPRINTK(3, "valid interrupt on device %c\n", fore200e->name[9]);
1244
1245 tasklet_schedule(&fore200e->tasklet);
1246
1247 fore200e->bus->irq_ack(fore200e);
1248 }
1249
1250
1251 static void
1252 fore200e_tasklet(unsigned long data)
1253 {
1254 struct fore200e* fore200e = (struct fore200e*) data;
1255
1256 fore200e_irq_rx(fore200e);
1257
1258 if (fore200e->host_txq.txing)
1259 fore200e_irq_tx(fore200e);
1260 }
1261
1262
1263
1264 static int
1265 fore200e_select_scheme(struct atm_vcc* vcc)
1266 {
1267 int scheme;
1268
1269 #if 1
1270 /* fairly balance VCs over (identical) buffer schemes */
1271 scheme = vcc->vci % 2 ? BUFFER_SCHEME_ONE : BUFFER_SCHEME_TWO;
1272 #else
1273 /* bit 7 of VPI magically selects the second buffer scheme */
1274 if (vcc->vpi & (1<<7)) {
1275 vcc->vpi &= ((1<<7) - 1); /* reset the magic bit */
1276 scheme = BUFFER_SCHEME_TWO;
1277 }
1278 else {
1279 scheme = BUFFER_SCHEME_ONE;
1280 }
1281 #endif
1282
1283 DPRINTK(1, "vpvc %d.%d.%d uses the %s buffer scheme\n",
1284 vcc->itf, vcc->vpi, vcc->vci, scheme == BUFFER_SCHEME_ONE ? "first" : "second");
1285
1286 return scheme;
1287 }
1288
1289
1290
1291 static int
1292 fore200e_activate_vcin(struct fore200e* fore200e, int activate, struct atm_vcc* vcc, int mtu)
1293 {
1294 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1295 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1296 struct activate_opcode activ_opcode;
1297 struct deactivate_opcode deactiv_opcode;
1298 struct vpvc vpvc;
1299 int ok;
1300 enum fore200e_aal aal = fore200e_atm2fore_aal(vcc->qos.aal);
1301
1302 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1303
1304 if (activate) {
1305 FORE200E_VCC(vcc)->scheme = fore200e_select_scheme(vcc);
1306
1307 activ_opcode.opcode = OPCODE_ACTIVATE_VCIN;
1308 activ_opcode.aal = aal;
1309 activ_opcode.scheme = FORE200E_VCC(vcc)->scheme;
1310 activ_opcode.pad = 0;
1311 }
1312 else {
1313 deactiv_opcode.opcode = OPCODE_DEACTIVATE_VCIN;
1314 deactiv_opcode.pad = 0;
1315 }
1316
1317 vpvc.vci = vcc->vci;
1318 vpvc.vpi = vcc->vpi;
1319
1320 *entry->status = STATUS_PENDING;
1321
1322 if (activate) {
1323
1324 #ifdef FORE200E_52BYTE_AAL0_SDU
1325 mtu = 48;
1326 #endif
1327 /* the MTU is unused by the cp, except in the case of AAL0 */
1328 fore200e->bus->write(mtu, &entry->cp_entry->cmd.activate_block.mtu);
1329 fore200e->bus->write(*(u32*)&vpvc, (u32*)&entry->cp_entry->cmd.activate_block.vpvc);
1330 fore200e->bus->write(*(u32*)&activ_opcode, (u32*)&entry->cp_entry->cmd.activate_block.opcode);
1331 }
1332 else {
1333 fore200e->bus->write(*(u32*)&vpvc, (u32*)&entry->cp_entry->cmd.deactivate_block.vpvc);
1334 fore200e->bus->write(*(u32*)&deactiv_opcode, (u32*)&entry->cp_entry->cmd.deactivate_block.opcode);
1335 }
1336
1337 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1338
1339 *entry->status = STATUS_FREE;
1340
1341 if (ok == 0) {
1342 printk(FORE200E "unable to %s vpvc %d.%d on device %s\n",
1343 activate ? "open" : "close", vcc->vpi, vcc->vci, fore200e->name);
1344 return -EIO;
1345 }
1346
1347 DPRINTK(1, "vpvc %d.%d %sed on device %s\n", vcc->vpi, vcc->vci,
1348 activate ? "open" : "clos", fore200e->name);
1349
1350 return 0;
1351 }
1352
1353
1354 static int
1355 fore200e_walk_vccs(struct atm_vcc *vcc, short *vpi, int *vci)
1356 {
1357 struct atm_vcc* walk;
1358
1359 /* find a free VPI */
1360 if (*vpi == ATM_VPI_ANY) {
1361
1362 for (*vpi = 0, walk = vcc->dev->vccs; walk; walk = walk->next) {
1363
1364 if ((walk->vci == *vci) && (walk->vpi == *vpi)) {
1365 (*vpi)++;
1366 walk = vcc->dev->vccs;
1367 }
1368 }
1369 }
1370
1371 /* find a free VCI */
1372 if (*vci == ATM_VCI_ANY) {
1373
1374 for (*vci = ATM_NOT_RSV_VCI, walk = vcc->dev->vccs; walk; walk = walk->next) {
1375
1376 if ((walk->vpi = *vpi) && (walk->vci == *vci)) {
1377 *vci = walk->vci + 1;
1378 walk = vcc->dev->vccs;
1379 }
1380 }
1381 }
1382
1383 return 0;
1384 }
1385
1386
1387 #define FORE200E_MAX_BACK2BACK_CELLS 255 /* XXX depends on CDVT */
1388
1389 static void
1390 fore200e_rate_ctrl(struct atm_qos* qos, struct tpd_rate* rate)
1391 {
1392 if (qos->txtp.max_pcr < ATM_OC3_PCR) {
1393
1394 /* compute the data cells to idle cells ratio from the PCR */
1395 rate->data_cells = qos->txtp.max_pcr * FORE200E_MAX_BACK2BACK_CELLS / ATM_OC3_PCR;
1396 rate->idle_cells = FORE200E_MAX_BACK2BACK_CELLS - rate->data_cells;
1397 }
1398 else {
1399 /* disable rate control */
1400 rate->data_cells = rate->idle_cells = 0;
1401 }
1402 }
1403
1404
1405 static int
1406 fore200e_open(struct atm_vcc *vcc, short vpi, int vci)
1407 {
1408 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1409 struct fore200e_vcc* fore200e_vcc;
1410
1411 /* find a free VPI/VCI */
1412 fore200e_walk_vccs(vcc, &vpi, &vci);
1413
1414 vcc->vpi = vpi;
1415 vcc->vci = vci;
1416
1417 /* ressource checking only? */
1418 if (vci == ATM_VCI_UNSPEC || vpi == ATM_VPI_UNSPEC)
1419 return 0;
1420
1421 set_bit(ATM_VF_ADDR, &vcc->flags);
1422 vcc->itf = vcc->dev->number;
1423
1424 DPRINTK(2, "opening %d.%d.%d:%d QoS = (tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1425 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d)\n",
1426 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1427 fore200e_traffic_class[ vcc->qos.txtp.traffic_class ],
1428 vcc->qos.txtp.min_pcr, vcc->qos.txtp.max_pcr, vcc->qos.txtp.max_cdv, vcc->qos.txtp.max_sdu,
1429 fore200e_traffic_class[ vcc->qos.rxtp.traffic_class ],
1430 vcc->qos.rxtp.min_pcr, vcc->qos.rxtp.max_pcr, vcc->qos.rxtp.max_cdv, vcc->qos.rxtp.max_sdu);
1431
1432 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1433
1434 down(&fore200e->rate_sf);
1435 if (fore200e->available_cell_rate < vcc->qos.txtp.max_pcr) {
1436 up(&fore200e->rate_sf);
1437 return -EAGAIN;
1438 }
1439 /* reserving the pseudo-CBR bandwidth at this point grants us
1440 to reduce the length of the critical section protected
1441 by 'rate_sf'. in counterpart, we have to reset the available
1442 bandwidth if we later encounter an error */
1443
1444 fore200e->available_cell_rate -= vcc->qos.txtp.max_pcr;
1445 up(&fore200e->rate_sf);
1446 }
1447
1448 fore200e_vcc = fore200e_kmalloc(sizeof(struct fore200e_vcc), GFP_KERNEL);
1449 if (fore200e_vcc == NULL) {
1450 down(&fore200e->rate_sf);
1451 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1452 up(&fore200e->rate_sf);
1453 return -ENOMEM;
1454 }
1455
1456 FORE200E_VCC(vcc) = fore200e_vcc;
1457
1458 if (fore200e_activate_vcin(fore200e, 1, vcc, vcc->qos.rxtp.max_sdu) < 0) {
1459 kfree(fore200e_vcc);
1460 down(&fore200e->rate_sf);
1461 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1462 up(&fore200e->rate_sf);
1463 return -EBUSY;
1464 }
1465
1466 /* compute rate control parameters */
1467 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1468
1469 fore200e_rate_ctrl(&vcc->qos, &fore200e_vcc->rate);
1470
1471 DPRINTK(3, "tx on %d.%d.%d:%d, tx PCR = %d, rx PCR = %d, data_cells = %u, idle_cells = %u\n",
1472 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1473 vcc->qos.txtp.max_pcr, vcc->qos.rxtp.max_pcr,
1474 fore200e_vcc->rate.data_cells, fore200e_vcc->rate.idle_cells);
1475 }
1476
1477 fore200e_vcc->tx_min_pdu = fore200e_vcc->rx_min_pdu = 65536;
1478 fore200e_vcc->tx_max_pdu = fore200e_vcc->rx_max_pdu = 0;
1479
1480 set_bit(ATM_VF_READY, &vcc->flags);
1481 return 0;
1482 }
1483
1484
1485
1486 static void
1487 fore200e_close(struct atm_vcc* vcc)
1488 {
1489 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1490
1491 DPRINTK(2, "closing %d.%d.%d:%d\n", vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal));
1492
1493 fore200e_activate_vcin(fore200e, 0, vcc, 0);
1494
1495 kfree(FORE200E_VCC(vcc));
1496
1497 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1498 down(&fore200e->rate_sf);
1499 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1500 up(&fore200e->rate_sf);
1501 }
1502
1503 clear_bit(ATM_VF_READY, &vcc->flags);
1504 }
1505
1506
1507 #if 0
1508 #define FORE200E_SYNC_SEND /* wait tx completion before returning */
1509 #endif
1510
1511
1512 static int
1513 fore200e_send(struct atm_vcc *vcc, struct sk_buff *skb)
1514 {
1515 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1516 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
1517 struct host_txq* txq = &fore200e->host_txq;
1518 struct host_txq_entry* entry;
1519 struct tpd* tpd;
1520 struct tpd_haddr tpd_haddr;
1521 //unsigned long flags;
1522 int retry = CONFIG_ATM_FORE200E_TX_RETRY;
1523 int tx_copy = 0;
1524 int tx_len = skb->len;
1525 u32* cell_header = NULL;
1526 unsigned char* skb_data;
1527 int skb_len;
1528
1529 #ifdef FORE200E_52BYTE_AAL0_SDU
1530 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.txtp.max_sdu == ATM_AAL0_SDU)) {
1531 cell_header = (u32*) skb->data;
1532 skb_data = skb->data + 4; /* skip 4-byte cell header */
1533 skb_len = tx_len = skb->len - 4;
1534
1535 DPRINTK(3, "skipping user-supplied cell header 0x%08x", *cell_header);
1536 }
1537 else
1538 #endif
1539 {
1540 skb_data = skb->data;
1541 skb_len = skb->len;
1542 }
1543
1544 retry_here:
1545
1546 tasklet_disable(&fore200e->tasklet);
1547
1548 entry = &txq->host_entry[ txq->head ];
1549
1550 if (*entry->status != STATUS_FREE) {
1551
1552 /* try to free completed tx queue entries */
1553 fore200e_irq_tx(fore200e);
1554
1555 if (*entry->status != STATUS_FREE) {
1556
1557 tasklet_enable(&fore200e->tasklet);
1558
1559 /* retry once again? */
1560 if(--retry > 0)
1561 goto retry_here;
1562
1563 atomic_inc(&vcc->stats->tx_err);
1564
1565 printk(FORE200E "tx queue of device %s is saturated, PDU dropped - heartbeat is %08x\n",
1566 fore200e->name, fore200e->cp_queues->heartbeat);
1567 if (vcc->pop)
1568 vcc->pop(vcc, skb);
1569 else
1570 dev_kfree_skb(skb);
1571 return -EIO;
1572 }
1573 }
1574
1575 tpd = entry->tpd;
1576
1577 if (((unsigned long)skb_data) & 0x3) {
1578
1579 DPRINTK(2, "misaligned tx PDU on device %s\n", fore200e->name);
1580 tx_copy = 1;
1581 tx_len = skb_len;
1582 }
1583
1584 if ((vcc->qos.aal == ATM_AAL0) && (skb_len % ATM_CELL_PAYLOAD)) {
1585
1586 /* this simply NUKES the PCA-200E board */
1587 DPRINTK(2, "incomplete tx AAL0 PDU on device %s\n", fore200e->name);
1588 tx_copy = 1;
1589 tx_len = ((skb_len / ATM_CELL_PAYLOAD) + 1) * ATM_CELL_PAYLOAD;
1590 }
1591
1592 if (tx_copy) {
1593
1594 entry->data = kmalloc(tx_len, GFP_ATOMIC | GFP_DMA);
1595 if (entry->data == NULL) {
1596
1597 tasklet_enable(&fore200e->tasklet);
1598 if (vcc->pop)
1599 vcc->pop(vcc, skb);
1600 else
1601 dev_kfree_skb(skb);
1602 return -ENOMEM;
1603 }
1604
1605 memcpy(entry->data, skb_data, skb_len);
1606 if (skb_len < tx_len)
1607 memset(entry->data + skb_len, 0x00, tx_len - skb_len);
1608
1609 tpd->tsd[ 0 ].buffer = fore200e->bus->dma_map(fore200e, entry->data, tx_len, FORE200E_DMA_TODEVICE);
1610 }
1611 else {
1612 entry->data = NULL;
1613 tpd->tsd[ 0 ].buffer = fore200e->bus->dma_map(fore200e, skb_data, tx_len, FORE200E_DMA_TODEVICE);
1614 }
1615
1616 tpd->tsd[ 0 ].length = tx_len;
1617
1618 FORE200E_NEXT_ENTRY(txq->head, QUEUE_SIZE_TX);
1619 txq->txing++;
1620
1621 tasklet_enable(&fore200e->tasklet);
1622
1623 /* ensure DMA synchronisation */
1624 fore200e->bus->dma_sync(fore200e, tpd->tsd[ 0 ].buffer, tpd->tsd[ 0 ].length, FORE200E_DMA_TODEVICE);
1625
1626 DPRINTK(3, "tx on %d.%d.%d:%d, len = %u (%u)\n",
1627 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1628 tpd->tsd[0].length, skb_len);
1629
1630 if (skb_len < fore200e_vcc->tx_min_pdu)
1631 fore200e_vcc->tx_min_pdu = skb_len;
1632 if (skb_len > fore200e_vcc->tx_max_pdu)
1633 fore200e_vcc->tx_max_pdu = skb_len;
1634
1635 entry->vcc = vcc;
1636 entry->skb = skb;
1637
1638 /* set tx rate control information */
1639 tpd->rate.data_cells = fore200e_vcc->rate.data_cells;
1640 tpd->rate.idle_cells = fore200e_vcc->rate.idle_cells;
1641
1642 if (cell_header) {
1643 tpd->atm_header.clp = (*cell_header & ATM_HDR_CLP);
1644 tpd->atm_header.plt = (*cell_header & ATM_HDR_PTI_MASK) >> ATM_HDR_PTI_SHIFT;
1645 tpd->atm_header.vci = (*cell_header & ATM_HDR_VCI_MASK) >> ATM_HDR_VCI_SHIFT;
1646 tpd->atm_header.vpi = (*cell_header & ATM_HDR_VPI_MASK) >> ATM_HDR_VPI_SHIFT;
1647 tpd->atm_header.gfc = (*cell_header & ATM_HDR_GFC_MASK) >> ATM_HDR_GFC_SHIFT;
1648 }
1649 else {
1650 /* set the ATM header, common to all cells conveying the PDU */
1651 tpd->atm_header.clp = 0;
1652 tpd->atm_header.plt = 0;
1653 tpd->atm_header.vci = vcc->vci;
1654 tpd->atm_header.vpi = vcc->vpi;
1655 tpd->atm_header.gfc = 0;
1656 }
1657
1658 tpd->spec.length = tx_len;
1659 tpd->spec.nseg = 1;
1660 tpd->spec.aal = fore200e_atm2fore_aal(vcc->qos.aal);
1661 #ifdef FORE200E_SYNC_SEND
1662 tpd->spec.intr = 0;
1663 #else
1664 tpd->spec.intr = 1;
1665 #endif
1666
1667 tpd_haddr.size = sizeof(struct tpd) / 32; /* size is expressed in 32 byte blocks */
1668 tpd_haddr.pad = 0;
1669 tpd_haddr.haddr = entry->tpd_dma >> 5; /* shift the address, as we are in a bitfield */
1670
1671 *entry->status = STATUS_PENDING;
1672 fore200e->bus->write(*(u32*)&tpd_haddr, (u32*)&entry->cp_entry->tpd_haddr);
1673
1674
1675 #ifdef FORE200E_SYNC_SEND
1676 {
1677 int ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 10);
1678
1679 fore200e->bus->dma_unmap(fore200e, entry->tpd->tsd[ 0 ].buffer, entry->tpd->tsd[ 0 ].length,
1680 FORE200E_DMA_TODEVICE);
1681
1682 /* free tmp copy of misaligned data */
1683 if (entry->data)
1684 kfree(entry->data);
1685
1686 /* notify tx completion */
1687 if (vcc->pop)
1688 vcc->pop(vcc, skb);
1689 else
1690 dev_kfree_skb(skb);
1691
1692 if (ok == 0) {
1693 printk(FORE200E "synchronous tx on %d:%d:%d failed\n", vcc->itf, vcc->vpi, vcc->vci);
1694
1695 atomic_inc(&entry->vcc->stats->tx_err);
1696 return -EIO;
1697 }
1698 atomic_inc(&entry->vcc->stats->tx);
1699
1700 DPRINTK(3, "synchronous tx on %d:%d:%d succeeded\n", vcc->itf, vcc->vpi, vcc->vci);
1701
1702 }
1703 #endif
1704
1705 return 0;
1706 }
1707
1708
1709 static int
1710 fore200e_getstats(struct fore200e* fore200e)
1711 {
1712 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1713 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1714 struct stats_opcode opcode;
1715 int ok;
1716 u32 stats_dma_addr;
1717
1718 if (fore200e->stats == NULL) {
1719 fore200e->stats = fore200e_kmalloc(sizeof(struct stats), GFP_KERNEL | GFP_DMA);
1720 if (fore200e->stats == NULL)
1721 return -ENOMEM;
1722 }
1723
1724 stats_dma_addr = fore200e->bus->dma_map(fore200e, fore200e->stats, sizeof(struct stats), FORE200E_DMA_FROMDEVICE);
1725
1726 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1727
1728 opcode.opcode = OPCODE_GET_STATS;
1729 opcode.pad = 0;
1730
1731 fore200e->bus->write(stats_dma_addr, &entry->cp_entry->cmd.stats_block.stats_haddr);
1732
1733 *entry->status = STATUS_PENDING;
1734
1735 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.stats_block.opcode);
1736
1737 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1738
1739 *entry->status = STATUS_FREE;
1740
1741 fore200e->bus->dma_unmap(fore200e, stats_dma_addr, sizeof(struct stats), FORE200E_DMA_FROMDEVICE);
1742
1743 if (ok == 0) {
1744 printk(FORE200E "unable to get statistics from device %s\n", fore200e->name);
1745 return -EIO;
1746 }
1747
1748 return 0;
1749 }
1750
1751
1752 static int
1753 fore200e_getsockopt (struct atm_vcc* vcc, int level, int optname, void* optval, int optlen)
1754 {
1755 // struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1756
1757 DPRINTK(2, "getsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
1758 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
1759
1760 return -EINVAL;
1761 }
1762
1763
1764 static int
1765 fore200e_setsockopt(struct atm_vcc* vcc, int level, int optname, void* optval, int optlen)
1766 {
1767 // struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1768
1769 DPRINTK(2, "setsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
1770 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
1771
1772 return -EINVAL;
1773 }
1774
1775
1776 #if 0 /* currently unused */
1777 static int
1778 fore200e_get_oc3(struct fore200e* fore200e, struct oc3_regs* regs)
1779 {
1780 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1781 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1782 struct oc3_opcode opcode;
1783 int ok;
1784 u32 oc3_regs_dma_addr;
1785
1786 oc3_regs_dma_addr = fore200e->bus->dma_map(fore200e, regs, sizeof(struct oc3_regs), FORE200E_DMA_FROMDEVICE);
1787
1788 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1789
1790 opcode.opcode = OPCODE_GET_OC3;
1791 opcode.reg = 0;
1792 opcode.value = 0;
1793 opcode.mask = 0;
1794
1795 fore200e->bus->write(oc3_regs_dma_addr, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1796
1797 *entry->status = STATUS_PENDING;
1798
1799 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.oc3_block.opcode);
1800
1801 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1802
1803 *entry->status = STATUS_FREE;
1804
1805 fore200e->bus->dma_unmap(fore200e, oc3_regs_dma_addr, sizeof(struct oc3_regs), FORE200E_DMA_FROMDEVICE);
1806
1807 if (ok == 0) {
1808 printk(FORE200E "unable to get OC-3 regs of device %s\n", fore200e->name);
1809 return -EIO;
1810 }
1811
1812 return 0;
1813 }
1814 #endif
1815
1816
1817 static int
1818 fore200e_set_oc3(struct fore200e* fore200e, u32 reg, u32 value, u32 mask)
1819 {
1820 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1821 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1822 struct oc3_opcode opcode;
1823 int ok;
1824
1825 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1826
1827 opcode.opcode = OPCODE_SET_OC3;
1828 opcode.reg = reg;
1829 opcode.value = value;
1830 opcode.mask = mask;
1831
1832 fore200e->bus->write(0, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1833
1834 *entry->status = STATUS_PENDING;
1835
1836 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.oc3_block.opcode);
1837
1838 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1839
1840 *entry->status = STATUS_FREE;
1841
1842 if (ok == 0) {
1843 printk(FORE200E "unable to set OC-3 reg 0x%02x of device %s\n", reg, fore200e->name);
1844 return -EIO;
1845 }
1846
1847 return 0;
1848 }
1849
1850
1851 static int
1852 fore200e_setloop(struct fore200e* fore200e, int loop_mode)
1853 {
1854 u32 mct_value, mct_mask;
1855 int error;
1856
1857 if (!capable(CAP_NET_ADMIN))
1858 return -EPERM;
1859
1860 switch (loop_mode) {
1861
1862 case ATM_LM_NONE:
1863 mct_value = 0;
1864 mct_mask = SUNI_MCT_DLE | SUNI_MCT_LLE;
1865 break;
1866
1867 case ATM_LM_LOC_PHY:
1868 mct_value = mct_mask = SUNI_MCT_DLE;
1869 break;
1870
1871 case ATM_LM_RMT_PHY:
1872 mct_value = mct_mask = SUNI_MCT_LLE;
1873 break;
1874
1875 default:
1876 return -EINVAL;
1877 }
1878
1879 error = fore200e_set_oc3(fore200e, SUNI_MCT, mct_value, mct_mask);
1880 if ( error == 0)
1881 fore200e->loop_mode = loop_mode;
1882
1883 return error;
1884 }
1885
1886
1887 static inline unsigned int
1888 fore200e_swap(unsigned int in)
1889 {
1890 #if defined(__LITTLE_ENDIAN)
1891 return swab32(in);
1892 #else
1893 return in;
1894 #endif
1895 }
1896
1897
1898 static int
1899 fore200e_fetch_stats(struct fore200e* fore200e, struct sonet_stats* arg)
1900 {
1901 struct sonet_stats tmp;
1902
1903 if (fore200e_getstats(fore200e) < 0)
1904 return -EIO;
1905
1906 tmp.section_bip = fore200e_swap(fore200e->stats->oc3.section_bip8_errors);
1907 tmp.line_bip = fore200e_swap(fore200e->stats->oc3.line_bip24_errors);
1908 tmp.path_bip = fore200e_swap(fore200e->stats->oc3.path_bip8_errors);
1909 tmp.line_febe = fore200e_swap(fore200e->stats->oc3.line_febe_errors);
1910 tmp.path_febe = fore200e_swap(fore200e->stats->oc3.path_febe_errors);
1911 tmp.corr_hcs = fore200e_swap(fore200e->stats->oc3.corr_hcs_errors);
1912 tmp.uncorr_hcs = fore200e_swap(fore200e->stats->oc3.ucorr_hcs_errors);
1913 tmp.tx_cells = fore200e_swap(fore200e->stats->aal0.cells_transmitted) +
1914 fore200e_swap(fore200e->stats->aal34.cells_transmitted) +
1915 fore200e_swap(fore200e->stats->aal5.cells_transmitted);
1916 tmp.rx_cells = fore200e_swap(fore200e->stats->aal0.cells_received) +
1917 fore200e_swap(fore200e->stats->aal34.cells_received) +
1918 fore200e_swap(fore200e->stats->aal5.cells_received);
1919
1920 if (arg)
1921 return copy_to_user(arg, &tmp, sizeof(struct sonet_stats)) ? -EFAULT : 0;
1922
1923 return 0;
1924 }
1925
1926
1927 static int
1928 fore200e_ioctl(struct atm_dev* dev, unsigned int cmd, void* arg)
1929 {
1930 struct fore200e* fore200e = FORE200E_DEV(dev);
1931
1932 DPRINTK(2, "ioctl cmd = 0x%x (%u), arg = 0x%p (%lu)\n", cmd, cmd, arg, (unsigned long)arg);
1933
1934 switch (cmd) {
1935
1936 case SONET_GETSTAT:
1937 return fore200e_fetch_stats(fore200e, (struct sonet_stats*)arg);
1938
1939 case SONET_GETDIAG:
1940 return put_user(0, (int*)arg) ? -EFAULT : 0;
1941
1942 case ATM_SETLOOP:
1943 return fore200e_setloop(fore200e, (int)(unsigned long)arg);
1944
1945 case ATM_GETLOOP:
1946 return put_user(fore200e->loop_mode, (int*)arg) ? -EFAULT : 0;
1947
1948 case ATM_QUERYLOOP:
1949 return put_user(ATM_LM_LOC_PHY | ATM_LM_RMT_PHY, (int*)arg) ? -EFAULT : 0;
1950 }
1951
1952 return -ENOSYS; /* not implemented */
1953 }
1954
1955
1956 static int
1957 fore200e_change_qos(struct atm_vcc* vcc,struct atm_qos* qos, int flags)
1958 {
1959 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
1960 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1961
1962 DPRINTK(2, "change_qos %d.%d.%d, "
1963 "(tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1964 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d), flags = 0x%x\n"
1965 "available_cell_rate = %u",
1966 vcc->itf, vcc->vpi, vcc->vci,
1967 fore200e_traffic_class[ qos->txtp.traffic_class ],
1968 qos->txtp.min_pcr, qos->txtp.max_pcr, qos->txtp.max_cdv, qos->txtp.max_sdu,
1969 fore200e_traffic_class[ qos->rxtp.traffic_class ],
1970 qos->rxtp.min_pcr, qos->rxtp.max_pcr, qos->rxtp.max_cdv, qos->rxtp.max_sdu,
1971 flags, fore200e->available_cell_rate);
1972
1973 if ((qos->txtp.traffic_class == ATM_CBR) && (qos->txtp.max_pcr > 0)) {
1974
1975 down(&fore200e->rate_sf);
1976 if (fore200e->available_cell_rate + vcc->qos.txtp.max_pcr < qos->txtp.max_pcr) {
1977 up(&fore200e->rate_sf);
1978 return -EAGAIN;
1979 }
1980
1981 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1982 fore200e->available_cell_rate -= qos->txtp.max_pcr;
1983 up(&fore200e->rate_sf);
1984
1985 memcpy(&vcc->qos, qos, sizeof(struct atm_qos));
1986
1987 /* update rate control parameters */
1988 fore200e_rate_ctrl(qos, &fore200e_vcc->rate);
1989
1990 set_bit(ATM_VF_HASQOS, &vcc->flags);
1991 return 0;
1992 }
1993
1994 return -EINVAL;
1995 }
1996
1997
1998 static int __init
1999 fore200e_irq_request(struct fore200e* fore200e)
2000 {
2001 if (request_irq(fore200e->irq, fore200e_interrupt, SA_SHIRQ, fore200e->name, fore200e->atm_dev) < 0) {
2002
2003 printk(FORE200E "unable to reserve IRQ %s for device %s\n",
2004 fore200e_irq_itoa(fore200e->irq), fore200e->name);
2005 return -EBUSY;
2006 }
2007
2008 printk(FORE200E "IRQ %s reserved for device %s\n",
2009 fore200e_irq_itoa(fore200e->irq), fore200e->name);
2010
2011 tasklet_init(&fore200e->tasklet, fore200e_tasklet, (unsigned long)fore200e);
2012
2013 fore200e->state = FORE200E_STATE_IRQ;
2014 return 0;
2015 }
2016
2017
2018 static int __init
2019 fore200e_get_esi(struct fore200e* fore200e)
2020 {
2021 struct prom_data* prom = fore200e_kmalloc(sizeof(struct prom_data), GFP_KERNEL | GFP_DMA);
2022 int ok, i;
2023
2024 if (!prom)
2025 return -ENOMEM;
2026 ok = fore200e->bus->prom_read(fore200e, prom);
2027 if (ok < 0) {
2028 fore200e_kfree(prom);
2029 return -EBUSY;
2030 }
2031
2032 printk(FORE200E "device %s, rev. %c, S/N: %d, ESI: %02x:%02x:%02x:%02x:%02x:%02x\n",
2033 fore200e->name,
2034 (prom->hw_revision & 0xFF) + '@', /* probably meaningless with SBA boards */
2035 prom->serial_number & 0xFFFF,
2036 prom->mac_addr[ 2 ], prom->mac_addr[ 3 ], prom->mac_addr[ 4 ],
2037 prom->mac_addr[ 5 ], prom->mac_addr[ 6 ], prom->mac_addr[ 7 ]);
2038
2039 for (i = 0; i < ESI_LEN; i++) {
2040 fore200e->esi[ i ] = fore200e->atm_dev->esi[ i ] = prom->mac_addr[ i + 2 ];
2041 }
2042
2043 fore200e_kfree(prom);
2044
2045 return 0;
2046 }
2047
2048
2049 static int __init
2050 fore200e_alloc_rx_buf(struct fore200e* fore200e)
2051 {
2052 int scheme, magn, nbr, size, i;
2053
2054 struct host_bsq* bsq;
2055 struct buffer* buffer;
2056
2057 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2058 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2059
2060 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2061
2062 nbr = fore200e_rx_buf_nbr[ scheme ][ magn ];
2063 size = fore200e_rx_buf_size[ scheme ][ magn ];
2064
2065 DPRINTK(2, "rx buffers %d / %d are being allocated\n", scheme, magn);
2066
2067 /* allocate the array of receive buffers */
2068 buffer = bsq->buffer = fore200e_kmalloc(nbr * sizeof(struct buffer), GFP_KERNEL);
2069
2070 if (buffer == NULL)
2071 return -ENOMEM;
2072
2073 for (i = 0; i < nbr; i++) {
2074
2075 buffer[ i ].scheme = scheme;
2076 buffer[ i ].magn = magn;
2077
2078 /* allocate the receive buffer body */
2079 if (fore200e_chunk_alloc(fore200e,
2080 &buffer[ i ].data, size, fore200e->bus->buffer_alignment,
2081 FORE200E_DMA_FROMDEVICE) < 0) {
2082
2083 while (i > 0)
2084 fore200e_chunk_free(fore200e, &buffer[ --i ].data);
2085 fore200e_kfree(buffer);
2086
2087 return -ENOMEM;
2088 }
2089 }
2090 /* set next free buffer index */
2091 bsq->free = 0;
2092 }
2093 }
2094
2095 fore200e->state = FORE200E_STATE_ALLOC_BUF;
2096 return 0;
2097 }
2098
2099
2100 static int __init
2101 fore200e_init_bs_queue(struct fore200e* fore200e)
2102 {
2103 int scheme, magn, i;
2104
2105 struct host_bsq* bsq;
2106 struct cp_bsq_entry* cp_entry;
2107
2108 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2109 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2110
2111 DPRINTK(2, "buffer supply queue %d / %d is being initialized\n", scheme, magn);
2112
2113 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2114
2115 /* allocate and align the array of status words */
2116 if (fore200e->bus->dma_chunk_alloc(fore200e,
2117 &bsq->status,
2118 sizeof(enum status),
2119 QUEUE_SIZE_BS,
2120 fore200e->bus->status_alignment) < 0) {
2121 return -ENOMEM;
2122 }
2123
2124 /* allocate and align the array of receive buffer descriptors */
2125 if (fore200e->bus->dma_chunk_alloc(fore200e,
2126 &bsq->rbd_block,
2127 sizeof(struct rbd_block),
2128 QUEUE_SIZE_BS,
2129 fore200e->bus->descr_alignment) < 0) {
2130
2131 fore200e->bus->dma_chunk_free(fore200e, &bsq->status);
2132 return -ENOMEM;
2133 }
2134
2135 /* get the base address of the cp resident buffer supply queue entries */
2136 cp_entry = (struct cp_bsq_entry*)(fore200e->virt_base +
2137 fore200e->bus->read(&fore200e->cp_queues->cp_bsq[ scheme ][ magn ]));
2138
2139 /* fill the host resident and cp resident buffer supply queue entries */
2140 for (i = 0; i < QUEUE_SIZE_BS; i++) {
2141
2142 bsq->host_entry[ i ].status =
2143 FORE200E_INDEX(bsq->status.align_addr, enum status, i);
2144 bsq->host_entry[ i ].rbd_block =
2145 FORE200E_INDEX(bsq->rbd_block.align_addr, struct rbd_block, i);
2146 bsq->host_entry[ i ].rbd_block_dma =
2147 FORE200E_DMA_INDEX(bsq->rbd_block.dma_addr, struct rbd_block, i);
2148 bsq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2149
2150 *bsq->host_entry[ i ].status = STATUS_FREE;
2151
2152 fore200e->bus->write(FORE200E_DMA_INDEX(bsq->status.dma_addr, enum status, i),
2153 &cp_entry[ i ].status_haddr);
2154 }
2155 }
2156 }
2157
2158 fore200e->state = FORE200E_STATE_INIT_BSQ;
2159 return 0;
2160 }
2161
2162
2163 static int __init
2164 fore200e_init_rx_queue(struct fore200e* fore200e)
2165 {
2166 struct host_rxq* rxq = &fore200e->host_rxq;
2167 struct cp_rxq_entry* cp_entry;
2168 int i;
2169
2170 DPRINTK(2, "receive queue is being initialized\n");
2171
2172 /* allocate and align the array of status words */
2173 if (fore200e->bus->dma_chunk_alloc(fore200e,
2174 &rxq->status,
2175 sizeof(enum status),
2176 QUEUE_SIZE_RX,
2177 fore200e->bus->status_alignment) < 0) {
2178 return -ENOMEM;
2179 }
2180
2181 /* allocate and align the array of receive PDU descriptors */
2182 if (fore200e->bus->dma_chunk_alloc(fore200e,
2183 &rxq->rpd,
2184 sizeof(struct rpd),
2185 QUEUE_SIZE_RX,
2186 fore200e->bus->descr_alignment) < 0) {
2187
2188 fore200e->bus->dma_chunk_free(fore200e, &rxq->status);
2189 return -ENOMEM;
2190 }
2191
2192 /* get the base address of the cp resident rx queue entries */
2193 cp_entry = (struct cp_rxq_entry*)(fore200e->virt_base +
2194 fore200e->bus->read(&fore200e->cp_queues->cp_rxq));
2195
2196 /* fill the host resident and cp resident rx entries */
2197 for (i=0; i < QUEUE_SIZE_RX; i++) {
2198
2199 rxq->host_entry[ i ].status =
2200 FORE200E_INDEX(rxq->status.align_addr, enum status, i);
2201 rxq->host_entry[ i ].rpd =
2202 FORE200E_INDEX(rxq->rpd.align_addr, struct rpd, i);
2203 rxq->host_entry[ i ].rpd_dma =
2204 FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i);
2205 rxq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2206
2207 *rxq->host_entry[ i ].status = STATUS_FREE;
2208
2209 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->status.dma_addr, enum status, i),
2210 &cp_entry[ i ].status_haddr);
2211
2212 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i),
2213 &cp_entry[ i ].rpd_haddr);
2214 }
2215
2216 /* set the head entry of the queue */
2217 rxq->head = 0;
2218
2219 fore200e->state = FORE200E_STATE_INIT_RXQ;
2220 return 0;
2221 }
2222
2223
2224 static int __init
2225 fore200e_init_tx_queue(struct fore200e* fore200e)
2226 {
2227 struct host_txq* txq = &fore200e->host_txq;
2228 struct cp_txq_entry* cp_entry;
2229 int i;
2230
2231 DPRINTK(2, "transmit queue is being initialized\n");
2232
2233 /* allocate and align the array of status words */
2234 if (fore200e->bus->dma_chunk_alloc(fore200e,
2235 &txq->status,
2236 sizeof(enum status),
2237 QUEUE_SIZE_TX,
2238 fore200e->bus->status_alignment) < 0) {
2239 return -ENOMEM;
2240 }
2241
2242 /* allocate and align the array of transmit PDU descriptors */
2243 if (fore200e->bus->dma_chunk_alloc(fore200e,
2244 &txq->tpd,
2245 sizeof(struct tpd),
2246 QUEUE_SIZE_TX,
2247 fore200e->bus->descr_alignment) < 0) {
2248
2249 fore200e->bus->dma_chunk_free(fore200e, &txq->status);
2250 return -ENOMEM;
2251 }
2252
2253 /* get the base address of the cp resident tx queue entries */
2254 cp_entry = (struct cp_txq_entry*)(fore200e->virt_base +
2255 fore200e->bus->read(&fore200e->cp_queues->cp_txq));
2256
2257 /* fill the host resident and cp resident tx entries */
2258 for (i=0; i < QUEUE_SIZE_TX; i++) {
2259
2260 txq->host_entry[ i ].status =
2261 FORE200E_INDEX(txq->status.align_addr, enum status, i);
2262 txq->host_entry[ i ].tpd =
2263 FORE200E_INDEX(txq->tpd.align_addr, struct tpd, i);
2264 txq->host_entry[ i ].tpd_dma =
2265 FORE200E_DMA_INDEX(txq->tpd.dma_addr, struct tpd, i);
2266 txq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2267
2268 *txq->host_entry[ i ].status = STATUS_FREE;
2269
2270 fore200e->bus->write(FORE200E_DMA_INDEX(txq->status.dma_addr, enum status, i),
2271 &cp_entry[ i ].status_haddr);
2272
2273 /* although there is a one-to-one mapping of tx queue entries and tpds,
2274 we do not write here the DMA (physical) base address of each tpd into
2275 the related cp resident entry, because the cp relies on this write
2276 operation to detect that a new pdu has been submitted for tx */
2277 }
2278
2279 /* set the head entry of the queue */
2280 txq->head = 0;
2281
2282 fore200e->state = FORE200E_STATE_INIT_TXQ;
2283 return 0;
2284 }
2285
2286
2287 static int __init
2288 fore200e_init_cmd_queue(struct fore200e* fore200e)
2289 {
2290 struct host_cmdq* cmdq = &fore200e->host_cmdq;
2291 struct cp_cmdq_entry* cp_entry;
2292 int i;
2293
2294 DPRINTK(2, "command queue is being initialized\n");
2295
2296 /* allocate and align the array of status words */
2297 if (fore200e->bus->dma_chunk_alloc(fore200e,
2298 &cmdq->status,
2299 sizeof(enum status),
2300 QUEUE_SIZE_CMD,
2301 fore200e->bus->status_alignment) < 0) {
2302 return -ENOMEM;
2303 }
2304
2305 /* get the base address of the cp resident cmd queue entries */
2306 cp_entry = (struct cp_cmdq_entry*)(fore200e->virt_base +
2307 fore200e->bus->read(&fore200e->cp_queues->cp_cmdq));
2308
2309 /* fill the host resident and cp resident cmd entries */
2310 for (i=0; i < QUEUE_SIZE_CMD; i++) {
2311
2312 cmdq->host_entry[ i ].status =
2313 FORE200E_INDEX(cmdq->status.align_addr, enum status, i);
2314 cmdq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2315
2316 *cmdq->host_entry[ i ].status = STATUS_FREE;
2317
2318 fore200e->bus->write(FORE200E_DMA_INDEX(cmdq->status.dma_addr, enum status, i),
2319 &cp_entry[ i ].status_haddr);
2320 }
2321
2322 /* set the head entry of the queue */
2323 cmdq->head = 0;
2324
2325 fore200e->state = FORE200E_STATE_INIT_CMDQ;
2326 return 0;
2327 }
2328
2329
2330 static void __init
2331 fore200e_param_bs_queue(struct fore200e* fore200e,
2332 enum buffer_scheme scheme, enum buffer_magn magn,
2333 int queue_length, int pool_size, int supply_blksize)
2334 {
2335 struct bs_spec* bs_spec = &fore200e->cp_queues->init.bs_spec[ scheme ][ magn ];
2336
2337 /* dumb value; the firmware doesn't allow us to activate a VC while
2338 selecting a buffer scheme with zero-sized rbd pools */
2339
2340 if (pool_size == 0)
2341 pool_size = 64;
2342
2343 fore200e->bus->write(queue_length, &bs_spec->queue_length);
2344 fore200e->bus->write(fore200e_rx_buf_size[ scheme ][ magn ], &bs_spec->buffer_size);
2345 fore200e->bus->write(pool_size, &bs_spec->pool_size);
2346 fore200e->bus->write(supply_blksize, &bs_spec->supply_blksize);
2347 }
2348
2349
2350 static int __init
2351 fore200e_initialize(struct fore200e* fore200e)
2352 {
2353 struct cp_queues* cpq;
2354 int ok, scheme, magn;
2355
2356 DPRINTK(2, "device %s being initialized\n", fore200e->name);
2357
2358 init_MUTEX(&fore200e->rate_sf);
2359
2360 cpq = fore200e->cp_queues = (struct cp_queues*) (fore200e->virt_base + FORE200E_CP_QUEUES_OFFSET);
2361
2362 /* enable cp to host interrupts */
2363 fore200e->bus->write(1, &cpq->imask);
2364
2365 if (fore200e->bus->irq_enable)
2366 fore200e->bus->irq_enable(fore200e);
2367
2368 fore200e->bus->write(NBR_CONNECT, &cpq->init.num_connect);
2369
2370 fore200e->bus->write(QUEUE_SIZE_CMD, &cpq->init.cmd_queue_len);
2371 fore200e->bus->write(QUEUE_SIZE_RX, &cpq->init.rx_queue_len);
2372 fore200e->bus->write(QUEUE_SIZE_TX, &cpq->init.tx_queue_len);
2373
2374 fore200e->bus->write(RSD_EXTENSION, &cpq->init.rsd_extension);
2375 fore200e->bus->write(TSD_EXTENSION, &cpq->init.tsd_extension);
2376
2377 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++)
2378 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++)
2379 fore200e_param_bs_queue(fore200e, scheme, magn,
2380 QUEUE_SIZE_BS,
2381 fore200e_rx_buf_nbr[ scheme ][ magn ],
2382 RBD_BLK_SIZE);
2383
2384 /* issue the initialize command */
2385 fore200e->bus->write(STATUS_PENDING, &cpq->init.status);
2386 fore200e->bus->write(OPCODE_INITIALIZE, &cpq->init.opcode);
2387
2388 ok = fore200e_io_poll(fore200e, &cpq->init.status, STATUS_COMPLETE, 3000);
2389 if (ok == 0) {
2390 printk(FORE200E "device %s initialization failed\n", fore200e->name);
2391 return -ENODEV;
2392 }
2393
2394 printk(FORE200E "device %s initialized\n", fore200e->name);
2395
2396 fore200e->state = FORE200E_STATE_INITIALIZE;
2397 return 0;
2398 }
2399
2400
2401 static void __init
2402 fore200e_monitor_putc(struct fore200e* fore200e, char c)
2403 {
2404 struct cp_monitor* monitor = fore200e->cp_monitor;
2405
2406 #if 0
2407 printk("%c", c);
2408 #endif
2409 fore200e->bus->write(((u32) c) | FORE200E_CP_MONITOR_UART_AVAIL, &monitor->soft_uart.send);
2410 }
2411
2412
2413 static int __init
2414 fore200e_monitor_getc(struct fore200e* fore200e)
2415 {
2416 struct cp_monitor* monitor = fore200e->cp_monitor;
2417 unsigned long timeout = jiffies + MSECS(50);
2418 int c;
2419
2420 while (jiffies < timeout) {
2421
2422 c = (int) fore200e->bus->read(&monitor->soft_uart.recv);
2423
2424 if (c & FORE200E_CP_MONITOR_UART_AVAIL) {
2425
2426 fore200e->bus->write(FORE200E_CP_MONITOR_UART_FREE, &monitor->soft_uart.recv);
2427 #if 0
2428 printk("%c", c & 0xFF);
2429 #endif
2430 return c & 0xFF;
2431 }
2432 }
2433
2434 return -1;
2435 }
2436
2437
2438 static void __init
2439 fore200e_monitor_puts(struct fore200e* fore200e, char* str)
2440 {
2441 while(*str) {
2442
2443 /* the i960 monitor doesn't accept any new character if it has something to say */
2444 while (fore200e_monitor_getc(fore200e) >= 0);
2445
2446 fore200e_monitor_putc(fore200e, *str++);
2447 }
2448
2449 while (fore200e_monitor_getc(fore200e) >= 0);
2450 }
2451
2452
2453 static int __init
2454 fore200e_start_fw(struct fore200e* fore200e)
2455 {
2456 int ok;
2457 char cmd[ 48 ];
2458 struct fw_header* fw_header = (struct fw_header*) fore200e->bus->fw_data;
2459
2460 DPRINTK(2, "device %s firmware being started\n", fore200e->name);
2461
2462 sprintf(cmd, "\rgo %x\r", le32_to_cpu(fw_header->start_offset));
2463
2464 fore200e_monitor_puts(fore200e, cmd);
2465
2466 ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_CP_RUNNING, 1000);
2467 if (ok == 0) {
2468 printk(FORE200E "device %s firmware didn't start\n", fore200e->name);
2469 return -ENODEV;
2470 }
2471
2472 printk(FORE200E "device %s firmware started\n", fore200e->name);
2473
2474 fore200e->state = FORE200E_STATE_START_FW;
2475 return 0;
2476 }
2477
2478
2479 static int __init
2480 fore200e_load_fw(struct fore200e* fore200e)
2481 {
2482 u32* fw_data = (u32*) fore200e->bus->fw_data;
2483 u32 fw_size = (u32) *fore200e->bus->fw_size / sizeof(u32);
2484
2485 struct fw_header* fw_header = (struct fw_header*) fw_data;
2486
2487 u32* load_addr = fore200e->virt_base + le32_to_cpu(fw_header->load_offset);
2488
2489 DPRINTK(2, "device %s firmware being loaded at 0x%p (%d words)\n",
2490 fore200e->name, load_addr, fw_size);
2491
2492 #if 1
2493 if (le32_to_cpu(fw_header->magic) != FW_HEADER_MAGIC) {
2494 printk(FORE200E "corrupted %s firmware image\n", fore200e->bus->model_name);
2495 return -ENODEV;
2496 }
2497 #endif
2498
2499 for (; fw_size--; fw_data++, load_addr++)
2500 fore200e->bus->write(le32_to_cpu(*fw_data), load_addr);
2501
2502 fore200e->state = FORE200E_STATE_LOAD_FW;
2503 return 0;
2504 }
2505
2506
2507 static int __init
2508 fore200e_register(struct fore200e* fore200e)
2509 {
2510 struct atm_dev* atm_dev;
2511
2512 DPRINTK(2, "device %s being registered\n", fore200e->name);
2513
2514 atm_dev = atm_dev_register(fore200e->bus->proc_name, &fore200e_ops, -1,
2515 NULL);
2516 if (atm_dev == NULL) {
2517 printk(FORE200E "unable to register device %s\n", fore200e->name);
2518 return -ENODEV;
2519 }
2520
2521 FORE200E_DEV(atm_dev) = fore200e;
2522 fore200e->atm_dev = atm_dev;
2523
2524 atm_dev->ci_range.vpi_bits = 8;
2525 atm_dev->ci_range.vci_bits = 10;
2526
2527 fore200e->available_cell_rate = ATM_OC3_PCR;
2528
2529 fore200e->state = FORE200E_STATE_REGISTER;
2530 return 0;
2531 }
2532
2533
2534 static int __init
2535 fore200e_init(struct fore200e* fore200e)
2536 {
2537 if (fore200e_register(fore200e) < 0)
2538 return -ENODEV;
2539
2540 if (fore200e->bus->configure(fore200e) < 0)
2541 return -ENODEV;
2542
2543 if (fore200e->bus->map(fore200e) < 0)
2544 return -ENODEV;
2545
2546 if (fore200e_reset(fore200e, 1) < 0)
2547 return -ENODEV;
2548
2549 if (fore200e_load_fw(fore200e) < 0)
2550 return -ENODEV;
2551
2552 if (fore200e_start_fw(fore200e) < 0)
2553 return -ENODEV;
2554
2555 if (fore200e_initialize(fore200e) < 0)
2556 return -ENODEV;
2557
2558 if (fore200e_init_cmd_queue(fore200e) < 0)
2559 return -ENOMEM;
2560
2561 if (fore200e_init_tx_queue(fore200e) < 0)
2562 return -ENOMEM;
2563
2564 if (fore200e_init_rx_queue(fore200e) < 0)
2565 return -ENOMEM;
2566
2567 if (fore200e_init_bs_queue(fore200e) < 0)
2568 return -ENOMEM;
2569
2570 if (fore200e_alloc_rx_buf(fore200e) < 0)
2571 return -ENOMEM;
2572
2573 if (fore200e_get_esi(fore200e) < 0)
2574 return -EIO;
2575
2576 if (fore200e_irq_request(fore200e) < 0)
2577 return -EBUSY;
2578
2579 fore200e_supply(fore200e);
2580
2581 /* all done, board initialization is now complete */
2582 fore200e->state = FORE200E_STATE_COMPLETE;
2583 return 0;
2584 }
2585
2586
2587 int __init
2588 fore200e_detect(void)
2589 {
2590 const struct fore200e_bus* bus;
2591 struct fore200e* fore200e;
2592 int index, link;
2593
2594 printk(FORE200E "FORE Systems 200E-series driver - version " FORE200E_VERSION "\n");
2595
2596 /* for each configured bus interface */
2597 for (link = 0, bus = fore200e_bus; bus->model_name; bus++) {
2598
2599 /* detect all boards present on that bus */
2600 for (index = 0; (fore200e = bus->detect(bus, index)); index++) {
2601
2602 printk(FORE200E "device %s found at 0x%lx, IRQ %s\n",
2603 fore200e->bus->model_name,
2604 fore200e->phys_base, fore200e_irq_itoa(fore200e->irq));
2605
2606 sprintf(fore200e->name, "%s-%d", bus->model_name, index);
2607
2608 if (fore200e_init(fore200e) < 0) {
2609
2610 fore200e_shutdown(fore200e);
2611 break;
2612 }
2613
2614 link++;
2615
2616 fore200e->next = fore200e_boards;
2617 fore200e_boards = fore200e;
2618 }
2619 }
2620
2621 return link;
2622 }
2623
2624
2625 #ifdef MODULE
2626 static void
2627 fore200e_cleanup(struct fore200e** head)
2628 {
2629 struct fore200e* fore200e = *head;
2630
2631 fore200e_shutdown(fore200e);
2632
2633 *head = fore200e->next;
2634
2635 kfree(fore200e);
2636 }
2637 #endif
2638
2639
2640 static int
2641 fore200e_proc_read(struct atm_dev *dev,loff_t* pos,char* page)
2642 {
2643 struct fore200e* fore200e = FORE200E_DEV(dev);
2644 int len, left = *pos;
2645
2646 if (!left--) {
2647
2648 if (fore200e_getstats(fore200e) < 0)
2649 return -EIO;
2650
2651 len = sprintf(page,"\n"
2652 " device:\n"
2653 " internal name:\t\t%s\n", fore200e->name);
2654
2655 /* print bus-specific information */
2656 if (fore200e->bus->proc_read)
2657 len += fore200e->bus->proc_read(fore200e, page + len);
2658
2659 len += sprintf(page + len,
2660 " interrupt line:\t\t%s\n"
2661 " physical base address:\t0x%p\n"
2662 " virtual base address:\t0x%p\n"
2663 " factory address (ESI):\t%02x:%02x:%02x:%02x:%02x:%02x\n"
2664 " board serial number:\t\t%d\n\n",
2665 fore200e_irq_itoa(fore200e->irq),
2666 (void*)fore200e->phys_base,
2667 (void*)fore200e->virt_base,
2668 fore200e->esi[0], fore200e->esi[1], fore200e->esi[2],
2669 fore200e->esi[3], fore200e->esi[4], fore200e->esi[5],
2670 fore200e->esi[4] * 256 + fore200e->esi[5]);
2671
2672 return len;
2673 }
2674
2675 if (!left--)
2676 return sprintf(page,
2677 " supplied small bufs (1):\t%d\n"
2678 " supplied large bufs (1):\t%d\n"
2679 " supplied small bufs (2):\t%d\n"
2680 " supplied large bufs (2):\t%d\n",
2681 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_SMALL ].count,
2682 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_LARGE ].count,
2683 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_SMALL ].count,
2684 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_LARGE ].count);
2685 if (!left--) {
2686 u32 hb = fore200e->bus->read(&fore200e->cp_queues->heartbeat);
2687
2688 len = sprintf(page,"\n\n"
2689 " cell processor:\n"
2690 " heartbeat state:\t\t");
2691
2692 if (hb >> 16 != 0xDEAD)
2693 len += sprintf(page + len, "0x%08x\n", hb);
2694 else
2695 len += sprintf(page + len, "*** FATAL ERROR %04x ***\n", hb & 0xFFFF);
2696
2697 return len;
2698 }
2699
2700 if (!left--) {
2701 static const char* media_name[] = {
2702 "unshielded twisted pair",
2703 "multimode optical fiber ST",
2704 "multimode optical fiber SC",
2705 "single-mode optical fiber ST",
2706 "single-mode optical fiber SC",
2707 "unknown"
2708 };
2709
2710 static const char* oc3_mode[] = {
2711 "normal operation",
2712 "diagnostic loopback",
2713 "line loopback",
2714 "unknown"
2715 };
2716
2717 u32 fw_release = fore200e->bus->read(&fore200e->cp_queues->fw_release);
2718 u32 mon960_release = fore200e->bus->read(&fore200e->cp_queues->mon960_release);
2719 u32 oc3_revision = fore200e->bus->read(&fore200e->cp_queues->oc3_revision);
2720 u32 media_index = FORE200E_MEDIA_INDEX(fore200e->bus->read(&fore200e->cp_queues->media_type));
2721 u32 oc3_index;
2722
2723 if (media_index < 0 || media_index > 4)
2724 media_index = 5;
2725
2726 switch (fore200e->loop_mode) {
2727 case ATM_LM_NONE: oc3_index = 0;
2728 break;
2729 case ATM_LM_LOC_PHY: oc3_index = 1;
2730 break;
2731 case ATM_LM_RMT_PHY: oc3_index = 2;
2732 break;
2733 default: oc3_index = 3;
2734 }
2735
2736 return sprintf(page,
2737 " firmware release:\t\t%d.%d.%d\n"
2738 " monitor release:\t\t%d.%d\n"
2739 " media type:\t\t\t%s\n"
2740 " OC-3 revision:\t\t0x%x\n"
2741 " OC-3 mode:\t\t\t%s",
2742 fw_release >> 16, fw_release << 16 >> 24, fw_release << 24 >> 24,
2743 mon960_release >> 16, mon960_release << 16 >> 16,
2744 media_name[ media_index ],
2745 oc3_revision,
2746 oc3_mode[ oc3_index ]);
2747 }
2748
2749 if (!left--) {
2750 struct cp_monitor* cp_monitor = fore200e->cp_monitor;
2751
2752 return sprintf(page,
2753 "\n\n"
2754 " monitor:\n"
2755 " version number:\t\t%d\n"
2756 " boot status word:\t\t0x%08x\n",
2757 fore200e->bus->read(&cp_monitor->mon_version),
2758 fore200e->bus->read(&cp_monitor->bstat));
2759 }
2760
2761 if (!left--)
2762 return sprintf(page,
2763 "\n"
2764 " device statistics:\n"
2765 " 4b5b:\n"
2766 " crc_header_errors:\t\t%10u\n"
2767 " framing_errors:\t\t%10u\n",
2768 fore200e_swap(fore200e->stats->phy.crc_header_errors),
2769 fore200e_swap(fore200e->stats->phy.framing_errors));
2770
2771 if (!left--)
2772 return sprintf(page, "\n"
2773 " OC-3:\n"
2774 " section_bip8_errors:\t%10u\n"
2775 " path_bip8_errors:\t\t%10u\n"
2776 " line_bip24_errors:\t\t%10u\n"
2777 " line_febe_errors:\t\t%10u\n"
2778 " path_febe_errors:\t\t%10u\n"
2779 " corr_hcs_errors:\t\t%10u\n"
2780 " ucorr_hcs_errors:\t\t%10u\n",
2781 fore200e_swap(fore200e->stats->oc3.section_bip8_errors),
2782 fore200e_swap(fore200e->stats->oc3.path_bip8_errors),
2783 fore200e_swap(fore200e->stats->oc3.line_bip24_errors),
2784 fore200e_swap(fore200e->stats->oc3.line_febe_errors),
2785 fore200e_swap(fore200e->stats->oc3.path_febe_errors),
2786 fore200e_swap(fore200e->stats->oc3.corr_hcs_errors),
2787 fore200e_swap(fore200e->stats->oc3.ucorr_hcs_errors));
2788
2789 if (!left--)
2790 return sprintf(page,"\n"
2791 " ATM:\t\t\t\t cells\n"
2792 " TX:\t\t\t%10u\n"
2793 " RX:\t\t\t%10u\n"
2794 " vpi out of range:\t\t%10u\n"
2795 " vpi no conn:\t\t%10u\n"
2796 " vci out of range:\t\t%10u\n"
2797 " vci no conn:\t\t%10u\n",
2798 fore200e_swap(fore200e->stats->atm.cells_transmitted),
2799 fore200e_swap(fore200e->stats->atm.cells_received),
2800 fore200e_swap(fore200e->stats->atm.vpi_bad_range),
2801 fore200e_swap(fore200e->stats->atm.vpi_no_conn),
2802 fore200e_swap(fore200e->stats->atm.vci_bad_range),
2803 fore200e_swap(fore200e->stats->atm.vci_no_conn));
2804
2805 if (!left--)
2806 return sprintf(page,"\n"
2807 " AAL0:\t\t\t cells\n"
2808 " TX:\t\t\t%10u\n"
2809 " RX:\t\t\t%10u\n"
2810 " dropped:\t\t\t%10u\n",
2811 fore200e_swap(fore200e->stats->aal0.cells_transmitted),
2812 fore200e_swap(fore200e->stats->aal0.cells_received),
2813 fore200e_swap(fore200e->stats->aal0.cells_dropped));
2814
2815 if (!left--)
2816 return sprintf(page,"\n"
2817 " AAL3/4:\n"
2818 " SAR sublayer:\t\t cells\n"
2819 " TX:\t\t\t%10u\n"
2820 " RX:\t\t\t%10u\n"
2821 " dropped:\t\t\t%10u\n"
2822 " CRC errors:\t\t%10u\n"
2823 " protocol errors:\t\t%10u\n\n"
2824 " CS sublayer:\t\t PDUs\n"
2825 " TX:\t\t\t%10u\n"
2826 " RX:\t\t\t%10u\n"
2827 " dropped:\t\t\t%10u\n"
2828 " protocol errors:\t\t%10u\n",
2829 fore200e_swap(fore200e->stats->aal34.cells_transmitted),
2830 fore200e_swap(fore200e->stats->aal34.cells_received),
2831 fore200e_swap(fore200e->stats->aal34.cells_dropped),
2832 fore200e_swap(fore200e->stats->aal34.cells_crc_errors),
2833 fore200e_swap(fore200e->stats->aal34.cells_protocol_errors),
2834 fore200e_swap(fore200e->stats->aal34.cspdus_transmitted),
2835 fore200e_swap(fore200e->stats->aal34.cspdus_received),
2836 fore200e_swap(fore200e->stats->aal34.cspdus_dropped),
2837 fore200e_swap(fore200e->stats->aal34.cspdus_protocol_errors));
2838
2839 if (!left--)
2840 return sprintf(page,"\n"
2841 " AAL5:\n"
2842 " SAR sublayer:\t\t cells\n"
2843 " TX:\t\t\t%10u\n"
2844 " RX:\t\t\t%10u\n"
2845 " dropped:\t\t\t%10u\n"
2846 " congestions:\t\t%10u\n\n"
2847 " CS sublayer:\t\t PDUs\n"
2848 " TX:\t\t\t%10u\n"
2849 " RX:\t\t\t%10u\n"
2850 " dropped:\t\t\t%10u\n"
2851 " CRC errors:\t\t%10u\n"
2852 " protocol errors:\t\t%10u\n",
2853 fore200e_swap(fore200e->stats->aal5.cells_transmitted),
2854 fore200e_swap(fore200e->stats->aal5.cells_received),
2855 fore200e_swap(fore200e->stats->aal5.cells_dropped),
2856 fore200e_swap(fore200e->stats->aal5.congestion_experienced),
2857 fore200e_swap(fore200e->stats->aal5.cspdus_transmitted),
2858 fore200e_swap(fore200e->stats->aal5.cspdus_received),
2859 fore200e_swap(fore200e->stats->aal5.cspdus_dropped),
2860 fore200e_swap(fore200e->stats->aal5.cspdus_crc_errors),
2861 fore200e_swap(fore200e->stats->aal5.cspdus_protocol_errors));
2862
2863 if (!left--)
2864 return sprintf(page,"\n"
2865 " AUX:\t\t allocation failures\n"
2866 " small b1:\t\t\t%10u\n"
2867 " large b1:\t\t\t%10u\n"
2868 " small b2:\t\t\t%10u\n"
2869 " large b2:\t\t\t%10u\n"
2870 " RX PDUs:\t\t\t%10u\n",
2871 fore200e_swap(fore200e->stats->aux.small_b1_failed),
2872 fore200e_swap(fore200e->stats->aux.large_b1_failed),
2873 fore200e_swap(fore200e->stats->aux.small_b2_failed),
2874 fore200e_swap(fore200e->stats->aux.large_b2_failed),
2875 fore200e_swap(fore200e->stats->aux.rpd_alloc_failed));
2876
2877 if (!left--)
2878 return sprintf(page,"\n"
2879 " receive carrier:\t\t\t%s\n",
2880 fore200e->stats->aux.receive_carrier ? "ON" : "OFF!");
2881
2882 if (!left--) {
2883 struct atm_vcc *vcc;
2884 struct fore200e_vcc* fore200e_vcc;
2885
2886 len = sprintf(page,"\n"
2887 " VCCs:\n address\tVPI.VCI:AAL\t(min/max tx PDU size) (min/max rx PDU size)\n");
2888
2889 for (vcc = fore200e->atm_dev->vccs; vcc; vcc = vcc->next) {
2890
2891 fore200e_vcc = FORE200E_VCC(vcc);
2892
2893 len += sprintf(page + len,
2894 " %x\t%d.%d:%d\t\t(%d/%d)\t(%d/%d)\n",
2895 (u32)(unsigned long)vcc,
2896 vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
2897 fore200e_vcc->tx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->tx_min_pdu,
2898 fore200e_vcc->tx_max_pdu,
2899 fore200e_vcc->rx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->rx_min_pdu,
2900 fore200e_vcc->rx_max_pdu
2901 );
2902 }
2903
2904 return len;
2905 }
2906
2907 return 0;
2908 }
2909
2910
2911 #ifdef MODULE
2912 static int __init
2913 fore200e_module_init(void)
2914 {
2915 DPRINTK(1, "module loaded\n");
2916 return fore200e_detect() == 0;
2917 }
2918
2919 static void __exit
2920 fore200e_module_cleanup(void)
2921 {
2922 while (fore200e_boards) {
2923 fore200e_cleanup(&fore200e_boards);
2924 }
2925 DPRINTK(1, "module being removed\n");
2926 }
2927
2928 module_init(fore200e_module_init);
2929 module_exit(fore200e_module_cleanup);
2930 #endif
2931
2932
2933 static const struct atmdev_ops fore200e_ops =
2934 {
2935 open: fore200e_open,
2936 close: fore200e_close,
2937 ioctl: fore200e_ioctl,
2938 getsockopt: fore200e_getsockopt,
2939 setsockopt: fore200e_setsockopt,
2940 send: fore200e_send,
2941 change_qos: fore200e_change_qos,
2942 proc_read: fore200e_proc_read,
2943 owner: THIS_MODULE,
2944 };
2945
2946
2947 #ifdef CONFIG_ATM_FORE200E_PCA
2948 extern const unsigned char _fore200e_pca_fw_data[];
2949 extern const unsigned int _fore200e_pca_fw_size;
2950 #endif
2951 #ifdef CONFIG_ATM_FORE200E_SBA
2952 extern const unsigned char _fore200e_sba_fw_data[];
2953 extern const unsigned int _fore200e_sba_fw_size;
2954 #endif
2955
2956 static const struct fore200e_bus fore200e_bus[] = {
2957 #ifdef CONFIG_ATM_FORE200E_PCA
2958 { "PCA-200E", "pca200e", 32, 4, 32,
2959 _fore200e_pca_fw_data, &_fore200e_pca_fw_size,
2960 fore200e_pca_read,
2961 fore200e_pca_write,
2962 fore200e_pca_dma_map,
2963 fore200e_pca_dma_unmap,
2964 fore200e_pca_dma_sync,
2965 fore200e_pca_dma_chunk_alloc,
2966 fore200e_pca_dma_chunk_free,
2967 fore200e_pca_detect,
2968 fore200e_pca_configure,
2969 fore200e_pca_map,
2970 fore200e_pca_reset,
2971 fore200e_pca_prom_read,
2972 fore200e_pca_unmap,
2973 NULL,
2974 fore200e_pca_irq_check,
2975 fore200e_pca_irq_ack,
2976 fore200e_pca_proc_read,
2977 },
2978 #endif
2979 #ifdef CONFIG_ATM_FORE200E_SBA
2980 { "SBA-200E", "sba200e", 32, 64, 32,
2981 _fore200e_sba_fw_data, &_fore200e_sba_fw_size,
2982 fore200e_sba_read,
2983 fore200e_sba_write,
2984 fore200e_sba_dma_map,
2985 fore200e_sba_dma_unmap,
2986 fore200e_sba_dma_sync,
2987 fore200e_sba_dma_chunk_alloc,
2988 fore200e_sba_dma_chunk_free,
2989 fore200e_sba_detect,
2990 fore200e_sba_configure,
2991 fore200e_sba_map,
2992 fore200e_sba_reset,
2993 fore200e_sba_prom_read,
2994 fore200e_sba_unmap,
2995 fore200e_sba_irq_enable,
2996 fore200e_sba_irq_check,
2997 fore200e_sba_irq_ack,
2998 fore200e_sba_proc_read,
2999 },
3000 #endif
3001 {}
3002 };
3003
3004 MODULE_LICENSE("GPL");
3005