File: /usr/src/linux/drivers/char/nwflash.c
1 /*
2 * Flash memory interface rev.5 driver for the Intel
3 * Flash chips used on the NetWinder.
4 *
5 * 20/08/2000 RMK use __ioremap to map flash into virtual memory
6 * make a few more places use "volatile"
7 * 22/05/2001 RMK - Lock read against write
8 * - merge printk level changes (with mods) from Alan Cox.
9 * - use *ppos as the file position, not file->f_pos.
10 * - fix check for out of range pos and r/w size
11 *
12 * Please note that we are tampering with the only flash chip in the
13 * machine, which contains the bootup code. We therefore have the
14 * power to convert these machines into doorstops...
15 */
16
17 #include <linux/module.h>
18 #include <linux/types.h>
19 #include <linux/fs.h>
20 #include <linux/errno.h>
21 #include <linux/mm.h>
22 #include <linux/delay.h>
23 #include <linux/proc_fs.h>
24 #include <linux/sched.h>
25 #include <linux/miscdevice.h>
26 #include <linux/spinlock.h>
27 #include <linux/rwsem.h>
28 #include <linux/init.h>
29
30 #include <asm/hardware/dec21285.h>
31 #include <asm/io.h>
32 #include <asm/leds.h>
33 #include <asm/mach-types.h>
34 #include <asm/system.h>
35 #include <asm/uaccess.h>
36
37 /*****************************************************************************/
38 #include <asm/nwflash.h>
39
40 #define NWFLASH_VERSION "6.4"
41
42 static void kick_open(void);
43 static int get_flash_id(void);
44 static int erase_block(int nBlock);
45 static int write_block(unsigned long p, const char *buf, int count);
46 static int flash_ioctl(struct inode *inodep, struct file *filep, unsigned int cmd, unsigned long arg);
47 static ssize_t flash_read(struct file *file, char *buf, size_t count, loff_t * ppos);
48 static ssize_t flash_write(struct file *file, const char *buf, size_t count, loff_t * ppos);
49 static long long flash_llseek(struct file *file, long long offset, int orig);
50
51 #define KFLASH_SIZE 1024*1024 //1 Meg
52 #define KFLASH_SIZE4 4*1024*1024 //4 Meg
53 #define KFLASH_ID 0x89A6 //Intel flash
54 #define KFLASH_ID4 0xB0D4 //Intel flash 4Meg
55
56 static int flashdebug; //if set - we will display progress msgs
57
58 static int gbWriteEnable;
59 static int gbWriteBase64Enable;
60 static volatile unsigned char *FLASH_BASE;
61 static int gbFlashSize = KFLASH_SIZE;
62
63 extern spinlock_t gpio_lock;
64
65 /*
66 * the delay routine - it is often required to let the flash "breeze"...
67 */
68 void flash_wait(int timeout)
69 {
70 current->state = TASK_INTERRUPTIBLE;
71 schedule_timeout(timeout);
72 }
73
74 static int get_flash_id(void)
75 {
76 volatile unsigned int c1, c2;
77
78 /*
79 * try to get flash chip ID
80 */
81 kick_open();
82 c2 = inb(0x80);
83 *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x90;
84 udelay(15);
85 c1 = *(volatile unsigned char *) FLASH_BASE;
86 c2 = inb(0x80);
87
88 /*
89 * on 4 Meg flash the second byte is actually at offset 2...
90 */
91 if (c1 == 0xB0)
92 c2 = *(volatile unsigned char *) (FLASH_BASE + 2);
93 else
94 c2 = *(volatile unsigned char *) (FLASH_BASE + 1);
95
96 c2 += (c1 << 8);
97
98 /*
99 * set it back to read mode
100 */
101 *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0xFF;
102
103 if (c2 == KFLASH_ID4)
104 gbFlashSize = KFLASH_SIZE4;
105
106 return c2;
107 }
108
109 static int flash_ioctl(struct inode *inodep, struct file *filep, unsigned int cmd, unsigned long arg)
110 {
111 switch (cmd) {
112 case CMD_WRITE_DISABLE:
113 gbWriteBase64Enable = 0;
114 gbWriteEnable = 0;
115 break;
116
117 case CMD_WRITE_ENABLE:
118 gbWriteEnable = 1;
119 break;
120
121 case CMD_WRITE_BASE64K_ENABLE:
122 gbWriteBase64Enable = 1;
123 break;
124
125 default:
126 gbWriteBase64Enable = 0;
127 gbWriteEnable = 0;
128 return -EINVAL;
129 }
130 return 0;
131 }
132
133 static ssize_t flash_read(struct file *file, char *buf, size_t size, loff_t * ppos)
134 {
135 struct inode *inode = file->f_dentry->d_inode;
136 unsigned long p = *ppos;
137 unsigned int count = size;
138 int ret = 0;
139
140 if (flashdebug)
141 printk(KERN_DEBUG "flash_read: flash_read: offset=0x%lX, buffer=%p, count=0x%X.\n",
142 p, buf, count);
143
144 if (count)
145 ret = -ENXIO;
146
147 if (p < gbFlashSize) {
148 if (count > gbFlashSize - p)
149 count = gbFlashSize - p;
150
151 /*
152 * We now lock against reads and writes. --rmk
153 */
154 if (down_interruptible(&inode->i_sem))
155 return -ERESTARTSYS;
156
157 ret = copy_to_user(buf, (void *)(FLASH_BASE + p), count);
158 if (ret == 0) {
159 ret = count;
160 *ppos += count;
161 }
162 up(&inode->i_sem);
163 }
164 return ret;
165 }
166
167 static ssize_t flash_write(struct file *file, const char *buf, size_t size, loff_t * ppos)
168 {
169 struct inode *inode = file->f_dentry->d_inode;
170 unsigned long p = *ppos;
171 unsigned int count = size;
172 int written;
173 int nBlock, temp, rc;
174 int i, j;
175
176 if (flashdebug)
177 printk("flash_write: offset=0x%lX, buffer=0x%p, count=0x%X.\n",
178 p, buf, count);
179
180 if (!gbWriteEnable)
181 return -EINVAL;
182
183 if (p < 64 * 1024 && (!gbWriteBase64Enable))
184 return -EINVAL;
185
186 /*
187 * check for out of range pos or count
188 */
189 if (p >= gbFlashSize)
190 return count ? -ENXIO : 0;
191
192 if (count > gbFlashSize - p)
193 count = gbFlashSize - p;
194
195 if (verify_area(VERIFY_READ, buf, count))
196 return -EFAULT;
197
198 /*
199 * We now lock against reads and writes. --rmk
200 */
201 if (down_interruptible(&inode->i_sem))
202 return -ERESTARTSYS;
203
204 written = 0;
205
206 leds_event(led_claim);
207 leds_event(led_green_on);
208
209 nBlock = (int) p >> 16; //block # of 64K bytes
210
211 /*
212 * # of 64K blocks to erase and write
213 */
214 temp = ((int) (p + count) >> 16) - nBlock + 1;
215
216 /*
217 * write ends at exactly 64k boundry?
218 */
219 if (((int) (p + count) & 0xFFFF) == 0)
220 temp -= 1;
221
222 if (flashdebug)
223 printk(KERN_DEBUG "flash_write: writing %d block(s) "
224 "starting at %d.\n", temp, nBlock);
225
226 for (; temp; temp--, nBlock++) {
227 if (flashdebug)
228 printk(KERN_DEBUG "flash_write: erasing block %d.\n", nBlock);
229
230 /*
231 * first we have to erase the block(s), where we will write...
232 */
233 i = 0;
234 j = 0;
235 RetryBlock:
236 do {
237 rc = erase_block(nBlock);
238 i++;
239 } while (rc && i < 10);
240
241 if (rc) {
242 printk(KERN_ERR "flash_write: erase error %x\n", rc);
243 break;
244 }
245 if (flashdebug)
246 printk(KERN_DEBUG "flash_write: writing offset %lX, from buf "
247 "%p, bytes left %X.\n", p, buf, count - written);
248
249 /*
250 * write_block will limit write to space left in this block
251 */
252 rc = write_block(p, buf, count - written);
253 j++;
254
255 /*
256 * if somehow write verify failed? Can't happen??
257 */
258 if (!rc) {
259 /*
260 * retry up to 10 times
261 */
262 if (j < 10)
263 goto RetryBlock;
264 else
265 /*
266 * else quit with error...
267 */
268 rc = -1;
269
270 }
271 if (rc < 0) {
272 printk(KERN_ERR "flash_write: write error %X\n", rc);
273 break;
274 }
275 p += rc;
276 buf += rc;
277 written += rc;
278 *ppos += rc;
279
280 if (flashdebug)
281 printk(KERN_DEBUG "flash_write: written 0x%X bytes OK.\n", written);
282 }
283
284 /*
285 * restore reg on exit
286 */
287 leds_event(led_release);
288
289 up(&inode->i_sem);
290
291 return written;
292 }
293
294
295 /*
296 * The memory devices use the full 32/64 bits of the offset, and so we cannot
297 * check against negative addresses: they are ok. The return value is weird,
298 * though, in that case (0).
299 *
300 * also note that seeking relative to the "end of file" isn't supported:
301 * it has no meaning, so it returns -EINVAL.
302 */
303 static long long flash_llseek(struct file *file, long long offset, int orig)
304 {
305 if (flashdebug)
306 printk(KERN_DEBUG "flash_llseek: offset=0x%X, orig=0x%X.\n",
307 (unsigned int) offset, orig);
308
309 switch (orig) {
310 case 0:
311 if (offset < 0)
312 return -EINVAL;
313
314 if ((unsigned int) offset > gbFlashSize)
315 return -EINVAL;
316
317 file->f_pos = (unsigned int) offset;
318 return file->f_pos;
319 case 1:
320 if ((file->f_pos + offset) > gbFlashSize)
321 return -EINVAL;
322 if ((file->f_pos + offset) < 0)
323 return -EINVAL;
324 file->f_pos += offset;
325 return file->f_pos;
326 default:
327 return -EINVAL;
328 }
329 }
330
331
332 /*
333 * assume that main Write routine did the parameter checking...
334 * so just go ahead and erase, what requested!
335 */
336
337 static int erase_block(int nBlock)
338 {
339 volatile unsigned int c1;
340 volatile unsigned char *pWritePtr;
341 int temp, temp1;
342
343 /*
344 * orange LED == erase
345 */
346 leds_event(led_amber_on);
347
348 /*
349 * reset footbridge to the correct offset 0 (...0..3)
350 */
351 *CSR_ROMWRITEREG = 0;
352
353 /*
354 * dummy ROM read
355 */
356 c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
357
358 kick_open();
359 /*
360 * reset status if old errors
361 */
362 *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
363
364 /*
365 * erase a block...
366 * aim at the middle of a current block...
367 */
368 pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + 0x8000 + (nBlock << 16)));
369 /*
370 * dummy read
371 */
372 c1 = *pWritePtr;
373
374 kick_open();
375 /*
376 * erase
377 */
378 *(volatile unsigned char *) pWritePtr = 0x20;
379
380 /*
381 * confirm
382 */
383 *(volatile unsigned char *) pWritePtr = 0xD0;
384
385 /*
386 * wait 10 ms
387 */
388 flash_wait(HZ / 100);
389
390 /*
391 * wait while erasing in process (up to 10 sec)
392 */
393 temp = jiffies + 10 * HZ;
394 c1 = 0;
395 while (!(c1 & 0x80) && time_before(jiffies, temp)) {
396 flash_wait(HZ / 100);
397 /*
398 * read any address
399 */
400 c1 = *(volatile unsigned char *) (pWritePtr);
401 // printk("Flash_erase: status=%X.\n",c1);
402 }
403
404 /*
405 * set flash for normal read access
406 */
407 kick_open();
408 // *(volatile unsigned char*)(FLASH_BASE+0x8000) = 0xFF;
409 *(volatile unsigned char *) pWritePtr = 0xFF; //back to normal operation
410
411 /*
412 * check if erase errors were reported
413 */
414 if (c1 & 0x20) {
415 printk(KERN_ERR "flash_erase: err at %p\n", pWritePtr);
416
417 /*
418 * reset error
419 */
420 *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
421 return -2;
422 }
423
424 /*
425 * just to make sure - verify if erased OK...
426 */
427 flash_wait(HZ / 100);
428
429 pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + (nBlock << 16)));
430
431 for (temp = 0; temp < 16 * 1024; temp++, pWritePtr += 4) {
432 if ((temp1 = *(volatile unsigned int *) pWritePtr) != 0xFFFFFFFF) {
433 printk(KERN_ERR "flash_erase: verify err at %p = %X\n",
434 pWritePtr, temp1);
435 return -1;
436 }
437 }
438
439 return 0;
440
441 }
442
443 /*
444 * write_block will limit number of bytes written to the space in this block
445 */
446 static int write_block(unsigned long p, const char *buf, int count)
447 {
448 volatile unsigned int c1;
449 volatile unsigned int c2;
450 unsigned char *pWritePtr;
451 unsigned int uAddress;
452 unsigned int offset;
453 unsigned int timeout;
454 unsigned int timeout1;
455
456 /*
457 * red LED == write
458 */
459 leds_event(led_amber_off);
460 leds_event(led_red_on);
461
462 pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + p));
463
464 /*
465 * check if write will end in this block....
466 */
467 offset = p & 0xFFFF;
468
469 if (offset + count > 0x10000)
470 count = 0x10000 - offset;
471
472 /*
473 * wait up to 30 sec for this block
474 */
475 timeout = jiffies + 30 * HZ;
476
477 for (offset = 0; offset < count; offset++, pWritePtr++) {
478 uAddress = (unsigned int) pWritePtr;
479 uAddress &= 0xFFFFFFFC;
480 if (__get_user(c2, buf + offset))
481 return -EFAULT;
482
483 WriteRetry:
484 /*
485 * dummy read
486 */
487 c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
488
489 /*
490 * kick open the write gate
491 */
492 kick_open();
493
494 /*
495 * program footbridge to the correct offset...0..3
496 */
497 *CSR_ROMWRITEREG = (unsigned int) pWritePtr & 3;
498
499 /*
500 * write cmd
501 */
502 *(volatile unsigned char *) (uAddress) = 0x40;
503
504 /*
505 * data to write
506 */
507 *(volatile unsigned char *) (uAddress) = c2;
508
509 /*
510 * get status
511 */
512 *(volatile unsigned char *) (FLASH_BASE + 0x10000) = 0x70;
513
514 c1 = 0;
515
516 /*
517 * wait up to 1 sec for this byte
518 */
519 timeout1 = jiffies + 1 * HZ;
520
521 /*
522 * while not ready...
523 */
524 while (!(c1 & 0x80) && time_before(jiffies, timeout1))
525 c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
526
527 /*
528 * if timeout getting status
529 */
530 if (time_after_eq(jiffies, timeout1)) {
531 kick_open();
532 /*
533 * reset err
534 */
535 *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
536
537 goto WriteRetry;
538 }
539 /*
540 * switch on read access, as a default flash operation mode
541 */
542 kick_open();
543 /*
544 * read access
545 */
546 *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0xFF;
547
548 /*
549 * if hardware reports an error writing, and not timeout -
550 * reset the chip and retry
551 */
552 if (c1 & 0x10) {
553 kick_open();
554 /*
555 * reset err
556 */
557 *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
558
559 /*
560 * before timeout?
561 */
562 if (time_before(jiffies, timeout)) {
563 if (flashdebug)
564 printk(KERN_DEBUG "write_block: Retrying write at 0x%X)n",
565 pWritePtr - FLASH_BASE);
566
567 /*
568 * no LED == waiting
569 */
570 leds_event(led_amber_off);
571 /*
572 * wait couple ms
573 */
574 flash_wait(HZ / 100);
575 /*
576 * red LED == write
577 */
578 leds_event(led_red_on);
579
580 goto WriteRetry;
581 } else {
582 printk(KERN_ERR "write_block: timeout at 0x%X\n",
583 pWritePtr - FLASH_BASE);
584 /*
585 * return error -2
586 */
587 return -2;
588
589 }
590 }
591 }
592
593 /*
594 * green LED == read/verify
595 */
596 leds_event(led_amber_off);
597 leds_event(led_green_on);
598
599 flash_wait(HZ / 100);
600
601 pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + p));
602
603 for (offset = 0; offset < count; offset++) {
604 char c, c1;
605 if (__get_user(c, buf))
606 return -EFAULT;
607 buf++;
608 if ((c1 = *pWritePtr++) != c) {
609 printk(KERN_ERR "write_block: verify error at 0x%X (%02X!=%02X)\n",
610 pWritePtr - FLASH_BASE, c1, c);
611 return 0;
612 }
613 }
614
615 return count;
616 }
617
618
619 static void kick_open(void)
620 {
621 unsigned long flags;
622
623 /*
624 * we want to write a bit pattern XXX1 to Xilinx to enable
625 * the write gate, which will be open for about the next 2ms.
626 */
627 spin_lock_irqsave(&gpio_lock, flags);
628 cpld_modify(1, 1);
629 spin_unlock_irqrestore(&gpio_lock, flags);
630
631 /*
632 * let the ISA bus to catch on...
633 */
634 udelay(25);
635 }
636
637 static struct file_operations flash_fops =
638 {
639 owner: THIS_MODULE,
640 llseek: flash_llseek,
641 read: flash_read,
642 write: flash_write,
643 ioctl: flash_ioctl,
644 };
645
646 static struct miscdevice flash_miscdev =
647 {
648 FLASH_MINOR,
649 "nwflash",
650 &flash_fops
651 };
652
653 static int __init nwflash_init(void)
654 {
655 int ret = -ENODEV;
656
657 if (machine_is_netwinder()) {
658 int id;
659
660 FLASH_BASE = __ioremap(DC21285_FLASH, KFLASH_SIZE4, 0);
661 if (!FLASH_BASE)
662 goto out;
663
664 id = get_flash_id();
665 if ((id != KFLASH_ID) && (id != KFLASH_ID4)) {
666 ret = -ENXIO;
667 iounmap((void *)FLASH_BASE);
668 printk("Flash: incorrect ID 0x%04X.\n", id);
669 goto out;
670 }
671
672 printk("Flash ROM driver v.%s, flash device ID 0x%04X, size %d Mb.\n",
673 NWFLASH_VERSION, id, gbFlashSize / (1024 * 1024));
674
675 misc_register(&flash_miscdev);
676
677 ret = 0;
678 }
679 out:
680 return ret;
681 }
682
683 static void __exit nwflash_exit(void)
684 {
685 misc_deregister(&flash_miscdev);
686 iounmap((void *)FLASH_BASE);
687 }
688
689 EXPORT_NO_SYMBOLS;
690
691 MODULE_LICENSE("GPL");
692
693 MODULE_PARM(flashdebug, "i");
694
695 module_init(nwflash_init);
696 module_exit(nwflash_exit);
697