File: /usr/src/linux/drivers/char/rio/rioinit.c
1 /*
2 ** -----------------------------------------------------------------------------
3 **
4 ** Perle Specialix driver for Linux
5 ** Ported from existing RIO Driver for SCO sources.
6 *
7 * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 **
23 ** Module : rioinit.c
24 ** SID : 1.3
25 ** Last Modified : 11/6/98 10:33:43
26 ** Retrieved : 11/6/98 10:33:49
27 **
28 ** ident @(#)rioinit.c 1.3
29 **
30 ** -----------------------------------------------------------------------------
31 */
32 #ifdef SCCS_LABELS
33 static char *_rioinit_c_sccs_ = "@(#)rioinit.c 1.3";
34 #endif
35
36 #define __NO_VERSION__
37 #include <linux/config.h>
38 #include <linux/module.h>
39 #include <linux/slab.h>
40 #include <linux/errno.h>
41 #include <asm/io.h>
42 #include <asm/system.h>
43 #include <asm/string.h>
44 #include <asm/semaphore.h>
45 #include <asm/uaccess.h>
46
47 #include <linux/termios.h>
48 #include <linux/serial.h>
49
50 #include <linux/compatmac.h>
51 #include <linux/generic_serial.h>
52
53
54 #include "linux_compat.h"
55 #include "typdef.h"
56 #include "pkt.h"
57 #include "daemon.h"
58 #include "rio.h"
59 #include "riospace.h"
60 #include "top.h"
61 #include "cmdpkt.h"
62 #include "map.h"
63 #include "riotypes.h"
64 #include "rup.h"
65 #include "port.h"
66 #include "riodrvr.h"
67 #include "rioinfo.h"
68 #include "func.h"
69 #include "errors.h"
70 #include "pci.h"
71
72 #include "parmmap.h"
73 #include "unixrup.h"
74 #include "board.h"
75 #include "host.h"
76 #include "error.h"
77 #include "phb.h"
78 #include "link.h"
79 #include "cmdblk.h"
80 #include "route.h"
81 #include "control.h"
82 #include "cirrus.h"
83 #include "rioioctl.h"
84 #include "rio_linux.h"
85
86 #undef bcopy
87 #define bcopy rio_pcicopy
88
89 int
90 RIOPCIinit(struct rio_info *p, int Mode);
91
92
93 #if 0
94 extern int rio_intr();
95
96 /*
97 ** Init time code.
98 */
99 void
100 rioinit( p, info )
101 struct rio_info * p;
102 struct RioHostInfo * info;
103 {
104 /*
105 ** Multi-Host card support - taking the easy way out - sorry !
106 ** We allocate and set up the Host and Port structs when the
107 ** driver is called to 'install' the first host.
108 ** We check for this first 'call' by testing the RIOPortp pointer.
109 */
110 if ( !p->RIOPortp )
111 {
112 rio_dprintk (RIO_DEBUG_INIT, "Allocating and setting up driver data structures\n");
113
114 RIOAllocDataStructs(p); /* allocate host/port structs */
115 RIOSetupDataStructs(p); /* setup topology structs */
116 }
117
118 RIOInitHosts( p, info ); /* hunt down the hardware */
119
120 RIOAllocateInterrupts(p); /* allocate interrupts */
121 RIOReport(p); /* show what we found */
122 }
123
124 /*
125 ** Initialise the Cards
126 */
127 void
128 RIOInitHosts(p, info)
129 struct rio_info * p;
130 struct RioHostInfo * info;
131 {
132 /*
133 ** 15.10.1998 ARG - ESIL 0762 part fix
134 ** If there is no ISA card definition - we always look for PCI cards.
135 ** As we currently only support one host card this lets an ISA card
136 ** definition take precedence over PLUG and PLAY.
137 ** No ISA card - we are PLUG and PLAY with PCI.
138 */
139
140 /*
141 ** Note - for PCI both these will be zero, that's okay because
142 ** RIOPCIInit() fills them in if a card is found.
143 */
144 p->RIOHosts[p->RIONumHosts].Ivec = info->vector;
145 p->RIOHosts[p->RIONumHosts].PaddrP = info->location;
146
147 /*
148 ** Check that we are able to accomodate another host
149 */
150 if ( p->RIONumHosts >= RIO_HOSTS )
151 {
152 p->RIOFailed++;
153 return;
154 }
155
156 if ( info->bus & ISA_BUS )
157 {
158 rio_dprintk (RIO_DEBUG_INIT, "initialising card %d (ISA)\n", p->RIONumHosts);
159 RIOISAinit(p, p->mode);
160 }
161 else
162 {
163 rio_dprintk (RIO_DEBUG_INIT, "initialising card %d (PCI)\n", p->RIONumHosts);
164 RIOPCIinit(p, RIO_PCI_DEFAULT_MODE);
165 }
166
167 rio_dprintk (RIO_DEBUG_INIT, "Total hosts initialised so far : %d\n", p->RIONumHosts);
168
169
170 #ifdef FUTURE_RELEASE
171 if (p->bus & EISA_BUS)
172 /* EISA card */
173 RIOEISAinit(p, RIO_EISA_DEFAULT_MODE);
174
175 if (p->bus & MCA_BUS)
176 /* MCA card */
177 RIOMCAinit(p, RIO_MCA_DEFAULT_MODE);
178 #endif
179 }
180
181 /*
182 ** go through memory for an AT host that we pass in the device info
183 ** structure and initialise
184 */
185 void
186 RIOISAinit(p, mode)
187 struct rio_info * p;
188 int mode;
189 {
190
191 /* XXX Need to implement this. */
192 #if 0
193 p->intr_tid = iointset(p->RIOHosts[p->RIONumHosts].Ivec,
194 (int (*)())rio_intr, (char*)p->RIONumHosts);
195
196 rio_dprintk (RIO_DEBUG_INIT, "Set interrupt handler, intr_tid = 0x%x\n", p->intr_tid );
197
198 if (RIODoAT(p, p->RIOHosts[p->RIONumHosts].PaddrP, mode)) {
199 return;
200 }
201 else {
202 rio_dprintk (RIO_DEBUG_INIT, "RIODoAT failed\n");
203 p->RIOFailed++;
204 }
205 #endif
206
207 }
208
209 /*
210 ** RIODoAT :
211 **
212 ** Map in a boards physical address, check that the board is there,
213 ** test the board and if everything is okay assign the board an entry
214 ** in the Rio Hosts structure.
215 */
216 int
217 RIODoAT(p, Base, mode)
218 struct rio_info * p;
219 int Base;
220 int mode;
221 {
222 #define FOUND 1
223 #define NOT_FOUND 0
224
225 caddr_t cardAddr;
226
227 /*
228 ** Check to see if we actually have a board at this physical address.
229 */
230 if ((cardAddr = RIOCheckForATCard(Base)) != 0) {
231 /*
232 ** Now test the board to see if it is working.
233 */
234 if (RIOBoardTest(Base, cardAddr, RIO_AT, 0) == RIO_SUCCESS) {
235 /*
236 ** Fill out a slot in the Rio host structure.
237 */
238 if (RIOAssignAT(p, Base, cardAddr, mode)) {
239 return(FOUND);
240 }
241 }
242 RIOMapout(Base, RIO_AT_MEM_SIZE, cardAddr);
243 }
244 return(NOT_FOUND);
245 }
246
247 caddr_t
248 RIOCheckForATCard(Base)
249 int Base;
250 {
251 int off;
252 struct DpRam *cardp; /* (Points at the host) */
253 caddr_t virtAddr;
254 unsigned char RIOSigTab[24];
255 /*
256 ** Table of values to search for as prom signature of a host card
257 */
258 strcpy(RIOSigTab, "JBJGPGGHINSMJPJR");
259
260 /*
261 ** Hey! Yes, You reading this code! Yo, grab a load a this:
262 **
263 ** IF the card is using WORD MODE rather than BYTE MODE
264 ** then it will occupy 128K of PHYSICAL memory area. So,
265 ** you might think that the following Mapin is wrong. Well,
266 ** it isn't, because the SECOND 64K of occupied space is an
267 ** EXACT COPY of the FIRST 64K. (good?), so, we need only
268 ** map it in in one 64K block.
269 */
270 if (RIOMapin(Base, RIO_AT_MEM_SIZE, &virtAddr) == -1) {
271 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Couldn't map the board in!\n");
272 return((caddr_t)0);
273 }
274
275 /*
276 ** virtAddr points to the DP ram of the system.
277 ** We now cast this to a pointer to a RIO Host,
278 ** and have a rummage about in the PROM.
279 */
280 cardp = (struct DpRam *)virtAddr;
281
282 for (off=0; RIOSigTab[off]; off++) {
283 if ((RBYTE(cardp->DpSignature[off]) & 0xFF) != RIOSigTab[off]) {
284 /*
285 ** Signature mismatch - card not at this address
286 */
287 RIOMapout(Base, RIO_AT_MEM_SIZE, virtAddr);
288 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Couldn't match the signature 0x%x 0x%x!\n",
289 (int)cardp, off);
290 return((caddr_t)0);
291 }
292 }
293
294 /*
295 ** If we get here then we must have found a valid board so return
296 ** its virtual address.
297 */
298 return(virtAddr);
299 }
300 #endif
301
302 /**
303 ** RIOAssignAT :
304 **
305 ** Fill out the fields in the p->RIOHosts structure now we know we know
306 ** we have a board present.
307 **
308 ** bits < 0 indicates 8 bit operation requested,
309 ** bits > 0 indicates 16 bit operation.
310 */
311 int
312 RIOAssignAT(p, Base, virtAddr, mode)
313 struct rio_info * p;
314 int Base;
315 caddr_t virtAddr;
316 int mode;
317 {
318 int bits;
319 struct DpRam *cardp = (struct DpRam *)virtAddr;
320
321 if ((Base < ONE_MEG) || (mode & BYTE_ACCESS_MODE))
322 bits = BYTE_OPERATION;
323 else
324 bits = WORD_OPERATION;
325
326 /*
327 ** Board has passed its scrub test. Fill in all the
328 ** transient stuff.
329 */
330 p->RIOHosts[p->RIONumHosts].Caddr = virtAddr;
331 p->RIOHosts[p->RIONumHosts].CardP = (struct DpRam *)virtAddr;
332
333 /*
334 ** Revision 01 AT host cards don't support WORD operations,
335 */
336 if ( RBYTE(cardp->DpRevision) == 01 )
337 bits = BYTE_OPERATION;
338
339 p->RIOHosts[p->RIONumHosts].Type = RIO_AT;
340 p->RIOHosts[p->RIONumHosts].Copy = bcopy;
341 /* set this later */
342 p->RIOHosts[p->RIONumHosts].Slot = -1;
343 p->RIOHosts[p->RIONumHosts].Mode = SLOW_LINKS | SLOW_AT_BUS | bits;
344 WBYTE(p->RIOHosts[p->RIONumHosts].Control,
345 BOOT_FROM_RAM | EXTERNAL_BUS_OFF |
346 p->RIOHosts[p->RIONumHosts].Mode |
347 INTERRUPT_DISABLE );
348 WBYTE(p->RIOHosts[p->RIONumHosts].ResetInt,0xff);
349 WBYTE(p->RIOHosts[p->RIONumHosts].Control,
350 BOOT_FROM_RAM | EXTERNAL_BUS_OFF |
351 p->RIOHosts[p->RIONumHosts].Mode |
352 INTERRUPT_DISABLE );
353 WBYTE(p->RIOHosts[p->RIONumHosts].ResetInt,0xff);
354 p->RIOHosts[p->RIONumHosts].UniqueNum =
355 ((RBYTE(p->RIOHosts[p->RIONumHosts].Unique[0])&0xFF)<<0)|
356 ((RBYTE(p->RIOHosts[p->RIONumHosts].Unique[1])&0xFF)<<8)|
357 ((RBYTE(p->RIOHosts[p->RIONumHosts].Unique[2])&0xFF)<<16)|
358 ((RBYTE(p->RIOHosts[p->RIONumHosts].Unique[3])&0xFF)<<24);
359 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Uniquenum 0x%x\n",p->RIOHosts[p->RIONumHosts].UniqueNum);
360
361 p->RIONumHosts++;
362 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Tests Passed at 0x%x\n", Base);
363 return(1);
364 }
365 #if 0
366 #ifdef FUTURE_RELEASE
367 int RIOMCAinit(int Mode)
368 {
369 uchar SlotNumber;
370 caddr_t Caddr;
371 uint Paddr;
372 uint Ivec;
373 int Handle;
374 int ret = 0;
375
376 /*
377 ** Valid mode information for MCA cards
378 ** is only FAST LINKS
379 */
380 Mode = (Mode & FAST_LINKS) ? McaTpFastLinks : McaTpSlowLinks;
381 rio_dprintk (RIO_DEBUG_INIT, "RIOMCAinit(%d)\n",Mode);
382
383
384 /*
385 ** Check out each of the slots
386 */
387 for (SlotNumber = 0; SlotNumber < McaMaxSlots; SlotNumber++) {
388 /*
389 ** Enable the slot we want to talk to
390 */
391 outb( McaSlotSelect, SlotNumber | McaSlotEnable );
392
393 /*
394 ** Read the ID word from the slot
395 */
396 if (((inb(McaIdHigh)<< 8)|inb(McaIdLow)) == McaRIOId)
397 {
398 rio_dprintk (RIO_DEBUG_INIT, "Potential MCA card in slot %d\n", SlotNumber);
399
400 /*
401 ** Card appears to be a RIO MCA card!
402 */
403 RIOMachineType |= (1<<RIO_MCA);
404
405 /*
406 ** Just check we haven't found too many wonderful objects
407 */
408 if ( RIONumHosts >= RIO_HOSTS )
409 {
410 Rprintf(RIOMesgTooManyCards);
411 return(ret);
412 }
413
414 /*
415 ** McaIrqEnable contains the interrupt vector, and a card
416 ** enable bit.
417 */
418 Ivec = inb(McaIrqEnable);
419
420 rio_dprintk (RIO_DEBUG_INIT, "Ivec is %x\n", Ivec);
421
422 switch ( Ivec & McaIrqMask )
423 {
424 case McaIrq9:
425 rio_dprintk (RIO_DEBUG_INIT, "IRQ9\n");
426 break;
427 case McaIrq3:
428 rio_dprintk (RIO_DEBUG_INIT, "IRQ3\n");
429 break;
430 case McaIrq4:
431 rio_dprintk (RIO_DEBUG_INIT, "IRQ4\n");
432 break;
433 case McaIrq7:
434 rio_dprintk (RIO_DEBUG_INIT, "IRQ7\n");
435 break;
436 case McaIrq10:
437 rio_dprintk (RIO_DEBUG_INIT, "IRQ10\n");
438 break;
439 case McaIrq11:
440 rio_dprintk (RIO_DEBUG_INIT, "IRQ11\n");
441 break;
442 case McaIrq12:
443 rio_dprintk (RIO_DEBUG_INIT, "IRQ12\n");
444 break;
445 case McaIrq15:
446 rio_dprintk (RIO_DEBUG_INIT, "IRQ15\n");
447 break;
448 }
449
450 /*
451 ** If the card enable bit isn't set, then set it!
452 */
453 if ((Ivec & McaCardEnable) != McaCardEnable) {
454 rio_dprintk (RIO_DEBUG_INIT, "McaCardEnable not set - setting!\n");
455 outb(McaIrqEnable,Ivec|McaCardEnable);
456 } else
457 rio_dprintk (RIO_DEBUG_INIT, "McaCardEnable already set\n");
458
459 /*
460 ** Convert the IRQ enable mask into something useful
461 */
462 Ivec = RIOMcaToIvec[Ivec & McaIrqMask];
463
464 /*
465 ** Find the physical address
466 */
467 rio_dprintk (RIO_DEBUG_INIT, "inb(McaMemory) is %x\n", inb(McaMemory));
468 Paddr = McaAddress(inb(McaMemory));
469
470 rio_dprintk (RIO_DEBUG_INIT, "MCA card has Ivec %d Addr %x\n", Ivec, Paddr);
471
472 if ( Paddr != 0 )
473 {
474
475 /*
476 ** Tell the memory mapper that we want to talk to it
477 */
478 Handle = RIOMapin( Paddr, RIO_MCA_MEM_SIZE, &Caddr );
479
480 if ( Handle == -1 ) {
481 rio_dprintk (RIO_DEBUG_INIT, "Couldn't map %d bytes at %x\n", RIO_MCA_MEM_SIZE, Paddr;
482 continue;
483 }
484
485 rio_dprintk (RIO_DEBUG_INIT, "Board mapped to vaddr 0x%x\n", Caddr);
486
487 /*
488 ** And check that it is actually there!
489 */
490 if ( RIOBoardTest( Paddr,Caddr,RIO_MCA,SlotNumber ) == RIO_SUCCESS )
491 {
492 rio_dprintk (RIO_DEBUG_INIT, "Board has passed test\n");
493 rio_dprintk (RIO_DEBUG_INIT, "Slot %d. Type %d. Paddr 0x%x. Caddr 0x%x. Mode 0x%x.\n",
494 SlotNumber, RIO_MCA, Paddr, Caddr, Mode);
495
496 /*
497 ** Board has passed its scrub test. Fill in all the
498 ** transient stuff.
499 */
500 p->RIOHosts[RIONumHosts].Slot = SlotNumber;
501 p->RIOHosts[RIONumHosts].Ivec = Ivec;
502 p->RIOHosts[RIONumHosts].Type = RIO_MCA;
503 p->RIOHosts[RIONumHosts].Copy = bcopy;
504 p->RIOHosts[RIONumHosts].PaddrP = Paddr;
505 p->RIOHosts[RIONumHosts].Caddr = Caddr;
506 p->RIOHosts[RIONumHosts].CardP = (struct DpRam *)Caddr;
507 p->RIOHosts[RIONumHosts].Mode = Mode;
508 WBYTE(p->RIOHosts[p->RIONumHosts].ResetInt , 0xff);
509 p->RIOHosts[RIONumHosts].UniqueNum =
510 ((RBYTE(p->RIOHosts[RIONumHosts].Unique[0])&0xFF)<<0)|
511 ((RBYTE(p->RIOHosts[RIONumHosts].Unique[1])&0xFF)<<8)|
512 ((RBYTE(p->RIOHosts[RIONumHosts].Unique[2])&0xFF)<<16)|
513 ((RBYTE(p->RIOHosts[RIONumHosts].Unique[3])&0xFF)<<24);
514 RIONumHosts++;
515 ret++;
516 }
517 else
518 {
519 /*
520 ** It failed the test, so ignore it.
521 */
522 rio_dprintk (RIO_DEBUG_INIT, "TEST FAILED\n");
523 RIOMapout(Paddr, RIO_MCA_MEM_SIZE, Caddr );
524 }
525 }
526 else
527 {
528 rio_dprintk (RIO_DEBUG_INIT, "Slot %d - Paddr zero!\n", SlotNumber);
529 }
530 }
531 else
532 {
533 rio_dprintk (RIO_DEBUG_INIT, "Slot %d NOT RIO\n", SlotNumber);
534 }
535 }
536 /*
537 ** Now we have checked all the slots, turn off the MCA slot selector
538 */
539 outb(McaSlotSelect,0);
540 rio_dprintk (RIO_DEBUG_INIT, "Slot %d NOT RIO\n", SlotNumber);
541 return ret;
542 }
543
544 int RIOEISAinit( int Mode )
545 {
546 static int EISADone = 0;
547 uint Paddr;
548 int PollIntMixMsgDone = 0;
549 caddr_t Caddr;
550 ushort Ident;
551 uchar EisaSlot;
552 uchar Ivec;
553 int ret = 0;
554
555 /*
556 ** The only valid mode information for EISA hosts is fast or slow
557 ** links.
558 */
559 Mode = (Mode & FAST_LINKS) ? EISA_TP_FAST_LINKS : EISA_TP_SLOW_LINKS;
560
561 if ( EISADone )
562 {
563 rio_dprintk (RIO_DEBUG_INIT, "RIOEISAinit() - already done, return.\n");
564 return(0);
565 }
566
567 EISADone++;
568
569 rio_dprintk (RIO_DEBUG_INIT, "RIOEISAinit()\n");
570
571
572 /*
573 ** First check all cards to see if ANY are set for polled mode operation.
574 ** If so, set ALL to polled.
575 */
576
577 for ( EisaSlot=1; EisaSlot<=RIO_MAX_EISA_SLOTS; EisaSlot++ )
578 {
579 Ident = (INBZ(EisaSlot,EISA_PRODUCT_IDENT_HI)<<8) |
580 INBZ(EisaSlot,EISA_PRODUCT_IDENT_LO);
581
582 if ( Ident == RIO_EISA_IDENT )
583 {
584 rio_dprintk (RIO_DEBUG_INIT, "Found Specialix product\n");
585
586 if ( INBZ(EisaSlot,EISA_PRODUCT_NUMBER) != RIO_EISA_PRODUCT_CODE )
587 {
588 rio_dprintk (RIO_DEBUG_INIT, "Not Specialix RIO - Product number %x\n",
589 INBZ(EisaSlot, EISA_PRODUCT_NUMBER));
590 continue; /* next slot */
591 }
592 /*
593 ** Its a Specialix RIO!
594 */
595 rio_dprintk (RIO_DEBUG_INIT, "RIO Revision %d\n",
596 INBZ(EisaSlot, EISA_REVISION_NUMBER));
597
598 RIOMachineType |= (1<<RIO_EISA);
599
600 /*
601 ** Just check we haven't found too many wonderful objects
602 */
603 if ( RIONumHosts >= RIO_HOSTS )
604 {
605 Rprintf(RIOMesgTooManyCards);
606 return 0;
607 }
608
609 /*
610 ** Ensure that the enable bit is set!
611 */
612 OUTBZ( EisaSlot, EISA_ENABLE, RIO_EISA_ENABLE_BIT );
613
614 /*
615 ** EISA_INTERRUPT_VEC contains the interrupt vector.
616 */
617 Ivec = INBZ(EisaSlot,EISA_INTERRUPT_VEC);
618
619 #ifdef RIODEBUG
620 switch ( Ivec & EISA_INTERRUPT_MASK )
621 {
622 case EISA_IRQ_3:
623 rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 3\n");
624 break;
625 case EISA_IRQ_4:
626 rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 4\n");
627 break;
628 case EISA_IRQ_5:
629 rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 5\n");
630 break;
631 case EISA_IRQ_6:
632 rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 6\n");
633 break;
634 case EISA_IRQ_7:
635 rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 7\n");
636 break;
637 case EISA_IRQ_9:
638 rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 9\n");
639 break;
640 case EISA_IRQ_10:
641 rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 10\n");
642 break;
643 case EISA_IRQ_11:
644 rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 11\n");
645 break;
646 case EISA_IRQ_12:
647 rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 12\n");
648 break;
649 case EISA_IRQ_14:
650 rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 14\n");
651 break;
652 case EISA_IRQ_15:
653 rio_dprintk (RIO_DEBUG_INIT, "EISA IRQ 15\n");
654 break;
655 case EISA_POLLED:
656 rio_dprintk (RIO_DEBUG_INIT, "EISA POLLED\n");
657 break;
658 default:
659 rio_dprintk (RIO_DEBUG_INIT, NULL,DBG_INIT|DBG_FAIL,"Shagged interrupt number!\n");
660 Ivec &= EISA_CONTROL_MASK;
661 }
662 #endif
663
664 if ( (Ivec & EISA_INTERRUPT_MASK) ==
665 EISA_POLLED )
666 {
667 RIOWillPoll = 1;
668 break; /* From EisaSlot loop */
669 }
670 }
671 }
672
673 /*
674 ** Do it all again now we know whether to change all cards to polled
675 ** mode or not
676 */
677
678 for ( EisaSlot=1; EisaSlot<=RIO_MAX_EISA_SLOTS; EisaSlot++ )
679 {
680 Ident = (INBZ(EisaSlot,EISA_PRODUCT_IDENT_HI)<<8) |
681 INBZ(EisaSlot,EISA_PRODUCT_IDENT_LO);
682
683 if ( Ident == RIO_EISA_IDENT )
684 {
685 if ( INBZ(EisaSlot,EISA_PRODUCT_NUMBER) != RIO_EISA_PRODUCT_CODE )
686 continue; /* next slot */
687
688 /*
689 ** Its a Specialix RIO!
690 */
691
692 /*
693 ** Ensure that the enable bit is set!
694 */
695 OUTBZ( EisaSlot, EISA_ENABLE, RIO_EISA_ENABLE_BIT );
696
697 /*
698 ** EISA_INTERRUPT_VEC contains the interrupt vector.
699 */
700 Ivec = INBZ(EisaSlot,EISA_INTERRUPT_VEC);
701
702 if ( RIOWillPoll )
703 {
704 /*
705 ** If we are going to operate in polled mode, but this
706 ** board is configured to be interrupt driven, display
707 ** the message explaining the situation to the punter,
708 ** assuming we haven't already done so.
709 */
710
711 if ( !PollIntMixMsgDone &&
712 (Ivec & EISA_INTERRUPT_MASK) != EISA_POLLED )
713 {
714 Rprintf(RIOMesgAllPolled);
715 PollIntMixMsgDone = 1;
716 }
717
718 /*
719 ** Ungraciously ignore whatever the board reports as its
720 ** interrupt vector...
721 */
722
723 Ivec &= ~EISA_INTERRUPT_MASK;
724
725 /*
726 ** ...and force it to dance to the poll tune.
727 */
728
729 Ivec |= EISA_POLLED;
730 }
731
732 /*
733 ** Convert the IRQ enable mask into something useful (0-15)
734 */
735 Ivec = RIOEisaToIvec(Ivec);
736
737 rio_dprintk (RIO_DEBUG_INIT, "EISA host in slot %d has Ivec 0x%x\n",
738 EisaSlot, Ivec);
739
740 /*
741 ** Find the physical address
742 */
743 Paddr = (INBZ(EisaSlot,EISA_MEMORY_BASE_HI)<<24) |
744 (INBZ(EisaSlot,EISA_MEMORY_BASE_LO)<<16);
745
746 rio_dprintk (RIO_DEBUG_INIT, "EISA card has Ivec %d Addr %x\n", Ivec, Paddr);
747
748 if ( Paddr == 0 )
749 {
750 rio_dprintk (RIO_DEBUG_INIT,
751 "Board in slot %d configured for address zero!\n", EisaSlot);
752 continue;
753 }
754
755 /*
756 ** Tell the memory mapper that we want to talk to it
757 */
758 rio_dprintk (RIO_DEBUG_INIT, "About to map EISA card \n");
759
760 if (RIOMapin( Paddr, RIO_EISA_MEM_SIZE, &Caddr) == -1) {
761 rio_dprintk (RIO_DEBUG_INIT, "Couldn't map %d bytes at %x\n",
762 RIO_EISA_MEM_SIZE,Paddr);
763 continue;
764 }
765
766 rio_dprintk (RIO_DEBUG_INIT, "Board mapped to vaddr 0x%x\n", Caddr);
767
768 /*
769 ** And check that it is actually there!
770 */
771 if ( RIOBoardTest( Paddr,Caddr,RIO_EISA,EisaSlot) == RIO_SUCCESS )
772 {
773 rio_dprintk (RIO_DEBUG_INIT, "Board has passed test\n");
774 rio_dprintk (RIO_DEBUG_INIT,
775 "Slot %d. Ivec %d. Type %d. Paddr 0x%x. Caddr 0x%x. Mode 0x%x.\n",
776 EisaSlot,Ivec,RIO_EISA,Paddr,Caddr,Mode);
777
778 /*
779 ** Board has passed its scrub test. Fill in all the
780 ** transient stuff.
781 */
782 p->RIOHosts[RIONumHosts].Slot = EisaSlot;
783 p->RIOHosts[RIONumHosts].Ivec = Ivec;
784 p->RIOHosts[RIONumHosts].Type = RIO_EISA;
785 p->RIOHosts[RIONumHosts].Copy = bcopy;
786 p->RIOHosts[RIONumHosts].PaddrP = Paddr;
787 p->RIOHosts[RIONumHosts].Caddr = Caddr;
788 p->RIOHosts[RIONumHosts].CardP = (struct DpRam *)Caddr;
789 p->RIOHosts[RIONumHosts].Mode = Mode;
790 /*
791 ** because the EISA prom is mapped into IO space, we
792 ** need to copy the unqiue number into the memory area
793 ** that it would have occupied, so that the download
794 ** code can determine its ID and card type.
795 */
796 WBYTE(p->RIOHosts[RIONumHosts].Unique[0],INBZ(EisaSlot,EISA_UNIQUE_NUM_0));
797 WBYTE(p->RIOHosts[RIONumHosts].Unique[1],INBZ(EisaSlot,EISA_UNIQUE_NUM_1));
798 WBYTE(p->RIOHosts[RIONumHosts].Unique[2],INBZ(EisaSlot,EISA_UNIQUE_NUM_2));
799 WBYTE(p->RIOHosts[RIONumHosts].Unique[3],INBZ(EisaSlot,EISA_UNIQUE_NUM_3));
800 p->RIOHosts[RIONumHosts].UniqueNum =
801 ((RBYTE(p->RIOHosts[RIONumHosts].Unique[0])&0xFF)<<0)|
802 ((RBYTE(p->RIOHosts[RIONumHosts].Unique[1])&0xFF)<<8)|
803 ((RBYTE(p->RIOHosts[RIONumHosts].Unique[2])&0xFF)<<16)|
804 ((RBYTE(p->RIOHosts[RIONumHosts].Unique[3])&0xFF)<<24);
805 INBZ(EisaSlot,EISA_INTERRUPT_RESET);
806 RIONumHosts++;
807 ret++;
808 }
809 else
810 {
811 /*
812 ** It failed the test, so ignore it.
813 */
814 rio_dprintk (RIO_DEBUG_INIT, "TEST FAILED\n");
815
816 RIOMapout(Paddr, RIO_EISA_MEM_SIZE, Caddr );
817 }
818 }
819 }
820 if (RIOMachineType & RIO_EISA)
821 return ret+1;
822 return ret;
823 }
824 #endif
825
826
827 #ifndef linux
828
829 #define CONFIG_ADDRESS 0xcf8
830 #define CONFIG_DATA 0xcfc
831 #define FORWARD_REG 0xcfa
832
833
834 static int
835 read_config(int bus_number, int device_num, int r_number)
836 {
837 unsigned int cav;
838 unsigned int val;
839
840 /*
841 Build config_address_value:
842
843 31 24 23 16 15 11 10 8 7 0
844 ------------------------------------------------------
845 |1| 0000000 | bus_number | device # | 000 | register |
846 ------------------------------------------------------
847 */
848
849 cav = r_number & 0xff;
850 cav |= ((device_num & 0x1f) << 11);
851 cav |= ((bus_number & 0xff) << 16);
852 cav |= 0x80000000; /* Enable bit */
853 outpd(CONFIG_ADDRESS,cav);
854 val = inpd(CONFIG_DATA);
855 outpd(CONFIG_ADDRESS,0);
856 return val;
857 }
858
859 static
860 write_config(bus_number,device_num,r_number,val)
861 {
862 unsigned int cav;
863
864 /*
865 Build config_address_value:
866
867 31 24 23 16 15 11 10 8 7 0
868 ------------------------------------------------------
869 |1| 0000000 | bus_number | device # | 000 | register |
870 ------------------------------------------------------
871 */
872
873 cav = r_number & 0xff;
874 cav |= ((device_num & 0x1f) << 11);
875 cav |= ((bus_number & 0xff) << 16);
876 cav |= 0x80000000; /* Enable bit */
877 outpd(CONFIG_ADDRESS, cav);
878 outpd(CONFIG_DATA, val);
879 outpd(CONFIG_ADDRESS, 0);
880 return val;
881 }
882 #else
883 /* XXX Implement these... */
884 static int
885 read_config(int bus_number, int device_num, int r_number)
886 {
887 return 0;
888 }
889
890 static int
891 write_config(int bus_number, int device_num, int r_number)
892 {
893 return 0;
894 }
895
896 #endif
897
898 int
899 RIOPCIinit(p, Mode)
900 struct rio_info *p;
901 int Mode;
902 {
903 #define MAX_PCI_SLOT 32
904 #define RIO_PCI_JET_CARD 0x200011CB
905
906 static int slot; /* count of machine's PCI slots searched so far */
907 caddr_t Caddr; /* Virtual address of the current PCI host card. */
908 unsigned char Ivec; /* interrupt vector for the current PCI host */
909 unsigned long Paddr; /* Physical address for the current PCI host */
910 int Handle; /* Handle to Virtual memory allocated for current PCI host */
911
912
913 rio_dprintk (RIO_DEBUG_INIT, "Search for a RIO PCI card - start at slot %d\n", slot);
914
915 /*
916 ** Initialise the search status
917 */
918 p->RIOLastPCISearch = RIO_FAIL;
919
920 while ( (slot < MAX_PCI_SLOT) & (p->RIOLastPCISearch != RIO_SUCCESS) )
921 {
922 rio_dprintk (RIO_DEBUG_INIT, "Currently testing slot %d\n", slot);
923
924 if (read_config(0,slot,0) == RIO_PCI_JET_CARD) {
925 p->RIOHosts[p->RIONumHosts].Ivec = 0;
926 Paddr = read_config(0,slot,0x18);
927 Paddr = Paddr - (Paddr & 0x1); /* Mask off the io bit */
928
929 if ( (Paddr == 0) || ((Paddr & 0xffff0000) == 0xffff0000) ) {
930 rio_dprintk (RIO_DEBUG_INIT, "Goofed up slot\n"); /* what! */
931 slot++;
932 continue;
933 }
934
935 p->RIOHosts[p->RIONumHosts].PaddrP = Paddr;
936 Ivec = (read_config(0,slot,0x3c) & 0xff);
937
938 rio_dprintk (RIO_DEBUG_INIT, "PCI Host at 0x%x, Intr %d\n", (int)Paddr, Ivec);
939
940 Handle = RIOMapin( Paddr, RIO_PCI_MEM_SIZE, &Caddr );
941 if (Handle == -1) {
942 rio_dprintk (RIO_DEBUG_INIT, "Couldn't map %d bytes at 0x%x\n", RIO_PCI_MEM_SIZE, (int)Paddr);
943 slot++;
944 continue;
945 }
946 p->RIOHosts[p->RIONumHosts].Ivec = Ivec + 32;
947 p->intr_tid = iointset(p->RIOHosts[p->RIONumHosts].Ivec,
948 (int (*)())rio_intr, (char *)p->RIONumHosts);
949 if (RIOBoardTest( Paddr, Caddr, RIO_PCI, 0 ) == RIO_SUCCESS) {
950 rio_dprintk (RIO_DEBUG_INIT, ("Board has passed test\n");
951 rio_dprintk (RIO_DEBUG_INIT, ("Paddr 0x%x. Caddr 0x%x. Mode 0x%x.\n", Paddr, Caddr, Mode);
952
953 /*
954 ** Board has passed its scrub test. Fill in all the
955 ** transient stuff.
956 */
957 p->RIOHosts[p->RIONumHosts].Slot = 0;
958 p->RIOHosts[p->RIONumHosts].Ivec = Ivec + 32;
959 p->RIOHosts[p->RIONumHosts].Type = RIO_PCI;
960 p->RIOHosts[p->RIONumHosts].Copy = rio_pcicopy;
961 p->RIOHosts[p->RIONumHosts].PaddrP = Paddr;
962 p->RIOHosts[p->RIONumHosts].Caddr = Caddr;
963 p->RIOHosts[p->RIONumHosts].CardP = (struct DpRam *)Caddr;
964 p->RIOHosts[p->RIONumHosts].Mode = Mode;
965
966 #if 0
967 WBYTE(p->RIOHosts[p->RIONumHosts].Control,
968 BOOT_FROM_RAM | EXTERNAL_BUS_OFF |
969 p->RIOHosts[p->RIONumHosts].Mode |
970 INTERRUPT_DISABLE );
971 WBYTE(p->RIOHosts[p->RIONumHosts].ResetInt,0xff);
972 WBYTE(p->RIOHosts[p->RIONumHosts].Control,
973 BOOT_FROM_RAM | EXTERNAL_BUS_OFF |
974 p->RIOHosts[p->RIONumHosts].Mode |
975 INTERRUPT_DISABLE );
976 WBYTE(p->RIOHosts[p->RIONumHosts].ResetInt,0xff);
977 #else
978 WBYTE(p->RIOHosts[p->RIONumHosts].ResetInt, 0xff);
979 #endif
980 p->RIOHosts[p->RIONumHosts].UniqueNum =
981 ((RBYTE(p->RIOHosts[p->RIONumHosts].Unique[0])&0xFF)<<0)|
982 ((RBYTE(p->RIOHosts[p->RIONumHosts].Unique[1])&0xFF)<<8)|
983 ((RBYTE(p->RIOHosts[p->RIONumHosts].Unique[2])&0xFF)<<16)|
984 ((RBYTE(p->RIOHosts[p->RIONumHosts].Unique[3])&0xFF)<<24);
985
986 rio_dprintk (RIO_DEBUG_INIT, "Unique no 0x%x.\n",
987 p->RIOHosts[p->RIONumHosts].UniqueNum);
988
989 p->RIOLastPCISearch = RIO_SUCCESS;
990 p->RIONumHosts++;
991 }
992 }
993 slot++;
994 }
995
996 if ( slot >= MAX_PCI_SLOT ) {
997 rio_dprintk (RIO_DEBUG_INIT, "All %d PCI slots have tested for RIO cards !!!\n",
998 MAX_PCI_SLOT);
999 }
1000
1001
1002 /*
1003 ** I don't think we want to do this anymore
1004 **
1005
1006 if (!p->RIOLastPCISearch == RIO_FAIL ) {
1007 p->RIOFailed++;
1008 }
1009
1010 **
1011 */
1012 }
1013
1014 #ifdef FUTURE_RELEASE
1015 void riohalt( void )
1016 {
1017 int host;
1018 for ( host=0; host<p->RIONumHosts; host++ )
1019 {
1020 rio_dprintk (RIO_DEBUG_INIT, "Stop host %d\n", host);
1021 (void)RIOBoardTest( p->RIOHosts[host].PaddrP, p->RIOHosts[host].Caddr, p->RIOHosts[host].Type,p->RIOHosts[host].Slot );
1022 }
1023 }
1024 #endif
1025 #endif
1026
1027 static uchar val[] = {
1028 #ifdef VERY_LONG_TEST
1029 0x00, 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80,
1030 0xa5, 0xff, 0x5a, 0x00, 0xff, 0xc9, 0x36,
1031 #endif
1032 0xff, 0x00, 0x00 };
1033
1034 #define TEST_END sizeof(val)
1035
1036 /*
1037 ** RAM test a board.
1038 ** Nothing too complicated, just enough to check it out.
1039 */
1040 int
1041 RIOBoardTest(paddr, caddr, type, slot)
1042 paddr_t paddr;
1043 caddr_t caddr;
1044 uchar type;
1045 int slot;
1046 {
1047 struct DpRam *DpRam = (struct DpRam *)caddr;
1048 char *ram[4];
1049 int size[4];
1050 int op, bank;
1051 int nbanks;
1052
1053 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Reset host type=%d, DpRam=0x%x, slot=%d\n",
1054 type,(int)DpRam, slot);
1055
1056 RIOHostReset(type, DpRam, slot);
1057
1058 /*
1059 ** Scrub the memory. This comes in several banks:
1060 ** DPsram1 - 7000h bytes
1061 ** DPsram2 - 200h bytes
1062 ** DPsram3 - 7000h bytes
1063 ** scratch - 1000h bytes
1064 */
1065
1066 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Setup ram/size arrays\n");
1067
1068 size[0] = DP_SRAM1_SIZE;
1069 size[1] = DP_SRAM2_SIZE;
1070 size[2] = DP_SRAM3_SIZE;
1071 size[3] = DP_SCRATCH_SIZE;
1072
1073 ram[0] = (char *)&DpRam->DpSram1[0];
1074 ram[1] = (char *)&DpRam->DpSram2[0];
1075 ram[2] = (char *)&DpRam->DpSram3[0];
1076 nbanks = (type == RIO_PCI) ? 3 : 4;
1077 if (nbanks == 4)
1078 ram[3] = (char *)&DpRam->DpScratch[0];
1079
1080
1081 if (nbanks == 3) {
1082 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Memory: 0x%x(0x%x), 0x%x(0x%x), 0x%x(0x%x)\n",
1083 (int)ram[0], size[0], (int)ram[1], size[1], (int)ram[2], size[2]);
1084 } else {
1085 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: 0x%x(0x%x), 0x%x(0x%x), 0x%x(0x%x), 0x%x(0x%x)\n",
1086 (int)ram[0], size[0], (int)ram[1], size[1], (int)ram[2], size[2], (int)ram[3],
1087 size[3]);
1088 }
1089
1090 /*
1091 ** This scrub operation will test for crosstalk between
1092 ** banks. TEST_END is a magic number, and relates to the offset
1093 ** within the 'val' array used by Scrub.
1094 */
1095 for (op=0; op<TEST_END; op++) {
1096 for (bank=0; bank<nbanks; bank++) {
1097 if (RIOScrub(op, (BYTE *)ram[bank], size[bank]) == RIO_FAIL) {
1098 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: RIOScrub band %d, op %d failed\n",
1099 bank, op);
1100 return RIO_FAIL;
1101 }
1102 }
1103 }
1104
1105 rio_dprintk (RIO_DEBUG_INIT, "Test completed\n");
1106 return RIO_SUCCESS;
1107 }
1108
1109
1110 /*
1111 ** Scrub an area of RAM.
1112 ** Define PRETEST and POSTTEST for a more thorough checking of the
1113 ** state of the memory.
1114 ** Call with op set to an index into the above 'val' array to determine
1115 ** which value will be written into memory.
1116 ** Call with op set to zero means that the RAM will not be read and checked
1117 ** before it is written.
1118 ** Call with op not zero, and the RAM will be read and compated with val[op-1]
1119 ** to check that the data from the previous phase was retained.
1120 */
1121 int
1122 RIOScrub(op, ram, size)
1123 int op;
1124 BYTE * ram;
1125 int size;
1126 {
1127 int off;
1128 unsigned char oldbyte;
1129 unsigned char newbyte;
1130 unsigned char invbyte;
1131 unsigned short oldword;
1132 unsigned short newword;
1133 unsigned short invword;
1134 unsigned short swapword;
1135
1136 if (op) {
1137 oldbyte = val[op-1];
1138 oldword = oldbyte | (oldbyte<<8);
1139 } else
1140 oldbyte = oldword = 0; /* Tell the compiler we've initilalized them. */
1141 newbyte = val[op];
1142 newword = newbyte | (newbyte<<8);
1143 invbyte = ~newbyte;
1144 invword = invbyte | (invbyte<<8);
1145
1146 /*
1147 ** Check that the RAM contains the value that should have been left there
1148 ** by the previous test (not applicable for pass zero)
1149 */
1150 if (op) {
1151 for (off=0; off<size; off++) {
1152 if (RBYTE(ram[off]) != oldbyte) {
1153 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Byte Pre Check 1: BYTE at offset 0x%x should have been=%x, was=%x\n", off, oldbyte, RBYTE(ram[off]));
1154 return RIO_FAIL;
1155 }
1156 }
1157 for (off=0; off<size; off+=2) {
1158 if (*(ushort *)&ram[off] != oldword) {
1159 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Word Pre Check: WORD at offset 0x%x should have been=%x, was=%x\n",off,oldword,*(ushort *)&ram[off]);
1160 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Word Pre Check: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, RBYTE(ram[off]), off+1, RBYTE(ram[off+1]));
1161 return RIO_FAIL;
1162 }
1163 }
1164 }
1165
1166 /*
1167 ** Now write the INVERSE of the test data into every location, using
1168 ** BYTE write operations, first checking before each byte is written
1169 ** that the location contains the old value still, and checking after
1170 ** the write that the location contains the data specified - this is
1171 ** the BYTE read/write test.
1172 */
1173 for (off=0; off<size; off++) {
1174 if (op && (RBYTE(ram[off]) != oldbyte)) {
1175 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Byte Pre Check 2: BYTE at offset 0x%x should have been=%x, was=%x\n", off, oldbyte, RBYTE(ram[off]));
1176 return RIO_FAIL;
1177 }
1178 WBYTE(ram[off],invbyte);
1179 if (RBYTE(ram[off]) != invbyte) {
1180 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Byte Inv Check: BYTE at offset 0x%x should have been=%x, was=%x\n", off, invbyte, RBYTE(ram[off]));
1181 return RIO_FAIL;
1182 }
1183 }
1184
1185 /*
1186 ** now, use WORD operations to write the test value into every location,
1187 ** check as before that the location contains the previous test value
1188 ** before overwriting, and that it contains the data value written
1189 ** afterwards.
1190 ** This is the WORD operation test.
1191 */
1192 for (off=0; off<size; off+=2) {
1193 if (*(ushort *)&ram[off] != invword) {
1194 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Word Inv Check: WORD at offset 0x%x should have been=%x, was=%x\n", off, invword, *(ushort *)&ram[off]);
1195 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Word Inv Check: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, RBYTE(ram[off]), off+1, RBYTE(ram[off+1]));
1196 return RIO_FAIL;
1197 }
1198
1199 *(ushort *)&ram[off] = newword;
1200 if ( *(ushort *)&ram[off] != newword ) {
1201 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Word Check 1: WORD at offset 0x%x should have been=%x, was=%x\n", off, newword, *(ushort *)&ram[off]);
1202 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Word Check 1: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, RBYTE(ram[off]), off+1, RBYTE(ram[off+1]));
1203 return RIO_FAIL;
1204 }
1205 }
1206
1207 /*
1208 ** now run through the block of memory again, first in byte mode
1209 ** then in word mode, and check that all the locations contain the
1210 ** required test data.
1211 */
1212 for (off=0; off<size; off++) {
1213 if (RBYTE(ram[off]) != newbyte) {
1214 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Byte Check: BYTE at offset 0x%x should have been=%x, was=%x\n", off, newbyte, RBYTE(ram[off]));
1215 return RIO_FAIL;
1216 }
1217 }
1218
1219 for (off=0; off<size; off+=2) {
1220 if ( *(ushort *)&ram[off] != newword ) {
1221 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Word Check 2: WORD at offset 0x%x should have been=%x, was=%x\n", off, newword, *(ushort *)&ram[off]);
1222 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Word Check 2: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, RBYTE(ram[off]), off+1, RBYTE(ram[off+1]));
1223 return RIO_FAIL;
1224 }
1225 }
1226
1227 /*
1228 ** time to check out byte swapping errors
1229 */
1230 swapword = invbyte | (newbyte << 8);
1231
1232 for (off=0; off<size; off+=2) {
1233 WBYTE(ram[off],invbyte);
1234 WBYTE(ram[off+1],newbyte);
1235 }
1236
1237 for ( off=0; off<size; off+=2 ) {
1238 if (*(ushort *)&ram[off] != swapword) {
1239 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: SwapWord Check 1: WORD at offset 0x%x should have been=%x, was=%x\n", off, swapword, *((ushort *)&ram[off]));
1240 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: SwapWord Check 1: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, RBYTE(ram[off]), off+1, RBYTE(ram[off+1]));
1241 return RIO_FAIL;
1242 }
1243 *((ushort *)&ram[off]) = ~swapword;
1244 }
1245
1246 for (off=0; off<size; off+=2) {
1247 if (RBYTE(ram[off]) != newbyte) {
1248 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: SwapWord Check 2: BYTE at offset 0x%x should have been=%x, was=%x\n", off, newbyte, RBYTE(ram[off]));
1249 return RIO_FAIL;
1250 }
1251 if (RBYTE(ram[off+1]) != invbyte) {
1252 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: SwapWord Check 2: BYTE at offset 0x%x should have been=%x, was=%x\n", off+1, invbyte, RBYTE(ram[off+1]));
1253 return RIO_FAIL;
1254 }
1255 *((ushort *)&ram[off]) = newword;
1256 }
1257 return RIO_SUCCESS;
1258 }
1259
1260 /*
1261 ** try to ensure that every host is either in polled mode
1262 ** or is in interrupt mode. Only allow interrupt mode if
1263 ** all hosts can interrupt (why?)
1264 ** and force into polled mode if told to. Patch up the
1265 ** interrupt vector & salute The Queen when you've done.
1266 */
1267 void
1268 RIOAllocateInterrupts(p)
1269 struct rio_info * p;
1270 {
1271 int Host;
1272
1273 /*
1274 ** Easy case - if we have been told to poll, then we poll.
1275 */
1276 if (p->mode & POLLED_MODE) {
1277 RIOStopInterrupts(p, 0, 0);
1278 return;
1279 }
1280
1281 /*
1282 ** check - if any host has been set to polled mode, then all must be.
1283 */
1284 for (Host=0; Host<p->RIONumHosts; Host++) {
1285 if ( (p->RIOHosts[Host].Type != RIO_AT) &&
1286 (p->RIOHosts[Host].Ivec == POLLED) ) {
1287 RIOStopInterrupts(p, 1, Host );
1288 return;
1289 }
1290 }
1291 for (Host=0; Host<p->RIONumHosts; Host++) {
1292 if (p->RIOHosts[Host].Type == RIO_AT) {
1293 if ( (p->RIOHosts[Host].Ivec - 32) == 0) {
1294 RIOStopInterrupts(p, 2, Host );
1295 return;
1296 }
1297 }
1298 }
1299 }
1300
1301 /*
1302 ** something has decided that we can't be doing with these
1303 ** new-fangled interrupt thingies. Set everything up to just
1304 ** poll.
1305 */
1306 void
1307 RIOStopInterrupts(p, Reason, Host)
1308 struct rio_info * p;
1309 int Reason;
1310 int Host;
1311 {
1312 #ifdef FUTURE_RELEASE
1313 switch (Reason) {
1314 case 0: /* forced into polling by rio_polled */
1315 break;
1316 case 1: /* SCU has set 'Host' into polled mode */
1317 break;
1318 case 2: /* there aren't enough interrupt vectors for 'Host' */
1319 break;
1320 }
1321 #endif
1322
1323 for (Host=0; Host<p->RIONumHosts; Host++ ) {
1324 struct Host *HostP = &p->RIOHosts[Host];
1325
1326 switch (HostP->Type) {
1327 case RIO_AT:
1328 /*
1329 ** The AT host has it's interrupts disabled by clearing the
1330 ** int_enable bit.
1331 */
1332 HostP->Mode &= ~INTERRUPT_ENABLE;
1333 HostP->Ivec = POLLED;
1334 break;
1335 #ifdef FUTURE_RELEASE
1336 case RIO_EISA:
1337 /*
1338 ** The EISA host has it's interrupts disabled by setting the
1339 ** Ivec to zero
1340 */
1341 HostP->Ivec = POLLED;
1342 break;
1343 #endif
1344 case RIO_PCI:
1345 /*
1346 ** The PCI host has it's interrupts disabled by clearing the
1347 ** int_enable bit, like a regular host card.
1348 */
1349 HostP->Mode &= ~RIO_PCI_INT_ENABLE;
1350 HostP->Ivec = POLLED;
1351 break;
1352 #ifdef FUTURE_RELEASE
1353 case RIO_MCA:
1354 /*
1355 ** There's always one, isn't there?
1356 ** The MCA host card cannot have it's interrupts disabled.
1357 */
1358 RIOPatchVec(HostP);
1359 break;
1360 #endif
1361 }
1362 }
1363 }
1364
1365 #if 0
1366 /*
1367 ** This function is called at init time to setup the data structures.
1368 */
1369 void
1370 RIOAllocDataStructs(p)
1371 struct rio_info * p;
1372 {
1373 int port,
1374 host,
1375 tm;
1376
1377 p->RIOPortp = (struct Port *)sysbrk(RIO_PORTS * sizeof(struct Port));
1378 if (!p->RIOPortp) {
1379 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: No memory for port structures\n");
1380 p->RIOFailed++;
1381 return;
1382 }
1383 bzero( p->RIOPortp, sizeof(struct Port) * RIO_PORTS );
1384 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: allocated and cleared memory for port structs\n");
1385 rio_dprintk (RIO_DEBUG_INIT, "First RIO port struct @0x%x, size=0x%x bytes\n",
1386 (int)p->RIOPortp, sizeof(struct Port));
1387
1388 for( port=0; port<RIO_PORTS; port++ ) {
1389 p->RIOPortp[port].PortNum = port;
1390 p->RIOPortp[port].TtyP = &p->channel[port];
1391 sreset (p->RIOPortp[port].InUse); /* Let the first guy uses it */
1392 p->RIOPortp[port].portSem = -1; /* Let the first guy takes it */
1393 p->RIOPortp[port].ParamSem = -1; /* Let the first guy takes it */
1394 p->RIOPortp[port].timeout_id = 0; /* Let the first guy takes it */
1395 }
1396
1397 p->RIOHosts = (struct Host *)sysbrk(RIO_HOSTS * sizeof(struct Host));
1398 if (!p->RIOHosts) {
1399 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: No memory for host structures\n");
1400 p->RIOFailed++;
1401 return;
1402 }
1403 bzero(p->RIOHosts, sizeof(struct Host)*RIO_HOSTS);
1404 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: allocated and cleared memory for host structs\n");
1405 rio_dprintk (RIO_DEBUG_INIT, "First RIO host struct @0x%x, size=0x%x bytes\n",
1406 (int)p->RIOHosts, sizeof(struct Host));
1407
1408 for( host=0; host<RIO_HOSTS; host++ ) {
1409 spin_lock_init (&p->RIOHosts[host].HostLock);
1410 p->RIOHosts[host].timeout_id = 0; /* Let the first guy takes it */
1411 }
1412 /*
1413 ** check that the buffer size is valid, round down to the next power of
1414 ** two if necessary; if the result is zero, then, hey, no double buffers.
1415 */
1416 for ( tm = 1; tm && tm <= p->RIOConf.BufferSize; tm <<= 1 )
1417 ;
1418 tm >>= 1;
1419 p->RIOBufferSize = tm;
1420 p->RIOBufferMask = tm ? tm - 1 : 0;
1421 }
1422
1423 /*
1424 ** this function gets called whenever the data structures need to be
1425 ** re-setup, for example, after a riohalt (why did I ever invent it?)
1426 */
1427 void
1428 RIOSetupDataStructs(p)
1429 struct rio_info * p;
1430 {
1431 int host, entry, rup;
1432
1433 for ( host=0; host<RIO_HOSTS; host++ ) {
1434 struct Host *HostP = &p->RIOHosts[host];
1435 for ( entry=0; entry<LINKS_PER_UNIT; entry++ ) {
1436 HostP->Topology[entry].Unit = ROUTE_DISCONNECT;
1437 HostP->Topology[entry].Link = NO_LINK;
1438 }
1439 bcopy("HOST X", HostP->Name, 7);
1440 HostP->Name[5] = '1'+host;
1441 for (rup=0; rup<(MAX_RUP + LINKS_PER_UNIT); rup++) {
1442 if (rup < MAX_RUP) {
1443 for (entry=0; entry<LINKS_PER_UNIT; entry++ ) {
1444 HostP->Mapping[rup].Topology[entry].Unit = ROUTE_DISCONNECT;
1445 HostP->Mapping[rup].Topology[entry].Link = NO_LINK;
1446 }
1447 RIODefaultName(p, HostP, rup);
1448 }
1449 HostP->UnixRups[rup].RupLock = SPIN_LOCK_UNLOCKED;
1450 }
1451 }
1452 }
1453 #endif
1454
1455 int
1456 RIODefaultName(p, HostP, UnitId)
1457 struct rio_info * p;
1458 struct Host * HostP;
1459 uint UnitId;
1460 {
1461 #ifdef CHECK
1462 CheckHost( Host );
1463 CheckUnitId( UnitId );
1464 #endif
1465 bcopy("UNKNOWN RTA X-XX",HostP->Mapping[UnitId].Name,17);
1466 HostP->Mapping[UnitId].Name[12]='1'+(HostP-p->RIOHosts);
1467 if ((UnitId+1) > 9) {
1468 HostP->Mapping[UnitId].Name[14]='0'+((UnitId+1)/10);
1469 HostP->Mapping[UnitId].Name[15]='0'+((UnitId+1)%10);
1470 }
1471 else {
1472 HostP->Mapping[UnitId].Name[14]='1'+UnitId;
1473 HostP->Mapping[UnitId].Name[15]=0;
1474 }
1475 return 0;
1476 }
1477
1478 #define RIO_RELEASE "Linux"
1479 #define RELEASE_ID "1.0"
1480
1481 int
1482 RIOReport(p)
1483 struct rio_info * p;
1484 {
1485 char * RIORelease = RIO_RELEASE;
1486 char * RIORelID = RELEASE_ID;
1487 int host;
1488
1489 rio_dprintk (RIO_DEBUG_INIT, "RIO : Release: %s ID: %s\n", RIORelease, RIORelID);
1490
1491 if ( p->RIONumHosts==0 ) {
1492 rio_dprintk (RIO_DEBUG_INIT, "\nNo Hosts configured\n");
1493 return(0);
1494 }
1495
1496 for ( host=0; host < p->RIONumHosts; host++ ) {
1497 struct Host *HostP = &p->RIOHosts[host];
1498 switch ( HostP->Type ) {
1499 case RIO_AT:
1500 rio_dprintk (RIO_DEBUG_INIT, "AT BUS : found the card at 0x%x\n", HostP->PaddrP);
1501 }
1502 }
1503 return 0;
1504 }
1505
1506 /*
1507 ** This function returns release/version information as used by ioctl() calls
1508 ** It returns a MAX_VERSION_LEN byte string, null terminated.
1509 */
1510 char *
1511 OLD_RIOVersid( void )
1512 {
1513 static char Info[MAX_VERSION_LEN];
1514 char * RIORelease = RIO_RELEASE;
1515 char * cp;
1516 int ct = 0;
1517
1518 for ( ct=0; RIORelease[ct] && ct<MAX_VERSION_LEN; ct++ )
1519 Info[ct] = RIORelease[ct];
1520 if ( ct>=MAX_VERSION_LEN ) {
1521 Info[MAX_VERSION_LEN-1] = '\0';
1522 return Info;
1523 }
1524 Info[ct++]=' ';
1525 if ( ct>=MAX_VERSION_LEN ) {
1526 Info[MAX_VERSION_LEN-1] = '\0';
1527 return Info;
1528 }
1529
1530 cp=""; /* Fill the RCS Id here */
1531
1532 while ( *cp && ct<MAX_VERSION_LEN )
1533 Info[ct++] = *cp++;
1534 if ( ct<MAX_VERSION_LEN-1 )
1535 Info[ct] = '\0';
1536 Info[MAX_VERSION_LEN-1] = '\0';
1537 return Info;
1538 }
1539
1540
1541 static struct rioVersion stVersion;
1542
1543 struct rioVersion *
1544 RIOVersid(void)
1545 {
1546 strncpy(stVersion.version, "RIO driver for linux V1.0", 255);
1547 strncpy(stVersion.buildDate, __DATE__, 255);
1548
1549 return &stVersion;
1550 }
1551
1552 #if 0
1553 int
1554 RIOMapin(paddr, size, vaddr)
1555 paddr_t paddr;
1556 int size;
1557 caddr_t * vaddr;
1558 {
1559 *vaddr = (caddr_t)permap( (long)paddr, size);
1560 return ((int)*vaddr);
1561 }
1562
1563 void
1564 RIOMapout(paddr, size, vaddr)
1565 paddr_t paddr;
1566 long size;
1567 caddr_t vaddr;
1568 {
1569 }
1570 #endif
1571
1572
1573 void
1574 RIOHostReset(Type, DpRamP, Slot)
1575 uint Type;
1576 volatile struct DpRam *DpRamP;
1577 uint Slot;
1578 {
1579 /*
1580 ** Reset the Tpu
1581 */
1582 rio_dprintk (RIO_DEBUG_INIT, "RIOHostReset: type 0x%x", Type);
1583 switch ( Type ) {
1584 case RIO_AT:
1585 rio_dprintk (RIO_DEBUG_INIT, " (RIO_AT)\n");
1586 WBYTE(DpRamP->DpControl, BOOT_FROM_RAM | EXTERNAL_BUS_OFF |
1587 INTERRUPT_DISABLE | BYTE_OPERATION |
1588 SLOW_LINKS | SLOW_AT_BUS);
1589 WBYTE(DpRamP->DpResetTpu, 0xFF);
1590 rio_udelay (3);
1591
1592 rio_dprintk (RIO_DEBUG_INIT, "RIOHostReset: Don't know if it worked. Try reset again\n");
1593 WBYTE(DpRamP->DpControl, BOOT_FROM_RAM | EXTERNAL_BUS_OFF |
1594 INTERRUPT_DISABLE | BYTE_OPERATION |
1595 SLOW_LINKS | SLOW_AT_BUS);
1596 WBYTE(DpRamP->DpResetTpu, 0xFF);
1597 rio_udelay (3);
1598 break;
1599 #ifdef FUTURE_RELEASE
1600 case RIO_EISA:
1601 /*
1602 ** Bet this doesn't work!
1603 */
1604 OUTBZ( Slot, EISA_CONTROL_PORT,
1605 EISA_TP_RUN | EISA_TP_BUS_DISABLE |
1606 EISA_TP_SLOW_LINKS | EISA_TP_BOOT_FROM_RAM );
1607 OUTBZ( Slot, EISA_CONTROL_PORT,
1608 EISA_TP_RESET | EISA_TP_BUS_DISABLE |
1609 EISA_TP_SLOW_LINKS | EISA_TP_BOOT_FROM_RAM );
1610 suspend( 3 );
1611 OUTBZ( Slot, EISA_CONTROL_PORT,
1612 EISA_TP_RUN | EISA_TP_BUS_DISABLE |
1613 EISA_TP_SLOW_LINKS | EISA_TP_BOOT_FROM_RAM );
1614 break;
1615 case RIO_MCA:
1616 WBYTE(DpRamP->DpControl , McaTpBootFromRam | McaTpBusDisable );
1617 WBYTE(DpRamP->DpResetTpu , 0xFF );
1618 suspend( 3 );
1619 WBYTE(DpRamP->DpControl , McaTpBootFromRam | McaTpBusDisable );
1620 WBYTE(DpRamP->DpResetTpu , 0xFF );
1621 suspend( 3 );
1622 break;
1623 #endif
1624 case RIO_PCI:
1625 rio_dprintk (RIO_DEBUG_INIT, " (RIO_PCI)\n");
1626 DpRamP->DpControl = RIO_PCI_BOOT_FROM_RAM;
1627 DpRamP->DpResetInt = 0xFF;
1628 DpRamP->DpResetTpu = 0xFF;
1629 rio_udelay (100);
1630 /* for (i=0; i<6000; i++); */
1631 /* suspend( 3 ); */
1632 break;
1633 #ifdef FUTURE_RELEASE
1634 default:
1635 Rprintf(RIOMesgNoSupport,Type,DpRamP,Slot);
1636 return;
1637 #endif
1638
1639 default:
1640 rio_dprintk (RIO_DEBUG_INIT, " (UNKNOWN)\n");
1641 break;
1642 }
1643 return;
1644 }
1645