File: /usr/src/linux/drivers/ide/dtc2278.c

1     /*
2      *  linux/drivers/ide/dtc2278.c		Version 0.02	Feb 10, 1996
3      *
4      *  Copyright (C) 1996  Linus Torvalds & author (see below)
5      */
6     
7     #undef REALLY_SLOW_IO           /* most systems can safely undef this */
8     
9     #include <linux/types.h>
10     #include <linux/kernel.h>
11     #include <linux/delay.h>
12     #include <linux/timer.h>
13     #include <linux/mm.h>
14     #include <linux/ioport.h>
15     #include <linux/blkdev.h>
16     #include <linux/hdreg.h>
17     #include <linux/ide.h>
18     #include <linux/init.h>
19     
20     #include <asm/io.h>
21     
22     #include "ide_modes.h"
23     
24     /*
25      * Changing this #undef to #define may solve start up problems in some systems.
26      */
27     #undef ALWAYS_SET_DTC2278_PIO_MODE
28     
29     /*
30      * From: andy@cercle.cts.com (Dyan Wile)
31      *
32      * Below is a patch for DTC-2278 - alike software-programmable controllers
33      * The code enables the secondary IDE controller and the PIO4 (3?) timings on
34      * the primary (EIDE). You may probably have to enable the 32-bit support to
35      * get the full speed. You better get the disk interrupts disabled ( hdparm -u0
36      * /dev/hd.. ) for the drives connected to the EIDE interface. (I get my
37      * filesystem  corrupted with -u1, but under heavy disk load only :-)
38      *
39      * This card is now forced to use the "serialize" feature,
40      * and irq-unmasking is disallowed.  If io_32bit is enabled,
41      * it must be done for BOTH drives on each interface.
42      *
43      * This code was written for the DTC2278E, but might work with any of these:
44      *
45      * DTC2278S has only a single IDE interface.
46      * DTC2278D has two IDE interfaces and is otherwise identical to the S version.
47      * DTC2278E also has serial ports and a printer port
48      * DTC2278EB: has onboard BIOS, and "works like a charm" -- Kent Bradford <kent@theory.caltech.edu>
49      *
50      * There may be a fourth controller type. The S and D versions use the
51      * Winbond chip, and I think the E version does also.
52      *
53      */
54     
55     static void sub22 (char b, char c)
56     {
57     	int i;
58     
59     	for(i = 0; i < 3; ++i) {
60     		inb(0x3f6);
61     		outb_p(b,0xb0);
62     		inb(0x3f6);
63     		outb_p(c,0xb4);
64     		inb(0x3f6);
65     		if(inb(0xb4) == c) {
66     			outb_p(7,0xb0);
67     			inb(0x3f6);
68     			return;	/* success */
69     		}
70     	}
71     }
72     
73     static void tune_dtc2278 (ide_drive_t *drive, byte pio)
74     {
75     	unsigned long flags;
76     
77     	pio = ide_get_best_pio_mode(drive, pio, 4, NULL);
78     
79     	if (pio >= 3) {
80     		save_flags(flags);	/* all CPUs */
81     		cli();			/* all CPUs */
82     		/*
83     		 * This enables PIO mode4 (3?) on the first interface
84     		 */
85     		sub22(1,0xc3);
86     		sub22(0,0xa0);
87     		restore_flags(flags);	/* all CPUs */
88     	} else {
89     		/* we don't know how to set it back again.. */
90     	}
91     
92     	/*
93     	 * 32bit I/O has to be enabled for *both* drives at the same time.
94     	 */
95     	drive->io_32bit = 1;
96     	HWIF(drive)->drives[!drive->select.b.unit].io_32bit = 1;
97     }
98     
99     void __init init_dtc2278 (void)
100     {
101     	unsigned long flags;
102     
103     	__save_flags(flags);	/* local CPU only */
104     	__cli();		/* local CPU only */
105     	/*
106     	 * This enables the second interface
107     	 */
108     	outb_p(4,0xb0);
109     	inb(0x3f6);
110     	outb_p(0x20,0xb4);
111     	inb(0x3f6);
112     #ifdef ALWAYS_SET_DTC2278_PIO_MODE
113     	/*
114     	 * This enables PIO mode4 (3?) on the first interface
115     	 * and may solve start-up problems for some people.
116     	 */
117     	sub22(1,0xc3);
118     	sub22(0,0xa0);
119     #endif
120     	__restore_flags(flags);	/* local CPU only */
121     
122     	ide_hwifs[0].serialized = 1;
123     	ide_hwifs[1].serialized = 1;
124     	ide_hwifs[0].chipset = ide_dtc2278;
125     	ide_hwifs[1].chipset = ide_dtc2278;
126     	ide_hwifs[0].tuneproc = &tune_dtc2278;
127     	ide_hwifs[0].drives[0].no_unmask = 1;
128     	ide_hwifs[0].drives[1].no_unmask = 1;
129     	ide_hwifs[1].drives[0].no_unmask = 1;
130     	ide_hwifs[1].drives[1].no_unmask = 1;
131     	ide_hwifs[0].mate = &ide_hwifs[1];
132     	ide_hwifs[1].mate = &ide_hwifs[0];
133     	ide_hwifs[1].channel = 1;
134     }
135