File: /usr/src/linux/drivers/ide/ide-dma.c
1 /*
2 * linux/drivers/ide/ide-dma.c Version 4.10 June 9, 2000
3 *
4 * Copyright (c) 1999-2000 Andre Hedrick <andre@linux-ide.org>
5 * May be copied or modified under the terms of the GNU General Public License
6 */
7
8 /*
9 * Special Thanks to Mark for his Six years of work.
10 *
11 * Copyright (c) 1995-1998 Mark Lord
12 * May be copied or modified under the terms of the GNU General Public License
13 */
14
15 /*
16 * This module provides support for the bus-master IDE DMA functions
17 * of various PCI chipsets, including the Intel PIIX (i82371FB for
18 * the 430 FX chipset), the PIIX3 (i82371SB for the 430 HX/VX and
19 * 440 chipsets), and the PIIX4 (i82371AB for the 430 TX chipset)
20 * ("PIIX" stands for "PCI ISA IDE Xcellerator").
21 *
22 * Pretty much the same code works for other IDE PCI bus-mastering chipsets.
23 *
24 * DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies).
25 *
26 * By default, DMA support is prepared for use, but is currently enabled only
27 * for drives which already have DMA enabled (UltraDMA or mode 2 multi/single),
28 * or which are recognized as "good" (see table below). Drives with only mode0
29 * or mode1 (multi/single) DMA should also work with this chipset/driver
30 * (eg. MC2112A) but are not enabled by default.
31 *
32 * Use "hdparm -i" to view modes supported by a given drive.
33 *
34 * The hdparm-3.5 (or later) utility can be used for manually enabling/disabling
35 * DMA support, but must be (re-)compiled against this kernel version or later.
36 *
37 * To enable DMA, use "hdparm -d1 /dev/hd?" on a per-drive basis after booting.
38 * If problems arise, ide.c will disable DMA operation after a few retries.
39 * This error recovery mechanism works and has been extremely well exercised.
40 *
41 * IDE drives, depending on their vintage, may support several different modes
42 * of DMA operation. The boot-time modes are indicated with a "*" in
43 * the "hdparm -i" listing, and can be changed with *knowledgeable* use of
44 * the "hdparm -X" feature. There is seldom a need to do this, as drives
45 * normally power-up with their "best" PIO/DMA modes enabled.
46 *
47 * Testing has been done with a rather extensive number of drives,
48 * with Quantum & Western Digital models generally outperforming the pack,
49 * and Fujitsu & Conner (and some Seagate which are really Conner) drives
50 * showing more lackluster throughput.
51 *
52 * Keep an eye on /var/adm/messages for "DMA disabled" messages.
53 *
54 * Some people have reported trouble with Intel Zappa motherboards.
55 * This can be fixed by upgrading the AMI BIOS to version 1.00.04.BS0,
56 * available from ftp://ftp.intel.com/pub/bios/10004bs0.exe
57 * (thanks to Glen Morrell <glen@spin.Stanford.edu> for researching this).
58 *
59 * Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for
60 * fixing the problem with the BIOS on some Acer motherboards.
61 *
62 * Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing
63 * "TX" chipset compatibility and for providing patches for the "TX" chipset.
64 *
65 * Thanks to Christian Brunner <chb@muc.de> for taking a good first crack
66 * at generic DMA -- his patches were referred to when preparing this code.
67 *
68 * Most importantly, thanks to Robert Bringman <rob@mars.trion.com>
69 * for supplying a Promise UDMA board & WD UDMA drive for this work!
70 *
71 * And, yes, Intel Zappa boards really *do* use both PIIX IDE ports.
72 *
73 * check_drive_lists(ide_drive_t *drive, int good_bad)
74 *
75 * ATA-66/100 and recovery functions, I forgot the rest......
76 * SELECT_READ_WRITE(hwif,drive,func) for active tuning based on IO direction.
77 *
78 */
79
80 #include <linux/config.h>
81 #include <linux/types.h>
82 #include <linux/kernel.h>
83 #include <linux/timer.h>
84 #include <linux/mm.h>
85 #include <linux/interrupt.h>
86 #include <linux/pci.h>
87 #include <linux/init.h>
88 #include <linux/ide.h>
89
90 #include <asm/io.h>
91 #include <asm/irq.h>
92
93 /*
94 * Long lost data from 2.0.34 that is now in 2.0.39
95 *
96 * This was used in ./drivers/block/triton.c to do DMA Base address setup
97 * when PnP failed. Oh the things we forget. I believe this was part
98 * of SFF-8038i that has been withdrawn from public access... :-((
99 */
100 #define DEFAULT_BMIBA 0xe800 /* in case BIOS did not init it */
101 #define DEFAULT_BMCRBA 0xcc00 /* VIA's default value */
102 #define DEFAULT_BMALIBA 0xd400 /* ALI's default value */
103
104 extern char *ide_dmafunc_verbose(ide_dma_action_t dmafunc);
105
106 #ifdef CONFIG_IDEDMA_NEW_DRIVE_LISTINGS
107
108 struct drive_list_entry {
109 char * id_model;
110 char * id_firmware;
111 };
112
113 struct drive_list_entry drive_whitelist [] = {
114
115 { "Micropolis 2112A" , "ALL" },
116 { "CONNER CTMA 4000" , "ALL" },
117 { "CONNER CTT8000-A" , "ALL" },
118 { "ST34342A" , "ALL" },
119 { 0 , 0 }
120 };
121
122 struct drive_list_entry drive_blacklist [] = {
123
124 { "WDC AC11000H" , "ALL" },
125 { "WDC AC22100H" , "ALL" },
126 { "WDC AC32500H" , "ALL" },
127 { "WDC AC33100H" , "ALL" },
128 { "WDC AC31600H" , "ALL" },
129 { "WDC AC32100H" , "24.09P07" },
130 { "WDC AC23200L" , "21.10N21" },
131 { "Compaq CRD-8241B" , "ALL" },
132 { "CRD-8400B" , "ALL" },
133 { "CRD-8480B", "ALL" },
134 { "CRD-8480C", "ALL" },
135 { "CRD-8482B", "ALL" },
136 { "CRD-84" , "ALL" },
137 { "SanDisk SDP3B" , "ALL" },
138 { "SanDisk SDP3B-64" , "ALL" },
139 { "SANYO CD-ROM CRD" , "ALL" },
140 { "HITACHI CDR-8" , "ALL" },
141 { "HITACHI CDR-8335" , "ALL" },
142 { "HITACHI CDR-8435" , "ALL" },
143 { "Toshiba CD-ROM XM-6202B" , "ALL" },
144 { "CD-532E-A" , "ALL" },
145 { "E-IDE CD-ROM CR-840", "ALL" },
146 { "CD-ROM Drive/F5A", "ALL" },
147 { "RICOH CD-R/RW MP7083A", "ALL" },
148 { "WPI CDD-820", "ALL" },
149 { "SAMSUNG CD-ROM SC-148C", "ALL" },
150 { "SAMSUNG CD-ROM SC-148F", "ALL" },
151 { "SAMSUNG CD-ROM SC", "ALL" },
152 { "SanDisk SDP3B-64" , "ALL" },
153 { "SAMSUNG CD-ROM SN-124", "ALL" },
154 { "PLEXTOR CD-R PX-W8432T", "ALL" },
155 { "ATAPI CD-ROM DRIVE 40X MAXIMUM", "ALL" },
156 { "_NEC DV5800A", "ALL" },
157 { 0 , 0 }
158
159 };
160
161 int in_drive_list(struct hd_driveid *id, struct drive_list_entry * drive_table)
162 {
163 for ( ; drive_table->id_model ; drive_table++)
164 if ((!strcmp(drive_table->id_model, id->model)) &&
165 ((!strstr(drive_table->id_firmware, id->fw_rev)) ||
166 (!strcmp(drive_table->id_firmware, "ALL"))))
167 return 1;
168 return 0;
169 }
170
171 #else /* !CONFIG_IDEDMA_NEW_DRIVE_LISTINGS */
172
173 /*
174 * good_dma_drives() lists the model names (from "hdparm -i")
175 * of drives which do not support mode2 DMA but which are
176 * known to work fine with this interface under Linux.
177 */
178 const char *good_dma_drives[] = {"Micropolis 2112A",
179 "CONNER CTMA 4000",
180 "CONNER CTT8000-A",
181 "ST34342A", /* for Sun Ultra */
182 NULL};
183
184 /*
185 * bad_dma_drives() lists the model names (from "hdparm -i")
186 * of drives which supposedly support (U)DMA but which are
187 * known to corrupt data with this interface under Linux.
188 *
189 * This is an empirical list. Its generated from bug reports. That means
190 * while it reflects actual problem distributions it doesn't answer whether
191 * the drive or the controller, or cabling, or software, or some combination
192 * thereof is the fault. If you don't happen to agree with the kernel's
193 * opinion of your drive - use hdparm to turn DMA on.
194 */
195 const char *bad_dma_drives[] = {"WDC AC11000H",
196 "WDC AC22100H",
197 "WDC AC32100H",
198 "WDC AC32500H",
199 "WDC AC33100H",
200 "WDC AC31600H",
201 NULL};
202
203 #endif /* CONFIG_IDEDMA_NEW_DRIVE_LISTINGS */
204
205 /*
206 * Our Physical Region Descriptor (PRD) table should be large enough
207 * to handle the biggest I/O request we are likely to see. Since requests
208 * can have no more than 256 sectors, and since the typical blocksize is
209 * two or more sectors, we could get by with a limit of 128 entries here for
210 * the usual worst case. Most requests seem to include some contiguous blocks,
211 * further reducing the number of table entries required.
212 *
213 * The driver reverts to PIO mode for individual requests that exceed
214 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
215 * 100% of all crazy scenarios here is not necessary.
216 *
217 * As it turns out though, we must allocate a full 4KB page for this,
218 * so the two PRD tables (ide0 & ide1) will each get half of that,
219 * allowing each to have about 256 entries (8 bytes each) from this.
220 */
221 #define PRD_BYTES 8
222 #define PRD_ENTRIES (PAGE_SIZE / (2 * PRD_BYTES))
223
224 /*
225 * dma_intr() is the handler for disk read/write DMA interrupts
226 */
227 ide_startstop_t ide_dma_intr (ide_drive_t *drive)
228 {
229 int i;
230 byte stat, dma_stat;
231
232 dma_stat = HWIF(drive)->dmaproc(ide_dma_end, drive);
233 stat = GET_STAT(); /* get drive status */
234 if (OK_STAT(stat,DRIVE_READY,drive->bad_wstat|DRQ_STAT)) {
235 if (!dma_stat) {
236 struct request *rq = HWGROUP(drive)->rq;
237 rq = HWGROUP(drive)->rq;
238 for (i = rq->nr_sectors; i > 0;) {
239 i -= rq->current_nr_sectors;
240 ide_end_request(1, HWGROUP(drive));
241 }
242 return ide_stopped;
243 }
244 printk("%s: dma_intr: bad DMA status (dma_stat=%x)\n",
245 drive->name, dma_stat);
246 }
247 return ide_error(drive, "dma_intr", stat);
248 }
249
250 static int ide_build_sglist (ide_hwif_t *hwif, struct request *rq)
251 {
252 struct buffer_head *bh;
253 struct scatterlist *sg = hwif->sg_table;
254 int nents = 0;
255
256 if (hwif->sg_dma_active)
257 BUG();
258
259 if (rq->cmd == READ)
260 hwif->sg_dma_direction = PCI_DMA_FROMDEVICE;
261 else
262 hwif->sg_dma_direction = PCI_DMA_TODEVICE;
263 bh = rq->bh;
264 do {
265 unsigned char *virt_addr = bh->b_data;
266 unsigned int size = bh->b_size;
267
268 if (nents >= PRD_ENTRIES)
269 return 0;
270
271 while ((bh = bh->b_reqnext) != NULL) {
272 if ((virt_addr + size) != (unsigned char *) bh->b_data)
273 break;
274 size += bh->b_size;
275 }
276 memset(&sg[nents], 0, sizeof(*sg));
277 sg[nents].address = virt_addr;
278 sg[nents].length = size;
279 nents++;
280 } while (bh != NULL);
281
282 return pci_map_sg(hwif->pci_dev, sg, nents, hwif->sg_dma_direction);
283 }
284
285 /*
286 * ide_build_dmatable() prepares a dma request.
287 * Returns 0 if all went okay, returns 1 otherwise.
288 * May also be invoked from trm290.c
289 */
290 int ide_build_dmatable (ide_drive_t *drive, ide_dma_action_t func)
291 {
292 unsigned int *table = HWIF(drive)->dmatable_cpu;
293 #ifdef CONFIG_BLK_DEV_TRM290
294 unsigned int is_trm290_chipset = (HWIF(drive)->chipset == ide_trm290);
295 #else
296 const int is_trm290_chipset = 0;
297 #endif
298 unsigned int count = 0;
299 int i;
300 struct scatterlist *sg;
301
302 HWIF(drive)->sg_nents = i = ide_build_sglist(HWIF(drive), HWGROUP(drive)->rq);
303
304 if (!i)
305 return 0;
306
307 sg = HWIF(drive)->sg_table;
308 while (i && sg_dma_len(sg)) {
309 u32 cur_addr;
310 u32 cur_len;
311
312 cur_addr = sg_dma_address(sg);
313 cur_len = sg_dma_len(sg);
314
315 /*
316 * Fill in the dma table, without crossing any 64kB boundaries.
317 * Most hardware requires 16-bit alignment of all blocks,
318 * but the trm290 requires 32-bit alignment.
319 */
320
321 while (cur_len) {
322 if (count++ >= PRD_ENTRIES) {
323 printk("%s: DMA table too small\n", drive->name);
324 goto use_pio_instead;
325 } else {
326 u32 xcount, bcount = 0x10000 - (cur_addr & 0xffff);
327
328 if (bcount > cur_len)
329 bcount = cur_len;
330 *table++ = cpu_to_le32(cur_addr);
331 xcount = bcount & 0xffff;
332 if (is_trm290_chipset)
333 xcount = ((xcount >> 2) - 1) << 16;
334 if (xcount == 0x0000) {
335 /*
336 * Most chipsets correctly interpret a length of 0x0000 as 64KB,
337 * but at least one (e.g. CS5530) misinterprets it as zero (!).
338 * So here we break the 64KB entry into two 32KB entries instead.
339 */
340 if (count++ >= PRD_ENTRIES) {
341 printk("%s: DMA table too small\n", drive->name);
342 goto use_pio_instead;
343 }
344 *table++ = cpu_to_le32(0x8000);
345 *table++ = cpu_to_le32(cur_addr + 0x8000);
346 xcount = 0x8000;
347 }
348 *table++ = cpu_to_le32(xcount);
349 cur_addr += bcount;
350 cur_len -= bcount;
351 }
352 }
353
354 sg++;
355 i--;
356 }
357
358 if (count) {
359 if (!is_trm290_chipset)
360 *--table |= cpu_to_le32(0x80000000);
361 return count;
362 }
363 printk("%s: empty DMA table?\n", drive->name);
364 use_pio_instead:
365 pci_unmap_sg(HWIF(drive)->pci_dev,
366 HWIF(drive)->sg_table,
367 HWIF(drive)->sg_nents,
368 HWIF(drive)->sg_dma_direction);
369 HWIF(drive)->sg_dma_active = 0;
370 return 0; /* revert to PIO for this request */
371 }
372
373 /* Teardown mappings after DMA has completed. */
374 void ide_destroy_dmatable (ide_drive_t *drive)
375 {
376 struct pci_dev *dev = HWIF(drive)->pci_dev;
377 struct scatterlist *sg = HWIF(drive)->sg_table;
378 int nents = HWIF(drive)->sg_nents;
379
380 pci_unmap_sg(dev, sg, nents, HWIF(drive)->sg_dma_direction);
381 HWIF(drive)->sg_dma_active = 0;
382 }
383
384 /*
385 * For both Blacklisted and Whitelisted drives.
386 * This is setup to be called as an extern for future support
387 * to other special driver code.
388 */
389 int check_drive_lists (ide_drive_t *drive, int good_bad)
390 {
391 struct hd_driveid *id = drive->id;
392
393 #ifdef CONFIG_IDEDMA_NEW_DRIVE_LISTINGS
394 if (good_bad) {
395 return in_drive_list(id, drive_whitelist);
396 } else {
397 int blacklist = in_drive_list(id, drive_blacklist);
398 if (blacklist)
399 printk("%s: Disabling (U)DMA for %s\n", drive->name, id->model);
400 return(blacklist);
401 }
402 #else /* !CONFIG_IDEDMA_NEW_DRIVE_LISTINGS */
403 const char **list;
404
405 if (good_bad) {
406 /* Consult the list of known "good" drives */
407 list = good_dma_drives;
408 while (*list) {
409 if (!strcmp(*list++,id->model))
410 return 1;
411 }
412 } else {
413 /* Consult the list of known "bad" drives */
414 list = bad_dma_drives;
415 while (*list) {
416 if (!strcmp(*list++,id->model)) {
417 printk("%s: Disabling (U)DMA for %s\n",
418 drive->name, id->model);
419 return 1;
420 }
421 }
422 }
423 #endif /* CONFIG_IDEDMA_NEW_DRIVE_LISTINGS */
424 return 0;
425 }
426
427 int report_drive_dmaing (ide_drive_t *drive)
428 {
429 struct hd_driveid *id = drive->id;
430
431 if ((id->field_valid & 4) && (eighty_ninty_three(drive)) &&
432 (id->dma_ultra & (id->dma_ultra >> 11) & 7)) {
433 if ((id->dma_ultra >> 13) & 1) {
434 printk(", UDMA(100)"); /* UDMA BIOS-enabled! */
435 } else if ((id->dma_ultra >> 12) & 1) {
436 printk(", UDMA(66)"); /* UDMA BIOS-enabled! */
437 } else {
438 printk(", UDMA(44)"); /* UDMA BIOS-enabled! */
439 }
440 } else if ((id->field_valid & 4) &&
441 (id->dma_ultra & (id->dma_ultra >> 8) & 7)) {
442 if ((id->dma_ultra >> 10) & 1) {
443 printk(", UDMA(33)"); /* UDMA BIOS-enabled! */
444 } else if ((id->dma_ultra >> 9) & 1) {
445 printk(", UDMA(25)"); /* UDMA BIOS-enabled! */
446 } else {
447 printk(", UDMA(16)"); /* UDMA BIOS-enabled! */
448 }
449 } else if (id->field_valid & 4) {
450 printk(", (U)DMA"); /* Can be BIOS-enabled! */
451 } else {
452 printk(", DMA");
453 }
454 return 1;
455 }
456
457 static int config_drive_for_dma (ide_drive_t *drive)
458 {
459 struct hd_driveid *id = drive->id;
460 ide_hwif_t *hwif = HWIF(drive);
461
462 if (id && (id->capability & 1) && hwif->autodma) {
463 /* Consult the list of known "bad" drives */
464 if (ide_dmaproc(ide_dma_bad_drive, drive))
465 return hwif->dmaproc(ide_dma_off, drive);
466
467 /* Enable DMA on any drive that has UltraDMA (mode 3/4/5) enabled */
468 if ((id->field_valid & 4) && (eighty_ninty_three(drive)))
469 if ((id->dma_ultra & (id->dma_ultra >> 11) & 7))
470 return hwif->dmaproc(ide_dma_on, drive);
471 /* Enable DMA on any drive that has UltraDMA (mode 0/1/2) enabled */
472 if (id->field_valid & 4) /* UltraDMA */
473 if ((id->dma_ultra & (id->dma_ultra >> 8) & 7))
474 return hwif->dmaproc(ide_dma_on, drive);
475 /* Enable DMA on any drive that has mode2 DMA (multi or single) enabled */
476 if (id->field_valid & 2) /* regular DMA */
477 if ((id->dma_mword & 0x404) == 0x404 || (id->dma_1word & 0x404) == 0x404)
478 return hwif->dmaproc(ide_dma_on, drive);
479 /* Consult the list of known "good" drives */
480 if (ide_dmaproc(ide_dma_good_drive, drive))
481 return hwif->dmaproc(ide_dma_on, drive);
482 }
483 return hwif->dmaproc(ide_dma_off_quietly, drive);
484 }
485
486 #ifndef CONFIG_BLK_DEV_IDEDMA_TIMEOUT
487 /*
488 * 1 dmaing, 2 error, 4 intr
489 */
490 static int dma_timer_expiry (ide_drive_t *drive)
491 {
492 byte dma_stat = inb(HWIF(drive)->dma_base+2);
493
494 #ifdef DEBUG
495 printk("%s: dma_timer_expiry: dma status == 0x%02x\n", drive->name, dma_stat);
496 #endif /* DEBUG */
497
498 #if 1
499 HWGROUP(drive)->expiry = NULL; /* one free ride for now */
500 #endif
501
502 if (dma_stat & 2) { /* ERROR */
503 byte stat = GET_STAT();
504 return ide_error(drive, "dma_timer_expiry", stat);
505 }
506 if (dma_stat & 1) /* DMAing */
507 return WAIT_CMD;
508 return 0;
509 }
510 #else /* CONFIG_BLK_DEV_IDEDMA_TIMEOUT */
511 static ide_startstop_t ide_dma_timeout_revovery (ide_drive_t *drive)
512 {
513 ide_hwgroup_t *hwgroup = HWGROUP(drive);
514 ide_hwif_t *hwif = HWIF(drive);
515 int enable_dma = drive->using_dma;
516 unsigned long flags;
517 ide_startstop_t startstop;
518
519 spin_lock_irqsave(&io_request_lock, flags);
520 hwgroup->handler = NULL;
521 del_timer(&hwgroup->timer);
522 spin_unlock_irqrestore(&io_request_lock, flags);
523
524 drive->waiting_for_dma = 0;
525
526 startstop = ide_do_reset(drive);
527
528 if ((enable_dma) && !(drive->using_dma))
529 (void) hwif->dmaproc(ide_dma_on, drive);
530
531 return startstop;
532 }
533 #endif /* CONFIG_BLK_DEV_IDEDMA_TIMEOUT */
534
535 /*
536 * ide_dmaproc() initiates/aborts DMA read/write operations on a drive.
537 *
538 * The caller is assumed to have selected the drive and programmed the drive's
539 * sector address using CHS or LBA. All that remains is to prepare for DMA
540 * and then issue the actual read/write DMA/PIO command to the drive.
541 *
542 * For ATAPI devices, we just prepare for DMA and return. The caller should
543 * then issue the packet command to the drive and call us again with
544 * ide_dma_begin afterwards.
545 *
546 * Returns 0 if all went well.
547 * Returns 1 if DMA read/write could not be started, in which case
548 * the caller should revert to PIO for the current request.
549 * May also be invoked from trm290.c
550 */
551 int ide_dmaproc (ide_dma_action_t func, ide_drive_t *drive)
552 {
553 // ide_hwgroup_t *hwgroup = HWGROUP(drive);
554 ide_hwif_t *hwif = HWIF(drive);
555 unsigned long dma_base = hwif->dma_base;
556 byte unit = (drive->select.b.unit & 0x01);
557 unsigned int count, reading = 0;
558 byte dma_stat;
559
560 switch (func) {
561 case ide_dma_off:
562 printk("%s: DMA disabled\n", drive->name);
563 case ide_dma_off_quietly:
564 outb(inb(dma_base+2) & ~(1<<(5+unit)), dma_base+2);
565 case ide_dma_on:
566 drive->using_dma = (func == ide_dma_on);
567 if (drive->using_dma)
568 outb(inb(dma_base+2)|(1<<(5+unit)), dma_base+2);
569 return 0;
570 case ide_dma_check:
571 return config_drive_for_dma (drive);
572 case ide_dma_read:
573 reading = 1 << 3;
574 case ide_dma_write:
575 SELECT_READ_WRITE(hwif,drive,func);
576 if (!(count = ide_build_dmatable(drive, func)))
577 return 1; /* try PIO instead of DMA */
578 outl(hwif->dmatable_dma, dma_base + 4); /* PRD table */
579 outb(reading, dma_base); /* specify r/w */
580 outb(inb(dma_base+2)|6, dma_base+2); /* clear INTR & ERROR flags */
581 drive->waiting_for_dma = 1;
582 if (drive->media != ide_disk)
583 return 0;
584 #ifdef CONFIG_BLK_DEV_IDEDMA_TIMEOUT
585 ide_set_handler(drive, &ide_dma_intr, WAIT_CMD, NULL); /* issue cmd to drive */
586 #else /* !CONFIG_BLK_DEV_IDEDMA_TIMEOUT */
587 ide_set_handler(drive, &ide_dma_intr, WAIT_CMD, dma_timer_expiry); /* issue cmd to drive */
588 #endif /* CONFIG_BLK_DEV_IDEDMA_TIMEOUT */
589 OUT_BYTE(reading ? WIN_READDMA : WIN_WRITEDMA, IDE_COMMAND_REG);
590 case ide_dma_begin:
591 /* Note that this is done *after* the cmd has
592 * been issued to the drive, as per the BM-IDE spec.
593 * The Promise Ultra33 doesn't work correctly when
594 * we do this part before issuing the drive cmd.
595 */
596 outb(inb(dma_base)|1, dma_base); /* start DMA */
597 return 0;
598 case ide_dma_end: /* returns 1 on error, 0 otherwise */
599 drive->waiting_for_dma = 0;
600 outb(inb(dma_base)&~1, dma_base); /* stop DMA */
601 dma_stat = inb(dma_base+2); /* get DMA status */
602 outb(dma_stat|6, dma_base+2); /* clear the INTR & ERROR bits */
603 ide_destroy_dmatable(drive); /* purge DMA mappings */
604 return (dma_stat & 7) != 4 ? (0x10 | dma_stat) : 0; /* verify good DMA status */
605 case ide_dma_test_irq: /* returns 1 if dma irq issued, 0 otherwise */
606 dma_stat = inb(dma_base+2);
607 #if 0 /* do not set unless you know what you are doing */
608 if (dma_stat & 4) {
609 byte stat = GET_STAT();
610 outb(dma_base+2, dma_stat & 0xE4);
611 }
612 #endif
613 return (dma_stat & 4) == 4; /* return 1 if INTR asserted */
614 case ide_dma_bad_drive:
615 case ide_dma_good_drive:
616 return check_drive_lists(drive, (func == ide_dma_good_drive));
617 case ide_dma_verbose:
618 return report_drive_dmaing(drive);
619 case ide_dma_timeout:
620 // FIXME: Many IDE chipsets do not permit command file register access
621 // FIXME: while the bus-master function is still active.
622 // FIXME: To prevent deadlock with those chipsets, we must be extremely
623 // FIXME: careful here (and in ide_intr() as well) to NOT access any
624 // FIXME: registers from the 0x1Fx/0x17x sets before terminating the
625 // FIXME: bus-master operation via the bus-master control reg.
626 // FIXME: Otherwise, chipset deadlock will occur, and some systems will
627 // FIXME: lock up completely!!
628 #ifdef CONFIG_BLK_DEV_IDEDMA_TIMEOUT
629 /*
630 * Have to issue an abort and requeue the request
631 * DMA engine got turned off by a goofy ASIC, and
632 * we have to clean up the mess, and here is as good
633 * as any. Do it globally for all chipsets.
634 */
635 outb(0x00, dma_base); /* stop DMA */
636 dma_stat = inb(dma_base+2); /* get DMA status */
637 outb(dma_stat|6, dma_base+2); /* clear the INTR & ERROR bits */
638 printk("%s: %s: Lets do it again!"
639 "stat = 0x%02x, dma_stat = 0x%02x\n",
640 drive->name, ide_dmafunc_verbose(func),
641 GET_STAT(), dma_stat);
642
643 if (dma_stat & 0xF0)
644 return ide_dma_timeout_revovery(drive);
645
646 printk("%s: %s: (restart_request) Lets do it again!"
647 "stat = 0x%02x, dma_stat = 0x%02x\n",
648 drive->name, ide_dmafunc_verbose(func),
649 GET_STAT(), dma_stat);
650
651 return restart_request(drive); // BUG: return types do not match!!
652 #endif /* CONFIG_BLK_DEV_IDEDMA_TIMEOUT */
653 case ide_dma_retune:
654 case ide_dma_lostirq:
655 printk("ide_dmaproc: chipset supported %s func only: %d\n", ide_dmafunc_verbose(func), func);
656 return 1;
657 default:
658 printk("ide_dmaproc: unsupported %s func: %d\n", ide_dmafunc_verbose(func), func);
659 return 1;
660 }
661 }
662
663 /*
664 * Needed for allowing full modular support of ide-driver
665 */
666 int ide_release_dma (ide_hwif_t *hwif)
667 {
668 if (hwif->dmatable_cpu) {
669 pci_free_consistent(hwif->pci_dev,
670 PRD_ENTRIES * PRD_BYTES,
671 hwif->dmatable_cpu,
672 hwif->dmatable_dma);
673 hwif->dmatable_cpu = NULL;
674 }
675 if (hwif->sg_table) {
676 kfree(hwif->sg_table);
677 hwif->sg_table = NULL;
678 }
679 if ((hwif->dma_extra) && (hwif->channel == 0))
680 release_region((hwif->dma_base + 16), hwif->dma_extra);
681 release_region(hwif->dma_base, 8);
682 return 1;
683 }
684
685 /*
686 * This can be called for a dynamically installed interface. Don't __init it
687 */
688
689 void ide_setup_dma (ide_hwif_t *hwif, unsigned long dma_base, unsigned int num_ports)
690 {
691 printk(" %s: BM-DMA at 0x%04lx-0x%04lx", hwif->name, dma_base, dma_base + num_ports - 1);
692 if (check_region(dma_base, num_ports)) {
693 printk(" -- ERROR, PORT ADDRESSES ALREADY IN USE\n");
694 return;
695 }
696 request_region(dma_base, num_ports, hwif->name);
697 hwif->dma_base = dma_base;
698 hwif->dmatable_cpu = pci_alloc_consistent(hwif->pci_dev,
699 PRD_ENTRIES * PRD_BYTES,
700 &hwif->dmatable_dma);
701 if (hwif->dmatable_cpu == NULL)
702 goto dma_alloc_failure;
703
704 hwif->sg_table = kmalloc(sizeof(struct scatterlist) * PRD_ENTRIES,
705 GFP_KERNEL);
706 if (hwif->sg_table == NULL) {
707 pci_free_consistent(hwif->pci_dev, PRD_ENTRIES * PRD_BYTES,
708 hwif->dmatable_cpu, hwif->dmatable_dma);
709 goto dma_alloc_failure;
710 }
711
712 hwif->dmaproc = &ide_dmaproc;
713
714 if (hwif->chipset != ide_trm290) {
715 byte dma_stat = inb(dma_base+2);
716 printk(", BIOS settings: %s:%s, %s:%s",
717 hwif->drives[0].name, (dma_stat & 0x20) ? "DMA" : "pio",
718 hwif->drives[1].name, (dma_stat & 0x40) ? "DMA" : "pio");
719 }
720 printk("\n");
721 return;
722
723 dma_alloc_failure:
724 printk(" -- ERROR, UNABLE TO ALLOCATE DMA TABLES\n");
725 }
726
727 /*
728 * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space:
729 */
730 unsigned long __init ide_get_or_set_dma_base (ide_hwif_t *hwif, int extra, const char *name)
731 {
732 unsigned long dma_base = 0;
733 struct pci_dev *dev = hwif->pci_dev;
734
735 #ifdef CONFIG_BLK_DEV_IDEDMA_FORCED
736 int second_chance = 0;
737
738 second_chance_to_dma:
739 #endif /* CONFIG_BLK_DEV_IDEDMA_FORCED */
740
741 if (hwif->mate && hwif->mate->dma_base) {
742 dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8);
743 } else {
744 dma_base = pci_resource_start(dev, 4);
745 if (!dma_base) {
746 printk("%s: dma_base is invalid (0x%04lx)\n", name, dma_base);
747 dma_base = 0;
748 }
749 }
750
751 #ifdef CONFIG_BLK_DEV_IDEDMA_FORCED
752 if ((!dma_base) && (!second_chance)) {
753 unsigned long set_bmiba = 0;
754 second_chance++;
755 switch(dev->vendor) {
756 case PCI_VENDOR_ID_AL:
757 set_bmiba = DEFAULT_BMALIBA; break;
758 case PCI_VENDOR_ID_VIA:
759 set_bmiba = DEFAULT_BMCRBA; break;
760 case PCI_VENDOR_ID_INTEL:
761 set_bmiba = DEFAULT_BMIBA; break;
762 default:
763 return dma_base;
764 }
765 pci_write_config_dword(dev, 0x20, set_bmiba|1);
766 goto second_chance_to_dma;
767 }
768 #endif /* CONFIG_BLK_DEV_IDEDMA_FORCED */
769
770 if (dma_base) {
771 if (extra) /* PDC20246, PDC20262, HPT343, & HPT366 */
772 request_region(dma_base+16, extra, name);
773 dma_base += hwif->channel ? 8 : 0;
774 hwif->dma_extra = extra;
775
776 switch(dev->device) {
777 case PCI_DEVICE_ID_AL_M5219:
778 case PCI_DEVICE_ID_AMD_VIPER_7409:
779 case PCI_DEVICE_ID_CMD_643:
780 outb(inb(dma_base+2) & 0x60, dma_base+2);
781 if (inb(dma_base+2) & 0x80) {
782 printk("%s: simplex device: DMA forced\n", name);
783 }
784 break;
785 default:
786 /*
787 * If the device claims "simplex" DMA,
788 * this means only one of the two interfaces
789 * can be trusted with DMA at any point in time.
790 * So we should enable DMA only on one of the
791 * two interfaces.
792 */
793 if ((inb(dma_base+2) & 0x80)) { /* simplex device? */
794 if ((!hwif->drives[0].present && !hwif->drives[1].present) ||
795 (hwif->mate && hwif->mate->dma_base)) {
796 printk("%s: simplex device: DMA disabled\n", name);
797 dma_base = 0;
798 }
799 }
800 }
801 }
802 return dma_base;
803 }
804