File: /usr/src/linux/drivers/ide/q40ide.c

1     /*
2      *  linux/drivers/ide/q40ide.c -- Q40 I/O port IDE Driver
3      *
4      *     (c) Richard Zidlicky
5      *
6      *  This file is subject to the terms and conditions of the GNU General Public
7      *  License.  See the file COPYING in the main directory of this archive for
8      *  more details.
9      *
10      *
11      */
12     
13     #include <linux/types.h>
14     #include <linux/mm.h>
15     #include <linux/interrupt.h>
16     #include <linux/blkdev.h>
17     #include <linux/hdreg.h>
18     
19     #include <linux/ide.h>
20     
21         /*
22          *  Bases of the IDE interfaces
23          */
24     
25     #define Q40IDE_NUM_HWIFS	2
26     
27     #define PCIDE_BASE1	0x1f0
28     #define PCIDE_BASE2	0x170
29     #define PCIDE_BASE3	0x1e8
30     #define PCIDE_BASE4	0x168
31     #define PCIDE_BASE5	0x1e0
32     #define PCIDE_BASE6	0x160
33     
34     static const q40ide_ioreg_t pcide_bases[Q40IDE_NUM_HWIFS] = {
35         PCIDE_BASE1, PCIDE_BASE2, /* PCIDE_BASE3, PCIDE_BASE4  , PCIDE_BASE5,
36         PCIDE_BASE6 */
37     };
38     
39     
40         /*
41          *  Offsets from one of the above bases
42          */
43     
44     #undef HD_DATA
45     #define HD_DATA  0x1f0
46     
47     #define PCIDE_REG(x)	((q40ide_ioreg_t)(HD_##x-PCIDE_BASE1))
48     
49     static const int pcide_offsets[IDE_NR_PORTS] = {
50         PCIDE_REG(DATA), PCIDE_REG(ERROR), PCIDE_REG(NSECTOR), PCIDE_REG(SECTOR),
51         PCIDE_REG(LCYL), PCIDE_REG(HCYL), PCIDE_REG(CURRENT), PCIDE_REG(STATUS),
52         PCIDE_REG(CMD)
53     };
54     
55     static int q40ide_default_irq(q40ide_ioreg_t base)
56     {
57                switch (base) { 
58     	            case 0x1f0: return 14;
59     		    case 0x170: return 15;
60     		    case 0x1e8: return 11;
61     		    default:
62     			return 0;
63     	   }
64     }
65     
66     
67     
68         /*
69          *  Probe for Q40 IDE interfaces
70          */
71     
72     void q40ide_init(void)
73     {
74         int i;
75     
76         if (!MACH_IS_Q40)
77           return ;
78     
79         for (i = 0; i < Q40IDE_NUM_HWIFS; i++) {
80     	hw_regs_t hw;
81     
82     	ide_setup_ports(&hw,(ide_ioreg_t) pcide_bases[i], (int *)pcide_offsets, 
83     			pcide_bases[i]+0x206, 
84     			0, NULL, q40ide_default_irq(pcide_bases[i]));
85     	ide_register_hw(&hw, NULL);
86         }
87     }
88     
89