File: /usr/src/linux/drivers/ide/via82cxxx.c
1 /*
2 * $Id: via82cxxx.c,v 3.29 2001/09/10 10:06:00 vojtech Exp $
3 *
4 * Copyright (c) 2000-2001 Vojtech Pavlik
5 *
6 * Based on the work of:
7 * Michel Aubry
8 * Jeff Garzik
9 * Andre Hedrick
10 *
11 * Sponsored by SuSE
12 */
13
14 /*
15 * VIA IDE driver for Linux. Supports
16 *
17 * vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
18 * vt82c686, vt82c686a, vt82c686b, vt8231, vt8233
19 *
20 * southbridges, which can be found in
21 *
22 * VIA Apollo Master, VP, VP2, VP2/97, VP3, VPX, VPX/97, MVP3, MVP4, P6, Pro,
23 * ProII, ProPlus, Pro133, Pro133+, Pro133A, Pro133A Dual, Pro133T, Pro133Z,
24 * PLE133, PLE133T, Pro266, Pro266T, ProP4X266, PM601, PM133, PN133, PL133T,
25 * PX266, PM266, KX133, KT133, KT133A, KLE133, KT266, KX266, KM133, KM133A,
26 * KL133, KN133, KM266
27 * PC-Chips VXPro, VXPro+, VXTwo, TXPro-III, TXPro-AGP, AGPPro, ViaGra, BXToo,
28 * BXTel, BXpert
29 * AMD 640, 640 AGP, 750 IronGate, 760, 760MP
30 * ETEQ 6618, 6628, 6629, 6638
31 * Micron Samurai
32 *
33 * chipsets. Supports
34 *
35 * PIO 0-5, MWDMA 0-2, SWDMA 0-2 and UDMA 0-5
36 *
37 * (this includes UDMA33, 66 and 100) modes. UDMA66 and higher modes are
38 * autoenabled only in case the BIOS has detected a 80 wire cable. To ignore
39 * the BIOS data and assume the cable is present, use 'ide0=ata66' or
40 * 'ide1=ata66' on the kernel command line.
41 */
42
43 /*
44 * This program is free software; you can redistribute it and/or modify
45 * it under the terms of the GNU General Public License as published by
46 * the Free Software Foundation; either version 2 of the License, or
47 * (at your option) any later version.
48 *
49 * This program is distributed in the hope that it will be useful,
50 * but WITHOUT ANY WARRANTY; without even the implied warranty of
51 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
52 * GNU General Public License for more details.
53 *
54 * You should have received a copy of the GNU General Public License
55 * along with this program; if not, write to the Free Software
56 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
57 *
58 * Should you need to contact me, the author, you can do so either by
59 * e-mail - mail your message to <vojtech@suse.cz>, or by paper mail:
60 * Vojtech Pavlik, Ucitelska 1576, Prague 8, 182 00 Czech Republic
61 */
62
63 #include <linux/config.h>
64 #include <linux/kernel.h>
65 #include <linux/ioport.h>
66 #include <linux/blkdev.h>
67 #include <linux/pci.h>
68 #include <linux/init.h>
69 #include <linux/ide.h>
70 #include <asm/io.h>
71
72 #include "ide-timing.h"
73
74 #define VIA_IDE_ENABLE 0x40
75 #define VIA_IDE_CONFIG 0x41
76 #define VIA_FIFO_CONFIG 0x43
77 #define VIA_MISC_1 0x44
78 #define VIA_MISC_2 0x45
79 #define VIA_MISC_3 0x46
80 #define VIA_DRIVE_TIMING 0x48
81 #define VIA_8BIT_TIMING 0x4e
82 #define VIA_ADDRESS_SETUP 0x4c
83 #define VIA_UDMA_TIMING 0x50
84
85 #define VIA_UDMA 0x007
86 #define VIA_UDMA_NONE 0x000
87 #define VIA_UDMA_33 0x001
88 #define VIA_UDMA_66 0x002
89 #define VIA_UDMA_100 0x003
90 #define VIA_BAD_PREQ 0x010 /* Crashes if PREQ# till DDACK# set */
91 #define VIA_BAD_CLK66 0x020 /* 66 MHz clock doesn't work correctly */
92 #define VIA_SET_FIFO 0x040 /* Needs to have FIFO split set */
93 #define VIA_NO_UNMASK 0x080 /* Doesn't work with IRQ unmasking on */
94
95 /*
96 * VIA SouthBridge chips.
97 */
98
99 static struct via_isa_bridge {
100 char *name;
101 unsigned short id;
102 unsigned char rev_min;
103 unsigned char rev_max;
104 unsigned short flags;
105 } via_isa_bridges[] = {
106 #ifdef FUTURE_BRIDGES
107 { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_100 },
108 { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_100 },
109 { "vt8233c", PCI_DEVICE_ID_VIA_8233C, 0x00, 0x2f, VIA_UDMA_100 },
110 #endif
111 { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, VIA_UDMA_100 },
112 { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, VIA_UDMA_100 },
113 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, VIA_UDMA_100 },
114 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, VIA_UDMA_66 },
115 { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
116 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, VIA_UDMA_66 },
117 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
118 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, VIA_UDMA_33 | VIA_SET_FIFO },
119 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, VIA_UDMA_33 | VIA_SET_FIFO | VIA_BAD_PREQ },
120 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, VIA_UDMA_33 | VIA_SET_FIFO },
121 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO },
122 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO },
123 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK },
124 { NULL }
125 };
126
127 static struct via_isa_bridge *via_config;
128 static unsigned char via_enabled;
129 static unsigned int via_80w;
130 static unsigned int via_clock;
131 static char *via_dma[] = { "MWDMA16", "UDMA33", "UDMA66", "UDMA100" };
132
133 /*
134 * VIA /proc entry.
135 */
136
137 #ifdef CONFIG_PROC_FS
138
139 #include <linux/stat.h>
140 #include <linux/proc_fs.h>
141
142 int via_proc, via_base;
143 static struct pci_dev *bmide_dev, *isa_dev;
144 extern int (*via_display_info)(char *, char **, off_t, int); /* ide-proc.c */
145
146 static char *via_control3[] = { "No limit", "64", "128", "192" };
147
148 #define via_print(format, arg...) p += sprintf(p, format "\n" , ## arg)
149 #define via_print_drive(name, format, arg...)\
150 p += sprintf(p, name); for (i = 0; i < 4; i++) p += sprintf(p, format, ## arg); p += sprintf(p, "\n");
151
152 static int via_get_info(char *buffer, char **addr, off_t offset, int count)
153 {
154 short speed[4], cycle[4], setup[4], active[4], recover[4], den[4],
155 uen[4], udma[4], umul[4], active8b[4], recover8b[4];
156 struct pci_dev *dev = bmide_dev;
157 unsigned int v, u, i;
158 unsigned short c, w;
159 unsigned char t, x;
160 char *p = buffer;
161
162 via_print("----------VIA BusMastering IDE Configuration----------------");
163
164 via_print("Driver Version: 3.29");
165 via_print("South Bridge: VIA %s", via_config->name);
166
167 pci_read_config_byte(isa_dev, PCI_REVISION_ID, &t);
168 pci_read_config_byte(dev, PCI_REVISION_ID, &x);
169 via_print("Revision: ISA %#x IDE %#x", t, x);
170 via_print("Highest DMA rate: %s", via_dma[via_config->flags & VIA_UDMA]);
171
172 via_print("BM-DMA base: %#x", via_base);
173 via_print("PCI clock: %dMHz", via_clock);
174
175 pci_read_config_byte(dev, VIA_MISC_1, &t);
176 via_print("Master Read Cycle IRDY: %dws", (t & 64) >> 6);
177 via_print("Master Write Cycle IRDY: %dws", (t & 32) >> 5);
178 via_print("BM IDE Status Register Read Retry: %s", (t & 8) ? "yes" : "no");
179
180 pci_read_config_byte(dev, VIA_MISC_3, &t);
181 via_print("Max DRDY Pulse Width: %s%s", via_control3[(t & 0x03)], (t & 0x03) ? " PCI clocks" : "");
182
183 via_print("-----------------------Primary IDE-------Secondary IDE------");
184 via_print("Read DMA FIFO flush: %10s%20s", (t & 0x80) ? "yes" : "no", (t & 0x40) ? "yes" : "no");
185 via_print("End Sector FIFO flush: %10s%20s", (t & 0x20) ? "yes" : "no", (t & 0x10) ? "yes" : "no");
186
187 pci_read_config_byte(dev, VIA_IDE_CONFIG, &t);
188 via_print("Prefetch Buffer: %10s%20s", (t & 0x80) ? "yes" : "no", (t & 0x20) ? "yes" : "no");
189 via_print("Post Write Buffer: %10s%20s", (t & 0x40) ? "yes" : "no", (t & 0x10) ? "yes" : "no");
190
191 pci_read_config_byte(dev, VIA_IDE_ENABLE, &t);
192 via_print("Enabled: %10s%20s", (t & 0x02) ? "yes" : "no", (t & 0x01) ? "yes" : "no");
193
194 c = inb(via_base + 0x02) | (inb(via_base + 0x0a) << 8);
195 via_print("Simplex only: %10s%20s", (c & 0x80) ? "yes" : "no", (c & 0x8000) ? "yes" : "no");
196
197 via_print("Cable Type: %10s%20s", (via_80w & 1) ? "80w" : "40w", (via_80w & 2) ? "80w" : "40w");
198
199 via_print("-------------------drive0----drive1----drive2----drive3-----");
200
201 pci_read_config_byte(dev, VIA_ADDRESS_SETUP, &t);
202 pci_read_config_dword(dev, VIA_DRIVE_TIMING, &v);
203 pci_read_config_word(dev, VIA_8BIT_TIMING, &w);
204
205 if (via_config->flags & VIA_UDMA)
206 pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
207 else u = 0;
208
209 for (i = 0; i < 4; i++) {
210
211 setup[i] = ((t >> ((3 - i) << 1)) & 0x3) + 1;
212 recover8b[i] = ((w >> ((1 - (i >> 1)) << 3)) & 0xf) + 1;
213 active8b[i] = ((w >> (((1 - (i >> 1)) << 3) + 4)) & 0xf) + 1;
214 active[i] = ((v >> (((3 - i) << 3) + 4)) & 0xf) + 1;
215 recover[i] = ((v >> ((3 - i) << 3)) & 0xf) + 1;
216 udma[i] = ((u >> ((3 - i) << 3)) & 0x7) + 2;
217 umul[i] = ((u >> (((3 - i) & 2) << 3)) & 0x8) ? 1 : 2;
218 uen[i] = ((u >> ((3 - i) << 3)) & 0x20);
219 den[i] = (c & ((i & 1) ? 0x40 : 0x20) << ((i & 2) << 2));
220
221 speed[i] = 20 * via_clock / (active[i] + recover[i]);
222 cycle[i] = 1000 / via_clock * (active[i] + recover[i]);
223
224 if (!uen[i] || !den[i])
225 continue;
226
227 switch (via_config->flags & VIA_UDMA) {
228
229 case VIA_UDMA_100:
230 speed[i] = 60 * via_clock / udma[i];
231 cycle[i] = 333 / via_clock * udma[i];
232 break;
233
234 case VIA_UDMA_66:
235 speed[i] = 40 * via_clock / (udma[i] * umul[i]);
236 cycle[i] = 500 / via_clock * (udma[i] * umul[i]);
237 break;
238
239 case VIA_UDMA_33:
240 speed[i] = 20 * via_clock / udma[i];
241 cycle[i] = 1000 / via_clock * udma[i];
242 break;
243 }
244 }
245
246 via_print_drive("Transfer Mode: ", "%10s", den[i] ? (uen[i] ? "UDMA" : "DMA") : "PIO");
247
248 via_print_drive("Address Setup: ", "%8dns", (1000 / via_clock) * setup[i]);
249 via_print_drive("Cmd Active: ", "%8dns", (1000 / via_clock) * active8b[i]);
250 via_print_drive("Cmd Recovery: ", "%8dns", (1000 / via_clock) * recover8b[i]);
251 via_print_drive("Data Active: ", "%8dns", (1000 / via_clock) * active[i]);
252 via_print_drive("Data Recovery: ", "%8dns", (1000 / via_clock) * recover[i]);
253 via_print_drive("Cycle Time: ", "%8dns", cycle[i]);
254 via_print_drive("Transfer Rate: ", "%4d.%dMB/s", speed[i] / 10, speed[i] % 10);
255
256 return p - buffer; /* hoping it is less than 4K... */
257 }
258
259 #endif
260
261 /*
262 * via_set_speed() writes timing values to the chipset registers
263 */
264
265 static void via_set_speed(struct pci_dev *dev, unsigned char dn, struct ide_timing *timing)
266 {
267 unsigned char t;
268
269 pci_read_config_byte(dev, VIA_ADDRESS_SETUP, &t);
270 t = (t & ~(3 << ((3 - dn) << 1))) | ((FIT(timing->setup, 1, 4) - 1) << ((3 - dn) << 1));
271 pci_write_config_byte(dev, VIA_ADDRESS_SETUP, t);
272
273 pci_write_config_byte(dev, VIA_8BIT_TIMING + (1 - (dn >> 1)),
274 ((FIT(timing->act8b, 1, 16) - 1) << 4) | (FIT(timing->rec8b, 1, 16) - 1));
275
276 pci_write_config_byte(dev, VIA_DRIVE_TIMING + (3 - dn),
277 ((FIT(timing->active, 1, 16) - 1) << 4) | (FIT(timing->recover, 1, 16) - 1));
278
279 switch (via_config->flags & VIA_UDMA) {
280 case VIA_UDMA_33: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break;
281 case VIA_UDMA_66: t = timing->udma ? (0xe8 | (FIT(timing->udma, 2, 9) - 2)) : 0x0f; break;
282 case VIA_UDMA_100: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break;
283 default: return;
284 }
285
286 pci_write_config_byte(dev, VIA_UDMA_TIMING + (3 - dn), t);
287 }
288
289 /*
290 * via_set_drive() computes timing values configures the drive and
291 * the chipset to a desired transfer mode. It also can be called
292 * by upper layers.
293 */
294
295 static int via_set_drive(ide_drive_t *drive, unsigned char speed)
296 {
297 ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1);
298 struct ide_timing t, p;
299 int T, UT;
300
301 if (speed != XFER_PIO_SLOW && speed != drive->current_speed)
302 if (ide_config_drive_speed(drive, speed))
303 printk(KERN_WARNING "ide%d: Drive %d didn't accept speed setting. Oh, well.\n",
304 drive->dn >> 1, drive->dn & 1);
305
306 T = 1000 / via_clock;
307
308 switch (via_config->flags & VIA_UDMA) {
309 case VIA_UDMA_33: UT = T; break;
310 case VIA_UDMA_66: UT = T/2; break;
311 case VIA_UDMA_100: UT = T/3; break;
312 default: UT = T; break;
313 }
314
315 ide_timing_compute(drive, speed, &t, T, UT);
316
317 if (peer->present) {
318 ide_timing_compute(peer, peer->current_speed, &p, T, UT);
319 ide_timing_merge(&p, &t, &t, IDE_TIMING_8BIT);
320 }
321
322 via_set_speed(HWIF(drive)->pci_dev, drive->dn, &t);
323
324 if (!drive->init_speed)
325 drive->init_speed = speed;
326 drive->current_speed = speed;
327
328 return 0;
329 }
330
331 /*
332 * via82cxxx_tune_drive() is a callback from upper layers for
333 * PIO-only tuning.
334 */
335
336 static void via82cxxx_tune_drive(ide_drive_t *drive, unsigned char pio)
337 {
338 if (!((via_enabled >> HWIF(drive)->channel) & 1))
339 return;
340
341 if (pio == 255) {
342 via_set_drive(drive, ide_find_best_mode(drive, XFER_PIO | XFER_EPIO));
343 return;
344 }
345
346 via_set_drive(drive, XFER_PIO_0 + MIN(pio, 5));
347 }
348
349 #ifdef CONFIG_BLK_DEV_IDEDMA
350
351 /*
352 * via82cxxx_dmaproc() is a callback from upper layers that can do
353 * a lot, but we use it for DMA/PIO tuning only, delegating everything
354 * else to the default ide_dmaproc().
355 */
356
357 int via82cxxx_dmaproc(ide_dma_action_t func, ide_drive_t *drive)
358 {
359
360 if (func == ide_dma_check) {
361
362 short w80 = HWIF(drive)->udma_four;
363
364 short speed = ide_find_best_mode(drive,
365 XFER_PIO | XFER_EPIO | XFER_SWDMA | XFER_MWDMA |
366 (via_config->flags & VIA_UDMA ? XFER_UDMA : 0) |
367 (w80 && (via_config->flags & VIA_UDMA) >= VIA_UDMA_66 ? XFER_UDMA_66 : 0) |
368 (w80 && (via_config->flags & VIA_UDMA) >= VIA_UDMA_100 ? XFER_UDMA_100 : 0));
369
370 via_set_drive(drive, speed);
371
372 func = (HWIF(drive)->autodma && (speed & XFER_MODE) != XFER_PIO)
373 ? ide_dma_on : ide_dma_off_quietly;
374 }
375
376 return ide_dmaproc(func, drive);
377 }
378
379 #endif /* CONFIG_BLK_DEV_IDEDMA */
380
381 /*
382 * The initialization callback. Here we determine the IDE chip type
383 * and initialize its drive independent registers.
384 */
385
386 unsigned int __init pci_init_via82cxxx(struct pci_dev *dev, const char *name)
387 {
388 struct pci_dev *isa = NULL;
389 unsigned char t, v;
390 unsigned int u;
391 int i;
392
393 /*
394 * Find the ISA bridge to see how good the IDE is.
395 */
396
397 for (via_config = via_isa_bridges; via_config->id; via_config++)
398 if ((isa = pci_find_device(PCI_VENDOR_ID_VIA, via_config->id, NULL))) {
399 pci_read_config_byte(isa, PCI_REVISION_ID, &t);
400 if (t >= via_config->rev_min && t <= via_config->rev_max)
401 break;
402 }
403
404 if (!via_config->id) {
405 printk(KERN_WARNING "VP_IDE: Unknown VIA SouthBridge, contact Vojtech Pavlik <vojtech@suse.cz>\n");
406 return -ENODEV;
407 }
408
409 /*
410 * Check 80-wire cable presence and setup Clk66.
411 */
412
413 switch (via_config->flags & VIA_UDMA) {
414
415 case VIA_UDMA_100:
416
417 pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
418 for (i = 24; i >= 0; i -= 8)
419 if (((u >> i) & 0x10) || (((u >> i) & 0x20) && (((u >> i) & 7) < 3)))
420 via_80w |= (1 << (1 - (i >> 4))); /* BIOS 80-wire bit or UDMA w/ < 50ns/cycle */
421 break;
422
423 case VIA_UDMA_66:
424
425 pci_read_config_dword(dev, VIA_UDMA_TIMING, &u); /* Enable Clk66 */
426 pci_write_config_dword(dev, VIA_UDMA_TIMING, u | 0x80008);
427 for (i = 24; i >= 0; i -= 8)
428 if (((u >> (i & 16)) & 8) && ((u >> i) & 0x20) && (((u >> i) & 7) < 2))
429 via_80w |= (1 << (1 - (i >> 4))); /* 2x PCI clock and UDMA w/ < 3T/cycle */
430 break;
431 }
432
433 if (via_config->flags & VIA_BAD_CLK66) { /* Disable Clk66 */
434 pci_read_config_dword(dev, VIA_UDMA_TIMING, &u); /* Would cause trouble on 596a and 686 */
435 pci_write_config_dword(dev, VIA_UDMA_TIMING, u & ~0x80008);
436 }
437
438 /*
439 * Check whether interfaces are enabled.
440 */
441
442 pci_read_config_byte(dev, VIA_IDE_ENABLE, &v);
443 via_enabled = ((v & 1) ? 2 : 0) | ((v & 2) ? 1 : 0);
444
445 /*
446 * Set up FIFO sizes and thresholds.
447 */
448
449 pci_read_config_byte(dev, VIA_FIFO_CONFIG, &t);
450
451 if (via_config->flags & VIA_BAD_PREQ) /* Disable PREQ# till DDACK# */
452 t &= 0x7f; /* Would crash on 586b rev 41 */
453
454 if (via_config->flags & VIA_SET_FIFO) { /* Fix FIFO split between channels */
455 t &= (t & 0x9f);
456 switch (via_enabled) {
457 case 1: t |= 0x00; break; /* 16 on primary */
458 case 2: t |= 0x60; break; /* 16 on secondary */
459 case 3: t |= 0x20; break; /* 8 pri 8 sec */
460 }
461 }
462
463 pci_write_config_byte(dev, VIA_FIFO_CONFIG, t);
464
465 /*
466 * Determine system bus clock.
467 */
468
469 via_clock = system_bus_clock();
470 if (via_clock < 20 || via_clock > 50) {
471 printk(KERN_WARNING "VP_IDE: User given PCI clock speed impossible (%d), using 33 MHz instead.\n", via_clock);
472 printk(KERN_WARNING "VP_IDE: Use ide0=ata66 if you want to force UDMA66/UDMA100.\n");
473 via_clock = 33;
474 }
475
476 /*
477 * Print the boot message.
478 */
479
480 pci_read_config_byte(isa, PCI_REVISION_ID, &t);
481 printk(KERN_INFO "VP_IDE: VIA %s (rev %02x) IDE %s controller on pci%s\n",
482 via_config->name, t, via_dma[via_config->flags & VIA_UDMA], dev->slot_name);
483
484 /*
485 * Setup /proc/ide/via entry.
486 */
487
488 #ifdef CONFIG_PROC_FS
489 if (!via_proc) {
490 via_base = pci_resource_start(dev, 4);
491 bmide_dev = dev;
492 isa_dev = isa;
493 via_display_info = &via_get_info;
494 via_proc = 1;
495 }
496 #endif
497
498 return 0;
499 }
500
501 unsigned int __init ata66_via82cxxx(ide_hwif_t *hwif)
502 {
503 return ((via_enabled & via_80w) >> hwif->channel) & 1;
504 }
505
506 void __init ide_init_via82cxxx(ide_hwif_t *hwif)
507 {
508 int i;
509
510 hwif->tuneproc = &via82cxxx_tune_drive;
511 hwif->speedproc = &via_set_drive;
512 hwif->autodma = 0;
513
514 for (i = 0; i < 2; i++) {
515 hwif->drives[i].io_32bit = 1;
516 hwif->drives[i].unmask = (via_config->flags & VIA_NO_UNMASK) ? 0 : 1;
517 hwif->drives[i].autotune = 1;
518 hwif->drives[i].dn = hwif->channel * 2 + i;
519 }
520
521 #ifdef CONFIG_BLK_DEV_IDEDMA
522 if (hwif->dma_base) {
523 hwif->dmaproc = &via82cxxx_dmaproc;
524 #ifdef CONFIG_IDEDMA_AUTO
525 if (!noautodma)
526 hwif->autodma = 1;
527 #endif
528 }
529 #endif /* CONFIG_BLK_DEV_IDEDMA */
530 }
531
532 /*
533 * We allow the BM-DMA driver to only work on enabled interfaces.
534 */
535
536 void __init ide_dmacapable_via82cxxx(ide_hwif_t *hwif, unsigned long dmabase)
537 {
538 if ((via_enabled >> hwif->channel) & 1)
539 ide_setup_dma(hwif, dmabase, 8);
540 }
541