File: /usr/src/linux/drivers/isdn/hisax/isar.c
1 /* $Id: isar.c,v 1.17.6.4 2001/08/17 12:34:26 kai Exp $
2 *
3 * isar.c ISAR (Siemens PSB 7110) specific routines
4 *
5 * Author Karsten Keil (keil@isdn4linux.de)
6 *
7 * This file is (c) under GNU General Public License
8 *
9 */
10
11 #define __NO_VERSION__
12 #include <linux/init.h>
13 #include "hisax.h"
14 #include "isar.h"
15 #include "isdnl1.h"
16 #include <linux/interrupt.h>
17
18 #define DBG_LOADFIRM 0
19 #define DUMP_MBOXFRAME 2
20
21 #define DLE 0x10
22 #define ETX 0x03
23
24
25 const u_char faxmodulation_s[] = "3,24,48,72,73,74,96,97,98,121,122,145,146";
26 const u_char faxmodulation[] = {3,24,48,72,73,74,96,97,98,121,122,145,146};
27 #define FAXMODCNT 13
28
29 void isar_setup(struct IsdnCardState *cs);
30 static void isar_pump_cmd(struct BCState *bcs, u_char cmd, u_char para);
31 static inline void ll_deliver_faxstat(struct BCState *bcs, u_char status);
32
33 static inline int
34 waitforHIA(struct IsdnCardState *cs, int timeout)
35 {
36
37 while ((cs->BC_Read_Reg(cs, 0, ISAR_HIA) & 1) && timeout) {
38 udelay(1);
39 timeout--;
40 }
41 if (!timeout)
42 printk(KERN_WARNING "HiSax: ISAR waitforHIA timeout\n");
43 return(timeout);
44 }
45
46
47 int
48 sendmsg(struct IsdnCardState *cs, u_char his, u_char creg, u_char len,
49 u_char *msg)
50 {
51 long flags;
52 int i;
53
54 if (!waitforHIA(cs, 4000))
55 return(0);
56 #if DUMP_MBOXFRAME
57 if (cs->debug & L1_DEB_HSCX)
58 debugl1(cs, "sendmsg(%02x,%02x,%d)", his, creg, len);
59 #endif
60 save_flags(flags);
61 cli();
62 cs->BC_Write_Reg(cs, 0, ISAR_CTRL_H, creg);
63 cs->BC_Write_Reg(cs, 0, ISAR_CTRL_L, len);
64 cs->BC_Write_Reg(cs, 0, ISAR_WADR, 0);
65 if (msg && len) {
66 cs->BC_Write_Reg(cs, 1, ISAR_MBOX, msg[0]);
67 for (i=1; i<len; i++)
68 cs->BC_Write_Reg(cs, 2, ISAR_MBOX, msg[i]);
69 #if DUMP_MBOXFRAME>1
70 if (cs->debug & L1_DEB_HSCX_FIFO) {
71 char tmp[256], *t;
72
73 i = len;
74 while (i>0) {
75 t = tmp;
76 t += sprintf(t, "sendmbox cnt %d", len);
77 QuickHex(t, &msg[len-i], (i>64) ? 64:i);
78 debugl1(cs, tmp);
79 i -= 64;
80 }
81 }
82 #endif
83 }
84 cs->BC_Write_Reg(cs, 1, ISAR_HIS, his);
85 restore_flags(flags);
86 waitforHIA(cs, 10000);
87 return(1);
88 }
89
90 /* Call only with IRQ disabled !!! */
91 inline void
92 rcv_mbox(struct IsdnCardState *cs, struct isar_reg *ireg, u_char *msg)
93 {
94 int i;
95
96 cs->BC_Write_Reg(cs, 1, ISAR_RADR, 0);
97 if (msg && ireg->clsb) {
98 msg[0] = cs->BC_Read_Reg(cs, 1, ISAR_MBOX);
99 for (i=1; i < ireg->clsb; i++)
100 msg[i] = cs->BC_Read_Reg(cs, 2, ISAR_MBOX);
101 #if DUMP_MBOXFRAME>1
102 if (cs->debug & L1_DEB_HSCX_FIFO) {
103 char tmp[256], *t;
104
105 i = ireg->clsb;
106 while (i>0) {
107 t = tmp;
108 t += sprintf(t, "rcv_mbox cnt %d", ireg->clsb);
109 QuickHex(t, &msg[ireg->clsb-i], (i>64) ? 64:i);
110 debugl1(cs, tmp);
111 i -= 64;
112 }
113 }
114 #endif
115 }
116 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
117 }
118
119 /* Call only with IRQ disabled !!! */
120 inline void
121 get_irq_infos(struct IsdnCardState *cs, struct isar_reg *ireg)
122 {
123 ireg->iis = cs->BC_Read_Reg(cs, 1, ISAR_IIS);
124 ireg->cmsb = cs->BC_Read_Reg(cs, 1, ISAR_CTRL_H);
125 ireg->clsb = cs->BC_Read_Reg(cs, 1, ISAR_CTRL_L);
126 #if DUMP_MBOXFRAME
127 if (cs->debug & L1_DEB_HSCX)
128 debugl1(cs, "rcv_mbox(%02x,%02x,%d)", ireg->iis, ireg->cmsb,
129 ireg->clsb);
130 #endif
131 }
132
133 int
134 waitrecmsg(struct IsdnCardState *cs, u_char *len,
135 u_char *msg, int maxdelay)
136 {
137 int timeout = 0;
138 long flags;
139 struct isar_reg *ir = cs->bcs[0].hw.isar.reg;
140
141
142 while((!(cs->BC_Read_Reg(cs, 0, ISAR_IRQBIT) & ISAR_IRQSTA)) &&
143 (timeout++ < maxdelay))
144 udelay(1);
145 if (timeout >= maxdelay) {
146 printk(KERN_WARNING"isar recmsg IRQSTA timeout\n");
147 return(0);
148 }
149 save_flags(flags);
150 cli();
151 get_irq_infos(cs, ir);
152 rcv_mbox(cs, ir, msg);
153 *len = ir->clsb;
154 restore_flags(flags);
155 return(1);
156 }
157
158 int
159 ISARVersion(struct IsdnCardState *cs, char *s)
160 {
161 int ver;
162 u_char msg[] = ISAR_MSG_HWVER;
163 u_char tmp[64];
164 u_char len;
165 int debug;
166
167 cs->cardmsg(cs, CARD_RESET, NULL);
168 /* disable ISAR IRQ */
169 cs->BC_Write_Reg(cs, 0, ISAR_IRQBIT, 0);
170 debug = cs->debug;
171 cs->debug &= ~(L1_DEB_HSCX | L1_DEB_HSCX_FIFO);
172 if (!sendmsg(cs, ISAR_HIS_VNR, 0, 3, msg))
173 return(-1);
174 if (!waitrecmsg(cs, &len, tmp, 100000))
175 return(-2);
176 cs->debug = debug;
177 if (cs->bcs[0].hw.isar.reg->iis == ISAR_IIS_VNR) {
178 if (len == 1) {
179 ver = tmp[0] & 0xf;
180 printk(KERN_INFO "%s ISAR version %d\n", s, ver);
181 return(ver);
182 }
183 return(-3);
184 }
185 return(-4);
186 }
187
188 int
189 isar_load_firmware(struct IsdnCardState *cs, u_char *buf)
190 {
191 int ret, size, cnt, debug;
192 u_char len, nom, noc;
193 u_short sadr, left, *sp;
194 u_char *p = buf;
195 u_char *msg, *tmpmsg, *mp, tmp[64];
196 long flags;
197 struct isar_reg *ireg = cs->bcs[0].hw.isar.reg;
198
199 struct {u_short sadr;
200 u_short len;
201 u_short d_key;
202 } blk_head;
203
204 #define BLK_HEAD_SIZE 6
205 if (1 != (ret = ISARVersion(cs, "Testing"))) {
206 printk(KERN_ERR"isar_load_firmware wrong isar version %d\n", ret);
207 return(1);
208 }
209 debug = cs->debug;
210 #if DBG_LOADFIRM<2
211 cs->debug &= ~(L1_DEB_HSCX | L1_DEB_HSCX_FIFO);
212 #endif
213 printk(KERN_DEBUG"isar_load_firmware buf %#lx\n", (u_long)buf);
214 if ((ret = verify_area(VERIFY_READ, (void *) p, sizeof(int)))) {
215 printk(KERN_ERR"isar_load_firmware verify_area ret %d\n", ret);
216 return ret;
217 }
218 if ((ret = copy_from_user(&size, p, sizeof(int)))) {
219 printk(KERN_ERR"isar_load_firmware copy_from_user ret %d\n", ret);
220 return ret;
221 }
222 p += sizeof(int);
223 printk(KERN_DEBUG"isar_load_firmware size: %d\n", size);
224 if ((ret = verify_area(VERIFY_READ, (void *) p, size))) {
225 printk(KERN_ERR"isar_load_firmware verify_area ret %d\n", ret);
226 return ret;
227 }
228 cnt = 0;
229 /* disable ISAR IRQ */
230 cs->BC_Write_Reg(cs, 0, ISAR_IRQBIT, 0);
231 if (!(msg = kmalloc(256, GFP_KERNEL))) {
232 printk(KERN_ERR"isar_load_firmware no buffer\n");
233 return (1);
234 }
235 if (!(tmpmsg = kmalloc(256, GFP_KERNEL))) {
236 printk(KERN_ERR"isar_load_firmware no tmp buffer\n");
237 kfree(msg);
238 return (1);
239 }
240 while (cnt < size) {
241 if ((ret = copy_from_user(&blk_head, p, BLK_HEAD_SIZE))) {
242 printk(KERN_ERR"isar_load_firmware copy_from_user ret %d\n", ret);
243 goto reterror;
244 }
245 #ifdef __BIG_ENDIAN
246 sadr = (blk_head.sadr & 0xff)*256 + blk_head.sadr/256;
247 blk_head.sadr = sadr;
248 sadr = (blk_head.len & 0xff)*256 + blk_head.len/256;
249 blk_head.len = sadr;
250 sadr = (blk_head.d_key & 0xff)*256 + blk_head.d_key/256;
251 blk_head.d_key = sadr;
252 #endif /* __BIG_ENDIAN */
253 cnt += BLK_HEAD_SIZE;
254 p += BLK_HEAD_SIZE;
255 printk(KERN_DEBUG"isar firmware block (%#x,%5d,%#x)\n",
256 blk_head.sadr, blk_head.len, blk_head.d_key & 0xff);
257 sadr = blk_head.sadr;
258 left = blk_head.len;
259 if (!sendmsg(cs, ISAR_HIS_DKEY, blk_head.d_key & 0xff, 0, NULL)) {
260 printk(KERN_ERR"isar sendmsg dkey failed\n");
261 ret = 1;goto reterror;
262 }
263 if (!waitrecmsg(cs, &len, tmp, 100000)) {
264 printk(KERN_ERR"isar waitrecmsg dkey failed\n");
265 ret = 1;goto reterror;
266 }
267 if ((ireg->iis != ISAR_IIS_DKEY) || ireg->cmsb || len) {
268 printk(KERN_ERR"isar wrong dkey response (%x,%x,%x)\n",
269 ireg->iis, ireg->cmsb, len);
270 ret = 1;goto reterror;
271 }
272 while (left>0) {
273 noc = left;
274 if (noc > 126)
275 noc = 126;
276 nom = 2*noc;
277 mp = msg;
278 *mp++ = sadr / 256;
279 *mp++ = sadr % 256;
280 left -= noc;
281 *mp++ = noc;
282 if ((ret = copy_from_user(tmpmsg, p, nom))) {
283 printk(KERN_ERR"isar_load_firmware copy_from_user ret %d\n", ret);
284 goto reterror;
285 }
286 p += nom;
287 cnt += nom;
288 nom += 3;
289 sp = (u_short *)tmpmsg;
290 #if DBG_LOADFIRM
291 printk(KERN_DEBUG"isar: load %3d words at %04x\n",
292 noc, sadr);
293 #endif
294 sadr += noc;
295 while(noc) {
296 #ifdef __BIG_ENDIAN
297 *mp++ = *sp % 256;
298 *mp++ = *sp / 256;
299 #else
300 *mp++ = *sp / 256;
301 *mp++ = *sp % 256;
302 #endif /* __BIG_ENDIAN */
303 sp++;
304 noc--;
305 }
306 if (!sendmsg(cs, ISAR_HIS_FIRM, 0, nom, msg)) {
307 printk(KERN_ERR"isar sendmsg prog failed\n");
308 ret = 1;goto reterror;
309 }
310 if (!waitrecmsg(cs, &len, tmp, 100000)) {
311 printk(KERN_ERR"isar waitrecmsg prog failed\n");
312 ret = 1;goto reterror;
313 }
314 if ((ireg->iis != ISAR_IIS_FIRM) || ireg->cmsb || len) {
315 printk(KERN_ERR"isar wrong prog response (%x,%x,%x)\n",
316 ireg->iis, ireg->cmsb, len);
317 ret = 1;goto reterror;
318 }
319 }
320 printk(KERN_DEBUG"isar firmware block %5d words loaded\n",
321 blk_head.len);
322 }
323 /* 10ms delay */
324 cnt = 10;
325 while (cnt--)
326 udelay(1000);
327 msg[0] = 0xff;
328 msg[1] = 0xfe;
329 ireg->bstat = 0;
330 if (!sendmsg(cs, ISAR_HIS_STDSP, 0, 2, msg)) {
331 printk(KERN_ERR"isar sendmsg start dsp failed\n");
332 ret = 1;goto reterror;
333 }
334 if (!waitrecmsg(cs, &len, tmp, 100000)) {
335 printk(KERN_ERR"isar waitrecmsg start dsp failed\n");
336 ret = 1;goto reterror;
337 }
338 if ((ireg->iis != ISAR_IIS_STDSP) || ireg->cmsb || len) {
339 printk(KERN_ERR"isar wrong start dsp response (%x,%x,%x)\n",
340 ireg->iis, ireg->cmsb, len);
341 ret = 1;goto reterror;
342 } else
343 printk(KERN_DEBUG"isar start dsp success\n");
344 /* NORMAL mode entered */
345 /* Enable IRQs of ISAR */
346 cs->BC_Write_Reg(cs, 0, ISAR_IRQBIT, ISAR_IRQSTA);
347 save_flags(flags);
348 sti();
349 cnt = 1000; /* max 1s */
350 while ((!ireg->bstat) && cnt) {
351 udelay(1000);
352 cnt--;
353 }
354 if (!cnt) {
355 printk(KERN_ERR"isar no general status event received\n");
356 ret = 1;goto reterrflg;
357 } else {
358 printk(KERN_DEBUG"isar general status event %x\n",
359 ireg->bstat);
360 }
361 /* 10ms delay */
362 cnt = 10;
363 while (cnt--)
364 udelay(1000);
365 ireg->iis = 0;
366 if (!sendmsg(cs, ISAR_HIS_DIAG, ISAR_CTRL_STST, 0, NULL)) {
367 printk(KERN_ERR"isar sendmsg self tst failed\n");
368 ret = 1;goto reterrflg;
369 }
370 cnt = 10000; /* max 100 ms */
371 while ((ireg->iis != ISAR_IIS_DIAG) && cnt) {
372 udelay(10);
373 cnt--;
374 }
375 udelay(1000);
376 if (!cnt) {
377 printk(KERN_ERR"isar no self tst response\n");
378 ret = 1;goto reterrflg;
379 }
380 if ((ireg->cmsb == ISAR_CTRL_STST) && (ireg->clsb == 1)
381 && (ireg->par[0] == 0)) {
382 printk(KERN_DEBUG"isar selftest OK\n");
383 } else {
384 printk(KERN_DEBUG"isar selftest not OK %x/%x/%x\n",
385 ireg->cmsb, ireg->clsb, ireg->par[0]);
386 ret = 1;goto reterrflg;
387 }
388 ireg->iis = 0;
389 if (!sendmsg(cs, ISAR_HIS_DIAG, ISAR_CTRL_SWVER, 0, NULL)) {
390 printk(KERN_ERR"isar RQST SVN failed\n");
391 ret = 1;goto reterrflg;
392 }
393 cnt = 30000; /* max 300 ms */
394 while ((ireg->iis != ISAR_IIS_DIAG) && cnt) {
395 udelay(10);
396 cnt--;
397 }
398 udelay(1000);
399 if (!cnt) {
400 printk(KERN_ERR"isar no SVN response\n");
401 ret = 1;goto reterrflg;
402 } else {
403 if ((ireg->cmsb == ISAR_CTRL_SWVER) && (ireg->clsb == 1))
404 printk(KERN_DEBUG"isar software version %#x\n",
405 ireg->par[0]);
406 else {
407 printk(KERN_ERR"isar wrong swver response (%x,%x) cnt(%d)\n",
408 ireg->cmsb, ireg->clsb, cnt);
409 ret = 1;goto reterrflg;
410 }
411 }
412 cs->debug = debug;
413 isar_setup(cs);
414 ret = 0;
415 reterrflg:
416 restore_flags(flags);
417 reterror:
418 cs->debug = debug;
419 if (ret)
420 /* disable ISAR IRQ */
421 cs->BC_Write_Reg(cs, 0, ISAR_IRQBIT, 0);
422 kfree(msg);
423 kfree(tmpmsg);
424 return(ret);
425 }
426
427 extern void BChannel_bh(struct BCState *);
428 #define B_LL_NOCARRIER 8
429 #define B_LL_CONNECT 9
430 #define B_LL_OK 10
431
432 static void
433 isar_bh(struct BCState *bcs)
434 {
435 BChannel_bh(bcs);
436 if (test_and_clear_bit(B_LL_NOCARRIER, &bcs->event))
437 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_NOCARR);
438 if (test_and_clear_bit(B_LL_CONNECT, &bcs->event))
439 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_CONNECT);
440 if (test_and_clear_bit(B_LL_OK, &bcs->event))
441 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_OK);
442 }
443
444 static void
445 isar_sched_event(struct BCState *bcs, int event)
446 {
447 bcs->event |= 1 << event;
448 queue_task(&bcs->tqueue, &tq_immediate);
449 mark_bh(IMMEDIATE_BH);
450 }
451
452 static inline void
453 send_DLE_ETX(struct BCState *bcs)
454 {
455 u_char dleetx[2] = {DLE,ETX};
456 struct sk_buff *skb;
457
458 if ((skb = dev_alloc_skb(2))) {
459 memcpy(skb_put(skb, 2), dleetx, 2);
460 skb_queue_tail(&bcs->rqueue, skb);
461 isar_sched_event(bcs, B_RCVBUFREADY);
462 } else {
463 printk(KERN_WARNING "HiSax: skb out of memory\n");
464 }
465 }
466
467 static inline int
468 dle_count(unsigned char *buf, int len)
469 {
470 int count = 0;
471
472 while (len--)
473 if (*buf++ == DLE)
474 count++;
475 return count;
476 }
477
478 static inline void
479 insert_dle(unsigned char *dest, unsigned char *src, int count) {
480 /* <DLE> in input stream have to be flagged as <DLE><DLE> */
481 while (count--) {
482 *dest++ = *src;
483 if (*src++ == DLE)
484 *dest++ = DLE;
485 }
486 }
487
488 static inline void
489 isar_rcv_frame(struct IsdnCardState *cs, struct BCState *bcs)
490 {
491 u_char *ptr;
492 struct sk_buff *skb;
493 struct isar_reg *ireg = bcs->hw.isar.reg;
494
495 if (!ireg->clsb) {
496 debugl1(cs, "isar zero len frame");
497 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
498 return;
499 }
500 switch (bcs->mode) {
501 case L1_MODE_NULL:
502 debugl1(cs, "isar mode 0 spurious IIS_RDATA %x/%x/%x",
503 ireg->iis, ireg->cmsb, ireg->clsb);
504 printk(KERN_WARNING"isar mode 0 spurious IIS_RDATA %x/%x/%x\n",
505 ireg->iis, ireg->cmsb, ireg->clsb);
506 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
507 break;
508 case L1_MODE_TRANS:
509 case L1_MODE_V32:
510 if ((skb = dev_alloc_skb(ireg->clsb))) {
511 rcv_mbox(cs, ireg, (u_char *)skb_put(skb, ireg->clsb));
512 skb_queue_tail(&bcs->rqueue, skb);
513 isar_sched_event(bcs, B_RCVBUFREADY);
514 } else {
515 printk(KERN_WARNING "HiSax: skb out of memory\n");
516 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
517 }
518 break;
519 case L1_MODE_HDLC:
520 if ((bcs->hw.isar.rcvidx + ireg->clsb) > HSCX_BUFMAX) {
521 if (cs->debug & L1_DEB_WARN)
522 debugl1(cs, "isar_rcv_frame: incoming packet too large");
523 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
524 bcs->hw.isar.rcvidx = 0;
525 } else if (ireg->cmsb & HDLC_ERROR) {
526 if (cs->debug & L1_DEB_WARN)
527 debugl1(cs, "isar frame error %x len %d",
528 ireg->cmsb, ireg->clsb);
529 #ifdef ERROR_STATISTIC
530 if (ireg->cmsb & HDLC_ERR_RER)
531 bcs->err_inv++;
532 if (ireg->cmsb & HDLC_ERR_CER)
533 bcs->err_crc++;
534 #endif
535 bcs->hw.isar.rcvidx = 0;
536 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
537 } else {
538 if (ireg->cmsb & HDLC_FSD)
539 bcs->hw.isar.rcvidx = 0;
540 ptr = bcs->hw.isar.rcvbuf + bcs->hw.isar.rcvidx;
541 bcs->hw.isar.rcvidx += ireg->clsb;
542 rcv_mbox(cs, ireg, ptr);
543 if (ireg->cmsb & HDLC_FED) {
544 if (bcs->hw.isar.rcvidx < 3) { /* last 2 bytes are the FCS */
545 if (cs->debug & L1_DEB_WARN)
546 debugl1(cs, "isar frame to short %d",
547 bcs->hw.isar.rcvidx);
548 } else if (!(skb = dev_alloc_skb(bcs->hw.isar.rcvidx-2))) {
549 printk(KERN_WARNING "ISAR: receive out of memory\n");
550 } else {
551 memcpy(skb_put(skb, bcs->hw.isar.rcvidx-2),
552 bcs->hw.isar.rcvbuf, bcs->hw.isar.rcvidx-2);
553 skb_queue_tail(&bcs->rqueue, skb);
554 isar_sched_event(bcs, B_RCVBUFREADY);
555 }
556 bcs->hw.isar.rcvidx = 0;
557 }
558 }
559 break;
560 case L1_MODE_FAX:
561 if (bcs->hw.isar.state != STFAX_ACTIV) {
562 if (cs->debug & L1_DEB_WARN)
563 debugl1(cs, "isar_rcv_frame: not ACTIV");
564 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
565 bcs->hw.isar.rcvidx = 0;
566 break;
567 }
568 if (bcs->hw.isar.cmd == PCTRL_CMD_FRM) {
569 rcv_mbox(cs, ireg, bcs->hw.isar.rcvbuf);
570 bcs->hw.isar.rcvidx = ireg->clsb +
571 dle_count(bcs->hw.isar.rcvbuf, ireg->clsb);
572 if (cs->debug & L1_DEB_HSCX)
573 debugl1(cs, "isar_rcv_frame: raw(%d) dle(%d)",
574 ireg->clsb, bcs->hw.isar.rcvidx);
575 if ((skb = dev_alloc_skb(bcs->hw.isar.rcvidx))) {
576 insert_dle((u_char *)skb_put(skb, bcs->hw.isar.rcvidx),
577 bcs->hw.isar.rcvbuf, ireg->clsb);
578 skb_queue_tail(&bcs->rqueue, skb);
579 isar_sched_event(bcs, B_RCVBUFREADY);
580 if (ireg->cmsb & SART_NMD) { /* ABORT */
581 if (cs->debug & L1_DEB_WARN)
582 debugl1(cs, "isar_rcv_frame: no more data");
583 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
584 bcs->hw.isar.rcvidx = 0;
585 send_DLE_ETX(bcs);
586 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) |
587 ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC,
588 0, NULL);
589 bcs->hw.isar.state = STFAX_ESCAPE;
590 isar_sched_event(bcs, B_LL_NOCARRIER);
591 }
592 } else {
593 printk(KERN_WARNING "HiSax: skb out of memory\n");
594 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
595 }
596 break;
597 }
598 if (bcs->hw.isar.cmd != PCTRL_CMD_FRH) {
599 if (cs->debug & L1_DEB_WARN)
600 debugl1(cs, "isar_rcv_frame: unknown fax mode %x",
601 bcs->hw.isar.cmd);
602 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
603 bcs->hw.isar.rcvidx = 0;
604 break;
605 }
606 /* PCTRL_CMD_FRH */
607 if ((bcs->hw.isar.rcvidx + ireg->clsb) > HSCX_BUFMAX) {
608 if (cs->debug & L1_DEB_WARN)
609 debugl1(cs, "isar_rcv_frame: incoming packet too large");
610 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
611 bcs->hw.isar.rcvidx = 0;
612 } else if (ireg->cmsb & HDLC_ERROR) {
613 if (cs->debug & L1_DEB_WARN)
614 debugl1(cs, "isar frame error %x len %d",
615 ireg->cmsb, ireg->clsb);
616 bcs->hw.isar.rcvidx = 0;
617 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
618 } else {
619 if (ireg->cmsb & HDLC_FSD)
620 bcs->hw.isar.rcvidx = 0;
621 ptr = bcs->hw.isar.rcvbuf + bcs->hw.isar.rcvidx;
622 bcs->hw.isar.rcvidx += ireg->clsb;
623 rcv_mbox(cs, ireg, ptr);
624 if (ireg->cmsb & HDLC_FED) {
625 int len = bcs->hw.isar.rcvidx +
626 dle_count(bcs->hw.isar.rcvbuf, bcs->hw.isar.rcvidx);
627 if (bcs->hw.isar.rcvidx < 3) { /* last 2 bytes are the FCS */
628 if (cs->debug & L1_DEB_WARN)
629 debugl1(cs, "isar frame to short %d",
630 bcs->hw.isar.rcvidx);
631 } else if (!(skb = dev_alloc_skb(bcs->hw.isar.rcvidx))) {
632 printk(KERN_WARNING "ISAR: receive out of memory\n");
633 } else {
634 insert_dle((u_char *)skb_put(skb, len),
635 bcs->hw.isar.rcvbuf,
636 bcs->hw.isar.rcvidx);
637 skb_queue_tail(&bcs->rqueue, skb);
638 isar_sched_event(bcs, B_RCVBUFREADY);
639 send_DLE_ETX(bcs);
640 isar_sched_event(bcs, B_LL_OK);
641 }
642 bcs->hw.isar.rcvidx = 0;
643 }
644 }
645 if (ireg->cmsb & SART_NMD) { /* ABORT */
646 if (cs->debug & L1_DEB_WARN)
647 debugl1(cs, "isar_rcv_frame: no more data");
648 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
649 bcs->hw.isar.rcvidx = 0;
650 send_DLE_ETX(bcs);
651 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) |
652 ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC, 0, NULL);
653 bcs->hw.isar.state = STFAX_ESCAPE;
654 isar_sched_event(bcs, B_LL_NOCARRIER);
655 }
656 break;
657 default:
658 printk(KERN_ERR"isar_rcv_frame mode (%x)error\n", bcs->mode);
659 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
660 break;
661 }
662 }
663
664 void
665 isar_fill_fifo(struct BCState *bcs)
666 {
667 struct IsdnCardState *cs = bcs->cs;
668 int count;
669 u_char msb;
670 u_char *ptr;
671 long flags;
672
673 if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
674 debugl1(cs, "isar_fill_fifo");
675 if (!bcs->tx_skb)
676 return;
677 if (bcs->tx_skb->len <= 0)
678 return;
679 if (!(bcs->hw.isar.reg->bstat &
680 (bcs->hw.isar.dpath == 1 ? BSTAT_RDM1 : BSTAT_RDM2)))
681 return;
682 if (bcs->tx_skb->len > bcs->hw.isar.mml) {
683 msb = 0;
684 count = bcs->hw.isar.mml;
685 } else {
686 count = bcs->tx_skb->len;
687 msb = HDLC_FED;
688 }
689 save_flags(flags);
690 cli();
691 ptr = bcs->tx_skb->data;
692 if (!bcs->hw.isar.txcnt) {
693 msb |= HDLC_FST;
694 if ((bcs->mode == L1_MODE_FAX) &&
695 (bcs->hw.isar.cmd == PCTRL_CMD_FTH)) {
696 if (bcs->tx_skb->len > 1) {
697 if ((ptr[0]== 0xff) && (ptr[1] == 0x13))
698 /* last frame */
699 test_and_set_bit(BC_FLG_LASTDATA,
700 &bcs->Flag);
701 }
702 }
703 }
704 skb_pull(bcs->tx_skb, count);
705 bcs->tx_cnt -= count;
706 bcs->hw.isar.txcnt += count;
707 switch (bcs->mode) {
708 case L1_MODE_NULL:
709 printk(KERN_ERR"isar_fill_fifo wrong mode 0\n");
710 break;
711 case L1_MODE_TRANS:
712 case L1_MODE_V32:
713 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) | ISAR_HIS_SDATA,
714 0, count, ptr);
715 break;
716 case L1_MODE_HDLC:
717 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) | ISAR_HIS_SDATA,
718 msb, count, ptr);
719 break;
720 case L1_MODE_FAX:
721 if (bcs->hw.isar.state != STFAX_ACTIV) {
722 if (cs->debug & L1_DEB_WARN)
723 debugl1(cs, "isar_fill_fifo: not ACTIV");
724 } else if (bcs->hw.isar.cmd == PCTRL_CMD_FTH) {
725 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) | ISAR_HIS_SDATA,
726 msb, count, ptr);
727 } else if (bcs->hw.isar.cmd == PCTRL_CMD_FTM) {
728 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) | ISAR_HIS_SDATA,
729 0, count, ptr);
730 } else {
731 if (cs->debug & L1_DEB_WARN)
732 debugl1(cs, "isar_fill_fifo: not FTH/FTM");
733 }
734 break;
735 default:
736 if (cs->debug)
737 debugl1(cs, "isar_fill_fifo mode(%x) error", bcs->mode);
738 printk(KERN_ERR"isar_fill_fifo mode(%x) error\n", bcs->mode);
739 break;
740 }
741 restore_flags(flags);
742 }
743
744 inline
745 struct BCState *sel_bcs_isar(struct IsdnCardState *cs, u_char dpath)
746 {
747 if ((!dpath) || (dpath == 3))
748 return(NULL);
749 if (cs->bcs[0].hw.isar.dpath == dpath)
750 return(&cs->bcs[0]);
751 if (cs->bcs[1].hw.isar.dpath == dpath)
752 return(&cs->bcs[1]);
753 return(NULL);
754 }
755
756 inline void
757 send_frames(struct BCState *bcs)
758 {
759 if (bcs->tx_skb) {
760 if (bcs->tx_skb->len) {
761 isar_fill_fifo(bcs);
762 return;
763 } else {
764 if (bcs->st->lli.l1writewakeup &&
765 (PACKET_NOACK != bcs->tx_skb->pkt_type))
766 bcs->st->lli.l1writewakeup(bcs->st, bcs->hw.isar.txcnt);
767 if (bcs->mode == L1_MODE_FAX) {
768 if (bcs->hw.isar.cmd == PCTRL_CMD_FTH) {
769 if (test_bit(BC_FLG_LASTDATA, &bcs->Flag)) {
770 test_and_set_bit(BC_FLG_NMD_DATA, &bcs->Flag);
771 }
772 } else if (bcs->hw.isar.cmd == PCTRL_CMD_FTM) {
773 if (test_bit(BC_FLG_DLEETX, &bcs->Flag)) {
774 test_and_set_bit(BC_FLG_LASTDATA, &bcs->Flag);
775 test_and_set_bit(BC_FLG_NMD_DATA, &bcs->Flag);
776 }
777 }
778 }
779 dev_kfree_skb_any(bcs->tx_skb);
780 bcs->hw.isar.txcnt = 0;
781 bcs->tx_skb = NULL;
782 }
783 }
784 if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) {
785 bcs->hw.isar.txcnt = 0;
786 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
787 isar_fill_fifo(bcs);
788 } else {
789 if (test_and_clear_bit(BC_FLG_DLEETX, &bcs->Flag)) {
790 if (test_and_clear_bit(BC_FLG_LASTDATA, &bcs->Flag)) {
791 if (test_and_clear_bit(BC_FLG_NMD_DATA, &bcs->Flag)) {
792 u_char dummy = 0;
793 sendmsg(bcs->cs, SET_DPS(bcs->hw.isar.dpath) |
794 ISAR_HIS_SDATA, 0x01, 1, &dummy);
795 }
796 test_and_set_bit(BC_FLG_LL_OK, &bcs->Flag);
797 } else {
798 isar_sched_event(bcs, B_LL_CONNECT);
799 }
800 }
801 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
802 isar_sched_event(bcs, B_XMTBUFREADY);
803 }
804 }
805
806 inline void
807 check_send(struct IsdnCardState *cs, u_char rdm)
808 {
809 struct BCState *bcs;
810
811 if (rdm & BSTAT_RDM1) {
812 if ((bcs = sel_bcs_isar(cs, 1))) {
813 if (bcs->mode) {
814 send_frames(bcs);
815 }
816 }
817 }
818 if (rdm & BSTAT_RDM2) {
819 if ((bcs = sel_bcs_isar(cs, 2))) {
820 if (bcs->mode) {
821 send_frames(bcs);
822 }
823 }
824 }
825
826 }
827
828 const char *dmril[] = {"NO SPEED", "1200/75", "NODEF2", "75/1200", "NODEF4",
829 "300", "600", "1200", "2400", "4800", "7200",
830 "9600nt", "9600t", "12000", "14400", "WRONG"};
831 const char *dmrim[] = {"NO MOD", "NO DEF", "V32/V32b", "V22", "V21",
832 "Bell103", "V23", "Bell202", "V17", "V29", "V27ter"};
833
834 static void
835 isar_pump_status_rsp(struct BCState *bcs, struct isar_reg *ireg) {
836 struct IsdnCardState *cs = bcs->cs;
837 u_char ril = ireg->par[0];
838 u_char rim;
839
840 if (!test_and_clear_bit(ISAR_RATE_REQ, &bcs->hw.isar.reg->Flags))
841 return;
842 if (ril > 14) {
843 if (cs->debug & L1_DEB_WARN)
844 debugl1(cs, "wrong pstrsp ril=%d",ril);
845 ril = 15;
846 }
847 switch(ireg->par[1]) {
848 case 0:
849 rim = 0;
850 break;
851 case 0x20:
852 rim = 2;
853 break;
854 case 0x40:
855 rim = 3;
856 break;
857 case 0x41:
858 rim = 4;
859 break;
860 case 0x51:
861 rim = 5;
862 break;
863 case 0x61:
864 rim = 6;
865 break;
866 case 0x71:
867 rim = 7;
868 break;
869 case 0x82:
870 rim = 8;
871 break;
872 case 0x92:
873 rim = 9;
874 break;
875 case 0xa2:
876 rim = 10;
877 break;
878 default:
879 rim = 1;
880 break;
881 }
882 sprintf(bcs->hw.isar.conmsg,"%s %s", dmril[ril], dmrim[rim]);
883 bcs->conmsg = bcs->hw.isar.conmsg;
884 if (cs->debug & L1_DEB_HSCX)
885 debugl1(cs, "pump strsp %s", bcs->conmsg);
886 }
887
888 static void
889 isar_pump_statev_modem(struct BCState *bcs, u_char devt) {
890 struct IsdnCardState *cs = bcs->cs;
891 u_char dps = SET_DPS(bcs->hw.isar.dpath);
892
893 switch(devt) {
894 case PSEV_10MS_TIMER:
895 if (cs->debug & L1_DEB_HSCX)
896 debugl1(cs, "pump stev TIMER");
897 break;
898 case PSEV_CON_ON:
899 if (cs->debug & L1_DEB_HSCX)
900 debugl1(cs, "pump stev CONNECT");
901 l1_msg_b(bcs->st, PH_ACTIVATE | REQUEST, NULL);
902 break;
903 case PSEV_CON_OFF:
904 if (cs->debug & L1_DEB_HSCX)
905 debugl1(cs, "pump stev NO CONNECT");
906 sendmsg(cs, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
907 l1_msg_b(bcs->st, PH_DEACTIVATE | REQUEST, NULL);
908 break;
909 case PSEV_V24_OFF:
910 if (cs->debug & L1_DEB_HSCX)
911 debugl1(cs, "pump stev V24 OFF");
912 break;
913 case PSEV_CTS_ON:
914 if (cs->debug & L1_DEB_HSCX)
915 debugl1(cs, "pump stev CTS ON");
916 break;
917 case PSEV_CTS_OFF:
918 if (cs->debug & L1_DEB_HSCX)
919 debugl1(cs, "pump stev CTS OFF");
920 break;
921 case PSEV_DCD_ON:
922 if (cs->debug & L1_DEB_HSCX)
923 debugl1(cs, "pump stev CARRIER ON");
924 test_and_set_bit(ISAR_RATE_REQ, &bcs->hw.isar.reg->Flags);
925 sendmsg(cs, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
926 break;
927 case PSEV_DCD_OFF:
928 if (cs->debug & L1_DEB_HSCX)
929 debugl1(cs, "pump stev CARRIER OFF");
930 break;
931 case PSEV_DSR_ON:
932 if (cs->debug & L1_DEB_HSCX)
933 debugl1(cs, "pump stev DSR ON");
934 break;
935 case PSEV_DSR_OFF:
936 if (cs->debug & L1_DEB_HSCX)
937 debugl1(cs, "pump stev DSR_OFF");
938 break;
939 case PSEV_REM_RET:
940 if (cs->debug & L1_DEB_HSCX)
941 debugl1(cs, "pump stev REMOTE RETRAIN");
942 break;
943 case PSEV_REM_REN:
944 if (cs->debug & L1_DEB_HSCX)
945 debugl1(cs, "pump stev REMOTE RENEGOTIATE");
946 break;
947 case PSEV_GSTN_CLR:
948 if (cs->debug & L1_DEB_HSCX)
949 debugl1(cs, "pump stev GSTN CLEAR", devt);
950 break;
951 default:
952 if (cs->debug & L1_DEB_HSCX)
953 debugl1(cs, "unknown pump stev %x", devt);
954 break;
955 }
956 }
957
958 static inline void
959 ll_deliver_faxstat(struct BCState *bcs, u_char status)
960 {
961 isdn_ctrl ic;
962 struct Channel *chanp = (struct Channel *) bcs->st->lli.userdata;
963
964 if (bcs->cs->debug & L1_DEB_HSCX)
965 debugl1(bcs->cs, "HL->LL FAXIND %x", status);
966 ic.driver = bcs->cs->myid;
967 ic.command = ISDN_STAT_FAXIND;
968 ic.arg = chanp->chan;
969 ic.parm.aux.cmd = status;
970 bcs->cs->iif.statcallb(&ic);
971 }
972
973 static void
974 isar_pump_statev_fax(struct BCState *bcs, u_char devt) {
975 struct IsdnCardState *cs = bcs->cs;
976 u_char dps = SET_DPS(bcs->hw.isar.dpath);
977 u_char p1;
978
979 switch(devt) {
980 case PSEV_10MS_TIMER:
981 if (cs->debug & L1_DEB_HSCX)
982 debugl1(cs, "pump stev TIMER");
983 break;
984 case PSEV_RSP_READY:
985 if (cs->debug & L1_DEB_HSCX)
986 debugl1(cs, "pump stev RSP_READY");
987 bcs->hw.isar.state = STFAX_READY;
988 l1_msg_b(bcs->st, PH_ACTIVATE | REQUEST, NULL);
989 if (test_bit(BC_FLG_ORIG, &bcs->Flag)) {
990 isar_pump_cmd(bcs, ISDN_FAX_CLASS1_FRH, 3);
991 } else {
992 isar_pump_cmd(bcs, ISDN_FAX_CLASS1_FTH, 3);
993 }
994 break;
995 case PSEV_LINE_TX_H:
996 if (bcs->hw.isar.state == STFAX_LINE) {
997 if (cs->debug & L1_DEB_HSCX)
998 debugl1(cs, "pump stev LINE_TX_H");
999 bcs->hw.isar.state = STFAX_CONT;
1000 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_CONT, 0, NULL);
1001 } else {
1002 if (cs->debug & L1_DEB_WARN)
1003 debugl1(cs, "pump stev LINE_TX_H wrong st %x",
1004 bcs->hw.isar.state);
1005 }
1006 break;
1007 case PSEV_LINE_RX_H:
1008 if (bcs->hw.isar.state == STFAX_LINE) {
1009 if (cs->debug & L1_DEB_HSCX)
1010 debugl1(cs, "pump stev LINE_RX_H");
1011 bcs->hw.isar.state = STFAX_CONT;
1012 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_CONT, 0, NULL);
1013 } else {
1014 if (cs->debug & L1_DEB_WARN)
1015 debugl1(cs, "pump stev LINE_RX_H wrong st %x",
1016 bcs->hw.isar.state);
1017 }
1018 break;
1019 case PSEV_LINE_TX_B:
1020 if (bcs->hw.isar.state == STFAX_LINE) {
1021 if (cs->debug & L1_DEB_HSCX)
1022 debugl1(cs, "pump stev LINE_TX_B");
1023 bcs->hw.isar.state = STFAX_CONT;
1024 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_CONT, 0, NULL);
1025 } else {
1026 if (cs->debug & L1_DEB_WARN)
1027 debugl1(cs, "pump stev LINE_TX_B wrong st %x",
1028 bcs->hw.isar.state);
1029 }
1030 break;
1031 case PSEV_LINE_RX_B:
1032 if (bcs->hw.isar.state == STFAX_LINE) {
1033 if (cs->debug & L1_DEB_HSCX)
1034 debugl1(cs, "pump stev LINE_RX_B");
1035 bcs->hw.isar.state = STFAX_CONT;
1036 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_CONT, 0, NULL);
1037 } else {
1038 if (cs->debug & L1_DEB_WARN)
1039 debugl1(cs, "pump stev LINE_RX_B wrong st %x",
1040 bcs->hw.isar.state);
1041 }
1042 break;
1043 case PSEV_RSP_CONN:
1044 if (bcs->hw.isar.state == STFAX_CONT) {
1045 if (cs->debug & L1_DEB_HSCX)
1046 debugl1(cs, "pump stev RSP_CONN");
1047 bcs->hw.isar.state = STFAX_ACTIV;
1048 test_and_set_bit(ISAR_RATE_REQ, &bcs->hw.isar.reg->Flags);
1049 sendmsg(cs, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
1050 if (bcs->hw.isar.cmd == PCTRL_CMD_FTH) {
1051 /* 1s Flags before data */
1052 if (test_and_set_bit(BC_FLG_FTI_RUN, &bcs->Flag))
1053 del_timer(&bcs->hw.isar.ftimer);
1054 /* 1000 ms */
1055 bcs->hw.isar.ftimer.expires =
1056 jiffies + ((1000 * HZ)/1000);
1057 test_and_set_bit(BC_FLG_LL_CONN,
1058 &bcs->Flag);
1059 add_timer(&bcs->hw.isar.ftimer);
1060 } else {
1061 isar_sched_event(bcs, B_LL_CONNECT);
1062 }
1063 } else {
1064 if (cs->debug & L1_DEB_WARN)
1065 debugl1(cs, "pump stev RSP_CONN wrong st %x",
1066 bcs->hw.isar.state);
1067 }
1068 break;
1069 case PSEV_FLAGS_DET:
1070 if (cs->debug & L1_DEB_HSCX)
1071 debugl1(cs, "pump stev FLAGS_DET");
1072 break;
1073 case PSEV_RSP_DISC:
1074 if (cs->debug & L1_DEB_HSCX)
1075 debugl1(cs, "pump stev RSP_DISC");
1076 if (bcs->hw.isar.state == STFAX_ESCAPE) {
1077 switch(bcs->hw.isar.newcmd) {
1078 case 0:
1079 bcs->hw.isar.state = STFAX_READY;
1080 break;
1081 case PCTRL_CMD_FTH:
1082 case PCTRL_CMD_FTM:
1083 p1 = 10;
1084 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL,
1085 PCTRL_CMD_SILON, 1, &p1);
1086 bcs->hw.isar.state = STFAX_SILDET;
1087 break;
1088 case PCTRL_CMD_FRH:
1089 case PCTRL_CMD_FRM:
1090 p1 = bcs->hw.isar.mod = bcs->hw.isar.newmod;
1091 bcs->hw.isar.newmod = 0;
1092 bcs->hw.isar.cmd = bcs->hw.isar.newcmd;
1093 bcs->hw.isar.newcmd = 0;
1094 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL,
1095 bcs->hw.isar.cmd, 1, &p1);
1096 bcs->hw.isar.state = STFAX_LINE;
1097 bcs->hw.isar.try_mod = 3;
1098 break;
1099 default:
1100 if (cs->debug & L1_DEB_HSCX)
1101 debugl1(cs, "RSP_DISC unknown newcmd %x", bcs->hw.isar.newcmd);
1102 break;
1103 }
1104 } else if (bcs->hw.isar.state == STFAX_ACTIV) {
1105 if (test_and_clear_bit(BC_FLG_LL_OK, &bcs->Flag)) {
1106 isar_sched_event(bcs, B_LL_OK);
1107 } else if (bcs->hw.isar.cmd == PCTRL_CMD_FRM) {
1108 send_DLE_ETX(bcs);
1109 isar_sched_event(bcs, B_LL_NOCARRIER);
1110 } else {
1111 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_FCERROR);
1112 }
1113 bcs->hw.isar.state = STFAX_READY;
1114 } else {
1115 bcs->hw.isar.state = STFAX_READY;
1116 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_FCERROR);
1117 }
1118 break;
1119 case PSEV_RSP_SILDET:
1120 if (cs->debug & L1_DEB_HSCX)
1121 debugl1(cs, "pump stev RSP_SILDET");
1122 if (bcs->hw.isar.state == STFAX_SILDET) {
1123 p1 = bcs->hw.isar.mod = bcs->hw.isar.newmod;
1124 bcs->hw.isar.newmod = 0;
1125 bcs->hw.isar.cmd = bcs->hw.isar.newcmd;
1126 bcs->hw.isar.newcmd = 0;
1127 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL,
1128 bcs->hw.isar.cmd, 1, &p1);
1129 bcs->hw.isar.state = STFAX_LINE;
1130 bcs->hw.isar.try_mod = 3;
1131 }
1132 break;
1133 case PSEV_RSP_SILOFF:
1134 if (cs->debug & L1_DEB_HSCX)
1135 debugl1(cs, "pump stev RSP_SILOFF");
1136 break;
1137 case PSEV_RSP_FCERR:
1138 if (bcs->hw.isar.state == STFAX_LINE) {
1139 if (cs->debug & L1_DEB_HSCX)
1140 debugl1(cs, "pump stev RSP_FCERR try %d",
1141 bcs->hw.isar.try_mod);
1142 if (bcs->hw.isar.try_mod--) {
1143 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL,
1144 bcs->hw.isar.cmd, 1,
1145 &bcs->hw.isar.mod);
1146 break;
1147 }
1148 }
1149 if (cs->debug & L1_DEB_HSCX)
1150 debugl1(cs, "pump stev RSP_FCERR");
1151 bcs->hw.isar.state = STFAX_ESCAPE;
1152 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC, 0, NULL);
1153 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_FCERROR);
1154 break;
1155 default:
1156 break;
1157 }
1158 }
1159
1160 static char debbuf[128];
1161
1162 void
1163 isar_int_main(struct IsdnCardState *cs)
1164 {
1165 long flags;
1166 struct isar_reg *ireg = cs->bcs[0].hw.isar.reg;
1167 struct BCState *bcs;
1168
1169 save_flags(flags);
1170 cli();
1171 get_irq_infos(cs, ireg);
1172 switch (ireg->iis & ISAR_IIS_MSCMSD) {
1173 case ISAR_IIS_RDATA:
1174 if ((bcs = sel_bcs_isar(cs, ireg->iis >> 6))) {
1175 isar_rcv_frame(cs, bcs);
1176 } else {
1177 debugl1(cs, "isar spurious IIS_RDATA %x/%x/%x",
1178 ireg->iis, ireg->cmsb, ireg->clsb);
1179 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
1180 }
1181 break;
1182 case ISAR_IIS_GSTEV:
1183 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
1184 ireg->bstat |= ireg->cmsb;
1185 check_send(cs, ireg->cmsb);
1186 break;
1187 case ISAR_IIS_BSTEV:
1188 #ifdef ERROR_STATISTIC
1189 if ((bcs = sel_bcs_isar(cs, ireg->iis >> 6))) {
1190 if (ireg->cmsb == BSTEV_TBO)
1191 bcs->err_tx++;
1192 if (ireg->cmsb == BSTEV_RBO)
1193 bcs->err_rdo++;
1194 }
1195 #endif
1196 if (cs->debug & L1_DEB_WARN)
1197 debugl1(cs, "Buffer STEV dpath%d msb(%x)",
1198 ireg->iis>>6, ireg->cmsb);
1199 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
1200 break;
1201 case ISAR_IIS_PSTEV:
1202 if ((bcs = sel_bcs_isar(cs, ireg->iis >> 6))) {
1203 rcv_mbox(cs, ireg, (u_char *)ireg->par);
1204 if (bcs->mode == L1_MODE_V32) {
1205 isar_pump_statev_modem(bcs, ireg->cmsb);
1206 } else if (bcs->mode == L1_MODE_FAX) {
1207 isar_pump_statev_fax(bcs, ireg->cmsb);
1208 } else {
1209 if (cs->debug & L1_DEB_WARN)
1210 debugl1(cs, "isar IIS_PSTEV pmode %d stat %x",
1211 bcs->mode, ireg->cmsb);
1212 }
1213 } else {
1214 debugl1(cs, "isar spurious IIS_PSTEV %x/%x/%x",
1215 ireg->iis, ireg->cmsb, ireg->clsb);
1216 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
1217 }
1218 break;
1219 case ISAR_IIS_PSTRSP:
1220 if ((bcs = sel_bcs_isar(cs, ireg->iis >> 6))) {
1221 rcv_mbox(cs, ireg, (u_char *)ireg->par);
1222 isar_pump_status_rsp(bcs, ireg);
1223 } else {
1224 debugl1(cs, "isar spurious IIS_PSTRSP %x/%x/%x",
1225 ireg->iis, ireg->cmsb, ireg->clsb);
1226 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
1227 }
1228 break;
1229 case ISAR_IIS_DIAG:
1230 case ISAR_IIS_BSTRSP:
1231 case ISAR_IIS_IOM2RSP:
1232 rcv_mbox(cs, ireg, (u_char *)ireg->par);
1233 if ((cs->debug & (L1_DEB_HSCX | L1_DEB_HSCX_FIFO))
1234 == L1_DEB_HSCX) {
1235 u_char *tp=debbuf;
1236
1237 tp += sprintf(debbuf, "msg iis(%x) msb(%x)",
1238 ireg->iis, ireg->cmsb);
1239 QuickHex(tp, (u_char *)ireg->par, ireg->clsb);
1240 debugl1(cs, debbuf);
1241 }
1242 break;
1243 case ISAR_IIS_INVMSG:
1244 rcv_mbox(cs, ireg, debbuf);
1245 if (cs->debug & L1_DEB_WARN)
1246 debugl1(cs, "invalid msg his:%x",
1247 ireg->cmsb);
1248 break;
1249 default:
1250 rcv_mbox(cs, ireg, debbuf);
1251 if (cs->debug & L1_DEB_WARN)
1252 debugl1(cs, "unhandled msg iis(%x) ctrl(%x/%x)",
1253 ireg->iis, ireg->cmsb, ireg->clsb);
1254 break;
1255 }
1256 restore_flags(flags);
1257 }
1258
1259 static void
1260 ftimer_handler(struct BCState *bcs) {
1261 if (bcs->cs->debug)
1262 debugl1(bcs->cs, "ftimer flags %04x",
1263 bcs->Flag);
1264 test_and_clear_bit(BC_FLG_FTI_RUN, &bcs->Flag);
1265 if (test_and_clear_bit(BC_FLG_LL_CONN, &bcs->Flag)) {
1266 isar_sched_event(bcs, B_LL_CONNECT);
1267 }
1268 }
1269
1270 static void
1271 setup_pump(struct BCState *bcs) {
1272 struct IsdnCardState *cs = bcs->cs;
1273 u_char dps = SET_DPS(bcs->hw.isar.dpath);
1274 u_char ctrl, param[6];
1275
1276 switch (bcs->mode) {
1277 case L1_MODE_NULL:
1278 case L1_MODE_TRANS:
1279 case L1_MODE_HDLC:
1280 sendmsg(cs, dps | ISAR_HIS_PUMPCFG, PMOD_BYPASS, 0, NULL);
1281 break;
1282 case L1_MODE_V32:
1283 ctrl = PMOD_DATAMODEM;
1284 if (test_bit(BC_FLG_ORIG, &bcs->Flag)) {
1285 ctrl |= PCTRL_ORIG;
1286 param[5] = PV32P6_CTN;
1287 } else {
1288 param[5] = PV32P6_ATN;
1289 }
1290 param[0] = 6; /* 6 db */
1291 param[1] = PV32P2_V23R | PV32P2_V22A | PV32P2_V22B |
1292 PV32P2_V22C | PV32P2_V21 | PV32P2_BEL;
1293 param[2] = PV32P3_AMOD | PV32P3_V32B | PV32P3_V23B;
1294 param[3] = PV32P4_UT144;
1295 param[4] = PV32P5_UT144;
1296 sendmsg(cs, dps | ISAR_HIS_PUMPCFG, ctrl, 6, param);
1297 break;
1298 case L1_MODE_FAX:
1299 ctrl = PMOD_FAX;
1300 if (test_bit(BC_FLG_ORIG, &bcs->Flag)) {
1301 ctrl |= PCTRL_ORIG;
1302 param[1] = PFAXP2_CTN;
1303 } else {
1304 param[1] = PFAXP2_ATN;
1305 }
1306 param[0] = 6; /* 6 db */
1307 sendmsg(cs, dps | ISAR_HIS_PUMPCFG, ctrl, 2, param);
1308 bcs->hw.isar.state = STFAX_NULL;
1309 bcs->hw.isar.newcmd = 0;
1310 bcs->hw.isar.newmod = 0;
1311 test_and_set_bit(BC_FLG_FTI_RUN, &bcs->Flag);
1312 break;
1313 }
1314 udelay(1000);
1315 sendmsg(cs, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
1316 udelay(1000);
1317 }
1318
1319 static void
1320 setup_sart(struct BCState *bcs) {
1321 struct IsdnCardState *cs = bcs->cs;
1322 u_char dps = SET_DPS(bcs->hw.isar.dpath);
1323 u_char ctrl, param[2];
1324
1325 switch (bcs->mode) {
1326 case L1_MODE_NULL:
1327 sendmsg(cs, dps | ISAR_HIS_SARTCFG, SMODE_DISABLE, 0,
1328 NULL);
1329 break;
1330 case L1_MODE_TRANS:
1331 sendmsg(cs, dps | ISAR_HIS_SARTCFG, SMODE_BINARY, 2,
1332 "\0\0");
1333 break;
1334 case L1_MODE_HDLC:
1335 case L1_MODE_FAX:
1336 param[0] = 0;
1337 sendmsg(cs, dps | ISAR_HIS_SARTCFG, SMODE_HDLC, 1,
1338 param);
1339 break;
1340 case L1_MODE_V32:
1341 ctrl = SMODE_V14 | SCTRL_HDMC_BOTH;
1342 param[0] = S_P1_CHS_8;
1343 param[1] = S_P2_BFT_DEF;
1344 sendmsg(cs, dps | ISAR_HIS_SARTCFG, ctrl, 2,
1345 param);
1346 break;
1347 }
1348 udelay(1000);
1349 sendmsg(cs, dps | ISAR_HIS_BSTREQ, 0, 0, NULL);
1350 udelay(1000);
1351 }
1352
1353 static void
1354 setup_iom2(struct BCState *bcs) {
1355 struct IsdnCardState *cs = bcs->cs;
1356 u_char dps = SET_DPS(bcs->hw.isar.dpath);
1357 u_char cmsb = IOM_CTRL_ENA, msg[5] = {IOM_P1_TXD,0,0,0,0};
1358
1359 if (bcs->channel)
1360 msg[1] = msg[3] = 1;
1361 switch (bcs->mode) {
1362 case L1_MODE_NULL:
1363 cmsb = 0;
1364 /* dummy slot */
1365 msg[1] = msg[3] = bcs->hw.isar.dpath + 2;
1366 break;
1367 case L1_MODE_TRANS:
1368 case L1_MODE_HDLC:
1369 break;
1370 case L1_MODE_V32:
1371 case L1_MODE_FAX:
1372 cmsb |= IOM_CTRL_ALAW | IOM_CTRL_RCV;
1373 break;
1374 }
1375 sendmsg(cs, dps | ISAR_HIS_IOM2CFG, cmsb, 5, msg);
1376 udelay(1000);
1377 sendmsg(cs, dps | ISAR_HIS_IOM2REQ, 0, 0, NULL);
1378 udelay(1000);
1379 }
1380
1381 int
1382 modeisar(struct BCState *bcs, int mode, int bc)
1383 {
1384 struct IsdnCardState *cs = bcs->cs;
1385
1386 /* Here we are selecting the best datapath for requested mode */
1387 if(bcs->mode == L1_MODE_NULL) { /* New Setup */
1388 bcs->channel = bc;
1389 switch (mode) {
1390 case L1_MODE_NULL: /* init */
1391 if (!bcs->hw.isar.dpath)
1392 /* no init for dpath 0 */
1393 return(0);
1394 break;
1395 case L1_MODE_TRANS:
1396 case L1_MODE_HDLC:
1397 /* best is datapath 2 */
1398 if (!test_and_set_bit(ISAR_DP2_USE,
1399 &bcs->hw.isar.reg->Flags))
1400 bcs->hw.isar.dpath = 2;
1401 else if (!test_and_set_bit(ISAR_DP1_USE,
1402 &bcs->hw.isar.reg->Flags))
1403 bcs->hw.isar.dpath = 1;
1404 else {
1405 printk(KERN_WARNING"isar modeisar both pathes in use\n");
1406 return(1);
1407 }
1408 break;
1409 case L1_MODE_V32:
1410 case L1_MODE_FAX:
1411 /* only datapath 1 */
1412 if (!test_and_set_bit(ISAR_DP1_USE,
1413 &bcs->hw.isar.reg->Flags))
1414 bcs->hw.isar.dpath = 1;
1415 else {
1416 printk(KERN_WARNING"isar modeisar analog funktions only with DP1\n");
1417 debugl1(cs, "isar modeisar analog funktions only with DP1");
1418 return(1);
1419 }
1420 break;
1421 }
1422 }
1423 if (cs->debug & L1_DEB_HSCX)
1424 debugl1(cs, "isar dp%d mode %d->%d ichan %d",
1425 bcs->hw.isar.dpath, bcs->mode, mode, bc);
1426 bcs->mode = mode;
1427 setup_pump(bcs);
1428 setup_iom2(bcs);
1429 setup_sart(bcs);
1430 if (bcs->mode == L1_MODE_NULL) {
1431 /* Clear resources */
1432 if (bcs->hw.isar.dpath == 1)
1433 test_and_clear_bit(ISAR_DP1_USE, &bcs->hw.isar.reg->Flags);
1434 else if (bcs->hw.isar.dpath == 2)
1435 test_and_clear_bit(ISAR_DP2_USE, &bcs->hw.isar.reg->Flags);
1436 bcs->hw.isar.dpath = 0;
1437 }
1438 return(0);
1439 }
1440
1441 static void
1442 isar_pump_cmd(struct BCState *bcs, u_char cmd, u_char para)
1443 {
1444 struct IsdnCardState *cs = bcs->cs;
1445 u_char dps = SET_DPS(bcs->hw.isar.dpath);
1446 u_char ctrl = 0, nom = 0, p1 = 0;
1447
1448 switch(cmd) {
1449 case ISDN_FAX_CLASS1_FTM:
1450 if (bcs->hw.isar.state == STFAX_READY) {
1451 p1 = para;
1452 ctrl = PCTRL_CMD_FTM;
1453 nom = 1;
1454 bcs->hw.isar.state = STFAX_LINE;
1455 bcs->hw.isar.cmd = ctrl;
1456 bcs->hw.isar.mod = para;
1457 bcs->hw.isar.newmod = 0;
1458 bcs->hw.isar.newcmd = 0;
1459 bcs->hw.isar.try_mod = 3;
1460 } else if ((bcs->hw.isar.state == STFAX_ACTIV) &&
1461 (bcs->hw.isar.cmd == PCTRL_CMD_FTM) &&
1462 (bcs->hw.isar.mod == para)) {
1463 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_CONNECT);
1464 } else {
1465 bcs->hw.isar.newmod = para;
1466 bcs->hw.isar.newcmd = PCTRL_CMD_FTM;
1467 nom = 0;
1468 ctrl = PCTRL_CMD_ESC;
1469 bcs->hw.isar.state = STFAX_ESCAPE;
1470 }
1471 break;
1472 case ISDN_FAX_CLASS1_FTH:
1473 if (bcs->hw.isar.state == STFAX_READY) {
1474 p1 = para;
1475 ctrl = PCTRL_CMD_FTH;
1476 nom = 1;
1477 bcs->hw.isar.state = STFAX_LINE;
1478 bcs->hw.isar.cmd = ctrl;
1479 bcs->hw.isar.mod = para;
1480 bcs->hw.isar.newmod = 0;
1481 bcs->hw.isar.newcmd = 0;
1482 bcs->hw.isar.try_mod = 3;
1483 } else if ((bcs->hw.isar.state == STFAX_ACTIV) &&
1484 (bcs->hw.isar.cmd == PCTRL_CMD_FTH) &&
1485 (bcs->hw.isar.mod == para)) {
1486 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_CONNECT);
1487 } else {
1488 bcs->hw.isar.newmod = para;
1489 bcs->hw.isar.newcmd = PCTRL_CMD_FTH;
1490 nom = 0;
1491 ctrl = PCTRL_CMD_ESC;
1492 bcs->hw.isar.state = STFAX_ESCAPE;
1493 }
1494 break;
1495 case ISDN_FAX_CLASS1_FRM:
1496 if (bcs->hw.isar.state == STFAX_READY) {
1497 p1 = para;
1498 ctrl = PCTRL_CMD_FRM;
1499 nom = 1;
1500 bcs->hw.isar.state = STFAX_LINE;
1501 bcs->hw.isar.cmd = ctrl;
1502 bcs->hw.isar.mod = para;
1503 bcs->hw.isar.newmod = 0;
1504 bcs->hw.isar.newcmd = 0;
1505 bcs->hw.isar.try_mod = 3;
1506 } else if ((bcs->hw.isar.state == STFAX_ACTIV) &&
1507 (bcs->hw.isar.cmd == PCTRL_CMD_FRM) &&
1508 (bcs->hw.isar.mod == para)) {
1509 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_CONNECT);
1510 } else {
1511 bcs->hw.isar.newmod = para;
1512 bcs->hw.isar.newcmd = PCTRL_CMD_FRM;
1513 nom = 0;
1514 ctrl = PCTRL_CMD_ESC;
1515 bcs->hw.isar.state = STFAX_ESCAPE;
1516 }
1517 break;
1518 case ISDN_FAX_CLASS1_FRH:
1519 if (bcs->hw.isar.state == STFAX_READY) {
1520 p1 = para;
1521 ctrl = PCTRL_CMD_FRH;
1522 nom = 1;
1523 bcs->hw.isar.state = STFAX_LINE;
1524 bcs->hw.isar.cmd = ctrl;
1525 bcs->hw.isar.mod = para;
1526 bcs->hw.isar.newmod = 0;
1527 bcs->hw.isar.newcmd = 0;
1528 bcs->hw.isar.try_mod = 3;
1529 } else if ((bcs->hw.isar.state == STFAX_ACTIV) &&
1530 (bcs->hw.isar.cmd == PCTRL_CMD_FRH) &&
1531 (bcs->hw.isar.mod == para)) {
1532 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_CONNECT);
1533 } else {
1534 bcs->hw.isar.newmod = para;
1535 bcs->hw.isar.newcmd = PCTRL_CMD_FRH;
1536 nom = 0;
1537 ctrl = PCTRL_CMD_ESC;
1538 bcs->hw.isar.state = STFAX_ESCAPE;
1539 }
1540 break;
1541 }
1542 if (ctrl)
1543 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, ctrl, nom, &p1);
1544 }
1545
1546 void
1547 isar_setup(struct IsdnCardState *cs)
1548 {
1549 u_char msg;
1550 int i;
1551
1552 /* Dpath 1, 2 */
1553 msg = 61;
1554 for (i=0; i<2; i++) {
1555 /* Buffer Config */
1556 sendmsg(cs, (i ? ISAR_HIS_DPS2 : ISAR_HIS_DPS1) |
1557 ISAR_HIS_P12CFG, 4, 1, &msg);
1558 cs->bcs[i].hw.isar.mml = msg;
1559 cs->bcs[i].mode = 0;
1560 cs->bcs[i].hw.isar.dpath = i + 1;
1561 modeisar(&cs->bcs[i], 0, 0);
1562 cs->bcs[i].tqueue.routine = (void *) (void *) isar_bh;
1563 }
1564 }
1565
1566 void
1567 isar_l2l1(struct PStack *st, int pr, void *arg)
1568 {
1569 struct sk_buff *skb = arg;
1570 long flags;
1571
1572 switch (pr) {
1573 case (PH_DATA | REQUEST):
1574 save_flags(flags);
1575 cli();
1576 if (st->l1.bcs->tx_skb) {
1577 skb_queue_tail(&st->l1.bcs->squeue, skb);
1578 restore_flags(flags);
1579 } else {
1580 st->l1.bcs->tx_skb = skb;
1581 test_and_set_bit(BC_FLG_BUSY, &st->l1.bcs->Flag);
1582 if (st->l1.bcs->cs->debug & L1_DEB_HSCX)
1583 debugl1(st->l1.bcs->cs, "DRQ set BC_FLG_BUSY");
1584 st->l1.bcs->hw.isar.txcnt = 0;
1585 restore_flags(flags);
1586 st->l1.bcs->cs->BC_Send_Data(st->l1.bcs);
1587 }
1588 break;
1589 case (PH_PULL | INDICATION):
1590 if (st->l1.bcs->tx_skb) {
1591 printk(KERN_WARNING "isar_l2l1: this shouldn't happen\n");
1592 break;
1593 }
1594 test_and_set_bit(BC_FLG_BUSY, &st->l1.bcs->Flag);
1595 if (st->l1.bcs->cs->debug & L1_DEB_HSCX)
1596 debugl1(st->l1.bcs->cs, "PUI set BC_FLG_BUSY");
1597 st->l1.bcs->tx_skb = skb;
1598 st->l1.bcs->hw.isar.txcnt = 0;
1599 st->l1.bcs->cs->BC_Send_Data(st->l1.bcs);
1600 break;
1601 case (PH_PULL | REQUEST):
1602 if (!st->l1.bcs->tx_skb) {
1603 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
1604 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
1605 } else
1606 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
1607 break;
1608 case (PH_ACTIVATE | REQUEST):
1609 test_and_set_bit(BC_FLG_ACTIV, &st->l1.bcs->Flag);
1610 st->l1.bcs->hw.isar.conmsg[0] = 0;
1611 if (test_bit(FLG_ORIG, &st->l2.flag))
1612 test_and_set_bit(BC_FLG_ORIG, &st->l1.bcs->Flag);
1613 else
1614 test_and_clear_bit(BC_FLG_ORIG, &st->l1.bcs->Flag);
1615 switch(st->l1.mode) {
1616 case L1_MODE_TRANS:
1617 case L1_MODE_HDLC:
1618 if (modeisar(st->l1.bcs, st->l1.mode, st->l1.bc))
1619 l1_msg_b(st, PH_DEACTIVATE | REQUEST, arg);
1620 else
1621 l1_msg_b(st, PH_ACTIVATE | REQUEST, arg);
1622 break;
1623 case L1_MODE_V32:
1624 case L1_MODE_FAX:
1625 if (modeisar(st->l1.bcs, st->l1.mode, st->l1.bc))
1626 l1_msg_b(st, PH_DEACTIVATE | REQUEST, arg);
1627 break;
1628 }
1629 break;
1630 case (PH_DEACTIVATE | REQUEST):
1631 l1_msg_b(st, pr, arg);
1632 break;
1633 case (PH_DEACTIVATE | CONFIRM):
1634 test_and_clear_bit(BC_FLG_ACTIV, &st->l1.bcs->Flag);
1635 test_and_clear_bit(BC_FLG_BUSY, &st->l1.bcs->Flag);
1636 if (st->l1.bcs->cs->debug & L1_DEB_HSCX)
1637 debugl1(st->l1.bcs->cs, "PDAC clear BC_FLG_BUSY");
1638 modeisar(st->l1.bcs, 0, st->l1.bc);
1639 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
1640 break;
1641 }
1642 }
1643
1644 void
1645 close_isarstate(struct BCState *bcs)
1646 {
1647 modeisar(bcs, 0, bcs->channel);
1648 if (test_and_clear_bit(BC_FLG_INIT, &bcs->Flag)) {
1649 if (bcs->hw.isar.rcvbuf) {
1650 kfree(bcs->hw.isar.rcvbuf);
1651 bcs->hw.isar.rcvbuf = NULL;
1652 }
1653 skb_queue_purge(&bcs->rqueue);
1654 skb_queue_purge(&bcs->squeue);
1655 if (bcs->tx_skb) {
1656 dev_kfree_skb_any(bcs->tx_skb);
1657 bcs->tx_skb = NULL;
1658 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
1659 if (bcs->cs->debug & L1_DEB_HSCX)
1660 debugl1(bcs->cs, "closeisar clear BC_FLG_BUSY");
1661 }
1662 }
1663 del_timer(&bcs->hw.isar.ftimer);
1664 }
1665
1666 int
1667 open_isarstate(struct IsdnCardState *cs, struct BCState *bcs)
1668 {
1669 if (!test_and_set_bit(BC_FLG_INIT, &bcs->Flag)) {
1670 if (!(bcs->hw.isar.rcvbuf = kmalloc(HSCX_BUFMAX, GFP_ATOMIC))) {
1671 printk(KERN_WARNING
1672 "HiSax: No memory for isar.rcvbuf\n");
1673 return (1);
1674 }
1675 skb_queue_head_init(&bcs->rqueue);
1676 skb_queue_head_init(&bcs->squeue);
1677 }
1678 bcs->tx_skb = NULL;
1679 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
1680 if (cs->debug & L1_DEB_HSCX)
1681 debugl1(cs, "openisar clear BC_FLG_BUSY");
1682 bcs->event = 0;
1683 bcs->hw.isar.rcvidx = 0;
1684 bcs->tx_cnt = 0;
1685 bcs->hw.isar.ftimer.function = (void *) ftimer_handler;
1686 bcs->hw.isar.ftimer.data = (long) bcs;
1687 init_timer(&bcs->hw.isar.ftimer);
1688 return (0);
1689 }
1690
1691 int
1692 setstack_isar(struct PStack *st, struct BCState *bcs)
1693 {
1694 bcs->channel = st->l1.bc;
1695 if (open_isarstate(st->l1.hardware, bcs))
1696 return (-1);
1697 st->l1.bcs = bcs;
1698 st->l2.l2l1 = isar_l2l1;
1699 setstack_manager(st);
1700 bcs->st = st;
1701 setstack_l1_B(st);
1702 return (0);
1703 }
1704
1705 int
1706 isar_auxcmd(struct IsdnCardState *cs, isdn_ctrl *ic) {
1707 u_long adr;
1708 int features, i;
1709 struct BCState *bcs;
1710
1711 if (cs->debug & L1_DEB_HSCX)
1712 debugl1(cs, "isar_auxcmd cmd/ch %x/%d", ic->command, ic->arg);
1713 switch (ic->command) {
1714 case (ISDN_CMD_FAXCMD):
1715 bcs = cs->channel[ic->arg].bcs;
1716 if (cs->debug & L1_DEB_HSCX)
1717 debugl1(cs, "isar_auxcmd cmd/subcmd %d/%d",
1718 ic->parm.aux.cmd, ic->parm.aux.subcmd);
1719 switch(ic->parm.aux.cmd) {
1720 case ISDN_FAX_CLASS1_CTRL:
1721 if (ic->parm.aux.subcmd == ETX)
1722 test_and_set_bit(BC_FLG_DLEETX,
1723 &bcs->Flag);
1724 break;
1725 case ISDN_FAX_CLASS1_FRM:
1726 case ISDN_FAX_CLASS1_FRH:
1727 case ISDN_FAX_CLASS1_FTM:
1728 case ISDN_FAX_CLASS1_FTH:
1729 if (ic->parm.aux.subcmd == AT_QUERY) {
1730 sprintf(ic->parm.aux.para,
1731 "%d", bcs->hw.isar.mod);
1732 ic->command = ISDN_STAT_FAXIND;
1733 ic->parm.aux.cmd = ISDN_FAX_CLASS1_QUERY;
1734 cs->iif.statcallb(ic);
1735 return(0);
1736 } else if (ic->parm.aux.subcmd == AT_EQ_QUERY) {
1737 strcpy(ic->parm.aux.para, faxmodulation_s);
1738 ic->command = ISDN_STAT_FAXIND;
1739 ic->parm.aux.cmd = ISDN_FAX_CLASS1_QUERY;
1740 cs->iif.statcallb(ic);
1741 return(0);
1742 } else if (ic->parm.aux.subcmd == AT_EQ_VALUE) {
1743 for(i=0;i<FAXMODCNT;i++)
1744 if (faxmodulation[i]==ic->parm.aux.para[0])
1745 break;
1746 if ((FAXMODCNT > i) &&
1747 test_bit(BC_FLG_INIT, &bcs->Flag)) {
1748 isar_pump_cmd(bcs,
1749 ic->parm.aux.cmd,
1750 ic->parm.aux.para[0]);
1751 return(0);
1752 }
1753 }
1754 /* wrong modulation or not activ */
1755 /* fall through */
1756 default:
1757 ic->command = ISDN_STAT_FAXIND;
1758 ic->parm.aux.cmd = ISDN_FAX_CLASS1_ERROR;
1759 cs->iif.statcallb(ic);
1760 }
1761 break;
1762 case (ISDN_CMD_IOCTL):
1763 switch (ic->arg) {
1764 case (9): /* load firmware */
1765 features = ISDN_FEATURE_L2_MODEM |
1766 ISDN_FEATURE_L2_FAX |
1767 ISDN_FEATURE_L3_FCLASS1;
1768 memcpy(&adr, ic->parm.num, sizeof(ulong));
1769 if (isar_load_firmware(cs, (u_char *)adr))
1770 return(1);
1771 else
1772 ll_run(cs, features);
1773 break;
1774 default:
1775 printk(KERN_DEBUG "HiSax: invalid ioctl %d\n",
1776 (int) ic->arg);
1777 return(-EINVAL);
1778 }
1779 break;
1780 default:
1781 return(-EINVAL);
1782 }
1783 return(0);
1784 }
1785
1786 void __devinit
1787 initisar(struct IsdnCardState *cs)
1788 {
1789 cs->bcs[0].BC_SetStack = setstack_isar;
1790 cs->bcs[1].BC_SetStack = setstack_isar;
1791 cs->bcs[0].BC_Close = close_isarstate;
1792 cs->bcs[1].BC_Close = close_isarstate;
1793 }
1794