File: /usr/src/linux/arch/arm/mach-integrator/irq.c

1     /*
2      *  linux/arch/arm/mach-integrator/irq.c
3      *
4      *  Copyright (C) 1999 ARM Limited
5      *
6      * This program is free software; you can redistribute it and/or modify
7      * it under the terms of the GNU General Public License as published by
8      * the Free Software Foundation; either version 2 of the License, or
9      * (at your option) any later version.
10      *
11      * This program is distributed in the hope that it will be useful,
12      * but WITHOUT ANY WARRANTY; without even the implied warranty of
13      * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14      * GNU General Public License for more details.
15      *
16      * You should have received a copy of the GNU General Public License
17      * along with this program; if not, write to the Free Software
18      * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
19      */
20     #include <linux/init.h>
21     
22     #include <asm/hardware.h>
23     #include <asm/irq.h>
24     #include <asm/io.h>
25     
26     #include <asm/mach/irq.h>
27     
28     /* 
29      * All IO addresses are mapped onto VA 0xFFFx.xxxx, where x.xxxx
30      * is the (PA >> 12).
31      *
32      * Setup a VA for the Integrator interrupt controller (for header #0,
33      * just for now).
34      */
35     #define VA_IC_BASE              IO_ADDRESS(INTEGRATOR_IC_BASE) 
36     #define VA_CMIC_BASE            IO_ADDRESS(INTEGRATOR_HDR_BASE) + INTEGRATOR_HDR_IC_OFFSET
37     
38     #define ALLPCI ( (1 << IRQ_PCIINT0) | (1 << IRQ_PCIINT1) | (1 << IRQ_PCIINT2) | (1 << IRQ_PCIINT3) ) 
39     
40     static void sc_mask_irq(unsigned int irq)
41     {
42             __raw_writel(1 << irq, VA_IC_BASE + IRQ_ENABLE_CLEAR);
43     }
44     
45     static void sc_unmask_irq(unsigned int irq)
46     {
47             __raw_writel(1 << irq, VA_IC_BASE + IRQ_ENABLE_SET);
48     }
49      
50     void __init integrator_init_irq(void)
51     {
52     	unsigned int i;
53     
54     	for (i = 0; i < NR_IRQS; i++) {
55     	        if (((1 << i) && INTEGRATOR_SC_VALID_INT) != 0) {
56     		        irq_desc[i].valid	= 1;
57     			irq_desc[i].probe_ok	= 1;
58     			irq_desc[i].mask_ack	= sc_mask_irq;
59     			irq_desc[i].mask	= sc_mask_irq;
60     			irq_desc[i].unmask	= sc_unmask_irq;
61     		}
62     	}
63     
64     	/* Disable all interrupts initially. */
65     	/* Do the core module ones */
66     	__raw_writel(-1, VA_CMIC_BASE + IRQ_ENABLE_CLEAR);
67     
68     	/* do the header card stuff next */
69     	__raw_writel(-1, VA_IC_BASE + IRQ_ENABLE_CLEAR);
70     	__raw_writel(-1, VA_IC_BASE + FIQ_ENABLE_CLEAR);
71     }
72