File: /usr/src/linux/drivers/isdn/hisax/w6692.h
1 /* $Id: w6692.h,v 1.2.6.1 2001/02/16 16:43:29 kai Exp $
2 *
3 * w6692.h Winbond W6692 specific defines
4 *
5 * Author Petr Novak <petr.novak@i.cz>
6 *
7 * This file is (c) under GNU General Public License
8 *
9 */
10
11 /* map W6692 functions to ISAC functions */
12 #define readW6692 readisac
13 #define writeW6692 writeisac
14 #define readW6692fifo readisacfifo
15 #define writeW6692fifo writeisacfifo
16
17 /* B-channel FIFO read/write routines */
18
19 #define READW6692BFIFO(cs,bchan,ptr,count) \
20 insb(cs->hw.w6692.iobase+W_B_RFIFO+(bchan?0x40:0),ptr,count)
21
22 #define WRITEW6692BFIFO(cs,bchan,ptr,count) \
23 outsb(cs->hw.w6692.iobase+W_B_XFIFO+(bchan?0x40:0),ptr,count)
24
25 /* Specifications of W6692 registers */
26
27 #define W_D_RFIFO 0x00 /* R */
28 #define W_D_XFIFO 0x04 /* W */
29 #define W_D_CMDR 0x08 /* W */
30 #define W_D_MODE 0x0c /* R/W */
31 #define W_D_TIMR 0x10 /* R/W */
32 #define W_ISTA 0x14 /* R_clr */
33 #define W_IMASK 0x18 /* R/W */
34 #define W_D_EXIR 0x1c /* R_clr */
35 #define W_D_EXIM 0x20 /* R/W */
36 #define W_D_STAR 0x24 /* R */
37 #define W_D_RSTA 0x28 /* R */
38 #define W_D_SAM 0x2c /* R/W */
39 #define W_D_SAP1 0x30 /* R/W */
40 #define W_D_SAP2 0x34 /* R/W */
41 #define W_D_TAM 0x38 /* R/W */
42 #define W_D_TEI1 0x3c /* R/W */
43 #define W_D_TEI2 0x40 /* R/W */
44 #define W_D_RBCH 0x44 /* R */
45 #define W_D_RBCL 0x48 /* R */
46 #define W_TIMR2 0x4c /* W */
47 #define W_L1_RC 0x50 /* R/W */
48 #define W_D_CTL 0x54 /* R/W */
49 #define W_CIR 0x58 /* R */
50 #define W_CIX 0x5c /* W */
51 #define W_SQR 0x60 /* R */
52 #define W_SQX 0x64 /* W */
53 #define W_PCTL 0x68 /* R/W */
54 #define W_MOR 0x6c /* R */
55 #define W_MOX 0x70 /* R/W */
56 #define W_MOSR 0x74 /* R_clr */
57 #define W_MOCR 0x78 /* R/W */
58 #define W_GCR 0x7c /* R/W */
59
60 #define W_B_RFIFO 0x80 /* R */
61 #define W_B_XFIFO 0x84 /* W */
62 #define W_B_CMDR 0x88 /* W */
63 #define W_B_MODE 0x8c /* R/W */
64 #define W_B_EXIR 0x90 /* R_clr */
65 #define W_B_EXIM 0x94 /* R/W */
66 #define W_B_STAR 0x98 /* R */
67 #define W_B_ADM1 0x9c /* R/W */
68 #define W_B_ADM2 0xa0 /* R/W */
69 #define W_B_ADR1 0xa4 /* R/W */
70 #define W_B_ADR2 0xa8 /* R/W */
71 #define W_B_RBCL 0xac /* R */
72 #define W_B_RBCH 0xb0 /* R */
73
74 #define W_XADDR 0xf4 /* R/W */
75 #define W_XDATA 0xf8 /* R/W */
76 #define W_EPCTL 0xfc /* W */
77
78 /* W6692 register bits */
79
80 #define W_D_CMDR_XRST 0x01
81 #define W_D_CMDR_XME 0x02
82 #define W_D_CMDR_XMS 0x08
83 #define W_D_CMDR_STT 0x10
84 #define W_D_CMDR_RRST 0x40
85 #define W_D_CMDR_RACK 0x80
86
87 #define W_D_MODE_RLP 0x01
88 #define W_D_MODE_DLP 0x02
89 #define W_D_MODE_MFD 0x04
90 #define W_D_MODE_TEE 0x08
91 #define W_D_MODE_TMS 0x10
92 #define W_D_MODE_RACT 0x40
93 #define W_D_MODE_MMS 0x80
94
95 #define W_INT_B2_EXI 0x01
96 #define W_INT_B1_EXI 0x02
97 #define W_INT_D_EXI 0x04
98 #define W_INT_XINT0 0x08
99 #define W_INT_XINT1 0x10
100 #define W_INT_D_XFR 0x20
101 #define W_INT_D_RME 0x40
102 #define W_INT_D_RMR 0x80
103
104 #define W_D_EXI_WEXP 0x01
105 #define W_D_EXI_TEXP 0x02
106 #define W_D_EXI_ISC 0x04
107 #define W_D_EXI_MOC 0x08
108 #define W_D_EXI_TIN2 0x10
109 #define W_D_EXI_XCOL 0x20
110 #define W_D_EXI_XDUN 0x40
111 #define W_D_EXI_RDOV 0x80
112
113 #define W_D_STAR_DRDY 0x10
114 #define W_D_STAR_XBZ 0x20
115 #define W_D_STAR_XDOW 0x80
116
117 #define W_D_RSTA_RMB 0x10
118 #define W_D_RSTA_CRCE 0x20
119 #define W_D_RSTA_RDOV 0x40
120
121 #define W_D_CTL_SRST 0x20
122
123 #define W_CIR_SCC 0x80
124 #define W_CIR_ICC 0x40
125 #define W_CIR_COD_MASK 0x0f
126
127 #define W_B_CMDR_XRST 0x01
128 #define W_B_CMDR_XME 0x02
129 #define W_B_CMDR_XMS 0x04
130 #define W_B_CMDR_RACT 0x20
131 #define W_B_CMDR_RRST 0x40
132 #define W_B_CMDR_RACK 0x80
133
134 #define W_B_MODE_FTS0 0x01
135 #define W_B_MODE_FTS1 0x02
136 #define W_B_MODE_SW56 0x04
137 #define W_B_MODE_BSW0 0x08
138 #define W_B_MODE_BSW1 0x10
139 #define W_B_MODE_EPCM 0x20
140 #define W_B_MODE_ITF 0x40
141 #define W_B_MODE_MMS 0x80
142
143 #define W_B_EXI_XDUN 0x01
144 #define W_B_EXI_XFR 0x02
145 #define W_B_EXI_RDOV 0x10
146 #define W_B_EXI_RME 0x20
147 #define W_B_EXI_RMR 0x40
148
149 #define W_B_STAR_XBZ 0x01
150 #define W_B_STAR_XDOW 0x04
151 #define W_B_STAR_RMB 0x10
152 #define W_B_STAR_CRCE 0x20
153 #define W_B_STAR_RDOV 0x40
154
155 #define W_B_RBCH_LOV 0x20
156
157 /* W6692 Layer1 commands */
158
159 #define W_L1CMD_ECK 0x00
160 #define W_L1CMD_RST 0x01
161 #define W_L1CMD_SCP 0x04
162 #define W_L1CMD_SSP 0x02
163 #define W_L1CMD_AR8 0x08
164 #define W_L1CMD_AR10 0x09
165 #define W_L1CMD_EAL 0x0a
166 #define W_L1CMD_DRC 0x0f
167
168 /* W6692 Layer1 indications */
169
170 #define W_L1IND_CE 0x07
171 #define W_L1IND_DRD 0x00
172 #define W_L1IND_LD 0x04
173 #define W_L1IND_ARD 0x08
174 #define W_L1IND_TI 0x0a
175 #define W_L1IND_ATI 0x0b
176 #define W_L1IND_AI8 0x0c
177 #define W_L1IND_AI10 0x0d
178 #define W_L1IND_CD 0x0f
179
180 /* FIFO thresholds */
181 #define W_D_FIFO_THRESH 64
182 #define W_B_FIFO_THRESH 64
183