File: /usr/src/linux/drivers/media/video/stradis.c
1 /*
2 * stradis.c - stradis 4:2:2 mpeg decoder driver
3 *
4 * Stradis 4:2:2 MPEG-2 Decoder Driver
5 * Copyright (C) 1999 Nathan Laredo <laredo@gnu.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22 #include <linux/module.h>
23 #include <linux/version.h>
24 #include <linux/delay.h>
25 #include <linux/errno.h>
26 #include <linux/fs.h>
27 #include <linux/kernel.h>
28 #include <linux/major.h>
29 #include <linux/slab.h>
30 #include <linux/mm.h>
31 #include <linux/init.h>
32 #include <linux/poll.h>
33 #include <linux/pci.h>
34 #include <linux/signal.h>
35 #include <asm/io.h>
36 #include <linux/ioport.h>
37 #include <asm/pgtable.h>
38 #include <asm/page.h>
39 #include <linux/sched.h>
40 #include <asm/segment.h>
41 #include <asm/types.h>
42 #include <linux/types.h>
43 #include <linux/wrapper.h>
44 #include <linux/interrupt.h>
45 #include <asm/uaccess.h>
46 #include <linux/vmalloc.h>
47 #include <linux/videodev.h>
48 #include <linux/i2c-old.h>
49
50 #include "saa7146.h"
51 #include "saa7146reg.h"
52 #include "ibmmpeg2.h"
53 #include "saa7121.h"
54 #include "cs8420.h"
55
56 #define DEBUG(x) /* debug driver */
57 #undef IDEBUG /* debug irq handler */
58 #undef MDEBUG /* debug memory management */
59
60 #define SAA7146_MAX 6
61
62 static struct saa7146 saa7146s[SAA7146_MAX];
63
64 static int saa_num = 0; /* number of SAA7146s in use */
65
66 static int video_nr = -1;
67 MODULE_PARM(video_nr,"i");
68
69 #define nDebNormal 0x00480000
70 #define nDebNoInc 0x00480000
71 #define nDebVideo 0xd0480000
72 #define nDebAudio 0xd0400000
73 #define nDebDMA 0x02c80000
74
75 #define oDebNormal 0x13c80000
76 #define oDebNoInc 0x13c80000
77 #define oDebVideo 0xd1080000
78 #define oDebAudio 0xd1080000
79 #define oDebDMA 0x03080000
80
81 #define NewCard (saa->boardcfg[3])
82 #define ChipControl (saa->boardcfg[1])
83 #define NTSCFirstActive (saa->boardcfg[4])
84 #define PALFirstActive (saa->boardcfg[5])
85 #define NTSCLastActive (saa->boardcfg[54])
86 #define PALLastActive (saa->boardcfg[55])
87 #define Have2MB (saa->boardcfg[18] & 0x40)
88 #define HaveCS8420 (saa->boardcfg[18] & 0x04)
89 #define IBMMPEGCD20 (saa->boardcfg[18] & 0x20)
90 #define HaveCS3310 (saa->boardcfg[18] & 0x01)
91 #define CS3310MaxLvl ((saa->boardcfg[30] << 8) | saa->boardcfg[31])
92 #define HaveCS4341 (saa->boardcfg[40] == 2)
93 #define SDIType (saa->boardcfg[27])
94 #define CurrentMode (saa->boardcfg[2])
95
96 #define debNormal (NewCard ? nDebNormal : oDebNormal)
97 #define debNoInc (NewCard ? nDebNoInc : oDebNoInc)
98 #define debVideo (NewCard ? nDebVideo : oDebVideo)
99 #define debAudio (NewCard ? nDebAudio : oDebAudio)
100 #define debDMA (NewCard ? nDebDMA : oDebDMA)
101
102 #ifdef DEBUG
103 int stradis_driver(void) /* for the benefit of ksymoops */
104 {
105 return 1;
106 }
107 #endif
108
109 #ifdef USE_RESCUE_EEPROM_SDM275
110 static unsigned char rescue_eeprom[64] = {
111 0x00,0x01,0x04,0x13,0x26,0x0f,0x10,0x00,0x00,0x00,0x43,0x63,0x22,0x01,0x29,0x15,0x73,0x00,0x1f, 'd', 'e', 'c', 'x', 'l', 'd', 'v', 'a',0x02,0x00,0x01,0x00,0xcc,0xa4,0x63,0x09,0xe2,0x10,0x00,0x0a,0x00,0x02,0x02, 'd', 'e', 'c', 'x', 'l', 'a',0x00,0x00,0x42,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
112 };
113 #endif
114
115 /* ----------------------------------------------------------------------- */
116 /* Hardware I2C functions */
117 static void I2CWipe(struct saa7146 *saa)
118 {
119 int i;
120 /* set i2c to ~=100kHz, abort transfer, clear busy */
121 saawrite(0x600 | SAA7146_I2C_ABORT, SAA7146_I2C_STATUS);
122 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
123 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
124 /* wait for i2c registers to be programmed */
125 for (i = 0; i < 1000 &&
126 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
127 schedule();
128 saawrite(0x600, SAA7146_I2C_STATUS);
129 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
130 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
131 /* wait for i2c registers to be programmed */
132 for (i = 0; i < 1000 &&
133 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
134 schedule();
135 saawrite(0x600, SAA7146_I2C_STATUS);
136 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
137 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
138 /* wait for i2c registers to be programmed */
139 for (i = 0; i < 1000 &&
140 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
141 schedule();
142 }
143 /* read I2C */
144 static int I2CRead(struct i2c_bus *bus, unsigned char addr,
145 unsigned char subaddr, int dosub)
146 {
147 struct saa7146 *saa = (struct saa7146 *) bus->data;
148 int i;
149
150
151 if (saaread(SAA7146_I2C_STATUS) & 0x3c)
152 I2CWipe(saa);
153 for (i = 0; i < 1000 &&
154 (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++)
155 schedule();
156 if (i == 1000)
157 I2CWipe(saa);
158 if (dosub)
159 saawrite(((addr & 0xfe) << 24) | (((addr | 1) & 0xff) << 8) |
160 ((subaddr & 0xff) << 16) | 0xed, SAA7146_I2C_TRANSFER);
161 else
162 saawrite(((addr & 0xfe) << 24) | (((addr | 1) & 0xff) << 16) |
163 0xf1, SAA7146_I2C_TRANSFER);
164 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
165 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
166 /* wait for i2c registers to be programmed */
167 for (i = 0; i < 1000 &&
168 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
169 schedule();
170 /* wait for valid data */
171 for (i = 0; i < 1000 &&
172 (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++)
173 schedule();
174 if (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_ERR)
175 return -1;
176 if (i == 1000)
177 printk("i2c setup read timeout\n");
178 saawrite(0x41, SAA7146_I2C_TRANSFER);
179 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
180 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
181 /* wait for i2c registers to be programmed */
182 for (i = 0; i < 1000 &&
183 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
184 schedule();
185 /* wait for valid data */
186 for (i = 0; i < 1000 &&
187 (saaread(SAA7146_I2C_TRANSFER) & SAA7146_I2C_BUSY); i++)
188 schedule();
189 if (saaread(SAA7146_I2C_TRANSFER) & SAA7146_I2C_ERR)
190 return -1;
191 if (i == 1000)
192 printk("i2c read timeout\n");
193 return ((saaread(SAA7146_I2C_TRANSFER) >> 24) & 0xff);
194 }
195 static int I2CReadOld(struct i2c_bus *bus, unsigned char addr)
196 {
197 return I2CRead(bus, addr, 0, 0);
198 }
199
200 /* set both to write both bytes, reset it to write only b1 */
201
202 static int I2CWrite(struct i2c_bus *bus, unsigned char addr, unsigned char b1,
203 unsigned char b2, int both)
204 {
205 struct saa7146 *saa = (struct saa7146 *) bus->data;
206 int i;
207 u32 data;
208
209 if (saaread(SAA7146_I2C_STATUS) & 0x3c)
210 I2CWipe(saa);
211 for (i = 0; i < 1000 &&
212 (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++)
213 schedule();
214 if (i == 1000)
215 I2CWipe(saa);
216 data = ((addr & 0xfe) << 24) | ((b1 & 0xff) << 16);
217 if (both)
218 data |= ((b2 & 0xff) << 8) | 0xe5;
219 else
220 data |= 0xd1;
221 saawrite(data, SAA7146_I2C_TRANSFER);
222 saawrite((SAA7146_MC2_UPLD_I2C << 16) | SAA7146_MC2_UPLD_I2C,
223 SAA7146_MC2);
224 return 0;
225 }
226
227 static void attach_inform(struct i2c_bus *bus, int id)
228 {
229 struct saa7146 *saa = (struct saa7146 *) bus->data;
230 int i;
231
232 DEBUG(printk(KERN_DEBUG "stradis%d: i2c: device found=%02x\n", saa->nr, id));
233 if (id == 0xa0) { /* we have rev2 or later board, fill in info */
234 for (i = 0; i < 64; i++)
235 saa->boardcfg[i] = I2CRead(bus, 0xa0, i, 1);
236 #ifdef USE_RESCUE_EEPROM_SDM275
237 if (saa->boardcfg[0] != 0) {
238 printk("stradis%d: WARNING: EEPROM STORED VALUES HAVE BEEN IGNORED\n", saa->nr);
239 for (i = 0; i < 64; i++)
240 saa->boardcfg[i] = rescue_eeprom[i];
241 }
242 #endif
243 printk("stradis%d: config =", saa->nr);
244 for (i = 0; i < 51; i++) {
245 printk(" %02x",saa->boardcfg[i]);
246 }
247 printk("\n");
248 }
249 }
250
251 static void detach_inform(struct i2c_bus *bus, int id)
252 {
253 struct saa7146 *saa = (struct saa7146 *) bus->data;
254 int i;
255 i = saa->nr;
256 }
257
258 static void I2CBusScan(struct i2c_bus *bus)
259 {
260 int i;
261 for (i = 0; i < 0xff; i += 2)
262 if ((I2CRead(bus, i, 0, 0)) >= 0)
263 attach_inform(bus, i);
264 }
265
266 static struct i2c_bus saa7146_i2c_bus_template =
267 {
268 "saa7146",
269 I2C_BUSID_BT848,
270 NULL,
271 SPIN_LOCK_UNLOCKED,
272 attach_inform,
273 detach_inform,
274 NULL,
275 NULL,
276 I2CReadOld,
277 I2CWrite,
278 };
279
280 static int debiwait_maxwait = 0;
281
282 static int wait_for_debi_done(struct saa7146 *saa)
283 {
284 int i;
285
286 /* wait for registers to be programmed */
287 for (i = 0; i < 100000 &&
288 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_DEBI); i++)
289 saaread(SAA7146_MC2);
290 /* wait for transfer to complete */
291 for (i = 0; i < 500000 &&
292 (saaread(SAA7146_PSR) & SAA7146_PSR_DEBI_S); i++)
293 saaread(SAA7146_MC2);
294 if (i > debiwait_maxwait)
295 printk("wait-for-debi-done maxwait: %d\n",
296 debiwait_maxwait = i);
297
298 if (i == 500000)
299 return -1;
300 return 0;
301 }
302
303 static int debiwrite(struct saa7146 *saa, u32 config, int addr,
304 u32 val, int count)
305 {
306 u32 cmd;
307 if (count <= 0 || count > 32764)
308 return -1;
309 if (wait_for_debi_done(saa) < 0)
310 return -1;
311 saawrite(config, SAA7146_DEBI_CONFIG);
312 if (count <= 4) /* immediate transfer */
313 saawrite(val, SAA7146_DEBI_AD);
314 else /* block transfer */
315 saawrite(virt_to_bus(saa->dmadebi), SAA7146_DEBI_AD);
316 saawrite((cmd = (count << 17) | (addr & 0xffff)), SAA7146_DEBI_COMMAND);
317 saawrite((SAA7146_MC2_UPLD_DEBI << 16) | SAA7146_MC2_UPLD_DEBI,
318 SAA7146_MC2);
319 return 0;
320 }
321
322 static u32 debiread(struct saa7146 *saa, u32 config, int addr, int count)
323 {
324 u32 result = 0;
325
326 if (count > 32764 || count <= 0)
327 return 0;
328 if (wait_for_debi_done(saa) < 0)
329 return 0;
330 saawrite(virt_to_bus(saa->dmadebi), SAA7146_DEBI_AD);
331 saawrite((count << 17) | 0x10000 | (addr & 0xffff),
332 SAA7146_DEBI_COMMAND);
333 saawrite(config, SAA7146_DEBI_CONFIG);
334 saawrite((SAA7146_MC2_UPLD_DEBI << 16) | SAA7146_MC2_UPLD_DEBI,
335 SAA7146_MC2);
336 if (count > 4) /* not an immediate transfer */
337 return count;
338 wait_for_debi_done(saa);
339 result = saaread(SAA7146_DEBI_AD);
340 if (count == 1)
341 result &= 0xff;
342 if (count == 2)
343 result &= 0xffff;
344 if (count == 3)
345 result &= 0xffffff;
346 return result;
347 }
348
349 #if 0 /* unused */
350 /* MUST be a multiple of 8 bytes and 8-byte aligned and < 32768 bytes */
351 /* data copied into saa->dmadebi buffer, caller must re-enable interrupts */
352 static void ibm_block_dram_read(struct saa7146 *saa, int address, int bytes)
353 {
354 int i, j;
355 u32 *buf;
356 buf = (u32 *) saa->dmadebi;
357 if (bytes > 0x7000)
358 bytes = 0x7000;
359 saawrite(0, SAA7146_IER); /* disable interrupts */
360 for (i=0; i < 10000 &&
361 (debiread(saa, debNormal, IBM_MP2_DRAM_CMD_STAT, 2)
362 & 0x8000); i++)
363 saaread(SAA7146_MC2);
364 if (i == 10000)
365 printk(KERN_ERR "stradis%d: dram_busy never cleared\n",
366 saa->nr);
367 debiwrite(saa, debNormal, IBM_MP2_SRC_ADDR, (address<<16) |
368 (address>>16), 4);
369 debiwrite(saa, debNormal, IBM_MP2_BLOCK_SIZE, bytes, 2);
370 debiwrite(saa, debNormal, IBM_MP2_CMD_STAT, 0x8a10, 2);
371 for (j = 0; j < bytes/4; j++) {
372 for (i = 0; i < 10000 &&
373 (!(debiread(saa, debNormal, IBM_MP2_DRAM_CMD_STAT, 2)
374 & 0x4000)); i++)
375 saaread(SAA7146_MC2);
376 if (i == 10000)
377 printk(KERN_ERR "stradis%d: dram_ready never set\n",
378 saa->nr);
379 buf[j] = debiread(saa, debNormal, IBM_MP2_DRAM_DATA, 4);
380 }
381 }
382 #endif /* unused */
383
384 static void do_irq_send_data(struct saa7146 *saa)
385 {
386 int split, audbytes, vidbytes;
387
388 saawrite(SAA7146_PSR_PIN1, SAA7146_IER);
389 /* if special feature mode in effect, disable audio sending */
390 if (saa->playmode != VID_PLAY_NORMAL)
391 saa->audtail = saa->audhead = 0;
392 if (saa->audhead <= saa->audtail)
393 audbytes = saa->audtail - saa->audhead;
394 else
395 audbytes = 65536 - (saa->audhead - saa->audtail);
396 if (saa->vidhead <= saa->vidtail)
397 vidbytes = saa->vidtail - saa->vidhead;
398 else
399 vidbytes = 524288 - (saa->vidhead - saa->vidtail);
400 if (audbytes == 0 && vidbytes == 0 && saa->osdtail == saa->osdhead) {
401 saawrite(0, SAA7146_IER);
402 return;
403 }
404 /* if at least 1 block audio waiting and audio fifo isn't full */
405 if (audbytes >= 2048 && (debiread(saa, debNormal,
406 IBM_MP2_AUD_FIFO, 2) & 0xff) < 60) {
407 if (saa->audhead > saa->audtail)
408 split = 65536 - saa->audhead;
409 else
410 split = 0;
411 audbytes = 2048;
412 if (split > 0 && split < 2048) {
413 memcpy(saa->dmadebi, saa->audbuf + saa->audhead,
414 split);
415 saa->audhead = 0;
416 audbytes -= split;
417 } else
418 split = 0;
419 memcpy(saa->dmadebi + split, saa->audbuf + saa->audhead,
420 audbytes);
421 saa->audhead += audbytes;
422 saa->audhead &= 0xffff;
423 debiwrite(saa, debAudio, (NewCard? IBM_MP2_AUD_FIFO :
424 IBM_MP2_AUD_FIFOW), 0, 2048);
425 wake_up_interruptible(&saa->audq);
426 /* if at least 1 block video waiting and video fifo isn't full */
427 } else if (vidbytes >= 30720 && (debiread(saa, debNormal,
428 IBM_MP2_FIFO, 2)) < 16384) {
429 if (saa->vidhead > saa->vidtail)
430 split = 524288 - saa->vidhead;
431 else
432 split = 0;
433 vidbytes = 30720;
434 if (split > 0 && split < 30720) {
435 memcpy(saa->dmadebi, saa->vidbuf + saa->vidhead,
436 split);
437 saa->vidhead = 0;
438 vidbytes -= split;
439 } else
440 split = 0;
441 memcpy(saa->dmadebi + split, saa->vidbuf + saa->vidhead,
442 vidbytes);
443 saa->vidhead += vidbytes;
444 saa->vidhead &= 0x7ffff;
445 debiwrite(saa, debVideo, (NewCard ? IBM_MP2_FIFO :
446 IBM_MP2_FIFOW), 0, 30720);
447 wake_up_interruptible(&saa->vidq);
448 }
449 saawrite(SAA7146_PSR_DEBI_S | SAA7146_PSR_PIN1, SAA7146_IER);
450 }
451
452 static void send_osd_data(struct saa7146 *saa)
453 {
454 int size = saa->osdtail - saa->osdhead;
455 if (size > 30720)
456 size = 30720;
457 /* ensure some multiple of 8 bytes is transferred */
458 size = 8 * ((size + 8)>>3);
459 if (size) {
460 debiwrite(saa, debNormal, IBM_MP2_OSD_ADDR,
461 (saa->osdhead>>3), 2);
462 memcpy(saa->dmadebi, &saa->osdbuf[saa->osdhead], size);
463 saa->osdhead += size;
464 /* block transfer of next 8 bytes to ~32k bytes */
465 debiwrite(saa, debNormal, IBM_MP2_OSD_DATA, 0, size);
466 }
467 if (saa->osdhead >= saa->osdtail) {
468 saa->osdhead = saa->osdtail = 0;
469 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
470 }
471 }
472
473 static void saa7146_irq(int irq, void *dev_id, struct pt_regs *regs)
474 {
475 struct saa7146 *saa = (struct saa7146 *) dev_id;
476 u32 stat, astat;
477 int count;
478
479 count = 0;
480 while (1) {
481 /* get/clear interrupt status bits */
482 stat = saaread(SAA7146_ISR);
483 astat = stat & saaread(SAA7146_IER);
484 if (!astat)
485 return;
486 saawrite(astat, SAA7146_ISR);
487 if (astat & SAA7146_PSR_DEBI_S) {
488 do_irq_send_data(saa);
489 }
490 if (astat & SAA7146_PSR_PIN1) {
491 int istat;
492 /* the following read will trigger DEBI_S */
493 istat = debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
494 if (istat & 1) {
495 saawrite(0, SAA7146_IER);
496 send_osd_data(saa);
497 saawrite(SAA7146_PSR_DEBI_S |
498 SAA7146_PSR_PIN1, SAA7146_IER);
499 }
500 if (istat & 0x20) { /* Video Start */
501 saa->vidinfo.frame_count++;
502 }
503 if (istat & 0x400) { /* Picture Start */
504 /* update temporal reference */
505 }
506 if (istat & 0x200) { /* Picture Resolution Change */
507 /* read new resolution */
508 }
509 if (istat & 0x100) { /* New User Data found */
510 /* read new user data */
511 }
512 if (istat & 0x1000) { /* new GOP/SMPTE */
513 /* read new SMPTE */
514 }
515 if (istat & 0x8000) { /* Sequence Start Code */
516 /* reset frame counter, load sizes */
517 saa->vidinfo.frame_count = 0;
518 saa->vidinfo.h_size = 704;
519 saa->vidinfo.v_size = 480;
520 #if 0
521 if (saa->endmarkhead != saa->endmarktail) {
522 saa->audhead =
523 saa->endmark[saa->endmarkhead];
524 saa->endmarkhead++;
525 if (saa->endmarkhead >= MAX_MARKS)
526 saa->endmarkhead = 0;
527 }
528 #endif
529 }
530 if (istat & 0x4000) { /* Sequence Error Code */
531 if (saa->endmarkhead != saa->endmarktail) {
532 saa->audhead =
533 saa->endmark[saa->endmarkhead];
534 saa->endmarkhead++;
535 if (saa->endmarkhead >= MAX_MARKS)
536 saa->endmarkhead = 0;
537 }
538 }
539 }
540 #ifdef IDEBUG
541 if (astat & SAA7146_PSR_PPEF) {
542 IDEBUG(printk("stradis%d irq: PPEF\n", saa->nr));
543 }
544 if (astat & SAA7146_PSR_PABO) {
545 IDEBUG(printk("stradis%d irq: PABO\n", saa->nr));
546 }
547 if (astat & SAA7146_PSR_PPED) {
548 IDEBUG(printk("stradis%d irq: PPED\n", saa->nr));
549 }
550 if (astat & SAA7146_PSR_RPS_I1) {
551 IDEBUG(printk("stradis%d irq: RPS_I1\n", saa->nr));
552 }
553 if (astat & SAA7146_PSR_RPS_I0) {
554 IDEBUG(printk("stradis%d irq: RPS_I0\n", saa->nr));
555 }
556 if (astat & SAA7146_PSR_RPS_LATE1) {
557 IDEBUG(printk("stradis%d irq: RPS_LATE1\n", saa->nr));
558 }
559 if (astat & SAA7146_PSR_RPS_LATE0) {
560 IDEBUG(printk("stradis%d irq: RPS_LATE0\n", saa->nr));
561 }
562 if (astat & SAA7146_PSR_RPS_E1) {
563 IDEBUG(printk("stradis%d irq: RPS_E1\n", saa->nr));
564 }
565 if (astat & SAA7146_PSR_RPS_E0) {
566 IDEBUG(printk("stradis%d irq: RPS_E0\n", saa->nr));
567 }
568 if (astat & SAA7146_PSR_RPS_TO1) {
569 IDEBUG(printk("stradis%d irq: RPS_TO1\n", saa->nr));
570 }
571 if (astat & SAA7146_PSR_RPS_TO0) {
572 IDEBUG(printk("stradis%d irq: RPS_TO0\n", saa->nr));
573 }
574 if (astat & SAA7146_PSR_UPLD) {
575 IDEBUG(printk("stradis%d irq: UPLD\n", saa->nr));
576 }
577 if (astat & SAA7146_PSR_DEBI_E) {
578 IDEBUG(printk("stradis%d irq: DEBI_E\n", saa->nr));
579 }
580 if (astat & SAA7146_PSR_I2C_S) {
581 IDEBUG(printk("stradis%d irq: I2C_S\n", saa->nr));
582 }
583 if (astat & SAA7146_PSR_I2C_E) {
584 IDEBUG(printk("stradis%d irq: I2C_E\n", saa->nr));
585 }
586 if (astat & SAA7146_PSR_A2_IN) {
587 IDEBUG(printk("stradis%d irq: A2_IN\n", saa->nr));
588 }
589 if (astat & SAA7146_PSR_A2_OUT) {
590 IDEBUG(printk("stradis%d irq: A2_OUT\n", saa->nr));
591 }
592 if (astat & SAA7146_PSR_A1_IN) {
593 IDEBUG(printk("stradis%d irq: A1_IN\n", saa->nr));
594 }
595 if (astat & SAA7146_PSR_A1_OUT) {
596 IDEBUG(printk("stradis%d irq: A1_OUT\n", saa->nr));
597 }
598 if (astat & SAA7146_PSR_AFOU) {
599 IDEBUG(printk("stradis%d irq: AFOU\n", saa->nr));
600 }
601 if (astat & SAA7146_PSR_V_PE) {
602 IDEBUG(printk("stradis%d irq: V_PE\n", saa->nr));
603 }
604 if (astat & SAA7146_PSR_VFOU) {
605 IDEBUG(printk("stradis%d irq: VFOU\n", saa->nr));
606 }
607 if (astat & SAA7146_PSR_FIDA) {
608 IDEBUG(printk("stradis%d irq: FIDA\n", saa->nr));
609 }
610 if (astat & SAA7146_PSR_FIDB) {
611 IDEBUG(printk("stradis%d irq: FIDB\n", saa->nr));
612 }
613 if (astat & SAA7146_PSR_PIN3) {
614 IDEBUG(printk("stradis%d irq: PIN3\n", saa->nr));
615 }
616 if (astat & SAA7146_PSR_PIN2) {
617 IDEBUG(printk("stradis%d irq: PIN2\n", saa->nr));
618 }
619 if (astat & SAA7146_PSR_PIN0) {
620 IDEBUG(printk("stradis%d irq: PIN0\n", saa->nr));
621 }
622 if (astat & SAA7146_PSR_ECS) {
623 IDEBUG(printk("stradis%d irq: ECS\n", saa->nr));
624 }
625 if (astat & SAA7146_PSR_EC3S) {
626 IDEBUG(printk("stradis%d irq: EC3S\n", saa->nr));
627 }
628 if (astat & SAA7146_PSR_EC0S) {
629 IDEBUG(printk("stradis%d irq: EC0S\n", saa->nr));
630 }
631 #endif
632 count++;
633 if (count > 15)
634 printk(KERN_WARNING "stradis%d: irq loop %d\n",
635 saa->nr, count);
636 if (count > 20) {
637 saawrite(0, SAA7146_IER);
638 printk(KERN_ERR
639 "stradis%d: IRQ loop cleared\n", saa->nr);
640 }
641 }
642 }
643
644 static int ibm_send_command(struct saa7146 *saa,
645 int command, int data, int chain)
646 {
647 int i;
648
649 if (chain)
650 debiwrite(saa, debNormal, IBM_MP2_COMMAND, (command << 1) | 1, 2);
651 else
652 debiwrite(saa, debNormal, IBM_MP2_COMMAND, command << 1, 2);
653 debiwrite(saa, debNormal, IBM_MP2_CMD_DATA, data, 2);
654 debiwrite(saa, debNormal, IBM_MP2_CMD_STAT, 1, 2);
655 for (i = 0; i < 100 &&
656 (debiread(saa, debNormal, IBM_MP2_CMD_STAT, 2) & 1); i++)
657 schedule();
658 if (i == 100)
659 return -1;
660 return 0;
661 }
662
663 static void cs4341_setlevel(struct saa7146 *saa, int left, int right)
664 {
665 I2CWrite(&(saa->i2c), 0x22, 0x03,
666 left > 94 ? 94 : left, 2);
667 I2CWrite(&(saa->i2c), 0x22, 0x04,
668 right > 94 ? 94 : right, 2);
669 }
670
671 static void initialize_cs4341(struct saa7146 *saa)
672 {
673 int i;
674 for (i = 0; i < 200; i++) {
675 /* auto mute off, power on, no de-emphasis */
676 /* I2S data up to 24-bit 64xFs internal SCLK */
677 I2CWrite(&(saa->i2c), 0x22, 0x01, 0x11, 2);
678 /* ATAPI mixer settings */
679 I2CWrite(&(saa->i2c), 0x22, 0x02, 0x49, 2);
680 /* attenuation left 3db */
681 I2CWrite(&(saa->i2c), 0x22, 0x03, 0x00, 2);
682 /* attenuation right 3db */
683 I2CWrite(&(saa->i2c), 0x22, 0x04, 0x00, 2);
684 I2CWrite(&(saa->i2c), 0x22, 0x01, 0x10, 2);
685 if (I2CRead(&(saa->i2c), 0x22, 0x02, 1) == 0x49)
686 break;
687 schedule();
688 }
689 printk("stradis%d: CS4341 initialized (%d)\n", saa->nr, i);
690 return;
691 }
692
693 static void initialize_cs8420(struct saa7146 *saa, int pro)
694 {
695 int i;
696 u8 *sequence;
697 if (pro)
698 sequence = mode8420pro;
699 else
700 sequence = mode8420con;
701 for (i = 0; i < INIT8420LEN; i++)
702 I2CWrite(&(saa->i2c), 0x20, init8420[i * 2],
703 init8420[i * 2 + 1], 2);
704 for (i = 0; i < MODE8420LEN; i++)
705 I2CWrite(&(saa->i2c), 0x20, sequence[i * 2],
706 sequence[i * 2 + 1], 2);
707 printk("stradis%d: CS8420 initialized\n", saa->nr);
708 }
709
710 static void initialize_saa7121(struct saa7146 *saa, int dopal)
711 {
712 int i, mod;
713 u8 *sequence;
714 if (dopal)
715 sequence = init7121pal;
716 else
717 sequence = init7121ntsc;
718 mod = saaread(SAA7146_PSR) & 0x08;
719 /* initialize PAL/NTSC video encoder */
720 for (i = 0; i < INIT7121LEN; i++) {
721 if (NewCard) { /* handle new card encoder differences */
722 if (sequence[i*2] == 0x3a)
723 I2CWrite(&(saa->i2c), 0x88, 0x3a, 0x13, 2);
724 else if (sequence[i*2] == 0x6b)
725 I2CWrite(&(saa->i2c), 0x88, 0x6b, 0x20, 2);
726 else if (sequence[i*2] == 0x6c)
727 I2CWrite(&(saa->i2c), 0x88, 0x6c,
728 dopal ? 0x09 : 0xf5, 2);
729 else if (sequence[i*2] == 0x6d)
730 I2CWrite(&(saa->i2c), 0x88, 0x6d,
731 dopal ? 0x20 : 0x00, 2);
732 else if (sequence[i*2] == 0x7a)
733 I2CWrite(&(saa->i2c), 0x88, 0x7a,
734 dopal ? (PALFirstActive - 1) :
735 (NTSCFirstActive - 4), 2);
736 else if (sequence[i*2] == 0x7b)
737 I2CWrite(&(saa->i2c), 0x88, 0x7b,
738 dopal ? PALLastActive :
739 NTSCLastActive, 2);
740 else I2CWrite(&(saa->i2c), 0x88, sequence[i * 2],
741 sequence[i * 2 + 1], 2);
742 } else {
743 if (sequence[i*2] == 0x6b && mod)
744 I2CWrite(&(saa->i2c), 0x88, 0x6b,
745 (sequence[i * 2 + 1] ^ 0x09), 2);
746 else if (sequence[i*2] == 0x7a)
747 I2CWrite(&(saa->i2c), 0x88, 0x7a,
748 dopal ? (PALFirstActive - 1) :
749 (NTSCFirstActive - 4), 2);
750 else if (sequence[i*2] == 0x7b)
751 I2CWrite(&(saa->i2c), 0x88, 0x7b,
752 dopal ? PALLastActive :
753 NTSCLastActive, 2);
754 else
755 I2CWrite(&(saa->i2c), 0x88, sequence[i * 2],
756 sequence[i * 2 + 1], 2);
757 }
758 }
759 }
760
761 static void set_genlock_offset(struct saa7146 *saa, int noffset)
762 {
763 int nCode;
764 int PixelsPerLine = 858;
765 if (CurrentMode == VIDEO_MODE_PAL)
766 PixelsPerLine = 864;
767 if (noffset > 500)
768 noffset = 500;
769 else if (noffset < -500)
770 noffset = -500;
771 nCode = noffset + 0x100;
772 if (nCode == 1)
773 nCode = 0x401;
774 else if (nCode < 1) nCode = 0x400 + PixelsPerLine + nCode;
775 debiwrite(saa, debNormal, XILINX_GLDELAY, nCode, 2);
776 }
777
778 static void set_out_format(struct saa7146 *saa, int mode)
779 {
780 initialize_saa7121(saa, (mode == VIDEO_MODE_NTSC ? 0 : 1));
781 saa->boardcfg[2] = mode;
782 /* do not adjust analog video parameters here, use saa7121 init */
783 /* you will affect the SDI output on the new card */
784 if (mode == VIDEO_MODE_PAL) { /* PAL */
785 debiwrite(saa, debNormal, XILINX_CTL0, 0x0808, 2);
786 mdelay(50);
787 saawrite(0x012002c0, SAA7146_NUM_LINE_BYTE1);
788 if (NewCard) {
789 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
790 0xe100, 2);
791 mdelay(50);
792 }
793 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
794 NewCard ? 0xe500: 0x6500, 2);
795 debiwrite(saa, debNormal, IBM_MP2_DISP_DLY,
796 (1 << 8) |
797 (NewCard ? PALFirstActive : PALFirstActive-6), 2);
798 } else { /* NTSC */
799 debiwrite(saa, debNormal, XILINX_CTL0, 0x0800, 2);
800 mdelay(50);
801 saawrite(0x00f002c0, SAA7146_NUM_LINE_BYTE1);
802 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
803 NewCard ? 0xe100: 0x6100, 2);
804 debiwrite(saa, debNormal, IBM_MP2_DISP_DLY,
805 (1 << 8) |
806 (NewCard ? NTSCFirstActive : NTSCFirstActive-6), 2);
807 }
808 }
809
810
811 /* Intialize bitmangler to map from a byte value to the mangled word that
812 * must be output to program the Xilinx part through the DEBI port.
813 * Xilinx Data Bit->DEBI Bit: 0->15 1->7 2->6 3->12 4->11 5->2 6->1 7->0
814 * transfer FPGA code, init IBM chip, transfer IBM microcode
815 * rev2 card mangles: 0->7 1->6 2->5 3->4 4->3 5->2 6->1 7->0
816 */
817 static u16 bitmangler[256];
818
819 static int initialize_fpga(struct video_code *bitdata)
820 {
821 int i, num, startindex, failure = 0, loadtwo, loadfile = 0;
822 u16 *dmabuf;
823 u8 *newdma;
824 struct saa7146 *saa;
825
826 /* verify fpga code */
827 for (startindex = 0; startindex < bitdata->datasize; startindex++)
828 if (bitdata->data[startindex] == 255)
829 break;
830 if (startindex == bitdata->datasize) {
831 printk(KERN_INFO "stradis: bad fpga code\n");
832 return -1;
833 }
834 /* initialize all detected cards */
835 for (num = 0; num < saa_num; num++) {
836 saa = &saa7146s[num];
837 if (saa->boardcfg[0] > 20)
838 continue; /* card was programmed */
839 loadtwo = (saa->boardcfg[18] & 0x10);
840 if (!NewCard) /* we have an old board */
841 for (i = 0; i < 256; i++)
842 bitmangler[i] = ((i & 0x01) << 15) |
843 ((i & 0x02) << 6) | ((i & 0x04) << 4) |
844 ((i & 0x08) << 9) | ((i & 0x10) << 7) |
845 ((i & 0x20) >> 3) | ((i & 0x40) >> 5) |
846 ((i & 0x80) >> 7);
847 else /* else we have a new board */
848 for (i = 0; i < 256; i++)
849 bitmangler[i] = ((i & 0x01) << 7) |
850 ((i & 0x02) << 5) | ((i & 0x04) << 3) |
851 ((i & 0x08) << 1) | ((i & 0x10) >> 1) |
852 ((i & 0x20) >> 3) | ((i & 0x40) >> 5) |
853 ((i & 0x80) >> 7);
854
855 dmabuf = (u16 *) saa->dmadebi;
856 newdma = (u8 *) saa->dmadebi;
857 if (NewCard) { /* SDM2xxx */
858 if (!strncmp(bitdata->loadwhat, "decoder2", 8))
859 continue; /* fpga not for this card */
860 if (!strncmp(&saa->boardcfg[42],
861 bitdata->loadwhat, 8)) {
862 loadfile = 1;
863 } else if (loadtwo && !strncmp(&saa->boardcfg[19],
864 bitdata->loadwhat, 8)) {
865 loadfile = 2;
866 } else if (!saa->boardcfg[42] && /* special */
867 !strncmp("decxl", bitdata->loadwhat, 8)) {
868 loadfile = 1;
869 } else
870 continue; /* fpga not for this card */
871 if (loadfile != 1 && loadfile != 2) {
872 continue; /* skip to next card */
873 }
874 if (saa->boardcfg[0] && loadfile == 1 )
875 continue; /* skip to next card */
876 if (saa->boardcfg[0] != 1 && loadfile == 2)
877 continue; /* skip to next card */
878 saa->boardcfg[0]++; /* mark fpga handled */
879 printk("stradis%d: loading %s\n", saa->nr,
880 bitdata->loadwhat);
881 if (loadtwo && loadfile == 2)
882 goto send_fpga_stuff;
883 /* turn on the Audio interface to set PROG low */
884 saawrite(0x00400040, SAA7146_GPIO_CTRL);
885 saaread(SAA7146_PSR); /* ensure posted write */
886 /* wait for everyone to reset */
887 mdelay(10);
888 saawrite(0x00400000, SAA7146_GPIO_CTRL);
889 } else { /* original card */
890 if (strncmp(bitdata->loadwhat, "decoder2", 8))
891 continue; /* fpga not for this card */
892 /* Pull the Xilinx PROG signal WS3 low */
893 saawrite(0x02000200, SAA7146_MC1);
894 /* Turn on the Audio interface so can set PROG low */
895 saawrite(0x000000c0, SAA7146_ACON1);
896 /* Pull the Xilinx INIT signal (GPIO2) low */
897 saawrite(0x00400000, SAA7146_GPIO_CTRL);
898 /* Make sure everybody resets */
899 saaread(SAA7146_PSR); /* ensure posted write */
900 mdelay(10);
901 /* Release the Xilinx PROG signal */
902 saawrite(0x00000000, SAA7146_ACON1);
903 /* Turn off the Audio interface */
904 saawrite(0x02000000, SAA7146_MC1);
905 }
906 /* Release Xilinx INIT signal (WS2) */
907 saawrite(0x00000000, SAA7146_GPIO_CTRL);
908 /* Wait for the INIT to go High */
909 for (i = 0; i < 10000 &&
910 !(saaread(SAA7146_PSR) & SAA7146_PSR_PIN2); i++)
911 schedule();
912 if (i == 1000) {
913 printk(KERN_INFO "stradis%d: no fpga INIT\n", saa->nr);
914 return -1;
915 }
916 send_fpga_stuff:
917 if (NewCard) {
918 for (i = startindex; i < bitdata->datasize; i++)
919 newdma[i - startindex] =
920 bitmangler[bitdata->data[i]];
921 debiwrite(saa, 0x01420000, 0, 0,
922 ((bitdata->datasize - startindex) + 5));
923 if (loadtwo) {
924 if (loadfile == 1) {
925 printk("stradis%d: "
926 "awaiting 2nd FPGA bitfile\n",
927 saa->nr);
928 continue; /* skip to next card */
929 }
930
931 }
932 } else {
933 for (i = startindex; i < bitdata->datasize; i++)
934 dmabuf[i - startindex] =
935 bitmangler[bitdata->data[i]];
936 debiwrite(saa, 0x014a0000, 0, 0,
937 ((bitdata->datasize - startindex) + 5) * 2);
938 }
939 for (i = 0; i < 1000 &&
940 !(saaread(SAA7146_PSR) & SAA7146_PSR_PIN2); i++)
941 schedule();
942 if (i == 1000) {
943 printk(KERN_INFO "stradis%d: FPGA load failed\n",
944 saa->nr);
945 failure++;
946 continue;
947 }
948 if (!NewCard) {
949 /* Pull the Xilinx INIT signal (GPIO2) low */
950 saawrite(0x00400000, SAA7146_GPIO_CTRL);
951 saaread(SAA7146_PSR); /* ensure posted write */
952 mdelay(2);
953 saawrite(0x00000000, SAA7146_GPIO_CTRL);
954 mdelay(2);
955 }
956 printk(KERN_INFO "stradis%d: FPGA Loaded\n", saa->nr);
957 saa->boardcfg[0] = 26; /* mark fpga programmed */
958 /* set VXCO to its lowest frequency */
959 debiwrite(saa, debNormal, XILINX_PWM, 0, 2);
960 if (NewCard) {
961 /* mute CS3310 */
962 if (HaveCS3310)
963 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT,
964 0, 2);
965 /* set VXCO to PWM mode, release reset, blank on */
966 debiwrite(saa, debNormal, XILINX_CTL0, 0xffc4, 2);
967 mdelay(10);
968 /* unmute CS3310 */
969 if (HaveCS3310)
970 debiwrite(saa, debNormal, XILINX_CTL0,
971 0x2020, 2);
972 }
973 /* set source Black */
974 debiwrite(saa, debNormal, XILINX_CTL0, 0x1707, 2);
975 saa->boardcfg[4] = 22; /* set NTSC First Active Line */
976 saa->boardcfg[5] = 23; /* set PAL First Active Line */
977 saa->boardcfg[54] = 2; /* set NTSC Last Active Line - 256 */
978 saa->boardcfg[55] = 54; /* set PAL Last Active Line - 256 */
979 set_out_format(saa, VIDEO_MODE_NTSC);
980 mdelay(50);
981 /* begin IBM chip init */
982 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 4, 2);
983 saaread(SAA7146_PSR); /* wait for reset */
984 mdelay(5);
985 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0, 2);
986 debiread(saa, debNormal, IBM_MP2_CHIP_CONTROL, 2);
987 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0x10, 2);
988 debiwrite(saa, debNormal, IBM_MP2_CMD_ADDR, 0, 2);
989 debiwrite(saa, debNormal, IBM_MP2_CHIP_MODE, 0x2e, 2);
990 if (NewCard) {
991 mdelay(5);
992 /* set i2s rate converter to 48KHz */
993 debiwrite(saa, debNormal, 0x80c0, 6, 2);
994 /* we must init CS8420 first since rev b pulls i2s */
995 /* master clock low and CS4341 needs i2s master to */
996 /* run the i2c port. */
997 if (HaveCS8420) {
998 /* 0=consumer, 1=pro */
999 initialize_cs8420(saa, 0);
1000 }
1001 mdelay(5);
1002 if (HaveCS4341)
1003 initialize_cs4341(saa);
1004 }
1005 debiwrite(saa, debNormal, IBM_MP2_INFC_CTL, 0x48, 2);
1006 debiwrite(saa, debNormal, IBM_MP2_BEEP_CTL, 0xa000, 2);
1007 debiwrite(saa, debNormal, IBM_MP2_DISP_LBOR, 0, 2);
1008 debiwrite(saa, debNormal, IBM_MP2_DISP_TBOR, 0, 2);
1009 if (NewCard)
1010 set_genlock_offset(saa, 0);
1011 debiwrite(saa, debNormal, IBM_MP2_FRNT_ATTEN, 0, 2);
1012 #if 0
1013 /* enable genlock */
1014 debiwrite(saa, debNormal, XILINX_CTL0, 0x8000, 2);
1015 #else
1016 /* disable genlock */
1017 debiwrite(saa, debNormal, XILINX_CTL0, 0x8080, 2);
1018 #endif
1019 }
1020 return failure;
1021 }
1022
1023 static int do_ibm_reset(struct saa7146 *saa)
1024 {
1025 /* failure if decoder not previously programmed */
1026 if (saa->boardcfg[0] < 37)
1027 return -EIO;
1028 /* mute CS3310 */
1029 if (HaveCS3310)
1030 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, 0, 2);
1031 /* disable interrupts */
1032 saawrite(0, SAA7146_IER);
1033 saa->audhead = saa->audtail = 0;
1034 saa->vidhead = saa->vidtail = 0;
1035 /* tristate debi bus, disable debi transfers */
1036 saawrite(0x00880000, SAA7146_MC1);
1037 /* ensure posted write */
1038 saaread(SAA7146_MC1);
1039 mdelay(50);
1040 /* re-enable debi transfers */
1041 saawrite(0x00880088, SAA7146_MC1);
1042 /* set source Black */
1043 debiwrite(saa, debNormal, XILINX_CTL0, 0x1707, 2);
1044 /* begin IBM chip init */
1045 set_out_format(saa, CurrentMode);
1046 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 4, 2);
1047 saaread(SAA7146_PSR); /* wait for reset */
1048 mdelay(5);
1049 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0, 2);
1050 debiread(saa, debNormal, IBM_MP2_CHIP_CONTROL, 2);
1051 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, ChipControl, 2);
1052 debiwrite(saa, debNormal, IBM_MP2_CHIP_MODE, 0x2e, 2);
1053 if (NewCard) {
1054 mdelay(5);
1055 /* set i2s rate converter to 48KHz */
1056 debiwrite(saa, debNormal, 0x80c0, 6, 2);
1057 /* we must init CS8420 first since rev b pulls i2s */
1058 /* master clock low and CS4341 needs i2s master to */
1059 /* run the i2c port. */
1060 if (HaveCS8420) {
1061 /* 0=consumer, 1=pro */
1062 initialize_cs8420(saa, 1);
1063 }
1064 mdelay(5);
1065 if (HaveCS4341)
1066 initialize_cs4341(saa);
1067 }
1068 debiwrite(saa, debNormal, IBM_MP2_INFC_CTL, 0x48, 2);
1069 debiwrite(saa, debNormal, IBM_MP2_BEEP_CTL, 0xa000, 2);
1070 debiwrite(saa, debNormal, IBM_MP2_DISP_LBOR, 0, 2);
1071 debiwrite(saa, debNormal, IBM_MP2_DISP_TBOR, 0, 2);
1072 if (NewCard)
1073 set_genlock_offset(saa, 0);
1074 debiwrite(saa, debNormal, IBM_MP2_FRNT_ATTEN, 0, 2);
1075 debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0x2000, 2);
1076 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4552, 2);
1077 if (ibm_send_command(saa, IBM_MP2_CONFIG_DECODER,
1078 (ChipControl == 0x43 ? 0xe800 : 0xe000), 1)) {
1079 printk(KERN_ERR "stradis%d: IBM config failed\n", saa->nr);
1080 }
1081 if (HaveCS3310) {
1082 int i = CS3310MaxLvl;
1083 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, ((i<<8)|i), 2);
1084 }
1085 /* start video decoder */
1086 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, ChipControl, 2);
1087 /* 256k vid, 3520 bytes aud */
1088 debiwrite(saa, debNormal, IBM_MP2_RB_THRESHOLD, 0x4037, 2);
1089 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4573, 2);
1090 ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
1091 /* enable buffer threshold irq */
1092 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
1093 /* clear pending interrupts */
1094 debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
1095 debiwrite(saa, debNormal, XILINX_CTL0, 0x1711, 2);
1096 return 0;
1097 }
1098
1099 /* load the decoder microcode */
1100 static int initialize_ibmmpeg2(struct video_code *microcode)
1101 {
1102 int i, num;
1103 struct saa7146 *saa;
1104
1105 for (num = 0; num < saa_num; num++) {
1106 saa = &saa7146s[num];
1107 /* check that FPGA is loaded */
1108 debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0xa55a, 2);
1109 if ((i = debiread(saa, debNormal, IBM_MP2_OSD_SIZE, 2)) !=
1110 0xa55a) {
1111 printk(KERN_INFO "stradis%d: %04x != 0xa55a\n",
1112 saa->nr, i);
1113 #if 0
1114 return -1;
1115 #endif
1116 }
1117 if (!strncmp(microcode->loadwhat, "decoder.vid", 11)) {
1118 if (saa->boardcfg[0] > 27)
1119 continue; /* skip to next card */
1120 /* load video control store */
1121 saa->boardcfg[1] = 0x13; /* no-sync default */
1122 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 1, 2);
1123 debiwrite(saa, debNormal, IBM_MP2_PROC_IADDR, 0, 2);
1124 for (i = 0; i < microcode->datasize / 2; i++)
1125 debiwrite(saa, debNormal, IBM_MP2_PROC_IDATA,
1126 (microcode->data[i * 2] << 8) |
1127 microcode->data[i * 2 + 1], 2);
1128 debiwrite(saa, debNormal, IBM_MP2_PROC_IADDR, 0, 2);
1129 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 0, 2);
1130 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
1131 ChipControl, 2);
1132 saa->boardcfg[0] = 28;
1133 }
1134 if (!strncmp(microcode->loadwhat, "decoder.aud", 11)) {
1135 if (saa->boardcfg[0] > 35)
1136 continue; /* skip to next card */
1137 /* load audio control store */
1138 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 1, 2);
1139 debiwrite(saa, debNormal, IBM_MP2_AUD_IADDR, 0, 2);
1140 for (i = 0; i < microcode->datasize; i++)
1141 debiwrite(saa, debNormal, IBM_MP2_AUD_IDATA,
1142 microcode->data[i], 1);
1143 debiwrite(saa, debNormal, IBM_MP2_AUD_IADDR, 0, 2);
1144 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 0, 2);
1145 debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0x2000, 2);
1146 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4552, 2);
1147 if (ibm_send_command(saa, IBM_MP2_CONFIG_DECODER,
1148 0xe000, 1)) {
1149 printk(KERN_ERR
1150 "stradis%d: IBM config failed\n",
1151 saa->nr);
1152 return -1;
1153 }
1154 /* set PWM to center value */
1155 if (NewCard) {
1156 debiwrite(saa, debNormal, XILINX_PWM,
1157 saa->boardcfg[14] +
1158 (saa->boardcfg[13]<<8), 2);
1159 } else
1160 debiwrite(saa, debNormal, XILINX_PWM,
1161 0x46, 2);
1162 if (HaveCS3310) {
1163 i = CS3310MaxLvl;
1164 debiwrite(saa, debNormal,
1165 XILINX_CS3310_CMPLT, ((i<<8)|i), 2);
1166 }
1167 printk(KERN_INFO
1168 "stradis%d: IBM MPEGCD%d Initialized\n",
1169 saa->nr, 18 + (debiread(saa, debNormal,
1170 IBM_MP2_CHIP_CONTROL, 2) >> 12));
1171 /* start video decoder */
1172 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
1173 ChipControl, 2);
1174 debiwrite(saa, debNormal, IBM_MP2_RB_THRESHOLD,
1175 0x4037, 2); /* 256k vid, 3520 bytes aud */
1176 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4573, 2);
1177 ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
1178 /* enable buffer threshold irq */
1179 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
1180 debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
1181 /* enable gpio irq */
1182 saawrite(0x00002000, SAA7146_GPIO_CTRL);
1183 /* enable decoder output to HPS */
1184 debiwrite(saa, debNormal, XILINX_CTL0, 0x1711, 2);
1185 saa->boardcfg[0] = 37;
1186 }
1187 }
1188 return 0;
1189 }
1190
1191 static u32 palette2fmt[] =
1192 { /* some of these YUV translations are wrong */
1193 0xffffffff, 0x86000000, 0x87000000, 0x80000000, 0x8100000, 0x82000000,
1194 0x83000000, 0x00000000, 0x03000000, 0x03000000, 0x0a00000, 0x03000000,
1195 0x06000000, 0x00000000, 0x03000000, 0x0a000000, 0x0300000
1196 };
1197 static int bpp2fmt[4] =
1198 {
1199 VIDEO_PALETTE_HI240, VIDEO_PALETTE_RGB565, VIDEO_PALETTE_RGB24,
1200 VIDEO_PALETTE_RGB32
1201 };
1202
1203 /* I wish I could find a formula to calculate these... */
1204 static u32 h_prescale[64] =
1205 {
1206 0x10000000, 0x18040202, 0x18080000, 0x380c0606, 0x38100204, 0x38140808,
1207 0x38180000, 0x381c0000, 0x3820161c, 0x38242a3b, 0x38281230, 0x382c4460,
1208 0x38301040, 0x38340080, 0x38380000, 0x383c0000, 0x3840fefe, 0x3844ee9f,
1209 0x3848ee9f, 0x384cee9f, 0x3850ee9f, 0x38542a3b, 0x38581230, 0x385c0000,
1210 0x38600000, 0x38640000, 0x38680000, 0x386c0000, 0x38700000, 0x38740000,
1211 0x38780000, 0x387c0000, 0x30800000, 0x38840000, 0x38880000, 0x388c0000,
1212 0x38900000, 0x38940000, 0x38980000, 0x389c0000, 0x38a00000, 0x38a40000,
1213 0x38a80000, 0x38ac0000, 0x38b00000, 0x38b40000, 0x38b80000, 0x38bc0000,
1214 0x38c00000, 0x38c40000, 0x38c80000, 0x38cc0000, 0x38d00000, 0x38d40000,
1215 0x38d80000, 0x38dc0000, 0x38e00000, 0x38e40000, 0x38e80000, 0x38ec0000,
1216 0x38f00000, 0x38f40000, 0x38f80000, 0x38fc0000,
1217 };
1218 static u32 v_gain[64] =
1219 {
1220 0x016000ff, 0x016100ff, 0x016100ff, 0x016200ff, 0x016200ff, 0x016200ff,
1221 0x016200ff, 0x016300ff, 0x016300ff, 0x016300ff, 0x016300ff, 0x016300ff,
1222 0x016300ff, 0x016300ff, 0x016300ff, 0x016400ff, 0x016400ff, 0x016400ff,
1223 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1224 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1225 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1226 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1227 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1228 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1229 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1230 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1231 };
1232
1233
1234 static void saa7146_set_winsize(struct saa7146 *saa)
1235 {
1236 u32 format;
1237 int offset, yacl, ysci;
1238 saa->win.color_fmt = format =
1239 (saa->win.depth == 15) ? palette2fmt[VIDEO_PALETTE_RGB555] :
1240 palette2fmt[bpp2fmt[(saa->win.bpp - 1) & 3]];
1241 offset = saa->win.x * saa->win.bpp + saa->win.y * saa->win.bpl;
1242 saawrite(saa->win.vidadr + offset, SAA7146_BASE_EVEN1);
1243 saawrite(saa->win.vidadr + offset + saa->win.bpl, SAA7146_BASE_ODD1);
1244 saawrite(saa->win.bpl * 2, SAA7146_PITCH1);
1245 saawrite(saa->win.vidadr + saa->win.bpl * saa->win.sheight,
1246 SAA7146_PROT_ADDR1);
1247 saawrite(0, SAA7146_PAGE1);
1248 saawrite(format|0x60, SAA7146_CLIP_FORMAT_CTRL);
1249 offset = (704 / (saa->win.width - 1)) & 0x3f;
1250 saawrite(h_prescale[offset], SAA7146_HPS_H_PRESCALE);
1251 offset = (720896 / saa->win.width) / (offset + 1);
1252 saawrite((offset<<12)|0x0c, SAA7146_HPS_H_SCALE);
1253 if (CurrentMode == VIDEO_MODE_NTSC) {
1254 yacl = /*(480 / saa->win.height - 1) & 0x3f*/ 0;
1255 ysci = 1024 - (saa->win.height * 1024 / 480);
1256 } else {
1257 yacl = /*(576 / saa->win.height - 1) & 0x3f*/ 0;
1258 ysci = 1024 - (saa->win.height * 1024 / 576);
1259 }
1260 saawrite((1<<31)|(ysci<<21)|(yacl<<15), SAA7146_HPS_V_SCALE);
1261 saawrite(v_gain[yacl], SAA7146_HPS_V_GAIN);
1262 saawrite(((SAA7146_MC2_UPLD_DMA1 | SAA7146_MC2_UPLD_HPS_V |
1263 SAA7146_MC2_UPLD_HPS_H) << 16) | (SAA7146_MC2_UPLD_DMA1 |
1264 SAA7146_MC2_UPLD_HPS_V | SAA7146_MC2_UPLD_HPS_H),
1265 SAA7146_MC2);
1266 }
1267
1268 /* clip_draw_rectangle(cm,x,y,w,h) -- handle clipping an area
1269 * bitmap is fixed width, 128 bytes (1024 pixels represented)
1270 * arranged most-sigificant-bit-left in 32-bit words
1271 * based on saa7146 clipping hardware, it swaps bytes if LE
1272 * much of this makes up for egcs brain damage -- so if you
1273 * are wondering "why did he do this?" it is because the C
1274 * was adjusted to generate the optimal asm output without
1275 * writing non-portable __asm__ directives.
1276 */
1277
1278 static void clip_draw_rectangle(u32 *clipmap, int x, int y, int w, int h)
1279 {
1280 register int startword, endword;
1281 register u32 bitsleft, bitsright;
1282 u32 *temp;
1283 if (x < 0) {
1284 w += x;
1285 x = 0;
1286 }
1287 if (y < 0) {
1288 h += y;
1289 y = 0;
1290 }
1291 if (w <= 0 || h <= 0 || x > 1023 || y > 639)
1292 return; /* throw away bad clips */
1293 if (x + w > 1024)
1294 w = 1024 - x;
1295 if (y + h > 640)
1296 h = 640 - y;
1297 startword = (x >> 5);
1298 endword = ((x + w) >> 5);
1299 bitsleft = (0xffffffff >> (x & 31));
1300 bitsright = (0xffffffff << (~((x + w) - (endword<<5))));
1301 temp = &clipmap[(y<<5) + startword];
1302 w = endword - startword;
1303 if (!w) {
1304 bitsleft |= bitsright;
1305 for (y = 0; y < h; y++) {
1306 *temp |= bitsleft;
1307 temp += 32;
1308 }
1309 } else {
1310 for (y = 0; y < h; y++) {
1311 *temp++ |= bitsleft;
1312 for (x = 1; x < w; x++)
1313 *temp++ = 0xffffffff;
1314 *temp |= bitsright;
1315 temp += (32 - w);
1316 }
1317 }
1318 }
1319
1320 static void make_clip_tab(struct saa7146 *saa, struct video_clip *cr, int ncr)
1321 {
1322 int i, width, height;
1323 u32 *clipmap;
1324
1325 clipmap = saa->dmavid2;
1326 if((width=saa->win.width)>1023)
1327 width = 1023; /* sanity check */
1328 if((height=saa->win.height)>640)
1329 height = 639; /* sanity check */
1330 if (ncr > 0) { /* rectangles pased */
1331 /* convert rectangular clips to a bitmap */
1332 memset(clipmap, 0, VIDEO_CLIPMAP_SIZE); /* clear map */
1333 for (i = 0; i < ncr; i++)
1334 clip_draw_rectangle(clipmap, cr[i].x, cr[i].y,
1335 cr[i].width, cr[i].height);
1336 }
1337 /* clip against viewing window AND screen
1338 so we do not have to rely on the user program
1339 */
1340 clip_draw_rectangle(clipmap,(saa->win.x+width>saa->win.swidth) ?
1341 (saa->win.swidth-saa->win.x) : width, 0, 1024, 768);
1342 clip_draw_rectangle(clipmap,0,(saa->win.y+height>saa->win.sheight) ?
1343 (saa->win.sheight-saa->win.y) : height,1024,768);
1344 if (saa->win.x<0)
1345 clip_draw_rectangle(clipmap, 0, 0, -(saa->win.x), 768);
1346 if (saa->win.y<0)
1347 clip_draw_rectangle(clipmap, 0, 0, 1024, -(saa->win.y));
1348 }
1349
1350 static int saa_ioctl(struct video_device *dev, unsigned int cmd, void *arg)
1351 {
1352 struct saa7146 *saa = (struct saa7146 *) dev;
1353 switch (cmd) {
1354 case VIDIOCGCAP:
1355 {
1356 struct video_capability b;
1357 strcpy(b.name, saa->video_dev.name);
1358 b.type = VID_TYPE_CAPTURE |
1359 VID_TYPE_OVERLAY |
1360 VID_TYPE_CLIPPING |
1361 VID_TYPE_FRAMERAM |
1362 VID_TYPE_SCALES;
1363 b.channels = 1;
1364 b.audios = 1;
1365 b.maxwidth = 768;
1366 b.maxheight = 576;
1367 b.minwidth = 32;
1368 b.minheight = 32;
1369 if (copy_to_user(arg, &b, sizeof(b)))
1370 return -EFAULT;
1371 return 0;
1372 }
1373 case VIDIOCGPICT:
1374 {
1375 struct video_picture p = saa->picture;
1376 if (saa->win.depth == 8)
1377 p.palette = VIDEO_PALETTE_HI240;
1378 if (saa->win.depth == 15)
1379 p.palette = VIDEO_PALETTE_RGB555;
1380 if (saa->win.depth == 16)
1381 p.palette = VIDEO_PALETTE_RGB565;
1382 if (saa->win.depth == 24)
1383 p.palette = VIDEO_PALETTE_RGB24;
1384 if (saa->win.depth == 32)
1385 p.palette = VIDEO_PALETTE_RGB32;
1386 if (copy_to_user(arg, &p, sizeof(p)))
1387 return -EFAULT;
1388 return 0;
1389 }
1390 case VIDIOCSPICT:
1391 {
1392 struct video_picture p;
1393 u32 format;
1394 if (copy_from_user(&p, arg, sizeof(p)))
1395 return -EFAULT;
1396 if (p.palette < sizeof(palette2fmt) / sizeof(u32)) {
1397 format = palette2fmt[p.palette];
1398 saa->win.color_fmt = format;
1399 saawrite(format|0x60, SAA7146_CLIP_FORMAT_CTRL);
1400 }
1401 saawrite(((p.brightness & 0xff00) << 16) |
1402 ((p.contrast & 0xfe00) << 7) |
1403 ((p.colour & 0xfe00) >> 9), SAA7146_BCS_CTRL);
1404 saa->picture = p;
1405 /* upload changed registers */
1406 saawrite(((SAA7146_MC2_UPLD_HPS_H |
1407 SAA7146_MC2_UPLD_HPS_V) << 16) |
1408 SAA7146_MC2_UPLD_HPS_H | SAA7146_MC2_UPLD_HPS_V,
1409 SAA7146_MC2);
1410 return 0;
1411 }
1412 case VIDIOCSWIN:
1413 {
1414 struct video_window vw;
1415 struct video_clip *vcp = NULL;
1416
1417 if (copy_from_user(&vw, arg, sizeof(vw)))
1418 return -EFAULT;
1419
1420 if (vw.flags || vw.width < 16 || vw.height < 16) { /* stop capture */
1421 saawrite((SAA7146_MC1_TR_E_1 << 16), SAA7146_MC1);
1422 return -EINVAL;
1423 }
1424 if (saa->win.bpp < 4) { /* 32-bit align start and adjust width */
1425 int i = vw.x;
1426 vw.x = (vw.x + 3) & ~3;
1427 i = vw.x - i;
1428 vw.width -= i;
1429 }
1430 saa->win.x = vw.x;
1431 saa->win.y = vw.y;
1432 saa->win.width = vw.width;
1433 if (saa->win.width > 768)
1434 saa->win.width = 768;
1435 saa->win.height = vw.height;
1436 if (CurrentMode == VIDEO_MODE_NTSC) {
1437 if (saa->win.height > 480)
1438 saa->win.height = 480;
1439 } else {
1440 if (saa->win.height > 576)
1441 saa->win.height = 576;
1442 }
1443
1444 /* stop capture */
1445 saawrite((SAA7146_MC1_TR_E_1 << 16), SAA7146_MC1);
1446 saa7146_set_winsize(saa);
1447
1448 /*
1449 * Do any clips.
1450 */
1451 if (vw.clipcount < 0) {
1452 if (copy_from_user(saa->dmavid2, vw.clips,
1453 VIDEO_CLIPMAP_SIZE))
1454 return -EFAULT;
1455 } else if (vw.clipcount > 0) {
1456 if ((vcp = vmalloc(sizeof(struct video_clip) *
1457 (vw.clipcount))) == NULL)
1458 return -ENOMEM;
1459 if (copy_from_user(vcp, vw.clips,
1460 sizeof(struct video_clip) *
1461 vw.clipcount)) {
1462 vfree(vcp);
1463 return -EFAULT;
1464 }
1465 } else /* nothing clipped */
1466 memset(saa->dmavid2, 0, VIDEO_CLIPMAP_SIZE);
1467 make_clip_tab(saa, vcp, vw.clipcount);
1468 if (vw.clipcount > 0)
1469 vfree(vcp);
1470
1471 /* start capture & clip dma if we have an address */
1472 if ((saa->cap & 3) && saa->win.vidadr != 0)
1473 saawrite(((SAA7146_MC1_TR_E_1 |
1474 SAA7146_MC1_TR_E_2) << 16) | 0xffff,
1475 SAA7146_MC1);
1476 return 0;
1477 }
1478 case VIDIOCGWIN:
1479 {
1480 struct video_window vw;
1481 vw.x = saa->win.x;
1482 vw.y = saa->win.y;
1483 vw.width = saa->win.width;
1484 vw.height = saa->win.height;
1485 vw.chromakey = 0;
1486 vw.flags = 0;
1487 if (copy_to_user(arg, &vw, sizeof(vw)))
1488 return -EFAULT;
1489 return 0;
1490 }
1491 case VIDIOCCAPTURE:
1492 {
1493 int v;
1494 if (copy_from_user(&v, arg, sizeof(v)))
1495 return -EFAULT;
1496 if (v == 0) {
1497 saa->cap &= ~1;
1498 saawrite((SAA7146_MC1_TR_E_1 << 16),
1499 SAA7146_MC1);
1500 } else {
1501 if (saa->win.vidadr == 0 || saa->win.width == 0
1502 || saa->win.height == 0)
1503 return -EINVAL;
1504 saa->cap |= 1;
1505 saawrite((SAA7146_MC1_TR_E_1 << 16) | 0xffff,
1506 SAA7146_MC1);
1507 }
1508 return 0;
1509 }
1510 case VIDIOCGFBUF:
1511 {
1512 struct video_buffer v;
1513 v.base = (void *) saa->win.vidadr;
1514 v.height = saa->win.sheight;
1515 v.width = saa->win.swidth;
1516 v.depth = saa->win.depth;
1517 v.bytesperline = saa->win.bpl;
1518 if (copy_to_user(arg, &v, sizeof(v)))
1519 return -EFAULT;
1520 return 0;
1521
1522 }
1523 case VIDIOCSFBUF:
1524 {
1525 struct video_buffer v;
1526 if (!capable(CAP_SYS_ADMIN))
1527 return -EPERM;
1528 if (copy_from_user(&v, arg, sizeof(v)))
1529 return -EFAULT;
1530 if (v.depth != 8 && v.depth != 15 && v.depth != 16 &&
1531 v.depth != 24 && v.depth != 32 && v.width > 16 &&
1532 v.height > 16 && v.bytesperline > 16)
1533 return -EINVAL;
1534 if (v.base)
1535 saa->win.vidadr = (unsigned long) v.base;
1536 saa->win.sheight = v.height;
1537 saa->win.swidth = v.width;
1538 saa->win.bpp = ((v.depth + 7) & 0x38) / 8;
1539 saa->win.depth = v.depth;
1540 saa->win.bpl = v.bytesperline;
1541
1542 DEBUG(printk("Display at %p is %d by %d, bytedepth %d, bpl %d\n",
1543 v.base, v.width, v.height, saa->win.bpp, saa->win.bpl));
1544 saa7146_set_winsize(saa);
1545 return 0;
1546 }
1547 case VIDIOCKEY:
1548 {
1549 /* Will be handled higher up .. */
1550 return 0;
1551 }
1552
1553 case VIDIOCGAUDIO:
1554 {
1555 struct video_audio v;
1556 v = saa->audio_dev;
1557 v.flags &= ~(VIDEO_AUDIO_MUTE | VIDEO_AUDIO_MUTABLE);
1558 v.flags |= VIDEO_AUDIO_MUTABLE | VIDEO_AUDIO_VOLUME;
1559 strcpy(v.name, "MPEG");
1560 v.mode = VIDEO_SOUND_STEREO;
1561 if (copy_to_user(arg, &v, sizeof(v)))
1562 return -EFAULT;
1563 return 0;
1564 }
1565 case VIDIOCSAUDIO:
1566 {
1567 struct video_audio v;
1568 int i;
1569 if (copy_from_user(&v, arg, sizeof(v)))
1570 return -EFAULT;
1571 i = (~(v.volume>>8))&0xff;
1572 if (!HaveCS4341) {
1573 if (v.flags & VIDEO_AUDIO_MUTE) {
1574 debiwrite(saa, debNormal,
1575 IBM_MP2_FRNT_ATTEN,
1576 0xffff, 2);
1577 }
1578 if (!(v.flags & VIDEO_AUDIO_MUTE))
1579 debiwrite(saa, debNormal,
1580 IBM_MP2_FRNT_ATTEN,
1581 0x0000, 2);
1582 if (v.flags & VIDEO_AUDIO_VOLUME)
1583 debiwrite(saa, debNormal,
1584 IBM_MP2_FRNT_ATTEN,
1585 (i<<8)|i, 2);
1586 } else {
1587 if (v.flags & VIDEO_AUDIO_MUTE)
1588 cs4341_setlevel(saa, 0xff, 0xff);
1589 if (!(v.flags & VIDEO_AUDIO_MUTE))
1590 cs4341_setlevel(saa, 0, 0);
1591 if (v.flags & VIDEO_AUDIO_VOLUME)
1592 cs4341_setlevel(saa, i, i);
1593 }
1594 saa->audio_dev = v;
1595 return 0;
1596 }
1597
1598 case VIDIOCGUNIT:
1599 {
1600 struct video_unit vu;
1601 vu.video = saa->video_dev.minor;
1602 vu.vbi = VIDEO_NO_UNIT;
1603 vu.radio = VIDEO_NO_UNIT;
1604 vu.audio = VIDEO_NO_UNIT;
1605 vu.teletext = VIDEO_NO_UNIT;
1606 if (copy_to_user((void *) arg, (void *) &vu, sizeof(vu)))
1607 return -EFAULT;
1608 return 0;
1609 }
1610 case VIDIOCSPLAYMODE:
1611 {
1612 struct video_play_mode pmode;
1613 if (copy_from_user((void *) &pmode, arg,
1614 sizeof(struct video_play_mode)))
1615 return -EFAULT;
1616 switch (pmode.mode) {
1617 case VID_PLAY_VID_OUT_MODE:
1618 if (pmode.p1 != VIDEO_MODE_NTSC &&
1619 pmode.p1 != VIDEO_MODE_PAL)
1620 return -EINVAL;
1621 set_out_format(saa, pmode.p1);
1622 return 0;
1623 case VID_PLAY_GENLOCK:
1624 debiwrite(saa, debNormal,
1625 XILINX_CTL0,
1626 (pmode.p1 ? 0x8000 : 0x8080),
1627 2);
1628 if (NewCard)
1629 set_genlock_offset(saa,
1630 pmode.p2);
1631 return 0;
1632 case VID_PLAY_NORMAL:
1633 debiwrite(saa, debNormal,
1634 IBM_MP2_CHIP_CONTROL,
1635 ChipControl, 2);
1636 ibm_send_command(saa,
1637 IBM_MP2_PLAY, 0, 0);
1638 saa->playmode = pmode.mode;
1639 return 0;
1640 case VID_PLAY_PAUSE:
1641 /* IBM removed the PAUSE command */
1642 /* they say use SINGLE_FRAME now */
1643 case VID_PLAY_SINGLE_FRAME:
1644 ibm_send_command(saa,
1645 IBM_MP2_SINGLE_FRAME,
1646 0, 0);
1647 if (saa->playmode == pmode.mode) {
1648 debiwrite(saa, debNormal,
1649 IBM_MP2_CHIP_CONTROL,
1650 ChipControl, 2);
1651 }
1652 saa->playmode = pmode.mode;
1653 return 0;
1654 case VID_PLAY_FAST_FORWARD:
1655 ibm_send_command(saa,
1656 IBM_MP2_FAST_FORWARD, 0, 0);
1657 saa->playmode = pmode.mode;
1658 return 0;
1659 case VID_PLAY_SLOW_MOTION:
1660 ibm_send_command(saa,
1661 IBM_MP2_SLOW_MOTION,
1662 pmode.p1, 0);
1663 saa->playmode = pmode.mode;
1664 return 0;
1665 case VID_PLAY_IMMEDIATE_NORMAL:
1666 /* ensure transfers resume */
1667 debiwrite(saa, debNormal,
1668 IBM_MP2_CHIP_CONTROL,
1669 ChipControl, 2);
1670 ibm_send_command(saa,
1671 IBM_MP2_IMED_NORM_PLAY, 0, 0);
1672 saa->playmode = VID_PLAY_NORMAL;
1673 return 0;
1674 case VID_PLAY_SWITCH_CHANNELS:
1675 saa->audhead = saa->audtail = 0;
1676 saa->vidhead = saa->vidtail = 0;
1677 ibm_send_command(saa,
1678 IBM_MP2_FREEZE_FRAME, 0, 1);
1679 ibm_send_command(saa,
1680 IBM_MP2_RESET_AUD_RATE, 0, 1);
1681 debiwrite(saa, debNormal,
1682 IBM_MP2_CHIP_CONTROL, 0, 2);
1683 ibm_send_command(saa,
1684 IBM_MP2_CHANNEL_SWITCH, 0, 1);
1685 debiwrite(saa, debNormal,
1686 IBM_MP2_CHIP_CONTROL,
1687 ChipControl, 2);
1688 ibm_send_command(saa,
1689 IBM_MP2_PLAY, 0, 0);
1690 saa->playmode = VID_PLAY_NORMAL;
1691 return 0;
1692 case VID_PLAY_FREEZE_FRAME:
1693 ibm_send_command(saa,
1694 IBM_MP2_FREEZE_FRAME, 0, 0);
1695 saa->playmode = pmode.mode;
1696 return 0;
1697 case VID_PLAY_STILL_MODE:
1698 ibm_send_command(saa,
1699 IBM_MP2_SET_STILL_MODE, 0, 0);
1700 saa->playmode = pmode.mode;
1701 return 0;
1702 case VID_PLAY_MASTER_MODE:
1703 if (pmode.p1 == VID_PLAY_MASTER_NONE)
1704 saa->boardcfg[1] = 0x13;
1705 else if (pmode.p1 ==
1706 VID_PLAY_MASTER_VIDEO)
1707 saa->boardcfg[1] = 0x23;
1708 else if (pmode.p1 ==
1709 VID_PLAY_MASTER_AUDIO)
1710 saa->boardcfg[1] = 0x43;
1711 else
1712 return -EINVAL;
1713 debiwrite(saa, debNormal,
1714 IBM_MP2_CHIP_CONTROL,
1715 ChipControl, 2);
1716 return 0;
1717 case VID_PLAY_ACTIVE_SCANLINES:
1718 if (CurrentMode == VIDEO_MODE_PAL) {
1719 if (pmode.p1 < 1 ||
1720 pmode.p2 > 625)
1721 return -EINVAL;
1722 saa->boardcfg[5] = pmode.p1;
1723 saa->boardcfg[55] = (pmode.p1 +
1724 (pmode.p2/2) - 1) &
1725 0xff;
1726 } else {
1727 if (pmode.p1 < 4 ||
1728 pmode.p2 > 525)
1729 return -EINVAL;
1730 saa->boardcfg[4] = pmode.p1;
1731 saa->boardcfg[54] = (pmode.p1 +
1732 (pmode.p2/2) - 4) &
1733 0xff;
1734 }
1735 set_out_format(saa, CurrentMode);
1736 case VID_PLAY_RESET:
1737 return do_ibm_reset(saa);
1738 case VID_PLAY_END_MARK:
1739 if (saa->endmarktail <
1740 saa->endmarkhead) {
1741 if (saa->endmarkhead -
1742 saa->endmarktail < 2)
1743 return -ENOSPC;
1744 } else if (saa->endmarkhead <=
1745 saa->endmarktail) {
1746 if (saa->endmarktail -
1747 saa->endmarkhead >
1748 (MAX_MARKS - 2))
1749 return -ENOSPC;
1750 } else
1751 return -ENOSPC;
1752 saa->endmark[saa->endmarktail] =
1753 saa->audtail;
1754 saa->endmarktail++;
1755 if (saa->endmarktail >= MAX_MARKS)
1756 saa->endmarktail = 0;
1757 }
1758 return -EINVAL;
1759 }
1760 case VIDIOCSWRITEMODE:
1761 {
1762 int mode;
1763 if (copy_from_user((void *) &mode, arg, sizeof(int)))
1764 return -EFAULT;
1765 if (mode == VID_WRITE_MPEG_AUD ||
1766 mode == VID_WRITE_MPEG_VID ||
1767 mode == VID_WRITE_CC ||
1768 mode == VID_WRITE_TTX ||
1769 mode == VID_WRITE_OSD) {
1770 saa->writemode = mode;
1771 return 0;
1772 }
1773 return -EINVAL;
1774 }
1775 case VIDIOCSMICROCODE:
1776 {
1777 struct video_code ucode;
1778 __u8 *udata;
1779 int i;
1780 if (copy_from_user((void *) &ucode, arg,
1781 sizeof(ucode)))
1782 return -EFAULT;
1783 if (ucode.datasize > 65536 || ucode.datasize < 1024 ||
1784 strncmp(ucode.loadwhat, "dec", 3))
1785 return -EINVAL;
1786 if ((udata = vmalloc(ucode.datasize)) == NULL)
1787 return -ENOMEM;
1788 if (copy_from_user((void *) udata, ucode.data,
1789 ucode.datasize)) {
1790 vfree(udata);
1791 return -EFAULT;
1792 }
1793 ucode.data = udata;
1794 if (!strncmp(ucode.loadwhat, "decoder.aud", 11)
1795 || !strncmp(ucode.loadwhat, "decoder.vid", 11))
1796 i = initialize_ibmmpeg2(&ucode);
1797 else
1798 i = initialize_fpga(&ucode);
1799 vfree(udata);
1800 if (i)
1801 return -EINVAL;
1802 return 0;
1803
1804 }
1805 case VIDIOCGCHAN: /* this makes xawtv happy */
1806 {
1807 struct video_channel v;
1808 if (copy_from_user(&v, arg, sizeof(v)))
1809 return -EFAULT;
1810 v.flags = VIDEO_VC_AUDIO;
1811 v.tuners = 0;
1812 v.type = VID_TYPE_MPEG_DECODER;
1813 v.norm = CurrentMode;
1814 strcpy(v.name, "MPEG2");
1815 if (copy_to_user(arg, &v, sizeof(v)))
1816 return -EFAULT;
1817 return 0;
1818 }
1819 case VIDIOCSCHAN: /* this makes xawtv happy */
1820 {
1821 struct video_channel v;
1822 if (copy_from_user(&v, arg, sizeof(v)))
1823 return -EFAULT;
1824 /* do nothing */
1825 return 0;
1826 }
1827 default:
1828 return -ENOIOCTLCMD;
1829 }
1830 return 0;
1831 }
1832
1833 static int saa_mmap(struct video_device *dev, const char *adr,
1834 unsigned long size)
1835 {
1836 struct saa7146 *saa = (struct saa7146 *) dev;
1837 printk(KERN_DEBUG "stradis%d: saa_mmap called\n", saa->nr);
1838 return -EINVAL;
1839 }
1840
1841 static long saa_read(struct video_device *dev, char *buf,
1842 unsigned long count, int nonblock)
1843 {
1844 return -EINVAL;
1845 }
1846
1847 static long saa_write(struct video_device *dev, const char *buf,
1848 unsigned long count, int nonblock)
1849 {
1850 struct saa7146 *saa = (struct saa7146 *) dev;
1851 unsigned long todo = count;
1852 int blocksize, split;
1853 unsigned long flags;
1854
1855 while (todo > 0) {
1856 if (saa->writemode == VID_WRITE_MPEG_AUD) {
1857 spin_lock_irqsave(&saa->lock, flags);
1858 if (saa->audhead <= saa->audtail)
1859 blocksize = 65536-(saa->audtail - saa->audhead);
1860 else
1861 blocksize = saa->audhead - saa->audtail;
1862 spin_unlock_irqrestore(&saa->lock, flags);
1863 if (blocksize < 16384) {
1864 saawrite(SAA7146_PSR_DEBI_S |
1865 SAA7146_PSR_PIN1, SAA7146_IER);
1866 saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
1867 /* wait for buffer space to open */
1868 interruptible_sleep_on(&saa->audq);
1869 }
1870 spin_lock_irqsave(&saa->lock, flags);
1871 if (saa->audhead <= saa->audtail) {
1872 blocksize = 65536-(saa->audtail - saa->audhead);
1873 split = 65536 - saa->audtail;
1874 } else {
1875 blocksize = saa->audhead - saa->audtail;
1876 split = 65536;
1877 }
1878 spin_unlock_irqrestore(&saa->lock, flags);
1879 blocksize--;
1880 if (blocksize > todo)
1881 blocksize = todo;
1882 /* double check that we really have space */
1883 if (!blocksize)
1884 return -ENOSPC;
1885 if (split < blocksize) {
1886 if (copy_from_user(saa->audbuf +
1887 saa->audtail, buf, split))
1888 return -EFAULT;
1889 buf += split;
1890 todo -= split;
1891 blocksize -= split;
1892 saa->audtail = 0;
1893 }
1894 if (copy_from_user(saa->audbuf + saa->audtail, buf,
1895 blocksize))
1896 return -EFAULT;
1897 saa->audtail += blocksize;
1898 todo -= blocksize;
1899 buf += blocksize;
1900 saa->audtail &= 0xffff;
1901 } else if (saa->writemode == VID_WRITE_MPEG_VID) {
1902 spin_lock_irqsave(&saa->lock, flags);
1903 if (saa->vidhead <= saa->vidtail)
1904 blocksize=524288-(saa->vidtail - saa->vidhead);
1905 else
1906 blocksize = saa->vidhead - saa->vidtail;
1907 spin_unlock_irqrestore(&saa->lock, flags);
1908 if (blocksize < 65536) {
1909 saawrite(SAA7146_PSR_DEBI_S |
1910 SAA7146_PSR_PIN1, SAA7146_IER);
1911 saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
1912 /* wait for buffer space to open */
1913 interruptible_sleep_on(&saa->vidq);
1914 }
1915 spin_lock_irqsave(&saa->lock, flags);
1916 if (saa->vidhead <= saa->vidtail) {
1917 blocksize=524288-(saa->vidtail - saa->vidhead);
1918 split = 524288 - saa->vidtail;
1919 } else {
1920 blocksize = saa->vidhead - saa->vidtail;
1921 split = 524288;
1922 }
1923 spin_unlock_irqrestore(&saa->lock, flags);
1924 blocksize--;
1925 if (blocksize > todo)
1926 blocksize = todo;
1927 /* double check that we really have space */
1928 if (!blocksize)
1929 return -ENOSPC;
1930 if (split < blocksize) {
1931 if (copy_from_user(saa->vidbuf +
1932 saa->vidtail, buf, split))
1933 return -EFAULT;
1934 buf += split;
1935 todo -= split;
1936 blocksize -= split;
1937 saa->vidtail = 0;
1938 }
1939 if (copy_from_user(saa->vidbuf + saa->vidtail, buf,
1940 blocksize))
1941 return -EFAULT;
1942 saa->vidtail += blocksize;
1943 todo -= blocksize;
1944 buf += blocksize;
1945 saa->vidtail &= 0x7ffff;
1946 } else if (saa->writemode == VID_WRITE_OSD) {
1947 if (count > 131072)
1948 return -ENOSPC;
1949 if (copy_from_user(saa->osdbuf, buf, count))
1950 return -EFAULT;
1951 buf += count;
1952 saa->osdhead = 0;
1953 saa->osdtail = count;
1954 debiwrite(saa, debNormal, IBM_MP2_OSD_ADDR, 0, 2);
1955 debiwrite(saa, debNormal, IBM_MP2_OSD_LINK_ADDR, 0, 2);
1956 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00d, 2);
1957 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
1958 debiread(saa, debNormal,
1959 IBM_MP2_DISP_MODE, 2) | 1, 2);
1960 /* trigger osd data transfer */
1961 saawrite(SAA7146_PSR_DEBI_S |
1962 SAA7146_PSR_PIN1, SAA7146_IER);
1963 saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
1964 }
1965 }
1966 return count;
1967 }
1968
1969 static int saa_open(struct video_device *dev, int flags)
1970 {
1971 struct saa7146 *saa = (struct saa7146 *) dev;
1972
1973 saa->video_dev.busy = 0;
1974 saa->user++;
1975 if (saa->user > 1)
1976 return 0; /* device open already, don't reset */
1977 saa->writemode = VID_WRITE_MPEG_VID; /* default to video */
1978 return 0;
1979 }
1980
1981 static void saa_close(struct video_device *dev)
1982 {
1983 struct saa7146 *saa = (struct saa7146 *) dev;
1984 saa->user--;
1985 saa->video_dev.busy = 0;
1986 if (saa->user > 0) /* still someone using device */
1987 return;
1988 saawrite(0x007f0000, SAA7146_MC1); /* stop all overlay dma */
1989 }
1990
1991 /* template for video_device-structure */
1992 static struct video_device saa_template =
1993 {
1994 owner: THIS_MODULE,
1995 name: "SAA7146A",
1996 type: VID_TYPE_CAPTURE | VID_TYPE_OVERLAY,
1997 hardware: VID_HARDWARE_SAA7146,
1998 open: saa_open,
1999 close: saa_close,
2000 read: saa_read,
2001 write: saa_write,
2002 ioctl: saa_ioctl,
2003 mmap: saa_mmap,
2004 };
2005
2006 static int configure_saa7146(struct pci_dev *dev, int num)
2007 {
2008 int result;
2009 struct saa7146 *saa;
2010
2011 saa = &saa7146s[num];
2012
2013 saa->endmarkhead = saa->endmarktail = 0;
2014 saa->win.x = saa->win.y = 0;
2015 saa->win.width = saa->win.cropwidth = 720;
2016 saa->win.height = saa->win.cropheight = 480;
2017 saa->win.cropx = saa->win.cropy = 0;
2018 saa->win.bpp = 2;
2019 saa->win.depth = 16;
2020 saa->win.color_fmt = palette2fmt[VIDEO_PALETTE_RGB565];
2021 saa->win.bpl = 1024 * saa->win.bpp;
2022 saa->win.swidth = 1024;
2023 saa->win.sheight = 768;
2024 saa->picture.brightness = 32768;
2025 saa->picture.contrast = 38768;
2026 saa->picture.colour = 32768;
2027 saa->cap = 0;
2028 saa->dev = dev;
2029 saa->nr = num;
2030 saa->playmode = VID_PLAY_NORMAL;
2031 memset(saa->boardcfg, 0, 64); /* clear board config area */
2032 saa->saa7146_mem = NULL;
2033 saa->dmavid1 = saa->dmavid2 = saa->dmavid3 = saa->dmaa1in =
2034 saa->dmaa1out = saa->dmaa2in = saa->dmaa2out =
2035 saa->pagevid1 = saa->pagevid2 = saa->pagevid3 = saa->pagea1in =
2036 saa->pagea1out = saa->pagea2in = saa->pagea2out =
2037 saa->pagedebi = saa->dmaRPS1 = saa->dmaRPS2 = saa->pageRPS1 =
2038 saa->pageRPS2 = NULL;
2039 saa->audbuf = saa->vidbuf = saa->osdbuf = saa->dmadebi = NULL;
2040 saa->audhead = saa->vidtail = 0;
2041
2042 init_waitqueue_head(&saa->i2cq);
2043 init_waitqueue_head(&saa->audq);
2044 init_waitqueue_head(&saa->debiq);
2045 init_waitqueue_head(&saa->vidq);
2046 spin_lock_init(&saa->lock);
2047
2048 if (pci_enable_device(dev))
2049 return -EIO;
2050
2051 saa->id = dev->device;
2052 saa->irq = dev->irq;
2053 saa->video_dev.minor = -1;
2054 saa->saa7146_adr = pci_resource_start(dev, 0);
2055 pci_read_config_byte(dev, PCI_CLASS_REVISION, &saa->revision);
2056
2057 saa->saa7146_mem = ioremap(saa->saa7146_adr, 0x200);
2058 if (!saa->saa7146_mem)
2059 return -EIO;
2060
2061 memcpy(&(saa->i2c), &saa7146_i2c_bus_template, sizeof(struct i2c_bus));
2062 memcpy(&saa->video_dev, &saa_template, sizeof(saa_template));
2063 sprintf(saa->i2c.name, "stradis%d", num);
2064 saa->i2c.data = saa;
2065 saawrite(0, SAA7146_IER); /* turn off all interrupts */
2066 result = request_irq(saa->irq, saa7146_irq,
2067 SA_SHIRQ | SA_INTERRUPT, "stradis", (void *) saa);
2068 if (result == -EINVAL)
2069 printk(KERN_ERR "stradis%d: Bad irq number or handler\n",
2070 num);
2071 if (result == -EBUSY)
2072 printk(KERN_ERR "stradis%d: IRQ %ld busy, change your PnP"
2073 " config in BIOS\n", num, saa->irq);
2074 if (result < 0) {
2075 iounmap(saa->saa7146_mem);
2076 return result;
2077 }
2078 pci_set_master(dev);
2079 if (video_register_device(&saa->video_dev, VFL_TYPE_GRABBER, video_nr) < 0) {
2080 iounmap(saa->saa7146_mem);
2081 return -1;
2082 }
2083 #if 0
2084 /* i2c generic interface is currently BROKEN */
2085 i2c_register_bus(&saa->i2c);
2086 #endif
2087 return 0;
2088 }
2089
2090 static int init_saa7146(int i)
2091 {
2092 struct saa7146 *saa = &saa7146s[i];
2093
2094 saa->user = 0;
2095 /* reset the saa7146 */
2096 saawrite(0xffff0000, SAA7146_MC1);
2097 mdelay(5);
2098 /* enable debi and i2c transfers and pins */
2099 saawrite(((SAA7146_MC1_EDP | SAA7146_MC1_EI2C |
2100 SAA7146_MC1_TR_E_DEBI) << 16) | 0xffff, SAA7146_MC1);
2101 /* ensure proper state of chip */
2102 saawrite(0x00000000, SAA7146_PAGE1);
2103 saawrite(0x00f302c0, SAA7146_NUM_LINE_BYTE1);
2104 saawrite(0x00000000, SAA7146_PAGE2);
2105 saawrite(0x01400080, SAA7146_NUM_LINE_BYTE2);
2106 saawrite(0x00000000, SAA7146_DD1_INIT);
2107 saawrite(0x00000000, SAA7146_DD1_STREAM_B);
2108 saawrite(0x00000000, SAA7146_DD1_STREAM_A);
2109 saawrite(0x00000000, SAA7146_BRS_CTRL);
2110 saawrite(0x80400040, SAA7146_BCS_CTRL);
2111 saawrite(0x0000e000 /*| (1<<29)*/, SAA7146_HPS_CTRL);
2112 saawrite(0x00000060, SAA7146_CLIP_FORMAT_CTRL);
2113 saawrite(0x00000000, SAA7146_ACON1);
2114 saawrite(0x00000000, SAA7146_ACON2);
2115 saawrite(0x00000600, SAA7146_I2C_STATUS);
2116 saawrite(((SAA7146_MC2_UPLD_D1_B | SAA7146_MC2_UPLD_D1_A |
2117 SAA7146_MC2_UPLD_BRS | SAA7146_MC2_UPLD_HPS_H |
2118 SAA7146_MC2_UPLD_HPS_V | SAA7146_MC2_UPLD_DMA2 |
2119 SAA7146_MC2_UPLD_DMA1 | SAA7146_MC2_UPLD_I2C) << 16) | 0xffff,
2120 SAA7146_MC2);
2121 /* setup arbitration control registers */
2122 saawrite(0x1412121a, SAA7146_PCI_BT_V1);
2123
2124 /* allocate 32k dma buffer + 4k for page table */
2125 if ((saa->dmadebi = kmalloc(32768 + 4096, GFP_KERNEL)) == NULL) {
2126 printk(KERN_ERR "stradis%d: debi kmalloc failed\n", i);
2127 return -1;
2128 }
2129 #if 0
2130 saa->pagedebi = saa->dmadebi + 32768; /* top 4k is for mmu */
2131 saawrite(virt_to_bus(saa->pagedebi) /*|0x800 */ , SAA7146_DEBI_PAGE);
2132 for (i = 0; i < 12; i++) /* setup mmu page table */
2133 saa->pagedebi[i] = virt_to_bus((saa->dmadebi + i * 4096));
2134 #endif
2135 saa->audhead = saa->vidhead = saa->osdhead = 0;
2136 saa->audtail = saa->vidtail = saa->osdtail = 0;
2137 if (saa->vidbuf == NULL)
2138 if ((saa->vidbuf = vmalloc(524288)) == NULL) {
2139 printk(KERN_ERR "stradis%d: malloc failed\n", saa->nr);
2140 return -ENOMEM;
2141 }
2142 if (saa->audbuf == NULL)
2143 if ((saa->audbuf = vmalloc(65536)) == NULL) {
2144 printk(KERN_ERR "stradis%d: malloc failed\n", saa->nr);
2145 vfree(saa->vidbuf);
2146 saa->vidbuf = NULL;
2147 return -ENOMEM;
2148 }
2149 if (saa->osdbuf == NULL)
2150 if ((saa->osdbuf = vmalloc(131072)) == NULL) {
2151 printk(KERN_ERR "stradis%d: malloc failed\n", saa->nr);
2152 vfree(saa->vidbuf);
2153 vfree(saa->audbuf);
2154 saa->vidbuf = saa->audbuf = NULL;
2155 return -ENOMEM;
2156 }
2157 /* allocate 81920 byte buffer for clipping */
2158 if ((saa->dmavid2 = kmalloc(VIDEO_CLIPMAP_SIZE, GFP_KERNEL)) == NULL) {
2159 printk(KERN_ERR "stradis%d: clip kmalloc failed\n", saa->nr);
2160 vfree(saa->vidbuf);
2161 vfree(saa->audbuf);
2162 vfree(saa->osdbuf);
2163 saa->vidbuf = saa->audbuf = saa->osdbuf = NULL;
2164 saa->dmavid2 = NULL;
2165 return -1;
2166 }
2167 memset(saa->dmavid2, 0x00, VIDEO_CLIPMAP_SIZE); /* clip everything */
2168 /* setup clipping registers */
2169 saawrite(virt_to_bus(saa->dmavid2), SAA7146_BASE_EVEN2);
2170 saawrite(virt_to_bus(saa->dmavid2) + 128, SAA7146_BASE_ODD2);
2171 saawrite(virt_to_bus(saa->dmavid2) + VIDEO_CLIPMAP_SIZE,
2172 SAA7146_PROT_ADDR2);
2173 saawrite(256, SAA7146_PITCH2);
2174 saawrite(4, SAA7146_PAGE2); /* dma direction: read, no byteswap */
2175 saawrite(((SAA7146_MC2_UPLD_DMA2) << 16) | SAA7146_MC2_UPLD_DMA2,
2176 SAA7146_MC2);
2177 I2CBusScan(&(saa->i2c));
2178 return 0;
2179 }
2180
2181 static void release_saa(void)
2182 {
2183 u8 command;
2184 int i;
2185 struct saa7146 *saa;
2186
2187 for (i = 0; i < saa_num; i++) {
2188 saa = &saa7146s[i];
2189
2190 /* turn off all capturing, DMA and IRQs */
2191 saawrite(0xffff0000, SAA7146_MC1); /* reset chip */
2192 saawrite(0, SAA7146_MC2);
2193 saawrite(0, SAA7146_IER);
2194 saawrite(0xffffffffUL, SAA7146_ISR);
2195 #if 0
2196 /* unregister i2c_bus */
2197 i2c_unregister_bus((&saa->i2c));
2198 #endif
2199
2200 /* disable PCI bus-mastering */
2201 pci_read_config_byte(saa->dev, PCI_COMMAND, &command);
2202 command &= ~PCI_COMMAND_MASTER;
2203 pci_write_config_byte(saa->dev, PCI_COMMAND, command);
2204
2205 /* unmap and free memory */
2206 saa->audhead = saa->audtail = saa->osdhead = 0;
2207 saa->vidhead = saa->vidtail = saa->osdtail = 0;
2208 if (saa->vidbuf)
2209 vfree(saa->vidbuf);
2210 if (saa->audbuf)
2211 vfree(saa->audbuf);
2212 if (saa->osdbuf)
2213 vfree(saa->osdbuf);
2214 if (saa->dmavid2)
2215 kfree((void *) saa->dmavid2);
2216 saa->audbuf = saa->vidbuf = saa->osdbuf = NULL;
2217 saa->dmavid2 = NULL;
2218 if (saa->dmadebi)
2219 kfree((void *) saa->dmadebi);
2220 if (saa->dmavid1)
2221 kfree((void *) saa->dmavid1);
2222 if (saa->dmavid2)
2223 kfree((void *) saa->dmavid2);
2224 if (saa->dmavid3)
2225 kfree((void *) saa->dmavid3);
2226 if (saa->dmaa1in)
2227 kfree((void *) saa->dmaa1in);
2228 if (saa->dmaa1out)
2229 kfree((void *) saa->dmaa1out);
2230 if (saa->dmaa2in)
2231 kfree((void *) saa->dmaa2in);
2232 if (saa->dmaa2out)
2233 kfree((void *) saa->dmaa2out);
2234 if (saa->dmaRPS1)
2235 kfree((void *) saa->dmaRPS1);
2236 if (saa->dmaRPS2)
2237 kfree((void *) saa->dmaRPS2);
2238 free_irq(saa->irq, saa);
2239 if (saa->saa7146_mem)
2240 iounmap(saa->saa7146_mem);
2241 if (saa->video_dev.minor != -1)
2242 video_unregister_device(&saa->video_dev);
2243 }
2244 }
2245
2246
2247 static int __init stradis_init (void)
2248 {
2249 struct pci_dev *dev = NULL;
2250 int result = 0, i;
2251
2252 saa_num = 0;
2253
2254 while ((dev = pci_find_device(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA7146, dev))) {
2255 if (!dev->subsystem_vendor)
2256 printk(KERN_INFO "stradis%d: rev1 decoder\n", saa_num);
2257 else
2258 printk(KERN_INFO "stradis%d: SDM2xx found\n", saa_num);
2259 result = configure_saa7146(dev, saa_num++);
2260 if (result)
2261 return result;
2262 }
2263 if (saa_num)
2264 printk(KERN_INFO "stradis: %d card(s) found.\n", saa_num);
2265 else
2266 return -EINVAL;
2267 for (i = 0; i < saa_num; i++)
2268 if (init_saa7146(i) < 0) {
2269 release_saa();
2270 return -EIO;
2271 }
2272 return 0;
2273 }
2274
2275
2276 static void __exit stradis_exit (void)
2277 {
2278 release_saa();
2279 printk(KERN_INFO "stradis: module cleanup complete\n");
2280 }
2281
2282
2283 module_init(stradis_init);
2284 module_exit(stradis_exit);
2285
2286