File: /usr/src/linux/drivers/mtd/chips/cfi_cmdset_0001.c
1 /*
2 * Common Flash Interface support:
3 * Intel Extended Vendor Command Set (ID 0x0001)
4 *
5 * (C) 2000 Red Hat. GPL'd
6 *
7 * $Id: cfi_cmdset_0001.c,v 1.80 2001/06/03 01:32:57 nico Exp $
8 *
9 *
10 * 10/10/2000 Nicolas Pitre <nico@cam.org>
11 * - completely revamped method functions so they are aware and
12 * independent of the flash geometry (buswidth, interleave, etc.)
13 * - scalability vs code size is completely set at compile-time
14 * (see include/linux/mtd/cfi.h for selection)
15 * - optimized write buffer method
16 */
17
18 #include <linux/module.h>
19 #include <linux/types.h>
20 #include <linux/kernel.h>
21 #include <linux/sched.h>
22 #include <asm/io.h>
23 #include <asm/byteorder.h>
24
25 #include <linux/errno.h>
26 #include <linux/slab.h>
27 #include <linux/delay.h>
28 #include <linux/mtd/map.h>
29 #include <linux/mtd/cfi.h>
30 #include <linux/mtd/compatmac.h>
31
32 static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
33 static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
34 static int cfi_intelext_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
35 static int cfi_intelext_erase_varsize(struct mtd_info *, struct erase_info *);
36 static void cfi_intelext_sync (struct mtd_info *);
37 static int cfi_intelext_lock(struct mtd_info *mtd, loff_t ofs, size_t len);
38 static int cfi_intelext_unlock(struct mtd_info *mtd, loff_t ofs, size_t len);
39 static int cfi_intelext_suspend (struct mtd_info *);
40 static void cfi_intelext_resume (struct mtd_info *);
41
42 static void cfi_intelext_destroy(struct mtd_info *);
43
44 void cfi_cmdset_0001(struct map_info *, int, unsigned long);
45
46 static struct mtd_info *cfi_intelext_setup (struct map_info *);
47
48 static struct mtd_chip_driver cfi_intelext_chipdrv = {
49 probe: cfi_intelext_setup,
50 destroy: cfi_intelext_destroy,
51 name: "cfi_intel",
52 module: THIS_MODULE
53 };
54
55 /* #define DEBUG_LOCK_BITS */
56
57 /* This routine is made available to other mtd code via
58 * inter_module_register. It must only be accessed through
59 * inter_module_get which will bump the use count of this module. The
60 * addresses passed back in cfi are valid as long as the use count of
61 * this module is non-zero, i.e. between inter_module_get and
62 * inter_module_put. Keith Owens <kaos@ocs.com.au> 29 Oct 2000.
63 */
64 void cfi_cmdset_0001(struct map_info *map, int primary, unsigned long base)
65 {
66 struct cfi_private *cfi = map->fldrv_priv;
67 int i;
68 struct cfi_pri_intelext *extp;
69 int ofs_factor = cfi->interleave * cfi->device_type;
70
71 __u16 adr = primary?cfi->cfiq->P_ADR:cfi->cfiq->A_ADR;
72
73 //printk(" Intel/Sharp Extended Query Table at 0x%4.4X\n", adr);
74
75 if (!adr)
76 return;
77
78 /* Switch it into Query Mode */
79 switch(CFIDEV_BUSWIDTH) {
80 case 1:
81 map->write8(map, 0x98, 0x55);
82 break;
83 case 2:
84 map->write16(map, 0x9898, 0xaa);
85 break;
86 case 4:
87 map->write32(map, 0x98989898, 0x154);
88 break;
89 }
90
91 extp = kmalloc(sizeof(*extp), GFP_KERNEL);
92 if (!extp) {
93 printk("Failed to allocate memory\n");
94 return;
95 }
96
97 /* Read in the Extended Query Table */
98 for (i=0; i<sizeof(*extp); i++) {
99 ((unsigned char *)extp)[i] =
100 cfi_read_query(map, (base+((adr+i)*cfi->interleave*cfi->device_type)));
101 }
102
103 if (extp->MajorVersion != '1' ||
104 (extp->MinorVersion < '0' || extp->MinorVersion > '2')) {
105 printk(" Unknown IntelExt Extended Query version %c.%c.\n",
106 extp->MajorVersion, extp->MinorVersion);
107 kfree(extp);
108 return;
109 }
110
111 /* Do some byteswapping if necessary */
112 extp->FeatureSupport = cfi32_to_cpu(extp->FeatureSupport);
113 extp->BlkStatusRegMask = cfi32_to_cpu(extp->BlkStatusRegMask);
114
115
116 /* Tell the user about it in lots of lovely detail */
117 #if 0
118 printk(" Feature/Command Support: %4.4X\n", extp->FeatureSupport);
119 printk(" - Chip Erase: %s\n", extp->FeatureSupport&1?"supported":"unsupported");
120 printk(" - Suspend Erase: %s\n", extp->FeatureSupport&2?"supported":"unsupported");
121 printk(" - Suspend Program: %s\n", extp->FeatureSupport&4?"supported":"unsupported");
122 printk(" - Legacy Lock/Unlock: %s\n", extp->FeatureSupport&8?"supported":"unsupported");
123 printk(" - Queued Erase: %s\n", extp->FeatureSupport&16?"supported":"unsupported");
124 printk(" - Instant block lock: %s\n", extp->FeatureSupport&32?"supported":"unsupported");
125 printk(" - Protection Bits: %s\n", extp->FeatureSupport&64?"supported":"unsupported");
126 printk(" - Page-mode read: %s\n", extp->FeatureSupport&128?"supported":"unsupported");
127 printk(" - Synchronous read: %s\n", extp->FeatureSupport&256?"supported":"unsupported");
128 for (i=9; i<32; i++) {
129 if (extp->FeatureSupport & (1<<i))
130 printk(" - Unknown Bit %X: supported\n", i);
131 }
132
133 printk(" Supported functions after Suspend: %2.2X\n", extp->SuspendCmdSupport);
134 printk(" - Program after Erase Suspend: %s\n", extp->SuspendCmdSupport&1?"supported":"unsupported");
135 for (i=1; i<8; i++) {
136 if (extp->SuspendCmdSupport & (1<<i))
137 printk(" - Unknown Bit %X: supported\n", i);
138 }
139
140 printk(" Block Status Register Mask: %4.4X\n", extp->BlkStatusRegMask);
141 printk(" - Lock Bit Active: %s\n", extp->BlkStatusRegMask&1?"yes":"no");
142 printk(" - Valid Bit Active: %s\n", extp->BlkStatusRegMask&2?"yes":"no");
143 for (i=2; i<16; i++) {
144 if (extp->BlkStatusRegMask & (1<<i))
145 printk(" - Unknown Bit %X Active: yes\n",i);
146 }
147
148 printk(" Vcc Logic Supply Optimum Program/Erase Voltage: %d.%d V\n",
149 extp->VccOptimal >> 8, extp->VccOptimal & 0xf);
150 if (extp->VppOptimal)
151 printk(" Vpp Programming Supply Optimum Program/Erase Voltage: %d.%d V\n",
152 extp->VppOptimal >> 8, extp->VppOptimal & 0xf);
153 #endif
154 /* OK. We like it. Take over the control of it. */
155
156 /* Switch it into Read Mode */
157 switch(CFIDEV_BUSWIDTH) {
158 case 1:
159 map->write8(map, 0xff, 0x55);
160 break;
161 case 2:
162 map->write16(map, 0xffff, 0xaa);
163 break;
164 case 4:
165 map->write32(map, 0xffffffff, 0x154);
166 break;
167 }
168
169
170 /* If there was an old setup function, decrease its use count */
171 if (map->fldrv)
172 if(map->fldrv->module)
173 __MOD_DEC_USE_COUNT(map->fldrv->module);
174
175 if (cfi->cmdset_priv)
176 kfree(cfi->cmdset_priv);
177
178 for (i=0; i< cfi->numchips; i++) {
179 cfi->chips[i].word_write_time = 128;
180 cfi->chips[i].buffer_write_time = 128;
181 cfi->chips[i].erase_time = 1024;
182 }
183
184
185 map->fldrv = &cfi_intelext_chipdrv;
186 MOD_INC_USE_COUNT;
187
188 cfi->cmdset_priv = extp;
189
190 #if 1 /* Does this work? */
191 cfi_send_gen_cmd(0x90, 0x55, base, map, cfi, cfi->device_type, NULL);
192
193 cfi->mfr = cfi_read_query(map, base);
194 cfi->id = cfi_read_query(map, base + ofs_factor);
195
196 printk("JEDEC ID: %2.2X %2.2X\n", cfi->mfr, cfi->id);
197 #endif
198
199 cfi_send_gen_cmd(0xff, 0x55, 0, map, cfi, cfi->device_type, NULL);
200 return;
201 }
202
203 static struct mtd_info *cfi_intelext_setup(struct map_info *map)
204 {
205 struct cfi_private *cfi = map->fldrv_priv;
206 struct mtd_info *mtd;
207 unsigned long offset = 0;
208 int i,j;
209 unsigned long devsize = (1<<cfi->cfiq->DevSize) * cfi->interleave;
210
211 mtd = kmalloc(sizeof(*mtd), GFP_KERNEL);
212 //printk("number of CFI chips: %d\n", cfi->numchips);
213
214 if (!mtd) {
215 printk("Failed to allocate memory for MTD device\n");
216 kfree(cfi->cmdset_priv);
217 return NULL;
218 }
219
220 memset(mtd, 0, sizeof(*mtd));
221 mtd->priv = map;
222 mtd->type = MTD_NORFLASH;
223 mtd->size = devsize * cfi->numchips;
224
225 mtd->numeraseregions = cfi->cfiq->NumEraseRegions * cfi->numchips;
226 mtd->eraseregions = kmalloc(sizeof(struct mtd_erase_region_info)
227 * mtd->numeraseregions, GFP_KERNEL);
228 if (!mtd->eraseregions) {
229 printk("Failed to allocate memory for MTD erase region info\n");
230 kfree(cfi->cmdset_priv);
231 return NULL;
232 }
233
234 for (i=0; i<cfi->cfiq->NumEraseRegions; i++) {
235 unsigned long ernum, ersize;
236 ersize = ((cfi->cfiq->EraseRegionInfo[i] >> 8) & ~0xff) * cfi->interleave;
237 ernum = (cfi->cfiq->EraseRegionInfo[i] & 0xffff) + 1;
238
239 if (mtd->erasesize < ersize) {
240 mtd->erasesize = ersize;
241 }
242 for (j=0; j<cfi->numchips; j++) {
243 mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].offset = (j*devsize)+offset;
244 mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].erasesize = ersize;
245 mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].numblocks = ernum;
246 }
247 offset += (ersize * ernum);
248 }
249
250 if (offset != devsize) {
251 /* Argh */
252 printk("Sum of regions (%lx) != total size of set of interleaved chips (%lx)\n", offset, devsize);
253 kfree(mtd->eraseregions);
254 kfree(cfi->cmdset_priv);
255 return NULL;
256 }
257
258 for (i=0; i<mtd->numeraseregions;i++){
259 printk("%d: offset=0x%x,size=0x%x,blocks=%d\n",
260 i,mtd->eraseregions[i].offset,
261 mtd->eraseregions[i].erasesize,
262 mtd->eraseregions[i].numblocks);
263 }
264
265 /* Also select the correct geometry setup too */
266 mtd->erase = cfi_intelext_erase_varsize;
267 mtd->read = cfi_intelext_read;
268 if ( cfi->cfiq->BufWriteTimeoutTyp ) {
269 //printk( KERN_INFO"Using buffer write method\n" );
270 mtd->write = cfi_intelext_write_buffers;
271 } else {
272 //printk( KERN_INFO"Using word write method\n" );
273 mtd->write = cfi_intelext_write_words;
274 }
275 mtd->sync = cfi_intelext_sync;
276 mtd->lock = cfi_intelext_lock;
277 mtd->unlock = cfi_intelext_unlock;
278 mtd->suspend = cfi_intelext_suspend;
279 mtd->resume = cfi_intelext_resume;
280 mtd->flags = MTD_CAP_NORFLASH;
281 map->fldrv = &cfi_intelext_chipdrv;
282 MOD_INC_USE_COUNT;
283 mtd->name = map->name;
284 return mtd;
285 }
286
287
288 static inline int do_read_onechip(struct map_info *map, struct flchip *chip, loff_t adr, size_t len, u_char *buf)
289 {
290 __u32 status, status_OK;
291 unsigned long timeo;
292 DECLARE_WAITQUEUE(wait, current);
293 int suspended = 0;
294 unsigned long cmd_addr;
295 struct cfi_private *cfi = map->fldrv_priv;
296
297 adr += chip->start;
298
299 /* Ensure cmd read/writes are aligned. */
300 cmd_addr = adr & ~(CFIDEV_BUSWIDTH-1);
301
302 /* Let's determine this according to the interleave only once */
303 status_OK = CMD(0x80);
304
305 timeo = jiffies + HZ;
306 retry:
307 spin_lock_bh(chip->mutex);
308
309 /* Check that the chip's ready to talk to us.
310 * If it's in FL_ERASING state, suspend it and make it talk now.
311 */
312 switch (chip->state) {
313 case FL_ERASING:
314 cfi_write (map, CMD(0xb0), cmd_addr);
315 chip->oldstate = FL_ERASING;
316 chip->state = FL_ERASE_SUSPENDING;
317 // printk("Erase suspending at 0x%lx\n", cmd_addr);
318 for (;;) {
319 status = cfi_read(map, cmd_addr);
320 if ((status & status_OK) == status_OK)
321 break;
322
323 if (time_after(jiffies, timeo)) {
324 /* Urgh */
325 cfi_write(map, CMD(0xd0), cmd_addr);
326 chip->state = FL_ERASING;
327 spin_unlock_bh(chip->mutex);
328 printk("Chip not ready after erase suspended\n");
329 return -EIO;
330 }
331
332 spin_unlock_bh(chip->mutex);
333 cfi_udelay(1);
334 spin_lock_bh(chip->mutex);
335 }
336
337 suspended = 1;
338 cfi_write(map, CMD(0xff), cmd_addr);
339 chip->state = FL_READY;
340 break;
341
342 #if 0
343 case FL_WRITING:
344 /* Not quite yet */
345 #endif
346
347 case FL_READY:
348 break;
349
350 case FL_CFI_QUERY:
351 case FL_JEDEC_QUERY:
352 cfi_write(map, CMD(0x70), cmd_addr);
353 chip->state = FL_STATUS;
354
355 case FL_STATUS:
356 status = cfi_read(map, cmd_addr);
357 if ((status & status_OK) == status_OK) {
358 cfi_write(map, CMD(0xff), cmd_addr);
359 chip->state = FL_READY;
360 break;
361 }
362
363 /* Urgh. Chip not yet ready to talk to us. */
364 if (time_after(jiffies, timeo)) {
365 spin_unlock_bh(chip->mutex);
366 printk("waiting for chip to be ready timed out in read. WSM status = %x\n", status);
367 return -EIO;
368 }
369
370 /* Latency issues. Drop the lock, wait a while and retry */
371 spin_unlock_bh(chip->mutex);
372 cfi_udelay(1);
373 goto retry;
374
375 default:
376 /* Stick ourselves on a wait queue to be woken when
377 someone changes the status */
378 set_current_state(TASK_UNINTERRUPTIBLE);
379 add_wait_queue(&chip->wq, &wait);
380 spin_unlock_bh(chip->mutex);
381 schedule();
382 remove_wait_queue(&chip->wq, &wait);
383 timeo = jiffies + HZ;
384 goto retry;
385 }
386
387 map->copy_from(map, buf, adr, len);
388
389 if (suspended) {
390 chip->state = chip->oldstate;
391 /* What if one interleaved chip has finished and the
392 other hasn't? The old code would leave the finished
393 one in READY mode. That's bad, and caused -EROFS
394 errors to be returned from do_erase_oneblock because
395 that's the only bit it checked for at the time.
396 As the state machine appears to explicitly allow
397 sending the 0x70 (Read Status) command to an erasing
398 chip and expecting it to be ignored, that's what we
399 do. */
400 cfi_write(map, CMD(0xd0), cmd_addr);
401 cfi_write(map, CMD(0x70), cmd_addr);
402 }
403
404 wake_up(&chip->wq);
405 spin_unlock_bh(chip->mutex);
406 return 0;
407 }
408
409 static int cfi_intelext_read (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
410 {
411 struct map_info *map = mtd->priv;
412 struct cfi_private *cfi = map->fldrv_priv;
413 unsigned long ofs;
414 int chipnum;
415 int ret = 0;
416
417 /* ofs: offset within the first chip that the first read should start */
418 chipnum = (from >> cfi->chipshift);
419 ofs = from - (chipnum << cfi->chipshift);
420
421 *retlen = 0;
422
423 while (len) {
424 unsigned long thislen;
425
426 if (chipnum >= cfi->numchips)
427 break;
428
429 if ((len + ofs -1) >> cfi->chipshift)
430 thislen = (1<<cfi->chipshift) - ofs;
431 else
432 thislen = len;
433
434 ret = do_read_onechip(map, &cfi->chips[chipnum], ofs, thislen, buf);
435 if (ret)
436 break;
437
438 *retlen += thislen;
439 len -= thislen;
440 buf += thislen;
441
442 ofs = 0;
443 chipnum++;
444 }
445 return ret;
446 }
447
448 static int do_write_oneword(struct map_info *map, struct flchip *chip, unsigned long adr, __u32 datum)
449 {
450 struct cfi_private *cfi = map->fldrv_priv;
451 __u32 status, status_OK;
452 unsigned long timeo;
453 DECLARE_WAITQUEUE(wait, current);
454 int z;
455
456 adr += chip->start;
457
458 /* Let's determine this according to the interleave only once */
459 status_OK = CMD(0x80);
460
461 timeo = jiffies + HZ;
462 retry:
463 spin_lock_bh(chip->mutex);
464
465 /* Check that the chip's ready to talk to us.
466 * Later, we can actually think about interrupting it
467 * if it's in FL_ERASING state.
468 * Not just yet, though.
469 */
470 switch (chip->state) {
471 case FL_READY:
472 break;
473
474 case FL_CFI_QUERY:
475 case FL_JEDEC_QUERY:
476 cfi_write(map, CMD(0x70), adr);
477 chip->state = FL_STATUS;
478
479 case FL_STATUS:
480 status = cfi_read(map, adr);
481 if ((status & status_OK) == status_OK)
482 break;
483
484 /* Urgh. Chip not yet ready to talk to us. */
485 if (time_after(jiffies, timeo)) {
486 spin_unlock_bh(chip->mutex);
487 printk("waiting for chip to be ready timed out in read\n");
488 return -EIO;
489 }
490
491 /* Latency issues. Drop the lock, wait a while and retry */
492 spin_unlock_bh(chip->mutex);
493 cfi_udelay(1);
494 goto retry;
495
496 default:
497 /* Stick ourselves on a wait queue to be woken when
498 someone changes the status */
499 set_current_state(TASK_UNINTERRUPTIBLE);
500 add_wait_queue(&chip->wq, &wait);
501 spin_unlock_bh(chip->mutex);
502 schedule();
503 remove_wait_queue(&chip->wq, &wait);
504 timeo = jiffies + HZ;
505 goto retry;
506 }
507
508 ENABLE_VPP(map);
509 cfi_write(map, CMD(0x40), adr);
510 cfi_write(map, datum, adr);
511 chip->state = FL_WRITING;
512
513 spin_unlock_bh(chip->mutex);
514 cfi_udelay(chip->word_write_time);
515 spin_lock_bh(chip->mutex);
516
517 timeo = jiffies + (HZ/2);
518 z = 0;
519 for (;;) {
520 if (chip->state != FL_WRITING) {
521 /* Someone's suspended the write. Sleep */
522 set_current_state(TASK_UNINTERRUPTIBLE);
523 add_wait_queue(&chip->wq, &wait);
524 spin_unlock_bh(chip->mutex);
525 schedule();
526 remove_wait_queue(&chip->wq, &wait);
527 timeo = jiffies + (HZ / 2); /* FIXME */
528 spin_lock_bh(chip->mutex);
529 continue;
530 }
531
532 status = cfi_read(map, adr);
533 if ((status & status_OK) == status_OK)
534 break;
535
536 /* OK Still waiting */
537 if (time_after(jiffies, timeo)) {
538 chip->state = FL_STATUS;
539 DISABLE_VPP(map);
540 spin_unlock_bh(chip->mutex);
541 printk("waiting for chip to be ready timed out in word write\n");
542 return -EIO;
543 }
544
545 /* Latency issues. Drop the lock, wait a while and retry */
546 spin_unlock_bh(chip->mutex);
547 z++;
548 cfi_udelay(1);
549 spin_lock_bh(chip->mutex);
550 }
551 if (!z) {
552 chip->word_write_time--;
553 if (!chip->word_write_time)
554 chip->word_write_time++;
555 }
556 if (z > 1)
557 chip->word_write_time++;
558
559 /* Done and happy. */
560 DISABLE_VPP(map);
561 chip->state = FL_STATUS;
562 /* check for lock bit */
563 if (status & CMD(0x02)) {
564 /* clear status */
565 cfi_write(map, CMD(0x50), adr);
566 /* put back into read status register mode */
567 cfi_write(map, CMD(0x70), adr);
568 wake_up(&chip->wq);
569 spin_unlock_bh(chip->mutex);
570 return -EROFS;
571 }
572 wake_up(&chip->wq);
573 spin_unlock_bh(chip->mutex);
574 return 0;
575 }
576
577
578 static int cfi_intelext_write_words (struct mtd_info *mtd, loff_t to , size_t len, size_t *retlen, const u_char *buf)
579 {
580 struct map_info *map = mtd->priv;
581 struct cfi_private *cfi = map->fldrv_priv;
582 int ret = 0;
583 int chipnum;
584 unsigned long ofs;
585
586 *retlen = 0;
587 if (!len)
588 return 0;
589
590 chipnum = to >> cfi->chipshift;
591 ofs = to - (chipnum << cfi->chipshift);
592
593 /* If it's not bus-aligned, do the first byte write */
594 if (ofs & (CFIDEV_BUSWIDTH-1)) {
595 unsigned long bus_ofs = ofs & ~(CFIDEV_BUSWIDTH-1);
596 int gap = ofs - bus_ofs;
597 int i = 0, n = 0;
598 u_char tmp_buf[4];
599 __u32 datum;
600
601 while (gap--)
602 tmp_buf[i++] = 0xff;
603 while (len && i < CFIDEV_BUSWIDTH)
604 tmp_buf[i++] = buf[n++], len--;
605 while (i < CFIDEV_BUSWIDTH)
606 tmp_buf[i++] = 0xff;
607
608 if (cfi_buswidth_is_2()) {
609 datum = *(__u16*)tmp_buf;
610 } else if (cfi_buswidth_is_4()) {
611 datum = *(__u32*)tmp_buf;
612 } else {
613 return -EINVAL; /* should never happen, but be safe */
614 }
615
616 ret = do_write_oneword(map, &cfi->chips[chipnum],
617 bus_ofs, datum);
618 if (ret)
619 return ret;
620
621 ofs += n;
622 buf += n;
623 (*retlen) += n;
624
625 if (ofs >> cfi->chipshift) {
626 chipnum ++;
627 ofs = 0;
628 if (chipnum == cfi->numchips)
629 return 0;
630 }
631 }
632
633 while(len >= CFIDEV_BUSWIDTH) {
634 __u32 datum;
635
636 if (cfi_buswidth_is_1()) {
637 datum = *(__u8*)buf;
638 } else if (cfi_buswidth_is_2()) {
639 datum = *(__u16*)buf;
640 } else if (cfi_buswidth_is_4()) {
641 datum = *(__u32*)buf;
642 } else {
643 return -EINVAL;
644 }
645
646 ret = do_write_oneword(map, &cfi->chips[chipnum],
647 ofs, datum);
648 if (ret)
649 return ret;
650
651 ofs += CFIDEV_BUSWIDTH;
652 buf += CFIDEV_BUSWIDTH;
653 (*retlen) += CFIDEV_BUSWIDTH;
654 len -= CFIDEV_BUSWIDTH;
655
656 if (ofs >> cfi->chipshift) {
657 chipnum ++;
658 ofs = 0;
659 if (chipnum == cfi->numchips)
660 return 0;
661 }
662 }
663
664 if (len & (CFIDEV_BUSWIDTH-1)) {
665 int i = 0, n = 0;
666 u_char tmp_buf[4];
667 __u32 datum;
668
669 while (len--)
670 tmp_buf[i++] = buf[n++];
671 while (i < CFIDEV_BUSWIDTH)
672 tmp_buf[i++] = 0xff;
673
674 if (cfi_buswidth_is_2()) {
675 datum = *(__u16*)tmp_buf;
676 } else if (cfi_buswidth_is_4()) {
677 datum = *(__u32*)tmp_buf;
678 } else {
679 return -EINVAL; /* should never happen, but be safe */
680 }
681
682 ret = do_write_oneword(map, &cfi->chips[chipnum],
683 ofs, datum);
684 if (ret)
685 return ret;
686
687 (*retlen) += n;
688 }
689
690 return 0;
691 }
692
693
694 static inline int do_write_buffer(struct map_info *map, struct flchip *chip,
695 unsigned long adr, const u_char *buf, int len)
696 {
697 struct cfi_private *cfi = map->fldrv_priv;
698 __u32 status, status_OK;
699 unsigned long cmd_adr, timeo;
700 DECLARE_WAITQUEUE(wait, current);
701 int wbufsize, z;
702
703 wbufsize = CFIDEV_INTERLEAVE << cfi->cfiq->MaxBufWriteSize;
704 adr += chip->start;
705 cmd_adr = adr & ~(wbufsize-1);
706
707 /* Let's determine this according to the interleave only once */
708 status_OK = CMD(0x80);
709
710 timeo = jiffies + HZ;
711 retry:
712 spin_lock_bh(chip->mutex);
713
714 /* Check that the chip's ready to talk to us.
715 * Later, we can actually think about interrupting it
716 * if it's in FL_ERASING state.
717 * Not just yet, though.
718 */
719 switch (chip->state) {
720 case FL_READY:
721 break;
722
723 case FL_CFI_QUERY:
724 case FL_JEDEC_QUERY:
725 cfi_write(map, CMD(0x70), cmd_adr);
726 chip->state = FL_STATUS;
727
728 case FL_STATUS:
729 status = cfi_read(map, cmd_adr);
730 if ((status & status_OK) == status_OK)
731 break;
732 /* Urgh. Chip not yet ready to talk to us. */
733 if (time_after(jiffies, timeo)) {
734 spin_unlock_bh(chip->mutex);
735 printk("waiting for chip to be ready timed out in buffer write\n");
736 return -EIO;
737 }
738
739 /* Latency issues. Drop the lock, wait a while and retry */
740 spin_unlock_bh(chip->mutex);
741 cfi_udelay(1);
742 goto retry;
743
744 default:
745 /* Stick ourselves on a wait queue to be woken when
746 someone changes the status */
747 set_current_state(TASK_UNINTERRUPTIBLE);
748 add_wait_queue(&chip->wq, &wait);
749 spin_unlock_bh(chip->mutex);
750 schedule();
751 remove_wait_queue(&chip->wq, &wait);
752 timeo = jiffies + HZ;
753 goto retry;
754 }
755
756 ENABLE_VPP(map);
757 cfi_write(map, CMD(0xe8), cmd_adr);
758 chip->state = FL_WRITING_TO_BUFFER;
759
760 z = 0;
761 for (;;) {
762 status = cfi_read(map, cmd_adr);
763 if ((status & status_OK) == status_OK)
764 break;
765
766 spin_unlock_bh(chip->mutex);
767 cfi_udelay(1);
768 spin_lock_bh(chip->mutex);
769
770 if (++z > 20) {
771 /* Argh. Not ready for write to buffer */
772 cfi_write(map, CMD(0x70), cmd_adr);
773 chip->state = FL_STATUS;
774 DISABLE_VPP(map);
775 spin_unlock_bh(chip->mutex);
776 printk("Chip not ready for buffer write. Xstatus = %x, status = %x\n", status, cfi_read(map, cmd_adr));
777 return -EIO;
778 }
779 }
780
781 /* Write length of data to come */
782 cfi_write(map, CMD(len/CFIDEV_BUSWIDTH-1), cmd_adr );
783
784 /* Write data */
785 for (z = 0; z < len; z += CFIDEV_BUSWIDTH) {
786 if (cfi_buswidth_is_1()) {
787 map->write8 (map, *((__u8*)buf)++, adr+z);
788 } else if (cfi_buswidth_is_2()) {
789 map->write16 (map, *((__u16*)buf)++, adr+z);
790 } else if (cfi_buswidth_is_4()) {
791 map->write32 (map, *((__u32*)buf)++, adr+z);
792 } else {
793 DISABLE_VPP(map);
794 return -EINVAL;
795 }
796 }
797 /* GO GO GO */
798 cfi_write(map, CMD(0xd0), cmd_adr);
799 chip->state = FL_WRITING;
800
801 spin_unlock_bh(chip->mutex);
802 cfi_udelay(chip->buffer_write_time);
803 spin_lock_bh(chip->mutex);
804
805 timeo = jiffies + (HZ/2);
806 z = 0;
807 for (;;) {
808 if (chip->state != FL_WRITING) {
809 /* Someone's suspended the write. Sleep */
810 set_current_state(TASK_UNINTERRUPTIBLE);
811 add_wait_queue(&chip->wq, &wait);
812 spin_unlock_bh(chip->mutex);
813 schedule();
814 remove_wait_queue(&chip->wq, &wait);
815 timeo = jiffies + (HZ / 2); /* FIXME */
816 spin_lock_bh(chip->mutex);
817 continue;
818 }
819
820 status = cfi_read(map, cmd_adr);
821 if ((status & status_OK) == status_OK)
822 break;
823
824 /* OK Still waiting */
825 if (time_after(jiffies, timeo)) {
826 chip->state = FL_STATUS;
827 DISABLE_VPP(map);
828 spin_unlock_bh(chip->mutex);
829 printk("waiting for chip to be ready timed out in bufwrite\n");
830 return -EIO;
831 }
832
833 /* Latency issues. Drop the lock, wait a while and retry */
834 spin_unlock_bh(chip->mutex);
835 cfi_udelay(1);
836 z++;
837 spin_lock_bh(chip->mutex);
838 }
839 if (!z) {
840 chip->buffer_write_time--;
841 if (!chip->buffer_write_time)
842 chip->buffer_write_time++;
843 }
844 if (z > 1)
845 chip->buffer_write_time++;
846
847 /* Done and happy. */
848 DISABLE_VPP(map);
849 chip->state = FL_STATUS;
850 /* check for lock bit */
851 if (status & CMD(0x02)) {
852 /* clear status */
853 cfi_write(map, CMD(0x50), cmd_adr);
854 /* put back into read status register mode */
855 cfi_write(map, CMD(0x70), adr);
856 wake_up(&chip->wq);
857 spin_unlock_bh(chip->mutex);
858 return -EROFS;
859 }
860 wake_up(&chip->wq);
861 spin_unlock_bh(chip->mutex);
862 return 0;
863 }
864
865 static int cfi_intelext_write_buffers (struct mtd_info *mtd, loff_t to,
866 size_t len, size_t *retlen, const u_char *buf)
867 {
868 struct map_info *map = mtd->priv;
869 struct cfi_private *cfi = map->fldrv_priv;
870 int wbufsize = CFIDEV_INTERLEAVE << cfi->cfiq->MaxBufWriteSize;
871 int ret = 0;
872 int chipnum;
873 unsigned long ofs;
874
875 *retlen = 0;
876 if (!len)
877 return 0;
878
879 chipnum = to >> cfi->chipshift;
880 ofs = to - (chipnum << cfi->chipshift);
881
882 /* If it's not bus-aligned, do the first word write */
883 if (ofs & (CFIDEV_BUSWIDTH-1)) {
884 size_t local_len = (-ofs)&(CFIDEV_BUSWIDTH-1);
885 if (local_len > len)
886 local_len = len;
887 ret = cfi_intelext_write_words(mtd, to, local_len,
888 retlen, buf);
889 if (ret)
890 return ret;
891 ofs += local_len;
892 buf += local_len;
893 len -= local_len;
894
895 if (ofs >> cfi->chipshift) {
896 chipnum ++;
897 ofs = 0;
898 if (chipnum == cfi->numchips)
899 return 0;
900 }
901 }
902
903 /* Write buffer is worth it only if more than one word to write... */
904 while(len > CFIDEV_BUSWIDTH) {
905 /* We must not cross write block boundaries */
906 int size = wbufsize - (ofs & (wbufsize-1));
907
908 if (size > len)
909 size = len & ~(CFIDEV_BUSWIDTH-1);
910 ret = do_write_buffer(map, &cfi->chips[chipnum],
911 ofs, buf, size);
912 if (ret)
913 return ret;
914
915 ofs += size;
916 buf += size;
917 (*retlen) += size;
918 len -= size;
919
920 if (ofs >> cfi->chipshift) {
921 chipnum ++;
922 ofs = 0;
923 if (chipnum == cfi->numchips)
924 return 0;
925 }
926 }
927
928 /* ... and write the remaining bytes */
929 if (len > 0) {
930 size_t local_retlen;
931 ret = cfi_intelext_write_words(mtd, ofs + (chipnum << cfi->chipshift),
932 len, &local_retlen, buf);
933 if (ret)
934 return ret;
935 (*retlen) += local_retlen;
936 }
937
938 return 0;
939 }
940
941
942 static inline int do_erase_oneblock(struct map_info *map, struct flchip *chip, unsigned long adr)
943 {
944 struct cfi_private *cfi = map->fldrv_priv;
945 __u32 status, status_OK;
946 unsigned long timeo;
947 int retries = 3;
948 DECLARE_WAITQUEUE(wait, current);
949 int ret = 0;
950
951 adr += chip->start;
952
953 /* Let's determine this according to the interleave only once */
954 status_OK = CMD(0x80);
955
956 timeo = jiffies + HZ;
957 retry:
958 spin_lock_bh(chip->mutex);
959
960 /* Check that the chip's ready to talk to us. */
961 switch (chip->state) {
962 case FL_CFI_QUERY:
963 case FL_JEDEC_QUERY:
964 case FL_READY:
965 cfi_write(map, CMD(0x70), adr);
966 chip->state = FL_STATUS;
967
968 case FL_STATUS:
969 status = cfi_read(map, adr);
970 if ((status & status_OK) == status_OK)
971 break;
972
973 /* Urgh. Chip not yet ready to talk to us. */
974 if (time_after(jiffies, timeo)) {
975 spin_unlock_bh(chip->mutex);
976 printk("waiting for chip to be ready timed out in erase\n");
977 return -EIO;
978 }
979
980 /* Latency issues. Drop the lock, wait a while and retry */
981 spin_unlock_bh(chip->mutex);
982 cfi_udelay(1);
983 goto retry;
984
985 default:
986 /* Stick ourselves on a wait queue to be woken when
987 someone changes the status */
988 set_current_state(TASK_UNINTERRUPTIBLE);
989 add_wait_queue(&chip->wq, &wait);
990 spin_unlock_bh(chip->mutex);
991 schedule();
992 remove_wait_queue(&chip->wq, &wait);
993 timeo = jiffies + HZ;
994 goto retry;
995 }
996
997 ENABLE_VPP(map);
998 /* Clear the status register first */
999 cfi_write(map, CMD(0x50), adr);
1000
1001 /* Now erase */
1002 cfi_write(map, CMD(0x20), adr);
1003 cfi_write(map, CMD(0xD0), adr);
1004 chip->state = FL_ERASING;
1005
1006 spin_unlock_bh(chip->mutex);
1007 schedule_timeout(HZ);
1008 spin_lock_bh(chip->mutex);
1009
1010 /* FIXME. Use a timer to check this, and return immediately. */
1011 /* Once the state machine's known to be working I'll do that */
1012
1013 timeo = jiffies + (HZ*20);
1014 for (;;) {
1015 if (chip->state != FL_ERASING) {
1016 /* Someone's suspended the erase. Sleep */
1017 set_current_state(TASK_UNINTERRUPTIBLE);
1018 add_wait_queue(&chip->wq, &wait);
1019 spin_unlock_bh(chip->mutex);
1020 schedule();
1021 remove_wait_queue(&chip->wq, &wait);
1022 timeo = jiffies + (HZ*2); /* FIXME */
1023 spin_lock_bh(chip->mutex);
1024 continue;
1025 }
1026
1027 status = cfi_read(map, adr);
1028 if ((status & status_OK) == status_OK)
1029 break;
1030
1031 /* OK Still waiting */
1032 if (time_after(jiffies, timeo)) {
1033 cfi_write(map, CMD(0x70), adr);
1034 chip->state = FL_STATUS;
1035 printk("waiting for erase to complete timed out. Xstatus = %x, status = %x.\n", status, cfi_read(map, adr));
1036 DISABLE_VPP(map);
1037 spin_unlock_bh(chip->mutex);
1038 return -EIO;
1039 }
1040
1041 /* Latency issues. Drop the lock, wait a while and retry */
1042 spin_unlock_bh(chip->mutex);
1043 cfi_udelay(1);
1044 spin_lock_bh(chip->mutex);
1045 }
1046
1047 DISABLE_VPP(map);
1048 ret = 0;
1049
1050 /* We've broken this before. It doesn't hurt to be safe */
1051 cfi_write(map, CMD(0x70), adr);
1052 chip->state = FL_STATUS;
1053 status = cfi_read(map, adr);
1054
1055 /* check for lock bit */
1056 if (status & CMD(0x3a)) {
1057 unsigned char chipstatus = status;
1058 if (status != CMD(status & 0xff)) {
1059 int i;
1060 for (i = 1; i<CFIDEV_INTERLEAVE; i++) {
1061 chipstatus |= status >> (cfi->device_type * 8);
1062 }
1063 printk(KERN_WARNING "Status is not identical for all chips: 0x%x. Merging to give 0x%02x\n", status, chipstatus);
1064 }
1065 /* Reset the error bits */
1066 cfi_write(map, CMD(0x50), adr);
1067 cfi_write(map, CMD(0x70), adr);
1068
1069 if ((chipstatus & 0x30) == 0x30) {
1070 printk(KERN_NOTICE "Chip reports improper command sequence: status 0x%x\n", status);
1071 ret = -EIO;
1072 } else if (chipstatus & 0x02) {
1073 /* Protection bit set */
1074 ret = -EROFS;
1075 } else if (chipstatus & 0x8) {
1076 /* Voltage */
1077 printk(KERN_WARNING "Chip reports voltage low on erase: status 0x%x\n", status);
1078 ret = -EIO;
1079 } else if (chipstatus & 0x20) {
1080 if (retries--) {
1081 printk(KERN_DEBUG "Chip erase failed at 0x%08lx: status 0x%x. Retrying...\n", adr, status);
1082 timeo = jiffies + HZ;
1083 chip->state = FL_STATUS;
1084 spin_unlock_bh(chip->mutex);
1085 goto retry;
1086 }
1087 printk(KERN_DEBUG "Chip erase failed at 0x%08lx: status 0x%x\n", adr, status);
1088 ret = -EIO;
1089 }
1090 }
1091
1092 wake_up(&chip->wq);
1093 spin_unlock_bh(chip->mutex);
1094 return ret;
1095 }
1096
1097 int cfi_intelext_erase_varsize(struct mtd_info *mtd, struct erase_info *instr)
1098 { struct map_info *map = mtd->priv;
1099 struct cfi_private *cfi = map->fldrv_priv;
1100 unsigned long adr, len;
1101 int chipnum, ret = 0;
1102 int i, first;
1103 struct mtd_erase_region_info *regions = mtd->eraseregions;
1104
1105 if (instr->addr > mtd->size)
1106 return -EINVAL;
1107
1108 if ((instr->len + instr->addr) > mtd->size)
1109 return -EINVAL;
1110
1111 /* Check that both start and end of the requested erase are
1112 * aligned with the erasesize at the appropriate addresses.
1113 */
1114
1115 i = 0;
1116
1117 /* Skip all erase regions which are ended before the start of
1118 the requested erase. Actually, to save on the calculations,
1119 we skip to the first erase region which starts after the
1120 start of the requested erase, and then go back one.
1121 */
1122
1123 while (i < mtd->numeraseregions && instr->addr >= regions[i].offset)
1124 i++;
1125 i--;
1126
1127 /* OK, now i is pointing at the erase region in which this
1128 erase request starts. Check the start of the requested
1129 erase range is aligned with the erase size which is in
1130 effect here.
1131 */
1132
1133 if (instr->addr & (regions[i].erasesize-1))
1134 return -EINVAL;
1135
1136 /* Remember the erase region we start on */
1137 first = i;
1138
1139 /* Next, check that the end of the requested erase is aligned
1140 * with the erase region at that address.
1141 */
1142
1143 while (i<mtd->numeraseregions && (instr->addr + instr->len) >= regions[i].offset)
1144 i++;
1145
1146 /* As before, drop back one to point at the region in which
1147 the address actually falls
1148 */
1149 i--;
1150
1151 if ((instr->addr + instr->len) & (regions[i].erasesize-1))
1152 return -EINVAL;
1153
1154 chipnum = instr->addr >> cfi->chipshift;
1155 adr = instr->addr - (chipnum << cfi->chipshift);
1156 len = instr->len;
1157
1158 i=first;
1159
1160 while(len) {
1161 ret = do_erase_oneblock(map, &cfi->chips[chipnum], adr);
1162
1163 if (ret)
1164 return ret;
1165
1166 adr += regions[i].erasesize;
1167 len -= regions[i].erasesize;
1168
1169 if (adr % (1<< cfi->chipshift) == ((regions[i].offset + (regions[i].erasesize * regions[i].numblocks)) %( 1<< cfi->chipshift)))
1170 i++;
1171
1172 if (adr >> cfi->chipshift) {
1173 adr = 0;
1174 chipnum++;
1175
1176 if (chipnum >= cfi->numchips)
1177 break;
1178 }
1179 }
1180
1181 instr->state = MTD_ERASE_DONE;
1182 if (instr->callback)
1183 instr->callback(instr);
1184
1185 return 0;
1186 }
1187
1188 static void cfi_intelext_sync (struct mtd_info *mtd)
1189 {
1190 struct map_info *map = mtd->priv;
1191 struct cfi_private *cfi = map->fldrv_priv;
1192 int i;
1193 struct flchip *chip;
1194 int ret = 0;
1195 DECLARE_WAITQUEUE(wait, current);
1196
1197 for (i=0; !ret && i<cfi->numchips; i++) {
1198 chip = &cfi->chips[i];
1199
1200 retry:
1201 spin_lock_bh(chip->mutex);
1202
1203 switch(chip->state) {
1204 case FL_READY:
1205 case FL_STATUS:
1206 case FL_CFI_QUERY:
1207 case FL_JEDEC_QUERY:
1208 chip->oldstate = chip->state;
1209 chip->state = FL_SYNCING;
1210 /* No need to wake_up() on this state change -
1211 * as the whole point is that nobody can do anything
1212 * with the chip now anyway.
1213 */
1214 case FL_SYNCING:
1215 spin_unlock_bh(chip->mutex);
1216 break;
1217
1218 default:
1219 /* Not an idle state */
1220 add_wait_queue(&chip->wq, &wait);
1221
1222 spin_unlock_bh(chip->mutex);
1223 schedule();
1224 remove_wait_queue(&chip->wq, &wait);
1225
1226 goto retry;
1227 }
1228 }
1229
1230 /* Unlock the chips again */
1231
1232 for (i--; i >=0; i--) {
1233 chip = &cfi->chips[i];
1234
1235 spin_lock_bh(chip->mutex);
1236
1237 if (chip->state == FL_SYNCING) {
1238 chip->state = chip->oldstate;
1239 wake_up(&chip->wq);
1240 }
1241 spin_unlock_bh(chip->mutex);
1242 }
1243 }
1244
1245 static inline int do_lock_oneblock(struct map_info *map, struct flchip *chip, unsigned long adr)
1246 {
1247 struct cfi_private *cfi = map->fldrv_priv;
1248 __u32 status, status_OK;
1249 unsigned long timeo = jiffies + HZ;
1250 DECLARE_WAITQUEUE(wait, current);
1251
1252 adr += chip->start;
1253
1254 /* Let's determine this according to the interleave only once */
1255 status_OK = CMD(0x80);
1256
1257 timeo = jiffies + HZ;
1258 retry:
1259 spin_lock_bh(chip->mutex);
1260
1261 /* Check that the chip's ready to talk to us. */
1262 switch (chip->state) {
1263 case FL_CFI_QUERY:
1264 case FL_JEDEC_QUERY:
1265 case FL_READY:
1266 cfi_write(map, CMD(0x70), adr);
1267 chip->state = FL_STATUS;
1268
1269 case FL_STATUS:
1270 status = cfi_read(map, adr);
1271 if ((status & status_OK) == status_OK)
1272 break;
1273
1274 /* Urgh. Chip not yet ready to talk to us. */
1275 if (time_after(jiffies, timeo)) {
1276 spin_unlock_bh(chip->mutex);
1277 printk("waiting for chip to be ready timed out in lock\n");
1278 return -EIO;
1279 }
1280
1281 /* Latency issues. Drop the lock, wait a while and retry */
1282 spin_unlock_bh(chip->mutex);
1283 cfi_udelay(1);
1284 goto retry;
1285
1286 default:
1287 /* Stick ourselves on a wait queue to be woken when
1288 someone changes the status */
1289 set_current_state(TASK_UNINTERRUPTIBLE);
1290 add_wait_queue(&chip->wq, &wait);
1291 spin_unlock_bh(chip->mutex);
1292 schedule();
1293 remove_wait_queue(&chip->wq, &wait);
1294 timeo = jiffies + HZ;
1295 goto retry;
1296 }
1297
1298 ENABLE_VPP(map);
1299 cfi_write(map, CMD(0x60), adr);
1300 cfi_write(map, CMD(0x01), adr);
1301 chip->state = FL_LOCKING;
1302
1303 spin_unlock_bh(chip->mutex);
1304 schedule_timeout(HZ);
1305 spin_lock_bh(chip->mutex);
1306
1307 /* FIXME. Use a timer to check this, and return immediately. */
1308 /* Once the state machine's known to be working I'll do that */
1309
1310 timeo = jiffies + (HZ*2);
1311 for (;;) {
1312
1313 status = cfi_read(map, adr);
1314 if ((status & status_OK) == status_OK)
1315 break;
1316
1317 /* OK Still waiting */
1318 if (time_after(jiffies, timeo)) {
1319 cfi_write(map, CMD(0x70), adr);
1320 chip->state = FL_STATUS;
1321 printk("waiting for lock to complete timed out. Xstatus = %x, status = %x.\n", status, cfi_read(map, adr));
1322 DISABLE_VPP(map);
1323 spin_unlock_bh(chip->mutex);
1324 return -EIO;
1325 }
1326
1327 /* Latency issues. Drop the lock, wait a while and retry */
1328 spin_unlock_bh(chip->mutex);
1329 cfi_udelay(1);
1330 spin_lock_bh(chip->mutex);
1331 }
1332
1333 /* Done and happy. */
1334 chip->state = FL_STATUS;
1335 DISABLE_VPP(map);
1336 wake_up(&chip->wq);
1337 spin_unlock_bh(chip->mutex);
1338 return 0;
1339 }
1340 static int cfi_intelext_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1341 {
1342 struct map_info *map = mtd->priv;
1343 struct cfi_private *cfi = map->fldrv_priv;
1344 unsigned long adr;
1345 int chipnum, ret = 0;
1346 #ifdef DEBUG_LOCK_BITS
1347 int ofs_factor = cfi->interleave * cfi->device_type;
1348 #endif
1349
1350 if (ofs & (mtd->erasesize - 1))
1351 return -EINVAL;
1352
1353 if (len & (mtd->erasesize -1))
1354 return -EINVAL;
1355
1356 if ((len + ofs) > mtd->size)
1357 return -EINVAL;
1358
1359 chipnum = ofs >> cfi->chipshift;
1360 adr = ofs - (chipnum << cfi->chipshift);
1361
1362 while(len) {
1363
1364 #ifdef DEBUG_LOCK_BITS
1365 cfi_send_gen_cmd(0x90, 0x55, 0, map, cfi, cfi->device_type, NULL);
1366 printk("before lock: block status register is %x\n",cfi_read_query(map, adr+(2*ofs_factor)));
1367 cfi_send_gen_cmd(0xff, 0x55, 0, map, cfi, cfi->device_type, NULL);
1368 #endif
1369
1370 ret = do_lock_oneblock(map, &cfi->chips[chipnum], adr);
1371
1372 #ifdef DEBUG_LOCK_BITS
1373 cfi_send_gen_cmd(0x90, 0x55, 0, map, cfi, cfi->device_type, NULL);
1374 printk("after lock: block status register is %x\n",cfi_read_query(map, adr+(2*ofs_factor)));
1375 cfi_send_gen_cmd(0xff, 0x55, 0, map, cfi, cfi->device_type, NULL);
1376 #endif
1377
1378 if (ret)
1379 return ret;
1380
1381 adr += mtd->erasesize;
1382 len -= mtd->erasesize;
1383
1384 if (adr >> cfi->chipshift) {
1385 adr = 0;
1386 chipnum++;
1387
1388 if (chipnum >= cfi->numchips)
1389 break;
1390 }
1391 }
1392 return 0;
1393 }
1394 static inline int do_unlock_oneblock(struct map_info *map, struct flchip *chip, unsigned long adr)
1395 {
1396 struct cfi_private *cfi = map->fldrv_priv;
1397 __u32 status, status_OK;
1398 unsigned long timeo = jiffies + HZ;
1399 DECLARE_WAITQUEUE(wait, current);
1400
1401 adr += chip->start;
1402
1403 /* Let's determine this according to the interleave only once */
1404 status_OK = CMD(0x80);
1405
1406 timeo = jiffies + HZ;
1407 retry:
1408 spin_lock_bh(chip->mutex);
1409
1410 /* Check that the chip's ready to talk to us. */
1411 switch (chip->state) {
1412 case FL_CFI_QUERY:
1413 case FL_JEDEC_QUERY:
1414 case FL_READY:
1415 cfi_write(map, CMD(0x70), adr);
1416 chip->state = FL_STATUS;
1417
1418 case FL_STATUS:
1419 status = cfi_read(map, adr);
1420 if ((status & status_OK) == status_OK)
1421 break;
1422
1423 /* Urgh. Chip not yet ready to talk to us. */
1424 if (time_after(jiffies, timeo)) {
1425 spin_unlock_bh(chip->mutex);
1426 printk("waiting for chip to be ready timed out in unlock\n");
1427 return -EIO;
1428 }
1429
1430 /* Latency issues. Drop the lock, wait a while and retry */
1431 spin_unlock_bh(chip->mutex);
1432 cfi_udelay(1);
1433 goto retry;
1434
1435 default:
1436 /* Stick ourselves on a wait queue to be woken when
1437 someone changes the status */
1438 set_current_state(TASK_UNINTERRUPTIBLE);
1439 add_wait_queue(&chip->wq, &wait);
1440 spin_unlock_bh(chip->mutex);
1441 schedule();
1442 remove_wait_queue(&chip->wq, &wait);
1443 timeo = jiffies + HZ;
1444 goto retry;
1445 }
1446
1447 ENABLE_VPP(map);
1448 cfi_write(map, CMD(0x60), adr);
1449 cfi_write(map, CMD(0xD0), adr);
1450 chip->state = FL_UNLOCKING;
1451
1452 spin_unlock_bh(chip->mutex);
1453 schedule_timeout(HZ);
1454 spin_lock_bh(chip->mutex);
1455
1456 /* FIXME. Use a timer to check this, and return immediately. */
1457 /* Once the state machine's known to be working I'll do that */
1458
1459 timeo = jiffies + (HZ*2);
1460 for (;;) {
1461
1462 status = cfi_read(map, adr);
1463 if ((status & status_OK) == status_OK)
1464 break;
1465
1466 /* OK Still waiting */
1467 if (time_after(jiffies, timeo)) {
1468 cfi_write(map, CMD(0x70), adr);
1469 chip->state = FL_STATUS;
1470 printk("waiting for unlock to complete timed out. Xstatus = %x, status = %x.\n", status, cfi_read(map, adr));
1471 DISABLE_VPP(map);
1472 spin_unlock_bh(chip->mutex);
1473 return -EIO;
1474 }
1475
1476 /* Latency issues. Drop the unlock, wait a while and retry */
1477 spin_unlock_bh(chip->mutex);
1478 cfi_udelay(1);
1479 spin_lock_bh(chip->mutex);
1480 }
1481
1482 /* Done and happy. */
1483 chip->state = FL_STATUS;
1484 DISABLE_VPP(map);
1485 wake_up(&chip->wq);
1486 spin_unlock_bh(chip->mutex);
1487 return 0;
1488 }
1489 static int cfi_intelext_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1490 {
1491 struct map_info *map = mtd->priv;
1492 struct cfi_private *cfi = map->fldrv_priv;
1493 unsigned long adr;
1494 int chipnum, ret = 0;
1495 #ifdef DEBUG_LOCK_BITS
1496 int ofs_factor = cfi->interleave * cfi->device_type;
1497 #endif
1498
1499 chipnum = ofs >> cfi->chipshift;
1500 adr = ofs - (chipnum << cfi->chipshift);
1501
1502 #ifdef DEBUG_LOCK_BITS
1503 {
1504 unsigned long temp_adr = adr;
1505 unsigned long temp_len = len;
1506
1507 cfi_send_gen_cmd(0x90, 0x55, 0, map, cfi, cfi->device_type, NULL);
1508 while (temp_len) {
1509 printk("before unlock %x: block status register is %x\n",temp_adr,cfi_read_query(map, temp_adr+(2*ofs_factor)));
1510 temp_adr += mtd->erasesize;
1511 temp_len -= mtd->erasesize;
1512 }
1513 cfi_send_gen_cmd(0xff, 0x55, 0, map, cfi, cfi->device_type, NULL);
1514 }
1515 #endif
1516
1517 ret = do_unlock_oneblock(map, &cfi->chips[chipnum], adr);
1518
1519 #ifdef DEBUG_LOCK_BITS
1520 cfi_send_gen_cmd(0x90, 0x55, 0, map, cfi, cfi->device_type, NULL);
1521 printk("after unlock: block status register is %x\n",cfi_read_query(map, adr+(2*ofs_factor)));
1522 cfi_send_gen_cmd(0xff, 0x55, 0, map, cfi, cfi->device_type, NULL);
1523 #endif
1524
1525 return ret;
1526 }
1527
1528 static int cfi_intelext_suspend(struct mtd_info *mtd)
1529 {
1530 struct map_info *map = mtd->priv;
1531 struct cfi_private *cfi = map->fldrv_priv;
1532 int i;
1533 struct flchip *chip;
1534 int ret = 0;
1535
1536 for (i=0; !ret && i<cfi->numchips; i++) {
1537 chip = &cfi->chips[i];
1538
1539 spin_lock_bh(chip->mutex);
1540
1541 switch(chip->state) {
1542 case FL_READY:
1543 case FL_STATUS:
1544 case FL_CFI_QUERY:
1545 case FL_JEDEC_QUERY:
1546 chip->oldstate = chip->state;
1547 chip->state = FL_PM_SUSPENDED;
1548 /* No need to wake_up() on this state change -
1549 * as the whole point is that nobody can do anything
1550 * with the chip now anyway.
1551 */
1552 case FL_PM_SUSPENDED:
1553 break;
1554
1555 default:
1556 ret = -EAGAIN;
1557 break;
1558 }
1559 spin_unlock_bh(chip->mutex);
1560 }
1561
1562 /* Unlock the chips again */
1563
1564 if (ret) {
1565 for (i--; i >=0; i--) {
1566 chip = &cfi->chips[i];
1567
1568 spin_lock_bh(chip->mutex);
1569
1570 if (chip->state == FL_PM_SUSPENDED) {
1571 chip->state = chip->oldstate;
1572 wake_up(&chip->wq);
1573 }
1574 spin_unlock_bh(chip->mutex);
1575 }
1576 }
1577
1578 return ret;
1579 }
1580
1581 static void cfi_intelext_resume(struct mtd_info *mtd)
1582 {
1583 struct map_info *map = mtd->priv;
1584 struct cfi_private *cfi = map->fldrv_priv;
1585 int i;
1586 struct flchip *chip;
1587
1588 for (i=0; i<cfi->numchips; i++) {
1589
1590 chip = &cfi->chips[i];
1591
1592 spin_lock_bh(chip->mutex);
1593
1594 if (chip->state == FL_PM_SUSPENDED) {
1595 /* We need to force it back to a known state. */
1596 cfi_write(map, CMD(0xff), 0);
1597 chip->state = FL_READY;
1598 wake_up(&chip->wq);
1599 }
1600
1601 spin_unlock_bh(chip->mutex);
1602 }
1603 }
1604
1605 static void cfi_intelext_destroy(struct mtd_info *mtd)
1606 {
1607 struct map_info *map = mtd->priv;
1608 struct cfi_private *cfi = map->fldrv_priv;
1609 kfree(cfi->cmdset_priv);
1610 kfree(cfi);
1611 }
1612
1613 #if LINUX_VERSION_CODE < 0x20212 && defined(MODULE)
1614 #define cfi_intelext_init init_module
1615 #define cfi_intelext_exit cleanup_module
1616 #endif
1617
1618 static char im_name_1[]="cfi_cmdset_0001";
1619 static char im_name_3[]="cfi_cmdset_0003";
1620
1621
1622 mod_init_t cfi_intelext_init(void)
1623 {
1624 inter_module_register(im_name_1, THIS_MODULE, &cfi_cmdset_0001);
1625 inter_module_register(im_name_3, THIS_MODULE, &cfi_cmdset_0001);
1626 return 0;
1627 }
1628
1629 mod_exit_t cfi_intelext_exit(void)
1630 {
1631 inter_module_unregister(im_name_1);
1632 inter_module_unregister(im_name_3);
1633 }
1634
1635 module_init(cfi_intelext_init);
1636 module_exit(cfi_intelext_exit);
1637