File: /usr/src/linux/drivers/mtd/nand/nand.c
1 /*
2 * drivers/mtd/nand.c
3 *
4 * Copyright (C) 2000 Steven J. Hill (sjhill@cotw.com)
5 *
6 * $Id: nand.c,v 1.10 2001/03/20 07:26:01 dwmw2 Exp $
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * Overview:
13 * This is the generic MTD driver for NAND flash devices. It should be
14 * capable of working with almost all NAND chips currently available.
15 */
16
17 #include <linux/delay.h>
18 #include <linux/errno.h>
19 #include <linux/sched.h>
20 #include <linux/types.h>
21 #include <linux/mtd/mtd.h>
22 #include <linux/mtd/nand.h>
23 #include <linux/mtd/nand_ids.h>
24 #include <asm/io.h>
25
26 #ifdef CONFIG_MTD_NAND_ECC
27 #include <linux/mtd/nand_ecc.h>
28 #endif
29
30 /*
31 * Macros for low-level register control
32 */
33 #define NAND_CTRL (*(volatile unsigned char *) \
34 ((struct nand_chip *) mtd->priv)->CTRL_ADDR)
35 #define nand_select() NAND_CTRL &= ~this->NCE; \
36 nand_command(mtd, NAND_CMD_RESET, -1, -1); \
37 udelay (10);
38 #define nand_deselect() NAND_CTRL |= ~this->NCE;
39
40 /*
41 * NAND low-level MTD interface functions
42 */
43 static int nand_read (struct mtd_info *mtd, loff_t from, size_t len,
44 size_t *retlen, u_char *buf);
45 static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
46 size_t *retlen, u_char *buf, u_char *ecc_code);
47 static int nand_read_oob (struct mtd_info *mtd, loff_t from, size_t len,
48 size_t *retlen, u_char *buf);
49 static int nand_write (struct mtd_info *mtd, loff_t to, size_t len,
50 size_t *retlen, const u_char *buf);
51 static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
52 size_t *retlen, const u_char *buf,
53 u_char *ecc_code);
54 static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len,
55 size_t *retlen, const u_char *buf);
56 static int nand_writev (struct mtd_info *mtd, const struct iovec *vecs,
57 unsigned long count, loff_t to, size_t *retlen);
58 static int nand_erase (struct mtd_info *mtd, struct erase_info *instr);
59 static void nand_sync (struct mtd_info *mtd);
60
61 /*
62 * Send command to NAND device
63 */
64 static void nand_command (struct mtd_info *mtd, unsigned command,
65 int column, int page_addr)
66 {
67 register struct nand_chip *this = mtd->priv;
68 register unsigned long NAND_IO_ADDR = this->IO_ADDR;
69
70 /* Begin command latch cycle */
71 NAND_CTRL |= this->CLE;
72
73 /*
74 * Write out the command to the device.
75 */
76 if (command != NAND_CMD_SEQIN)
77 writeb (command, NAND_IO_ADDR);
78 else {
79 if (mtd->oobblock == 256 && column >= 256) {
80 column -= 256;
81 writeb(NAND_CMD_RESET, NAND_IO_ADDR);
82 writeb(NAND_CMD_READOOB, NAND_IO_ADDR);
83 writeb(NAND_CMD_SEQIN, NAND_IO_ADDR);
84 }
85 else if (mtd->oobblock == 512 && column >= 256) {
86 if (column < 512) {
87 column -= 256;
88 writeb(NAND_CMD_READ1, NAND_IO_ADDR);
89 writeb(NAND_CMD_SEQIN, NAND_IO_ADDR);
90 }
91 else {
92 column -= 512;
93 writeb(NAND_CMD_READOOB, NAND_IO_ADDR);
94 writeb(NAND_CMD_SEQIN, NAND_IO_ADDR);
95 }
96 }
97 else {
98 writeb(NAND_CMD_READ0, NAND_IO_ADDR);
99 writeb(NAND_CMD_SEQIN, NAND_IO_ADDR);
100 }
101 }
102
103 /* Set ALE and clear CLE to start address cycle */
104 NAND_CTRL &= ~this->CLE;
105 NAND_CTRL |= this->ALE;
106
107 /* Serially input address */
108 if (column != -1)
109 writeb (column, NAND_IO_ADDR);
110 if (page_addr != -1) {
111 writeb ((unsigned char) (page_addr & 0xff), NAND_IO_ADDR);
112 writeb ((unsigned char) ((page_addr >> 8) & 0xff), NAND_IO_ADDR);
113 /* One more address cycle for higher density devices */
114 if (mtd->size & 0x0c000000) {
115 writeb ((unsigned char) ((page_addr >> 16) & 0x0f),
116 NAND_IO_ADDR);
117 }
118 }
119
120 /* Latch in address */
121 NAND_CTRL &= ~this->ALE;
122
123 /* Pause for 15us */
124 udelay (15);
125 }
126
127 /*
128 * NAND read
129 */
130 static int nand_read (struct mtd_info *mtd, loff_t from, size_t len,
131 size_t *retlen, u_char *buf)
132 {
133 #ifdef CONFIG_MTD_NAND_ECC
134 struct nand_chip *this = mtd->priv;
135
136 return nand_read_ecc (mtd, from, len, retlen, buf, this->ecc_code_buf);
137 #else
138 return nand_read_ecc (mtd, from, len, retlen, buf, NULL);
139 #endif
140 }
141
142 /*
143 * NAND read with ECC
144 */
145 static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
146 size_t *retlen, u_char *buf, u_char *ecc_code)
147 {
148 int j, col, page, state;
149 int erase_state = 0;
150 struct nand_chip *this = mtd->priv;
151 DECLARE_WAITQUEUE(wait, current);
152 #ifdef CONFIG_MTD_NAND_ECC
153 int ecc_result;
154 u_char ecc_calc[6];
155 #endif
156
157 DEBUG (MTD_DEBUG_LEVEL3,
158 "nand_read_ecc: from = 0x%08x, len = %i\n", (unsigned int) from,
159 (int) len);
160
161 /* Do not allow reads past end of device */
162 if ((from + len) > mtd->size) {
163 DEBUG (MTD_DEBUG_LEVEL0,
164 "nand_read_ecc: Attempt read beyond end of device\n");
165 *retlen = 0;
166 return -EINVAL;
167 }
168
169 /* Grab the lock and see if the device is available */
170 retry:
171 spin_lock_bh (&this->chip_lock);
172
173 switch (this->state) {
174 case FL_READY:
175 this->state = FL_READING;
176 spin_unlock_bh (&this->chip_lock);
177 break;
178
179 case FL_ERASING:
180 this->state = FL_READING;
181 erase_state = 1;
182 spin_unlock_bh (&this->chip_lock);
183 break;
184
185 default:
186 set_current_state (TASK_UNINTERRUPTIBLE);
187 add_wait_queue (&this->wq, &wait);
188 spin_unlock_bh (&this->chip_lock);
189 schedule();
190
191 remove_wait_queue (&this->wq, &wait);
192 goto retry;
193 };
194
195 /* First we calculate the starting page */
196 page = from >> this->page_shift;
197
198 /* Get raw starting column */
199 col = from & (mtd->oobblock - 1);
200
201 /* State machine for devices having pages larger than 256 bytes */
202 state = (col < mtd->eccsize) ? 0 : 1;
203
204 /* Calculate column address within ECC block context */
205 col = (col >= mtd->eccsize) ? (col - mtd->eccsize) : col;
206
207 /* Initialize return value */
208 *retlen = 0;
209
210 /* Select the NAND device */
211 nand_select ();
212
213 /* Loop until all data read */
214 while (*retlen < len) {
215
216 #ifdef CONFIG_MTD_NAND_ECC
217 /* Send the read command */
218 if (!state)
219 nand_command (mtd, NAND_CMD_READ0, 0x00, page);
220 else
221 nand_command (mtd, NAND_CMD_READ1, 0x00, page);
222
223 /* Read in a block big enough for ECC */
224 for (j=0 ; j < mtd->eccsize ; j++)
225 this->data_buf[j] = readb (this->IO_ADDR);
226
227 /* Read in the out-of-band data */
228 if (!state) {
229 nand_command (mtd, NAND_CMD_READOOB, 0x00, page);
230 for (j=0 ; j<3 ; j++)
231 ecc_code[j] = readb(this->IO_ADDR);
232 nand_command (mtd, NAND_CMD_READ0, 0x00, page);
233 }
234 else {
235 nand_command (mtd, NAND_CMD_READOOB, 0x03, page);
236 for (j=3 ; j<6 ; j++)
237 ecc_code[j] = readb(this->IO_ADDR);
238 nand_command (mtd, NAND_CMD_READ0, 0x00, page);
239 }
240
241 /* Calculate the ECC and verify it */
242 if (!state) {
243 nand_calculate_ecc (&this->data_buf[0],
244 &ecc_calc[0]);
245 ecc_result = nand_correct_data (&this->data_buf[0],
246 &ecc_code[0], &ecc_calc[0]);
247 }
248 else {
249 nand_calculate_ecc (&this->data_buf[0],
250 &ecc_calc[3]);
251 ecc_result = nand_correct_data (&this->data_buf[0],
252 &ecc_code[3], &ecc_calc[3]);
253 }
254 if (ecc_result == -1) {
255 DEBUG (MTD_DEBUG_LEVEL0,
256 "nand_read_ecc: "
257 "Failed ECC read, page 0x%08x\n", page);
258 nand_deselect ();
259 spin_lock_bh (&this->chip_lock);
260 if (erase_state)
261 this->state = FL_ERASING;
262 else
263 this->state = FL_READY;
264 wake_up (&this->wq);
265 spin_unlock_bh (&this->chip_lock);
266 return -EIO;
267 }
268
269 /* Read the data from ECC data buffer into return buffer */
270 if ((*retlen + (mtd->eccsize - col)) >= len) {
271 while (*retlen < len)
272 buf[(*retlen)++] = this->data_buf[col++];
273 /* We're done */
274 continue;
275 }
276 else
277 for (j=col ; j < mtd->eccsize ; j++)
278 buf[(*retlen)++] = this->data_buf[j];
279 #else
280 /* Send the read command */
281 if (!state)
282 nand_command (mtd, NAND_CMD_READ0, col, page);
283 else
284 nand_command (mtd, NAND_CMD_READ1, col, page);
285
286 /* Read the data directly into the return buffer */
287 if ((*retlen + (mtd->eccsize - col)) >= len) {
288 while (*retlen < len)
289 buf[(*retlen)++] = readb (this->IO_ADDR);
290 /* We're done */
291 continue;
292 }
293 else
294 for (j=col ; j < mtd->eccsize ; j++)
295 buf[(*retlen)++] = readb (this->IO_ADDR);
296 #endif
297
298 /*
299 * If the amount of data to be read is greater than
300 * (256 - col), then all subsequent reads will take
301 * place on page or half-page (in the case of 512 byte
302 * page devices) aligned boundaries and the column
303 * address will be zero. Setting the column address to
304 * to zero after the first read allows us to simplify
305 * the reading of data and the if/else statements above.
306 */
307 if (col)
308 col = 0x00;
309
310 /* Increment page address */
311 if ((mtd->oobblock == 256) || state)
312 page++;
313
314 /* Toggle state machine */
315 if (mtd->oobblock == 512)
316 state = state ? 0 : 1;
317 }
318
319 /* De-select the NAND device */
320 nand_deselect ();
321
322 /* Wake up anyone waiting on the device */
323 spin_lock_bh (&this->chip_lock);
324 if (erase_state)
325 this->state = FL_ERASING;
326 else
327 this->state = FL_READY;
328 wake_up (&this->wq);
329 spin_unlock_bh (&this->chip_lock);
330
331 /* Return happy */
332 return 0;
333 }
334
335 /*
336 * NAND read out-of-band
337 */
338 static int nand_read_oob (struct mtd_info *mtd, loff_t from, size_t len,
339 size_t *retlen, u_char *buf)
340 {
341 int i, col, page;
342 int erase_state = 0;
343 struct nand_chip *this = mtd->priv;
344 DECLARE_WAITQUEUE(wait, current);
345
346 DEBUG (MTD_DEBUG_LEVEL3,
347 "nand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from,
348 (int) len);
349
350 /* Shift to get page */
351 page = ((int) from) >> this->page_shift;
352
353 /* Mask to get column */
354 col = from & 0x0f;
355
356 /* Initialize return length value */
357 *retlen = 0;
358
359 /* Do not allow read past end of page */
360 if ((col + len) > mtd->oobsize) {
361 DEBUG (MTD_DEBUG_LEVEL0,
362 "nand_read_oob: Attempt read past end of page "
363 "0x%08x, column %i, length %i\n", page, col, len);
364 return -EINVAL;
365 }
366
367 retry:
368 /* Grab the lock and see if the device is available */
369 spin_lock_bh (&this->chip_lock);
370
371 switch (this->state) {
372 case FL_READY:
373 this->state = FL_READING;
374 spin_unlock_bh (&this->chip_lock);
375 break;
376
377 case FL_ERASING:
378 this->state = FL_READING;
379 erase_state = 1;
380 spin_unlock_bh (&this->chip_lock);
381 break;
382
383 default:
384 set_current_state (TASK_UNINTERRUPTIBLE);
385 add_wait_queue (&this->wq, &wait);
386 spin_unlock_bh (&this->chip_lock);
387 schedule();
388
389 remove_wait_queue (&this->wq, &wait);
390 goto retry;
391 };
392
393 /* Select the NAND device */
394 nand_select ();
395
396 /* Send the read command */
397 nand_command (mtd, NAND_CMD_READOOB, col, page);
398
399 /* Read the data */
400 for (i = 0 ; i < len ; i++)
401 buf[i] = readb (this->IO_ADDR);
402
403 /* De-select the NAND device */
404 nand_deselect ();
405
406 /* Wake up anyone waiting on the device */
407 spin_lock_bh (&this->chip_lock);
408 if (erase_state)
409 this->state = FL_ERASING;
410 else
411 this->state = FL_READY;
412 wake_up (&this->wq);
413 spin_unlock_bh (&this->chip_lock);
414
415 /* Return happy */
416 *retlen = len;
417 return 0;
418 }
419
420 /*
421 * NAND write
422 */
423 static int nand_write (struct mtd_info *mtd, loff_t to, size_t len,
424 size_t *retlen, const u_char *buf)
425 {
426 #ifdef CONFIG_MTD_NAND_ECC
427 struct nand_chip *this = mtd->priv;
428
429 return nand_write_ecc (mtd, to, len, retlen, buf, this->ecc_code_buf);
430 #else
431 return nand_write_ecc (mtd, to, len, retlen, buf, NULL);
432 #endif
433 }
434
435 /*
436 * NAND write with ECC
437 */
438 static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
439 size_t *retlen, const u_char *buf,
440 u_char *ecc_code)
441 {
442 int i, page, col, cnt, status;
443 struct nand_chip *this = mtd->priv;
444 DECLARE_WAITQUEUE(wait, current);
445 #ifdef CONFIG_MTD_NAND_ECC
446 int ecc_bytes = (mtd->oobblock == 512) ? 6 : 3;
447 #endif
448
449 DEBUG (MTD_DEBUG_LEVEL3,
450 "nand_write_ecc: to = 0x%08x, len = %i\n", (unsigned int) to,
451 (int) len);
452
453 /* Do not allow write past end of page */
454 if ((to + len) > mtd->size) {
455 DEBUG (MTD_DEBUG_LEVEL0,
456 "nand_write_ecc: Attempted write past end of device\n");
457 return -EINVAL;
458 }
459
460 retry:
461 /* Grab the lock and see if the device is available */
462 spin_lock_bh (&this->chip_lock);
463
464 switch (this->state) {
465 case FL_READY:
466 this->state = FL_WRITING;
467 spin_unlock_bh (&this->chip_lock);
468 break;
469
470 default:
471 set_current_state (TASK_UNINTERRUPTIBLE);
472 add_wait_queue (&this->wq, &wait);
473 spin_unlock_bh (&this->chip_lock);
474 schedule();
475
476 remove_wait_queue (&this->wq, &wait);
477 goto retry;
478 };
479
480 /* Shift to get page */
481 page = ((int) to) >> this->page_shift;
482
483 /* Get the starting column */
484 col = to & (mtd->oobblock - 1);
485
486 /* Initialize return length value */
487 *retlen = 0;
488
489 /* Select the NAND device */
490 nand_select ();
491
492 /* Check the WP bit */
493 nand_command (mtd, NAND_CMD_STATUS, -1, -1);
494 if (!(readb (this->IO_ADDR) & 0x80)) {
495 DEBUG (MTD_DEBUG_LEVEL0,
496 "nand_write_ecc: Device is write protected!!!\n");
497 nand_deselect ();
498 spin_lock_bh (&this->chip_lock);
499 this->state = FL_READY;
500 wake_up (&this->wq);
501 spin_unlock_bh (&this->chip_lock);
502 return -EIO;
503 }
504
505 /* Loop until all data is written */
506 while (*retlen < len) {
507 /* Write data into buffer */
508 if ((col + len) >= mtd->oobblock)
509 for(i=col, cnt=0 ; i < mtd->oobblock ; i++, cnt++)
510 this->data_buf[i] = buf[(*retlen + cnt)];
511 else
512 for(i=col, cnt=0 ; cnt < (len - *retlen) ; i++, cnt++)
513 this->data_buf[i] = buf[(*retlen + cnt)];
514
515 #ifdef CONFIG_MTD_NAND_ECC
516 /* Zero out the ECC array */
517 for (i=0 ; i < 6 ; i++)
518 ecc_code[i] = 0x00;
519
520 /* Calculate and write the ECC if we have enough data */
521 if ((col < mtd->eccsize) &&
522 ((col + (len - *retlen)) >= mtd->eccsize)) {
523 nand_command (mtd, NAND_CMD_READ0, col, page);
524 for (i=0 ; i < col ; i++)
525 this->data_buf[i] = readb (this->IO_ADDR);
526 nand_calculate_ecc (&this->data_buf[0], &ecc_code[0]);
527 for (i=0 ; i<3 ; i++)
528 this->data_buf[(mtd->oobblock + i)] =
529 ecc_code[i];
530 }
531
532 /* Calculate and write the second ECC if we have enough data */
533 if ((mtd->oobblock == 512) &&
534 ((col + (len - *retlen)) >= mtd->oobblock)) {
535 nand_calculate_ecc (&this->data_buf[256], &ecc_code[3]);
536 for (i=3 ; i<6 ; i++)
537 this->data_buf[(mtd->oobblock + i)] =
538 ecc_code[i];
539 }
540
541 /* Write ones for partial page programming */
542 for (i=ecc_bytes ; i < mtd->oobsize ; i++)
543 this->data_buf[(mtd->oobblock + i)] = 0xff;
544 #else
545 /* Write ones for partial page programming */
546 for (i=mtd->oobblock ; i < (mtd->oobblock + mtd->oobsize) ; i++)
547 this->data_buf[i] = 0xff;
548 #endif
549
550 /* Write pre-padding bytes into buffer */
551 for (i=0 ; i < col ; i++)
552 this->data_buf[i] = 0xff;
553
554 /* Write post-padding bytes into buffer */
555 if ((col + (len - *retlen)) < mtd->oobblock) {
556 for(i=(col + cnt) ; i < mtd->oobblock ; i++)
557 this->data_buf[i] = 0xff;
558 }
559
560 /* Send command to begin auto page programming */
561 nand_command (mtd, NAND_CMD_SEQIN, 0x00, page);
562
563 /* Write out complete page of data */
564 for (i=0 ; i < (mtd->oobblock + mtd->oobsize) ; i++)
565 writeb (this->data_buf[i], this->IO_ADDR);
566
567 /* Send command to actually program the data */
568 nand_command (mtd, NAND_CMD_PAGEPROG, -1, -1);
569
570 /*
571 * Wait for program operation to complete. This could
572 * take up to 3000us (3ms) on some devices, so we try
573 * and exit as quickly as possible.
574 */
575 status = 0;
576 for (i=0 ; i<24 ; i++) {
577 /* Delay for 125us */
578 udelay (125);
579
580 /* Check the status */
581 nand_command (mtd, NAND_CMD_STATUS, -1, -1);
582 status = (int) readb (this->IO_ADDR);
583 if (status & 0x40)
584 break;
585 }
586
587 /* See if device thinks it succeeded */
588 if (status & 0x01) {
589 DEBUG (MTD_DEBUG_LEVEL0,
590 "nand_write_ecc: "
591 "Failed write, page 0x%08x, "
592 "%6i bytes were succesful\n", page, *retlen);
593 nand_deselect ();
594 spin_lock_bh (&this->chip_lock);
595 this->state = FL_READY;
596 wake_up (&this->wq);
597 spin_unlock_bh (&this->chip_lock);
598 return -EIO;
599 }
600
601 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
602 /*
603 * The NAND device assumes that it is always writing to
604 * a cleanly erased page. Hence, it performs its internal
605 * write verification only on bits that transitioned from
606 * 1 to 0. The device does NOT verify the whole page on a
607 * byte by byte basis. It is possible that the page was
608 * not completely erased or the page is becoming unusable
609 * due to wear. The read with ECC would catch the error
610 * later when the ECC page check fails, but we would rather
611 * catch it early in the page write stage. Better to write
612 * no data than invalid data.
613 */
614
615 /* Send command to read back the page */
616 if (col < mtd->eccsize)
617 nand_command (mtd, NAND_CMD_READ0, col, page);
618 else
619 nand_command (mtd, NAND_CMD_READ1, col - 256, page);
620
621 /* Loop through and verify the data */
622 for (i=col ; i < cnt ; i++) {
623 if (this->data_buf[i] != readb (this->IO_ADDR)) {
624 DEBUG (MTD_DEBUG_LEVEL0,
625 "nand_write_ecc: "
626 "Failed write verify, page 0x%08x, "
627 "%6i bytes were succesful\n",
628 page, *retlen);
629 nand_deselect ();
630 spin_lock_bh (&this->chip_lock);
631 this->state = FL_READY;
632 wake_up (&this->wq);
633 spin_unlock_bh (&this->chip_lock);
634 return -EIO;
635 }
636 }
637
638 #ifdef CONFIG_MTD_NAND_ECC
639 /*
640 * We also want to check that the ECC bytes wrote
641 * correctly for the same reasons stated above.
642 */
643 nand_command (mtd, NAND_CMD_READOOB, 0x00, page);
644 for (i=0 ; i < ecc_bytes ; i++) {
645 if ((readb (this->IO_ADDR) != ecc_code[i]) &&
646 ecc_code[i]) {
647 DEBUG (MTD_DEBUG_LEVEL0,
648 "nand_write_ecc: Failed ECC write "
649 "verify, page 0x%08x, "
650 "%6i bytes were succesful\n",
651 page, i);
652 nand_deselect ();
653 spin_lock_bh (&this->chip_lock);
654 this->state = FL_READY;
655 wake_up (&this->wq);
656 spin_unlock_bh (&this->chip_lock);
657 return -EIO;
658 }
659 }
660 #endif
661
662 #endif
663
664 /*
665 * If we are writing a large amount of data and/or it
666 * crosses page or half-page boundaries, we set the
667 * the column to zero. It simplifies the program logic.
668 */
669 if (col)
670 col = 0x00;
671
672 /* Update written bytes count */
673 *retlen += cnt;
674
675 /* Increment page address */
676 page++;
677 }
678
679 /* De-select the NAND device */
680 nand_deselect ();
681
682 /* Wake up anyone waiting on the device */
683 spin_lock_bh (&this->chip_lock);
684 this->state = FL_READY;
685 wake_up (&this->wq);
686 spin_unlock_bh (&this->chip_lock);
687
688 /* Return happy */
689 *retlen = len;
690 return 0;
691 }
692
693 /*
694 * NAND write out-of-band
695 */
696 static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len,
697 size_t *retlen, const u_char *buf)
698 {
699 int i, column, page, status;
700 struct nand_chip *this = mtd->priv;
701 DECLARE_WAITQUEUE(wait, current);
702
703 DEBUG (MTD_DEBUG_LEVEL3,
704 "nand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to,
705 (int) len);
706
707 /* Shift to get page */
708 page = ((int) to) >> this->page_shift;
709
710 /* Mask to get column */
711 column = to & 0x1f;
712
713 /* Initialize return length value */
714 *retlen = 0;
715
716 /* Do not allow write past end of page */
717 if ((column + len) > mtd->oobsize) {
718 DEBUG (MTD_DEBUG_LEVEL0,
719 "nand_write_oob: Attempt to write past end of page\n");
720 return -EINVAL;
721 }
722
723 retry:
724 /* Grab the lock and see if the device is available */
725 spin_lock_bh (&this->chip_lock);
726
727 switch (this->state) {
728 case FL_READY:
729 this->state = FL_WRITING;
730 spin_unlock_bh (&this->chip_lock);
731 break;
732
733 default:
734 set_current_state (TASK_UNINTERRUPTIBLE);
735 add_wait_queue (&this->wq, &wait);
736 spin_unlock_bh (&this->chip_lock);
737 schedule();
738
739 remove_wait_queue (&this->wq, &wait);
740 goto retry;
741 };
742
743 /* Select the NAND device */
744 nand_select ();
745
746 /* Check the WP bit */
747 nand_command (mtd, NAND_CMD_STATUS, -1, -1);
748 if (!(readb (this->IO_ADDR) & 0x80)) {
749 DEBUG (MTD_DEBUG_LEVEL0,
750 "nand_write_oob: Device is write protected!!!\n");
751 nand_deselect ();
752 spin_lock_bh (&this->chip_lock);
753 this->state = FL_READY;
754 wake_up (&this->wq);
755 spin_unlock_bh (&this->chip_lock);
756 return -EIO;
757 }
758
759 /* Write out desired data */
760 nand_command (mtd, NAND_CMD_SEQIN, column + 512, page);
761 for (i=0 ; i<len ; i++)
762 writeb (buf[i], this->IO_ADDR);
763
764 /* Send command to program the OOB data */
765 nand_command (mtd, NAND_CMD_PAGEPROG, -1, -1);
766
767 /*
768 * Wait for program operation to complete. This could
769 * take up to 3000us (3ms) on some devices, so we try
770 * and exit as quickly as possible.
771 */
772 status = 0;
773 for (i=0 ; i<24 ; i++) {
774 /* Delay for 125us */
775 udelay (125);
776
777 /* Check the status */
778 nand_command (mtd, NAND_CMD_STATUS, -1, -1);
779 status = (int) readb (this->IO_ADDR);
780 if (status & 0x40)
781 break;
782 }
783
784 /* See if device thinks it succeeded */
785 if (status & 0x01) {
786 DEBUG (MTD_DEBUG_LEVEL0,
787 "nand_write_oob: "
788 "Failed write, page 0x%08x\n", page);
789 nand_deselect ();
790 spin_lock_bh (&this->chip_lock);
791 this->state = FL_READY;
792 wake_up (&this->wq);
793 spin_unlock_bh (&this->chip_lock);
794 return -EIO;
795 }
796
797 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
798 /* Send command to read back the data */
799 nand_command (mtd, NAND_CMD_READOOB, column, page);
800
801 /* Loop through and verify the data */
802 for (i=0 ; i<len ; i++) {
803 if (buf[i] != readb (this->IO_ADDR)) {
804 DEBUG (MTD_DEBUG_LEVEL0,
805 "nand_write_oob: "
806 "Failed write verify, page 0x%08x\n", page);
807 nand_deselect ();
808 spin_lock_bh (&this->chip_lock);
809 this->state = FL_READY;
810 wake_up (&this->wq);
811 spin_unlock_bh (&this->chip_lock);
812 return -EIO;
813 }
814 }
815 #endif
816
817 /* De-select the NAND device */
818 nand_deselect ();
819
820 /* Wake up anyone waiting on the device */
821 spin_lock_bh (&this->chip_lock);
822 this->state = FL_READY;
823 wake_up (&this->wq);
824 spin_unlock_bh (&this->chip_lock);
825
826 /* Return happy */
827 *retlen = len;
828 return 0;
829 }
830
831 /*
832 * NAND write with iovec
833 */
834 static int nand_writev (struct mtd_info *mtd, const struct iovec *vecs,
835 unsigned long count, loff_t to, size_t *retlen)
836 {
837 int i, page, col, cnt, len, total_len, status;
838 struct nand_chip *this = mtd->priv;
839 DECLARE_WAITQUEUE(wait, current);
840 #ifdef CONFIG_MTD_NAND_ECC
841 int ecc_bytes = (mtd->oobblock == 512) ? 6 : 3;
842 #endif
843
844 /* Calculate total length of data */
845 total_len = 0;
846 for (i=0 ; i < count ; i++)
847 total_len += (int) vecs[i].iov_len;
848
849 DEBUG (MTD_DEBUG_LEVEL3,
850 "nand_writev: to = 0x%08x, len = %i\n", (unsigned int) to,
851 (unsigned int) total_len);
852
853 /* Do not allow write past end of page */
854 if ((to + total_len) > mtd->size) {
855 DEBUG (MTD_DEBUG_LEVEL0,
856 "nand_writev: Attempted write past end of device\n");
857 return -EINVAL;
858 }
859
860 retry:
861 /* Grab the lock and see if the device is available */
862 spin_lock_bh (&this->chip_lock);
863
864 switch (this->state) {
865 case FL_READY:
866 this->state = FL_WRITING;
867 spin_unlock_bh (&this->chip_lock);
868 break;
869
870 default:
871 set_current_state (TASK_UNINTERRUPTIBLE);
872 add_wait_queue (&this->wq, &wait);
873 spin_unlock_bh (&this->chip_lock);
874 schedule();
875
876 remove_wait_queue (&this->wq, &wait);
877 goto retry;
878 };
879
880 /* Shift to get page */
881 page = ((int) to) >> this->page_shift;
882
883 /* Get the starting column */
884 col = to & (mtd->oobblock - 1);
885
886 /* Initialize return length value */
887 *retlen = 0;
888
889 /* Select the NAND device */
890 nand_select ();
891
892 /* Check the WP bit */
893 nand_command (mtd, NAND_CMD_STATUS, -1, -1);
894 if (!(readb (this->IO_ADDR) & 0x80)) {
895 DEBUG (MTD_DEBUG_LEVEL0,
896 "nand_writev: Device is write protected!!!\n");
897 nand_deselect ();
898 spin_lock_bh (&this->chip_lock);
899 this->state = FL_READY;
900 wake_up (&this->wq);
901 spin_unlock_bh (&this->chip_lock);
902 return -EIO;
903 }
904
905 /* Loop until all iovecs' data has been written */
906 cnt = col;
907 len = 0;
908 while (count) {
909 /* Do any need pre-fill for partial page programming */
910 for (i=0 ; i < cnt ; i++)
911 this->data_buf[i] = 0xff;
912
913 /*
914 * Read data out of each tuple until we have a full page
915 * to write or we've read all the tuples.
916 */
917 while ((cnt < mtd->oobblock) && count) {
918 this->data_buf[cnt++] =
919 ((u_char *) vecs->iov_base)[len++];
920 if (len >= (int) vecs->iov_len) {
921 vecs++;
922 len = 0;
923 count--;
924 }
925 }
926
927 /* Do any need post-fill for partial page programming */
928 for (i=cnt ; i < mtd->oobblock ; i++)
929 this->data_buf[i] = 0xff;
930
931 #ifdef CONFIG_MTD_NAND_ECC
932 /* Zero out the ECC array */
933 for (i=0 ; i < 6 ; i++)
934 this->ecc_code_buf[i] = 0x00;
935
936 /* Calculate and write the first ECC */
937 if (col >= mtd->eccsize) {
938 nand_command (mtd, NAND_CMD_READ0, col, page);
939 for (i=0 ; i < col ; i++)
940 this->data_buf[i] = readb (this->IO_ADDR);
941 nand_calculate_ecc (&this->data_buf[0],
942 &(this->ecc_code_buf[0]));
943 for (i=0 ; i<3 ; i++)
944 this->data_buf[(mtd->oobblock + i)] =
945 this->ecc_code_buf[i];
946 }
947
948 /* Calculate and write the second ECC */
949 if ((mtd->oobblock == 512) && (cnt == mtd->oobblock)) {
950 nand_calculate_ecc (&this->data_buf[256],
951 &(this->ecc_code_buf[3]));
952 for (i=3 ; i<6 ; i++)
953 this->data_buf[(mtd->oobblock + i)] =
954 this->ecc_code_buf[i];
955 }
956
957 /* Write ones for partial page programming */
958 for (i=ecc_bytes ; i < mtd->oobsize ; i++)
959 this->data_buf[(mtd->oobblock + i)] = 0xff;
960 #else
961 /* Write ones for partial page programming */
962 for (i=mtd->oobblock ; i < (mtd->oobblock + mtd->oobsize) ; i++)
963 this->data_buf[i] = 0xff;
964 #endif
965 /* Send command to begin auto page programming */
966 nand_command (mtd, NAND_CMD_SEQIN, 0x00, page);
967
968 /* Write out complete page of data */
969 for (i=0 ; i < (mtd->oobblock + mtd->oobsize) ; i++)
970 writeb (this->data_buf[i], this->IO_ADDR);
971
972 /* Send command to actually program the data */
973 nand_command (mtd, NAND_CMD_PAGEPROG, -1, -1);
974
975 /*
976 * Wait for program operation to complete. This could
977 * take up to 3000us (3ms) on some devices, so we try
978 * and exit as quickly as possible.
979 */
980 status = 0;
981 for (i=0 ; i<24 ; i++) {
982 /* Delay for 125us */
983 udelay (125);
984
985 /* Check the status */
986 nand_command (mtd, NAND_CMD_STATUS, -1, -1);
987 status = (int) readb (this->IO_ADDR);
988 if (status & 0x40)
989 break;
990 }
991
992 /* See if device thinks it succeeded */
993 if (status & 0x01) {
994 DEBUG (MTD_DEBUG_LEVEL0,
995 "nand_writev: "
996 "Failed write, page 0x%08x, "
997 "%6i bytes were succesful\n", page, *retlen);
998 nand_deselect ();
999 spin_lock_bh (&this->chip_lock);
1000 this->state = FL_READY;
1001 wake_up (&this->wq);
1002 spin_unlock_bh (&this->chip_lock);
1003 return -EIO;
1004 }
1005
1006 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
1007 /*
1008 * The NAND device assumes that it is always writing to
1009 * a cleanly erased page. Hence, it performs its internal
1010 * write verification only on bits that transitioned from
1011 * 1 to 0. The device does NOT verify the whole page on a
1012 * byte by byte basis. It is possible that the page was
1013 * not completely erased or the page is becoming unusable
1014 * due to wear. The read with ECC would catch the error
1015 * later when the ECC page check fails, but we would rather
1016 * catch it early in the page write stage. Better to write
1017 * no data than invalid data.
1018 */
1019
1020 /* Send command to read back the page */
1021 if (col < mtd->eccsize)
1022 nand_command (mtd, NAND_CMD_READ0, col, page);
1023 else
1024 nand_command (mtd, NAND_CMD_READ1, col - 256, page);
1025
1026 /* Loop through and verify the data */
1027 for (i=col ; i < cnt ; i++) {
1028 if (this->data_buf[i] != readb (this->IO_ADDR)) {
1029 DEBUG (MTD_DEBUG_LEVEL0,
1030 "nand_writev: "
1031 "Failed write verify, page 0x%08x, "
1032 "%6i bytes were succesful\n",
1033 page, *retlen);
1034 nand_deselect ();
1035 spin_lock_bh (&this->chip_lock);
1036 this->state = FL_READY;
1037 wake_up (&this->wq);
1038 spin_unlock_bh (&this->chip_lock);
1039 return -EIO;
1040 }
1041 }
1042
1043 #ifdef CONFIG_MTD_NAND_ECC
1044 /*
1045 * We also want to check that the ECC bytes wrote
1046 * correctly for the same reasons stated above.
1047 */
1048 nand_command (mtd, NAND_CMD_READOOB, 0x00, page);
1049 for (i=0 ; i < ecc_bytes ; i++) {
1050 if ((readb (this->IO_ADDR) != this->ecc_code_buf[i]) &&
1051 this->ecc_code_buf[i]) {
1052 DEBUG (MTD_DEBUG_LEVEL0,
1053 "nand_writev: Failed ECC write "
1054 "verify, page 0x%08x, "
1055 "%6i bytes were succesful\n",
1056 page, i);
1057 nand_deselect ();
1058 spin_lock_bh (&this->chip_lock);
1059 this->state = FL_READY;
1060 wake_up (&this->wq);
1061 spin_unlock_bh (&this->chip_lock);
1062 return -EIO;
1063 }
1064 }
1065 #endif
1066
1067 #endif
1068 /* Update written bytes count */
1069 *retlen += (cnt - col);
1070
1071 /* Reset written byte counter and column */
1072 col = cnt = 0;
1073
1074 /* Increment page address */
1075 page++;
1076 }
1077
1078 /* De-select the NAND device */
1079 nand_deselect ();
1080
1081 /* Wake up anyone waiting on the device */
1082 spin_lock_bh (&this->chip_lock);
1083 this->state = FL_READY;
1084 wake_up (&this->wq);
1085 spin_unlock_bh (&this->chip_lock);
1086
1087 /* Return happy */
1088 return 0;
1089 }
1090
1091 /*
1092 * NAND erase a block
1093 */
1094 static int nand_erase (struct mtd_info *mtd, struct erase_info *instr)
1095 {
1096 int i, page, len, status, pages_per_block;
1097 struct nand_chip *this = mtd->priv;
1098 DECLARE_WAITQUEUE(wait, current);
1099
1100 DEBUG (MTD_DEBUG_LEVEL3,
1101 "nand_erase: start = 0x%08x, len = %i\n",
1102 (unsigned int) instr->addr, (unsigned int) instr->len);
1103
1104 /* Start address must align on block boundary */
1105 if (instr->addr & (mtd->erasesize - 1)) {
1106 DEBUG (MTD_DEBUG_LEVEL0,
1107 "nand_erase: Unaligned address\n");
1108 return -EINVAL;
1109 }
1110
1111 /* Length must align on block boundary */
1112 if (instr->len & (mtd->erasesize - 1)) {
1113 DEBUG (MTD_DEBUG_LEVEL0,
1114 "nand_erase: Length not block aligned\n");
1115 return -EINVAL;
1116 }
1117
1118 /* Do not allow erase past end of device */
1119 if ((instr->len + instr->addr) > mtd->size) {
1120 DEBUG (MTD_DEBUG_LEVEL0,
1121 "nand_erase: Erase past end of device\n");
1122 return -EINVAL;
1123 }
1124
1125 retry:
1126 /* Grab the lock and see if the device is available */
1127 spin_lock_bh (&this->chip_lock);
1128
1129 switch (this->state) {
1130 case FL_READY:
1131 this->state = FL_ERASING;
1132 break;
1133
1134 default:
1135 set_current_state (TASK_UNINTERRUPTIBLE);
1136 add_wait_queue (&this->wq, &wait);
1137 spin_unlock_bh (&this->chip_lock);
1138 schedule();
1139
1140 remove_wait_queue (&this->wq, &wait);
1141 goto retry;
1142 };
1143
1144 /* Shift to get first page */
1145 page = (int) (instr->addr >> this->page_shift);
1146
1147 /* Calculate pages in each block */
1148 pages_per_block = mtd->erasesize / mtd->oobblock;
1149
1150 /* Select the NAND device */
1151 nand_select ();
1152
1153 /* Check the WP bit */
1154 nand_command (mtd, NAND_CMD_STATUS, -1, -1);
1155 if (!(readb (this->IO_ADDR) & 0x80)) {
1156 DEBUG (MTD_DEBUG_LEVEL0,
1157 "nand_erase: Device is write protected!!!\n");
1158 nand_deselect ();
1159 this->state = FL_READY;
1160 spin_unlock_bh (&this->chip_lock);
1161 return -EIO;
1162 }
1163
1164 /* Loop through the pages */
1165 len = instr->len;
1166 while (len) {
1167 /* Send commands to erase a page */
1168 nand_command(mtd, NAND_CMD_ERASE1, -1, page);
1169 nand_command(mtd, NAND_CMD_ERASE2, -1, -1);
1170
1171 /*
1172 * Wait for program operation to complete. This could
1173 * take up to 4000us (4ms) on some devices, so we try
1174 * and exit as quickly as possible.
1175 */
1176 status = 0;
1177 for (i=0 ; i<32 ; i++) {
1178 /* Delay for 125us */
1179 udelay (125);
1180
1181 /* Check the status */
1182 nand_command (mtd, NAND_CMD_STATUS, -1, -1);
1183 status = (int) readb (this->IO_ADDR);
1184 if (status & 0x40)
1185 break;
1186 }
1187
1188 /* See if block erase succeeded */
1189 if (status & 0x01) {
1190 DEBUG (MTD_DEBUG_LEVEL0,
1191 "nand_erase: "
1192 "Failed erase, page 0x%08x\n", page);
1193 nand_deselect ();
1194 this->state = FL_READY;
1195 spin_unlock_bh (&this->chip_lock);
1196 return -EIO;
1197 }
1198
1199 /* Increment page address and decrement length */
1200 len -= mtd->erasesize;
1201 page += pages_per_block;
1202
1203 /* Release the spin lock */
1204 spin_unlock_bh (&this->chip_lock);
1205
1206 erase_retry:
1207 /* Check the state and sleep if it changed */
1208 spin_lock_bh (&this->chip_lock);
1209 if (this->state == FL_ERASING) {
1210 continue;
1211 }
1212 else {
1213 set_current_state (TASK_UNINTERRUPTIBLE);
1214 add_wait_queue (&this->wq, &wait);
1215 spin_unlock_bh (&this->chip_lock);
1216 schedule();
1217
1218 remove_wait_queue (&this->wq, &wait);
1219 goto erase_retry;
1220 }
1221 }
1222 spin_unlock_bh (&this->chip_lock);
1223
1224 /* De-select the NAND device */
1225 nand_deselect ();
1226
1227 /* Do call back function */
1228 if (instr->callback)
1229 instr->callback (instr);
1230
1231 /* The device is ready */
1232 spin_lock_bh (&this->chip_lock);
1233 this->state = FL_READY;
1234 spin_unlock_bh (&this->chip_lock);
1235
1236 /* Return happy */
1237 return 0;
1238 }
1239
1240 /*
1241 * NAND sync
1242 */
1243 static void nand_sync (struct mtd_info *mtd)
1244 {
1245 struct nand_chip *this = mtd->priv;
1246 DECLARE_WAITQUEUE(wait, current);
1247
1248 DEBUG (MTD_DEBUG_LEVEL3, "nand_sync: called\n");
1249
1250 retry:
1251 /* Grab the spinlock */
1252 spin_lock_bh(&this->chip_lock);
1253
1254 /* See what's going on */
1255 switch(this->state) {
1256 case FL_READY:
1257 case FL_SYNCING:
1258 this->state = FL_SYNCING;
1259 spin_unlock_bh (&this->chip_lock);
1260 break;
1261
1262 default:
1263 /* Not an idle state */
1264 add_wait_queue (&this->wq, &wait);
1265 spin_unlock_bh (&this->chip_lock);
1266 schedule ();
1267
1268 remove_wait_queue (&this->wq, &wait);
1269 goto retry;
1270 }
1271
1272 /* Lock the device */
1273 spin_lock_bh (&this->chip_lock);
1274
1275 /* Set the device to be ready again */
1276 if (this->state == FL_SYNCING) {
1277 this->state = FL_READY;
1278 wake_up (&this->wq);
1279 }
1280
1281 /* Unlock the device */
1282 spin_unlock_bh (&this->chip_lock);
1283 }
1284
1285 /*
1286 * Scan for the NAND device
1287 */
1288 int nand_scan (struct mtd_info *mtd)
1289 {
1290 int i, nand_maf_id, nand_dev_id;
1291 struct nand_chip *this = mtd->priv;
1292
1293 /* Select the device */
1294 nand_select ();
1295
1296 /* Send the command for reading device ID */
1297 nand_command (mtd, NAND_CMD_READID, 0x00, -1);
1298
1299 /* Read manufacturer and device IDs */
1300 nand_maf_id = readb (this->IO_ADDR);
1301 nand_dev_id = readb (this->IO_ADDR);
1302
1303 /* Print and store flash device information */
1304 for (i = 0; nand_flash_ids[i].name != NULL; i++) {
1305 if (nand_maf_id == nand_flash_ids[i].manufacture_id &&
1306 nand_dev_id == nand_flash_ids[i].model_id) {
1307 if (!mtd->size) {
1308 mtd->name = nand_flash_ids[i].name;
1309 mtd->erasesize = nand_flash_ids[i].erasesize;
1310 mtd->size = (1 << nand_flash_ids[i].chipshift);
1311 mtd->eccsize = 256;
1312 if (nand_flash_ids[i].page256) {
1313 mtd->oobblock = 256;
1314 mtd->oobsize = 8;
1315 this->page_shift = 8;
1316 }
1317 else {
1318 mtd->oobblock = 512;
1319 mtd->oobsize = 16;
1320 this->page_shift = 9;
1321 }
1322 }
1323 printk (KERN_INFO "NAND device: Manufacture ID:"
1324 " 0x%02x, Chip ID: 0x%02x (%s)\n",
1325 nand_maf_id, nand_dev_id, mtd->name);
1326 break;
1327 }
1328 }
1329
1330 /* Initialize state and spinlock */
1331 this->state = FL_READY;
1332 spin_lock_init(&this->chip_lock);
1333
1334 /* De-select the device */
1335 nand_deselect ();
1336
1337 /* Print warning message for no device */
1338 if (!mtd->size) {
1339 printk (KERN_WARNING "No NAND device found!!!\n");
1340 return 1;
1341 }
1342
1343 /* Fill in remaining MTD driver data */
1344 mtd->type = MTD_NANDFLASH;
1345 mtd->flags = MTD_CAP_NANDFLASH | MTD_ECC;
1346 mtd->module = THIS_MODULE;
1347 mtd->ecctype = MTD_ECC_SW;
1348 mtd->erase = nand_erase;
1349 mtd->point = NULL;
1350 mtd->unpoint = NULL;
1351 mtd->read = nand_read;
1352 mtd->write = nand_write;
1353 mtd->read_ecc = nand_read_ecc;
1354 mtd->write_ecc = nand_write_ecc;
1355 mtd->read_oob = nand_read_oob;
1356 mtd->write_oob = nand_write_oob;
1357 mtd->readv = NULL;
1358 mtd->writev = nand_writev;
1359 mtd->sync = nand_sync;
1360 mtd->lock = NULL;
1361 mtd->unlock = NULL;
1362 mtd->suspend = NULL;
1363 mtd->resume = NULL;
1364
1365 /* Return happy */
1366 return 0;
1367 }
1368
1369 EXPORT_SYMBOL(nand_scan);
1370