File: /usr/src/linux/drivers/net/acenic.c
1 /*
2 * acenic.c: Linux driver for the Alteon AceNIC Gigabit Ethernet card
3 * and other Tigon based cards.
4 *
5 * Copyright 1998-2001 by Jes Sorensen, <jes@linuxcare.com>.
6 *
7 * Thanks to Alteon and 3Com for providing hardware and documentation
8 * enabling me to write this driver.
9 *
10 * A mailing list for discussing the use of this driver has been
11 * setup, please subscribe to the lists if you have any questions
12 * about the driver. Send mail to linux-acenic-help@sunsite.auc.dk to
13 * see how to subscribe.
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * Additional credits:
21 * Pete Wyckoff <wyckoff@ca.sandia.gov>: Initial Linux/Alpha and trace
22 * dump support. The trace dump support has not been
23 * integrated yet however.
24 * Troy Benjegerdes: Big Endian (PPC) patches.
25 * Nate Stahl: Better out of memory handling and stats support.
26 * Aman Singla: Nasty race between interrupt handler and tx code dealing
27 * with 'testing the tx_ret_csm and setting tx_full'
28 * David S. Miller <davem@redhat.com>: conversion to new PCI dma mapping
29 * infrastructure and Sparc support
30 * Pierrick Pinasseau (CERN): For lending me an Ultra 5 to test the
31 * driver under Linux/Sparc64
32 * Matt Domsch <Matt_Domsch@dell.com>: Detect Alteon 1000baseT cards
33 * Chip Salzenberg <chip@valinux.com>: Fix race condition between tx
34 * handler and close() cleanup.
35 * Ken Aaker <kdaaker@rchland.vnet.ibm.com>: Correct check for whether
36 * memory mapped IO is enabled to
37 * make the driver work on RS/6000.
38 * Takayoshi Kouchi <kouchi@hpc.bs1.fc.nec.co.jp>: Identifying problem
39 * where the driver would disable
40 * bus master mode if it had to disable
41 * write and invalidate.
42 * Stephen Hack <stephen_hack@hp.com>: Fixed ace_set_mac_addr for little
43 * endian systems.
44 * Val Henson <vhenson@esscom.com>: Reset Jumbo skb producer and
45 * rx producer index when
46 * flushing the Jumbo ring.
47 * Hans Grobler <grobh@sun.ac.za>: Memory leak fixes in the
48 * driver init path.
49 */
50
51 #include <linux/config.h>
52 #include <linux/module.h>
53 #include <linux/version.h>
54 #include <linux/types.h>
55 #include <linux/errno.h>
56 #include <linux/ioport.h>
57 #include <linux/pci.h>
58 #include <linux/kernel.h>
59 #include <linux/netdevice.h>
60 #include <linux/etherdevice.h>
61 #include <linux/skbuff.h>
62 #include <linux/init.h>
63 #include <linux/delay.h>
64 #include <linux/mm.h>
65 #include <linux/highmem.h>
66 #include <linux/sockios.h>
67
68 #ifdef SIOCETHTOOL
69 #include <linux/ethtool.h>
70 #endif
71
72 #include <net/sock.h>
73 #include <net/ip.h>
74
75 #include <asm/system.h>
76 #include <asm/io.h>
77 #include <asm/irq.h>
78 #include <asm/byteorder.h>
79 #include <asm/uaccess.h>
80
81
82 #undef INDEX_DEBUG
83
84 #ifdef CONFIG_ACENIC_OMIT_TIGON_I
85 #define ACE_IS_TIGON_I(ap) 0
86 #else
87 #define ACE_IS_TIGON_I(ap) (ap->version == 1)
88 #endif
89
90 #ifndef PCI_VENDOR_ID_ALTEON
91 #define PCI_VENDOR_ID_ALTEON 0x12ae
92 #endif
93 #ifndef PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE
94 #define PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE 0x0001
95 #define PCI_DEVICE_ID_ALTEON_ACENIC_COPPER 0x0002
96 #endif
97 #ifndef PCI_DEVICE_ID_3COM_3C985
98 #define PCI_DEVICE_ID_3COM_3C985 0x0001
99 #endif
100 #ifndef PCI_VENDOR_ID_NETGEAR
101 #define PCI_VENDOR_ID_NETGEAR 0x1385
102 #define PCI_DEVICE_ID_NETGEAR_GA620 0x620a
103 #endif
104 #ifndef PCI_DEVICE_ID_NETGEAR_GA620T
105 #define PCI_DEVICE_ID_NETGEAR_GA620T 0x630a
106 #endif
107
108
109 /*
110 * Farallon used the DEC vendor ID by mistake and they seem not
111 * to care - stinky!
112 */
113 #ifndef PCI_DEVICE_ID_FARALLON_PN9000SX
114 #define PCI_DEVICE_ID_FARALLON_PN9000SX 0x1a
115 #endif
116 #ifndef PCI_VENDOR_ID_SGI
117 #define PCI_VENDOR_ID_SGI 0x10a9
118 #endif
119 #ifndef PCI_DEVICE_ID_SGI_ACENIC
120 #define PCI_DEVICE_ID_SGI_ACENIC 0x0009
121 #endif
122
123 #if LINUX_VERSION_CODE >= 0x20400
124 static struct pci_device_id acenic_pci_tbl[] __initdata = {
125 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE,
126 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
127 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_COPPER,
128 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
129 { PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C985,
130 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
131 { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620,
132 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
133 { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620T,
134 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
135 /*
136 * Farallon used the DEC vendor ID on their cards incorrectly.
137 */
138 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_FARALLON_PN9000SX,
139 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
140 { PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_ACENIC,
141 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
142 { }
143 };
144 MODULE_DEVICE_TABLE(pci, acenic_pci_tbl);
145 #endif
146
147
148 #ifndef wmb
149 #define wmb() mb()
150 #endif
151
152 #ifndef __exit
153 #define __exit
154 #endif
155
156 #ifndef __devinit
157 #define __devinit __init
158 #endif
159
160 #ifndef SMP_CACHE_BYTES
161 #define SMP_CACHE_BYTES L1_CACHE_BYTES
162 #endif
163
164 #if (BITS_PER_LONG == 64)
165 #define ACE_64BIT_PTR 1
166 #endif
167
168 #ifndef SET_MODULE_OWNER
169 #define SET_MODULE_OWNER(dev) {do{} while(0);}
170 #define ACE_MOD_INC_USE_COUNT MOD_INC_USE_COUNT
171 #define ACE_MOD_DEC_USE_COUNT MOD_DEC_USE_COUNT
172 #else
173 #define ACE_MOD_INC_USE_COUNT {do{} while(0);}
174 #define ACE_MOD_DEC_USE_COUNT {do{} while(0);}
175 #endif
176
177
178 #if (LINUX_VERSION_CODE < 0x02030d)
179 #define pci_resource_start(dev, bar) dev->base_address[bar]
180 #elif (LINUX_VERSION_CODE < 0x02032c)
181 #define pci_resource_start(dev, bar) dev->resource[bar].start
182 #endif
183
184 #if (LINUX_VERSION_CODE < 0x02030e)
185 #define net_device device
186 #endif
187
188 #if (LINUX_VERSION_CODE < 0x02032a)
189 typedef u32 dma_addr_t;
190
191 static inline void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
192 dma_addr_t *dma_handle)
193 {
194 void *virt_ptr;
195
196 virt_ptr = kmalloc(size, GFP_KERNEL);
197 if (!virt_ptr)
198 return NULL;
199 *dma_handle = virt_to_bus(virt_ptr);
200 return virt_ptr;
201 }
202 #define pci_free_consistent(cookie, size, ptr, dma_ptr) kfree(ptr)
203 #define pci_map_single(cookie, address, size, dir) virt_to_bus(address)
204 #define pci_unmap_single(cookie, address, size, dir)
205 #endif
206
207 #if (LINUX_VERSION_CODE < 0x02032b)
208 /*
209 * SoftNet
210 *
211 * For pre-softnet kernels we need to tell the upper layer not to
212 * re-enter start_xmit() while we are in there. However softnet
213 * guarantees not to enter while we are in there so there is no need
214 * to do the netif_stop_queue() dance unless the transmit queue really
215 * gets stuck. This should also improve performance according to tests
216 * done by Aman Singla.
217 */
218 #define dev_kfree_skb_irq(a) dev_kfree_skb(a)
219 #define netif_wake_queue(dev) clear_bit(0, &dev->tbusy)
220 #define netif_stop_queue(dev) set_bit(0, &dev->tbusy)
221 #define late_stop_netif_stop_queue(dev) {do{} while(0);}
222 #define early_stop_netif_stop_queue(dev) test_and_set_bit(0,&dev->tbusy)
223 #define early_stop_netif_wake_queue(dev) netif_wake_queue(dev)
224
225 static inline void netif_start_queue(struct net_device *dev)
226 {
227 dev->tbusy = 0;
228 dev->interrupt = 0;
229 dev->start = 1;
230 }
231
232 #define ace_mark_net_bh() mark_bh(NET_BH)
233 #define netif_queue_stopped(dev) dev->tbusy
234 #define netif_running(dev) dev->start
235 #define ace_if_down(dev) {do{dev->start = 0;} while(0);}
236
237 #define tasklet_struct tq_struct
238 static inline void tasklet_schedule(struct tasklet_struct *tasklet)
239 {
240 queue_task(tasklet, &tq_immediate);
241 mark_bh(IMMEDIATE_BH);
242 }
243
244 static inline void tasklet_init(struct tasklet_struct *tasklet,
245 void (*func)(unsigned long),
246 unsigned long data)
247 {
248 tasklet->next = NULL;
249 tasklet->sync = 0;
250 tasklet->routine = (void (*)(void *))func;
251 tasklet->data = (void *)data;
252 }
253 #define tasklet_kill(tasklet) {do{} while(0);}
254 #else
255 #define late_stop_netif_stop_queue(dev) netif_stop_queue(dev)
256 #define early_stop_netif_stop_queue(dev) 0
257 #define early_stop_netif_wake_queue(dev) {do{} while(0);}
258 #define ace_mark_net_bh() {do{} while(0);}
259 #define ace_if_down(dev) {do{} while(0);}
260 #endif
261
262 #ifndef pci_set_dma_mask
263 #define pci_set_dma_mask(dev, mask) dev->dma_mask = mask;
264 #endif
265
266
267 #if (LINUX_VERSION_CODE >= 0x02031b)
268 #define NEW_NETINIT
269 #define ACE_PROBE_ARG void
270 #else
271 #define ACE_PROBE_ARG struct net_device *dev
272 #endif
273
274 #define ACE_MAX_MOD_PARMS 8
275 #define BOARD_IDX_STATIC 0
276 #define BOARD_IDX_OVERFLOW -1
277
278
279 #include "acenic.h"
280
281 /*
282 * These must be defined before the firmware is included.
283 */
284 #define MAX_TEXT_LEN 96*1024
285 #define MAX_RODATA_LEN 8*1024
286 #define MAX_DATA_LEN 2*1024
287
288 #include "acenic_firmware.h"
289
290 #ifndef tigon2FwReleaseLocal
291 #define tigon2FwReleaseLocal 0
292 #endif
293
294 /*
295 * This driver currently supports Tigon I and Tigon II based cards
296 * including the Alteon AceNIC, the 3Com 3C985[B] and NetGear
297 * GA620. The driver should also work on the SGI, DEC and Farallon
298 * versions of the card, however I have not been able to test that
299 * myself.
300 *
301 * This card is really neat, it supports receive hardware checksumming
302 * and jumbo frames (up to 9000 bytes) and does a lot of work in the
303 * firmware. Also the programming interface is quite neat, except for
304 * the parts dealing with the i2c eeprom on the card ;-)
305 *
306 * Using jumbo frames:
307 *
308 * To enable jumbo frames, simply specify an mtu between 1500 and 9000
309 * bytes to ifconfig. Jumbo frames can be enabled or disabled at any time
310 * by running `ifconfig eth<X> mtu <MTU>' with <X> being the Ethernet
311 * interface number and <MTU> being the MTU value.
312 *
313 * Module parameters:
314 *
315 * When compiled as a loadable module, the driver allows for a number
316 * of module parameters to be specified. The driver supports the
317 * following module parameters:
318 *
319 * trace=<val> - Firmware trace level. This requires special traced
320 * firmware to replace the firmware supplied with
321 * the driver - for debugging purposes only.
322 *
323 * link=<val> - Link state. Normally you want to use the default link
324 * parameters set by the driver. This can be used to
325 * override these in case your switch doesn't negotiate
326 * the link properly. Valid values are:
327 * 0x0001 - Force half duplex link.
328 * 0x0002 - Do not negotiate line speed with the other end.
329 * 0x0010 - 10Mbit/sec link.
330 * 0x0020 - 100Mbit/sec link.
331 * 0x0040 - 1000Mbit/sec link.
332 * 0x0100 - Do not negotiate flow control.
333 * 0x0200 - Enable RX flow control Y
334 * 0x0400 - Enable TX flow control Y (Tigon II NICs only).
335 * Default value is 0x0270, ie. enable link+flow
336 * control negotiation. Negotiating the highest
337 * possible link speed with RX flow control enabled.
338 *
339 * When disabling link speed negotiation, only one link
340 * speed is allowed to be specified!
341 *
342 * tx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
343 * to wait for more packets to arive before
344 * interrupting the host, from the time the first
345 * packet arrives.
346 *
347 * rx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
348 * to wait for more packets to arive in the transmit ring,
349 * before interrupting the host, after transmitting the
350 * first packet in the ring.
351 *
352 * max_tx_desc=<val> - maximum number of transmit descriptors
353 * (packets) transmitted before interrupting the host.
354 *
355 * max_rx_desc=<val> - maximum number of receive descriptors
356 * (packets) received before interrupting the host.
357 *
358 * tx_ratio=<val> - 7 bit value (0 - 63) specifying the split in 64th
359 * increments of the NIC's on board memory to be used for
360 * transmit and receive buffers. For the 1MB NIC app. 800KB
361 * is available, on the 1/2MB NIC app. 300KB is available.
362 * 68KB will always be available as a minimum for both
363 * directions. The default value is a 50/50 split.
364 * dis_pci_mem_inval=<val> - disable PCI memory write and invalidate
365 * operations, default (1) is to always disable this as
366 * that is what Alteon does on NT. I have not been able
367 * to measure any real performance differences with
368 * this on my systems. Set <val>=0 if you want to
369 * enable these operations.
370 *
371 * If you use more than one NIC, specify the parameters for the
372 * individual NICs with a comma, ie. trace=0,0x00001fff,0 you want to
373 * run tracing on NIC #2 but not on NIC #1 and #3.
374 *
375 * TODO:
376 *
377 * - Proper multicast support.
378 * - NIC dump support.
379 * - More tuning parameters.
380 *
381 * The mini ring is not used under Linux and I am not sure it makes sense
382 * to actually use it.
383 *
384 * New interrupt handler strategy:
385 *
386 * The old interrupt handler worked using the traditional method of
387 * replacing an skbuff with a new one when a packet arrives. However
388 * the rx rings do not need to contain a static number of buffer
389 * descriptors, thus it makes sense to move the memory allocation out
390 * of the main interrupt handler and do it in a bottom half handler
391 * and only allocate new buffers when the number of buffers in the
392 * ring is below a certain threshold. In order to avoid starving the
393 * NIC under heavy load it is however necessary to force allocation
394 * when hitting a minimum threshold. The strategy for alloction is as
395 * follows:
396 *
397 * RX_LOW_BUF_THRES - allocate buffers in the bottom half
398 * RX_PANIC_LOW_THRES - we are very low on buffers, allocate
399 * the buffers in the interrupt handler
400 * RX_RING_THRES - maximum number of buffers in the rx ring
401 * RX_MINI_THRES - maximum number of buffers in the mini ring
402 * RX_JUMBO_THRES - maximum number of buffers in the jumbo ring
403 *
404 * One advantagous side effect of this allocation approach is that the
405 * entire rx processing can be done without holding any spin lock
406 * since the rx rings and registers are totally independant of the tx
407 * ring and its registers. This of course includes the kmalloc's of
408 * new skb's. Thus start_xmit can run in parallel with rx processing
409 * and the memory allocation on SMP systems.
410 *
411 * Note that running the skb reallocation in a bottom half opens up
412 * another can of races which needs to be handled properly. In
413 * particular it can happen that the interrupt handler tries to run
414 * the reallocation while the bottom half is either running on another
415 * CPU or was interrupted on the same CPU. To get around this the
416 * driver uses bitops to prevent the reallocation routines from being
417 * reentered.
418 *
419 * TX handling can also be done without holding any spin lock, wheee
420 * this is fun! since tx_ret_csm is only written to by the interrupt
421 * handler. The case to be aware of is when shutting down the device
422 * and cleaning up where it is necessary to make sure that
423 * start_xmit() is not running while this is happening. Well DaveM
424 * informs me that this case is already protected against ... bye bye
425 * Mr. Spin Lock, it was nice to know you.
426 *
427 * TX interrupts are now partly disabled so the NIC will only generate
428 * TX interrupts for the number of coal ticks, not for the number of
429 * TX packets in the queue. This should reduce the number of TX only,
430 * ie. when no RX processing is done, interrupts seen.
431 */
432
433 /*
434 * Threshold values for RX buffer allocation - the low water marks for
435 * when to start refilling the rings are set to 75% of the ring
436 * sizes. It seems to make sense to refill the rings entirely from the
437 * intrrupt handler once it gets below the panic threshold, that way
438 * we don't risk that the refilling is moved to another CPU when the
439 * one running the interrupt handler just got the slab code hot in its
440 * cache.
441 */
442 #define RX_RING_SIZE 72
443 #define RX_MINI_SIZE 64
444 #define RX_JUMBO_SIZE 48
445
446 #define RX_PANIC_STD_THRES 16
447 #define RX_PANIC_STD_REFILL (3*RX_PANIC_STD_THRES)/2
448 #define RX_LOW_STD_THRES (3*RX_RING_SIZE)/4
449 #define RX_PANIC_MINI_THRES 12
450 #define RX_PANIC_MINI_REFILL (3*RX_PANIC_MINI_THRES)/2
451 #define RX_LOW_MINI_THRES (3*RX_MINI_SIZE)/4
452 #define RX_PANIC_JUMBO_THRES 6
453 #define RX_PANIC_JUMBO_REFILL (3*RX_PANIC_JUMBO_THRES)/2
454 #define RX_LOW_JUMBO_THRES (3*RX_JUMBO_SIZE)/4
455
456
457 /*
458 * Size of the mini ring entries, basically these just should be big
459 * enough to take TCP ACKs
460 */
461 #define ACE_MINI_SIZE 100
462
463 #define ACE_MINI_BUFSIZE (ACE_MINI_SIZE + 2 + 16)
464 #define ACE_STD_BUFSIZE (ACE_STD_MTU + ETH_HLEN + 2+4+16)
465 #define ACE_JUMBO_BUFSIZE (ACE_JUMBO_MTU + ETH_HLEN + 2+4+16)
466
467 /*
468 * There seems to be a magic difference in the effect between 995 and 996
469 * but little difference between 900 and 995 ... no idea why.
470 *
471 * There is now a default set of tuning parameters which is set, depending
472 * on whether or not the user enables Jumbo frames. It's assumed that if
473 * Jumbo frames are enabled, the user wants optimal tuning for that case.
474 */
475 #define DEF_TX_COAL 400 /* 996 */
476 #define DEF_TX_MAX_DESC 60 /* was 40 */
477 #define DEF_RX_COAL 120 /* 1000 */
478 #define DEF_RX_MAX_DESC 25
479 #define DEF_TX_RATIO 21 /* 24 */
480
481 #define DEF_JUMBO_TX_COAL 20
482 #define DEF_JUMBO_TX_MAX_DESC 60
483 #define DEF_JUMBO_RX_COAL 30
484 #define DEF_JUMBO_RX_MAX_DESC 6
485 #define DEF_JUMBO_TX_RATIO 21
486
487 #if tigon2FwReleaseLocal < 20001118
488 /*
489 * Standard firmware and early modifications duplicate
490 * IRQ load without this flag (coal timer is never reset).
491 * Note that with this flag tx_coal should be less than
492 * time to xmit full tx ring.
493 * 400usec is not so bad for tx ring size of 128.
494 */
495 #define TX_COAL_INTS_ONLY 1 /* worth it */
496 #else
497 /*
498 * With modified firmware, this is not necessary, but still useful.
499 */
500 #define TX_COAL_INTS_ONLY 1
501 #endif
502
503 #define DEF_TRACE 0
504 #define DEF_STAT (2 * TICKS_PER_SEC)
505
506
507 static int link[ACE_MAX_MOD_PARMS];
508 static int trace[ACE_MAX_MOD_PARMS];
509 static int tx_coal_tick[ACE_MAX_MOD_PARMS];
510 static int rx_coal_tick[ACE_MAX_MOD_PARMS];
511 static int max_tx_desc[ACE_MAX_MOD_PARMS];
512 static int max_rx_desc[ACE_MAX_MOD_PARMS];
513 static int tx_ratio[ACE_MAX_MOD_PARMS];
514 static int dis_pci_mem_inval[ACE_MAX_MOD_PARMS] = {1, 1, 1, 1, 1, 1, 1, 1};
515
516 static char version[] __initdata =
517 "acenic.c: v0.81 04/20/2001 Jes Sorensen, linux-acenic@SunSITE.dk\n"
518 " http://home.cern.ch/~jes/gige/acenic.html\n";
519
520 static struct net_device *root_dev;
521
522 static int probed __initdata = 0;
523
524
525 int __devinit acenic_probe (ACE_PROBE_ARG)
526 {
527 #ifdef NEW_NETINIT
528 struct net_device *dev;
529 #endif
530
531 struct ace_private *ap;
532 struct pci_dev *pdev = NULL;
533 int boards_found = 0;
534 int version_disp;
535
536 if (probed)
537 return -ENODEV;
538 probed++;
539
540 if (!pci_present()) /* is PCI support present? */
541 return -ENODEV;
542
543 version_disp = 0;
544
545 while ((pdev = pci_find_class(PCI_CLASS_NETWORK_ETHERNET<<8, pdev))) {
546
547 if (!((pdev->vendor == PCI_VENDOR_ID_ALTEON) &&
548 ((pdev->device == PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE) ||
549 (pdev->device == PCI_DEVICE_ID_ALTEON_ACENIC_COPPER)))&&
550 !((pdev->vendor == PCI_VENDOR_ID_3COM) &&
551 (pdev->device == PCI_DEVICE_ID_3COM_3C985)) &&
552 !((pdev->vendor == PCI_VENDOR_ID_NETGEAR) &&
553 ((pdev->device == PCI_DEVICE_ID_NETGEAR_GA620) ||
554 (pdev->device == PCI_DEVICE_ID_NETGEAR_GA620T))) &&
555 /*
556 * Farallon used the DEC vendor ID on their cards by
557 * mistake for a while
558 */
559 !((pdev->vendor == PCI_VENDOR_ID_DEC) &&
560 (pdev->device == PCI_DEVICE_ID_FARALLON_PN9000SX)) &&
561 !((pdev->vendor == PCI_VENDOR_ID_SGI) &&
562 (pdev->device == PCI_DEVICE_ID_SGI_ACENIC)))
563 continue;
564
565 dev = init_etherdev(NULL, sizeof(struct ace_private));
566
567 if (dev == NULL) {
568 printk(KERN_ERR "acenic: Unable to allocate "
569 "net_device structure!\n");
570 break;
571 }
572
573 SET_MODULE_OWNER(dev);
574
575 if (!dev->priv)
576 dev->priv = kmalloc(sizeof(*ap), GFP_KERNEL);
577 if (!dev->priv) {
578 printk(KERN_ERR "acenic: Unable to allocate memory\n");
579 return -ENOMEM;
580 }
581
582 ap = dev->priv;
583 ap->pdev = pdev;
584
585 dev->irq = pdev->irq;
586 dev->open = &ace_open;
587 dev->hard_start_xmit = &ace_start_xmit;
588 dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_HIGHDMA;
589 if (1) {
590 static void ace_watchdog(struct net_device *dev);
591 dev->tx_timeout = &ace_watchdog;
592 dev->watchdog_timeo = 5*HZ;
593 }
594 dev->stop = &ace_close;
595 dev->get_stats = &ace_get_stats;
596 dev->set_multicast_list = &ace_set_multicast_list;
597 dev->do_ioctl = &ace_ioctl;
598 dev->set_mac_address = &ace_set_mac_addr;
599 dev->change_mtu = &ace_change_mtu;
600
601 /* display version info if adapter is found */
602 if (!version_disp)
603 {
604 /* set display flag to TRUE so that */
605 /* we only display this string ONCE */
606 version_disp = 1;
607 printk(version);
608 }
609
610 /*
611 * Enable master mode before we start playing with the
612 * pci_command word since pci_set_master() will modify
613 * it.
614 */
615 pci_set_master(pdev);
616
617 pci_read_config_word(pdev, PCI_COMMAND, &ap->pci_command);
618
619 /* OpenFirmware on Mac's does not set this - DOH.. */
620 if (!(ap->pci_command & PCI_COMMAND_MEMORY)) {
621 printk(KERN_INFO "%s: Enabling PCI Memory Mapped "
622 "access - was not enabled by BIOS/Firmware\n",
623 dev->name);
624 ap->pci_command = ap->pci_command | PCI_COMMAND_MEMORY;
625 pci_write_config_word(ap->pdev, PCI_COMMAND,
626 ap->pci_command);
627 wmb();
628 }
629
630 pci_read_config_byte(pdev, PCI_LATENCY_TIMER,
631 &ap->pci_latency);
632 if (ap->pci_latency <= 0x40) {
633 ap->pci_latency = 0x40;
634 pci_write_config_byte(pdev, PCI_LATENCY_TIMER,
635 ap->pci_latency);
636 }
637
638 /*
639 * Remap the regs into kernel space - this is abuse of
640 * dev->base_addr since it was means for I/O port
641 * addresses but who gives a damn.
642 */
643 dev->base_addr = pci_resource_start(pdev, 0);
644 ap->regs = (struct ace_regs *)ioremap(dev->base_addr, 0x4000);
645 if (!ap->regs) {
646 printk(KERN_ERR "%s: Unable to map I/O register, "
647 "AceNIC %i will be disabled.\n",
648 dev->name, boards_found);
649 break;
650 }
651
652 switch(pdev->vendor) {
653 case PCI_VENDOR_ID_ALTEON:
654 strncpy(ap->name, "AceNIC Gigabit Ethernet",
655 sizeof (ap->name));
656 printk(KERN_INFO "%s: Alteon AceNIC ", dev->name);
657 break;
658 case PCI_VENDOR_ID_3COM:
659 strncpy(ap->name, "3Com 3C985 Gigabit Ethernet",
660 sizeof (ap->name));
661 printk(KERN_INFO "%s: 3Com 3C985 ", dev->name);
662 break;
663 case PCI_VENDOR_ID_NETGEAR:
664 strncpy(ap->name, "NetGear GA620 Gigabit Ethernet",
665 sizeof (ap->name));
666 printk(KERN_INFO "%s: NetGear GA620 ", dev->name);
667 break;
668 case PCI_VENDOR_ID_DEC:
669 if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9000SX) {
670 strncpy(ap->name, "Farallon PN9000-SX "
671 "Gigabit Ethernet", sizeof (ap->name));
672 printk(KERN_INFO "%s: Farallon PN9000-SX ",
673 dev->name);
674 break;
675 }
676 case PCI_VENDOR_ID_SGI:
677 strncpy(ap->name, "SGI AceNIC Gigabit Ethernet",
678 sizeof (ap->name));
679 printk(KERN_INFO "%s: SGI AceNIC ", dev->name);
680 break;
681 default:
682 strncpy(ap->name, "Unknown AceNIC based Gigabit "
683 "Ethernet", sizeof (ap->name));
684 printk(KERN_INFO "%s: Unknown AceNIC ", dev->name);
685 break;
686 }
687 ap->name [sizeof (ap->name) - 1] = '\0';
688 printk("Gigabit Ethernet at 0x%08lx, ", dev->base_addr);
689 #ifdef __sparc__
690 printk("irq %s\n", __irq_itoa(dev->irq));
691 #else
692 printk("irq %i\n", dev->irq);
693 #endif
694
695 #ifdef CONFIG_ACENIC_OMIT_TIGON_I
696 if ((readl(&ap->regs->HostCtrl) >> 28) == 4) {
697 printk(KERN_ERR "%s: Driver compiled without Tigon I"
698 " support - NIC disabled\n", dev->name);
699 ace_init_cleanup(dev);
700 kfree(dev);
701 continue;
702 }
703 #endif
704
705 if (ace_allocate_descriptors(dev)) {
706 /*
707 * ace_allocate_descriptors() calls
708 * ace_init_cleanup() on error.
709 */
710 kfree(dev);
711 continue;
712 }
713
714 #ifdef MODULE
715 if (boards_found >= ACE_MAX_MOD_PARMS)
716 ap->board_idx = BOARD_IDX_OVERFLOW;
717 else
718 ap->board_idx = boards_found;
719 #else
720 ap->board_idx = BOARD_IDX_STATIC;
721 #endif
722
723 if (ace_init(dev)) {
724 /*
725 * ace_init() calls ace_init_cleanup() on error.
726 */
727 kfree(dev);
728 continue;
729 }
730
731 boards_found++;
732 }
733
734 /*
735 * If we're at this point we're going through ace_probe() for
736 * the first time. Return success (0) if we've initialized 1
737 * or more boards. Otherwise, return failure (-ENODEV).
738 */
739
740 if (boards_found > 0)
741 return 0;
742 else
743 return -ENODEV;
744 }
745
746
747 #ifdef MODULE
748 MODULE_AUTHOR("Jes Sorensen <jes@trained-monkey.org>");
749 MODULE_DESCRIPTION("AceNIC/3C985/GA620 Gigabit Ethernet driver");
750 MODULE_PARM(link, "1-" __MODULE_STRING(8) "i");
751 MODULE_PARM(trace, "1-" __MODULE_STRING(8) "i");
752 MODULE_PARM(tx_coal_tick, "1-" __MODULE_STRING(8) "i");
753 MODULE_PARM(max_tx_desc, "1-" __MODULE_STRING(8) "i");
754 MODULE_PARM(rx_coal_tick, "1-" __MODULE_STRING(8) "i");
755 MODULE_PARM(max_rx_desc, "1-" __MODULE_STRING(8) "i");
756 #endif
757
758
759 static void __exit ace_module_cleanup(void)
760 {
761 struct ace_private *ap;
762 struct ace_regs *regs;
763 struct net_device *next;
764 short i;
765
766 while (root_dev) {
767 ap = root_dev->priv;
768 next = ap->next;
769
770 regs = ap->regs;
771
772 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
773 if (ap->version >= 2)
774 writel(readl(®s->CpuBCtrl) | CPU_HALT,
775 ®s->CpuBCtrl);
776 /*
777 * This clears any pending interrupts
778 */
779 writel(1, ®s->Mb0Lo);
780
781 /*
782 * Make sure no other CPUs are processing interrupts
783 * on the card before the buffers are being released.
784 * Otherwise one might experience some `interesting'
785 * effects.
786 *
787 * Then release the RX buffers - jumbo buffers were
788 * already released in ace_close().
789 */
790 synchronize_irq();
791
792 for (i = 0; i < RX_STD_RING_ENTRIES; i++) {
793 struct sk_buff *skb = ap->skb->rx_std_skbuff[i].skb;
794
795 if (skb) {
796 #ifndef DUMMY_PCI_UNMAP
797 dma_addr_t mapping;
798
799 mapping = ap->skb->rx_std_skbuff[i].mapping;
800 pci_unmap_single(ap->pdev, mapping,
801 ACE_STD_BUFSIZE - (2 + 16),
802 PCI_DMA_FROMDEVICE);
803 #endif
804
805 ap->rx_std_ring[i].size = 0;
806 ap->skb->rx_std_skbuff[i].skb = NULL;
807 dev_kfree_skb(skb);
808 }
809 }
810 if (ap->version >= 2) {
811 for (i = 0; i < RX_MINI_RING_ENTRIES; i++) {
812 struct sk_buff *skb = ap->skb->rx_mini_skbuff[i].skb;
813
814 if (skb) {
815 #ifndef DUMMY_PCI_UNMAP
816 dma_addr_t mapping;
817
818 mapping = ap->skb->rx_mini_skbuff[i].mapping;
819 pci_unmap_single(ap->pdev, mapping,
820 ACE_MINI_BUFSIZE - (2 + 16),
821 PCI_DMA_FROMDEVICE);
822 #endif
823 ap->rx_mini_ring[i].size = 0;
824 ap->skb->rx_mini_skbuff[i].skb = NULL;
825 dev_kfree_skb(skb);
826 }
827 }
828 }
829 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
830 struct sk_buff *skb = ap->skb->rx_jumbo_skbuff[i].skb;
831 if (skb) {
832 #ifndef DUMMY_PCI_UNMAP
833 dma_addr_t mapping;
834
835 mapping = ap->skb->rx_jumbo_skbuff[i].mapping;
836 pci_unmap_single(ap->pdev, mapping,
837 ACE_JUMBO_BUFSIZE - (2 + 16),
838 PCI_DMA_FROMDEVICE);
839 #endif
840
841 ap->rx_jumbo_ring[i].size = 0;
842 ap->skb->rx_jumbo_skbuff[i].skb = NULL;
843 dev_kfree_skb(skb);
844 }
845 }
846
847 ace_init_cleanup(root_dev);
848 kfree(root_dev);
849 root_dev = next;
850 }
851 }
852
853
854 int __init ace_module_init(void)
855 {
856 int status;
857
858 root_dev = NULL;
859
860 #ifdef NEW_NETINIT
861 status = acenic_probe();
862 #else
863 status = acenic_probe(NULL);
864 #endif
865 return status;
866 }
867
868
869 #if (LINUX_VERSION_CODE < 0x02032a)
870 #ifdef MODULE
871 int init_module(void)
872 {
873 return ace_module_init();
874 }
875
876
877 void cleanup_module(void)
878 {
879 ace_module_cleanup();
880 }
881 #endif
882 #else
883 module_init(ace_module_init);
884 module_exit(ace_module_cleanup);
885 #endif
886
887
888 static void ace_free_descriptors(struct net_device *dev)
889 {
890 struct ace_private *ap = dev->priv;
891 int size;
892
893 if (ap->rx_std_ring != NULL) {
894 size = (sizeof(struct rx_desc) *
895 (RX_STD_RING_ENTRIES +
896 RX_JUMBO_RING_ENTRIES +
897 RX_MINI_RING_ENTRIES +
898 RX_RETURN_RING_ENTRIES));
899 pci_free_consistent(ap->pdev, size,
900 ap->rx_std_ring,
901 ap->rx_ring_base_dma);
902 ap->rx_std_ring = NULL;
903 ap->rx_jumbo_ring = NULL;
904 ap->rx_mini_ring = NULL;
905 ap->rx_return_ring = NULL;
906 }
907 if (ap->evt_ring != NULL) {
908 size = (sizeof(struct event) * EVT_RING_ENTRIES);
909 pci_free_consistent(ap->pdev, size,
910 ap->evt_ring,
911 ap->evt_ring_dma);
912 ap->evt_ring = NULL;
913 }
914 if (ap->evt_prd != NULL) {
915 pci_free_consistent(ap->pdev, sizeof(u32),
916 (void *)ap->evt_prd, ap->evt_prd_dma);
917 ap->evt_prd = NULL;
918 }
919 if (ap->rx_ret_prd != NULL) {
920 pci_free_consistent(ap->pdev, sizeof(u32),
921 (void *)ap->rx_ret_prd, ap->rx_ret_prd_dma);
922 ap->rx_ret_prd = NULL;
923 }
924 if (ap->tx_csm != NULL) {
925 pci_free_consistent(ap->pdev, sizeof(u32),
926 (void *)ap->tx_csm, ap->tx_csm_dma);
927 ap->tx_csm = NULL;
928 }
929 }
930
931
932 static int ace_allocate_descriptors(struct net_device *dev)
933 {
934 struct ace_private *ap = dev->priv;
935 int size;
936
937 size = (sizeof(struct rx_desc) *
938 (RX_STD_RING_ENTRIES +
939 RX_JUMBO_RING_ENTRIES +
940 RX_MINI_RING_ENTRIES +
941 RX_RETURN_RING_ENTRIES));
942
943 ap->rx_std_ring = pci_alloc_consistent(ap->pdev, size,
944 &ap->rx_ring_base_dma);
945 if (ap->rx_std_ring == NULL)
946 goto fail;
947
948 ap->rx_jumbo_ring = ap->rx_std_ring + RX_STD_RING_ENTRIES;
949 ap->rx_mini_ring = ap->rx_jumbo_ring + RX_JUMBO_RING_ENTRIES;
950 ap->rx_return_ring = ap->rx_mini_ring + RX_MINI_RING_ENTRIES;
951
952 size = (sizeof(struct event) * EVT_RING_ENTRIES);
953
954 ap->evt_ring = pci_alloc_consistent(ap->pdev, size, &ap->evt_ring_dma);
955
956 if (ap->evt_ring == NULL)
957 goto fail;
958
959 size = (sizeof(struct tx_desc) * TX_RING_ENTRIES);
960
961 ap->tx_ring = pci_alloc_consistent(ap->pdev, size, &ap->tx_ring_dma);
962
963 if (ap->tx_ring == NULL)
964 goto fail;
965
966 ap->evt_prd = pci_alloc_consistent(ap->pdev, sizeof(u32),
967 &ap->evt_prd_dma);
968 if (ap->evt_prd == NULL)
969 goto fail;
970
971 ap->rx_ret_prd = pci_alloc_consistent(ap->pdev, sizeof(u32),
972 &ap->rx_ret_prd_dma);
973 if (ap->rx_ret_prd == NULL)
974 goto fail;
975
976 ap->tx_csm = pci_alloc_consistent(ap->pdev, sizeof(u32),
977 &ap->tx_csm_dma);
978 if (ap->tx_csm == NULL)
979 goto fail;
980
981 return 0;
982
983 fail:
984 /* Clean up. */
985 ace_init_cleanup(dev);
986 return 1;
987 }
988
989
990 /*
991 * Generic cleanup handling data allocated during init. Used when the
992 * module is unloaded or if an error occurs during initialization
993 */
994 static void ace_init_cleanup(struct net_device *dev)
995 {
996 struct ace_private *ap;
997
998 ap = dev->priv;
999
1000 ace_free_descriptors(dev);
1001
1002 if (ap->info)
1003 pci_free_consistent(ap->pdev, sizeof(struct ace_info),
1004 ap->info, ap->info_dma);
1005 if (ap->skb)
1006 kfree(ap->skb);
1007 if (ap->trace_buf)
1008 kfree(ap->trace_buf);
1009
1010 if (dev->irq)
1011 free_irq(dev->irq, dev);
1012
1013 unregister_netdev(dev);
1014 iounmap(ap->regs);
1015 }
1016
1017
1018 /*
1019 * Commands are considered to be slow.
1020 */
1021 static inline void ace_issue_cmd(struct ace_regs *regs, struct cmd *cmd)
1022 {
1023 u32 idx;
1024
1025 idx = readl(®s->CmdPrd);
1026
1027 writel(*(u32 *)(cmd), ®s->CmdRng[idx]);
1028 idx = (idx + 1) % CMD_RING_ENTRIES;
1029
1030 writel(idx, ®s->CmdPrd);
1031 }
1032
1033
1034 static int __init ace_init(struct net_device *dev)
1035 {
1036 struct ace_private *ap;
1037 struct ace_regs *regs;
1038 struct ace_info *info = NULL;
1039 unsigned long tmp_ptr, myjif;
1040 u32 tig_ver, mac1, mac2, tmp, pci_state;
1041 int board_idx, ecode = 0;
1042 short i;
1043 unsigned char cache_size;
1044
1045 ap = dev->priv;
1046 regs = ap->regs;
1047
1048 board_idx = ap->board_idx;
1049
1050 /*
1051 * aman@sgi.com - its useful to do a NIC reset here to
1052 * address the `Firmware not running' problem subsequent
1053 * to any crashes involving the NIC
1054 */
1055 writel(HW_RESET | (HW_RESET << 24), ®s->HostCtrl);
1056 wmb();
1057
1058 /*
1059 * Don't access any other registes before this point!
1060 */
1061 #ifdef __BIG_ENDIAN
1062 /*
1063 * This will most likely need BYTE_SWAP once we switch
1064 * to using __raw_writel()
1065 */
1066 #ifdef __parisc__
1067 writel((WORD_SWAP | BYTE_SWAP | CLR_INT |
1068 ((WORD_SWAP | BYTE_SWAP | CLR_INT) << 24)),
1069 ®s->HostCtrl);
1070 #else
1071 writel((WORD_SWAP | CLR_INT | ((WORD_SWAP | CLR_INT) << 24)),
1072 ®s->HostCtrl);
1073 #endif
1074 #else
1075 writel((CLR_INT | WORD_SWAP | ((CLR_INT | WORD_SWAP) << 24)),
1076 ®s->HostCtrl);
1077 #endif
1078 mb();
1079
1080 /*
1081 * Stop the NIC CPU and clear pending interrupts
1082 */
1083 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
1084 writel(0, ®s->Mb0Lo);
1085
1086 tig_ver = readl(®s->HostCtrl) >> 28;
1087
1088 switch(tig_ver){
1089 #ifndef CONFIG_ACENIC_OMIT_TIGON_I
1090 case 4:
1091 printk(KERN_INFO " Tigon I (Rev. 4), Firmware: %i.%i.%i, ",
1092 tigonFwReleaseMajor, tigonFwReleaseMinor,
1093 tigonFwReleaseFix);
1094 writel(0, ®s->LocalCtrl);
1095 ap->version = 1;
1096 break;
1097 #endif
1098 case 6:
1099 printk(KERN_INFO " Tigon II (Rev. %i), Firmware: %i.%i.%i, ",
1100 tig_ver, tigon2FwReleaseMajor, tigon2FwReleaseMinor,
1101 tigon2FwReleaseFix);
1102 writel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl);
1103 /*
1104 * The SRAM bank size does _not_ indicate the amount
1105 * of memory on the card, it controls the _bank_ size!
1106 * Ie. a 1MB AceNIC will have two banks of 512KB.
1107 */
1108 writel(SRAM_BANK_512K, ®s->LocalCtrl);
1109 writel(SYNC_SRAM_TIMING, ®s->MiscCfg);
1110 ap->version = 2;
1111 break;
1112 default:
1113 printk(KERN_WARNING " Unsupported Tigon version detected "
1114 "(%i), ", tig_ver);
1115 ecode = -ENODEV;
1116 goto init_error;
1117 }
1118
1119 /*
1120 * ModeStat _must_ be set after the SRAM settings as this change
1121 * seems to corrupt the ModeStat and possible other registers.
1122 * The SRAM settings survive resets and setting it to the same
1123 * value a second time works as well. This is what caused the
1124 * `Firmware not running' problem on the Tigon II.
1125 */
1126 #ifdef __BIG_ENDIAN
1127 writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL | ACE_BYTE_SWAP_BD |
1128 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, ®s->ModeStat);
1129 #else
1130 writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL |
1131 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, ®s->ModeStat);
1132 #endif
1133 mb();
1134
1135 mac1 = 0;
1136 for(i = 0; i < 4; i++) {
1137 mac1 = mac1 << 8;
1138 tmp = read_eeprom_byte(dev, 0x8c+i);
1139 if (tmp < 0) {
1140 ecode = -EIO;
1141 goto init_error;
1142 } else
1143 mac1 |= (tmp & 0xff);
1144 }
1145 mac2 = 0;
1146 for(i = 4; i < 8; i++) {
1147 mac2 = mac2 << 8;
1148 tmp = read_eeprom_byte(dev, 0x8c+i);
1149 if (tmp < 0) {
1150 ecode = -EIO;
1151 goto init_error;
1152 } else
1153 mac2 |= (tmp & 0xff);
1154 }
1155
1156 writel(mac1, ®s->MacAddrHi);
1157 writel(mac2, ®s->MacAddrLo);
1158
1159 printk("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
1160 (mac1 >> 8) & 0xff, mac1 & 0xff, (mac2 >> 24) &0xff,
1161 (mac2 >> 16) & 0xff, (mac2 >> 8) & 0xff, mac2 & 0xff);
1162
1163 dev->dev_addr[0] = (mac1 >> 8) & 0xff;
1164 dev->dev_addr[1] = mac1 & 0xff;
1165 dev->dev_addr[2] = (mac2 >> 24) & 0xff;
1166 dev->dev_addr[3] = (mac2 >> 16) & 0xff;
1167 dev->dev_addr[4] = (mac2 >> 8) & 0xff;
1168 dev->dev_addr[5] = mac2 & 0xff;
1169
1170 /*
1171 * Looks like this is necessary to deal with on all architectures,
1172 * even this %$#%$# N440BX Intel based thing doesn't get it right.
1173 * Ie. having two NICs in the machine, one will have the cache
1174 * line set at boot time, the other will not.
1175 */
1176 pci_read_config_byte(ap->pdev, PCI_CACHE_LINE_SIZE, &cache_size);
1177 cache_size <<= 2;
1178 if (cache_size != SMP_CACHE_BYTES) {
1179 printk(KERN_INFO " PCI cache line size set incorrectly "
1180 "(%i bytes) by BIOS/FW, ", cache_size);
1181 if (cache_size > SMP_CACHE_BYTES)
1182 printk("expecting %i\n", SMP_CACHE_BYTES);
1183 else {
1184 printk("correcting to %i\n", SMP_CACHE_BYTES);
1185 pci_write_config_byte(ap->pdev, PCI_CACHE_LINE_SIZE,
1186 SMP_CACHE_BYTES >> 2);
1187 }
1188 }
1189
1190 pci_state = readl(®s->PciState);
1191 printk(KERN_INFO " PCI bus width: %i bits, speed: %iMHz, "
1192 "latency: %i clks\n",
1193 (pci_state & PCI_32BIT) ? 32 : 64,
1194 (pci_state & PCI_66MHZ) ? 66 : 33,
1195 ap->pci_latency);
1196
1197 /*
1198 * Make sure to enable the 64 bit DMA mask if we're in a 64bit slot
1199 */
1200 if (!(pci_state & PCI_32BIT))
1201 pci_set_dma_mask(ap->pdev, (dma_addr_t)~0ULL);
1202
1203 /*
1204 * Set the max DMA transfer size. Seems that for most systems
1205 * the performance is better when no MAX parameter is
1206 * set. However for systems enabling PCI write and invalidate,
1207 * DMA writes must be set to the L1 cache line size to get
1208 * optimal performance.
1209 *
1210 * The default is now to turn the PCI write and invalidate off
1211 * - that is what Alteon does for NT.
1212 */
1213 tmp = READ_CMD_MEM | WRITE_CMD_MEM;
1214 if (ap->version >= 2) {
1215 tmp |= (MEM_READ_MULTIPLE | (pci_state & PCI_66MHZ));
1216 /*
1217 * Tuning parameters only supported for 8 cards
1218 */
1219 if (board_idx == BOARD_IDX_OVERFLOW ||
1220 dis_pci_mem_inval[board_idx]) {
1221 if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1222 ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1223 pci_write_config_word(ap->pdev, PCI_COMMAND,
1224 ap->pci_command);
1225 printk(KERN_INFO " Disabling PCI memory "
1226 "write and invalidate\n");
1227 }
1228 } else if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1229 printk(KERN_INFO " PCI memory write & invalidate "
1230 "enabled by BIOS, enabling counter measures\n");
1231
1232 switch(SMP_CACHE_BYTES) {
1233 case 16:
1234 tmp |= DMA_WRITE_MAX_16;
1235 break;
1236 case 32:
1237 tmp |= DMA_WRITE_MAX_32;
1238 break;
1239 case 64:
1240 tmp |= DMA_WRITE_MAX_64;
1241 break;
1242 case 128:
1243 tmp |= DMA_WRITE_MAX_128;
1244 break;
1245 default:
1246 printk(KERN_INFO " Cache line size %i not "
1247 "supported, PCI write and invalidate "
1248 "disabled\n", SMP_CACHE_BYTES);
1249 ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1250 pci_write_config_word(ap->pdev, PCI_COMMAND,
1251 ap->pci_command);
1252 }
1253 }
1254 }
1255
1256 #ifdef __sparc__
1257 /*
1258 * On this platform, we know what the best dma settings
1259 * are. We use 64-byte maximum bursts, because if we
1260 * burst larger than the cache line size (or even cross
1261 * a 64byte boundry in a single burst) the UltraSparc
1262 * PCI controller will disconnect at 64-byte multiples.
1263 *
1264 * Read-multiple will be properly enabled above, and when
1265 * set will give the PCI controller proper hints about
1266 * prefetching.
1267 */
1268 tmp &= ~DMA_READ_WRITE_MASK;
1269 tmp |= DMA_READ_MAX_64;
1270 tmp |= DMA_WRITE_MAX_64;
1271 #endif
1272 #ifdef __alpha__
1273 tmp &= ~DMA_READ_WRITE_MASK;
1274 tmp |= DMA_READ_MAX_128;
1275 /*
1276 * All the docs sy MUST NOT. Well, I did.
1277 * Nothing terrible happens, if we load wrong size.
1278 * Bit w&i still works better!
1279 */
1280 tmp |= DMA_WRITE_MAX_128;
1281 #endif
1282 writel(tmp, ®s->PciState);
1283
1284 #if 0
1285 /*
1286 * I have received reports from people having problems when this
1287 * bit is enabled.
1288 */
1289 if (!(ap->pci_command & PCI_COMMAND_FAST_BACK)) {
1290 printk(KERN_INFO " Enabling PCI Fast Back to Back\n");
1291 ap->pci_command |= PCI_COMMAND_FAST_BACK;
1292 pci_write_config_word(ap->pdev, PCI_COMMAND, ap->pci_command);
1293 }
1294 #endif
1295
1296 /*
1297 * Initialize the generic info block and the command+event rings
1298 * and the control blocks for the transmit and receive rings
1299 * as they need to be setup once and for all.
1300 */
1301 if (!(info = pci_alloc_consistent(ap->pdev, sizeof(struct ace_info),
1302 &ap->info_dma))) {
1303 ecode = -EAGAIN;
1304 goto init_error;
1305 }
1306 ap->info = info;
1307
1308 /*
1309 * Get the memory for the skb rings.
1310 */
1311 if (!(ap->skb = kmalloc(sizeof(struct ace_skb), GFP_KERNEL))) {
1312 ecode = -EAGAIN;
1313 goto init_error;
1314 }
1315
1316 ecode = request_irq(dev->irq, ace_interrupt, SA_SHIRQ, dev->name, dev);
1317 if (ecode) {
1318 printk(KERN_WARNING "%s: Requested IRQ %d is busy\n",
1319 dev->name, dev->irq);
1320 goto init_error;
1321 }
1322
1323 /*
1324 * Register the device here to be able to catch allocated
1325 * interrupt handlers in case the firmware doesn't come up.
1326 */
1327 ap->next = root_dev;
1328 root_dev = dev;
1329
1330 #ifdef INDEX_DEBUG
1331 spin_lock_init(&ap->debug_lock);
1332 ap->last_tx = TX_RING_ENTRIES - 1;
1333 ap->last_std_rx = 0;
1334 ap->last_mini_rx = 0;
1335 #endif
1336
1337 memset(ap->info, 0, sizeof(struct ace_info));
1338 memset(ap->skb, 0, sizeof(struct ace_skb));
1339
1340 ace_load_firmware(dev);
1341 ap->fw_running = 0;
1342
1343 tmp_ptr = (unsigned long) ap->info_dma;
1344 #ifdef ACE_64BIT_PTR
1345 writel(tmp_ptr >> 32, ®s->InfoPtrHi);
1346 #else
1347 writel(0, ®s->InfoPtrHi);
1348 #endif
1349 writel(tmp_ptr & 0xffffffff, ®s->InfoPtrLo);
1350
1351 memset(ap->evt_ring, 0, EVT_RING_ENTRIES * sizeof(struct event));
1352
1353 set_aceaddr(&info->evt_ctrl.rngptr, ap->evt_ring_dma);
1354 info->evt_ctrl.flags = 0;
1355
1356 set_aceaddr(&info->evt_prd_ptr, ap->evt_prd_dma);
1357 *(ap->evt_prd) = 0;
1358 wmb();
1359 writel(0, ®s->EvtCsm);
1360
1361 set_aceaddr(&info->cmd_ctrl.rngptr, 0x100);
1362 info->cmd_ctrl.flags = 0;
1363 info->cmd_ctrl.max_len = 0;
1364
1365 for (i = 0; i < CMD_RING_ENTRIES; i++)
1366 writel(0, ®s->CmdRng[i]);
1367
1368 writel(0, ®s->CmdPrd);
1369 writel(0, ®s->CmdCsm);
1370
1371 tmp_ptr = ap->info_dma;
1372 tmp_ptr += (unsigned long) &(((struct ace_info *)0)->s.stats);
1373 set_aceaddr(&info->stats2_ptr, (dma_addr_t) tmp_ptr);
1374
1375 set_aceaddr(&info->rx_std_ctrl.rngptr, ap->rx_ring_base_dma);
1376 info->rx_std_ctrl.max_len = ACE_STD_MTU + ETH_HLEN + 4;
1377 info->rx_std_ctrl.flags = RCB_FLG_TCP_UDP_SUM|RCB_FLG_NO_PSEUDO_HDR;
1378
1379 memset(ap->rx_std_ring, 0,
1380 RX_STD_RING_ENTRIES * sizeof(struct rx_desc));
1381
1382 for (i = 0; i < RX_STD_RING_ENTRIES; i++)
1383 ap->rx_std_ring[i].flags = BD_FLG_TCP_UDP_SUM;
1384
1385 ap->rx_std_skbprd = 0;
1386 atomic_set(&ap->cur_rx_bufs, 0);
1387
1388 set_aceaddr(&info->rx_jumbo_ctrl.rngptr,
1389 (ap->rx_ring_base_dma +
1390 (sizeof(struct rx_desc) * RX_STD_RING_ENTRIES)));
1391 info->rx_jumbo_ctrl.max_len = 0;
1392 info->rx_jumbo_ctrl.flags = RCB_FLG_TCP_UDP_SUM|RCB_FLG_NO_PSEUDO_HDR;
1393
1394 memset(ap->rx_jumbo_ring, 0,
1395 RX_JUMBO_RING_ENTRIES * sizeof(struct rx_desc));
1396
1397 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++)
1398 ap->rx_jumbo_ring[i].flags = BD_FLG_TCP_UDP_SUM | BD_FLG_JUMBO;
1399
1400 ap->rx_jumbo_skbprd = 0;
1401 atomic_set(&ap->cur_jumbo_bufs, 0);
1402
1403 memset(ap->rx_mini_ring, 0,
1404 RX_MINI_RING_ENTRIES * sizeof(struct rx_desc));
1405
1406 if (ap->version >= 2) {
1407 set_aceaddr(&info->rx_mini_ctrl.rngptr,
1408 (ap->rx_ring_base_dma +
1409 (sizeof(struct rx_desc) *
1410 (RX_STD_RING_ENTRIES +
1411 RX_JUMBO_RING_ENTRIES))));
1412 info->rx_mini_ctrl.max_len = ACE_MINI_SIZE;
1413 info->rx_mini_ctrl.flags = RCB_FLG_TCP_UDP_SUM|RCB_FLG_NO_PSEUDO_HDR;
1414
1415 for (i = 0; i < RX_MINI_RING_ENTRIES; i++)
1416 ap->rx_mini_ring[i].flags =
1417 BD_FLG_TCP_UDP_SUM | BD_FLG_MINI;
1418 } else {
1419 set_aceaddr(&info->rx_mini_ctrl.rngptr, 0);
1420 info->rx_mini_ctrl.flags = RCB_FLG_RNG_DISABLE;
1421 info->rx_mini_ctrl.max_len = 0;
1422 }
1423
1424 ap->rx_mini_skbprd = 0;
1425 atomic_set(&ap->cur_mini_bufs, 0);
1426
1427 set_aceaddr(&info->rx_return_ctrl.rngptr,
1428 (ap->rx_ring_base_dma +
1429 (sizeof(struct rx_desc) *
1430 (RX_STD_RING_ENTRIES +
1431 RX_JUMBO_RING_ENTRIES +
1432 RX_MINI_RING_ENTRIES))));
1433 info->rx_return_ctrl.flags = 0;
1434 info->rx_return_ctrl.max_len = RX_RETURN_RING_ENTRIES;
1435
1436 memset(ap->rx_return_ring, 0,
1437 RX_RETURN_RING_ENTRIES * sizeof(struct rx_desc));
1438
1439 set_aceaddr(&info->rx_ret_prd_ptr, ap->rx_ret_prd_dma);
1440 *(ap->rx_ret_prd) = 0;
1441
1442 writel(TX_RING_BASE, ®s->WinBase);
1443 memset(ap->tx_ring, 0, TX_RING_ENTRIES * sizeof(struct tx_desc));
1444
1445 set_aceaddr(&info->tx_ctrl.rngptr, ap->tx_ring_dma);
1446
1447 info->tx_ctrl.max_len = TX_RING_ENTRIES;
1448 tmp = RCB_FLG_TCP_UDP_SUM|RCB_FLG_NO_PSEUDO_HDR|RCB_FLG_TX_HOST_RING;
1449 #if TX_COAL_INTS_ONLY
1450 tmp |= RCB_FLG_COAL_INT_ONLY;
1451 #endif
1452 info->tx_ctrl.flags = tmp;
1453
1454 set_aceaddr(&info->tx_csm_ptr, ap->tx_csm_dma);
1455
1456 /*
1457 * Potential item for tuning parameter
1458 */
1459 #if 0 /* NO */
1460 writel(DMA_THRESH_16W, ®s->DmaReadCfg);
1461 writel(DMA_THRESH_16W, ®s->DmaWriteCfg);
1462 #else
1463 writel(DMA_THRESH_8W, ®s->DmaReadCfg);
1464 writel(DMA_THRESH_8W, ®s->DmaWriteCfg);
1465 #endif
1466
1467 writel(0, ®s->MaskInt);
1468 writel(1, ®s->IfIdx);
1469 writel(1, ®s->AssistState);
1470
1471 writel(DEF_STAT, ®s->TuneStatTicks);
1472 writel(DEF_TRACE, ®s->TuneTrace);
1473
1474 ace_set_rxtx_parms(dev, 0);
1475
1476 if (board_idx == BOARD_IDX_OVERFLOW) {
1477 printk(KERN_WARNING "%s: more then %i NICs detected, "
1478 "ignoring module parameters!\n",
1479 dev->name, ACE_MAX_MOD_PARMS);
1480 } else if (board_idx >= 0) {
1481 if (tx_coal_tick[board_idx])
1482 writel(tx_coal_tick[board_idx],
1483 ®s->TuneTxCoalTicks);
1484 if (max_tx_desc[board_idx])
1485 writel(max_tx_desc[board_idx], ®s->TuneMaxTxDesc);
1486
1487 if (rx_coal_tick[board_idx])
1488 writel(rx_coal_tick[board_idx],
1489 ®s->TuneRxCoalTicks);
1490 if (max_rx_desc[board_idx])
1491 writel(max_rx_desc[board_idx], ®s->TuneMaxRxDesc);
1492
1493 if (trace[board_idx])
1494 writel(trace[board_idx], ®s->TuneTrace);
1495
1496 if ((tx_ratio[board_idx] > 0) && (tx_ratio[board_idx] < 64))
1497 writel(tx_ratio[board_idx], ®s->TxBufRat);
1498 }
1499
1500 /*
1501 * Default link parameters
1502 */
1503 tmp = LNK_ENABLE | LNK_FULL_DUPLEX | LNK_1000MB | LNK_100MB |
1504 LNK_10MB | LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL | LNK_NEGOTIATE;
1505 if(ap->version >= 2)
1506 tmp |= LNK_TX_FLOW_CTL_Y;
1507
1508 /*
1509 * Override link default parameters
1510 */
1511 if ((board_idx >= 0) && link[board_idx]) {
1512 int option = link[board_idx];
1513
1514 tmp = LNK_ENABLE;
1515
1516 if (option & 0x01) {
1517 printk(KERN_INFO "%s: Setting half duplex link\n",
1518 dev->name);
1519 tmp &= ~LNK_FULL_DUPLEX;
1520 }
1521 if (option & 0x02)
1522 tmp &= ~LNK_NEGOTIATE;
1523 if (option & 0x10)
1524 tmp |= LNK_10MB;
1525 if (option & 0x20)
1526 tmp |= LNK_100MB;
1527 if (option & 0x40)
1528 tmp |= LNK_1000MB;
1529 if ((option & 0x70) == 0) {
1530 printk(KERN_WARNING "%s: No media speed specified, "
1531 "forcing auto negotiation\n", dev->name);
1532 tmp |= LNK_NEGOTIATE | LNK_1000MB |
1533 LNK_100MB | LNK_10MB;
1534 }
1535 if ((option & 0x100) == 0)
1536 tmp |= LNK_NEG_FCTL;
1537 else
1538 printk(KERN_INFO "%s: Disabling flow control "
1539 "negotiation\n", dev->name);
1540 if (option & 0x200)
1541 tmp |= LNK_RX_FLOW_CTL_Y;
1542 if ((option & 0x400) && (ap->version >= 2)) {
1543 printk(KERN_INFO "%s: Enabling TX flow control\n",
1544 dev->name);
1545 tmp |= LNK_TX_FLOW_CTL_Y;
1546 }
1547 }
1548
1549 ap->link = tmp;
1550 writel(tmp, ®s->TuneLink);
1551 if (ap->version >= 2)
1552 writel(tmp, ®s->TuneFastLink);
1553
1554 if (ACE_IS_TIGON_I(ap))
1555 writel(tigonFwStartAddr, ®s->Pc);
1556 if (ap->version == 2)
1557 writel(tigon2FwStartAddr, ®s->Pc);
1558
1559 writel(0, ®s->Mb0Lo);
1560
1561 /*
1562 * Set tx_csm before we start receiving interrupts, otherwise
1563 * the interrupt handler might think it is supposed to process
1564 * tx ints before we are up and running, which may cause a null
1565 * pointer access in the int handler.
1566 */
1567 ap->cur_rx = 0;
1568 ap->tx_prd = *(ap->tx_csm) = ap->tx_ret_csm = 0;
1569
1570 wmb();
1571 ace_set_txprd(regs, ap, 0);
1572 writel(0, ®s->RxRetCsm);
1573
1574 /*
1575 * Zero the stats before starting the interface
1576 */
1577 memset(&ap->stats, 0, sizeof(ap->stats));
1578
1579 /*
1580 * Start the NIC CPU
1581 */
1582 writel(readl(®s->CpuCtrl) & ~(CPU_HALT|CPU_TRACE), ®s->CpuCtrl);
1583
1584 /*
1585 * Wait for the firmware to spin up - max 3 seconds.
1586 */
1587 myjif = jiffies + 3 * HZ;
1588 while (time_before(jiffies, myjif) && !ap->fw_running);
1589
1590 if (!ap->fw_running) {
1591 printk(KERN_ERR "%s: Firmware NOT running!\n", dev->name);
1592
1593 ace_dump_trace(ap);
1594 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
1595
1596 /* aman@sgi.com - account for badly behaving firmware/NIC:
1597 * - have observed that the NIC may continue to generate
1598 * interrupts for some reason; attempt to stop it - halt
1599 * second CPU for Tigon II cards, and also clear Mb0
1600 * - if we're a module, we'll fail to load if this was
1601 * the only GbE card in the system => if the kernel does
1602 * see an interrupt from the NIC, code to handle it is
1603 * gone and OOps! - so free_irq also
1604 */
1605 if (ap->version >= 2)
1606 writel(readl(®s->CpuBCtrl) | CPU_HALT,
1607 ®s->CpuBCtrl);
1608 writel(0, ®s->Mb0Lo);
1609
1610 ecode = -EBUSY;
1611 goto init_error;
1612 }
1613
1614 /*
1615 * We load the ring here as there seem to be no way to tell the
1616 * firmware to wipe the ring without re-initializing it.
1617 */
1618 if (!test_and_set_bit(0, &ap->std_refill_busy))
1619 ace_load_std_rx_ring(ap, RX_RING_SIZE);
1620 else
1621 printk(KERN_ERR "%s: Someone is busy refilling the RX ring\n",
1622 dev->name);
1623 if (ap->version >= 2) {
1624 if (!test_and_set_bit(0, &ap->mini_refill_busy))
1625 ace_load_mini_rx_ring(ap, RX_MINI_SIZE);
1626 else
1627 printk(KERN_ERR "%s: Someone is busy refilling "
1628 "the RX mini ring\n", dev->name);
1629 }
1630 return 0;
1631
1632 init_error:
1633 ace_init_cleanup(dev);
1634 return ecode;
1635 }
1636
1637
1638 static void ace_set_rxtx_parms(struct net_device *dev, int jumbo)
1639 {
1640 struct ace_private *ap;
1641 struct ace_regs *regs;
1642 int board_idx;
1643
1644 ap = dev->priv;
1645 regs = ap->regs;
1646
1647 board_idx = ap->board_idx;
1648
1649 if (board_idx >= 0) {
1650 if (!jumbo) {
1651 if (!tx_coal_tick[board_idx])
1652 writel(DEF_TX_COAL, ®s->TuneTxCoalTicks);
1653 if (!max_tx_desc[board_idx])
1654 writel(DEF_TX_MAX_DESC, ®s->TuneMaxTxDesc);
1655 if (!rx_coal_tick[board_idx])
1656 writel(DEF_RX_COAL, ®s->TuneRxCoalTicks);
1657 if (!max_rx_desc[board_idx])
1658 writel(DEF_RX_MAX_DESC, ®s->TuneMaxRxDesc);
1659 if (!tx_ratio[board_idx])
1660 writel(DEF_TX_RATIO, ®s->TxBufRat);
1661 } else {
1662 if (!tx_coal_tick[board_idx])
1663 writel(DEF_JUMBO_TX_COAL,
1664 ®s->TuneTxCoalTicks);
1665 if (!max_tx_desc[board_idx])
1666 writel(DEF_JUMBO_TX_MAX_DESC,
1667 ®s->TuneMaxTxDesc);
1668 if (!rx_coal_tick[board_idx])
1669 writel(DEF_JUMBO_RX_COAL,
1670 ®s->TuneRxCoalTicks);
1671 if (!max_rx_desc[board_idx])
1672 writel(DEF_JUMBO_RX_MAX_DESC,
1673 ®s->TuneMaxRxDesc);
1674 if (!tx_ratio[board_idx])
1675 writel(DEF_JUMBO_TX_RATIO, ®s->TxBufRat);
1676 }
1677 }
1678 }
1679
1680
1681 static void ace_watchdog(struct net_device *data)
1682 {
1683 struct net_device *dev = data;
1684 struct ace_private *ap = dev->priv;
1685 struct ace_regs *regs = ap->regs;
1686
1687 /*
1688 * We haven't received a stats update event for more than 2.5
1689 * seconds and there is data in the transmit queue, thus we
1690 * asume the card is stuck.
1691 */
1692 if (*ap->tx_csm != ap->tx_ret_csm) {
1693 printk(KERN_WARNING "%s: Transmitter is stuck, %08x\n",
1694 dev->name, (unsigned int)readl(®s->HostCtrl));
1695 /* This can happen due to ieee flow control. */
1696 } else {
1697 printk(KERN_DEBUG "%s: BUG... transmitter died. Kicking it.\n", dev->name);
1698 netif_wake_queue(dev);
1699 }
1700 }
1701
1702 static void ace_tasklet(unsigned long dev)
1703 {
1704 struct ace_private *ap = ((struct net_device *)dev)->priv;
1705 int cur_size;
1706
1707 cur_size = atomic_read(&ap->cur_rx_bufs);
1708 if ((cur_size < RX_LOW_STD_THRES) &&
1709 !test_and_set_bit(0, &ap->std_refill_busy)) {
1710 #if DEBUG
1711 printk("refilling buffers (current %i)\n", cur_size);
1712 #endif
1713 ace_load_std_rx_ring(ap, RX_RING_SIZE - cur_size);
1714 }
1715
1716 if (ap->version >= 2) {
1717 cur_size = atomic_read(&ap->cur_mini_bufs);
1718 if ((cur_size < RX_LOW_MINI_THRES) &&
1719 !test_and_set_bit(0, &ap->mini_refill_busy)) {
1720 #if DEBUG
1721 printk("refilling mini buffers (current %i)\n",
1722 cur_size);
1723 #endif
1724 ace_load_mini_rx_ring(ap, RX_MINI_SIZE - cur_size);
1725 }
1726 }
1727
1728 cur_size = atomic_read(&ap->cur_jumbo_bufs);
1729 if (ap->jumbo && (cur_size < RX_LOW_JUMBO_THRES) &&
1730 !test_and_set_bit(0, &ap->jumbo_refill_busy)) {
1731 #if DEBUG
1732 printk("refilling jumbo buffers (current %i)\n", >cur_size);
1733 #endif
1734 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE - cur_size);
1735 }
1736 ap->tasklet_pending = 0;
1737 }
1738
1739
1740 /*
1741 * Copy the contents of the NIC's trace buffer to kernel memory.
1742 */
1743 static void ace_dump_trace(struct ace_private *ap)
1744 {
1745 #if 0
1746 if (!ap->trace_buf)
1747 if (!(ap->trace_buf = kmalloc(ACE_TRACE_SIZE, GFP_KERNEL)))
1748 return;
1749 #endif
1750 }
1751
1752
1753 /*
1754 * Load the standard rx ring.
1755 *
1756 * Loading rings is safe without holding the spin lock since this is
1757 * done only before the device is enabled, thus no interrupts are
1758 * generated and by the interrupt handler/tasklet handler.
1759 */
1760 static void ace_load_std_rx_ring(struct ace_private *ap, int nr_bufs)
1761 {
1762 struct ace_regs *regs;
1763 short i, idx;
1764
1765 regs = ap->regs;
1766
1767 idx = ap->rx_std_skbprd;
1768
1769 for (i = 0; i < nr_bufs; i++) {
1770 struct sk_buff *skb;
1771 struct rx_desc *rd;
1772 dma_addr_t mapping;
1773
1774 skb = alloc_skb(ACE_STD_BUFSIZE, GFP_ATOMIC);
1775 if (!skb)
1776 break;
1777
1778 /*
1779 * Make sure IP header starts on a fresh cache line.
1780 */
1781 skb_reserve(skb, 2 + 16);
1782 mapping = pci_map_single(ap->pdev, skb->data,
1783 ACE_STD_BUFSIZE - (2 + 16),
1784 PCI_DMA_FROMDEVICE);
1785 ap->skb->rx_std_skbuff[idx].skb = skb;
1786 #ifndef DUMMY_PCI_UNMAP
1787 ap->skb->rx_std_skbuff[idx].mapping = mapping;
1788 #endif
1789
1790 rd = &ap->rx_std_ring[idx];
1791 set_aceaddr(&rd->addr, mapping);
1792 rd->size = ACE_STD_MTU + ETH_HLEN + 4;
1793 rd->idx = idx;
1794 idx = (idx + 1) % RX_STD_RING_ENTRIES;
1795 }
1796
1797 if (!i)
1798 goto error_out;
1799
1800 atomic_add(i, &ap->cur_rx_bufs);
1801 ap->rx_std_skbprd = idx;
1802
1803 if (ACE_IS_TIGON_I(ap)) {
1804 struct cmd cmd;
1805 cmd.evt = C_SET_RX_PRD_IDX;
1806 cmd.code = 0;
1807 cmd.idx = ap->rx_std_skbprd;
1808 ace_issue_cmd(regs, &cmd);
1809 } else {
1810 writel(idx, ®s->RxStdPrd);
1811 wmb();
1812 }
1813
1814 out:
1815 clear_bit(0, &ap->std_refill_busy);
1816 return;
1817
1818 error_out:
1819 printk(KERN_INFO "Out of memory when allocating "
1820 "standard receive buffers\n");
1821 goto out;
1822 }
1823
1824
1825 static void ace_load_mini_rx_ring(struct ace_private *ap, int nr_bufs)
1826 {
1827 struct ace_regs *regs;
1828 short i, idx;
1829
1830 regs = ap->regs;
1831
1832 idx = ap->rx_mini_skbprd;
1833 for (i = 0; i < nr_bufs; i++) {
1834 struct sk_buff *skb;
1835 struct rx_desc *rd;
1836 dma_addr_t mapping;
1837
1838 skb = alloc_skb(ACE_MINI_BUFSIZE, GFP_ATOMIC);
1839 if (!skb)
1840 break;
1841
1842 /*
1843 * Make sure the IP header ends up on a fresh cache line
1844 */
1845 skb_reserve(skb, 2 + 16);
1846 mapping = pci_map_single(ap->pdev, skb->data,
1847 ACE_MINI_BUFSIZE - (2 + 16),
1848 PCI_DMA_FROMDEVICE);
1849 ap->skb->rx_mini_skbuff[idx].skb = skb;
1850 #ifndef DUMMY_PCI_UNMAP
1851 ap->skb->rx_mini_skbuff[idx].mapping = mapping;
1852 #endif
1853
1854 rd = &ap->rx_mini_ring[idx];
1855 set_aceaddr(&rd->addr, mapping);
1856 rd->size = ACE_MINI_SIZE;
1857 rd->idx = idx;
1858 idx = (idx + 1) % RX_MINI_RING_ENTRIES;
1859 }
1860
1861 if (!i)
1862 goto error_out;
1863
1864 atomic_add(i, &ap->cur_mini_bufs);
1865
1866 ap->rx_mini_skbprd = idx;
1867
1868 writel(idx, ®s->RxMiniPrd);
1869 wmb();
1870
1871 out:
1872 clear_bit(0, &ap->mini_refill_busy);
1873 return;
1874 error_out:
1875 printk(KERN_INFO "Out of memory when allocating "
1876 "mini receive buffers\n");
1877 goto out;
1878 }
1879
1880
1881 /*
1882 * Load the jumbo rx ring, this may happen at any time if the MTU
1883 * is changed to a value > 1500.
1884 */
1885 static void ace_load_jumbo_rx_ring(struct ace_private *ap, int nr_bufs)
1886 {
1887 struct ace_regs *regs;
1888 short i, idx;
1889
1890 regs = ap->regs;
1891
1892 idx = ap->rx_jumbo_skbprd;
1893
1894 for (i = 0; i < nr_bufs; i++) {
1895 struct sk_buff *skb;
1896 struct rx_desc *rd;
1897 dma_addr_t mapping;
1898
1899 skb = alloc_skb(ACE_JUMBO_BUFSIZE, GFP_ATOMIC);
1900 if (!skb)
1901 break;
1902
1903 /*
1904 * Make sure the IP header ends up on a fresh cache line
1905 */
1906 skb_reserve(skb, 2 + 16);
1907 mapping = pci_map_single(ap->pdev, skb->data,
1908 ACE_JUMBO_BUFSIZE - (2 + 16),
1909 PCI_DMA_FROMDEVICE);
1910 ap->skb->rx_jumbo_skbuff[idx].skb = skb;
1911 #ifndef DUMMY_PCI_UNMAP
1912 ap->skb->rx_jumbo_skbuff[idx].mapping = mapping;
1913 #endif
1914
1915 rd = &ap->rx_jumbo_ring[idx];
1916 set_aceaddr(&rd->addr, mapping);
1917 rd->size = ACE_JUMBO_MTU + ETH_HLEN + 4;
1918 rd->idx = idx;
1919 idx = (idx + 1) % RX_JUMBO_RING_ENTRIES;
1920 }
1921
1922 if (!i)
1923 goto error_out;
1924
1925 atomic_add(i, &ap->cur_jumbo_bufs);
1926 ap->rx_jumbo_skbprd = idx;
1927
1928 if (ACE_IS_TIGON_I(ap)) {
1929 struct cmd cmd;
1930 cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
1931 cmd.code = 0;
1932 cmd.idx = ap->rx_jumbo_skbprd;
1933 ace_issue_cmd(regs, &cmd);
1934 } else {
1935 writel(idx, ®s->RxJumboPrd);
1936 wmb();
1937 }
1938
1939 out:
1940 clear_bit(0, &ap->jumbo_refill_busy);
1941 return;
1942 error_out:
1943 if (net_ratelimit())
1944 printk(KERN_INFO "Out of memory when allocating "
1945 "jumbo receive buffers\n");
1946 goto out;
1947 }
1948
1949
1950 /*
1951 * All events are considered to be slow (RX/TX ints do not generate
1952 * events) and are handled here, outside the main interrupt handler,
1953 * to reduce the size of the handler.
1954 */
1955 static u32 ace_handle_event(struct net_device *dev, u32 evtcsm, u32 evtprd)
1956 {
1957 struct ace_private *ap;
1958
1959 ap = dev->priv;
1960
1961 while (evtcsm != evtprd) {
1962 switch (ap->evt_ring[evtcsm].evt) {
1963 case E_FW_RUNNING:
1964 printk(KERN_INFO "%s: Firmware up and running\n",
1965 dev->name);
1966 ap->fw_running = 1;
1967 wmb();
1968 break;
1969 case E_STATS_UPDATED:
1970 break;
1971 case E_LNK_STATE:
1972 {
1973 u16 code = ap->evt_ring[evtcsm].code;
1974 switch (code) {
1975 case E_C_LINK_UP:
1976 {
1977 u32 state = readl(&ap->regs->GigLnkState);
1978 printk(KERN_WARNING "%s: Optical link UP "
1979 "(%s Duplex, Flow Control: %s%s)\n",
1980 dev->name,
1981 state & LNK_FULL_DUPLEX ? "Full":"Half",
1982 state & LNK_TX_FLOW_CTL_Y ? "TX " : "",
1983 state & LNK_RX_FLOW_CTL_Y ? "RX" : "");
1984 break;
1985 }
1986 case E_C_LINK_DOWN:
1987 printk(KERN_WARNING "%s: Optical link DOWN\n",
1988 dev->name);
1989 break;
1990 case E_C_LINK_10_100:
1991 printk(KERN_WARNING "%s: 10/100BaseT link "
1992 "UP\n", dev->name);
1993 break;
1994 default:
1995 printk(KERN_ERR "%s: Unknown optical link "
1996 "state %02x\n", dev->name, code);
1997 }
1998 break;
1999 }
2000 case E_ERROR:
2001 switch(ap->evt_ring[evtcsm].code) {
2002 case E_C_ERR_INVAL_CMD:
2003 printk(KERN_ERR "%s: invalid command error\n",
2004 dev->name);
2005 break;
2006 case E_C_ERR_UNIMP_CMD:
2007 printk(KERN_ERR "%s: unimplemented command "
2008 "error\n", dev->name);
2009 break;
2010 case E_C_ERR_BAD_CFG:
2011 printk(KERN_ERR "%s: bad config error\n",
2012 dev->name);
2013 break;
2014 default:
2015 printk(KERN_ERR "%s: unknown error %02x\n",
2016 dev->name, ap->evt_ring[evtcsm].code);
2017 }
2018 break;
2019 case E_RESET_JUMBO_RNG:
2020 {
2021 int i;
2022 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
2023 if (ap->skb->rx_jumbo_skbuff[i].skb) {
2024 ap->rx_jumbo_ring[i].size = 0;
2025 set_aceaddr(&ap->rx_jumbo_ring[i].addr, 0);
2026 dev_kfree_skb(ap->skb->rx_jumbo_skbuff[i].skb);
2027 ap->skb->rx_jumbo_skbuff[i].skb = NULL;
2028 }
2029 }
2030
2031 if (ACE_IS_TIGON_I(ap)) {
2032 struct cmd cmd;
2033 cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
2034 cmd.code = 0;
2035 cmd.idx = 0;
2036 ace_issue_cmd(ap->regs, &cmd);
2037 } else {
2038 writel(0, &((ap->regs)->RxJumboPrd));
2039 wmb();
2040 }
2041
2042 ap->jumbo = 0;
2043 ap->rx_jumbo_skbprd = 0;
2044 printk(KERN_INFO "%s: Jumbo ring flushed\n",
2045 dev->name);
2046 clear_bit(0, &ap->jumbo_refill_busy);
2047 break;
2048 }
2049 default:
2050 printk(KERN_ERR "%s: Unhandled event 0x%02x\n",
2051 dev->name, ap->evt_ring[evtcsm].evt);
2052 }
2053 evtcsm = (evtcsm + 1) % EVT_RING_ENTRIES;
2054 }
2055
2056 return evtcsm;
2057 }
2058
2059
2060 static void ace_rx_int(struct net_device *dev, u32 rxretprd, u32 rxretcsm)
2061 {
2062 struct ace_private *ap = dev->priv;
2063 u32 idx;
2064 int mini_count = 0, std_count = 0;
2065
2066 idx = rxretcsm;
2067
2068 while (idx != rxretprd) {
2069 struct ring_info *rip;
2070 struct sk_buff *skb;
2071 struct rx_desc *rxdesc, *retdesc;
2072 u32 skbidx;
2073 int bd_flags, desc_type, mapsize;
2074 u16 csum;
2075
2076 retdesc = &ap->rx_return_ring[idx];
2077 skbidx = retdesc->idx;
2078 bd_flags = retdesc->flags;
2079 desc_type = bd_flags & (BD_FLG_JUMBO | BD_FLG_MINI);
2080
2081 switch(desc_type) {
2082 /*
2083 * Normal frames do not have any flags set
2084 *
2085 * Mini and normal frames arrive frequently,
2086 * so use a local counter to avoid doing
2087 * atomic operations for each packet arriving.
2088 */
2089 case 0:
2090 rip = &ap->skb->rx_std_skbuff[skbidx];
2091 mapsize = ACE_STD_BUFSIZE - (2 + 16);
2092 rxdesc = &ap->rx_std_ring[skbidx];
2093 std_count++;
2094 break;
2095 case BD_FLG_JUMBO:
2096 rip = &ap->skb->rx_jumbo_skbuff[skbidx];
2097 mapsize = ACE_JUMBO_BUFSIZE - (2 + 16);
2098 rxdesc = &ap->rx_jumbo_ring[skbidx];
2099 atomic_dec(&ap->cur_jumbo_bufs);
2100 break;
2101 case BD_FLG_MINI:
2102 rip = &ap->skb->rx_mini_skbuff[skbidx];
2103 mapsize = ACE_MINI_BUFSIZE - (2 + 16);
2104 rxdesc = &ap->rx_mini_ring[skbidx];
2105 mini_count++;
2106 break;
2107 default:
2108 printk(KERN_INFO "%s: unknown frame type (0x%02x) "
2109 "returned by NIC\n", dev->name,
2110 retdesc->flags);
2111 goto error;
2112 }
2113
2114 skb = rip->skb;
2115 rip->skb = NULL;
2116 #ifndef DUMMY_PCI_UNMAP
2117 pci_unmap_single(ap->pdev, rip->mapping, mapsize,
2118 PCI_DMA_FROMDEVICE);
2119 #endif
2120 skb_put(skb, retdesc->size);
2121 #if 0
2122 /* unncessary */
2123 rxdesc->size = 0;
2124 #endif
2125
2126 /*
2127 * Fly baby, fly!
2128 */
2129 csum = retdesc->tcp_udp_csum;
2130
2131 skb->dev = dev;
2132 skb->protocol = eth_type_trans(skb, dev);
2133
2134 /*
2135 * Instead of forcing the poor tigon mips cpu to calculate
2136 * pseudo hdr checksum, we do this ourselves.
2137 */
2138 if (bd_flags & BD_FLG_TCP_UDP_SUM) {
2139 skb->csum = htons(csum);
2140 skb->ip_summed = CHECKSUM_HW;
2141 } else {
2142 skb->ip_summed = CHECKSUM_NONE;
2143 }
2144
2145 netif_rx(skb); /* send it up */
2146
2147 dev->last_rx = jiffies;
2148 ap->stats.rx_packets++;
2149 ap->stats.rx_bytes += retdesc->size;
2150
2151 idx = (idx + 1) % RX_RETURN_RING_ENTRIES;
2152 }
2153
2154 atomic_sub(std_count, &ap->cur_rx_bufs);
2155 if (!ACE_IS_TIGON_I(ap))
2156 atomic_sub(mini_count, &ap->cur_mini_bufs);
2157
2158 out:
2159 /*
2160 * According to the documentation RxRetCsm is obsolete with
2161 * the 12.3.x Firmware - my Tigon I NICs seem to disagree!
2162 */
2163 if (ACE_IS_TIGON_I(ap)) {
2164 struct ace_regs *regs = ap->regs;
2165 writel(idx, ®s->RxRetCsm);
2166 }
2167 ap->cur_rx = idx;
2168
2169 return;
2170 error:
2171 idx = rxretprd;
2172 goto out;
2173 }
2174
2175
2176 static inline void ace_tx_int(struct net_device *dev,
2177 u32 txcsm, u32 idx)
2178 {
2179 struct ace_private *ap = dev->priv;
2180
2181 do {
2182 struct sk_buff *skb;
2183 #ifndef DUMMY_PCI_UNMAP
2184 dma_addr_t mapping;
2185 #endif
2186 struct tx_ring_info *info;
2187
2188 info = ap->skb->tx_skbuff + idx;
2189 skb = info->skb;
2190 #ifndef DUMMY_PCI_UNMAP
2191 mapping = info->mapping;
2192
2193 if (mapping) {
2194 pci_unmap_single(ap->pdev, mapping, info->maplen,
2195 PCI_DMA_TODEVICE);
2196 info->mapping = 0;
2197 }
2198 #endif
2199 if (skb) {
2200 ap->stats.tx_packets++;
2201 ap->stats.tx_bytes += skb->len;
2202 dev_kfree_skb_irq(skb);
2203 info->skb = NULL;
2204 }
2205
2206 idx = (idx + 1) % TX_RING_ENTRIES;
2207 } while (idx != txcsm);
2208
2209 if (netif_queue_stopped(dev))
2210 netif_wake_queue(dev);
2211
2212 wmb();
2213 ap->tx_ret_csm = txcsm;
2214
2215 /* So... tx_ret_csm is advanced _after_ check for device wakeup.
2216 *
2217 * We could try to make it before. In this case we would get
2218 * the following race condition: hard_start_xmit on other cpu
2219 * enters after we advanced tx_ret_csm and fills space,
2220 * which we have just freed, so that we make illegal device wakeup.
2221 * There is no good way to workaround this (at entry
2222 * to ace_start_xmit detects this condition and prevents
2223 * ring corruption, but it is not a good workaround.)
2224 *
2225 * When tx_ret_csm is advanced after, we wake up device _only_
2226 * if we really have some space in ring (though the core doing
2227 * hard_start_xmit can see full ring for some period and has to
2228 * synchronize.) Superb.
2229 * BUT! We get another subtle race condition. hard_start_xmit
2230 * may think that ring is full between wakeup and advancing
2231 * tx_ret_csm and will stop device instantly! It is not so bad.
2232 * We are guaranteed that there is something in ring, so that
2233 * the next irq will resume transmission. To speedup this we could
2234 * mark descriptor, which closes ring with BD_FLG_COAL_NOW
2235 * (see ace_start_xmit).
2236 *
2237 * Well, this dilemma exists in all lock-free devices.
2238 * We, following scheme used in drivers by Donald Becker,
2239 * select the least dangerous.
2240 * --ANK
2241 */
2242 }
2243
2244
2245 static void ace_interrupt(int irq, void *dev_id, struct pt_regs *ptregs)
2246 {
2247 struct ace_private *ap;
2248 struct ace_regs *regs;
2249 struct net_device *dev = (struct net_device *)dev_id;
2250 u32 idx;
2251 u32 txcsm, rxretcsm, rxretprd;
2252 u32 evtcsm, evtprd;
2253
2254 ap = dev->priv;
2255 regs = ap->regs;
2256
2257 /*
2258 * In case of PCI shared interrupts or spurious interrupts,
2259 * we want to make sure it is actually our interrupt before
2260 * spending any time in here.
2261 */
2262 if (!(readl(®s->HostCtrl) & IN_INT))
2263 return;
2264
2265 /*
2266 * ACK intr now. Otherwise we will lose updates to rx_ret_prd,
2267 * which happened _after_ rxretprd = *ap->rx_ret_prd; but before
2268 * writel(0, ®s->Mb0Lo).
2269 *
2270 * "IRQ avoidance" recommended in docs applies to IRQs served
2271 * threads and it is wrong even for that case.
2272 */
2273 writel(0, ®s->Mb0Lo);
2274
2275 /*
2276 * There is no conflict between transmit handling in
2277 * start_xmit and receive processing, thus there is no reason
2278 * to take a spin lock for RX handling. Wait until we start
2279 * working on the other stuff - hey we don't need a spin lock
2280 * anymore.
2281 */
2282 rxretprd = *ap->rx_ret_prd;
2283 rxretcsm = ap->cur_rx;
2284
2285 if (rxretprd != rxretcsm)
2286 ace_rx_int(dev, rxretprd, rxretcsm);
2287
2288 txcsm = *ap->tx_csm;
2289 idx = ap->tx_ret_csm;
2290
2291 if (txcsm != idx) {
2292 /*
2293 * If each skb takes only one descriptor this check degenerates
2294 * to identity, because new space has just been opened.
2295 * But if skbs are fragmented we must check that this index
2296 * update releases enough of space, otherwise we just
2297 * wait for device to make more work.
2298 */
2299 if (!tx_ring_full(txcsm, ap->tx_prd))
2300 ace_tx_int(dev, txcsm, idx);
2301 }
2302
2303 evtcsm = readl(®s->EvtCsm);
2304 evtprd = *ap->evt_prd;
2305
2306 if (evtcsm != evtprd) {
2307 evtcsm = ace_handle_event(dev, evtcsm, evtprd);
2308 writel(evtcsm, ®s->EvtCsm);
2309 }
2310
2311 /*
2312 * This has to go last in the interrupt handler and run with
2313 * the spin lock released ... what lock?
2314 */
2315 if (netif_running(dev)) {
2316 int cur_size;
2317 int run_tasklet = 0;
2318
2319 cur_size = atomic_read(&ap->cur_rx_bufs);
2320 if (cur_size < RX_LOW_STD_THRES) {
2321 if ((cur_size < RX_PANIC_STD_THRES) &&
2322 !test_and_set_bit(0, &ap->std_refill_busy)) {
2323 #if DEBUG
2324 printk("low on std buffers %i\n", cur_size);
2325 #endif
2326 ace_load_std_rx_ring(ap,
2327 RX_RING_SIZE - cur_size);
2328 } else
2329 run_tasklet = 1;
2330 }
2331
2332 if (!ACE_IS_TIGON_I(ap)) {
2333 cur_size = atomic_read(&ap->cur_mini_bufs);
2334 if (cur_size < RX_LOW_MINI_THRES) {
2335 if ((cur_size < RX_PANIC_MINI_THRES) &&
2336 !test_and_set_bit(0,
2337 &ap->mini_refill_busy)) {
2338 #if DEBUG
2339 printk("low on mini buffers %i\n",
2340 cur_size);
2341 #endif
2342 ace_load_mini_rx_ring(ap, RX_MINI_SIZE - cur_size);
2343 } else
2344 run_tasklet = 1;
2345 }
2346 }
2347
2348 if (ap->jumbo) {
2349 cur_size = atomic_read(&ap->cur_jumbo_bufs);
2350 if (cur_size < RX_LOW_JUMBO_THRES) {
2351 if ((cur_size < RX_PANIC_JUMBO_THRES) &&
2352 !test_and_set_bit(0,
2353 &ap->jumbo_refill_busy)){
2354 #if DEBUG
2355 printk("low on jumbo buffers %i\n",
2356 cur_size);
2357 #endif
2358 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE - cur_size);
2359 } else
2360 run_tasklet = 1;
2361 }
2362 }
2363 if (run_tasklet && !ap->tasklet_pending) {
2364 ap->tasklet_pending = 1;
2365 tasklet_schedule(&ap->ace_tasklet);
2366 }
2367 }
2368 }
2369
2370
2371 static int ace_open(struct net_device *dev)
2372 {
2373 struct ace_private *ap;
2374 struct ace_regs *regs;
2375 struct cmd cmd;
2376
2377 ap = dev->priv;
2378 regs = ap->regs;
2379
2380 if (!(ap->fw_running)) {
2381 printk(KERN_WARNING "%s: Firmware not running!\n", dev->name);
2382 return -EBUSY;
2383 }
2384
2385 writel(dev->mtu + ETH_HLEN + 4, ®s->IfMtu);
2386
2387 cmd.evt = C_CLEAR_STATS;
2388 cmd.code = 0;
2389 cmd.idx = 0;
2390 ace_issue_cmd(regs, &cmd);
2391
2392 cmd.evt = C_HOST_STATE;
2393 cmd.code = C_C_STACK_UP;
2394 cmd.idx = 0;
2395 ace_issue_cmd(regs, &cmd);
2396
2397 if (ap->jumbo &&
2398 !test_and_set_bit(0, &ap->jumbo_refill_busy))
2399 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE);
2400
2401 if (dev->flags & IFF_PROMISC) {
2402 cmd.evt = C_SET_PROMISC_MODE;
2403 cmd.code = C_C_PROMISC_ENABLE;
2404 cmd.idx = 0;
2405 ace_issue_cmd(regs, &cmd);
2406
2407 ap->promisc = 1;
2408 }else
2409 ap->promisc = 0;
2410 ap->mcast_all = 0;
2411
2412 #if 0
2413 cmd.evt = C_LNK_NEGOTIATION;
2414 cmd.code = 0;
2415 cmd.idx = 0;
2416 ace_issue_cmd(regs, &cmd);
2417 #endif
2418
2419 netif_start_queue(dev);
2420
2421 ACE_MOD_INC_USE_COUNT;
2422
2423 /*
2424 * Setup the bottom half rx ring refill handler
2425 */
2426 tasklet_init(&ap->ace_tasklet, ace_tasklet, (unsigned long)dev);
2427 return 0;
2428 }
2429
2430
2431 static int ace_close(struct net_device *dev)
2432 {
2433 struct ace_private *ap;
2434 struct ace_regs *regs;
2435 struct cmd cmd;
2436 unsigned long flags;
2437 short i;
2438
2439 ace_if_down(dev);
2440
2441 /*
2442 * Without (or before) releasing irq and stopping hardware, this
2443 * is an absolute non-sense, by the way. It will be reset instantly
2444 * by the first irq.
2445 */
2446 netif_stop_queue(dev);
2447
2448 ap = dev->priv;
2449 regs = ap->regs;
2450
2451 if (ap->promisc) {
2452 cmd.evt = C_SET_PROMISC_MODE;
2453 cmd.code = C_C_PROMISC_DISABLE;
2454 cmd.idx = 0;
2455 ace_issue_cmd(regs, &cmd);
2456 ap->promisc = 0;
2457 }
2458
2459 cmd.evt = C_HOST_STATE;
2460 cmd.code = C_C_STACK_DOWN;
2461 cmd.idx = 0;
2462 ace_issue_cmd(regs, &cmd);
2463
2464 tasklet_kill(&ap->ace_tasklet);
2465
2466 /*
2467 * Make sure one CPU is not processing packets while
2468 * buffers are being released by another.
2469 */
2470 save_flags(flags);
2471 cli();
2472
2473 for (i = 0; i < TX_RING_ENTRIES; i++) {
2474 struct sk_buff *skb;
2475 #ifndef DUMMY_PCI_UNMAP
2476 dma_addr_t mapping;
2477 #endif
2478 struct tx_ring_info *info;
2479
2480 info = ap->skb->tx_skbuff + i;
2481 skb = info->skb;
2482 #ifndef DUMMY_PCI_UNMAP
2483 mapping = info->mapping;
2484
2485 if (mapping) {
2486 memset(ap->tx_ring+i, 0, sizeof(struct tx_desc));
2487 pci_unmap_single(ap->pdev, mapping, info->maplen,
2488 PCI_DMA_TODEVICE);
2489 info->mapping = 0;
2490 }
2491 #endif
2492 if (skb) {
2493 dev_kfree_skb(skb);
2494 info->skb = NULL;
2495 }
2496 }
2497
2498 if (ap->jumbo) {
2499 cmd.evt = C_RESET_JUMBO_RNG;
2500 cmd.code = 0;
2501 cmd.idx = 0;
2502 ace_issue_cmd(regs, &cmd);
2503 }
2504
2505 restore_flags(flags);
2506
2507 ACE_MOD_DEC_USE_COUNT;
2508 return 0;
2509 }
2510
2511
2512 /*
2513 * Following below should be (in more clean form!) in arch/ARCH/kernel/pci_*.
2514 * For now, let it stay here.
2515 */
2516 #if defined(CONFIG_HIGHMEM) && MAX_SKB_FRAGS
2517 #ifndef DUMMY_PCI_UNMAP
2518 #error Sorry, cannot DMA from high memory on this architecture.
2519 #endif
2520
2521 #if defined(CONFIG_X86)
2522 #define DMAADDR_OFFSET 0
2523 typedef unsigned long long dmaaddr_high_t;
2524 #elif defined(CONFIG_PPC)
2525 #define DMAADDR_OFFSET PCI_DRAM_OFFSET
2526 typedef unsigned long dmaaddr_high_t;
2527 #endif
2528
2529
2530 static inline dmaaddr_high_t
2531 pci_map_single_high(struct pci_dev *hwdev, struct page *page,
2532 int offset, size_t size, int dir)
2533 {
2534 dmaaddr_high_t phys;
2535
2536 phys = (page-mem_map) * (dmaaddr_high_t) PAGE_SIZE + offset;
2537
2538 return (phys + DMAADDR_OFFSET);
2539 }
2540
2541 #else
2542
2543 typedef unsigned long dmaaddr_high_t;
2544
2545 static inline dmaaddr_high_t
2546 pci_map_single_high(struct pci_dev *hwdev, struct page *page,
2547 int offset, size_t size, int dir)
2548 {
2549 return pci_map_single(hwdev, page_address(page) + offset, size, dir);
2550 }
2551
2552 #endif
2553
2554
2555 static inline dmaaddr_high_t
2556 ace_map_tx_skb(struct ace_private *ap, struct sk_buff *skb,
2557 struct sk_buff *tail, u32 idx)
2558 {
2559 unsigned long addr;
2560 struct tx_ring_info *info;
2561
2562 addr = pci_map_single(ap->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
2563
2564 info = ap->skb->tx_skbuff + idx;
2565 info->skb = tail;
2566 #ifndef DUMMY_PCI_UNMAP
2567 info->mapping = addr;
2568 info->maplen = skb->len;
2569 #endif
2570 return addr;
2571 }
2572
2573
2574 static inline void
2575 ace_load_tx_bd(struct tx_desc *desc, dmaaddr_high_t addr, u32 flagsize)
2576 {
2577 #if !USE_TX_COAL_NOW
2578 flagsize &= ~BD_FLG_COAL_NOW;
2579 #endif
2580
2581 #ifdef ACE_64BIT_PTR
2582 desc->addr.addrhi = addr >> 32;
2583 #endif
2584 desc->addr.addrlo = addr;
2585 desc->flagsize = flagsize;
2586 }
2587
2588
2589 static int ace_start_xmit(struct sk_buff *skb, struct net_device *dev)
2590 {
2591 struct ace_private *ap = dev->priv;
2592 struct ace_regs *regs = ap->regs;
2593 struct tx_desc *desc;
2594 u32 idx, flagsize;
2595
2596 /*
2597 * This only happens with pre-softnet, ie. 2.2.x kernels.
2598 */
2599 if (early_stop_netif_stop_queue(dev))
2600 return 1;
2601
2602
2603 restart:
2604 idx = ap->tx_prd;
2605
2606 if (tx_ring_full(ap->tx_ret_csm, idx))
2607 goto overflow;
2608
2609 #if MAX_SKB_FRAGS
2610 if (!skb_shinfo(skb)->nr_frags)
2611 #endif
2612 {
2613 unsigned long addr;
2614
2615 addr = ace_map_tx_skb(ap, skb, skb, idx);
2616 flagsize = (skb->len << 16) | (BD_FLG_END);
2617 if (skb->ip_summed == CHECKSUM_HW)
2618 flagsize |= BD_FLG_TCP_UDP_SUM;
2619 desc = ap->tx_ring + idx;
2620 idx = (idx + 1) % TX_RING_ENTRIES;
2621
2622 /* Look at ace_tx_int for explanations. */
2623 if (tx_ring_full(ap->tx_ret_csm, idx))
2624 flagsize |= BD_FLG_COAL_NOW;
2625
2626 ace_load_tx_bd(desc, addr, flagsize);
2627 }
2628 #if MAX_SKB_FRAGS
2629 else {
2630 unsigned long addr;
2631 int i, len = 0;
2632
2633 addr = ace_map_tx_skb(ap, skb, NULL, idx);
2634 flagsize = ((skb->len - skb->data_len) << 16);
2635 if (skb->ip_summed == CHECKSUM_HW)
2636 flagsize |= BD_FLG_TCP_UDP_SUM;
2637
2638 ace_load_tx_bd(ap->tx_ring + idx, addr, flagsize);
2639
2640 idx = (idx + 1) % TX_RING_ENTRIES;
2641
2642 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2643 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2644 struct tx_ring_info *info;
2645 dmaaddr_high_t phys;
2646
2647 len += frag->size;
2648 info = ap->skb->tx_skbuff + idx;
2649 desc = ap->tx_ring + idx;
2650
2651 phys = pci_map_single_high(ap->pdev, frag->page,
2652 frag->page_offset,
2653 frag->size,
2654 PCI_DMA_TODEVICE);
2655
2656 flagsize = (frag->size << 16);
2657 if (skb->ip_summed == CHECKSUM_HW)
2658 flagsize |= BD_FLG_TCP_UDP_SUM;
2659 idx = (idx + 1) % TX_RING_ENTRIES;
2660
2661 if (i == skb_shinfo(skb)->nr_frags-1) {
2662 flagsize |= BD_FLG_END;
2663 if (tx_ring_full(ap->tx_ret_csm, idx))
2664 flagsize |= BD_FLG_COAL_NOW;
2665
2666 /*
2667 * Only the last fragment frees
2668 * the skb!
2669 */
2670 info->skb = skb;
2671 } else {
2672 info->skb = NULL;
2673 }
2674 #ifndef DUMMY_PCI_UNMAP
2675 info->mapping = phys;
2676 info->maplen = frag->size;
2677 #endif
2678 ace_load_tx_bd(desc, phys, flagsize);
2679 }
2680 }
2681 #endif
2682
2683 wmb();
2684 ap->tx_prd = idx;
2685 ace_set_txprd(regs, ap, idx);
2686
2687 if (flagsize & BD_FLG_COAL_NOW) {
2688 netif_stop_queue(dev);
2689
2690 /*
2691 * A TX-descriptor producer (an IRQ) might have gotten
2692 * inbetween, making the ring free again. Since xmit is
2693 * serialized, this is the only situation we have to
2694 * re-test.
2695 */
2696 if (!tx_ring_full(ap->tx_ret_csm, idx))
2697 netif_wake_queue(dev);
2698 }
2699
2700 dev->trans_start = jiffies;
2701 return 0;
2702
2703 overflow:
2704 /*
2705 * This race condition is unavoidable with lock-free drivers.
2706 * We wake up the queue _before_ tx_prd is advanced, so that we can
2707 * enter hard_start_xmit too early, while tx ring still looks closed.
2708 * This happens ~1-4 times per 100000 packets, so that we can allow
2709 * to loop syncing to other CPU. Probably, we need an additional
2710 * wmb() in ace_tx_intr as well.
2711 *
2712 * Note that this race is relieved by reserving one more entry
2713 * in tx ring than it is necessary (see original non-SG driver).
2714 * However, with SG we need to reserve 2*MAX_SKB_FRAGS+1, which
2715 * is already overkill.
2716 *
2717 * Alternative is to return with 1 not throttling queue. In this
2718 * case loop becomes longer, no more useful effects.
2719 */
2720 barrier();
2721 goto restart;
2722 }
2723
2724
2725 static int ace_change_mtu(struct net_device *dev, int new_mtu)
2726 {
2727 struct ace_private *ap = dev->priv;
2728 struct ace_regs *regs = ap->regs;
2729
2730 if (new_mtu > ACE_JUMBO_MTU)
2731 return -EINVAL;
2732
2733 writel(new_mtu + ETH_HLEN + 4, ®s->IfMtu);
2734 dev->mtu = new_mtu;
2735
2736 if (new_mtu > ACE_STD_MTU) {
2737 if (!(ap->jumbo)) {
2738 printk(KERN_INFO "%s: Enabling Jumbo frame "
2739 "support\n", dev->name);
2740 ap->jumbo = 1;
2741 if (!test_and_set_bit(0, &ap->jumbo_refill_busy))
2742 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE);
2743 ace_set_rxtx_parms(dev, 1);
2744 }
2745 } else {
2746 while (test_and_set_bit(0, &ap->jumbo_refill_busy));
2747 synchronize_irq();
2748 ace_set_rxtx_parms(dev, 0);
2749 if (ap->jumbo) {
2750 struct cmd cmd;
2751
2752 cmd.evt = C_RESET_JUMBO_RNG;
2753 cmd.code = 0;
2754 cmd.idx = 0;
2755 ace_issue_cmd(regs, &cmd);
2756 }
2757 }
2758
2759 return 0;
2760 }
2761
2762
2763 static int ace_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
2764 {
2765 struct ace_private *ap = dev->priv;
2766 struct ace_regs *regs = ap->regs;
2767 #ifdef SIOCETHTOOL
2768 struct ethtool_cmd ecmd;
2769 u32 link, speed;
2770
2771 if (cmd != SIOCETHTOOL)
2772 return -EOPNOTSUPP;
2773 if (copy_from_user(&ecmd, ifr->ifr_data, sizeof(ecmd)))
2774 return -EFAULT;
2775
2776 if (ecmd.cmd == ETHTOOL_GSET) {
2777 ecmd.supported =
2778 (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2779 SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2780 SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full |
2781 SUPPORTED_Autoneg | SUPPORTED_FIBRE);
2782
2783 ecmd.port = PORT_FIBRE;
2784 ecmd.transceiver = XCVR_INTERNAL;
2785 ecmd.phy_address = 0;
2786
2787 link = readl(®s->GigLnkState);
2788 if (link & LNK_1000MB)
2789 ecmd.speed = SPEED_1000;
2790 else {
2791 link = readl(®s->FastLnkState);
2792 if (link & LNK_100MB)
2793 ecmd.speed = SPEED_100;
2794 else if (link & LNK_100MB)
2795 ecmd.speed = SPEED_10;
2796 else
2797 ecmd.speed = 0;
2798 }
2799 if (link & LNK_FULL_DUPLEX)
2800 ecmd.duplex = DUPLEX_FULL;
2801 else
2802 ecmd.duplex = DUPLEX_HALF;
2803
2804 if (link & LNK_NEGOTIATE)
2805 ecmd.autoneg = AUTONEG_ENABLE;
2806 else
2807 ecmd.autoneg = AUTONEG_DISABLE;
2808
2809 #if 0
2810 /*
2811 * Current struct ethtool_cmd is insufficient
2812 */
2813 ecmd.trace = readl(®s->TuneTrace);
2814
2815 ecmd.txcoal = readl(®s->TuneTxCoalTicks);
2816 ecmd.rxcoal = readl(®s->TuneRxCoalTicks);
2817 #endif
2818 ecmd.maxtxpkt = readl(®s->TuneMaxTxDesc);
2819 ecmd.maxrxpkt = readl(®s->TuneMaxRxDesc);
2820
2821 if(copy_to_user(ifr->ifr_data, &ecmd, sizeof(ecmd)))
2822 return -EFAULT;
2823 return 0;
2824 } else if (ecmd.cmd == ETHTOOL_SSET) {
2825 if(!capable(CAP_NET_ADMIN))
2826 return -EPERM;
2827
2828 link = readl(®s->GigLnkState);
2829 if (link & LNK_1000MB)
2830 speed = SPEED_1000;
2831 else {
2832 link = readl(®s->FastLnkState);
2833 if (link & LNK_100MB)
2834 speed = SPEED_100;
2835 else if (link & LNK_100MB)
2836 speed = SPEED_10;
2837 else
2838 speed = SPEED_100;
2839 }
2840
2841 link = LNK_ENABLE | LNK_1000MB | LNK_100MB | LNK_10MB |
2842 LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL;
2843 if (!ACE_IS_TIGON_I(ap))
2844 link |= LNK_TX_FLOW_CTL_Y;
2845 if (ecmd.autoneg == AUTONEG_ENABLE)
2846 link |= LNK_NEGOTIATE;
2847 if (ecmd.speed != speed) {
2848 link &= ~(LNK_1000MB | LNK_100MB | LNK_10MB);
2849 switch (speed) {
2850 case SPEED_1000:
2851 link |= LNK_1000MB;
2852 break;
2853 case SPEED_100:
2854 link |= LNK_100MB;
2855 break;
2856 case SPEED_10:
2857 link |= LNK_10MB;
2858 break;
2859 }
2860 }
2861 if (ecmd.duplex == DUPLEX_FULL)
2862 link |= LNK_FULL_DUPLEX;
2863
2864 if (link != ap->link) {
2865 struct cmd cmd;
2866 printk(KERN_INFO "%s: Renegotiating link state\n",
2867 dev->name);
2868
2869 ap->link = link;
2870 writel(link, ®s->TuneLink);
2871 if (!ACE_IS_TIGON_I(ap))
2872 writel(link, ®s->TuneFastLink);
2873 wmb();
2874
2875 cmd.evt = C_LNK_NEGOTIATION;
2876 cmd.code = 0;
2877 cmd.idx = 0;
2878 ace_issue_cmd(regs, &cmd);
2879 }
2880 return 0;
2881 }
2882 #endif
2883
2884 return -EOPNOTSUPP;
2885 }
2886
2887
2888 /*
2889 * Set the hardware MAC address.
2890 */
2891 static int ace_set_mac_addr(struct net_device *dev, void *p)
2892 {
2893 struct sockaddr *addr=p;
2894 struct ace_regs *regs;
2895 u8 *da;
2896 struct cmd cmd;
2897
2898 if(netif_running(dev))
2899 return -EBUSY;
2900
2901 memcpy(dev->dev_addr, addr->sa_data,dev->addr_len);
2902
2903 da = (u8 *)dev->dev_addr;
2904
2905 regs = ((struct ace_private *)dev->priv)->regs;
2906 writel(da[0] << 8 | da[1], ®s->MacAddrHi);
2907 writel((da[2] << 24) | (da[3] << 16) | (da[4] << 8) | da[5],
2908 ®s->MacAddrLo);
2909
2910 cmd.evt = C_SET_MAC_ADDR;
2911 cmd.code = 0;
2912 cmd.idx = 0;
2913 ace_issue_cmd(regs, &cmd);
2914
2915 return 0;
2916 }
2917
2918
2919 static void ace_set_multicast_list(struct net_device *dev)
2920 {
2921 struct ace_private *ap = dev->priv;
2922 struct ace_regs *regs = ap->regs;
2923 struct cmd cmd;
2924
2925 if ((dev->flags & IFF_ALLMULTI) && !(ap->mcast_all)) {
2926 cmd.evt = C_SET_MULTICAST_MODE;
2927 cmd.code = C_C_MCAST_ENABLE;
2928 cmd.idx = 0;
2929 ace_issue_cmd(regs, &cmd);
2930 ap->mcast_all = 1;
2931 } else if (ap->mcast_all) {
2932 cmd.evt = C_SET_MULTICAST_MODE;
2933 cmd.code = C_C_MCAST_DISABLE;
2934 cmd.idx = 0;
2935 ace_issue_cmd(regs, &cmd);
2936 ap->mcast_all = 0;
2937 }
2938
2939 if ((dev->flags & IFF_PROMISC) && !(ap->promisc)) {
2940 cmd.evt = C_SET_PROMISC_MODE;
2941 cmd.code = C_C_PROMISC_ENABLE;
2942 cmd.idx = 0;
2943 ace_issue_cmd(regs, &cmd);
2944 ap->promisc = 1;
2945 }else if (!(dev->flags & IFF_PROMISC) && (ap->promisc)) {
2946 cmd.evt = C_SET_PROMISC_MODE;
2947 cmd.code = C_C_PROMISC_DISABLE;
2948 cmd.idx = 0;
2949 ace_issue_cmd(regs, &cmd);
2950 ap->promisc = 0;
2951 }
2952
2953 /*
2954 * For the time being multicast relies on the upper layers
2955 * filtering it properly. The Firmware does not allow one to
2956 * set the entire multicast list at a time and keeping track of
2957 * it here is going to be messy.
2958 */
2959 if ((dev->mc_count) && !(ap->mcast_all)) {
2960 cmd.evt = C_SET_MULTICAST_MODE;
2961 cmd.code = C_C_MCAST_ENABLE;
2962 cmd.idx = 0;
2963 ace_issue_cmd(regs, &cmd);
2964 }else if (!ap->mcast_all) {
2965 cmd.evt = C_SET_MULTICAST_MODE;
2966 cmd.code = C_C_MCAST_DISABLE;
2967 cmd.idx = 0;
2968 ace_issue_cmd(regs, &cmd);
2969 }
2970 }
2971
2972
2973 static struct net_device_stats *ace_get_stats(struct net_device *dev)
2974 {
2975 struct ace_private *ap = dev->priv;
2976 struct ace_mac_stats *mac_stats =
2977 (struct ace_mac_stats *)ap->regs->Stats;
2978
2979 ap->stats.rx_missed_errors = readl(&mac_stats->drop_space);
2980 ap->stats.multicast = readl(&mac_stats->kept_mc);
2981 ap->stats.collisions = readl(&mac_stats->coll);
2982
2983 return &ap->stats;
2984 }
2985
2986
2987 static void __init ace_copy(struct ace_regs *regs, void *src,
2988 u32 dest, int size)
2989 {
2990 unsigned long tdest;
2991 u32 *wsrc;
2992 short tsize, i;
2993
2994 if (size <= 0)
2995 return;
2996
2997 while (size > 0) {
2998 tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
2999 min_t(u32, size, ACE_WINDOW_SIZE));
3000 tdest = (unsigned long)®s->Window +
3001 (dest & (ACE_WINDOW_SIZE - 1));
3002 writel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase);
3003 /*
3004 * This requires byte swapping on big endian, however
3005 * writel does that for us
3006 */
3007 wsrc = src;
3008 for (i = 0; i < (tsize / 4); i++) {
3009 writel(wsrc[i], tdest + i*4);
3010 }
3011 dest += tsize;
3012 src += tsize;
3013 size -= tsize;
3014 }
3015
3016 return;
3017 }
3018
3019
3020 static void __init ace_clear(struct ace_regs *regs, u32 dest, int size)
3021 {
3022 unsigned long tdest;
3023 short tsize = 0, i;
3024
3025 if (size <= 0)
3026 return;
3027
3028 while (size > 0) {
3029 tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
3030 min_t(u32, size, ACE_WINDOW_SIZE));
3031 tdest = (unsigned long)®s->Window +
3032 (dest & (ACE_WINDOW_SIZE - 1));
3033 writel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase);
3034
3035 for (i = 0; i < (tsize / 4); i++) {
3036 writel(0, tdest + i*4);
3037 }
3038
3039 dest += tsize;
3040 size -= tsize;
3041 }
3042
3043 return;
3044 }
3045
3046
3047 /*
3048 * Download the firmware into the SRAM on the NIC
3049 *
3050 * This operation requires the NIC to be halted and is performed with
3051 * interrupts disabled and with the spinlock hold.
3052 */
3053 int __init ace_load_firmware(struct net_device *dev)
3054 {
3055 struct ace_private *ap;
3056 struct ace_regs *regs;
3057
3058 ap = dev->priv;
3059 regs = ap->regs;
3060
3061 if (!(readl(®s->CpuCtrl) & CPU_HALTED)) {
3062 printk(KERN_ERR "%s: trying to download firmware while the "
3063 "CPU is running!\n", dev->name);
3064 return -EFAULT;
3065 }
3066
3067 /*
3068 * Do not try to clear more than 512KB or we end up seeing
3069 * funny things on NICs with only 512KB SRAM
3070 */
3071 ace_clear(regs, 0x2000, 0x80000-0x2000);
3072 if (ACE_IS_TIGON_I(ap)) {
3073 ace_copy(regs, tigonFwText, tigonFwTextAddr, tigonFwTextLen);
3074 ace_copy(regs, tigonFwData, tigonFwDataAddr, tigonFwDataLen);
3075 ace_copy(regs, tigonFwRodata, tigonFwRodataAddr,
3076 tigonFwRodataLen);
3077 ace_clear(regs, tigonFwBssAddr, tigonFwBssLen);
3078 ace_clear(regs, tigonFwSbssAddr, tigonFwSbssLen);
3079 }else if (ap->version == 2) {
3080 ace_clear(regs, tigon2FwBssAddr, tigon2FwBssLen);
3081 ace_clear(regs, tigon2FwSbssAddr, tigon2FwSbssLen);
3082 ace_copy(regs, tigon2FwText, tigon2FwTextAddr,tigon2FwTextLen);
3083 ace_copy(regs, tigon2FwRodata, tigon2FwRodataAddr,
3084 tigon2FwRodataLen);
3085 ace_copy(regs, tigon2FwData, tigon2FwDataAddr,tigon2FwDataLen);
3086 }
3087
3088 return 0;
3089 }
3090
3091
3092 /*
3093 * The eeprom on the AceNIC is an Atmel i2c EEPROM.
3094 *
3095 * Accessing the EEPROM is `interesting' to say the least - don't read
3096 * this code right after dinner.
3097 *
3098 * This is all about black magic and bit-banging the device .... I
3099 * wonder in what hospital they have put the guy who designed the i2c
3100 * specs.
3101 *
3102 * Oh yes, this is only the beginning!
3103 *
3104 * Thanks to Stevarino Webinski for helping tracking down the bugs in the
3105 * code i2c readout code by beta testing all my hacks.
3106 */
3107 static void __init eeprom_start(struct ace_regs *regs)
3108 {
3109 u32 local;
3110
3111 udelay(ACE_SHORT_DELAY);
3112 local = readl(®s->LocalCtrl);
3113 local |= EEPROM_DATA_OUT | EEPROM_WRITE_ENABLE;
3114 writel(local, ®s->LocalCtrl);
3115 mb();
3116 udelay(ACE_SHORT_DELAY);
3117 local |= EEPROM_CLK_OUT;
3118 writel(local, ®s->LocalCtrl);
3119 mb();
3120 udelay(ACE_SHORT_DELAY);
3121 local &= ~EEPROM_DATA_OUT;
3122 writel(local, ®s->LocalCtrl);
3123 mb();
3124 udelay(ACE_SHORT_DELAY);
3125 local &= ~EEPROM_CLK_OUT;
3126 writel(local, ®s->LocalCtrl);
3127 mb();
3128 }
3129
3130
3131 static void __init eeprom_prep(struct ace_regs *regs, u8 magic)
3132 {
3133 short i;
3134 u32 local;
3135
3136 udelay(ACE_SHORT_DELAY);
3137 local = readl(®s->LocalCtrl);
3138 local &= ~EEPROM_DATA_OUT;
3139 local |= EEPROM_WRITE_ENABLE;
3140 writel(local, ®s->LocalCtrl);
3141 mb();
3142
3143 for (i = 0; i < 8; i++, magic <<= 1) {
3144 udelay(ACE_SHORT_DELAY);
3145 if (magic & 0x80)
3146 local |= EEPROM_DATA_OUT;
3147 else
3148 local &= ~EEPROM_DATA_OUT;
3149 writel(local, ®s->LocalCtrl);
3150 mb();
3151
3152 udelay(ACE_SHORT_DELAY);
3153 local |= EEPROM_CLK_OUT;
3154 writel(local, ®s->LocalCtrl);
3155 mb();
3156 udelay(ACE_SHORT_DELAY);
3157 local &= ~(EEPROM_CLK_OUT | EEPROM_DATA_OUT);
3158 writel(local, ®s->LocalCtrl);
3159 mb();
3160 }
3161 }
3162
3163
3164 static int __init eeprom_check_ack(struct ace_regs *regs)
3165 {
3166 int state;
3167 u32 local;
3168
3169 local = readl(®s->LocalCtrl);
3170 local &= ~EEPROM_WRITE_ENABLE;
3171 writel(local, ®s->LocalCtrl);
3172 mb();
3173 udelay(ACE_LONG_DELAY);
3174 local |= EEPROM_CLK_OUT;
3175 writel(local, ®s->LocalCtrl);
3176 mb();
3177 udelay(ACE_SHORT_DELAY);
3178 /* sample data in middle of high clk */
3179 state = (readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0;
3180 udelay(ACE_SHORT_DELAY);
3181 mb();
3182 writel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl);
3183 mb();
3184
3185 return state;
3186 }
3187
3188
3189 static void __init eeprom_stop(struct ace_regs *regs)
3190 {
3191 u32 local;
3192
3193 udelay(ACE_SHORT_DELAY);
3194 local = readl(®s->LocalCtrl);
3195 local |= EEPROM_WRITE_ENABLE;
3196 writel(local, ®s->LocalCtrl);
3197 mb();
3198 udelay(ACE_SHORT_DELAY);
3199 local &= ~EEPROM_DATA_OUT;
3200 writel(local, ®s->LocalCtrl);
3201 mb();
3202 udelay(ACE_SHORT_DELAY);
3203 local |= EEPROM_CLK_OUT;
3204 writel(local, ®s->LocalCtrl);
3205 mb();
3206 udelay(ACE_SHORT_DELAY);
3207 local |= EEPROM_DATA_OUT;
3208 writel(local, ®s->LocalCtrl);
3209 mb();
3210 udelay(ACE_LONG_DELAY);
3211 local &= ~EEPROM_CLK_OUT;
3212 writel(local, ®s->LocalCtrl);
3213 mb();
3214 }
3215
3216
3217 /*
3218 * Read a whole byte from the EEPROM.
3219 */
3220 static int __init read_eeprom_byte(struct net_device *dev,
3221 unsigned long offset)
3222 {
3223 struct ace_regs *regs;
3224 unsigned long flags;
3225 u32 local;
3226 int result = 0;
3227 short i;
3228
3229 if (!dev) {
3230 printk(KERN_ERR "No device!\n");
3231 result = -ENODEV;
3232 goto eeprom_read_error;
3233 }
3234
3235 regs = ((struct ace_private *)dev->priv)->regs;
3236
3237 /*
3238 * Don't take interrupts on this CPU will bit banging
3239 * the %#%#@$ I2C device
3240 */
3241 __save_flags(flags);
3242 __cli();
3243
3244 eeprom_start(regs);
3245
3246 eeprom_prep(regs, EEPROM_WRITE_SELECT);
3247 if (eeprom_check_ack(regs)) {
3248 __restore_flags(flags);
3249 printk(KERN_ERR "%s: Unable to sync eeprom\n", dev->name);
3250 result = -EIO;
3251 goto eeprom_read_error;
3252 }
3253
3254 eeprom_prep(regs, (offset >> 8) & 0xff);
3255 if (eeprom_check_ack(regs)) {
3256 __restore_flags(flags);
3257 printk(KERN_ERR "%s: Unable to set address byte 0\n",
3258 dev->name);
3259 result = -EIO;
3260 goto eeprom_read_error;
3261 }
3262
3263 eeprom_prep(regs, offset & 0xff);
3264 if (eeprom_check_ack(regs)) {
3265 __restore_flags(flags);
3266 printk(KERN_ERR "%s: Unable to set address byte 1\n",
3267 dev->name);
3268 result = -EIO;
3269 goto eeprom_read_error;
3270 }
3271
3272 eeprom_start(regs);
3273 eeprom_prep(regs, EEPROM_READ_SELECT);
3274 if (eeprom_check_ack(regs)) {
3275 __restore_flags(flags);
3276 printk(KERN_ERR "%s: Unable to set READ_SELECT\n",
3277 dev->name);
3278 result = -EIO;
3279 goto eeprom_read_error;
3280 }
3281
3282 for (i = 0; i < 8; i++) {
3283 local = readl(®s->LocalCtrl);
3284 local &= ~EEPROM_WRITE_ENABLE;
3285 writel(local, ®s->LocalCtrl);
3286 udelay(ACE_LONG_DELAY);
3287 mb();
3288 local |= EEPROM_CLK_OUT;
3289 writel(local, ®s->LocalCtrl);
3290 mb();
3291 udelay(ACE_SHORT_DELAY);
3292 /* sample data mid high clk */
3293 result = (result << 1) |
3294 ((readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0);
3295 udelay(ACE_SHORT_DELAY);
3296 mb();
3297 local = readl(®s->LocalCtrl);
3298 local &= ~EEPROM_CLK_OUT;
3299 writel(local, ®s->LocalCtrl);
3300 udelay(ACE_SHORT_DELAY);
3301 mb();
3302 if (i == 7) {
3303 local |= EEPROM_WRITE_ENABLE;
3304 writel(local, ®s->LocalCtrl);
3305 mb();
3306 udelay(ACE_SHORT_DELAY);
3307 }
3308 }
3309
3310 local |= EEPROM_DATA_OUT;
3311 writel(local, ®s->LocalCtrl);
3312 mb();
3313 udelay(ACE_SHORT_DELAY);
3314 writel(readl(®s->LocalCtrl) | EEPROM_CLK_OUT, ®s->LocalCtrl);
3315 udelay(ACE_LONG_DELAY);
3316 writel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl);
3317 mb();
3318 udelay(ACE_SHORT_DELAY);
3319 eeprom_stop(regs);
3320
3321 __restore_flags(flags);
3322 out:
3323 return result;
3324
3325 eeprom_read_error:
3326 printk(KERN_ERR "%s: Unable to read eeprom byte 0x%02lx\n",
3327 dev->name, offset);
3328 goto out;
3329 }
3330
3331
3332 /*
3333 * Local variables:
3334 * compile-command: "gcc -D__SMP__ -D__KERNEL__ -DMODULE -I../../include -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer -pipe -fno-strength-reduce -DMODVERSIONS -include ../../include/linux/modversions.h -c -o acenic.o acenic.c"
3335 * End:
3336 */
3337