File: /usr/src/linux/drivers/net/am79c961a.h

1     /*
2      * linux/drivers/net/am79c961.h
3      *
4      * This program is free software; you can redistribute it and/or modify
5      * it under the terms of the GNU General Public License version 2 as
6      * published by the Free Software Foundation.
7      */
8     
9     #ifndef _LINUX_am79c961a_H
10     #define _LINUX_am79c961a_H
11     
12     /* use 0 for production, 1 for verification, >2 for debug. debug flags: */
13     #define DEBUG_TX	 2
14     #define DEBUG_RX	 4
15     #define DEBUG_INT	 8
16     #define DEBUG_IC	16
17     #ifndef NET_DEBUG
18     #define NET_DEBUG 	0
19     #endif
20     
21     #define NET_UID		0
22     #define NET_RDP		0x10
23     #define NET_RAP		0x12
24     #define NET_RESET	0x14
25     #define NET_IDP		0x16
26     
27     /*
28      * RAP registers
29      */
30     #define CSR0		0
31     #define CSR0_INIT	0x0001
32     #define CSR0_STRT	0x0002
33     #define CSR0_STOP	0x0004
34     #define CSR0_TDMD	0x0008
35     #define CSR0_TXON	0x0010
36     #define CSR0_RXON	0x0020
37     #define CSR0_IENA	0x0040
38     #define CSR0_INTR	0x0080
39     #define CSR0_IDON	0x0100
40     #define CSR0_TINT	0x0200
41     #define CSR0_RINT	0x0400
42     #define CSR0_MERR	0x0800
43     #define CSR0_MISS	0x1000
44     #define CSR0_CERR	0x2000
45     #define CSR0_BABL	0x4000
46     #define CSR0_ERR	0x8000
47     
48     #define CSR3		3
49     #define CSR3_EMBA	0x0008
50     #define CSR3_DXMT2PD	0x0010
51     #define CSR3_LAPPEN	0x0020
52     #define CSR3_DXSUFLO	0x0040
53     #define CSR3_IDONM	0x0100
54     #define CSR3_TINTM	0x0200
55     #define CSR3_RINTM	0x0400
56     #define CSR3_MERRM	0x0800
57     #define CSR3_MISSM	0x1000
58     #define CSR3_BABLM	0x4000
59     #define CSR3_MASKALL	0x5F00
60     
61     #define CTRL1		5
62     #define CTRL1_SPND	0x0001
63     
64     #define LADRL		8
65     #define LADRM1		9
66     #define LADRM2		10
67     #define LADRH		11
68     #define PADRL		12
69     #define PADRM		13
70     #define PADRH		14
71     
72     #define MODE		15
73     #define MODE_DISRX	0x0001
74     #define MODE_DISTX	0x0002
75     #define MODE_LOOP	0x0004
76     #define MODE_DTCRC	0x0008
77     #define MODE_COLL	0x0010
78     #define MODE_DRETRY	0x0020
79     #define MODE_INTLOOP	0x0040
80     #define MODE_PORT_AUI	0x0000
81     #define MODE_PORT_10BT	0x0080
82     #define MODE_DRXPA	0x2000
83     #define MODE_DRXBA	0x4000
84     #define MODE_PROMISC	0x8000
85     
86     #define BASERXL		24
87     #define BASERXH		25
88     #define BASETXL		30
89     #define BASETXH		31
90     
91     #define POLLINT		47
92     
93     #define SIZERXR		76
94     #define SIZETXR		78
95     
96     #define RMD_ENP		0x0100
97     #define RMD_STP		0x0200
98     #define RMD_CRC		0x0800
99     #define RMD_FRAM	0x2000
100     #define RMD_ERR		0x4000
101     #define RMD_OWN		0x8000
102     
103     #define TMD_ENP		0x0100
104     #define TMD_STP		0x0200
105     #define TMD_MORE	0x1000
106     #define TMD_ERR		0x4000
107     #define TMD_OWN		0x8000
108     
109     #define TST_RTRY	0x0400
110     #define TST_LCAR	0x0800
111     #define TST_LCOL	0x1000
112     #define TST_UFLO	0x4000
113     #define TST_BUFF	0x8000
114     
115     struct dev_priv {
116         struct net_device_stats stats;
117         unsigned long	rxbuffer[RX_BUFFERS];
118         unsigned long	txbuffer[TX_BUFFERS];
119         unsigned char	txhead;
120         unsigned char	txtail;
121         unsigned char	rxhead;
122         unsigned char	rxtail;
123         unsigned long	rxhdr;
124         unsigned long	txhdr;
125         spinlock_t		chip_lock;
126     };
127     
128     extern int	am79c961_probe (struct net_device *dev);
129     
130     #endif
131