File: /usr/src/linux/drivers/net/bagetlance.c
1 /* $Id$
2 * bagetlance.c: Ethernet driver for VME Lance cards on Baget/MIPS
3 * This code stealed and adopted from linux/drivers/net/atarilance.c
4 * See that for author info
5 *
6 * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
7 */
8
9 /*
10 * Driver code for Baget/Lance taken from atarilance.c, which also
11 * works well in case of Besta. Most significant changes made here
12 * related with 16BIT-only access to A24 space.
13 */
14
15 static char *version = "bagetlance.c: v1.1 11/10/98\n";
16
17 #include <linux/module.h>
18
19 #include <linux/stddef.h>
20 #include <linux/kernel.h>
21 #include <linux/sched.h>
22 #include <linux/string.h>
23 #include <linux/ptrace.h>
24 #include <linux/errno.h>
25 #include <linux/slab.h>
26 #include <linux/interrupt.h>
27 #include <linux/init.h>
28
29 #include <asm/irq.h>
30 #include <asm/bitops.h>
31 #include <asm/io.h>
32
33 #include <linux/netdevice.h>
34 #include <linux/etherdevice.h>
35 #include <linux/skbuff.h>
36
37 #include <asm/baget/baget.h>
38
39 #define BAGET_LANCE_IRQ BAGET_IRQ_MASK(0xdf)
40
41 /*
42 * Define following if you don't need 16BIT-only access to Lance memory
43 * (Normally BAGET needs it)
44 */
45 #undef NORMAL_MEM_ACCESS
46
47 /* Debug level:
48 * 0 = silent, print only serious errors
49 * 1 = normal, print error messages
50 * 2 = debug, print debug infos
51 * 3 = debug, print even more debug infos (packet data)
52 */
53
54 #define LANCE_DEBUG 1
55
56 #ifdef LANCE_DEBUG
57 static int lance_debug = LANCE_DEBUG;
58 #else
59 static int lance_debug = 1;
60 #endif
61 MODULE_PARM(lance_debug, "i");
62 MODULE_PARM_DESC(lance_debug, "Lance debug level (0-3)");
63
64 /* Print debug messages on probing? */
65 #undef LANCE_DEBUG_PROBE
66
67 #define DPRINTK(n,a) \
68 do { \
69 if (lance_debug >= n) \
70 printk a; \
71 } while( 0 )
72
73 #ifdef LANCE_DEBUG_PROBE
74 # define PROBE_PRINT(a) printk a
75 #else
76 # define PROBE_PRINT(a)
77 #endif
78
79 /* These define the number of Rx and Tx buffers as log2. (Only powers
80 * of two are valid)
81 * Much more rx buffers (32) are reserved than tx buffers (8), since receiving
82 * is more time critical then sending and packets may have to remain in the
83 * board's memory when main memory is low.
84 */
85
86 /* Baget Lance has 64K on-board memory, so it looks we can't increase
87 buffer quantity (40*1.5K is about 64K) */
88
89 #define TX_LOG_RING_SIZE 3
90 #define RX_LOG_RING_SIZE 5
91
92 /* These are the derived values */
93
94 #define TX_RING_SIZE (1 << TX_LOG_RING_SIZE)
95 #define TX_RING_LEN_BITS (TX_LOG_RING_SIZE << 5)
96 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
97
98 #define RX_RING_SIZE (1 << RX_LOG_RING_SIZE)
99 #define RX_RING_LEN_BITS (RX_LOG_RING_SIZE << 5)
100 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
101
102 /* The LANCE Rx and Tx ring descriptors. */
103 struct lance_rx_head {
104 volatile unsigned short base; /* Low word of base addr */
105 #ifdef NORMAL_MEM_ACCESS
106 /* Following two fields are joined into one short to guarantee
107 16BIT access to Baget lance registers */
108 volatile unsigned char flag;
109 unsigned char base_hi; /* High word of base addr (unused) */
110 #else
111 /* Following macros are used as replecements to 8BIT fields */
112 #define GET_FLAG(h) (((h)->flag_base_hi >> 8) & 0xff)
113 #define SET_FLAG(h,f) (h)->flag_base_hi = ((h)->flag_base_hi & 0xff) | \
114 (((unsigned)(f)) << 8)
115 volatile unsigned short flag_base_hi;
116 #endif
117 volatile short buf_length; /* This length is 2s complement! */
118 volatile short msg_length; /* This length is "normal". */
119 };
120
121
122 struct lance_tx_head {
123 volatile unsigned short base; /* Low word of base addr */
124 #ifdef NORMAL_MEM_ACCESS
125 /* See comments above about 8BIT-access Baget A24-space problems */
126 volatile unsigned char flag;
127 unsigned char base_hi; /* High word of base addr (unused) */
128 #else
129 volatile unsigned short flag_base_hi;
130 #endif
131 volatile short length; /* Length is 2s complement! */
132 volatile short misc;
133 };
134
135 struct ringdesc {
136 volatile unsigned short adr_lo; /* Low 16 bits of address */
137 #ifdef NORMAL_MEM_ACCESS
138 /* See comments above about 8BIT-access Bage A24-space problems */
139 unsigned char len; /* Length bits */
140 unsigned char adr_hi; /* High 8 bits of address (unused) */
141 #else
142 volatile unsigned short len_adr_hi;
143 #endif
144 };
145
146 /* The LANCE initialization block, described in databook. */
147 struct lance_init_block {
148 unsigned short mode; /* Pre-set mode */
149 unsigned char hwaddr[6]; /* Physical ethernet address */
150 unsigned filter[2]; /* Multicast filter (unused). */
151 /* Receive and transmit ring base, along with length bits. */
152 struct ringdesc rx_ring;
153 struct ringdesc tx_ring;
154 };
155
156 /* The whole layout of the Lance shared memory */
157 struct lance_memory {
158 struct lance_init_block init;
159 struct lance_tx_head tx_head[TX_RING_SIZE];
160 struct lance_rx_head rx_head[RX_RING_SIZE];
161 char packet_area[0]; /* packet data follow after the
162 * init block and the ring
163 * descriptors and are located
164 * at runtime */
165 };
166
167 /* RieblCard specifics:
168 * The original TOS driver for these cards reserves the area from offset
169 * 0xee70 to 0xeebb for storing configuration data. Of interest to us is the
170 * Ethernet address there, and the magic for verifying the data's validity.
171 * The reserved area isn't touch by packet buffers. Furthermore, offset 0xfffe
172 * is reserved for the interrupt vector number.
173 */
174 #define RIEBL_RSVD_START 0xee70
175 #define RIEBL_RSVD_END 0xeec0
176 #define RIEBL_MAGIC 0x09051990
177 #define RIEBL_MAGIC_ADDR ((unsigned long *)(((char *)MEM) + 0xee8a))
178 #define RIEBL_HWADDR_ADDR ((unsigned char *)(((char *)MEM) + 0xee8e))
179 #define RIEBL_IVEC_ADDR ((unsigned short *)(((char *)MEM) + 0xfffe))
180
181 /* This is a default address for the old RieblCards without a battery
182 * that have no ethernet address at boot time. 00:00:36:04 is the
183 * prefix for Riebl cards, the 00:00 at the end is arbitrary.
184 */
185
186 static unsigned char OldRieblDefHwaddr[6] = {
187 0x00, 0x00, 0x36, 0x04, 0x00, 0x00
188 };
189
190 /* I/O registers of the Lance chip */
191
192 struct lance_ioreg {
193 /* base+0x0 */ volatile unsigned short data;
194 /* base+0x2 */ volatile unsigned short addr;
195 unsigned char _dummy1[3];
196 /* base+0x7 */ volatile unsigned char ivec;
197 unsigned char _dummy2[5];
198 /* base+0xd */ volatile unsigned char eeprom;
199 unsigned char _dummy3;
200 /* base+0xf */ volatile unsigned char mem;
201 };
202
203 /* Types of boards this driver supports */
204
205 enum lance_type {
206 OLD_RIEBL, /* old Riebl card without battery */
207 NEW_RIEBL, /* new Riebl card with battery */
208 PAM_CARD /* PAM card with EEPROM */
209 };
210
211 static char *lance_names[] = {
212 "Riebl-Card (without battery)",
213 "Riebl-Card (with battery)",
214 "PAM intern card"
215 };
216
217 /* The driver's private device structure */
218
219 struct lance_private {
220 enum lance_type cardtype;
221 struct lance_ioreg *iobase;
222 struct lance_memory *mem;
223 int cur_rx, cur_tx; /* The next free ring entry */
224 int dirty_tx; /* Ring entries to be freed. */
225 /* copy function */
226 void *(*memcpy_f)( void *, const void *, size_t );
227 struct net_device_stats stats;
228 /* These two must be longs for set_bit() */
229 long tx_full;
230 long lock;
231 };
232
233 /* I/O register access macros */
234
235 #define MEM lp->mem
236 #define DREG IO->data
237 #define AREG IO->addr
238 #define REGA(a) ( AREG = (a), DREG )
239
240 /* Definitions for packet buffer access: */
241 #define PKT_BUF_SZ 1544
242 /* Get the address of a packet buffer corresponding to a given buffer head */
243 #define PKTBUF_ADDR(head) (((unsigned char *)(MEM)) + (head)->base)
244
245 /* Possible memory/IO addresses for probing */
246
247 struct lance_addr {
248 unsigned long memaddr;
249 unsigned long ioaddr;
250 int slow_flag;
251 } lance_addr_list[] = {
252 { BAGET_LANCE_MEM_BASE, BAGET_LANCE_IO_BASE, 1 } /* Baget Lance */
253 };
254
255 #define N_LANCE_ADDR (sizeof(lance_addr_list)/sizeof(*lance_addr_list))
256
257
258 #define LANCE_HI_BASE (0xff & (BAGET_LANCE_MEM_BASE >> 16))
259
260 /* Definitions for the Lance */
261
262 /* tx_head flags */
263 #define TMD1_ENP 0x01 /* end of packet */
264 #define TMD1_STP 0x02 /* start of packet */
265 #define TMD1_DEF 0x04 /* deferred */
266 #define TMD1_ONE 0x08 /* one retry needed */
267 #define TMD1_MORE 0x10 /* more than one retry needed */
268 #define TMD1_ERR 0x40 /* error summary */
269 #define TMD1_OWN 0x80 /* ownership (set: chip owns) */
270
271 #define TMD1_OWN_CHIP TMD1_OWN
272 #define TMD1_OWN_HOST 0
273
274 /* tx_head misc field */
275 #define TMD3_TDR 0x03FF /* Time Domain Reflectometry counter */
276 #define TMD3_RTRY 0x0400 /* failed after 16 retries */
277 #define TMD3_LCAR 0x0800 /* carrier lost */
278 #define TMD3_LCOL 0x1000 /* late collision */
279 #define TMD3_UFLO 0x4000 /* underflow (late memory) */
280 #define TMD3_BUFF 0x8000 /* buffering error (no ENP) */
281
282 /* rx_head flags */
283 #define RMD1_ENP 0x01 /* end of packet */
284 #define RMD1_STP 0x02 /* start of packet */
285 #define RMD1_BUFF 0x04 /* buffer error */
286 #define RMD1_CRC 0x08 /* CRC error */
287 #define RMD1_OFLO 0x10 /* overflow */
288 #define RMD1_FRAM 0x20 /* framing error */
289 #define RMD1_ERR 0x40 /* error summary */
290 #define RMD1_OWN 0x80 /* ownership (set: ship owns) */
291
292 #define RMD1_OWN_CHIP RMD1_OWN
293 #define RMD1_OWN_HOST 0
294
295 /* register names */
296 #define CSR0 0 /* mode/status */
297 #define CSR1 1 /* init block addr (low) */
298 #define CSR2 2 /* init block addr (high) */
299 #define CSR3 3 /* misc */
300 #define CSR8 8 /* address filter */
301 #define CSR15 15 /* promiscuous mode */
302
303 /* CSR0 */
304 /* (R=readable, W=writeable, S=set on write, C=clear on write) */
305 #define CSR0_INIT 0x0001 /* initialize (RS) */
306 #define CSR0_STRT 0x0002 /* start (RS) */
307 #define CSR0_STOP 0x0004 /* stop (RS) */
308 #define CSR0_TDMD 0x0008 /* transmit demand (RS) */
309 #define CSR0_TXON 0x0010 /* transmitter on (R) */
310 #define CSR0_RXON 0x0020 /* receiver on (R) */
311 #define CSR0_INEA 0x0040 /* interrupt enable (RW) */
312 #define CSR0_INTR 0x0080 /* interrupt active (R) */
313 #define CSR0_IDON 0x0100 /* initialization done (RC) */
314 #define CSR0_TINT 0x0200 /* transmitter interrupt (RC) */
315 #define CSR0_RINT 0x0400 /* receiver interrupt (RC) */
316 #define CSR0_MERR 0x0800 /* memory error (RC) */
317 #define CSR0_MISS 0x1000 /* missed frame (RC) */
318 #define CSR0_CERR 0x2000 /* carrier error (no heartbeat :-) (RC) */
319 #define CSR0_BABL 0x4000 /* babble: tx-ed too many bits (RC) */
320 #define CSR0_ERR 0x8000 /* error (RC) */
321
322 /* CSR3 */
323 #define CSR3_BCON 0x0001 /* byte control */
324 #define CSR3_ACON 0 // fixme: 0x0002 /* ALE control */
325 #define CSR3_BSWP 0x0004 /* byte swap (1=big endian) */
326
327
328
329 /***************************** Prototypes *****************************/
330
331 static int addr_accessible( volatile void *regp, int wordflag, int
332 writeflag );
333 static int lance_probe1( struct net_device *dev, struct lance_addr *init_rec );
334 static int lance_open( struct net_device *dev );
335 static void lance_init_ring( struct net_device *dev );
336 static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev );
337 static void lance_interrupt( int irq, void *dev_id, struct pt_regs *fp );
338 static int lance_rx( struct net_device *dev );
339 static int lance_close( struct net_device *dev );
340 static struct net_device_stats *lance_get_stats( struct net_device *dev );
341 static void set_multicast_list( struct net_device *dev );
342 static int lance_set_mac_address( struct net_device *dev, void *addr );
343
344 /************************* End of Prototypes **************************/
345
346 /* Network traffic statistic (bytes) */
347
348 int lance_stat = 0;
349
350 static void update_lance_stat (int len) {
351 lance_stat += len;
352 }
353
354 /*
355 This function is used to access Baget/Lance memory to avoid
356 8/32BIT access to VAC A24 space
357 ALL memcpy calls was chenged to this function to avoid dbe problems
358 Don't confuse with function name -- it stays from original code
359 */
360
361 void *slow_memcpy( void *dst, const void *src, size_t len )
362
363 {
364 unsigned long to = (unsigned long)dst;
365 unsigned long from = (unsigned long)src;
366 unsigned long to_end = to +len;
367
368 /* Unaligned flags */
369
370 int odd_from = from & 1;
371 int odd_to = to & 1;
372 int odd_to_end = to_end & 1;
373
374 /* Align for 16BIT-access first */
375
376 register unsigned short *from_a = (unsigned short*) (from & ~1);
377 register unsigned short *to_a = (unsigned short*) (to & ~1);
378 register unsigned short *to_end_a = (unsigned short*) (to_end & ~1);
379
380 /* Caching values -- not in loop invariant */
381
382 register unsigned short from_v;
383 register unsigned short to_v;
384
385 /* Invariant is: from_a and to_a are pointers before or exactly to
386 currently copying byte */
387
388 if (odd_to) {
389 /* First byte unaligned case */
390 from_v = *from_a;
391 to_v = *to_a;
392
393 to_v &= ~0xff;
394 to_v |= 0xff & (from_v >> (odd_from ? 0 : 8));
395 *to_a++ = to_v;
396
397 if (odd_from) from_a++;
398 }
399 if (odd_from == odd_to) {
400 /* Same parity */
401 while (to_a + 7 < to_end_a) {
402 unsigned long dummy1, dummy2;
403 unsigned long reg1, reg2, reg3, reg4;
404
405 __asm__ __volatile__(
406 ".set\tnoreorder\n\t"
407 ".set\tnoat\n\t"
408 "lh\t%2,0(%1)\n\t"
409 "nop\n\t"
410 "lh\t%3,2(%1)\n\t"
411 "sh\t%2,0(%0)\n\t"
412 "lh\t%4,4(%1)\n\t"
413 "sh\t%3,2(%0)\n\t"
414 "lh\t%5,6(%1)\n\t"
415 "sh\t%4,4(%0)\n\t"
416 "lh\t%2,8(%1)\n\t"
417 "sh\t%5,6(%0)\n\t"
418 "lh\t%3,10(%1)\n\t"
419 "sh\t%2,8(%0)\n\t"
420 "lh\t%4,12(%1)\n\t"
421 "sh\t%3,10(%0)\n\t"
422 "lh\t%5,14(%1)\n\t"
423 "sh\t%4,12(%0)\n\t"
424 "nop\n\t"
425 "sh\t%5,14(%0)\n\t"
426 ".set\tat\n\t"
427 ".set\treorder"
428 :"=r" (dummy1), "=r" (dummy2),
429 "=&r" (reg1), "=&r" (reg2), "=&r" (reg3), "=&r" (reg4)
430 :"0" (to_a), "1" (from_a)
431 :"memory");
432
433 to_a += 8;
434 from_a += 8;
435
436 }
437 while (to_a < to_end_a) {
438 *to_a++ = *from_a++;
439 }
440 } else {
441 /* Different parity */
442 from_v = *from_a;
443 while (to_a < to_end_a) {
444 unsigned short from_v_next;
445 from_v_next = *++from_a;
446 *to_a++ = ((from_v & 0xff)<<8) | ((from_v_next>>8) & 0xff);
447 from_v = from_v_next;
448 }
449
450 }
451 if (odd_to_end) {
452 /* Last byte unaligned case */
453 to_v = *to_a;
454 from_v = *from_a;
455
456 to_v &= ~0xff00;
457 if (odd_from == odd_to) {
458 to_v |= from_v & 0xff00;
459 } else {
460 to_v |= (from_v<<8) & 0xff00;
461 }
462
463 *to_a = to_v;
464 }
465
466 update_lance_stat( len );
467
468 return( dst );
469 }
470
471
472 int __init bagetlance_probe( struct net_device *dev )
473
474 { int i;
475 static int found;
476
477 SET_MODULE_OWNER(dev);
478
479 if (found)
480 /* Assume there's only one board possible... That seems true, since
481 * the Riebl/PAM board's address cannot be changed. */
482 return( -ENODEV );
483
484 for( i = 0; i < N_LANCE_ADDR; ++i ) {
485 if (lance_probe1( dev, &lance_addr_list[i] )) {
486 found = 1;
487 return( 0 );
488 }
489 }
490
491 return( -ENODEV );
492 }
493
494
495
496 /* Derived from hwreg_present() in vme/config.c: */
497
498 static int __init addr_accessible( volatile void *regp,
499 int wordflag,
500 int writeflag )
501 {
502 /* We have a fine function to do it */
503 extern int try_read(unsigned long, int);
504 return try_read((unsigned long)regp, sizeof(short)) != -1;
505 }
506
507
508
509 /* Original atari driver uses it */
510 #define IRQ_TYPE_PRIO SA_INTERRUPT
511 #define IRQ_SOURCE_TO_VECTOR(x) (x)
512
513 static int __init lance_probe1( struct net_device *dev,
514 struct lance_addr *init_rec )
515
516 { volatile unsigned short *memaddr =
517 (volatile unsigned short *)init_rec->memaddr;
518 volatile unsigned short *ioaddr =
519 (volatile unsigned short *)init_rec->ioaddr;
520 struct lance_private *lp;
521 struct lance_ioreg *IO;
522 int i;
523 static int did_version;
524 unsigned short save1, save2;
525
526 PROBE_PRINT(( "Probing for Lance card at mem %#lx io %#lx\n",
527 (long)memaddr, (long)ioaddr ));
528
529 /* Test whether memory readable and writable */
530 PROBE_PRINT(( "lance_probe1: testing memory to be accessible\n" ));
531 if (!addr_accessible( memaddr, 1, 1 )) goto probe_fail;
532
533 if ((unsigned long)memaddr >= KSEG2) {
534 extern int kseg2_alloc_io (unsigned long addr, unsigned long size);
535 if (kseg2_alloc_io((unsigned long)memaddr, BAGET_LANCE_MEM_SIZE)) {
536 printk("bagetlance: unable map lance memory\n");
537 goto probe_fail;
538 }
539 }
540
541 /* Written values should come back... */
542 PROBE_PRINT(( "lance_probe1: testing memory to be writable (1)\n" ));
543 save1 = *memaddr;
544 *memaddr = 0x0001;
545 if (*memaddr != 0x0001) goto probe_fail;
546 PROBE_PRINT(( "lance_probe1: testing memory to be writable (2)\n" ));
547 *memaddr = 0x0000;
548 if (*memaddr != 0x0000) goto probe_fail;
549 *memaddr = save1;
550
551 /* First port should be readable and writable */
552 PROBE_PRINT(( "lance_probe1: testing ioport to be accessible\n" ));
553 if (!addr_accessible( ioaddr, 1, 1 )) goto probe_fail;
554
555 /* and written values should be readable */
556 PROBE_PRINT(( "lance_probe1: testing ioport to be writeable\n" ));
557 save2 = ioaddr[1];
558 ioaddr[1] = 0x0001;
559 if (ioaddr[1] != 0x0001) goto probe_fail;
560
561 /* The CSR0_INIT bit should not be readable */
562 PROBE_PRINT(( "lance_probe1: testing CSR0 register function (1)\n" ));
563 save1 = ioaddr[0];
564 ioaddr[1] = CSR0;
565 ioaddr[0] = CSR0_INIT | CSR0_STOP;
566 if (ioaddr[0] != CSR0_STOP) {
567 ioaddr[0] = save1;
568 ioaddr[1] = save2;
569 goto probe_fail;
570 }
571 PROBE_PRINT(( "lance_probe1: testing CSR0 register function (2)\n" ));
572 ioaddr[0] = CSR0_STOP;
573 if (ioaddr[0] != CSR0_STOP) {
574 ioaddr[0] = save1;
575 ioaddr[1] = save2;
576 goto probe_fail;
577 }
578
579 /* Now ok... */
580 PROBE_PRINT(( "lance_probe1: Lance card detected\n" ));
581 goto probe_ok;
582
583 probe_fail:
584 return( 0 );
585
586 probe_ok:
587 init_etherdev( dev, sizeof(struct lance_private) );
588 if (!dev->priv) {
589 dev->priv = kmalloc( sizeof(struct lance_private), GFP_KERNEL );
590 if (!dev->priv)
591 return 0;
592 }
593 lp = (struct lance_private *)dev->priv;
594 MEM = (struct lance_memory *)memaddr;
595 IO = lp->iobase = (struct lance_ioreg *)ioaddr;
596 dev->base_addr = (unsigned long)ioaddr; /* informational only */
597 lp->memcpy_f = init_rec->slow_flag ? slow_memcpy : memcpy;
598
599 REGA( CSR0 ) = CSR0_STOP;
600
601 /* Now test for type: If the eeprom I/O port is readable, it is a
602 * PAM card */
603 if (addr_accessible( &(IO->eeprom), 0, 0 )) {
604 /* Switch back to Ram */
605 i = IO->mem;
606 lp->cardtype = PAM_CARD;
607 }
608 #ifdef NORMAL_MEM_ACCESS
609 else if (*RIEBL_MAGIC_ADDR == RIEBL_MAGIC) {
610 #else
611 else if (({
612 unsigned short *a = (unsigned short*)RIEBL_MAGIC_ADDR;
613 (((int)a[0]) << 16) + ((int)a[1]) == RIEBL_MAGIC;
614 })) {
615 #endif
616 lp->cardtype = NEW_RIEBL;
617 }
618 else
619 lp->cardtype = OLD_RIEBL;
620
621 if (lp->cardtype == PAM_CARD ||
622 memaddr == (unsigned short *)0xffe00000) {
623 /* PAMs card and Riebl on ST use level 5 autovector */
624 request_irq(BAGET_LANCE_IRQ, lance_interrupt, IRQ_TYPE_PRIO,
625 "PAM/Riebl-ST Ethernet", dev);
626 dev->irq = (unsigned short)BAGET_LANCE_IRQ;
627 }
628 else {
629 /* For VME-RieblCards, request a free VME int;
630 * (This must be unsigned long, since dev->irq is short and the
631 * IRQ_MACHSPEC bit would be cut off...)
632 */
633 unsigned long irq = BAGET_LANCE_IRQ;
634 if (!irq) {
635 printk( "Lance: request for VME interrupt failed\n" );
636 return( 0 );
637 }
638 request_irq(irq, lance_interrupt, IRQ_TYPE_PRIO,
639 "Riebl-VME Ethernet", dev);
640 dev->irq = irq;
641 }
642
643 printk("%s: %s at io %#lx, mem %#lx, irq %d%s, hwaddr ",
644 dev->name, lance_names[lp->cardtype],
645 (unsigned long)ioaddr,
646 (unsigned long)memaddr,
647 dev->irq,
648 init_rec->slow_flag ? " (slow memcpy)" : "" );
649
650 /* Get the ethernet address */
651 switch( lp->cardtype ) {
652 case OLD_RIEBL:
653 /* No ethernet address! (Set some default address) */
654 slow_memcpy( dev->dev_addr, OldRieblDefHwaddr, 6 );
655 break;
656 case NEW_RIEBL:
657 lp->memcpy_f( dev->dev_addr, RIEBL_HWADDR_ADDR, 6 );
658 break;
659 case PAM_CARD:
660 i = IO->eeprom;
661 for( i = 0; i < 6; ++i )
662 dev->dev_addr[i] =
663 ((((unsigned short *)MEM)[i*2] & 0x0f) << 4) |
664 ((((unsigned short *)MEM)[i*2+1] & 0x0f));
665 i = IO->mem;
666 break;
667 }
668 for( i = 0; i < 6; ++i )
669 printk( "%02x%s", dev->dev_addr[i], (i < 5) ? ":" : "\n" );
670 if (lp->cardtype == OLD_RIEBL) {
671 printk( "%s: Warning: This is a default ethernet address!\n",
672 dev->name );
673 printk( " Use \"ifconfig hw ether ...\" to set the address.\n" );
674 }
675
676 MEM->init.mode = 0x0000; /* Disable Rx and Tx. */
677
678 {
679 unsigned char hwaddr[6];
680 for( i = 0; i < 6; i++ )
681 hwaddr[i] = dev->dev_addr[i^1]; /* <- 16 bit swap! */
682 slow_memcpy(MEM->init.hwaddr, hwaddr, sizeof(hwaddr));
683 }
684
685 MEM->init.filter[0] = 0x00000000;
686 MEM->init.filter[1] = 0x00000000;
687 MEM->init.rx_ring.adr_lo = offsetof( struct lance_memory, rx_head );
688
689 #ifdef NORMAL_MEM_ACCESS
690 MEM->init.rx_ring.adr_hi = LANCE_HI_BASE;
691 MEM->init.rx_ring.len = RX_RING_LEN_BITS;
692 #else
693 MEM->init.rx_ring.len_adr_hi =
694 ((unsigned)RX_RING_LEN_BITS << 8) | LANCE_HI_BASE;
695 #endif
696
697
698 MEM->init.tx_ring.adr_lo = offsetof( struct lance_memory, tx_head );
699
700 #ifdef NORMAL_MEM_ACCESS
701 MEM->init.tx_ring.adr_hi = LANCE_HI_BASE;
702 MEM->init.tx_ring.len = TX_RING_LEN_BITS;
703 #else
704 MEM->init.tx_ring.len_adr_hi =
705 ((unsigned)TX_RING_LEN_BITS<<8) | LANCE_HI_BASE;
706 #endif
707
708 if (lp->cardtype == PAM_CARD)
709 IO->ivec = IRQ_SOURCE_TO_VECTOR(dev->irq);
710 else
711 *RIEBL_IVEC_ADDR = IRQ_SOURCE_TO_VECTOR(dev->irq);
712
713 if (did_version++ == 0)
714 DPRINTK( 1, ( version ));
715
716 /* The LANCE-specific entries in the device structure. */
717 dev->open = &lance_open;
718 dev->hard_start_xmit = &lance_start_xmit;
719 dev->stop = &lance_close;
720 dev->get_stats = &lance_get_stats;
721 dev->set_multicast_list = &set_multicast_list;
722 dev->set_mac_address = &lance_set_mac_address;
723 dev->start = 0;
724
725 memset( &lp->stats, 0, sizeof(lp->stats) );
726
727 return( 1 );
728 }
729
730
731 static int lance_open( struct net_device *dev )
732
733 { struct lance_private *lp = (struct lance_private *)dev->priv;
734 struct lance_ioreg *IO = lp->iobase;
735 int i;
736
737 DPRINTK( 2, ( "%s: lance_open()\n", dev->name ));
738
739 lance_init_ring(dev);
740 /* Re-initialize the LANCE, and start it when done. */
741
742 REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0);
743 REGA( CSR2 ) = 0;
744 REGA( CSR1 ) = 0;
745 REGA( CSR0 ) = CSR0_INIT;
746 /* From now on, AREG is kept to point to CSR0 */
747
748 i = 1000000;
749 while (--i > 0)
750 if (DREG & CSR0_IDON)
751 break;
752 if (i < 0 || (DREG & CSR0_ERR)) {
753 DPRINTK( 2, ( "lance_open(): opening %s failed, i=%d, csr0=%04x\n",
754 dev->name, i, DREG ));
755 DREG = CSR0_STOP;
756 return( -EIO );
757 }
758 DREG = CSR0_IDON;
759 DREG = CSR0_STRT;
760 DREG = CSR0_INEA;
761
762 dev->tbusy = 0;
763 dev->interrupt = 0;
764 dev->start = 1;
765
766 DPRINTK( 2, ( "%s: LANCE is open, csr0 %04x\n", dev->name, DREG ));
767 return( 0 );
768 }
769
770
771 /* Initialize the LANCE Rx and Tx rings. */
772
773 static void lance_init_ring( struct net_device *dev )
774
775 { struct lance_private *lp = (struct lance_private *)dev->priv;
776 int i;
777 unsigned offset;
778
779 lp->lock = 0;
780 lp->tx_full = 0;
781 lp->cur_rx = lp->cur_tx = 0;
782 lp->dirty_tx = 0;
783
784 offset = offsetof( struct lance_memory, packet_area );
785
786 /* If the packet buffer at offset 'o' would conflict with the reserved area
787 * of RieblCards, advance it */
788 #define CHECK_OFFSET(o) \
789 do { \
790 if (lp->cardtype == OLD_RIEBL || lp->cardtype == NEW_RIEBL) { \
791 if (((o) < RIEBL_RSVD_START) ? (o)+PKT_BUF_SZ > RIEBL_RSVD_START \
792 : (o) < RIEBL_RSVD_END) \
793 (o) = RIEBL_RSVD_END; \
794 } \
795 } while(0)
796
797 for( i = 0; i < TX_RING_SIZE; i++ ) {
798 CHECK_OFFSET(offset);
799 MEM->tx_head[i].base = offset;
800 #ifdef NORMAL_MEM_ACCESS
801 MEM->tx_head[i].flag = TMD1_OWN_HOST;
802 MEM->tx_head[i].base_hi = LANCE_HI_BASE;
803 #else
804 MEM->tx_head[i].flag_base_hi =
805 (TMD1_OWN_HOST<<8) | LANCE_HI_BASE;
806 #endif
807 MEM->tx_head[i].length = 0;
808 MEM->tx_head[i].misc = 0;
809 offset += PKT_BUF_SZ;
810 }
811
812 for( i = 0; i < RX_RING_SIZE; i++ ) {
813 CHECK_OFFSET(offset);
814 MEM->rx_head[i].base = offset;
815 #ifdef NORMAL_MEM_ACCESS
816 MEM->rx_head[i].flag = TMD1_OWN_CHIP;
817 MEM->rx_head[i].base_hi = LANCE_HI_BASE;
818 #else
819 MEM->rx_head[i].flag_base_hi =
820 (TMD1_OWN_CHIP<<8) | LANCE_HI_BASE;
821 #endif
822 MEM->rx_head[i].buf_length = -PKT_BUF_SZ;
823 MEM->rx_head[i].msg_length = 0;
824 offset += PKT_BUF_SZ;
825 }
826 }
827
828
829 static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev )
830
831 { struct lance_private *lp = (struct lance_private *)dev->priv;
832 struct lance_ioreg *IO = lp->iobase;
833 int entry, len;
834 struct lance_tx_head *head;
835 unsigned long flags;
836
837 /* Transmitter timeout, serious problems. */
838 if (dev->tbusy) {
839 int tickssofar = jiffies - dev->trans_start;
840 if (tickssofar < 20)
841 return( 1 );
842 AREG = CSR0;
843 DPRINTK( 1, ( "%s: transmit timed out, status %04x, resetting.\n",
844 dev->name, DREG ));
845 DREG = CSR0_STOP;
846 /*
847 * Always set BSWP after a STOP as STOP puts it back into
848 * little endian mode.
849 */
850 REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0);
851 lp->stats.tx_errors++;
852 #ifndef final_version
853 { int i;
854 DPRINTK( 2, ( "Ring data: dirty_tx %d cur_tx %d%s cur_rx %d\n",
855 lp->dirty_tx, lp->cur_tx,
856 lp->tx_full ? " (full)" : "",
857 lp->cur_rx ));
858 for( i = 0 ; i < RX_RING_SIZE; i++ )
859 DPRINTK( 2, ( "rx #%d: base=%04x blen=%04x mlen=%04x\n",
860 i, MEM->rx_head[i].base,
861 -MEM->rx_head[i].buf_length,
862 MEM->rx_head[i].msg_length ));
863 for( i = 0 ; i < TX_RING_SIZE; i++ )
864 DPRINTK( 2, ( "tx #%d: base=%04x len=%04x misc=%04x\n",
865 i, MEM->tx_head[i].base,
866 -MEM->tx_head[i].length,
867 MEM->tx_head[i].misc ));
868 }
869 #endif
870 lance_init_ring(dev);
871 REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT;
872
873 dev->tbusy = 0;
874 dev->trans_start = jiffies;
875
876 return( 0 );
877 }
878
879 DPRINTK( 2, ( "%s: lance_start_xmit() called, csr0 %4.4x.\n",
880 dev->name, DREG ));
881
882 /* Block a timer-based transmit from overlapping. This could better be
883 done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */
884 if (test_and_set_bit( 0, (void*)&dev->tbusy ) != 0) {
885 DPRINTK( 0, ( "%s: Transmitter access conflict.\n", dev->name ));
886 return 1;
887 }
888
889 if (test_and_set_bit( 0, (void*)&lp->lock ) != 0) {
890 DPRINTK( 0, ( "%s: tx queue lock!.\n", dev->name ));
891 /* don't clear dev->tbusy flag. */
892 return 1;
893 }
894
895 /* Fill in a Tx ring entry */
896 if (lance_debug >= 3) {
897 u_char *p;
898 int i;
899 printk( "%s: TX pkt type 0x%04x from ", dev->name,
900 ((u_short *)skb->data)[6]);
901 for( p = &((u_char *)skb->data)[6], i = 0; i < 6; i++ )
902 printk("%02x%s", *p++, i != 5 ? ":" : "" );
903 printk(" to ");
904 for( p = (u_char *)skb->data, i = 0; i < 6; i++ )
905 printk("%02x%s", *p++, i != 5 ? ":" : "" );
906 printk(" data at 0x%08x len %d\n", (int)skb->data,
907 (int)skb->len );
908 }
909
910 /* We're not prepared for the int until the last flags are set/reset. And
911 * the int may happen already after setting the OWN_CHIP... */
912 save_flags(flags);
913 cli();
914
915 /* Mask to ring buffer boundary. */
916 entry = lp->cur_tx & TX_RING_MOD_MASK;
917 head = &(MEM->tx_head[entry]);
918
919 /* Caution: the write order is important here, set the "ownership" bits
920 * last.
921 */
922
923 /* The old LANCE chips doesn't automatically pad buffers to min. size. */
924 len = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN;
925 /* PAM-Card has a bug: Can only send packets with even number of bytes! */
926 if (lp->cardtype == PAM_CARD && (len & 1))
927 ++len;
928
929 head->length = -len;
930 head->misc = 0;
931 lp->memcpy_f( PKTBUF_ADDR(head), (void *)skb->data, skb->len );
932 #ifdef NORMAL_MEM_ACCESS
933 head->flag = TMD1_OWN_CHIP | TMD1_ENP | TMD1_STP;
934 #else
935 SET_FLAG(head,(TMD1_OWN_CHIP | TMD1_ENP | TMD1_STP));
936 #endif
937 lp->stats.tx_bytes += skb->len;
938 dev_kfree_skb( skb );
939 lp->cur_tx++;
940 while( lp->cur_tx >= TX_RING_SIZE && lp->dirty_tx >= TX_RING_SIZE ) {
941 lp->cur_tx -= TX_RING_SIZE;
942 lp->dirty_tx -= TX_RING_SIZE;
943 }
944
945 /* Trigger an immediate send poll. */
946 DREG = CSR0_INEA | CSR0_TDMD;
947 dev->trans_start = jiffies;
948
949 lp->lock = 0;
950 #ifdef NORMAL_MEM_ACCESS
951 if ((MEM->tx_head[(entry+1) & TX_RING_MOD_MASK].flag & TMD1_OWN) ==
952 #else
953 if ((GET_FLAG(&MEM->tx_head[(entry+1) & TX_RING_MOD_MASK]) & TMD1_OWN) ==
954 #endif
955 TMD1_OWN_HOST)
956 dev->tbusy = 0;
957 else
958 lp->tx_full = 1;
959 restore_flags(flags);
960
961 return 0;
962 }
963
964 /* The LANCE interrupt handler. */
965
966 static void lance_interrupt( int irq, void *dev_id, struct pt_regs *fp)
967 {
968 struct net_device *dev = dev_id;
969 struct lance_private *lp;
970 struct lance_ioreg *IO;
971 int csr0, boguscnt = 10;
972
973 if (dev == NULL) {
974 DPRINTK( 1, ( "lance_interrupt(): interrupt for unknown device.\n" ));
975 return;
976 }
977
978 lp = (struct lance_private *)dev->priv;
979 IO = lp->iobase;
980 AREG = CSR0;
981
982 if (dev->interrupt) {
983 DPRINTK( 1, ( "Re-entering CAUSE=%08x STATUS=%08x\n",
984 read_32bit_cp0_register(CP0_CAUSE),
985 read_32bit_cp0_register(CP0_STATUS) ));
986 panic("lance: interrupt handler reentered !");
987 }
988
989 dev->interrupt = 1;
990
991 while( ((csr0 = DREG) & (CSR0_ERR | CSR0_TINT | CSR0_RINT)) &&
992 --boguscnt >= 0) {
993 /* Acknowledge all of the current interrupt sources ASAP. */
994 DREG = csr0 & ~(CSR0_INIT | CSR0_STRT | CSR0_STOP |
995 CSR0_TDMD | CSR0_INEA);
996
997 DPRINTK( 2, ( "%s: interrupt csr0=%04x new csr=%04x.\n",
998 dev->name, csr0, DREG ));
999
1000 if (csr0 & CSR0_RINT) /* Rx interrupt */
1001 lance_rx( dev );
1002
1003 if (csr0 & CSR0_TINT) { /* Tx-done interrupt */
1004 int dirty_tx = lp->dirty_tx;
1005
1006 while( dirty_tx < lp->cur_tx) {
1007 int entry = dirty_tx & TX_RING_MOD_MASK;
1008 #ifdef NORMAL_MEM_ACCESS
1009 int status = MEM->tx_head[entry].flag;
1010 #else
1011 int status = GET_FLAG(&MEM->tx_head[entry]);
1012 #endif
1013 if (status & TMD1_OWN_CHIP)
1014 break; /* It still hasn't been Txed */
1015
1016 #ifdef NORMAL_MEM_ACCESS
1017 MEM->tx_head[entry].flag = 0;
1018 #else
1019 SET_FLAG(&MEM->tx_head[entry],0);
1020 #endif
1021
1022 if (status & TMD1_ERR) {
1023 /* There was an major error, log it. */
1024 int err_status = MEM->tx_head[entry].misc;
1025 lp->stats.tx_errors++;
1026 if (err_status & TMD3_RTRY) lp->stats.tx_aborted_errors++;
1027 if (err_status & TMD3_LCAR) lp->stats.tx_carrier_errors++;
1028 if (err_status & TMD3_LCOL) lp->stats.tx_window_errors++;
1029 if (err_status & TMD3_UFLO) {
1030 /* Ackk! On FIFO errors the Tx unit is turned off! */
1031 lp->stats.tx_fifo_errors++;
1032 /* Remove this verbosity later! */
1033 DPRINTK( 1, ( "%s: Tx FIFO error! Status %04x\n",
1034 dev->name, csr0 ));
1035 /* Restart the chip. */
1036 DREG = CSR0_STRT;
1037 }
1038 } else {
1039 if (status & (TMD1_MORE | TMD1_ONE | TMD1_DEF))
1040 lp->stats.collisions++;
1041 lp->stats.tx_packets++;
1042 }
1043 dirty_tx++;
1044 }
1045
1046 #ifndef final_version
1047 if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) {
1048 DPRINTK( 0, ( "out-of-sync dirty pointer,"
1049 " %d vs. %d, full=%d.\n",
1050 dirty_tx, lp->cur_tx, lp->tx_full ));
1051 dirty_tx += TX_RING_SIZE;
1052 }
1053 #endif
1054
1055 if (lp->tx_full && dev->tbusy
1056 && dirty_tx > lp->cur_tx - TX_RING_SIZE + 2) {
1057 /* The ring is no longer full, clear tbusy. */
1058 lp->tx_full = 0;
1059 dev->tbusy = 0;
1060 mark_bh( NET_BH );
1061 }
1062
1063 lp->dirty_tx = dirty_tx;
1064 }
1065
1066 /* Log misc errors. */
1067 if (csr0 & CSR0_BABL) lp->stats.tx_errors++; /* Tx babble. */
1068 if (csr0 & CSR0_MISS) lp->stats.rx_errors++; /* Missed a Rx frame. */
1069 if (csr0 & CSR0_MERR) {
1070 DPRINTK( 1, ( "%s: Bus master arbitration failure (?!?), "
1071 "status %04x.\n", dev->name, csr0 ));
1072 /* Restart the chip. */
1073 DREG = CSR0_STRT;
1074 }
1075 }
1076
1077 /* Clear any other interrupt, and set interrupt enable. */
1078 DREG = CSR0_BABL | CSR0_CERR | CSR0_MISS | CSR0_MERR |
1079 CSR0_IDON | CSR0_INEA;
1080
1081 DPRINTK( 2, ( "%s: exiting interrupt, csr0=%#04x.\n",
1082 dev->name, DREG ));
1083 dev->interrupt = 0;
1084 return;
1085 }
1086
1087
1088 static int lance_rx( struct net_device *dev )
1089
1090 { struct lance_private *lp = (struct lance_private *)dev->priv;
1091 int entry = lp->cur_rx & RX_RING_MOD_MASK;
1092 int i;
1093
1094 #ifdef NORMAL_MEM_ACCESS
1095 DPRINTK( 2, ( "%s: rx int, flag=%04x\n", dev->name,
1096 MEM->rx_head[entry].flag ));
1097 #else
1098 DPRINTK( 2, ( "%s: rx int, flag=%04x\n", dev->name,
1099 GET_FLAG(&MEM->rx_head[entry]) ));
1100 #endif
1101
1102 /* If we own the next entry, it's a new packet. Send it up. */
1103 #ifdef NORMAL_MEM_ACCESS
1104 while( (MEM->rx_head[entry].flag & RMD1_OWN) == RMD1_OWN_HOST ) {
1105 #else
1106 while( (GET_FLAG(&MEM->rx_head[entry]) & RMD1_OWN) == RMD1_OWN_HOST ) {
1107 #endif
1108 struct lance_rx_head *head = &(MEM->rx_head[entry]);
1109 #ifdef NORMAL_MEM_ACCESS
1110 int status = head->flag;
1111 #else
1112 int status = GET_FLAG(head);
1113 #endif
1114
1115 if (status != (RMD1_ENP|RMD1_STP)) { /* There was an error. */
1116 /* There is a tricky error noted by John Murphy,
1117 <murf@perftech.com> to Russ Nelson: Even with full-sized
1118 buffers it's possible for a jabber packet to use two
1119 buffers, with only the last correctly noting the error. */
1120 if (status & RMD1_ENP) /* Only count a general error at the */
1121 lp->stats.rx_errors++; /* end of a packet.*/
1122 if (status & RMD1_FRAM) lp->stats.rx_frame_errors++;
1123 if (status & RMD1_OFLO) lp->stats.rx_over_errors++;
1124 if (status & RMD1_CRC) lp->stats.rx_crc_errors++;
1125 if (status & RMD1_BUFF) lp->stats.rx_fifo_errors++;
1126 #ifdef NORMAL_MEM_ACCESS
1127 head->flag &= (RMD1_ENP|RMD1_STP);
1128 #else
1129 SET_FLAG(head,GET_FLAG(head) & (RMD1_ENP|RMD1_STP));
1130 #endif
1131 } else {
1132 /* Malloc up new buffer, compatible with net-3. */
1133 short pkt_len = head->msg_length & 0xfff;
1134 struct sk_buff *skb;
1135
1136 if (pkt_len < 60) {
1137 printk( "%s: Runt packet!\n", dev->name );
1138 lp->stats.rx_errors++;
1139 }
1140 else {
1141 skb = dev_alloc_skb( pkt_len+2 );
1142 if (skb == NULL) {
1143 DPRINTK( 1, ( "%s: Memory squeeze, deferring packet.\n",
1144 dev->name ));
1145 for( i = 0; i < RX_RING_SIZE; i++ )
1146 #ifdef NORMAL_MEM_ACCESS
1147 if (MEM->rx_head[(entry+i) & RX_RING_MOD_MASK].flag &
1148 #else
1149 if (GET_FLAG(&MEM->rx_head[(entry+i) &
1150 RX_RING_MOD_MASK]) &
1151 #endif
1152 RMD1_OWN_CHIP)
1153 break;
1154
1155 if (i > RX_RING_SIZE - 2) {
1156 lp->stats.rx_dropped++;
1157 #ifdef NORMAL_MEM_ACCESS
1158 head->flag |= RMD1_OWN_CHIP;
1159 #else
1160 SET_FLAG(head,GET_FLAG(head) | RMD1_OWN_CHIP);
1161 #endif
1162 lp->cur_rx++;
1163 }
1164 break;
1165 }
1166
1167 if (lance_debug >= 3) {
1168 u_char *data = PKTBUF_ADDR(head), *p;
1169 printk( "%s: RX pkt type 0x%04x from ", dev->name,
1170 ((u_short *)data)[6]);
1171 for( p = &data[6], i = 0; i < 6; i++ )
1172 printk("%02x%s", *p++, i != 5 ? ":" : "" );
1173 printk(" to ");
1174 for( p = data, i = 0; i < 6; i++ )
1175 printk("%02x%s", *p++, i != 5 ? ":" : "" );
1176 printk(" data %02x %02x %02x %02x %02x %02x %02x %02x "
1177 "len %d\n",
1178 data[15], data[16], data[17], data[18],
1179 data[19], data[20], data[21], data[22],
1180 pkt_len );
1181 }
1182
1183 skb->dev = dev;
1184 skb_reserve( skb, 2 ); /* 16 byte align */
1185 skb_put( skb, pkt_len ); /* Make room */
1186 lp->memcpy_f( skb->data, PKTBUF_ADDR(head), pkt_len );
1187 skb->protocol = eth_type_trans( skb, dev );
1188 netif_rx( skb );
1189 dev->last_rx = jiffies;
1190 lp->stats.rx_packets++;
1191 lp->stats.rx_bytes += pkt_len;
1192 }
1193 }
1194
1195 #ifdef NORMAL_MEM_ACCESS
1196 head->flag |= RMD1_OWN_CHIP;
1197 #else
1198 SET_FLAG(head,GET_FLAG(head) | RMD1_OWN_CHIP);
1199 #endif
1200 entry = (++lp->cur_rx) & RX_RING_MOD_MASK;
1201 }
1202 lp->cur_rx &= RX_RING_MOD_MASK;
1203
1204 /* From lance.c (Donald Becker): */
1205 /* We should check that at least two ring entries are free. If not,
1206 we should free one and mark stats->rx_dropped++. */
1207
1208 return 0;
1209 }
1210
1211
1212 static int lance_close( struct net_device *dev )
1213
1214 { struct lance_private *lp = (struct lance_private *)dev->priv;
1215 struct lance_ioreg *IO = lp->iobase;
1216
1217 dev->start = 0;
1218 dev->tbusy = 1;
1219
1220 AREG = CSR0;
1221
1222 DPRINTK( 2, ( "%s: Shutting down ethercard, status was %2.2x.\n",
1223 dev->name, DREG ));
1224
1225 /* We stop the LANCE here -- it occasionally polls
1226 memory if we don't. */
1227 DREG = CSR0_STOP;
1228
1229 return 0;
1230 }
1231
1232
1233 static struct net_device_stats *lance_get_stats( struct net_device *dev )
1234
1235 {
1236 struct lance_private *lp = (struct lance_private *)dev->priv;
1237 return &lp->stats;
1238 }
1239
1240
1241 /* Set or clear the multicast filter for this adaptor.
1242 num_addrs == -1 Promiscuous mode, receive all packets
1243 num_addrs == 0 Normal mode, clear multicast list
1244 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1245 best-effort filtering.
1246 */
1247
1248 static void set_multicast_list( struct net_device *dev )
1249
1250 { struct lance_private *lp = (struct lance_private *)dev->priv;
1251 struct lance_ioreg *IO = lp->iobase;
1252
1253 if (!dev->start)
1254 /* Only possible if board is already started */
1255 return;
1256
1257 /* We take the simple way out and always enable promiscuous mode. */
1258 DREG = CSR0_STOP; /* Temporarily stop the lance. */
1259
1260 if (dev->flags & IFF_PROMISC) {
1261 /* Log any net taps. */
1262 DPRINTK( 1, ( "%s: Promiscuous mode enabled.\n", dev->name ));
1263 REGA( CSR15 ) = 0x8000; /* Set promiscuous mode */
1264 } else {
1265 short multicast_table[4];
1266 int num_addrs = dev->mc_count;
1267 int i;
1268 /* We don't use the multicast table, but rely on upper-layer
1269 * filtering. */
1270 memset( multicast_table, (num_addrs == 0) ? 0 : -1,
1271 sizeof(multicast_table) );
1272 for( i = 0; i < 4; i++ )
1273 REGA( CSR8+i ) = multicast_table[i];
1274 REGA( CSR15 ) = 0; /* Unset promiscuous mode */
1275 }
1276
1277 /*
1278 * Always set BSWP after a STOP as STOP puts it back into
1279 * little endian mode.
1280 */
1281 REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0);
1282
1283 /* Resume normal operation and reset AREG to CSR0 */
1284 REGA( CSR0 ) = CSR0_IDON | CSR0_INEA | CSR0_STRT;
1285 }
1286
1287
1288 /* This is needed for old RieblCards and possible for new RieblCards */
1289
1290 static int lance_set_mac_address( struct net_device *dev, void *addr )
1291
1292 { struct lance_private *lp = (struct lance_private *)dev->priv;
1293 struct sockaddr *saddr = addr;
1294 int i;
1295
1296 if (lp->cardtype != OLD_RIEBL && lp->cardtype != NEW_RIEBL)
1297 return( -EOPNOTSUPP );
1298
1299 if (dev->start) {
1300 /* Only possible while card isn't started */
1301 DPRINTK( 1, ( "%s: hwaddr can be set only while card isn't open.\n",
1302 dev->name ));
1303 return( -EIO );
1304 }
1305
1306 slow_memcpy( dev->dev_addr, saddr->sa_data, dev->addr_len );
1307
1308 {
1309 unsigned char hwaddr[6];
1310 for( i = 0; i < 6; i++ )
1311 hwaddr[i] = dev->dev_addr[i^1]; /* <- 16 bit swap! */
1312 slow_memcpy(MEM->init.hwaddr, hwaddr, sizeof(hwaddr));
1313 }
1314
1315 lp->memcpy_f( RIEBL_HWADDR_ADDR, dev->dev_addr, 6 );
1316 /* set also the magic for future sessions */
1317 #ifdef NORMAL_MEM_ACCESS
1318 *RIEBL_MAGIC_ADDR = RIEBL_MAGIC;
1319 #else
1320 {
1321 unsigned long magic = RIEBL_MAGIC;
1322 slow_memcpy(RIEBL_MAGIC_ADDR, &magic, sizeof(*RIEBL_MAGIC_ADDR));
1323 }
1324 #endif
1325 return( 0 );
1326 }
1327
1328
1329 #ifdef MODULE
1330 static struct net_device bagetlance_dev;
1331
1332 int init_module(void)
1333
1334 { int err;
1335
1336 bagetlance_dev.init = bagetlance_probe;
1337 if ((err = register_netdev( &bagetlance_dev ))) {
1338 if (err == -EIO) {
1339 printk( "No Vme Lance board found. Module not loaded.\n");
1340 }
1341 return( err );
1342 }
1343 return( 0 );
1344 }
1345
1346 void cleanup_module(void)
1347
1348 {
1349 unregister_netdev( &bagetlance_dev );
1350 }
1351
1352 #endif /* MODULE */
1353
1354 /*
1355 * Local variables:
1356 * c-indent-level: 4
1357 * tab-width: 4
1358 * End:
1359 */
1360