File: /usr/src/linux/drivers/net/hamachi.c
1 /* hamachi.c: A Packet Engines GNIC-II Gigabit Ethernet driver for Linux. */
2 /*
3 Written 1998-2000 by Donald Becker.
4 Updates 2000 by Keith Underwood.
5
6 This software may be used and distributed according to the terms of
7 the GNU General Public License (GPL), incorporated herein by reference.
8 Drivers based on or derived from this code fall under the GPL and must
9 retain the authorship, copyright and license notice. This file is not
10 a complete program and may only be used when the entire operating
11 system is licensed under the GPL.
12
13 The author may be reached as becker@scyld.com, or C/O
14 Scyld Computing Corporation
15 410 Severn Ave., Suite 210
16 Annapolis MD 21403
17
18 This driver is for the Packet Engines GNIC-II PCI Gigabit Ethernet
19 adapter.
20
21 Support and updates available at
22 http://www.scyld.com/network/hamachi.html
23 or
24 http://www.parl.clemson.edu/~keithu/hamachi.html
25
26
27
28 Linux kernel changelog:
29
30 LK1.0.1:
31 - fix lack of pci_dev<->dev association
32 - ethtool support (jgarzik)
33
34 */
35
36 #define DRV_NAME "hamachi"
37 #define DRV_VERSION "1.01+LK1.0.1"
38 #define DRV_RELDATE "5/18/2001"
39
40
41 /* A few user-configurable values. */
42
43 static int debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */
44 #define final_version
45 #define hamachi_debug debug
46 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
47 static int max_interrupt_work = 40;
48 static int mtu;
49 /* Default values selected by testing on a dual processor PIII-450 */
50 /* These six interrupt control parameters may be set directly when loading the
51 * module, or through the rx_params and tx_params variables
52 */
53 static int max_rx_latency = 0x11;
54 static int max_rx_gap = 0x05;
55 static int min_rx_pkt = 0x18;
56 static int max_tx_latency = 0x00;
57 static int max_tx_gap = 0x00;
58 static int min_tx_pkt = 0x30;
59
60 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
61 -Setting to > 1518 causes all frames to be copied
62 -Setting to 0 disables copies
63 */
64 static int rx_copybreak;
65
66 /* An override for the hardware detection of bus width.
67 Set to 1 to force 32 bit PCI bus detection. Set to 4 to force 64 bit.
68 Add 2 to disable parity detection.
69 */
70 static int force32;
71
72
73 /* Used to pass the media type, etc.
74 These exist for driver interoperability.
75 No media types are currently defined.
76 - The lower 4 bits are reserved for the media type.
77 - The next three bits may be set to one of the following:
78 0x00000000 : Autodetect PCI bus
79 0x00000010 : Force 32 bit PCI bus
80 0x00000020 : Disable parity detection
81 0x00000040 : Force 64 bit PCI bus
82 Default is autodetect
83 - The next bit can be used to force half-duplex. This is a bad
84 idea since no known implementations implement half-duplex, and,
85 in general, half-duplex for gigabit ethernet is a bad idea.
86 0x00000080 : Force half-duplex
87 Default is full-duplex.
88 - In the original driver, the ninth bit could be used to force
89 full-duplex. Maintain that for compatibility
90 0x00000200 : Force full-duplex
91 */
92 #define MAX_UNITS 8 /* More are supported, limit only on options */
93 static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
94 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
95 /* The Hamachi chipset supports 3 parameters each for Rx and Tx
96 * interruput management. Parameters will be loaded as specified into
97 * the TxIntControl and RxIntControl registers.
98 *
99 * The registers are arranged as follows:
100 * 23 - 16 15 - 8 7 - 0
101 * _________________________________
102 * | min_pkt | max_gap | max_latency |
103 * ---------------------------------
104 * min_pkt : The minimum number of packets processed between
105 * interrupts.
106 * max_gap : The maximum inter-packet gap in units of 8.192 us
107 * max_latency : The absolute time between interrupts in units of 8.192 us
108 *
109 */
110 static int rx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
111 static int tx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
112
113 /* Operational parameters that are set at compile time. */
114
115 /* Keep the ring sizes a power of two for compile efficiency.
116 The compiler will convert <unsigned>'%'<2^N> into a bit mask.
117 Making the Tx ring too large decreases the effectiveness of channel
118 bonding and packet priority.
119 There are no ill effects from too-large receive rings, except for
120 excessive memory usage */
121 /* Empirically it appears that the Tx ring needs to be a little bigger
122 for these Gbit adapters or you get into an overrun condition really
123 easily. Also, things appear to work a bit better in back-to-back
124 configurations if the Rx ring is 8 times the size of the Tx ring
125 */
126 #define TX_RING_SIZE 64
127 #define RX_RING_SIZE 512
128 #define TX_TOTAL_SIZE TX_RING_SIZE*sizeof(struct hamachi_desc)
129 #define RX_TOTAL_SIZE RX_RING_SIZE*sizeof(struct hamachi_desc)
130
131 /*
132 * Enable netdev_ioctl. Added interrupt coalescing parameter adjustment.
133 * 2/19/99 Pete Wyckoff <wyckoff@ca.sandia.gov>
134 */
135
136 /* play with 64-bit addrlen; seems to be a teensy bit slower --pw */
137 /* #define ADDRLEN 64 */
138
139 /*
140 * RX_CHECKSUM turns on card-generated receive checksum generation for
141 * TCP and UDP packets. Otherwise the upper layers do the calculation.
142 * TX_CHECKSUM won't do anything too useful, even if it works. There's no
143 * easy mechanism by which to tell the TCP/UDP stack that it need not
144 * generate checksums for this device. But if somebody can find a way
145 * to get that to work, most of the card work is in here already.
146 * 3/10/1999 Pete Wyckoff <wyckoff@ca.sandia.gov>
147 */
148 #undef TX_CHECKSUM
149 #define RX_CHECKSUM
150
151 /* Operational parameters that usually are not changed. */
152 /* Time in jiffies before concluding the transmitter is hung. */
153 #define TX_TIMEOUT (5*HZ)
154
155 #include <linux/module.h>
156 #include <linux/kernel.h>
157 #include <linux/sched.h>
158 #include <linux/string.h>
159 #include <linux/timer.h>
160 #include <linux/time.h>
161 #include <linux/ptrace.h>
162 #include <linux/errno.h>
163 #include <linux/ioport.h>
164 #include <linux/slab.h>
165 #include <linux/interrupt.h>
166 #include <linux/pci.h>
167 #include <linux/init.h>
168 #include <linux/ethtool.h>
169 #include <linux/mii.h>
170
171 #include <asm/uaccess.h>
172 #include <asm/processor.h> /* Processor type for cache alignment. */
173 #include <asm/bitops.h>
174 #include <asm/io.h>
175 #include <asm/unaligned.h>
176 #include <asm/cache.h>
177
178 #include <linux/netdevice.h>
179 #include <linux/etherdevice.h>
180 #include <linux/skbuff.h>
181 #include <linux/ip.h>
182 #include <linux/delay.h>
183
184 static char version[] __initdata =
185 KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " Written by Donald Becker\n"
186 KERN_INFO " Some modifications by Eric kasten <kasten@nscl.msu.edu>\n"
187 KERN_INFO " Further modifications by Keith Underwood <keithu@parl.clemson.edu>\n";
188
189
190 /* IP_MF appears to be only defined in <netinet/ip.h>, however,
191 we need it for hardware checksumming support. FYI... some of
192 the definitions in <netinet/ip.h> conflict/duplicate those in
193 other linux headers causing many compiler warnings.
194 */
195 #ifndef IP_MF
196 #define IP_MF 0x2000 /* IP more frags from <netinet/ip.h> */
197 #endif
198
199 /* Define IP_OFFSET to be IPOPT_OFFSET */
200 #ifndef IP_OFFSET
201 #ifdef IPOPT_OFFSET
202 #define IP_OFFSET IPOPT_OFFSET
203 #else
204 #define IP_OFFSET 2
205 #endif
206 #endif
207
208 #define RUN_AT(x) (jiffies + (x))
209
210 /* Condensed bus+endian portability operations. */
211 #if ADDRLEN == 64
212 #define cpu_to_leXX(addr) cpu_to_le64(addr)
213 #else
214 #define cpu_to_leXX(addr) cpu_to_le32(addr)
215 #endif
216
217
218 /*
219 Theory of Operation
220
221 I. Board Compatibility
222
223 This device driver is designed for the Packet Engines "Hamachi"
224 Gigabit Ethernet chip. The only PCA currently supported is the GNIC-II 64-bit
225 66Mhz PCI card.
226
227 II. Board-specific settings
228
229 No jumpers exist on the board. The chip supports software correction of
230 various motherboard wiring errors, however this driver does not support
231 that feature.
232
233 III. Driver operation
234
235 IIIa. Ring buffers
236
237 The Hamachi uses a typical descriptor based bus-master architecture.
238 The descriptor list is similar to that used by the Digital Tulip.
239 This driver uses two statically allocated fixed-size descriptor lists
240 formed into rings by a branch from the final descriptor to the beginning of
241 the list. The ring sizes are set at compile time by RX/TX_RING_SIZE.
242
243 This driver uses a zero-copy receive and transmit scheme similar my other
244 network drivers.
245 The driver allocates full frame size skbuffs for the Rx ring buffers at
246 open() time and passes the skb->data field to the Hamachi as receive data
247 buffers. When an incoming frame is less than RX_COPYBREAK bytes long,
248 a fresh skbuff is allocated and the frame is copied to the new skbuff.
249 When the incoming frame is larger, the skbuff is passed directly up the
250 protocol stack and replaced by a newly allocated skbuff.
251
252 The RX_COPYBREAK value is chosen to trade-off the memory wasted by
253 using a full-sized skbuff for small frames vs. the copying costs of larger
254 frames. Gigabit cards are typically used on generously configured machines
255 and the underfilled buffers have negligible impact compared to the benefit of
256 a single allocation size, so the default value of zero results in never
257 copying packets.
258
259 IIIb/c. Transmit/Receive Structure
260
261 The Rx and Tx descriptor structure are straight-forward, with no historical
262 baggage that must be explained. Unlike the awkward DBDMA structure, there
263 are no unused fields or option bits that had only one allowable setting.
264
265 Two details should be noted about the descriptors: The chip supports both 32
266 bit and 64 bit address structures, and the length field is overwritten on
267 the receive descriptors. The descriptor length is set in the control word
268 for each channel. The development driver uses 32 bit addresses only, however
269 64 bit addresses may be enabled for 64 bit architectures e.g. the Alpha.
270
271 IIId. Synchronization
272
273 This driver is very similar to my other network drivers.
274 The driver runs as two independent, single-threaded flows of control. One
275 is the send-packet routine, which enforces single-threaded use by the
276 dev->tbusy flag. The other thread is the interrupt handler, which is single
277 threaded by the hardware and other software.
278
279 The send packet thread has partial control over the Tx ring and 'dev->tbusy'
280 flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
281 queue slot is empty, it clears the tbusy flag when finished otherwise it sets
282 the 'hmp->tx_full' flag.
283
284 The interrupt handler has exclusive control over the Rx ring and records stats
285 from the Tx ring. After reaping the stats, it marks the Tx queue entry as
286 empty by incrementing the dirty_tx mark. Iff the 'hmp->tx_full' flag is set, it
287 clears both the tx_full and tbusy flags.
288
289 IV. Notes
290
291 Thanks to Kim Stearns of Packet Engines for providing a pair of GNIC-II boards.
292
293 IVb. References
294
295 Hamachi Engineering Design Specification, 5/15/97
296 (Note: This version was marked "Confidential".)
297
298 IVc. Errata
299
300 None noted.
301
302 V. Recent Changes
303
304 01/15/1999 EPK Enlargement of the TX and RX ring sizes. This appears
305 to help avoid some stall conditions -- this needs further research.
306
307 01/15/1999 EPK Creation of the hamachi_tx function. This function cleans
308 the Tx ring and is called from hamachi_start_xmit (this used to be
309 called from hamachi_interrupt but it tends to delay execution of the
310 interrupt handler and thus reduce bandwidth by reducing the latency
311 between hamachi_rx()'s). Notably, some modification has been made so
312 that the cleaning loop checks only to make sure that the DescOwn bit
313 isn't set in the status flag since the card is not required
314 to set the entire flag to zero after processing.
315
316 01/15/1999 EPK In the hamachi_start_tx function, the Tx ring full flag is
317 checked before attempting to add a buffer to the ring. If the ring is full
318 an attempt is made to free any dirty buffers and thus find space for
319 the new buffer or the function returns non-zero which should case the
320 scheduler to reschedule the buffer later.
321
322 01/15/1999 EPK Some adjustments were made to the chip intialization.
323 End-to-end flow control should now be fully active and the interrupt
324 algorithm vars have been changed. These could probably use further tuning.
325
326 01/15/1999 EPK Added the max_{rx,tx}_latency options. These are used to
327 set the rx and tx latencies for the Hamachi interrupts. If you're having
328 problems with network stalls, try setting these to higher values.
329 Valid values are 0x00 through 0xff.
330
331 01/15/1999 EPK In general, the overall bandwidth has increased and
332 latencies are better (sometimes by a factor of 2). Stalls are rare at
333 this point, however there still appears to be a bug somewhere between the
334 hardware and driver. TCP checksum errors under load also appear to be
335 eliminated at this point.
336
337 01/18/1999 EPK Ensured that the DescEndRing bit was being set on both the
338 Rx and Tx rings. This appears to have been affecting whether a particular
339 peer-to-peer connection would hang under high load. I believe the Rx
340 rings was typically getting set correctly, but the Tx ring wasn't getting
341 the DescEndRing bit set during initialization. ??? Does this mean the
342 hamachi card is using the DescEndRing in processing even if a particular
343 slot isn't in use -- hypothetically, the card might be searching the
344 entire Tx ring for slots with the DescOwn bit set and then processing
345 them. If the DescEndRing bit isn't set, then it might just wander off
346 through memory until it hits a chunk of data with that bit set
347 and then looping back.
348
349 02/09/1999 EPK Added Michel Mueller's TxDMA Interrupt and Tx-timeout
350 problem (TxCmd and RxCmd need only to be set when idle or stopped.
351
352 02/09/1999 EPK Added code to check/reset dev->tbusy in hamachi_interrupt.
353 (Michel Mueller pointed out the ``permanently busy'' potential
354 problem here).
355
356 02/22/1999 EPK Added Pete Wyckoff's ioctl to control the Tx/Rx latencies.
357
358 02/23/1999 EPK Verified that the interrupt status field bits for Tx were
359 incorrectly defined and corrected (as per Michel Mueller).
360
361 02/23/1999 EPK Corrected the Tx full check to check that at least 4 slots
362 were available before reseting the tbusy and tx_full flags
363 (as per Michel Mueller).
364
365 03/11/1999 EPK Added Pete Wyckoff's hardware checksumming support.
366
367 12/31/1999 KDU Cleaned up assorted things and added Don's code to force
368 32 bit.
369
370 02/20/2000 KDU Some of the control was just plain odd. Cleaned up the
371 hamachi_start_xmit() and hamachi_interrupt() code. There is still some
372 re-structuring I would like to do.
373
374 03/01/2000 KDU Experimenting with a WIDE range of interrupt mitigation
375 parameters on a dual P3-450 setup yielded the new default interrupt
376 mitigation parameters. Tx should interrupt VERY infrequently due to
377 Eric's scheme. Rx should be more often...
378
379 03/13/2000 KDU Added a patch to make the Rx Checksum code interact
380 nicely with non-linux machines.
381
382 03/13/2000 KDU Experimented with some of the configuration values:
383
384 -It seems that enabling PCI performance commands for descriptors
385 (changing RxDMACtrl and TxDMACtrl lower nibble from 5 to D) has minimal
386 performance impact for any of my tests. (ttcp, netpipe, netperf) I will
387 leave them that way until I hear further feedback.
388
389 -Increasing the PCI_LATENCY_TIMER to 130
390 (2 + (burst size of 128 * (0 wait states + 1))) seems to slightly
391 degrade performance. Leaving default at 64 pending further information.
392
393 03/14/2000 KDU Further tuning:
394
395 -adjusted boguscnt in hamachi_rx() to depend on interrupt
396 mitigation parameters chosen.
397
398 -Selected a set of interrupt parameters based on some extensive testing.
399 These may change with more testing.
400
401 TO DO:
402
403 -Consider borrowing from the acenic driver code to check PCI_COMMAND for
404 PCI_COMMAND_INVALIDATE. Set maximum burst size to cache line size in
405 that case.
406
407 -fix the reset procedure. It doesn't quite work.
408 */
409
410 /* A few values that may be tweaked. */
411 /* Size of each temporary Rx buffer, calculated as:
412 * 1518 bytes (ethernet packet) + 2 bytes (to get 8 byte alignment for
413 * the card) + 8 bytes of status info + 8 bytes for the Rx Checksum +
414 * 2 more because we use skb_reserve.
415 */
416 #define PKT_BUF_SZ 1538
417
418 /* For now, this is going to be set to the maximum size of an ethernet
419 * packet. Eventually, we may want to make it a variable that is
420 * related to the MTU
421 */
422 #define MAX_FRAME_SIZE 1518
423
424 /* The rest of these values should never change. */
425
426 static void hamachi_timer(unsigned long data);
427
428 enum capability_flags {CanHaveMII=1, };
429 static struct chip_info {
430 u16 vendor_id, device_id, device_id_mask, pad;
431 const char *name;
432 void (*media_timer)(unsigned long data);
433 int flags;
434 } chip_tbl[] = {
435 {0x1318, 0x0911, 0xffff, 0, "Hamachi GNIC-II", hamachi_timer, 0},
436 {0,},
437 };
438
439 /* Offsets to the Hamachi registers. Various sizes. */
440 enum hamachi_offsets {
441 TxDMACtrl=0x00, TxCmd=0x04, TxStatus=0x06, TxPtr=0x08, TxCurPtr=0x10,
442 RxDMACtrl=0x20, RxCmd=0x24, RxStatus=0x26, RxPtr=0x28, RxCurPtr=0x30,
443 PCIClkMeas=0x060, MiscStatus=0x066, ChipRev=0x68, ChipReset=0x06B,
444 LEDCtrl=0x06C, VirtualJumpers=0x06D, GPIO=0x6E,
445 TxChecksum=0x074, RxChecksum=0x076,
446 TxIntrCtrl=0x078, RxIntrCtrl=0x07C,
447 InterruptEnable=0x080, InterruptClear=0x084, IntrStatus=0x088,
448 EventStatus=0x08C,
449 MACCnfg=0x0A0, FrameGap0=0x0A2, FrameGap1=0x0A4,
450 /* See enum MII_offsets below. */
451 MACCnfg2=0x0B0, RxDepth=0x0B8, FlowCtrl=0x0BC, MaxFrameSize=0x0CE,
452 AddrMode=0x0D0, StationAddr=0x0D2,
453 /* Gigabit AutoNegotiation. */
454 ANCtrl=0x0E0, ANStatus=0x0E2, ANXchngCtrl=0x0E4, ANAdvertise=0x0E8,
455 ANLinkPartnerAbility=0x0EA,
456 EECmdStatus=0x0F0, EEData=0x0F1, EEAddr=0x0F2,
457 FIFOcfg=0x0F8,
458 };
459
460 /* Offsets to the MII-mode registers. */
461 enum MII_offsets {
462 MII_Cmd=0xA6, MII_Addr=0xA8, MII_Wr_Data=0xAA, MII_Rd_Data=0xAC,
463 MII_Status=0xAE,
464 };
465
466 /* Bits in the interrupt status/mask registers. */
467 enum intr_status_bits {
468 IntrRxDone=0x01, IntrRxPCIFault=0x02, IntrRxPCIErr=0x04,
469 IntrTxDone=0x100, IntrTxPCIFault=0x200, IntrTxPCIErr=0x400,
470 LinkChange=0x10000, NegotiationChange=0x20000, StatsMax=0x40000, };
471
472 /* The Hamachi Rx and Tx buffer descriptors. */
473 struct hamachi_desc {
474 u32 status_n_length;
475 #if ADDRLEN == 64
476 u32 pad;
477 u64 addr;
478 #else
479 u32 addr;
480 #endif
481 };
482
483 /* Bits in hamachi_desc.status_n_length */
484 enum desc_status_bits {
485 DescOwn=0x80000000, DescEndPacket=0x40000000, DescEndRing=0x20000000,
486 DescIntr=0x10000000,
487 };
488
489 #define PRIV_ALIGN 15 /* Required alignment mask */
490 #define MII_CNT 4
491 struct hamachi_private {
492 /* Descriptor rings first for alignment. Tx requires a second descriptor
493 for status. */
494 struct hamachi_desc *rx_ring;
495 struct hamachi_desc *tx_ring;
496 struct sk_buff* rx_skbuff[RX_RING_SIZE];
497 struct sk_buff* tx_skbuff[TX_RING_SIZE];
498 dma_addr_t tx_ring_dma;
499 dma_addr_t rx_ring_dma;
500 struct net_device_stats stats;
501 struct timer_list timer; /* Media selection timer. */
502 /* Frequently used and paired value: keep adjacent for cache effect. */
503 spinlock_t lock;
504 int chip_id;
505 unsigned int cur_rx, dirty_rx; /* Producer/consumer ring indices */
506 unsigned int cur_tx, dirty_tx;
507 unsigned int rx_buf_sz; /* Based on MTU+slack. */
508 unsigned int tx_full:1; /* The Tx queue is full. */
509 unsigned int full_duplex:1; /* Full-duplex operation requested. */
510 unsigned int duplex_lock:1;
511 unsigned int medialock:1; /* Do not sense media. */
512 unsigned int default_port:4; /* Last dev->if_port value. */
513 /* MII transceiver section. */
514 int mii_cnt; /* MII device addresses. */
515 u16 advertising; /* NWay media advertisement */
516 unsigned char phys[MII_CNT]; /* MII device addresses, only first one used. */
517 u_int32_t rx_int_var, tx_int_var; /* interrupt control variables */
518 u_int32_t option; /* Hold on to a copy of the options */
519 struct pci_dev *pci_dev;
520 };
521
522 MODULE_AUTHOR("Donald Becker <becker@scyld.com>, Eric Kasten <kasten@nscl.msu.edu>, Keith Underwood <keithu@parl.clemson.edu>");
523 MODULE_DESCRIPTION("Packet Engines 'Hamachi' GNIC-II Gigabit Ethernet driver");
524 MODULE_PARM(max_interrupt_work, "i");
525 MODULE_PARM(mtu, "i");
526 MODULE_PARM(debug, "i");
527 MODULE_PARM(min_rx_pkt, "i");
528 MODULE_PARM(max_rx_gap, "i");
529 MODULE_PARM(max_rx_latency, "i");
530 MODULE_PARM(min_tx_pkt, "i");
531 MODULE_PARM(max_tx_gap, "i");
532 MODULE_PARM(max_tx_latency, "i");
533 MODULE_PARM(rx_copybreak, "i");
534 MODULE_PARM(rx_params, "1-" __MODULE_STRING(MAX_UNITS) "i");
535 MODULE_PARM(tx_params, "1-" __MODULE_STRING(MAX_UNITS) "i");
536 MODULE_PARM(options, "1-" __MODULE_STRING(MAX_UNITS) "i");
537 MODULE_PARM(full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
538 MODULE_PARM(force32, "i");
539 MODULE_PARM_DESC(max_interrupt_work, "GNIC-II maximum events handled per interrupt");
540 MODULE_PARM_DESC(mtu, "GNIC-II MTU (all boards)");
541 MODULE_PARM_DESC(debug, "GNIC-II debug level (0-7)");
542 MODULE_PARM_DESC(min_rx_pkt, "GNIC-II minimum Rx packets processed between interrupts");
543 MODULE_PARM_DESC(max_rx_gap, "GNIC-II maximum Rx inter-packet gap in 8.192 microsecond units");
544 MODULE_PARM_DESC(max_rx_latency, "GNIC-II time between Rx interrupts in 8.192 microsecond units");
545 MODULE_PARM_DESC(min_tx_pkt, "GNIC-II minimum Tx packets processed between interrupts");
546 MODULE_PARM_DESC(max_tx_gap, "GNIC-II maximum Tx inter-packet gap in 8.192 microsecond units");
547 MODULE_PARM_DESC(max_tx_latency, "GNIC-II time between Tx interrupts in 8.192 microsecond units");
548 MODULE_PARM_DESC(rx_copybreak, "GNIC-II copy breakpoint for copy-only-tiny-frames");
549 MODULE_PARM_DESC(rx_params, "GNIC-II min_rx_pkt+max_rx_gap+max_rx_latency");
550 MODULE_PARM_DESC(tx_params, "GNIC-II min_tx_pkt+max_tx_gap+max_tx_latency");
551 MODULE_PARM_DESC(options, "GNIC-II Bits 0-3: media type, bits 4-6: as force32, bit 7: half duplex, bit 9 full duplex");
552 MODULE_PARM_DESC(full_duplex, "GNIC-II full duplex setting(s) (1)");
553 MODULE_PARM_DESC(force32, "GNIC-II: Bit 0: 32 bit PCI, bit 1: disable parity, bit 2: 64 bit PCI (all boards)");
554
555 static int read_eeprom(long ioaddr, int location);
556 static int mdio_read(long ioaddr, int phy_id, int location);
557 static void mdio_write(long ioaddr, int phy_id, int location, int value);
558 static int hamachi_open(struct net_device *dev);
559 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
560 static void hamachi_timer(unsigned long data);
561 static void hamachi_tx_timeout(struct net_device *dev);
562 static void hamachi_init_ring(struct net_device *dev);
563 static int hamachi_start_xmit(struct sk_buff *skb, struct net_device *dev);
564 static void hamachi_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
565 static inline int hamachi_rx(struct net_device *dev);
566 static inline int hamachi_tx(struct net_device *dev);
567 static void hamachi_error(struct net_device *dev, int intr_status);
568 static int hamachi_close(struct net_device *dev);
569 static struct net_device_stats *hamachi_get_stats(struct net_device *dev);
570 static void set_rx_mode(struct net_device *dev);
571
572
573 static int __init hamachi_init_one (struct pci_dev *pdev,
574 const struct pci_device_id *ent)
575 {
576 struct hamachi_private *hmp;
577 int option, i, rx_int_var, tx_int_var, boguscnt;
578 int chip_id = ent->driver_data;
579 int irq;
580 long ioaddr;
581 static int card_idx;
582 struct net_device *dev;
583 void *ring_space;
584 dma_addr_t ring_dma;
585 int ret = -ENOMEM;
586
587 /* when built into the kernel, we only print version if device is found */
588 #ifndef MODULE
589 static int printed_version;
590 if (!printed_version++)
591 printk(version);
592 #endif
593
594 if (pci_enable_device(pdev)) {
595 ret = -EIO;
596 goto err_out;
597 }
598
599 ioaddr = pci_resource_start(pdev, 0);
600 #ifdef __alpha__ /* Really "64 bit addrs" */
601 ioaddr |= (pci_resource_start(pdev, 1) << 32);
602 #endif
603
604 pci_set_master(pdev);
605
606 i = pci_request_regions(pdev, DRV_NAME);
607 if (i) return i;
608
609 irq = pdev->irq;
610 ioaddr = (long) ioremap(ioaddr, 0x400);
611 if (!ioaddr)
612 goto err_out_release;
613
614 dev = alloc_etherdev(sizeof(struct hamachi_private));
615 if (!dev)
616 goto err_out_iounmap;
617
618 SET_MODULE_OWNER(dev);
619
620 #ifdef TX_CHECKSUM
621 printk("check that skbcopy in ip_queue_xmit isn't happening\n");
622 dev->hard_header_len += 8; /* for cksum tag */
623 #endif
624
625 for (i = 0; i < 6; i++)
626 dev->dev_addr[i] = 1 ? read_eeprom(ioaddr, 4 + i)
627 : readb(ioaddr + StationAddr + i);
628
629 #if ! defined(final_version)
630 if (hamachi_debug > 4)
631 for (i = 0; i < 0x10; i++)
632 printk("%2.2x%s",
633 read_eeprom(ioaddr, i), i % 16 != 15 ? " " : "\n");
634 #endif
635
636 hmp = dev->priv;
637 spin_lock_init(&hmp->lock);
638
639 ring_space = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma);
640 if (!ring_space)
641 goto err_out_cleardev;
642 hmp->tx_ring = (struct hamachi_desc *)ring_space;
643 hmp->tx_ring_dma = ring_dma;
644
645 ring_space = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma);
646 if (!ring_space)
647 goto err_out_unmap_tx;
648 hmp->rx_ring = (struct hamachi_desc *)ring_space;
649 hmp->rx_ring_dma = ring_dma;
650
651 /* Check for options being passed in */
652 option = card_idx < MAX_UNITS ? options[card_idx] : 0;
653 if (dev->mem_start)
654 option = dev->mem_start;
655
656 /* If the bus size is misidentified, do the following. */
657 force32 = force32 ? force32 :
658 ((option >= 0) ? ((option & 0x00000070) >> 4) : 0 );
659 if (force32)
660 writeb(force32, ioaddr + VirtualJumpers);
661
662 /* Hmmm, do we really need to reset the chip???. */
663 writeb(0x01, ioaddr + ChipReset);
664
665 /* After a reset, the clock speed measurement of the PCI bus will not
666 * be valid for a moment. Wait for a little while until it is. If
667 * it takes more than 10ms, forget it.
668 */
669 udelay(10);
670 i = readb(ioaddr + PCIClkMeas);
671 for (boguscnt = 0; (!(i & 0x080)) && boguscnt < 1000; boguscnt++){
672 udelay(10);
673 i = readb(ioaddr + PCIClkMeas);
674 }
675
676 dev->base_addr = ioaddr;
677 dev->irq = irq;
678 pci_set_drvdata(pdev, dev);
679
680 hmp->chip_id = chip_id;
681 hmp->pci_dev = pdev;
682
683 /* The lower four bits are the media type. */
684 if (option > 0) {
685 hmp->option = option;
686 if (option & 0x200)
687 hmp->full_duplex = 1;
688 else if (option & 0x080)
689 hmp->full_duplex = 0;
690 hmp->default_port = option & 15;
691 if (hmp->default_port)
692 hmp->medialock = 1;
693 }
694 if (card_idx < MAX_UNITS && full_duplex[card_idx] > 0)
695 hmp->full_duplex = 1;
696
697 /* lock the duplex mode if someone specified a value */
698 if (hmp->full_duplex || (option & 0x080))
699 hmp->duplex_lock = 1;
700
701 /* Set interrupt tuning parameters */
702 max_rx_latency = max_rx_latency & 0x00ff;
703 max_rx_gap = max_rx_gap & 0x00ff;
704 min_rx_pkt = min_rx_pkt & 0x00ff;
705 max_tx_latency = max_tx_latency & 0x00ff;
706 max_tx_gap = max_tx_gap & 0x00ff;
707 min_tx_pkt = min_tx_pkt & 0x00ff;
708
709 rx_int_var = card_idx < MAX_UNITS ? rx_params[card_idx] : -1;
710 tx_int_var = card_idx < MAX_UNITS ? tx_params[card_idx] : -1;
711 hmp->rx_int_var = rx_int_var >= 0 ? rx_int_var :
712 (min_rx_pkt << 16 | max_rx_gap << 8 | max_rx_latency);
713 hmp->tx_int_var = tx_int_var >= 0 ? tx_int_var :
714 (min_tx_pkt << 16 | max_tx_gap << 8 | max_tx_latency);
715
716
717 /* The Hamachi-specific entries in the device structure. */
718 dev->open = &hamachi_open;
719 dev->hard_start_xmit = &hamachi_start_xmit;
720 dev->stop = &hamachi_close;
721 dev->get_stats = &hamachi_get_stats;
722 dev->set_multicast_list = &set_rx_mode;
723 dev->do_ioctl = &netdev_ioctl;
724 dev->tx_timeout = &hamachi_tx_timeout;
725 dev->watchdog_timeo = TX_TIMEOUT;
726 if (mtu)
727 dev->mtu = mtu;
728
729 i = register_netdev(dev);
730 if (i) {
731 ret = i;
732 goto err_out_unmap_rx;
733 }
734
735 printk(KERN_INFO "%s: %s type %x at 0x%lx, ",
736 dev->name, chip_tbl[chip_id].name, readl(ioaddr + ChipRev),
737 ioaddr);
738 for (i = 0; i < 5; i++)
739 printk("%2.2x:", dev->dev_addr[i]);
740 printk("%2.2x, IRQ %d.\n", dev->dev_addr[i], irq);
741 i = readb(ioaddr + PCIClkMeas);
742 printk(KERN_INFO "%s: %d-bit %d Mhz PCI bus (%d), Virtual Jumpers "
743 "%2.2x, LPA %4.4x.\n",
744 dev->name, readw(ioaddr + MiscStatus) & 1 ? 64 : 32,
745 i ? 2000/(i&0x7f) : 0, i&0x7f, (int)readb(ioaddr + VirtualJumpers),
746 readw(ioaddr + ANLinkPartnerAbility));
747
748 if (chip_tbl[hmp->chip_id].flags & CanHaveMII) {
749 int phy, phy_idx = 0;
750 for (phy = 0; phy < 32 && phy_idx < MII_CNT; phy++) {
751 int mii_status = mdio_read(ioaddr, phy, 1);
752 if (mii_status != 0xffff &&
753 mii_status != 0x0000) {
754 hmp->phys[phy_idx++] = phy;
755 hmp->advertising = mdio_read(ioaddr, phy, 4);
756 printk(KERN_INFO "%s: MII PHY found at address %d, status "
757 "0x%4.4x advertising %4.4x.\n",
758 dev->name, phy, mii_status, hmp->advertising);
759 }
760 }
761 hmp->mii_cnt = phy_idx;
762 }
763 /* Configure gigabit autonegotiation. */
764 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */
765 writew(0x08e0, ioaddr + ANAdvertise); /* Set our advertise word. */
766 writew(0x1000, ioaddr + ANCtrl); /* Enable negotiation */
767
768 card_idx++;
769 return 0;
770
771 err_out_unmap_rx:
772 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring,
773 hmp->rx_ring_dma);
774 err_out_unmap_tx:
775 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring,
776 hmp->tx_ring_dma);
777 err_out_cleardev:
778 kfree (dev);
779 err_out_iounmap:
780 iounmap((char *)ioaddr);
781 err_out_release:
782 pci_release_regions(pdev);
783 err_out:
784 return ret;
785 }
786
787 static int __init read_eeprom(long ioaddr, int location)
788 {
789 int bogus_cnt = 1000;
790
791 /* We should check busy first - per docs -KDU */
792 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0);
793 writew(location, ioaddr + EEAddr);
794 writeb(0x02, ioaddr + EECmdStatus);
795 bogus_cnt = 1000;
796 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0);
797 if (hamachi_debug > 5)
798 printk(" EEPROM status is %2.2x after %d ticks.\n",
799 (int)readb(ioaddr + EECmdStatus), 1000- bogus_cnt);
800 return readb(ioaddr + EEData);
801 }
802
803 /* MII Managemen Data I/O accesses.
804 These routines assume the MDIO controller is idle, and do not exit until
805 the command is finished. */
806
807 static int mdio_read(long ioaddr, int phy_id, int location)
808 {
809 int i;
810
811 /* We should check busy first - per docs -KDU */
812 for (i = 10000; i >= 0; i--)
813 if ((readw(ioaddr + MII_Status) & 1) == 0)
814 break;
815 writew((phy_id<<8) + location, ioaddr + MII_Addr);
816 writew(0x0001, ioaddr + MII_Cmd);
817 for (i = 10000; i >= 0; i--)
818 if ((readw(ioaddr + MII_Status) & 1) == 0)
819 break;
820 return readw(ioaddr + MII_Rd_Data);
821 }
822
823 static void mdio_write(long ioaddr, int phy_id, int location, int value)
824 {
825 int i;
826
827 /* We should check busy first - per docs -KDU */
828 for (i = 10000; i >= 0; i--)
829 if ((readw(ioaddr + MII_Status) & 1) == 0)
830 break;
831 writew((phy_id<<8) + location, ioaddr + MII_Addr);
832 writew(value, ioaddr + MII_Wr_Data);
833
834 /* Wait for the command to finish. */
835 for (i = 10000; i >= 0; i--)
836 if ((readw(ioaddr + MII_Status) & 1) == 0)
837 break;
838 return;
839 }
840
841
842 static int hamachi_open(struct net_device *dev)
843 {
844 struct hamachi_private *hmp = dev->priv;
845 long ioaddr = dev->base_addr;
846 int i;
847 u_int32_t rx_int_var, tx_int_var;
848 u_int16_t fifo_info;
849
850 i = request_irq(dev->irq, &hamachi_interrupt, SA_SHIRQ, dev->name, dev);
851 if (i)
852 return i;
853
854 if (hamachi_debug > 1)
855 printk(KERN_DEBUG "%s: hamachi_open() irq %d.\n",
856 dev->name, dev->irq);
857
858 hamachi_init_ring(dev);
859
860 #if ADDRLEN == 64
861 /* writellll anyone ? */
862 writel(cpu_to_le64(hmp->rx_ring_dma), ioaddr + RxPtr);
863 writel(cpu_to_le64(hmp->rx_ring_dma) >> 32, ioaddr + RxPtr + 4);
864 writel(cpu_to_le64(hmp->tx_ring_dma), ioaddr + TxPtr);
865 writel(cpu_to_le64(hmp->tx_ring_dma) >> 32, ioaddr + TxPtr + 4);
866 #else
867 writel(cpu_to_le32(hmp->rx_ring_dma), ioaddr + RxPtr);
868 writel(cpu_to_le32(hmp->tx_ring_dma), ioaddr + TxPtr);
869 #endif
870
871 /* TODO: It would make sense to organize this as words since the card
872 * documentation does. -KDU
873 */
874 for (i = 0; i < 6; i++)
875 writeb(dev->dev_addr[i], ioaddr + StationAddr + i);
876
877 /* Initialize other registers: with so many this eventually this will
878 converted to an offset/value list. */
879
880 /* Configure the FIFO */
881 fifo_info = (readw(ioaddr + GPIO) & 0x00C0) >> 6;
882 switch (fifo_info){
883 case 0 :
884 /* No FIFO */
885 writew(0x0000, ioaddr + FIFOcfg);
886 break;
887 case 1 :
888 /* Configure the FIFO for 512K external, 16K used for Tx. */
889 writew(0x0028, ioaddr + FIFOcfg);
890 break;
891 case 2 :
892 /* Configure the FIFO for 1024 external, 32K used for Tx. */
893 writew(0x004C, ioaddr + FIFOcfg);
894 break;
895 case 3 :
896 /* Configure the FIFO for 2048 external, 32K used for Tx. */
897 writew(0x006C, ioaddr + FIFOcfg);
898 break;
899 default :
900 printk(KERN_WARNING "%s: Unsupported external memory config!\n",
901 dev->name);
902 /* Default to no FIFO */
903 writew(0x0000, ioaddr + FIFOcfg);
904 break;
905 }
906
907 if (dev->if_port == 0)
908 dev->if_port = hmp->default_port;
909
910
911 /* Setting the Rx mode will start the Rx process. */
912 /* If someone didn't choose a duplex, default to full-duplex */
913 if (hmp->duplex_lock != 1)
914 hmp->full_duplex = 1;
915
916 /* always 1, takes no more time to do it */
917 writew(0x0001, ioaddr + RxChecksum);
918 #ifdef TX_CHECKSUM
919 writew(0x0001, ioaddr + TxChecksum);
920 #else
921 writew(0x0000, ioaddr + TxChecksum);
922 #endif
923 writew(0x8000, ioaddr + MACCnfg); /* Soft reset the MAC */
924 writew(0x215F, ioaddr + MACCnfg);
925 writew(0x000C, ioaddr + FrameGap0);
926 /* WHAT?!?!? Why isn't this documented somewhere? -KDU */
927 writew(0x1018, ioaddr + FrameGap1);
928 /* Why do we enable receives/transmits here? -KDU */
929 writew(0x0780, ioaddr + MACCnfg2); /* Upper 16 bits control LEDs. */
930 /* Enable automatic generation of flow control frames, period 0xffff. */
931 writel(0x0030FFFF, ioaddr + FlowCtrl);
932 writew(MAX_FRAME_SIZE, ioaddr + MaxFrameSize); /* dev->mtu+14 ??? */
933
934 /* Enable legacy links. */
935 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */
936 /* Initial Link LED to blinking red. */
937 writeb(0x03, ioaddr + LEDCtrl);
938
939 /* Configure interrupt mitigation. This has a great effect on
940 performance, so systems tuning should start here!. */
941
942 rx_int_var = hmp->rx_int_var;
943 tx_int_var = hmp->tx_int_var;
944
945 if (hamachi_debug > 1) {
946 printk("max_tx_latency: %d, max_tx_gap: %d, min_tx_pkt: %d\n",
947 tx_int_var & 0x00ff, (tx_int_var & 0x00ff00) >> 8,
948 (tx_int_var & 0x00ff0000) >> 16);
949 printk("max_rx_latency: %d, max_rx_gap: %d, min_rx_pkt: %d\n",
950 rx_int_var & 0x00ff, (rx_int_var & 0x00ff00) >> 8,
951 (rx_int_var & 0x00ff0000) >> 16);
952 printk("rx_int_var: %x, tx_int_var: %x\n", rx_int_var, tx_int_var);
953 }
954
955 writel(tx_int_var, ioaddr + TxIntrCtrl);
956 writel(rx_int_var, ioaddr + RxIntrCtrl);
957
958 set_rx_mode(dev);
959
960 netif_start_queue(dev);
961
962 /* Enable interrupts by setting the interrupt mask. */
963 writel(0x80878787, ioaddr + InterruptEnable);
964 writew(0x0000, ioaddr + EventStatus); /* Clear non-interrupting events */
965
966 /* Configure and start the DMA channels. */
967 /* Burst sizes are in the low three bits: size = 4<<(val&7) */
968 #if ADDRLEN == 64
969 writew(0x005D, ioaddr + RxDMACtrl); /* 128 dword bursts */
970 writew(0x005D, ioaddr + TxDMACtrl);
971 #else
972 writew(0x001D, ioaddr + RxDMACtrl);
973 writew(0x001D, ioaddr + TxDMACtrl);
974 #endif
975 writew(0x0001, dev->base_addr + RxCmd);
976
977 if (hamachi_debug > 2) {
978 printk(KERN_DEBUG "%s: Done hamachi_open(), status: Rx %x Tx %x.\n",
979 dev->name, readw(ioaddr + RxStatus), readw(ioaddr + TxStatus));
980 }
981 /* Set the timer to check for link beat. */
982 init_timer(&hmp->timer);
983 hmp->timer.expires = RUN_AT((24*HZ)/10); /* 2.4 sec. */
984 hmp->timer.data = (unsigned long)dev;
985 hmp->timer.function = &hamachi_timer; /* timer handler */
986 add_timer(&hmp->timer);
987
988 return 0;
989 }
990
991 static inline int hamachi_tx(struct net_device *dev)
992 {
993 struct hamachi_private *hmp = dev->priv;
994
995 /* Update the dirty pointer until we find an entry that is
996 still owned by the card */
997 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++) {
998 int entry = hmp->dirty_tx % TX_RING_SIZE;
999 struct sk_buff *skb;
1000
1001 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1002 break;
1003 /* Free the original skb. */
1004 skb = hmp->tx_skbuff[entry];
1005 if (skb != 0) {
1006 pci_unmap_single(hmp->pci_dev,
1007 hmp->tx_ring[entry].addr, skb->len,
1008 PCI_DMA_TODEVICE);
1009 dev_kfree_skb(skb);
1010 hmp->tx_skbuff[entry] = 0;
1011 }
1012 hmp->tx_ring[entry].status_n_length = 0;
1013 if (entry >= TX_RING_SIZE-1)
1014 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1015 cpu_to_le32(DescEndRing);
1016 hmp->stats.tx_packets++;
1017 }
1018
1019 return 0;
1020 }
1021
1022 static void hamachi_timer(unsigned long data)
1023 {
1024 struct net_device *dev = (struct net_device *)data;
1025 struct hamachi_private *hmp = dev->priv;
1026 long ioaddr = dev->base_addr;
1027 int next_tick = 10*HZ;
1028
1029 if (hamachi_debug > 2) {
1030 printk(KERN_INFO "%s: Hamachi Autonegotiation status %4.4x, LPA "
1031 "%4.4x.\n", dev->name, readw(ioaddr + ANStatus),
1032 readw(ioaddr + ANLinkPartnerAbility));
1033 printk(KERN_INFO "%s: Autonegotiation regs %4.4x %4.4x %4.4x "
1034 "%4.4x %4.4x %4.4x.\n", dev->name,
1035 readw(ioaddr + 0x0e0),
1036 readw(ioaddr + 0x0e2),
1037 readw(ioaddr + 0x0e4),
1038 readw(ioaddr + 0x0e6),
1039 readw(ioaddr + 0x0e8),
1040 readw(ioaddr + 0x0eA));
1041 }
1042 /* We could do something here... nah. */
1043 hmp->timer.expires = RUN_AT(next_tick);
1044 add_timer(&hmp->timer);
1045 }
1046
1047 static void hamachi_tx_timeout(struct net_device *dev)
1048 {
1049 int i;
1050 struct hamachi_private *hmp = dev->priv;
1051 long ioaddr = dev->base_addr;
1052
1053 printk(KERN_WARNING "%s: Hamachi transmit timed out, status %8.8x,"
1054 " resetting...\n", dev->name, (int)readw(ioaddr + TxStatus));
1055
1056 {
1057 int i;
1058 printk(KERN_DEBUG " Rx ring %p: ", hmp->rx_ring);
1059 for (i = 0; i < RX_RING_SIZE; i++)
1060 printk(" %8.8x", (unsigned int)hmp->rx_ring[i].status_n_length);
1061 printk("\n"KERN_DEBUG" Tx ring %p: ", hmp->tx_ring);
1062 for (i = 0; i < TX_RING_SIZE; i++)
1063 printk(" %4.4x", hmp->tx_ring[i].status_n_length);
1064 printk("\n");
1065 }
1066
1067 /* Reinit the hardware and make sure the Rx and Tx processes
1068 are up and running.
1069 */
1070 dev->if_port = 0;
1071 /* The right way to do Reset. -KDU
1072 * -Clear OWN bit in all Rx/Tx descriptors
1073 * -Wait 50 uS for channels to go idle
1074 * -Turn off MAC receiver
1075 * -Issue Reset
1076 */
1077
1078 for (i = 0; i < RX_RING_SIZE; i++)
1079 hmp->rx_ring[i].status_n_length &= cpu_to_le32(~DescOwn);
1080
1081 /* Presume that all packets in the Tx queue are gone if we have to
1082 * re-init the hardware.
1083 */
1084 for (i = 0; i < TX_RING_SIZE; i++){
1085 struct sk_buff *skb;
1086
1087 if (i >= TX_RING_SIZE - 1)
1088 hmp->tx_ring[i].status_n_length = cpu_to_le32(
1089 DescEndRing |
1090 (hmp->tx_ring[i].status_n_length & 0x0000FFFF));
1091 else
1092 hmp->tx_ring[i].status_n_length &= 0x0000ffff;
1093 skb = hmp->tx_skbuff[i];
1094 if (skb){
1095 pci_unmap_single(hmp->pci_dev, hmp->tx_ring[i].addr,
1096 skb->len, PCI_DMA_TODEVICE);
1097 dev_kfree_skb(skb);
1098 hmp->tx_skbuff[i] = 0;
1099 }
1100 }
1101
1102 udelay(60); /* Sleep 60 us just for safety sake */
1103 writew(0x0002, dev->base_addr + RxCmd); /* STOP Rx */
1104
1105 writeb(0x01, ioaddr + ChipReset); /* Reinit the hardware */
1106
1107 hmp->tx_full = 0;
1108 hmp->cur_rx = hmp->cur_tx = 0;
1109 hmp->dirty_rx = hmp->dirty_tx = 0;
1110 /* Rx packets are also presumed lost; however, we need to make sure a
1111 * ring of buffers is in tact. -KDU
1112 */
1113 for (i = 0; i < RX_RING_SIZE; i++){
1114 struct sk_buff *skb = hmp->rx_skbuff[i];
1115
1116 if (skb){
1117 pci_unmap_single(hmp->pci_dev, hmp->rx_ring[i].addr,
1118 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1119 dev_kfree_skb(skb);
1120 hmp->rx_skbuff[i] = 0;
1121 }
1122 }
1123 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
1124 for (i = 0; i < RX_RING_SIZE; i++) {
1125 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1126 hmp->rx_skbuff[i] = skb;
1127 if (skb == NULL)
1128 break;
1129 skb->dev = dev; /* Mark as being used by this device. */
1130 skb_reserve(skb, 2); /* 16 byte align the IP header. */
1131 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1132 skb->tail, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1133 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1134 DescEndPacket | DescIntr | (hmp->rx_buf_sz - 2));
1135 }
1136 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1137 /* Mark the last entry as wrapping the ring. */
1138 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1139
1140 /* Trigger an immediate transmit demand. */
1141 dev->trans_start = jiffies;
1142 hmp->stats.tx_errors++;
1143
1144 /* Restart the chip's Tx/Rx processes . */
1145 writew(0x0002, dev->base_addr + TxCmd); /* STOP Tx */
1146 writew(0x0001, dev->base_addr + TxCmd); /* START Tx */
1147 writew(0x0001, dev->base_addr + RxCmd); /* START Rx */
1148
1149 netif_wake_queue(dev);
1150 }
1151
1152
1153 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
1154 static void hamachi_init_ring(struct net_device *dev)
1155 {
1156 struct hamachi_private *hmp = dev->priv;
1157 int i;
1158
1159 hmp->tx_full = 0;
1160 hmp->cur_rx = hmp->cur_tx = 0;
1161 hmp->dirty_rx = hmp->dirty_tx = 0;
1162
1163 #if 0
1164 /* This is wrong. I'm not sure what the original plan was, but this
1165 * is wrong. An MTU of 1 gets you a buffer of 1536, while an MTU
1166 * of 1501 gets a buffer of 1533? -KDU
1167 */
1168 hmp->rx_buf_sz = (dev->mtu <= 1500 ? PKT_BUF_SZ : dev->mtu + 32);
1169 #endif
1170 /* My attempt at a reasonable correction */
1171 /* +26 gets the maximum ethernet encapsulation, +7 & ~7 because the
1172 * card needs room to do 8 byte alignment, +2 so we can reserve
1173 * the first 2 bytes, and +16 gets room for the status word from the
1174 * card. -KDU
1175 */
1176 hmp->rx_buf_sz = (dev->mtu <= 1492 ? PKT_BUF_SZ :
1177 (((dev->mtu+26+7) & ~7) + 2 + 16));
1178
1179 /* Initialize all Rx descriptors. */
1180 for (i = 0; i < RX_RING_SIZE; i++) {
1181 hmp->rx_ring[i].status_n_length = 0;
1182 hmp->rx_skbuff[i] = 0;
1183 }
1184 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
1185 for (i = 0; i < RX_RING_SIZE; i++) {
1186 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1187 hmp->rx_skbuff[i] = skb;
1188 if (skb == NULL)
1189 break;
1190 skb->dev = dev; /* Mark as being used by this device. */
1191 skb_reserve(skb, 2); /* 16 byte align the IP header. */
1192 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1193 skb->tail, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1194 /* -2 because it doesn't REALLY have that first 2 bytes -KDU */
1195 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1196 DescEndPacket | DescIntr | (hmp->rx_buf_sz -2));
1197 }
1198 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1199 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1200
1201 for (i = 0; i < TX_RING_SIZE; i++) {
1202 hmp->tx_skbuff[i] = 0;
1203 hmp->tx_ring[i].status_n_length = 0;
1204 }
1205 /* Mark the last entry of the ring */
1206 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1207
1208 return;
1209 }
1210
1211
1212 #ifdef TX_CHECKSUM
1213 #define csum_add(it, val) \
1214 do { \
1215 it += (u16) (val); \
1216 if (it & 0xffff0000) { \
1217 it &= 0xffff; \
1218 ++it; \
1219 } \
1220 } while (0)
1221 /* printk("add %04x --> %04x\n", val, it); \ */
1222
1223 /* uh->len already network format, do not swap */
1224 #define pseudo_csum_udp(sum,ih,uh) do { \
1225 sum = 0; \
1226 csum_add(sum, (ih)->saddr >> 16); \
1227 csum_add(sum, (ih)->saddr & 0xffff); \
1228 csum_add(sum, (ih)->daddr >> 16); \
1229 csum_add(sum, (ih)->daddr & 0xffff); \
1230 csum_add(sum, __constant_htons(IPPROTO_UDP)); \
1231 csum_add(sum, (uh)->len); \
1232 } while (0)
1233
1234 /* swap len */
1235 #define pseudo_csum_tcp(sum,ih,len) do { \
1236 sum = 0; \
1237 csum_add(sum, (ih)->saddr >> 16); \
1238 csum_add(sum, (ih)->saddr & 0xffff); \
1239 csum_add(sum, (ih)->daddr >> 16); \
1240 csum_add(sum, (ih)->daddr & 0xffff); \
1241 csum_add(sum, __constant_htons(IPPROTO_TCP)); \
1242 csum_add(sum, htons(len)); \
1243 } while (0)
1244 #endif
1245
1246 static int hamachi_start_xmit(struct sk_buff *skb, struct net_device *dev)
1247 {
1248 struct hamachi_private *hmp = dev->priv;
1249 unsigned entry;
1250 u16 status;
1251
1252 /* Ok, now make sure that the queue has space before trying to
1253 add another skbuff. if we return non-zero the scheduler
1254 should interpret this as a queue full and requeue the buffer
1255 for later.
1256 */
1257 if (hmp->tx_full) {
1258 /* We should NEVER reach this point -KDU */
1259 printk(KERN_WARNING "%s: Hamachi transmit queue full at slot %d.\n",dev->name, hmp->cur_tx);
1260
1261 /* Wake the potentially-idle transmit channel. */
1262 /* If we don't need to read status, DON'T -KDU */
1263 status=readw(dev->base_addr + TxStatus);
1264 if( !(status & 0x0001) || (status & 0x0002))
1265 writew(0x0001, dev->base_addr + TxCmd);
1266 return 1;
1267 }
1268
1269 /* Caution: the write order is important here, set the field
1270 with the "ownership" bits last. */
1271
1272 /* Calculate the next Tx descriptor entry. */
1273 entry = hmp->cur_tx % TX_RING_SIZE;
1274
1275 hmp->tx_skbuff[entry] = skb;
1276
1277 #ifdef TX_CHECKSUM
1278 {
1279 /* tack on checksum tag */
1280 u32 tagval = 0;
1281 struct ethhdr *eh = (struct ethhdr *)skb->data;
1282 if (eh->h_proto == __constant_htons(ETH_P_IP)) {
1283 struct iphdr *ih = (struct iphdr *)((char *)eh + ETH_HLEN);
1284 if (ih->protocol == IPPROTO_UDP) {
1285 struct udphdr *uh
1286 = (struct udphdr *)((char *)ih + ih->ihl*4);
1287 u32 offset = ((unsigned char *)uh + 6) - skb->data;
1288 u32 pseudo;
1289 pseudo_csum_udp(pseudo, ih, uh);
1290 pseudo = htons(pseudo);
1291 printk("udp cksum was %04x, sending pseudo %04x\n",
1292 uh->check, pseudo);
1293 uh->check = 0; /* zero out uh->check before card calc */
1294 /*
1295 * start at 14 (skip ethhdr), store at offset (uh->check),
1296 * use pseudo value given.
1297 */
1298 tagval = (14 << 24) | (offset << 16) | pseudo;
1299 } else if (ih->protocol == IPPROTO_TCP) {
1300 printk("tcp, no auto cksum\n");
1301 }
1302 }
1303 *(u32 *)skb_push(skb, 8) = tagval;
1304 }
1305 #endif
1306
1307 hmp->tx_ring[entry].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1308 skb->data, skb->len, PCI_DMA_TODEVICE));
1309
1310 /* Hmmmm, could probably put a DescIntr on these, but the way
1311 the driver is currently coded makes Tx interrupts unnecessary
1312 since the clearing of the Tx ring is handled by the start_xmit
1313 routine. This organization helps mitigate the interrupts a
1314 bit and probably renders the max_tx_latency param useless.
1315
1316 Update: Putting a DescIntr bit on all of the descriptors and
1317 mitigating interrupt frequency with the tx_min_pkt parameter. -KDU
1318 */
1319 if (entry >= TX_RING_SIZE-1) /* Wrap ring */
1320 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1321 DescEndPacket | DescEndRing | DescIntr | skb->len);
1322 else
1323 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1324 DescEndPacket | DescIntr | skb->len);
1325 hmp->cur_tx++;
1326
1327 /* Non-x86 Todo: explicitly flush cache lines here. */
1328
1329 /* Wake the potentially-idle transmit channel. */
1330 /* If we don't need to read status, DON'T -KDU */
1331 status=readw(dev->base_addr + TxStatus);
1332 if( !(status & 0x0001) || (status & 0x0002))
1333 writew(0x0001, dev->base_addr + TxCmd);
1334
1335 /* Immediately before returning, let's clear as many entries as we can. */
1336 hamachi_tx(dev);
1337
1338 /* We should kick the bottom half here, since we are not accepting
1339 * interrupts with every packet. i.e. realize that Gigabit ethernet
1340 * can transmit faster than ordinary machines can load packets;
1341 * hence, any packet that got put off because we were in the transmit
1342 * routine should IMMEDIATELY get a chance to be re-queued. -KDU
1343 */
1344 if ((hmp->cur_tx - hmp->dirty_tx) < (TX_RING_SIZE - 4))
1345 netif_wake_queue(dev); /* Typical path */
1346 else {
1347 hmp->tx_full = 1;
1348 netif_stop_queue(dev);
1349 }
1350 dev->trans_start = jiffies;
1351
1352 if (hamachi_debug > 4) {
1353 printk(KERN_DEBUG "%s: Hamachi transmit frame #%d queued in slot %d.\n",
1354 dev->name, hmp->cur_tx, entry);
1355 }
1356 return 0;
1357 }
1358
1359 /* The interrupt handler does all of the Rx thread work and cleans up
1360 after the Tx thread. */
1361 static void hamachi_interrupt(int irq, void *dev_instance, struct pt_regs *rgs)
1362 {
1363 struct net_device *dev = dev_instance;
1364 struct hamachi_private *hmp;
1365 long ioaddr, boguscnt = max_interrupt_work;
1366
1367 #ifndef final_version /* Can never occur. */
1368 if (dev == NULL) {
1369 printk (KERN_ERR "hamachi_interrupt(): irq %d for unknown device.\n", irq);
1370 return;
1371 }
1372 #endif
1373
1374 ioaddr = dev->base_addr;
1375 hmp = dev->priv;
1376 spin_lock(&hmp->lock);
1377
1378 do {
1379 u32 intr_status = readl(ioaddr + InterruptClear);
1380
1381 if (hamachi_debug > 4)
1382 printk(KERN_DEBUG "%s: Hamachi interrupt, status %4.4x.\n",
1383 dev->name, intr_status);
1384
1385 if (intr_status == 0)
1386 break;
1387
1388 if (intr_status & IntrRxDone)
1389 hamachi_rx(dev);
1390
1391 if (intr_status & IntrTxDone){
1392 /* This code should RARELY need to execute. After all, this is
1393 * a gigabit link, it should consume packets as fast as we put
1394 * them in AND we clear the Tx ring in hamachi_start_xmit().
1395 */
1396 if (hmp->tx_full){
1397 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++){
1398 int entry = hmp->dirty_tx % TX_RING_SIZE;
1399 struct sk_buff *skb;
1400
1401 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1402 break;
1403 skb = hmp->tx_skbuff[entry];
1404 /* Free the original skb. */
1405 if (skb){
1406 pci_unmap_single(hmp->pci_dev,
1407 hmp->tx_ring[entry].addr,
1408 skb->len,
1409 PCI_DMA_TODEVICE);
1410 dev_kfree_skb_irq(skb);
1411 hmp->tx_skbuff[entry] = 0;
1412 }
1413 hmp->tx_ring[entry].status_n_length = 0;
1414 if (entry >= TX_RING_SIZE-1)
1415 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1416 cpu_to_le32(DescEndRing);
1417 hmp->stats.tx_packets++;
1418 }
1419 if (hmp->cur_tx - hmp->dirty_tx < TX_RING_SIZE - 4){
1420 /* The ring is no longer full */
1421 hmp->tx_full = 0;
1422 netif_wake_queue(dev);
1423 }
1424 } else {
1425 netif_wake_queue(dev);
1426 }
1427 }
1428
1429
1430 /* Abnormal error summary/uncommon events handlers. */
1431 if (intr_status &
1432 (IntrTxPCIFault | IntrTxPCIErr | IntrRxPCIFault | IntrRxPCIErr |
1433 LinkChange | NegotiationChange | StatsMax))
1434 hamachi_error(dev, intr_status);
1435
1436 if (--boguscnt < 0) {
1437 printk(KERN_WARNING "%s: Too much work at interrupt, status=0x%4.4x.\n",
1438 dev->name, intr_status);
1439 break;
1440 }
1441 } while (1);
1442
1443 if (hamachi_debug > 3)
1444 printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
1445 dev->name, readl(ioaddr + IntrStatus));
1446
1447 #ifndef final_version
1448 /* Code that should never be run! Perhaps remove after testing.. */
1449 {
1450 static int stopit = 10;
1451 if (dev->start == 0 && --stopit < 0) {
1452 printk(KERN_ERR "%s: Emergency stop, looping startup interrupt.\n",
1453 dev->name);
1454 free_irq(irq, dev);
1455 }
1456 }
1457 #endif
1458
1459 spin_unlock(&hmp->lock);
1460 }
1461
1462 #ifdef TX_CHECKSUM
1463 /*
1464 * Copied from eth_type_trans(), with reduced header, since we don't
1465 * get it on RX, only on TX.
1466 */
1467 static unsigned short hamachi_eth_type_trans(struct sk_buff *skb,
1468 struct net_device *dev)
1469 {
1470 struct ethhdr *eth;
1471 unsigned char *rawp;
1472
1473 skb->mac.raw=skb->data;
1474 skb_pull(skb,dev->hard_header_len-8); /* artificially enlarged on tx */
1475 eth= skb->mac.ethernet;
1476
1477 if(*eth->h_dest&1)
1478 {
1479 if(memcmp(eth->h_dest,dev->broadcast, ETH_ALEN)==0)
1480 skb->pkt_type=PACKET_BROADCAST;
1481 else
1482 skb->pkt_type=PACKET_MULTICAST;
1483 }
1484
1485 /*
1486 * This ALLMULTI check should be redundant by 1.4
1487 * so don't forget to remove it.
1488 *
1489 * Seems, you forgot to remove it. All silly devices
1490 * seems to set IFF_PROMISC.
1491 */
1492
1493 else if(dev->flags&(IFF_PROMISC/*|IFF_ALLMULTI*/))
1494 {
1495 if(memcmp(eth->h_dest,dev->dev_addr, ETH_ALEN))
1496 skb->pkt_type=PACKET_OTHERHOST;
1497 }
1498
1499 if (ntohs(eth->h_proto) >= 1536)
1500 return eth->h_proto;
1501
1502 rawp = skb->data;
1503
1504 /*
1505 * This is a magic hack to spot IPX packets. Older Novell breaks
1506 * the protocol design and runs IPX over 802.3 without an 802.2 LLC
1507 * layer. We look for FFFF which isn't a used 802.2 SSAP/DSAP. This
1508 * won't work for fault tolerant netware but does for the rest.
1509 */
1510 if (*(unsigned short *)rawp == 0xFFFF)
1511 return htons(ETH_P_802_3);
1512
1513 /*
1514 * Real 802.2 LLC
1515 */
1516 return htons(ETH_P_802_2);
1517 }
1518 #endif /* TX_CHECKSUM */
1519
1520 /* This routine is logically part of the interrupt handler, but seperated
1521 for clarity and better register allocation. */
1522 static int hamachi_rx(struct net_device *dev)
1523 {
1524 struct hamachi_private *hmp = dev->priv;
1525 int entry = hmp->cur_rx % RX_RING_SIZE;
1526 int boguscnt = (hmp->dirty_rx + RX_RING_SIZE) - hmp->cur_rx;
1527
1528 if (hamachi_debug > 4) {
1529 printk(KERN_DEBUG " In hamachi_rx(), entry %d status %4.4x.\n",
1530 entry, hmp->rx_ring[entry].status_n_length);
1531 }
1532
1533 /* If EOP is set on the next entry, it's a new packet. Send it up. */
1534 while (1) {
1535 struct hamachi_desc *desc = &(hmp->rx_ring[entry]);
1536 u32 desc_status = le32_to_cpu(desc->status_n_length);
1537 u16 data_size = desc_status; /* Implicit truncate */
1538 u8 *buf_addr;
1539 s32 frame_status;
1540
1541 if (desc_status & DescOwn)
1542 break;
1543 pci_dma_sync_single(hmp->pci_dev, desc->addr, hmp->rx_buf_sz,
1544 PCI_DMA_FROMDEVICE);
1545 buf_addr = (u8 *)hmp->rx_ring + entry*sizeof(*desc);
1546 frame_status = le32_to_cpu(get_unaligned((s32*)&(buf_addr[data_size - 12])));
1547 if (hamachi_debug > 4)
1548 printk(KERN_DEBUG " hamachi_rx() status was %8.8x.\n",
1549 frame_status);
1550 if (--boguscnt < 0)
1551 break;
1552 if ( ! (desc_status & DescEndPacket)) {
1553 printk(KERN_WARNING "%s: Oversized Ethernet frame spanned "
1554 "multiple buffers, entry %#x length %d status %4.4x!\n",
1555 dev->name, hmp->cur_rx, data_size, desc_status);
1556 printk(KERN_WARNING "%s: Oversized Ethernet frame %p vs %p.\n",
1557 dev->name, desc, &hmp->rx_ring[hmp->cur_rx % RX_RING_SIZE]);
1558 printk(KERN_WARNING "%s: Oversized Ethernet frame -- next status %x/%x last status %x.\n",
1559 dev->name,
1560 hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length & 0xffff0000,
1561 hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length & 0x0000ffff,
1562 hmp->rx_ring[(hmp->cur_rx-1) % RX_RING_SIZE].status_n_length);
1563 hmp->stats.rx_length_errors++;
1564 } /* else Omit for prototype errata??? */
1565 if (frame_status & 0x00380000) {
1566 /* There was an error. */
1567 if (hamachi_debug > 2)
1568 printk(KERN_DEBUG " hamachi_rx() Rx error was %8.8x.\n",
1569 frame_status);
1570 hmp->stats.rx_errors++;
1571 if (frame_status & 0x00600000) hmp->stats.rx_length_errors++;
1572 if (frame_status & 0x00080000) hmp->stats.rx_frame_errors++;
1573 if (frame_status & 0x00100000) hmp->stats.rx_crc_errors++;
1574 if (frame_status < 0) hmp->stats.rx_dropped++;
1575 } else {
1576 struct sk_buff *skb;
1577 /* Omit CRC */
1578 u16 pkt_len = (frame_status & 0x07ff) - 4;
1579 #ifdef RX_CHECKSUM
1580 u32 pfck = *(u32 *) &buf_addr[data_size - 8];
1581 #endif
1582
1583
1584 #ifndef final_version
1585 if (hamachi_debug > 4)
1586 printk(KERN_DEBUG " hamachi_rx() normal Rx pkt length %d"
1587 " of %d, bogus_cnt %d.\n",
1588 pkt_len, data_size, boguscnt);
1589 if (hamachi_debug > 5)
1590 printk(KERN_DEBUG"%s: rx status %8.8x %8.8x %8.8x %8.8x %8.8x.\n",
1591 dev->name,
1592 *(s32*)&(buf_addr[data_size - 20]),
1593 *(s32*)&(buf_addr[data_size - 16]),
1594 *(s32*)&(buf_addr[data_size - 12]),
1595 *(s32*)&(buf_addr[data_size - 8]),
1596 *(s32*)&(buf_addr[data_size - 4]));
1597 #endif
1598 /* Check if the packet is long enough to accept without copying
1599 to a minimally-sized skbuff. */
1600 if (pkt_len < rx_copybreak
1601 && (skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
1602 #ifdef RX_CHECKSUM
1603 printk(KERN_ERR "%s: rx_copybreak non-zero "
1604 "not good with RX_CHECKSUM\n", dev->name);
1605 #endif
1606 skb->dev = dev;
1607 skb_reserve(skb, 2); /* 16 byte align the IP header */
1608 /* Call copy + cksum if available. */
1609 #if 1 || USE_IP_COPYSUM
1610 eth_copy_and_sum(skb,
1611 hmp->rx_skbuff[entry]->data, pkt_len, 0);
1612 skb_put(skb, pkt_len);
1613 #else
1614 memcpy(skb_put(skb, pkt_len), hmp->rx_ring_dma
1615 + entry*sizeof(*desc), pkt_len);
1616 #endif
1617 } else {
1618 pci_unmap_single(hmp->pci_dev,
1619 hmp->rx_ring[entry].addr,
1620 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1621 skb_put(skb = hmp->rx_skbuff[entry], pkt_len);
1622 hmp->rx_skbuff[entry] = NULL;
1623 }
1624 #ifdef TX_CHECKSUM
1625 /* account for extra TX hard_header bytes */
1626 skb->protocol = hamachi_eth_type_trans(skb, dev);
1627 #else
1628 skb->protocol = eth_type_trans(skb, dev);
1629 #endif
1630
1631
1632 #ifdef RX_CHECKSUM
1633 /* TCP or UDP on ipv4, DIX encoding */
1634 if (pfck>>24 == 0x91 || pfck>>24 == 0x51) {
1635 struct iphdr *ih = (struct iphdr *) skb->data;
1636 /* Check that IP packet is at least 46 bytes, otherwise,
1637 * there may be pad bytes included in the hardware checksum.
1638 * This wouldn't happen if everyone padded with 0.
1639 */
1640 if (ntohs(ih->tot_len) >= 46){
1641 /* don't worry about frags */
1642 if (!(ih->frag_off & __constant_htons(IP_MF|IP_OFFSET))) {
1643 u32 inv = *(u32 *) &buf_addr[data_size - 16];
1644 u32 *p = (u32 *) &buf_addr[data_size - 20];
1645 register u32 crc, p_r, p_r1;
1646
1647 if (inv & 4) {
1648 inv &= ~4;
1649 --p;
1650 }
1651 p_r = *p;
1652 p_r1 = *(p-1);
1653 switch (inv) {
1654 case 0:
1655 crc = (p_r & 0xffff) + (p_r >> 16);
1656 break;
1657 case 1:
1658 crc = (p_r >> 16) + (p_r & 0xffff)
1659 + (p_r1 >> 16 & 0xff00);
1660 break;
1661 case 2:
1662 crc = p_r + (p_r1 >> 16);
1663 break;
1664 case 3:
1665 crc = p_r + (p_r1 & 0xff00) + (p_r1 >> 16);
1666 break;
1667 default: /*NOTREACHED*/ crc = 0;
1668 }
1669 if (crc & 0xffff0000) {
1670 crc &= 0xffff;
1671 ++crc;
1672 }
1673 /* tcp/udp will add in pseudo */
1674 skb->csum = ntohs(pfck & 0xffff);
1675 if (skb->csum > crc)
1676 skb->csum -= crc;
1677 else
1678 skb->csum += (~crc & 0xffff);
1679 /*
1680 * could do the pseudo myself and return
1681 * CHECKSUM_UNNECESSARY
1682 */
1683 skb->ip_summed = CHECKSUM_HW;
1684 }
1685 }
1686 }
1687 #endif /* RX_CHECKSUM */
1688
1689 netif_rx(skb);
1690 dev->last_rx = jiffies;
1691 hmp->stats.rx_packets++;
1692 }
1693 entry = (++hmp->cur_rx) % RX_RING_SIZE;
1694 }
1695
1696 /* Refill the Rx ring buffers. */
1697 for (; hmp->cur_rx - hmp->dirty_rx > 0; hmp->dirty_rx++) {
1698 struct hamachi_desc *desc;
1699
1700 entry = hmp->dirty_rx % RX_RING_SIZE;
1701 desc = &(hmp->rx_ring[entry]);
1702 if (hmp->rx_skbuff[entry] == NULL) {
1703 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1704
1705 hmp->rx_skbuff[entry] = skb;
1706 if (skb == NULL)
1707 break; /* Better luck next round. */
1708 skb->dev = dev; /* Mark as being used by this device. */
1709 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1710 desc->addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1711 skb->tail, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1712 }
1713 desc->status_n_length = cpu_to_le32(hmp->rx_buf_sz);
1714 if (entry >= RX_RING_SIZE-1)
1715 desc->status_n_length |= cpu_to_le32(DescOwn |
1716 DescEndPacket | DescEndRing | DescIntr);
1717 else
1718 desc->status_n_length |= cpu_to_le32(DescOwn |
1719 DescEndPacket | DescIntr);
1720 }
1721
1722 /* Restart Rx engine if stopped. */
1723 /* If we don't need to check status, don't. -KDU */
1724 if (readw(dev->base_addr + RxStatus) & 0x0002)
1725 writew(0x0001, dev->base_addr + RxCmd);
1726
1727 return 0;
1728 }
1729
1730 /* This is more properly named "uncommon interrupt events", as it covers more
1731 than just errors. */
1732 static void hamachi_error(struct net_device *dev, int intr_status)
1733 {
1734 long ioaddr = dev->base_addr;
1735 struct hamachi_private *hmp = dev->priv;
1736
1737 if (intr_status & (LinkChange|NegotiationChange)) {
1738 if (hamachi_debug > 1)
1739 printk(KERN_INFO "%s: Link changed: AutoNegotiation Ctrl"
1740 " %4.4x, Status %4.4x %4.4x Intr status %4.4x.\n",
1741 dev->name, readw(ioaddr + 0x0E0), readw(ioaddr + 0x0E2),
1742 readw(ioaddr + ANLinkPartnerAbility),
1743 readl(ioaddr + IntrStatus));
1744 if (readw(ioaddr + ANStatus) & 0x20)
1745 writeb(0x01, ioaddr + LEDCtrl);
1746 else
1747 writeb(0x03, ioaddr + LEDCtrl);
1748 }
1749 if (intr_status & StatsMax) {
1750 hamachi_get_stats(dev);
1751 /* Read the overflow bits to clear. */
1752 readl(ioaddr + 0x370);
1753 readl(ioaddr + 0x3F0);
1754 }
1755 if ((intr_status & ~(LinkChange|StatsMax|NegotiationChange|IntrRxDone|IntrTxDone))
1756 && hamachi_debug)
1757 printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n",
1758 dev->name, intr_status);
1759 /* Hmmmmm, it's not clear how to recover from PCI faults. */
1760 if (intr_status & (IntrTxPCIErr | IntrTxPCIFault))
1761 hmp->stats.tx_fifo_errors++;
1762 if (intr_status & (IntrRxPCIErr | IntrRxPCIFault))
1763 hmp->stats.rx_fifo_errors++;
1764 }
1765
1766 static int hamachi_close(struct net_device *dev)
1767 {
1768 long ioaddr = dev->base_addr;
1769 struct hamachi_private *hmp = dev->priv;
1770 struct sk_buff *skb;
1771 int i;
1772
1773 netif_stop_queue(dev);
1774
1775 if (hamachi_debug > 1) {
1776 printk(KERN_DEBUG "%s: Shutting down ethercard, status was Tx %4.4x Rx %4.4x Int %2.2x.\n",
1777 dev->name, readw(ioaddr + TxStatus),
1778 readw(ioaddr + RxStatus), readl(ioaddr + IntrStatus));
1779 printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d, Rx %d / %d.\n",
1780 dev->name, hmp->cur_tx, hmp->dirty_tx, hmp->cur_rx, hmp->dirty_rx);
1781 }
1782
1783 /* Disable interrupts by clearing the interrupt mask. */
1784 writel(0x0000, ioaddr + InterruptEnable);
1785
1786 /* Stop the chip's Tx and Rx processes. */
1787 writel(2, ioaddr + RxCmd);
1788 writew(2, ioaddr + TxCmd);
1789
1790 #ifdef __i386__
1791 if (hamachi_debug > 2) {
1792 printk("\n"KERN_DEBUG" Tx ring at %8.8x:\n",
1793 (int)hmp->tx_ring_dma);
1794 for (i = 0; i < TX_RING_SIZE; i++)
1795 printk(" %c #%d desc. %8.8x %8.8x.\n",
1796 readl(ioaddr + TxCurPtr) == (long)&hmp->tx_ring[i] ? '>' : ' ',
1797 i, hmp->tx_ring[i].status_n_length, hmp->tx_ring[i].addr);
1798 printk("\n"KERN_DEBUG " Rx ring %8.8x:\n",
1799 (int)hmp->rx_ring_dma);
1800 for (i = 0; i < RX_RING_SIZE; i++) {
1801 printk(KERN_DEBUG " %c #%d desc. %4.4x %8.8x\n",
1802 readl(ioaddr + RxCurPtr) == (long)&hmp->rx_ring[i] ? '>' : ' ',
1803 i, hmp->rx_ring[i].status_n_length, hmp->rx_ring[i].addr);
1804 if (hamachi_debug > 6) {
1805 if (*(u8*)hmp->rx_skbuff[i]->tail != 0x69) {
1806 u16 *addr = (u16 *)
1807 hmp->rx_skbuff[i]->tail;
1808 int j;
1809
1810 for (j = 0; j < 0x50; j++)
1811 printk(" %4.4x", addr[j]);
1812 printk("\n");
1813 }
1814 }
1815 }
1816 }
1817 #endif /* __i386__ debugging only */
1818
1819 free_irq(dev->irq, dev);
1820
1821 del_timer_sync(&hmp->timer);
1822
1823 /* Free all the skbuffs in the Rx queue. */
1824 for (i = 0; i < RX_RING_SIZE; i++) {
1825 skb = hmp->rx_skbuff[i];
1826 hmp->rx_ring[i].status_n_length = 0;
1827 hmp->rx_ring[i].addr = 0xBADF00D0; /* An invalid address. */
1828 if (skb) {
1829 pci_unmap_single(hmp->pci_dev,
1830 hmp->rx_ring[i].addr, hmp->rx_buf_sz,
1831 PCI_DMA_FROMDEVICE);
1832 dev_kfree_skb(skb);
1833 hmp->rx_skbuff[i] = 0;
1834 }
1835 }
1836 for (i = 0; i < TX_RING_SIZE; i++) {
1837 skb = hmp->tx_skbuff[i];
1838 if (skb) {
1839 pci_unmap_single(hmp->pci_dev,
1840 hmp->tx_ring[i].addr, skb->len,
1841 PCI_DMA_TODEVICE);
1842 dev_kfree_skb(skb);
1843 hmp->tx_skbuff[i] = 0;
1844 }
1845 }
1846
1847 writeb(0x00, ioaddr + LEDCtrl);
1848
1849 return 0;
1850 }
1851
1852 static struct net_device_stats *hamachi_get_stats(struct net_device *dev)
1853 {
1854 long ioaddr = dev->base_addr;
1855 struct hamachi_private *hmp = dev->priv;
1856
1857 /* We should lock this segment of code for SMP eventually, although
1858 the vulnerability window is very small and statistics are
1859 non-critical. */
1860 /* Ok, what goes here? This appears to be stuck at 21 packets
1861 according to ifconfig. It does get incremented in hamachi_tx(),
1862 so I think I'll comment it out here and see if better things
1863 happen.
1864 */
1865 /* hmp->stats.tx_packets = readl(ioaddr + 0x000); */
1866
1867 hmp->stats.rx_bytes = readl(ioaddr + 0x330); /* Total Uni+Brd+Multi */
1868 hmp->stats.tx_bytes = readl(ioaddr + 0x3B0); /* Total Uni+Brd+Multi */
1869 hmp->stats.multicast = readl(ioaddr + 0x320); /* Multicast Rx */
1870
1871 hmp->stats.rx_length_errors = readl(ioaddr + 0x368); /* Over+Undersized */
1872 hmp->stats.rx_over_errors = readl(ioaddr + 0x35C); /* Jabber */
1873 hmp->stats.rx_crc_errors = readl(ioaddr + 0x360); /* Jabber */
1874 hmp->stats.rx_frame_errors = readl(ioaddr + 0x364); /* Symbol Errs */
1875 hmp->stats.rx_missed_errors = readl(ioaddr + 0x36C); /* Dropped */
1876
1877 return &hmp->stats;
1878 }
1879
1880 static void set_rx_mode(struct net_device *dev)
1881 {
1882 long ioaddr = dev->base_addr;
1883
1884 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1885 /* Unconditionally log net taps. */
1886 printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n", dev->name);
1887 writew(0x000F, ioaddr + AddrMode);
1888 } else if ((dev->mc_count > 63) || (dev->flags & IFF_ALLMULTI)) {
1889 /* Too many to match, or accept all multicasts. */
1890 writew(0x000B, ioaddr + AddrMode);
1891 } else if (dev->mc_count > 0) { /* Must use the CAM filter. */
1892 struct dev_mc_list *mclist;
1893 int i;
1894 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1895 i++, mclist = mclist->next) {
1896 writel(*(u32*)(mclist->dmi_addr), ioaddr + 0x100 + i*8);
1897 writel(0x20000 | (*(u16*)&mclist->dmi_addr[4]),
1898 ioaddr + 0x104 + i*8);
1899 }
1900 /* Clear remaining entries. */
1901 for (; i < 64; i++)
1902 writel(0, ioaddr + 0x104 + i*8);
1903 writew(0x0003, ioaddr + AddrMode);
1904 } else { /* Normal, unicast/broadcast-only mode. */
1905 writew(0x0001, ioaddr + AddrMode);
1906 }
1907 }
1908
1909 static int netdev_ethtool_ioctl(struct net_device *dev, void *useraddr)
1910 {
1911 struct hamachi_private *hmp = dev->priv;
1912 u32 ethcmd;
1913
1914 if (copy_from_user(ðcmd, useraddr, sizeof(ethcmd)))
1915 return -EFAULT;
1916
1917 switch (ethcmd) {
1918 case ETHTOOL_GDRVINFO: {
1919 struct ethtool_drvinfo info = {ETHTOOL_GDRVINFO};
1920 strcpy(info.driver, DRV_NAME);
1921 strcpy(info.version, DRV_VERSION);
1922 strcpy(info.bus_info, hmp->pci_dev->slot_name);
1923 if (copy_to_user(useraddr, &info, sizeof(info)))
1924 return -EFAULT;
1925 return 0;
1926 }
1927
1928 }
1929
1930 return -EOPNOTSUPP;
1931 }
1932
1933 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1934 {
1935 long ioaddr = dev->base_addr;
1936 struct mii_ioctl_data *data = (struct mii_ioctl_data *)&rq->ifr_data;
1937
1938 switch(cmd) {
1939 case SIOCETHTOOL:
1940 return netdev_ethtool_ioctl(dev, (void *) rq->ifr_data);
1941 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
1942 case SIOCDEVPRIVATE: /* for binary compat, remove in 2.5 */
1943 data->phy_id = ((struct hamachi_private *)dev->priv)->phys[0] & 0x1f;
1944 /* Fall Through */
1945
1946 case SIOCGMIIREG: /* Read MII PHY register. */
1947 case SIOCDEVPRIVATE+1: /* for binary compat, remove in 2.5 */
1948 data->val_out = mdio_read(ioaddr, data->phy_id & 0x1f, data->reg_num & 0x1f);
1949 return 0;
1950
1951 case SIOCSMIIREG: /* Write MII PHY register. */
1952 case SIOCDEVPRIVATE+2: /* for binary compat, remove in 2.5 */
1953 /* TODO: Check the sequencing of this. Might need to stop and
1954 * restart Rx and Tx engines. -KDU
1955 */
1956 if (!capable(CAP_NET_ADMIN))
1957 return -EPERM;
1958 mdio_write(ioaddr, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
1959 return 0;
1960 case SIOCDEVPRIVATE+3: { /* set rx,tx intr params */
1961 u32 *d = (u32 *)&rq->ifr_data;
1962 /* Should add this check here or an ordinary user can do nasty
1963 * things. -KDU
1964 *
1965 * TODO: Shut down the Rx and Tx engines while doing this.
1966 */
1967 if (!capable(CAP_NET_ADMIN))
1968 return -EPERM;
1969 writel(d[0], dev->base_addr + TxIntrCtrl);
1970 writel(d[1], dev->base_addr + RxIntrCtrl);
1971 printk(KERN_NOTICE "%s: tx %08x, rx %08x intr\n", dev->name,
1972 (u32) readl(dev->base_addr + TxIntrCtrl),
1973 (u32) readl(dev->base_addr + RxIntrCtrl));
1974 return 0;
1975 }
1976 default:
1977 return -EOPNOTSUPP;
1978 }
1979 }
1980
1981
1982 static void __exit hamachi_remove_one (struct pci_dev *pdev)
1983 {
1984 struct net_device *dev = pci_get_drvdata(pdev);
1985
1986 /* No need to check MOD_IN_USE, as sys_delete_module() checks. */
1987 if (dev) {
1988 struct hamachi_private *hmp = dev->priv;
1989
1990 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring,
1991 hmp->rx_ring_dma);
1992 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring,
1993 hmp->tx_ring_dma);
1994 unregister_netdev(dev);
1995 iounmap((char *)dev->base_addr);
1996 kfree(dev);
1997 pci_release_regions(pdev);
1998 pci_set_drvdata(pdev, NULL);
1999 }
2000 }
2001
2002 static struct pci_device_id hamachi_pci_tbl[] __initdata = {
2003 { 0x1318, 0x0911, PCI_ANY_ID, PCI_ANY_ID, },
2004 { 0, }
2005 };
2006 MODULE_DEVICE_TABLE(pci, hamachi_pci_tbl);
2007
2008 static struct pci_driver hamachi_driver = {
2009 name: DRV_NAME,
2010 id_table: hamachi_pci_tbl,
2011 probe: hamachi_init_one,
2012 remove: hamachi_remove_one,
2013 };
2014
2015 static int __init hamachi_init (void)
2016 {
2017 /* when a module, this is printed whether or not devices are found in probe */
2018 #ifdef MODULE
2019 printk(version);
2020 #endif
2021 if (pci_register_driver(&hamachi_driver) > 0)
2022 return 0;
2023 pci_unregister_driver(&hamachi_driver);
2024 return -ENODEV;
2025 }
2026
2027 static void __exit hamachi_exit (void)
2028 {
2029 pci_unregister_driver(&hamachi_driver);
2030 }
2031
2032
2033 module_init(hamachi_init);
2034 module_exit(hamachi_exit);
2035