File: /usr/src/linux/drivers/net/hamradio/scc.c
1 #define RCS_ID "$Id: scc.c,v 1.75 1998/11/04 15:15:01 jreuter Exp jreuter $"
2
3 #define VERSION "3.0"
4
5 /*
6 * Please use z8530drv-utils-3.0 with this version.
7 * ------------------
8 *
9 * You can find a subset of the documentation in
10 * linux/Documentation/networking/z8530drv.txt.
11 */
12
13 /*
14 ********************************************************************
15 * SCC.C - Linux driver for Z8530 based HDLC cards for AX.25 *
16 ********************************************************************
17
18
19 ********************************************************************
20
21 Copyright (c) 1993, 2000 Joerg Reuter DL1BKE
22
23 portions (c) 1993 Guido ten Dolle PE1NNZ
24
25 ********************************************************************
26
27 The driver and the programs in the archive are UNDER CONSTRUCTION.
28 The code is likely to fail, and so your kernel could --- even
29 a whole network.
30
31 This driver is intended for Amateur Radio use. If you are running it
32 for commercial purposes, please drop me a note. I am nosy...
33
34 ...BUT:
35
36 ! You m u s t recognize the appropriate legislations of your country !
37 ! before you connect a radio to the SCC board and start to transmit or !
38 ! receive. The GPL allows you to use the d r i v e r, NOT the RADIO! !
39
40 For non-Amateur-Radio use please note that you might need a special
41 allowance/licence from the designer of the SCC Board and/or the
42 MODEM.
43
44 This program is free software; you can redistribute it and/or modify
45 it under the terms of the (modified) GNU General Public License
46 delivered with the Linux kernel source.
47
48 This program is distributed in the hope that it will be useful,
49 but WITHOUT ANY WARRANTY; without even the implied warranty of
50 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
51 GNU General Public License for more details.
52
53 You should find a copy of the GNU General Public License in
54 /usr/src/linux/COPYING;
55
56 ********************************************************************
57
58
59 Incomplete history of z8530drv:
60 -------------------------------
61
62 1994-09-13 started to write the driver, rescued most of my own
63 code (and Hans Alblas' memory buffer pool concept) from
64 an earlier project "sccdrv" which was initiated by
65 Guido ten Dolle. Not much of the old driver survived,
66 though. The first version I put my hands on was sccdrv1.3
67 from August 1993. The memory buffer pool concept
68 appeared in an unauthorized sccdrv version (1.5) from
69 August 1994.
70
71 1995-01-31 changed copyright notice to GPL without limitations.
72
73 .
74 . <SNIP>
75 .
76
77 1996-10-05 New semester, new driver...
78
79 * KISS TNC emulator removed (TTY driver)
80 * Source moved to drivers/net/
81 * Includes Z8530 defines from drivers/net/z8530.h
82 * Uses sk_buffer memory management
83 * Reduced overhead of /proc/net/z8530drv output
84 * Streamlined quite a lot things
85 * Invents brand new bugs... ;-)
86
87 The move to version number 3.0 reflects theses changes.
88 You can use 'kissbridge' if you need a KISS TNC emulator.
89
90 1996-12-13 Fixed for Linux networking changes. (G4KLX)
91 1997-01-08 Fixed the remaining problems.
92 1997-04-02 Hopefully fixed the problems with the new *_timer()
93 routines, added calibration code.
94 1997-10-12 Made SCC_DELAY a CONFIG option, added CONFIG_SCC_TRXECHO
95 1998-01-29 Small fix to avoid lock-up on initialization
96 1998-09-29 Fixed the "grouping" bugs, tx_inhibit works again,
97 using dev->tx_queue_len now instead of MAXQUEUE now.
98 1998-10-21 Postponed the spinlock changes, would need a lot of
99 testing I currently don't have the time to. Softdcd doesn't
100 work.
101 1998-11-04 Softdcd does not work correctly in DPLL mode, in fact it
102 never did. The DPLL locks on noise, the SYNC unit sees
103 flags that aren't... Restarting the DPLL does not help
104 either, it resynchronizes too slow and the first received
105 frame gets lost.
106 2000-02-13 Fixed for new network driver interface changes, still
107 does TX timeouts itself since it uses its own queue
108 scheme.
109
110 Thanks to all who contributed to this driver with ideas and bug
111 reports!
112
113 NB -- if you find errors, change something, please let me know
114 first before you distribute it... And please don't touch
115 the version number. Just replace my callsign in
116 "v3.0.dl1bke" with your own. Just to avoid confusion...
117
118 If you want to add your modification to the linux distribution
119 please (!) contact me first.
120
121 New versions of the driver will be announced on the linux-hams
122 mailing list on vger.kernel.org. To subscribe send an e-mail
123 to majordomo@vger.kernel.org with the following line in
124 the body of the mail:
125
126 subscribe linux-hams
127
128 The content of the "Subject" field will be ignored.
129
130 vy 73,
131 Joerg Reuter ampr-net: dl1bke@db0pra.ampr.org
132 AX-25 : DL1BKE @ DB0ABH.#BAY.DEU.EU
133 Internet: jreuter@yaina.de
134 www : http://yaina.de/jreuter
135 */
136
137 /* ----------------------------------------------------------------------- */
138
139 #undef SCC_LDELAY /* slow it even a bit more down */
140 #undef SCC_DONT_CHECK /* don't look if the SCCs you specified are available */
141
142 #define SCC_MAXCHIPS 4 /* number of max. supported chips */
143 #define SCC_BUFSIZE 384 /* must not exceed 4096 */
144 #undef SCC_DEBUG
145
146 #define SCC_DEFAULT_CLOCK 4915200
147 /* default pclock if nothing is specified */
148
149 /* ----------------------------------------------------------------------- */
150
151 #include <linux/config.h>
152 #include <linux/module.h>
153 #include <linux/errno.h>
154 #include <linux/signal.h>
155 #include <linux/sched.h>
156 #include <linux/timer.h>
157 #include <linux/interrupt.h>
158 #include <linux/ioport.h>
159 #include <linux/string.h>
160 #include <linux/in.h>
161 #include <linux/fcntl.h>
162 #include <linux/ptrace.h>
163 #include <linux/slab.h>
164 #include <linux/delay.h>
165
166 #include <linux/skbuff.h>
167 #include <linux/netdevice.h>
168 #include <linux/if_ether.h>
169 #include <linux/if_arp.h>
170 #include <linux/socket.h>
171 #include <linux/init.h>
172
173 #include <linux/scc.h>
174 #include "z8530.h"
175
176 #include <net/ax25.h>
177 #include <asm/irq.h>
178 #include <asm/system.h>
179 #include <asm/io.h>
180 #include <asm/uaccess.h>
181 #include <asm/bitops.h>
182
183 #include <linux/ctype.h>
184 #include <linux/kernel.h>
185 #include <linux/proc_fs.h>
186
187 static char banner[] __initdata = KERN_INFO "AX.25: Z8530 SCC driver version "VERSION".dl1bke\n";
188
189 static void t_dwait(unsigned long);
190 static void t_txdelay(unsigned long);
191 static void t_tail(unsigned long);
192 static void t_busy(unsigned long);
193 static void t_maxkeyup(unsigned long);
194 static void t_idle(unsigned long);
195 static void scc_tx_done(struct scc_channel *);
196 static void scc_start_tx_timer(struct scc_channel *, void (*)(unsigned long), unsigned long);
197 static void scc_start_maxkeyup(struct scc_channel *);
198 static void scc_start_defer(struct scc_channel *);
199
200 static void z8530_init(void);
201
202 static void init_channel(struct scc_channel *scc);
203 static void scc_key_trx (struct scc_channel *scc, char tx);
204 static void scc_isr(int irq, void *dev_id, struct pt_regs *regs);
205 static void scc_init_timer(struct scc_channel *scc);
206
207 static int scc_net_setup(struct scc_channel *scc, unsigned char *name, int addev);
208 static int scc_net_init(struct net_device *dev);
209 static int scc_net_open(struct net_device *dev);
210 static int scc_net_close(struct net_device *dev);
211 static void scc_net_rx(struct scc_channel *scc, struct sk_buff *skb);
212 static int scc_net_tx(struct sk_buff *skb, struct net_device *dev);
213 static int scc_net_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
214 static int scc_net_set_mac_address(struct net_device *dev, void *addr);
215 static struct net_device_stats * scc_net_get_stats(struct net_device *dev);
216
217 static unsigned char SCC_DriverName[] = "scc";
218
219 static struct irqflags { unsigned char used : 1; } Ivec[NR_IRQS];
220
221 static struct scc_channel SCC_Info[2 * SCC_MAXCHIPS]; /* information per channel */
222
223 static struct scc_ctrl {
224 io_port chan_A;
225 io_port chan_B;
226 int irq;
227 } SCC_ctrl[SCC_MAXCHIPS+1];
228
229 static unsigned char Driver_Initialized;
230 static int Nchips;
231 static io_port Vector_Latch;
232
233
234 /* ******************************************************************** */
235 /* * Port Access Functions * */
236 /* ******************************************************************** */
237
238 /* These provide interrupt save 2-step access to the Z8530 registers */
239
240 static inline unsigned char InReg(io_port port, unsigned char reg)
241 {
242 unsigned long flags;
243 unsigned char r;
244
245 save_flags(flags);
246 cli();
247 #ifdef SCC_LDELAY
248 Outb(port, reg);
249 udelay(SCC_LDELAY);
250 r=Inb(port);
251 udelay(SCC_LDELAY);
252 #else
253 Outb(port, reg);
254 r=Inb(port);
255 #endif
256 restore_flags(flags);
257 return r;
258 }
259
260 static inline void OutReg(io_port port, unsigned char reg, unsigned char val)
261 {
262 unsigned long flags;
263
264 save_flags(flags);
265 cli();
266 #ifdef SCC_LDELAY
267 Outb(port, reg); udelay(SCC_LDELAY);
268 Outb(port, val); udelay(SCC_LDELAY);
269 #else
270 Outb(port, reg);
271 Outb(port, val);
272 #endif
273 restore_flags(flags);
274 }
275
276 static inline void wr(struct scc_channel *scc, unsigned char reg,
277 unsigned char val)
278 {
279 OutReg(scc->ctrl, reg, (scc->wreg[reg] = val));
280 }
281
282 static inline void or(struct scc_channel *scc, unsigned char reg, unsigned char val)
283 {
284 OutReg(scc->ctrl, reg, (scc->wreg[reg] |= val));
285 }
286
287 static inline void cl(struct scc_channel *scc, unsigned char reg, unsigned char val)
288 {
289 OutReg(scc->ctrl, reg, (scc->wreg[reg] &= ~val));
290 }
291
292 /* ******************************************************************** */
293 /* * Some useful macros * */
294 /* ******************************************************************** */
295
296 static inline void scc_discard_buffers(struct scc_channel *scc)
297 {
298 unsigned long flags;
299
300 save_flags(flags);
301 cli();
302
303 if (scc->tx_buff != NULL)
304 {
305 dev_kfree_skb(scc->tx_buff);
306 scc->tx_buff = NULL;
307 }
308
309 while (skb_queue_len(&scc->tx_queue))
310 dev_kfree_skb(skb_dequeue(&scc->tx_queue));
311
312 restore_flags(flags);
313 }
314
315
316
317 /* ******************************************************************** */
318 /* * Interrupt Service Routines * */
319 /* ******************************************************************** */
320
321
322 /* ----> subroutines for the interrupt handlers <---- */
323
324 static inline void scc_notify(struct scc_channel *scc, int event)
325 {
326 struct sk_buff *skb;
327 char *bp;
328
329 if (scc->kiss.fulldup != KISS_DUPLEX_OPTIMA)
330 return;
331
332 skb = dev_alloc_skb(2);
333 if (skb != NULL)
334 {
335 bp = skb_put(skb, 2);
336 *bp++ = PARAM_HWEVENT;
337 *bp++ = event;
338 scc_net_rx(scc, skb);
339 } else
340 scc->stat.nospace++;
341 }
342
343 static inline void flush_rx_FIFO(struct scc_channel *scc)
344 {
345 int k;
346
347 for (k=0; k<3; k++)
348 Inb(scc->data);
349
350 if(scc->rx_buff != NULL) /* did we receive something? */
351 {
352 scc->stat.rxerrs++; /* then count it as an error */
353 dev_kfree_skb_irq(scc->rx_buff);
354 scc->rx_buff = NULL;
355 }
356 }
357
358 static void start_hunt(struct scc_channel *scc)
359 {
360 if ((scc->modem.clocksrc != CLK_EXTERNAL))
361 OutReg(scc->ctrl,R14,SEARCH|scc->wreg[R14]); /* DPLL: enter search mode */
362 or(scc,R3,ENT_HM|RxENABLE); /* enable the receiver, hunt mode */
363 }
364
365 /* ----> four different interrupt handlers for Tx, Rx, changing of */
366 /* DCD/CTS and Rx/Tx errors */
367
368 /* Transmitter interrupt handler */
369 static inline void scc_txint(struct scc_channel *scc)
370 {
371 struct sk_buff *skb;
372
373 scc->stat.txints++;
374 skb = scc->tx_buff;
375
376 /* send first octet */
377
378 if (skb == NULL)
379 {
380 skb = skb_dequeue(&scc->tx_queue);
381 scc->tx_buff = skb;
382 netif_wake_queue(scc->dev);
383
384 if (skb == NULL)
385 {
386 scc_tx_done(scc);
387 Outb(scc->ctrl, RES_Tx_P);
388 return;
389 }
390
391 if (skb->len == 0) /* Paranoia... */
392 {
393 dev_kfree_skb_irq(skb);
394 scc->tx_buff = NULL;
395 scc_tx_done(scc);
396 Outb(scc->ctrl, RES_Tx_P);
397 return;
398 }
399
400 scc->stat.tx_state = TXS_ACTIVE;
401
402 OutReg(scc->ctrl, R0, RES_Tx_CRC);
403 /* reset CRC generator */
404 or(scc,R10,ABUNDER); /* re-install underrun protection */
405 Outb(scc->data,*skb->data); /* send byte */
406 skb_pull(skb, 1);
407
408 if (!scc->enhanced) /* reset EOM latch */
409 Outb(scc->ctrl,RES_EOM_L);
410 return;
411 }
412
413 /* End Of Frame... */
414
415 if (skb->len == 0)
416 {
417 Outb(scc->ctrl, RES_Tx_P); /* reset pending int */
418 cl(scc, R10, ABUNDER); /* send CRC */
419 dev_kfree_skb_irq(skb);
420 scc->tx_buff = NULL;
421 scc->stat.tx_state = TXS_NEWFRAME; /* next frame... */
422 return;
423 }
424
425 /* send octet */
426
427 Outb(scc->data,*skb->data);
428 skb_pull(skb, 1);
429 }
430
431
432 /* External/Status interrupt handler */
433 static inline void scc_exint(struct scc_channel *scc)
434 {
435 unsigned char status,changes,chg_and_stat;
436
437 scc->stat.exints++;
438
439 status = InReg(scc->ctrl,R0);
440 changes = status ^ scc->status;
441 chg_and_stat = changes & status;
442
443 /* ABORT: generated whenever DCD drops while receiving */
444
445 if (chg_and_stat & BRK_ABRT) /* Received an ABORT */
446 flush_rx_FIFO(scc);
447
448 /* HUNT: software DCD; on = waiting for SYNC, off = receiving frame */
449
450 if ((changes & SYNC_HUNT) && scc->kiss.softdcd)
451 {
452 if (status & SYNC_HUNT)
453 {
454 scc->dcd = 0;
455 flush_rx_FIFO(scc);
456 if ((scc->modem.clocksrc != CLK_EXTERNAL))
457 OutReg(scc->ctrl,R14,SEARCH|scc->wreg[R14]); /* DPLL: enter search mode */
458 } else {
459 scc->dcd = 1;
460 }
461
462 scc_notify(scc, scc->dcd? HWEV_DCD_OFF:HWEV_DCD_ON);
463 }
464
465 /* DCD: on = start to receive packet, off = ABORT condition */
466 /* (a successfully received packet generates a special condition int) */
467
468 if((changes & DCD) && !scc->kiss.softdcd) /* DCD input changed state */
469 {
470 if(status & DCD) /* DCD is now ON */
471 {
472 start_hunt(scc);
473 scc->dcd = 1;
474 } else { /* DCD is now OFF */
475 cl(scc,R3,ENT_HM|RxENABLE); /* disable the receiver */
476 flush_rx_FIFO(scc);
477 scc->dcd = 0;
478 }
479
480 scc_notify(scc, scc->dcd? HWEV_DCD_ON:HWEV_DCD_OFF);
481 }
482
483 #ifdef notdef
484 /* CTS: use external TxDelay (what's that good for?!)
485 * Anyway: If we _could_ use it (BayCom USCC uses CTS for
486 * own purposes) we _should_ use the "autoenable" feature
487 * of the Z8530 and not this interrupt...
488 */
489
490 if (chg_and_stat & CTS) /* CTS is now ON */
491 {
492 if (scc->kiss.txdelay == 0) /* zero TXDELAY = wait for CTS */
493 scc_start_tx_timer(scc, t_txdelay, 0);
494 }
495 #endif
496
497 if (scc->stat.tx_state == TXS_ACTIVE && (status & TxEOM))
498 {
499 scc->stat.tx_under++; /* oops, an underrun! count 'em */
500 Outb(scc->ctrl, RES_EXT_INT); /* reset ext/status interrupts */
501
502 if (scc->tx_buff != NULL)
503 {
504 dev_kfree_skb_irq(scc->tx_buff);
505 scc->tx_buff = NULL;
506 }
507
508 or(scc,R10,ABUNDER);
509 scc_start_tx_timer(scc, t_txdelay, 0); /* restart transmission */
510 }
511
512 scc->status = status;
513 Outb(scc->ctrl,RES_EXT_INT);
514 }
515
516
517 /* Receiver interrupt handler */
518 static inline void scc_rxint(struct scc_channel *scc)
519 {
520 struct sk_buff *skb;
521
522 scc->stat.rxints++;
523
524 if((scc->wreg[5] & RTS) && scc->kiss.fulldup == KISS_DUPLEX_HALF)
525 {
526 Inb(scc->data); /* discard char */
527 or(scc,R3,ENT_HM); /* enter hunt mode for next flag */
528 return;
529 }
530
531 skb = scc->rx_buff;
532
533 if (skb == NULL)
534 {
535 skb = dev_alloc_skb(scc->stat.bufsize);
536 if (skb == NULL)
537 {
538 scc->dev_stat.rx_dropped++;
539 scc->stat.nospace++;
540 Inb(scc->data);
541 or(scc, R3, ENT_HM);
542 return;
543 }
544
545 scc->rx_buff = skb;
546 *(skb_put(skb, 1)) = 0; /* KISS data */
547 }
548
549 if (skb->len >= scc->stat.bufsize)
550 {
551 #ifdef notdef
552 printk(KERN_DEBUG "z8530drv: oops, scc_rxint() received huge frame...\n");
553 #endif
554 dev_kfree_skb_irq(skb);
555 scc->rx_buff = NULL;
556 Inb(scc->data);
557 or(scc, R3, ENT_HM);
558 return;
559 }
560
561 *(skb_put(skb, 1)) = Inb(scc->data);
562 }
563
564
565 /* Receive Special Condition interrupt handler */
566 static inline void scc_spint(struct scc_channel *scc)
567 {
568 unsigned char status;
569 struct sk_buff *skb;
570
571 scc->stat.spints++;
572
573 status = InReg(scc->ctrl,R1); /* read receiver status */
574
575 Inb(scc->data); /* throw away Rx byte */
576 skb = scc->rx_buff;
577
578 if(status & Rx_OVR) /* receiver overrun */
579 {
580 scc->stat.rx_over++; /* count them */
581 or(scc,R3,ENT_HM); /* enter hunt mode for next flag */
582
583 if (skb != NULL)
584 dev_kfree_skb_irq(skb);
585 scc->rx_buff = skb = NULL;
586 }
587
588 if(status & END_FR && skb != NULL) /* end of frame */
589 {
590 /* CRC okay, frame ends on 8 bit boundary and received something ? */
591
592 if (!(status & CRC_ERR) && (status & 0xe) == RES8 && skb->len > 0)
593 {
594 /* ignore last received byte (first of the CRC bytes) */
595 skb_trim(skb, skb->len-1);
596 scc_net_rx(scc, skb);
597 scc->rx_buff = NULL;
598 scc->stat.rxframes++;
599 } else { /* a bad frame */
600 dev_kfree_skb_irq(skb);
601 scc->rx_buff = NULL;
602 scc->stat.rxerrs++;
603 }
604 }
605
606 Outb(scc->ctrl,ERR_RES);
607 }
608
609
610 /* ----> interrupt service routine for the Z8530 <---- */
611
612 static void scc_isr_dispatch(struct scc_channel *scc, int vector)
613 {
614 switch (vector & VECTOR_MASK)
615 {
616 case TXINT: scc_txint(scc); break;
617 case EXINT: scc_exint(scc); break;
618 case RXINT: scc_rxint(scc); break;
619 case SPINT: scc_spint(scc); break;
620 }
621 }
622
623 /* If the card has a latch for the interrupt vector (like the PA0HZP card)
624 use it to get the number of the chip that generated the int.
625 If not: poll all defined chips.
626 */
627
628 #define SCC_IRQTIMEOUT 30000
629
630 static void scc_isr(int irq, void *dev_id, struct pt_regs *regs)
631 {
632 unsigned char vector;
633 struct scc_channel *scc;
634 struct scc_ctrl *ctrl;
635 int k;
636
637 if (Vector_Latch)
638 {
639 for(k=0; k < SCC_IRQTIMEOUT; k++)
640 {
641 Outb(Vector_Latch, 0); /* Generate INTACK */
642
643 /* Read the vector */
644 if((vector=Inb(Vector_Latch)) >= 16 * Nchips) break;
645 if (vector & 0x01) break;
646
647 scc=&SCC_Info[vector >> 3 ^ 0x01];
648 if (!scc->dev) break;
649
650 scc_isr_dispatch(scc, vector);
651
652 OutReg(scc->ctrl,R0,RES_H_IUS); /* Reset Highest IUS */
653 }
654
655 if (k == SCC_IRQTIMEOUT)
656 printk(KERN_WARNING "z8530drv: endless loop in scc_isr()?\n");
657
658 return;
659 }
660
661 /* Find the SCC generating the interrupt by polling all attached SCCs
662 * reading RR3A (the interrupt pending register)
663 */
664
665 ctrl = SCC_ctrl;
666 while (ctrl->chan_A)
667 {
668 if (ctrl->irq != irq)
669 {
670 ctrl++;
671 continue;
672 }
673
674 scc = NULL;
675 for (k = 0; InReg(ctrl->chan_A,R3) && k < SCC_IRQTIMEOUT; k++)
676 {
677 vector=InReg(ctrl->chan_B,R2); /* Read the vector */
678 if (vector & 0x01) break;
679
680 scc = &SCC_Info[vector >> 3 ^ 0x01];
681 if (!scc->dev) break;
682
683 scc_isr_dispatch(scc, vector);
684 }
685
686 if (k == SCC_IRQTIMEOUT)
687 {
688 printk(KERN_WARNING "z8530drv: endless loop in scc_isr()?!\n");
689 break;
690 }
691
692 /* This looks weird and it is. At least the BayCom USCC doesn't
693 * use the Interrupt Daisy Chain, thus we'll have to start
694 * all over again to be sure not to miss an interrupt from
695 * (any of) the other chip(s)...
696 * Honestly, the situation *is* braindamaged...
697 */
698
699 if (scc != NULL)
700 {
701 OutReg(scc->ctrl,R0,RES_H_IUS);
702 ctrl = SCC_ctrl;
703 } else
704 ctrl++;
705 }
706 }
707
708
709
710 /* ******************************************************************** */
711 /* * Init Channel */
712 /* ******************************************************************** */
713
714
715 /* ----> set SCC channel speed <---- */
716
717 static inline void set_brg(struct scc_channel *scc, unsigned int tc)
718 {
719 cl(scc,R14,BRENABL); /* disable baudrate generator */
720 wr(scc,R12,tc & 255); /* brg rate LOW */
721 wr(scc,R13,tc >> 8); /* brg rate HIGH */
722 or(scc,R14,BRENABL); /* enable baudrate generator */
723 }
724
725 static inline void set_speed(struct scc_channel *scc)
726 {
727 disable_irq(scc->irq);
728
729 if (scc->modem.speed > 0) /* paranoia... */
730 set_brg(scc, (unsigned) (scc->clock / (scc->modem.speed * 64)) - 2);
731
732 enable_irq(scc->irq);
733 }
734
735
736 /* ----> initialize a SCC channel <---- */
737
738 static inline void init_brg(struct scc_channel *scc)
739 {
740 wr(scc, R14, BRSRC); /* BRG source = PCLK */
741 OutReg(scc->ctrl, R14, SSBR|scc->wreg[R14]); /* DPLL source = BRG */
742 OutReg(scc->ctrl, R14, SNRZI|scc->wreg[R14]); /* DPLL NRZI mode */
743 }
744
745 /*
746 * Initialization according to the Z8530 manual (SGS-Thomson's version):
747 *
748 * 1. Modes and constants
749 *
750 * WR9 11000000 chip reset
751 * WR4 XXXXXXXX Tx/Rx control, async or sync mode
752 * WR1 0XX00X00 select W/REQ (optional)
753 * WR2 XXXXXXXX program interrupt vector
754 * WR3 XXXXXXX0 select Rx control
755 * WR5 XXXX0XXX select Tx control
756 * WR6 XXXXXXXX sync character
757 * WR7 XXXXXXXX sync character
758 * WR9 000X0XXX select interrupt control
759 * WR10 XXXXXXXX miscellaneous control (optional)
760 * WR11 XXXXXXXX clock control
761 * WR12 XXXXXXXX time constant lower byte (optional)
762 * WR13 XXXXXXXX time constant upper byte (optional)
763 * WR14 XXXXXXX0 miscellaneous control
764 * WR14 XXXSSSSS commands (optional)
765 *
766 * 2. Enables
767 *
768 * WR14 000SSSS1 baud rate enable
769 * WR3 SSSSSSS1 Rx enable
770 * WR5 SSSS1SSS Tx enable
771 * WR0 10000000 reset Tx CRG (optional)
772 * WR1 XSS00S00 DMA enable (optional)
773 *
774 * 3. Interrupt status
775 *
776 * WR15 XXXXXXXX enable external/status
777 * WR0 00010000 reset external status
778 * WR0 00010000 reset external status twice
779 * WR1 SSSXXSXX enable Rx, Tx and Ext/status
780 * WR9 000SXSSS enable master interrupt enable
781 *
782 * 1 = set to one, 0 = reset to zero
783 * X = user defined, S = same as previous init
784 *
785 *
786 * Note that the implementation differs in some points from above scheme.
787 *
788 */
789
790 static void init_channel(struct scc_channel *scc)
791 {
792 del_timer(&scc->tx_t);
793 del_timer(&scc->tx_wdog);
794
795 disable_irq(scc->irq);
796
797 wr(scc,R4,X1CLK|SDLC); /* *1 clock, SDLC mode */
798 wr(scc,R1,0); /* no W/REQ operation */
799 wr(scc,R3,Rx8|RxCRC_ENAB); /* RX 8 bits/char, CRC, disabled */
800 wr(scc,R5,Tx8|DTR|TxCRC_ENAB); /* TX 8 bits/char, disabled, DTR */
801 wr(scc,R6,0); /* SDLC address zero (not used) */
802 wr(scc,R7,FLAG); /* SDLC flag value */
803 wr(scc,R9,VIS); /* vector includes status */
804 wr(scc,R10,(scc->modem.nrz? NRZ : NRZI)|CRCPS|ABUNDER); /* abort on underrun, preset CRC generator, NRZ(I) */
805 wr(scc,R14, 0);
806
807
808 /* set clock sources:
809
810 CLK_DPLL: normal halfduplex operation
811
812 RxClk: use DPLL
813 TxClk: use DPLL
814 TRxC mode DPLL output
815
816 CLK_EXTERNAL: external clocking (G3RUH or DF9IC modem)
817
818 BayCom: others:
819
820 TxClk = pin RTxC TxClk = pin TRxC
821 RxClk = pin TRxC RxClk = pin RTxC
822
823
824 CLK_DIVIDER:
825 RxClk = use DPLL
826 TxClk = pin RTxC
827
828 BayCom: others:
829 pin TRxC = DPLL pin TRxC = BRG
830 (RxClk * 1) (RxClk * 32)
831 */
832
833
834 switch(scc->modem.clocksrc)
835 {
836 case CLK_DPLL:
837 wr(scc, R11, RCDPLL|TCDPLL|TRxCOI|TRxCDP);
838 init_brg(scc);
839 break;
840
841 case CLK_DIVIDER:
842 wr(scc, R11, ((scc->brand & BAYCOM)? TRxCDP : TRxCBR) | RCDPLL|TCRTxCP|TRxCOI);
843 init_brg(scc);
844 break;
845
846 case CLK_EXTERNAL:
847 wr(scc, R11, (scc->brand & BAYCOM)? RCTRxCP|TCRTxCP : RCRTxCP|TCTRxCP);
848 OutReg(scc->ctrl, R14, DISDPLL);
849 break;
850
851 }
852
853 set_speed(scc); /* set baudrate */
854
855 if(scc->enhanced)
856 {
857 or(scc,R15,SHDLCE|FIFOE); /* enable FIFO, SDLC/HDLC Enhancements (From now R7 is R7') */
858 wr(scc,R7,AUTOEOM);
859 }
860
861 if(scc->kiss.softdcd || (InReg(scc->ctrl,R0) & DCD))
862 /* DCD is now ON */
863 {
864 start_hunt(scc);
865 }
866
867 /* enable ABORT, DCD & SYNC/HUNT interrupts */
868
869 wr(scc,R15, BRKIE|TxUIE|(scc->kiss.softdcd? SYNCIE:DCDIE));
870
871 Outb(scc->ctrl,RES_EXT_INT); /* reset ext/status interrupts */
872 Outb(scc->ctrl,RES_EXT_INT); /* must be done twice */
873
874 or(scc,R1,INT_ALL_Rx|TxINT_ENAB|EXT_INT_ENAB); /* enable interrupts */
875
876 scc->status = InReg(scc->ctrl,R0); /* read initial status */
877
878 or(scc,R9,MIE); /* master interrupt enable */
879
880 scc_init_timer(scc);
881
882 enable_irq(scc->irq);
883 }
884
885
886
887
888 /* ******************************************************************** */
889 /* * SCC timer functions * */
890 /* ******************************************************************** */
891
892
893 /* ----> scc_key_trx sets the time constant for the baudrate
894 generator and keys the transmitter <---- */
895
896 static void scc_key_trx(struct scc_channel *scc, char tx)
897 {
898 unsigned int time_const;
899
900 if (scc->brand & PRIMUS)
901 Outb(scc->ctrl + 4, scc->option | (tx? 0x80 : 0));
902
903 if (scc->modem.speed < 300)
904 scc->modem.speed = 1200;
905
906 time_const = (unsigned) (scc->clock / (scc->modem.speed * (tx? 2:64))) - 2;
907
908 disable_irq(scc->irq);
909
910 if (tx)
911 {
912 or(scc, R1, TxINT_ENAB); /* t_maxkeyup may have reset these */
913 or(scc, R15, TxUIE);
914 }
915
916 if (scc->modem.clocksrc == CLK_DPLL)
917 { /* force simplex operation */
918 if (tx)
919 {
920 #ifdef CONFIG_SCC_TRXECHO
921 cl(scc, R3, RxENABLE|ENT_HM); /* switch off receiver */
922 cl(scc, R15, DCDIE|SYNCIE); /* No DCD changes, please */
923 #endif
924 set_brg(scc, time_const); /* reprogram baudrate generator */
925
926 /* DPLL -> Rx clk, BRG -> Tx CLK, TRxC mode output, TRxC = BRG */
927 wr(scc, R11, RCDPLL|TCBR|TRxCOI|TRxCBR);
928
929 /* By popular demand: tx_inhibit */
930 if (scc->kiss.tx_inhibit)
931 {
932 or(scc,R5, TxENAB);
933 scc->wreg[R5] |= RTS;
934 } else {
935 or(scc,R5,RTS|TxENAB); /* set the RTS line and enable TX */
936 }
937 } else {
938 cl(scc,R5,RTS|TxENAB);
939
940 set_brg(scc, time_const); /* reprogram baudrate generator */
941
942 /* DPLL -> Rx clk, DPLL -> Tx CLK, TRxC mode output, TRxC = DPLL */
943 wr(scc, R11, RCDPLL|TCDPLL|TRxCOI|TRxCDP);
944
945 #ifndef CONFIG_SCC_TRXECHO
946 if (scc->kiss.softdcd)
947 #endif
948 {
949 or(scc,R15, scc->kiss.softdcd? SYNCIE:DCDIE);
950 start_hunt(scc);
951 }
952 }
953 } else {
954 if (tx)
955 {
956 #ifdef CONFIG_SCC_TRXECHO
957 if (scc->kiss.fulldup == KISS_DUPLEX_HALF)
958 {
959 cl(scc, R3, RxENABLE);
960 cl(scc, R15, DCDIE|SYNCIE);
961 }
962 #endif
963
964 if (scc->kiss.tx_inhibit)
965 {
966 or(scc,R5, TxENAB);
967 scc->wreg[R5] |= RTS;
968 } else {
969 or(scc,R5,RTS|TxENAB); /* enable tx */
970 }
971 } else {
972 cl(scc,R5,RTS|TxENAB); /* disable tx */
973
974 if ((scc->kiss.fulldup == KISS_DUPLEX_HALF) &&
975 #ifndef CONFIG_SCC_TRXECHO
976 scc->kiss.softdcd)
977 #else
978 1)
979 #endif
980 {
981 or(scc, R15, scc->kiss.softdcd? SYNCIE:DCDIE);
982 start_hunt(scc);
983 }
984 }
985 }
986
987 enable_irq(scc->irq);
988 }
989
990
991 /* ----> SCC timer interrupt handler and friends. <---- */
992
993 static void scc_start_tx_timer(struct scc_channel *scc, void (*handler)(unsigned long), unsigned long when)
994 {
995 unsigned long flags;
996
997
998 save_flags(flags);
999 cli();
1000
1001 del_timer(&scc->tx_t);
1002
1003 if (when == 0)
1004 {
1005 handler((unsigned long) scc);
1006 } else
1007 if (when != TIMER_OFF)
1008 {
1009 scc->tx_t.data = (unsigned long) scc;
1010 scc->tx_t.function = handler;
1011 scc->tx_t.expires = jiffies + (when*HZ)/100;
1012 add_timer(&scc->tx_t);
1013 }
1014
1015 restore_flags(flags);
1016 }
1017
1018 static void scc_start_defer(struct scc_channel *scc)
1019 {
1020 unsigned long flags;
1021
1022 save_flags(flags);
1023 cli();
1024
1025 del_timer(&scc->tx_wdog);
1026
1027 if (scc->kiss.maxdefer != 0 && scc->kiss.maxdefer != TIMER_OFF)
1028 {
1029 scc->tx_wdog.data = (unsigned long) scc;
1030 scc->tx_wdog.function = t_busy;
1031 scc->tx_wdog.expires = jiffies + HZ*scc->kiss.maxdefer;
1032 add_timer(&scc->tx_wdog);
1033 }
1034 restore_flags(flags);
1035 }
1036
1037 static void scc_start_maxkeyup(struct scc_channel *scc)
1038 {
1039 unsigned long flags;
1040
1041 save_flags(flags);
1042 cli();
1043
1044 del_timer(&scc->tx_wdog);
1045
1046 if (scc->kiss.maxkeyup != 0 && scc->kiss.maxkeyup != TIMER_OFF)
1047 {
1048 scc->tx_wdog.data = (unsigned long) scc;
1049 scc->tx_wdog.function = t_maxkeyup;
1050 scc->tx_wdog.expires = jiffies + HZ*scc->kiss.maxkeyup;
1051 add_timer(&scc->tx_wdog);
1052 }
1053
1054 restore_flags(flags);
1055 }
1056
1057 /*
1058 * This is called from scc_txint() when there are no more frames to send.
1059 * Not exactly a timer function, but it is a close friend of the family...
1060 */
1061
1062 static void scc_tx_done(struct scc_channel *scc)
1063 {
1064 /*
1065 * trx remains keyed in fulldup mode 2 until t_idle expires.
1066 */
1067
1068 switch (scc->kiss.fulldup)
1069 {
1070 case KISS_DUPLEX_LINK:
1071 scc->stat.tx_state = TXS_IDLE2;
1072 if (scc->kiss.idletime != TIMER_OFF)
1073 scc_start_tx_timer(scc, t_idle, scc->kiss.idletime*100);
1074 break;
1075 case KISS_DUPLEX_OPTIMA:
1076 scc_notify(scc, HWEV_ALL_SENT);
1077 break;
1078 default:
1079 scc->stat.tx_state = TXS_BUSY;
1080 scc_start_tx_timer(scc, t_tail, scc->kiss.tailtime);
1081 }
1082
1083 netif_wake_queue(scc->dev);
1084 }
1085
1086
1087 static unsigned char Rand = 17;
1088
1089 static inline int is_grouped(struct scc_channel *scc)
1090 {
1091 int k;
1092 struct scc_channel *scc2;
1093 unsigned char grp1, grp2;
1094
1095 grp1 = scc->kiss.group;
1096
1097 for (k = 0; k < (Nchips * 2); k++)
1098 {
1099 scc2 = &SCC_Info[k];
1100 grp2 = scc2->kiss.group;
1101
1102 if (scc2 == scc || !(scc2->dev && grp2))
1103 continue;
1104
1105 if ((grp1 & 0x3f) == (grp2 & 0x3f))
1106 {
1107 if ( (grp1 & TXGROUP) && (scc2->wreg[R5] & RTS) )
1108 return 1;
1109
1110 if ( (grp1 & RXGROUP) && scc2->dcd )
1111 return 1;
1112 }
1113 }
1114 return 0;
1115 }
1116
1117 /* DWAIT and SLOTTIME expired
1118 *
1119 * fulldup == 0: DCD is active or Rand > P-persistence: start t_busy timer
1120 * else key trx and start txdelay
1121 * fulldup == 1: key trx and start txdelay
1122 * fulldup == 2: mintime expired, reset status or key trx and start txdelay
1123 */
1124
1125 static void t_dwait(unsigned long channel)
1126 {
1127 struct scc_channel *scc = (struct scc_channel *) channel;
1128
1129 if (scc->stat.tx_state == TXS_WAIT) /* maxkeyup or idle timeout */
1130 {
1131 if (skb_queue_len(&scc->tx_queue) == 0) /* nothing to send */
1132 {
1133 scc->stat.tx_state = TXS_IDLE;
1134 netif_wake_queue(scc->dev); /* t_maxkeyup locked it. */
1135 return;
1136 }
1137
1138 scc->stat.tx_state = TXS_BUSY;
1139 }
1140
1141 if (scc->kiss.fulldup == KISS_DUPLEX_HALF)
1142 {
1143 Rand = Rand * 17 + 31;
1144
1145 if (scc->dcd || (scc->kiss.persist) < Rand || (scc->kiss.group && is_grouped(scc)) )
1146 {
1147 scc_start_defer(scc);
1148 scc_start_tx_timer(scc, t_dwait, scc->kiss.slottime);
1149 return ;
1150 }
1151 }
1152
1153 if ( !(scc->wreg[R5] & RTS) )
1154 {
1155 scc_key_trx(scc, TX_ON);
1156 scc_start_tx_timer(scc, t_txdelay, scc->kiss.txdelay);
1157 } else {
1158 scc_start_tx_timer(scc, t_txdelay, 0);
1159 }
1160 }
1161
1162
1163 /* TXDELAY expired
1164 *
1165 * kick transmission by a fake scc_txint(scc), start 'maxkeyup' watchdog.
1166 */
1167
1168 static void t_txdelay(unsigned long channel)
1169 {
1170 struct scc_channel *scc = (struct scc_channel *) channel;
1171
1172 scc_start_maxkeyup(scc);
1173
1174 if (scc->tx_buff == NULL)
1175 {
1176 disable_irq(scc->irq);
1177 scc_txint(scc);
1178 enable_irq(scc->irq);
1179 }
1180 }
1181
1182
1183 /* TAILTIME expired
1184 *
1185 * switch off transmitter. If we were stopped by Maxkeyup restart
1186 * transmission after 'mintime' seconds
1187 */
1188
1189 static void t_tail(unsigned long channel)
1190 {
1191 struct scc_channel *scc = (struct scc_channel *) channel;
1192 unsigned long flags;
1193
1194 save_flags(flags);
1195 cli();
1196
1197 del_timer(&scc->tx_wdog);
1198 scc_key_trx(scc, TX_OFF);
1199
1200 restore_flags(flags);
1201
1202 if (scc->stat.tx_state == TXS_TIMEOUT) /* we had a timeout? */
1203 {
1204 scc->stat.tx_state = TXS_WAIT;
1205
1206 if (scc->kiss.mintime != TIMER_OFF) /* try it again */
1207 scc_start_tx_timer(scc, t_dwait, scc->kiss.mintime*100);
1208 else
1209 scc_start_tx_timer(scc, t_dwait, 0);
1210 return;
1211 }
1212
1213 scc->stat.tx_state = TXS_IDLE;
1214 netif_wake_queue(scc->dev);
1215 }
1216
1217
1218 /* BUSY timeout
1219 *
1220 * throw away send buffers if DCD remains active too long.
1221 */
1222
1223 static void t_busy(unsigned long channel)
1224 {
1225 struct scc_channel *scc = (struct scc_channel *) channel;
1226
1227 del_timer(&scc->tx_t);
1228 netif_stop_queue(scc->dev); /* don't pile on the wabbit! */
1229
1230 scc_discard_buffers(scc);
1231 scc->stat.txerrs++;
1232 scc->stat.tx_state = TXS_IDLE;
1233
1234 netif_wake_queue(scc->dev);
1235 }
1236
1237 /* MAXKEYUP timeout
1238 *
1239 * this is our watchdog.
1240 */
1241
1242 static void t_maxkeyup(unsigned long channel)
1243 {
1244 struct scc_channel *scc = (struct scc_channel *) channel;
1245 unsigned long flags;
1246
1247 save_flags(flags);
1248 cli();
1249
1250 /*
1251 * let things settle down before we start to
1252 * accept new data.
1253 */
1254
1255 netif_stop_queue(scc->dev);
1256 scc_discard_buffers(scc);
1257
1258 del_timer(&scc->tx_t);
1259
1260 cl(scc, R1, TxINT_ENAB); /* force an ABORT, but don't */
1261 cl(scc, R15, TxUIE); /* count it. */
1262 OutReg(scc->ctrl, R0, RES_Tx_P);
1263
1264 restore_flags(flags);
1265
1266 scc->stat.txerrs++;
1267 scc->stat.tx_state = TXS_TIMEOUT;
1268 scc_start_tx_timer(scc, t_tail, scc->kiss.tailtime);
1269 }
1270
1271 /* IDLE timeout
1272 *
1273 * in fulldup mode 2 it keys down the transmitter after 'idle' seconds
1274 * of inactivity. We will not restart transmission before 'mintime'
1275 * expires.
1276 */
1277
1278 static void t_idle(unsigned long channel)
1279 {
1280 struct scc_channel *scc = (struct scc_channel *) channel;
1281
1282 del_timer(&scc->tx_wdog);
1283
1284 scc_key_trx(scc, TX_OFF);
1285
1286 if (scc->kiss.mintime != TIMER_OFF)
1287 scc_start_tx_timer(scc, t_dwait, scc->kiss.mintime*100);
1288 scc->stat.tx_state = TXS_WAIT;
1289 }
1290
1291 static void scc_init_timer(struct scc_channel *scc)
1292 {
1293 unsigned long flags;
1294
1295 save_flags(flags);
1296 cli();
1297
1298 scc->stat.tx_state = TXS_IDLE;
1299
1300 restore_flags(flags);
1301 }
1302
1303
1304 /* ******************************************************************** */
1305 /* * Set/get L1 parameters * */
1306 /* ******************************************************************** */
1307
1308
1309 /*
1310 * this will set the "hardware" parameters through KISS commands or ioctl()
1311 */
1312
1313 #define CAST(x) (unsigned long)(x)
1314
1315 static unsigned int scc_set_param(struct scc_channel *scc, unsigned int cmd, unsigned int arg)
1316 {
1317 switch (cmd)
1318 {
1319 case PARAM_TXDELAY: scc->kiss.txdelay=arg; break;
1320 case PARAM_PERSIST: scc->kiss.persist=arg; break;
1321 case PARAM_SLOTTIME: scc->kiss.slottime=arg; break;
1322 case PARAM_TXTAIL: scc->kiss.tailtime=arg; break;
1323 case PARAM_FULLDUP: scc->kiss.fulldup=arg; break;
1324 case PARAM_DTR: break; /* does someone need this? */
1325 case PARAM_GROUP: scc->kiss.group=arg; break;
1326 case PARAM_IDLE: scc->kiss.idletime=arg; break;
1327 case PARAM_MIN: scc->kiss.mintime=arg; break;
1328 case PARAM_MAXKEY: scc->kiss.maxkeyup=arg; break;
1329 case PARAM_WAIT: scc->kiss.waittime=arg; break;
1330 case PARAM_MAXDEFER: scc->kiss.maxdefer=arg; break;
1331 case PARAM_TX: scc->kiss.tx_inhibit=arg; break;
1332
1333 case PARAM_SOFTDCD:
1334 scc->kiss.softdcd=arg;
1335 if (arg)
1336 {
1337 or(scc, R15, SYNCIE);
1338 cl(scc, R15, DCDIE);
1339 start_hunt(scc);
1340 } else {
1341 or(scc, R15, DCDIE);
1342 cl(scc, R15, SYNCIE);
1343 }
1344 break;
1345
1346 case PARAM_SPEED:
1347 if (arg < 256)
1348 scc->modem.speed=arg*100;
1349 else
1350 scc->modem.speed=arg;
1351
1352 if (scc->stat.tx_state == 0) /* only switch baudrate on rx... ;-) */
1353 set_speed(scc);
1354 break;
1355
1356 case PARAM_RTS:
1357 if ( !(scc->wreg[R5] & RTS) )
1358 {
1359 if (arg != TX_OFF)
1360 scc_key_trx(scc, TX_ON);
1361 scc_start_tx_timer(scc, t_txdelay, scc->kiss.txdelay);
1362 } else {
1363 if (arg == TX_OFF)
1364 {
1365 scc->stat.tx_state = TXS_BUSY;
1366 scc_start_tx_timer(scc, t_tail, scc->kiss.tailtime);
1367 }
1368 }
1369 break;
1370
1371 case PARAM_HWEVENT:
1372 scc_notify(scc, scc->dcd? HWEV_DCD_ON:HWEV_DCD_OFF);
1373 break;
1374
1375 default: return -EINVAL;
1376 }
1377
1378 return 0;
1379 }
1380
1381
1382
1383 static unsigned long scc_get_param(struct scc_channel *scc, unsigned int cmd)
1384 {
1385 switch (cmd)
1386 {
1387 case PARAM_TXDELAY: return CAST(scc->kiss.txdelay);
1388 case PARAM_PERSIST: return CAST(scc->kiss.persist);
1389 case PARAM_SLOTTIME: return CAST(scc->kiss.slottime);
1390 case PARAM_TXTAIL: return CAST(scc->kiss.tailtime);
1391 case PARAM_FULLDUP: return CAST(scc->kiss.fulldup);
1392 case PARAM_SOFTDCD: return CAST(scc->kiss.softdcd);
1393 case PARAM_DTR: return CAST((scc->wreg[R5] & DTR)? 1:0);
1394 case PARAM_RTS: return CAST((scc->wreg[R5] & RTS)? 1:0);
1395 case PARAM_SPEED: return CAST(scc->modem.speed);
1396 case PARAM_GROUP: return CAST(scc->kiss.group);
1397 case PARAM_IDLE: return CAST(scc->kiss.idletime);
1398 case PARAM_MIN: return CAST(scc->kiss.mintime);
1399 case PARAM_MAXKEY: return CAST(scc->kiss.maxkeyup);
1400 case PARAM_WAIT: return CAST(scc->kiss.waittime);
1401 case PARAM_MAXDEFER: return CAST(scc->kiss.maxdefer);
1402 case PARAM_TX: return CAST(scc->kiss.tx_inhibit);
1403 default: return NO_SUCH_PARAM;
1404 }
1405
1406 }
1407
1408 #undef CAST
1409
1410 /* ******************************************************************* */
1411 /* * Send calibration pattern * */
1412 /* ******************************************************************* */
1413
1414 static void scc_stop_calibrate(unsigned long channel)
1415 {
1416 struct scc_channel *scc = (struct scc_channel *) channel;
1417 unsigned long flags;
1418
1419 save_flags(flags);
1420 cli();
1421
1422 del_timer(&scc->tx_wdog);
1423 scc_key_trx(scc, TX_OFF);
1424 wr(scc, R6, 0);
1425 wr(scc, R7, FLAG);
1426 Outb(scc->ctrl,RES_EXT_INT); /* reset ext/status interrupts */
1427 Outb(scc->ctrl,RES_EXT_INT);
1428
1429 netif_wake_queue(scc->dev);
1430 restore_flags(flags);
1431 }
1432
1433
1434 static void
1435 scc_start_calibrate(struct scc_channel *scc, int duration, unsigned char pattern)
1436 {
1437 unsigned long flags;
1438
1439 save_flags(flags);
1440 cli();
1441
1442 netif_stop_queue(scc->dev);
1443 scc_discard_buffers(scc);
1444
1445 del_timer(&scc->tx_wdog);
1446
1447 scc->tx_wdog.data = (unsigned long) scc;
1448 scc->tx_wdog.function = scc_stop_calibrate;
1449 scc->tx_wdog.expires = jiffies + HZ*duration;
1450 add_timer(&scc->tx_wdog);
1451
1452 /* This doesn't seem to work. Why not? */
1453 wr(scc, R6, 0);
1454 wr(scc, R7, pattern);
1455
1456 /*
1457 * Don't know if this works.
1458 * Damn, where is my Z8530 programming manual...?
1459 */
1460
1461 Outb(scc->ctrl,RES_EXT_INT); /* reset ext/status interrupts */
1462 Outb(scc->ctrl,RES_EXT_INT);
1463
1464 scc_key_trx(scc, TX_ON);
1465 restore_flags(flags);
1466 }
1467
1468 /* ******************************************************************* */
1469 /* * Init channel structures, special HW, etc... * */
1470 /* ******************************************************************* */
1471
1472 /*
1473 * Reset the Z8530s and setup special hardware
1474 */
1475
1476 static void z8530_init(void)
1477 {
1478 struct scc_channel *scc;
1479 int chip, k;
1480 unsigned long flags;
1481 char *flag;
1482
1483
1484 printk(KERN_INFO "Init Z8530 driver: %u channels, IRQ", Nchips*2);
1485
1486 flag=" ";
1487 for (k = 0; k < NR_IRQS; k++)
1488 if (Ivec[k].used)
1489 {
1490 printk("%s%d", flag, k);
1491 flag=",";
1492 }
1493 printk("\n");
1494
1495
1496 /* reset and pre-init all chips in the system */
1497 for (chip = 0; chip < Nchips; chip++)
1498 {
1499 scc=&SCC_Info[2*chip];
1500 if (!scc->ctrl) continue;
1501
1502 /* Special SCC cards */
1503
1504 if(scc->brand & EAGLE) /* this is an EAGLE card */
1505 Outb(scc->special,0x08); /* enable interrupt on the board */
1506
1507 if(scc->brand & (PC100 | PRIMUS)) /* this is a PC100/PRIMUS card */
1508 Outb(scc->special,scc->option); /* set the MODEM mode (0x22) */
1509
1510
1511 /* Reset and pre-init Z8530 */
1512
1513 save_flags(flags);
1514 cli();
1515
1516 Outb(scc->ctrl, 0);
1517 OutReg(scc->ctrl,R9,FHWRES); /* force hardware reset */
1518 udelay(100); /* give it 'a bit' more time than required */
1519 wr(scc, R2, chip*16); /* interrupt vector */
1520 wr(scc, R9, VIS); /* vector includes status */
1521
1522 restore_flags(flags);
1523 }
1524
1525
1526 Driver_Initialized = 1;
1527 }
1528
1529 /*
1530 * Allocate device structure, err, instance, and register driver
1531 */
1532
1533 static int scc_net_setup(struct scc_channel *scc, unsigned char *name, int addev)
1534 {
1535 struct net_device *dev;
1536
1537 if (dev_get(name))
1538 {
1539 printk(KERN_INFO "Z8530drv: device %s already exists.\n", name);
1540 return -EEXIST;
1541 }
1542
1543 if ((scc->dev = (struct net_device *) kmalloc(sizeof(struct net_device), GFP_KERNEL)) == NULL)
1544 return -ENOMEM;
1545
1546 dev = scc->dev;
1547 memset(dev, 0, sizeof(struct net_device));
1548
1549 strcpy(dev->name, name);
1550 dev->priv = (void *) scc;
1551 dev->init = scc_net_init;
1552
1553 if ((addev? register_netdevice(dev) : register_netdev(dev)) != 0) {
1554 kfree(dev);
1555 return -EIO;
1556 }
1557
1558 SET_MODULE_OWNER(dev);
1559 return 0;
1560 }
1561
1562
1563
1564 /* ******************************************************************** */
1565 /* * Network driver methods * */
1566 /* ******************************************************************** */
1567
1568 static unsigned char ax25_bcast[AX25_ADDR_LEN] =
1569 {'Q' << 1, 'S' << 1, 'T' << 1, ' ' << 1, ' ' << 1, ' ' << 1, '0' << 1};
1570 static unsigned char ax25_nocall[AX25_ADDR_LEN] =
1571 {'L' << 1, 'I' << 1, 'N' << 1, 'U' << 1, 'X' << 1, ' ' << 1, '1' << 1};
1572
1573 /* ----> Initialize device <----- */
1574
1575 static int scc_net_init(struct net_device *dev)
1576 {
1577 dev->tx_queue_len = 16; /* should be enough... */
1578
1579 dev->open = scc_net_open;
1580 dev->stop = scc_net_close;
1581
1582 dev->hard_start_xmit = scc_net_tx;
1583 dev->hard_header = ax25_encapsulate;
1584 dev->rebuild_header = ax25_rebuild_header;
1585 dev->set_mac_address = scc_net_set_mac_address;
1586 dev->get_stats = scc_net_get_stats;
1587 dev->do_ioctl = scc_net_ioctl;
1588 dev->tx_timeout = NULL;
1589
1590 memcpy(dev->broadcast, ax25_bcast, AX25_ADDR_LEN);
1591 memcpy(dev->dev_addr, ax25_nocall, AX25_ADDR_LEN);
1592
1593 dev->flags = 0;
1594
1595 dev->type = ARPHRD_AX25;
1596 dev->hard_header_len = AX25_MAX_HEADER_LEN + AX25_BPQ_HEADER_LEN;
1597 dev->mtu = AX25_DEF_PACLEN;
1598 dev->addr_len = AX25_ADDR_LEN;
1599
1600 return 0;
1601 }
1602
1603 /* ----> open network device <---- */
1604
1605 static int scc_net_open(struct net_device *dev)
1606 {
1607 struct scc_channel *scc = (struct scc_channel *) dev->priv;
1608
1609 if (!scc->init)
1610 return -EINVAL;
1611
1612 scc->tx_buff = NULL;
1613 skb_queue_head_init(&scc->tx_queue);
1614
1615 init_channel(scc);
1616
1617 netif_start_queue(dev);
1618 return 0;
1619 }
1620
1621 /* ----> close network device <---- */
1622
1623 static int scc_net_close(struct net_device *dev)
1624 {
1625 struct scc_channel *scc = (struct scc_channel *) dev->priv;
1626 unsigned long flags;
1627
1628 netif_stop_queue(dev);
1629
1630 save_flags(flags);
1631 cli();
1632
1633 Outb(scc->ctrl,0); /* Make sure pointer is written */
1634 wr(scc,R1,0); /* disable interrupts */
1635 wr(scc,R3,0);
1636
1637 del_timer(&scc->tx_t);
1638 del_timer(&scc->tx_wdog);
1639
1640 restore_flags(flags);
1641
1642 scc_discard_buffers(scc);
1643
1644 return 0;
1645 }
1646
1647 /* ----> receive frame, called from scc_rxint() <---- */
1648
1649 static void scc_net_rx(struct scc_channel *scc, struct sk_buff *skb)
1650 {
1651 if (skb->len == 0) {
1652 dev_kfree_skb_irq(skb);
1653 return;
1654 }
1655
1656 scc->dev_stat.rx_packets++;
1657
1658 skb->dev = scc->dev;
1659 skb->protocol = htons(ETH_P_AX25);
1660 skb->mac.raw = skb->data;
1661 skb->pkt_type = PACKET_HOST;
1662
1663 netif_rx(skb);
1664 return;
1665 }
1666
1667 /* ----> transmit frame <---- */
1668
1669 static int scc_net_tx(struct sk_buff *skb, struct net_device *dev)
1670 {
1671 struct scc_channel *scc = (struct scc_channel *) dev->priv;
1672 unsigned long flags;
1673 char kisscmd;
1674
1675 if (skb->len > scc->stat.bufsize || skb->len < 2) {
1676 scc->dev_stat.tx_dropped++; /* bogus frame */
1677 dev_kfree_skb(skb);
1678 return 0;
1679 }
1680
1681 scc->dev_stat.tx_packets++;
1682 scc->stat.txframes++;
1683
1684 kisscmd = *skb->data & 0x1f;
1685 skb_pull(skb, 1);
1686
1687 if (kisscmd) {
1688 scc_set_param(scc, kisscmd, *skb->data);
1689 dev_kfree_skb(skb);
1690 return 0;
1691 }
1692
1693 save_flags(flags);
1694 cli();
1695
1696 if (skb_queue_len(&scc->tx_queue) > scc->dev->tx_queue_len) {
1697 struct sk_buff *skb_del;
1698 skb_del = skb_dequeue(&scc->tx_queue);
1699 dev_kfree_skb(skb_del);
1700 }
1701 skb_queue_tail(&scc->tx_queue, skb);
1702 dev->trans_start = jiffies;
1703
1704
1705 /*
1706 * Start transmission if the trx state is idle or
1707 * t_idle hasn't expired yet. Use dwait/persistance/slottime
1708 * algorithm for normal halfduplex operation.
1709 */
1710
1711 if(scc->stat.tx_state == TXS_IDLE || scc->stat.tx_state == TXS_IDLE2) {
1712 scc->stat.tx_state = TXS_BUSY;
1713 if (scc->kiss.fulldup == KISS_DUPLEX_HALF)
1714 scc_start_tx_timer(scc, t_dwait, scc->kiss.waittime);
1715 else
1716 scc_start_tx_timer(scc, t_dwait, 0);
1717 }
1718
1719 restore_flags(flags);
1720 return 0;
1721 }
1722
1723 /* ----> ioctl functions <---- */
1724
1725 /*
1726 * SIOCSCCCFG - configure driver arg: (struct scc_hw_config *) arg
1727 * SIOCSCCINI - initialize driver arg: ---
1728 * SIOCSCCCHANINI - initialize channel arg: (struct scc_modem *) arg
1729 * SIOCSCCSMEM - set memory arg: (struct scc_mem_config *) arg
1730 * SIOCSCCGKISS - get level 1 parameter arg: (struct scc_kiss_cmd *) arg
1731 * SIOCSCCSKISS - set level 1 parameter arg: (struct scc_kiss_cmd *) arg
1732 * SIOCSCCGSTAT - get driver status arg: (struct scc_stat *) arg
1733 * SIOCSCCCAL - send calib. pattern arg: (struct scc_calibrate *) arg
1734 */
1735
1736 static int scc_net_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1737 {
1738 struct scc_kiss_cmd kiss_cmd;
1739 struct scc_mem_config memcfg;
1740 struct scc_hw_config hwcfg;
1741 struct scc_calibrate cal;
1742 int chan;
1743 unsigned char device_name[10];
1744 void *arg;
1745 struct scc_channel *scc;
1746
1747 scc = (struct scc_channel *) dev->priv;
1748 arg = (void *) ifr->ifr_data;
1749
1750 if (!Driver_Initialized)
1751 {
1752 if (cmd == SIOCSCCCFG)
1753 {
1754 int found = 1;
1755
1756 if (!capable(CAP_SYS_RAWIO)) return -EPERM;
1757 if (!arg) return -EFAULT;
1758
1759 if (Nchips >= SCC_MAXCHIPS)
1760 return -EINVAL;
1761
1762 if (copy_from_user(&hwcfg, arg, sizeof(hwcfg)))
1763 return -EFAULT;
1764
1765 if (hwcfg.irq == 2) hwcfg.irq = 9;
1766
1767 if (hwcfg.irq <0 || hwcfg.irq > NR_IRQS)
1768 return -EINVAL;
1769
1770 if (!Ivec[hwcfg.irq].used && hwcfg.irq)
1771 {
1772 if (request_irq(hwcfg.irq, scc_isr, SA_INTERRUPT, "AX.25 SCC", NULL))
1773 printk(KERN_WARNING "z8530drv: warning, cannot get IRQ %d\n", hwcfg.irq);
1774 else
1775 Ivec[hwcfg.irq].used = 1;
1776 }
1777
1778 if (hwcfg.vector_latch && !Vector_Latch) {
1779 if (!request_region(hwcfg.vector_latch, 1, "scc vector latch"))
1780 printk(KERN_WARNING "z8530drv: warning, cannot reserve vector latch port 0x%lx\n, disabled.", hwcfg.vector_latch);
1781 else
1782 Vector_Latch = hwcfg.vector_latch;
1783 }
1784
1785 if (hwcfg.clock == 0)
1786 hwcfg.clock = SCC_DEFAULT_CLOCK;
1787
1788 #ifndef SCC_DONT_CHECK
1789 disable_irq(hwcfg.irq);
1790
1791 check_region(scc->ctrl, 1);
1792 Outb(hwcfg.ctrl_a, 0);
1793 OutReg(hwcfg.ctrl_a, R9, FHWRES);
1794 udelay(100);
1795 OutReg(hwcfg.ctrl_a,R13,0x55); /* is this chip really there? */
1796 udelay(5);
1797
1798 if (InReg(hwcfg.ctrl_a,R13) != 0x55)
1799 found = 0;
1800
1801 enable_irq(hwcfg.irq);
1802 #endif
1803
1804 if (found)
1805 {
1806 SCC_Info[2*Nchips ].ctrl = hwcfg.ctrl_a;
1807 SCC_Info[2*Nchips ].data = hwcfg.data_a;
1808 SCC_Info[2*Nchips ].irq = hwcfg.irq;
1809 SCC_Info[2*Nchips+1].ctrl = hwcfg.ctrl_b;
1810 SCC_Info[2*Nchips+1].data = hwcfg.data_b;
1811 SCC_Info[2*Nchips+1].irq = hwcfg.irq;
1812
1813 SCC_ctrl[Nchips].chan_A = hwcfg.ctrl_a;
1814 SCC_ctrl[Nchips].chan_B = hwcfg.ctrl_b;
1815 SCC_ctrl[Nchips].irq = hwcfg.irq;
1816 }
1817
1818
1819 for (chan = 0; chan < 2; chan++)
1820 {
1821 sprintf(device_name, "%s%i", SCC_DriverName, 2*Nchips+chan);
1822
1823 SCC_Info[2*Nchips+chan].special = hwcfg.special;
1824 SCC_Info[2*Nchips+chan].clock = hwcfg.clock;
1825 SCC_Info[2*Nchips+chan].brand = hwcfg.brand;
1826 SCC_Info[2*Nchips+chan].option = hwcfg.option;
1827 SCC_Info[2*Nchips+chan].enhanced = hwcfg.escc;
1828
1829 #ifdef SCC_DONT_CHECK
1830 printk(KERN_INFO "%s: data port = 0x%3.3x control port = 0x%3.3x\n",
1831 device_name,
1832 SCC_Info[2*Nchips+chan].data,
1833 SCC_Info[2*Nchips+chan].ctrl);
1834
1835 #else
1836 printk(KERN_INFO "%s: data port = 0x%3.3lx control port = 0x%3.3lx -- %s\n",
1837 device_name,
1838 chan? hwcfg.data_b : hwcfg.data_a,
1839 chan? hwcfg.ctrl_b : hwcfg.ctrl_a,
1840 found? "found" : "missing");
1841 #endif
1842
1843 if (found)
1844 {
1845 request_region(SCC_Info[2*Nchips+chan].ctrl, 1, "scc ctrl");
1846 request_region(SCC_Info[2*Nchips+chan].data, 1, "scc data");
1847 if (Nchips+chan != 0)
1848 scc_net_setup(&SCC_Info[2*Nchips+chan], device_name, 1);
1849 }
1850 }
1851
1852 if (found) Nchips++;
1853
1854 return 0;
1855 }
1856
1857 if (cmd == SIOCSCCINI)
1858 {
1859 if (!capable(CAP_SYS_RAWIO))
1860 return -EPERM;
1861
1862 if (Nchips == 0)
1863 return -EINVAL;
1864
1865 z8530_init();
1866 return 0;
1867 }
1868
1869 return -EINVAL; /* confuse the user */
1870 }
1871
1872 if (!scc->init)
1873 {
1874 if (cmd == SIOCSCCCHANINI)
1875 {
1876 if (!capable(CAP_NET_ADMIN)) return -EPERM;
1877 if (!arg) return -EINVAL;
1878
1879 scc->stat.bufsize = SCC_BUFSIZE;
1880
1881 if (copy_from_user(&scc->modem, arg, sizeof(struct scc_modem)))
1882 return -EINVAL;
1883
1884 /* default KISS Params */
1885
1886 if (scc->modem.speed < 4800)
1887 {
1888 scc->kiss.txdelay = 36; /* 360 ms */
1889 scc->kiss.persist = 42; /* 25% persistence */ /* was 25 */
1890 scc->kiss.slottime = 16; /* 160 ms */
1891 scc->kiss.tailtime = 4; /* minimal reasonable value */
1892 scc->kiss.fulldup = 0; /* CSMA */
1893 scc->kiss.waittime = 50; /* 500 ms */
1894 scc->kiss.maxkeyup = 10; /* 10 s */
1895 scc->kiss.mintime = 3; /* 3 s */
1896 scc->kiss.idletime = 30; /* 30 s */
1897 scc->kiss.maxdefer = 120; /* 2 min */
1898 scc->kiss.softdcd = 0; /* hardware dcd */
1899 } else {
1900 scc->kiss.txdelay = 10; /* 100 ms */
1901 scc->kiss.persist = 64; /* 25% persistence */ /* was 25 */
1902 scc->kiss.slottime = 8; /* 160 ms */
1903 scc->kiss.tailtime = 1; /* minimal reasonable value */
1904 scc->kiss.fulldup = 0; /* CSMA */
1905 scc->kiss.waittime = 50; /* 500 ms */
1906 scc->kiss.maxkeyup = 7; /* 7 s */
1907 scc->kiss.mintime = 3; /* 3 s */
1908 scc->kiss.idletime = 30; /* 30 s */
1909 scc->kiss.maxdefer = 120; /* 2 min */
1910 scc->kiss.softdcd = 0; /* hardware dcd */
1911 }
1912
1913 scc->tx_buff = NULL;
1914 skb_queue_head_init(&scc->tx_queue);
1915 scc->init = 1;
1916
1917 return 0;
1918 }
1919
1920 return -EINVAL;
1921 }
1922
1923 switch(cmd)
1924 {
1925 case SIOCSCCRESERVED:
1926 return -ENOIOCTLCMD;
1927
1928 case SIOCSCCSMEM:
1929 if (!capable(CAP_SYS_RAWIO)) return -EPERM;
1930 if (!arg || copy_from_user(&memcfg, arg, sizeof(memcfg)))
1931 return -EINVAL;
1932 scc->stat.bufsize = memcfg.bufsize;
1933 return 0;
1934
1935 case SIOCSCCGSTAT:
1936 if (!arg || copy_to_user(arg, &scc->stat, sizeof(scc->stat)))
1937 return -EINVAL;
1938 return 0;
1939
1940 case SIOCSCCGKISS:
1941 if (!arg || copy_from_user(&kiss_cmd, arg, sizeof(kiss_cmd)))
1942 return -EINVAL;
1943 kiss_cmd.param = scc_get_param(scc, kiss_cmd.command);
1944 if (copy_to_user(arg, &kiss_cmd, sizeof(kiss_cmd)))
1945 return -EINVAL;
1946 return 0;
1947
1948 case SIOCSCCSKISS:
1949 if (!capable(CAP_NET_ADMIN)) return -EPERM;
1950 if (!arg || copy_from_user(&kiss_cmd, arg, sizeof(kiss_cmd)))
1951 return -EINVAL;
1952 return scc_set_param(scc, kiss_cmd.command, kiss_cmd.param);
1953
1954 case SIOCSCCCAL:
1955 if (!capable(CAP_SYS_RAWIO)) return -EPERM;
1956 if (!arg || copy_from_user(&cal, arg, sizeof(cal)) || cal.time == 0)
1957 return -EINVAL;
1958
1959 scc_start_calibrate(scc, cal.time, cal.pattern);
1960 return 0;
1961
1962 default:
1963 return -ENOIOCTLCMD;
1964
1965 }
1966
1967 return -EINVAL;
1968 }
1969
1970 /* ----> set interface callsign <---- */
1971
1972 static int scc_net_set_mac_address(struct net_device *dev, void *addr)
1973 {
1974 struct sockaddr *sa = (struct sockaddr *) addr;
1975 memcpy(dev->dev_addr, sa->sa_data, dev->addr_len);
1976 return 0;
1977 }
1978
1979 /* ----> get statistics <---- */
1980
1981 static struct net_device_stats *scc_net_get_stats(struct net_device *dev)
1982 {
1983 struct scc_channel *scc = (struct scc_channel *) dev->priv;
1984
1985 scc->dev_stat.rx_errors = scc->stat.rxerrs + scc->stat.rx_over;
1986 scc->dev_stat.tx_errors = scc->stat.txerrs + scc->stat.tx_under;
1987 scc->dev_stat.rx_fifo_errors = scc->stat.rx_over;
1988 scc->dev_stat.tx_fifo_errors = scc->stat.tx_under;
1989
1990 return &scc->dev_stat;
1991 }
1992
1993 /* ******************************************************************** */
1994 /* * dump statistics to /proc/net/z8530drv * */
1995 /* ******************************************************************** */
1996
1997
1998 static int scc_net_get_info(char *buffer, char **start, off_t offset, int length)
1999 {
2000 struct scc_channel *scc;
2001 struct scc_kiss *kiss;
2002 struct scc_stat *stat;
2003 int len = 0;
2004 off_t pos = 0;
2005 off_t begin = 0;
2006 int k;
2007
2008 len += sprintf(buffer, "z8530drv-"VERSION"\n");
2009
2010 if (!Driver_Initialized)
2011 {
2012 len += sprintf(buffer+len, "not initialized\n");
2013 goto done;
2014 }
2015
2016 if (!Nchips)
2017 {
2018 len += sprintf(buffer+len, "chips missing\n");
2019 goto done;
2020 }
2021
2022 for (k = 0; k < Nchips*2; k++)
2023 {
2024 scc = &SCC_Info[k];
2025 stat = &scc->stat;
2026 kiss = &scc->kiss;
2027
2028 if (!scc->init)
2029 continue;
2030
2031 /* dev data ctrl irq clock brand enh vector special option
2032 * baud nrz clocksrc softdcd bufsize
2033 * rxints txints exints spints
2034 * rcvd rxerrs over / xmit txerrs under / nospace bufsize
2035 * txd pers slot tail ful wait min maxk idl defr txof grp
2036 * W ## ## ## ## ## ## ## ## ## ## ## ## ## ## ## ##
2037 * R ## ## XX ## ## ## ## ## XX ## ## ## ## ## ## ##
2038 */
2039
2040 len += sprintf(buffer+len, "%s\t%3.3lx %3.3lx %d %lu %2.2x %d %3.3lx %3.3lx %d\n",
2041 scc->dev->name,
2042 scc->data, scc->ctrl, scc->irq, scc->clock, scc->brand,
2043 scc->enhanced, Vector_Latch, scc->special,
2044 scc->option);
2045 len += sprintf(buffer+len, "\t%lu %d %d %d %d\n",
2046 scc->modem.speed, scc->modem.nrz,
2047 scc->modem.clocksrc, kiss->softdcd,
2048 stat->bufsize);
2049 len += sprintf(buffer+len, "\t%lu %lu %lu %lu\n",
2050 stat->rxints, stat->txints, stat->exints, stat->spints);
2051 len += sprintf(buffer+len, "\t%lu %lu %d / %lu %lu %d / %d %d\n",
2052 stat->rxframes, stat->rxerrs, stat->rx_over,
2053 stat->txframes, stat->txerrs, stat->tx_under,
2054 stat->nospace, stat->tx_state);
2055
2056 #define K(x) kiss->x
2057 len += sprintf(buffer+len, "\t%d %d %d %d %d %d %d %d %d %d %d %d\n",
2058 K(txdelay), K(persist), K(slottime), K(tailtime),
2059 K(fulldup), K(waittime), K(mintime), K(maxkeyup),
2060 K(idletime), K(maxdefer), K(tx_inhibit), K(group));
2061 #undef K
2062 #ifdef SCC_DEBUG
2063 {
2064 int reg;
2065
2066 len += sprintf(buffer+len, "\tW ");
2067 for (reg = 0; reg < 16; reg++)
2068 len += sprintf(buffer+len, "%2.2x ", scc->wreg[reg]);
2069 len += sprintf(buffer+len, "\n");
2070
2071 len += sprintf(buffer+len, "\tR %2.2x %2.2x XX ", InReg(scc->ctrl,R0), InReg(scc->ctrl,R1));
2072 for (reg = 3; reg < 8; reg++)
2073 len += sprintf(buffer+len, "%2.2x ", InReg(scc->ctrl, reg));
2074 len += sprintf(buffer+len, "XX ");
2075 for (reg = 9; reg < 16; reg++)
2076 len += sprintf(buffer+len, "%2.2x ", InReg(scc->ctrl, reg));
2077 len += sprintf(buffer+len, "\n");
2078 }
2079 #endif
2080 len += sprintf(buffer+len, "\n");
2081
2082 pos = begin + len;
2083
2084 if (pos < offset) {
2085 len = 0;
2086 begin = pos;
2087 }
2088
2089 if (pos > offset + length)
2090 break;
2091 }
2092
2093 done:
2094
2095 *start = buffer + (offset - begin);
2096 len -= (offset - begin);
2097
2098 if (len > length) len = length;
2099
2100 return len;
2101 }
2102
2103
2104 /* ******************************************************************** */
2105 /* * Init SCC driver * */
2106 /* ******************************************************************** */
2107
2108 static int __init scc_init_driver (void)
2109 {
2110 int result;
2111 char devname[10];
2112
2113 printk(banner);
2114
2115 sprintf(devname,"%s0", SCC_DriverName);
2116
2117 result = scc_net_setup(SCC_Info, devname, 0);
2118 if (result)
2119 {
2120 printk(KERN_ERR "z8530drv: cannot initialize module\n");
2121 return result;
2122 }
2123
2124 proc_net_create("z8530drv", 0, scc_net_get_info);
2125
2126 return 0;
2127 }
2128
2129 static void __exit scc_cleanup_driver(void)
2130 {
2131 long flags;
2132 io_port ctrl;
2133 int k;
2134 struct scc_channel *scc;
2135
2136 save_flags(flags);
2137 cli();
2138
2139 if (Nchips == 0)
2140 {
2141 unregister_netdev(SCC_Info[0].dev);
2142 kfree(SCC_Info[0].dev);
2143 }
2144
2145 for (k = 0; k < Nchips; k++)
2146 if ( (ctrl = SCC_ctrl[k].chan_A) )
2147 {
2148 Outb(ctrl, 0);
2149 OutReg(ctrl,R9,FHWRES); /* force hardware reset */
2150 udelay(50);
2151 }
2152
2153 for (k = 0; k < Nchips*2; k++)
2154 {
2155 scc = &SCC_Info[k];
2156 if (scc->ctrl)
2157 {
2158 release_region(scc->ctrl, 1);
2159 release_region(scc->data, 1);
2160 }
2161 if (scc->dev)
2162 {
2163 unregister_netdev(scc->dev);
2164 kfree(scc->dev);
2165 }
2166 }
2167
2168 for (k=0; k < NR_IRQS ; k++)
2169 if (Ivec[k].used) free_irq(k, NULL);
2170
2171 if (Vector_Latch)
2172 release_region(Vector_Latch, 1);
2173
2174 restore_flags(flags);
2175
2176 proc_net_remove("z8530drv");
2177 }
2178
2179 MODULE_AUTHOR("Joerg Reuter <jreuter@yaina.de>");
2180 MODULE_DESCRIPTION("AX.25 Device Driver for Z8530 based HDLC cards");
2181 MODULE_SUPPORTED_DEVICE("Z8530 based SCC cards for Amateur Radio");
2182 module_init(scc_init_driver);
2183 module_exit(scc_cleanup_driver);
2184