File: /usr/src/linux/drivers/net/ioc3-eth.c
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Driver for SGI's IOC3 based Ethernet cards as found in the PCI card.
7 *
8 * Copyright (C) 1999, 2000, 2001 Ralf Baechle
9 * Copyright (C) 1995, 1999, 2000, 2001 by Silicon Graphics, Inc.
10 *
11 * References:
12 * o IOC3 ASIC specification 4.51, 1996-04-18
13 * o IEEE 802.3 specification, 2000 edition
14 * o DP38840A Specification, National Semiconductor, March 1997
15 *
16 * To do:
17 *
18 * o Handle allocation failures in ioc3_alloc_skb() more gracefully.
19 * o Handle allocation failures in ioc3_init_rings().
20 * o Use prefetching for large packets. What is a good lower limit for
21 * prefetching?
22 * o We're probably allocating a bit too much memory.
23 * o Use hardware checksums.
24 * o Convert to using a IOC3 meta driver.
25 * o Which PHYs might possibly be attached to the IOC3 in real live,
26 * which workarounds are required for them? Do we ever have Lucent's?
27 * o For the 2.5 branch kill the mii-tool ioctls.
28 */
29 #include <linux/init.h>
30 #include <linux/delay.h>
31 #include <linux/kernel.h>
32 #include <linux/mm.h>
33 #include <linux/errno.h>
34 #include <linux/module.h>
35 #include <linux/pci.h>
36
37 #ifdef CONFIG_SERIAL
38 #include <linux/serial.h>
39 #include <asm/serial.h>
40 #define IOC3_BAUD (22000000 / (3*16))
41 #define IOC3_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
42 #endif
43
44 #include <linux/netdevice.h>
45 #include <linux/etherdevice.h>
46 #include <linux/ethtool.h>
47 #include <linux/skbuff.h>
48 #include <linux/dp83840.h>
49
50 #include <asm/byteorder.h>
51 #include <asm/io.h>
52 #include <asm/pgtable.h>
53 #include <asm/uaccess.h>
54 #include <asm/sn/types.h>
55 #include <asm/sn/sn0/addrs.h>
56 #include <asm/sn/sn0/hubni.h>
57 #include <asm/sn/sn0/hubio.h>
58 #include <asm/sn/klconfig.h>
59 #include <asm/sn/ioc3.h>
60 #include <asm/sn/sn0/ip27.h>
61 #include <asm/pci/bridge.h>
62
63 /*
64 * 64 RX buffers. This is tunable in the range of 16 <= x < 512. The
65 * value must be a power of two.
66 */
67 #define RX_BUFFS 64
68
69 /* Timer state engine. */
70 enum ioc3_timer_state {
71 arbwait = 0, /* Waiting for auto negotiation to complete. */
72 lupwait = 1, /* Auto-neg complete, awaiting link-up status. */
73 ltrywait = 2, /* Forcing try of all modes, from fastest to slowest. */
74 asleep = 3, /* Time inactive. */
75 };
76
77 /* Private per NIC data of the driver. */
78 struct ioc3_private {
79 struct ioc3 *regs;
80 int phy;
81 unsigned long *rxr; /* pointer to receiver ring */
82 struct ioc3_etxd *txr;
83 struct sk_buff *rx_skbs[512];
84 struct sk_buff *tx_skbs[128];
85 struct net_device_stats stats;
86 int rx_ci; /* RX consumer index */
87 int rx_pi; /* RX producer index */
88 int tx_ci; /* TX consumer index */
89 int tx_pi; /* TX producer index */
90 int txqlen;
91 u32 emcr, ehar_h, ehar_l;
92 spinlock_t ioc3_lock;
93 struct net_device *dev;
94
95 /* Members used by autonegotiation */
96 struct timer_list ioc3_timer;
97 enum ioc3_timer_state timer_state; /* State of auto-neg timer. */
98 unsigned int timer_ticks; /* Number of clicks at each state */
99 unsigned short sw_bmcr; /* sw copy of MII config register */
100 unsigned short sw_bmsr; /* sw copy of MII status register */
101 unsigned short sw_physid1; /* sw copy of PHYSID1 */
102 unsigned short sw_physid2; /* sw copy of PHYSID2 */
103 unsigned short sw_advertise; /* sw copy of ADVERTISE */
104 unsigned short sw_lpa; /* sw copy of LPA */
105 unsigned short sw_csconfig; /* sw copy of CSCONFIG */
106 };
107
108 static int ioc3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
109 static void ioc3_set_multicast_list(struct net_device *dev);
110 static int ioc3_start_xmit(struct sk_buff *skb, struct net_device *dev);
111 static void ioc3_timeout(struct net_device *dev);
112 static inline unsigned int ioc3_hash(const unsigned char *addr);
113 static inline void ioc3_stop(struct ioc3_private *ip);
114 static void ioc3_init(struct ioc3_private *ip);
115
116 static const char ioc3_str[] = "IOC3 Ethernet";
117
118 /* We use this to acquire receive skb's that we can DMA directly into. */
119 #define ALIGNED_RX_SKB_ADDR(addr) \
120 ((((unsigned long)(addr) + (128 - 1)) & ~(128 - 1)) - (unsigned long)(addr))
121
122 #define ioc3_alloc_skb(__length, __gfp_flags) \
123 ({ struct sk_buff *__skb; \
124 __skb = alloc_skb((__length) + 128, (__gfp_flags)); \
125 if (__skb) { \
126 int __offset = ALIGNED_RX_SKB_ADDR(__skb->data); \
127 if(__offset) \
128 skb_reserve(__skb, __offset); \
129 } \
130 __skb; \
131 })
132
133 /* BEWARE: The IOC3 documentation documents the size of rx buffers as
134 1644 while it's actually 1664. This one was nasty to track down ... */
135 #define RX_OFFSET 10
136 #define RX_BUF_ALLOC_SIZE (1664 + RX_OFFSET + 128)
137
138 /* DMA barrier to separate cached and uncached accesses. */
139 #define BARRIER() \
140 __asm__("sync" ::: "memory")
141
142
143 #define IOC3_SIZE 0x100000
144
145 #define ioc3_r(reg) \
146 ({ \
147 u32 __res; \
148 __res = ioc3->reg; \
149 __res; \
150 })
151
152 #define ioc3_w(reg,val) \
153 do { \
154 (ioc3->reg = (val)); \
155 } while(0)
156
157 static inline u32
158 mcr_pack(u32 pulse, u32 sample)
159 {
160 return (pulse << 10) | (sample << 2);
161 }
162
163 static int
164 nic_wait(struct ioc3 *ioc3)
165 {
166 u32 mcr;
167
168 do {
169 mcr = ioc3_r(mcr);
170 } while (!(mcr & 2));
171
172 return mcr & 1;
173 }
174
175 static int
176 nic_reset(struct ioc3 *ioc3)
177 {
178 int presence;
179
180 ioc3_w(mcr, mcr_pack(500, 65));
181 presence = nic_wait(ioc3);
182
183 ioc3_w(mcr, mcr_pack(0, 500));
184 nic_wait(ioc3);
185
186 return presence;
187 }
188
189 static inline int
190 nic_read_bit(struct ioc3 *ioc3)
191 {
192 int result;
193
194 ioc3_w(mcr, mcr_pack(6, 13));
195 result = nic_wait(ioc3);
196 ioc3_w(mcr, mcr_pack(0, 100));
197 nic_wait(ioc3);
198
199 return result;
200 }
201
202 static inline void
203 nic_write_bit(struct ioc3 *ioc3, int bit)
204 {
205 if (bit)
206 ioc3_w(mcr, mcr_pack(6, 110));
207 else
208 ioc3_w(mcr, mcr_pack(80, 30));
209
210 nic_wait(ioc3);
211 }
212
213 /*
214 * Read a byte from an iButton device
215 */
216 static u32
217 nic_read_byte(struct ioc3 *ioc3)
218 {
219 u32 result = 0;
220 int i;
221
222 for (i = 0; i < 8; i++)
223 result = (result >> 1) | (nic_read_bit(ioc3) << 7);
224
225 return result;
226 }
227
228 /*
229 * Write a byte to an iButton device
230 */
231 static void
232 nic_write_byte(struct ioc3 *ioc3, int byte)
233 {
234 int i, bit;
235
236 for (i = 8; i; i--) {
237 bit = byte & 1;
238 byte >>= 1;
239
240 nic_write_bit(ioc3, bit);
241 }
242 }
243
244 static u64
245 nic_find(struct ioc3 *ioc3, int *last)
246 {
247 int a, b, index, disc;
248 u64 address = 0;
249
250 nic_reset(ioc3);
251 /* Search ROM. */
252 nic_write_byte(ioc3, 0xf0);
253
254 /* Algorithm from ``Book of iButton Standards''. */
255 for (index = 0, disc = 0; index < 64; index++) {
256 a = nic_read_bit(ioc3);
257 b = nic_read_bit(ioc3);
258
259 if (a && b) {
260 printk("NIC search failed (not fatal).\n");
261 *last = 0;
262 return 0;
263 }
264
265 if (!a && !b) {
266 if (index == *last) {
267 address |= 1UL << index;
268 } else if (index > *last) {
269 address &= ~(1UL << index);
270 disc = index;
271 } else if ((address & (1UL << index)) == 0)
272 disc = index;
273 nic_write_bit(ioc3, address & (1UL << index));
274 continue;
275 } else {
276 if (a)
277 address |= 1UL << index;
278 else
279 address &= ~(1UL << index);
280 nic_write_bit(ioc3, a);
281 continue;
282 }
283 }
284
285 *last = disc;
286
287 return address;
288 }
289
290 static int nic_init(struct ioc3 *ioc3)
291 {
292 const char *type;
293 u8 crc;
294 u8 serial[6];
295 int save = 0, i;
296
297 type = "unknown";
298
299 while (1) {
300 u64 reg;
301 reg = nic_find(ioc3, &save);
302
303 switch (reg & 0xff) {
304 case 0x91:
305 type = "DS1981U";
306 break;
307 default:
308 if (save == 0) {
309 /* Let the caller try again. */
310 return -1;
311 }
312 continue;
313 }
314
315 nic_reset(ioc3);
316
317 /* Match ROM. */
318 nic_write_byte(ioc3, 0x55);
319 for (i = 0; i < 8; i++)
320 nic_write_byte(ioc3, (reg >> (i << 3)) & 0xff);
321
322 reg >>= 8; /* Shift out type. */
323 for (i = 0; i < 6; i++) {
324 serial[i] = reg & 0xff;
325 reg >>= 8;
326 }
327 crc = reg & 0xff;
328 break;
329 }
330
331 printk("Found %s NIC", type);
332 if (type != "unknown") {
333 printk (" registration number %02x:%02x:%02x:%02x:%02x:%02x,"
334 " CRC %02x", serial[0], serial[1], serial[2],
335 serial[3], serial[4], serial[5], crc);
336 }
337 printk(".\n");
338
339 return 0;
340 }
341
342 /*
343 * Read the NIC (Number-In-a-Can) device.
344 */
345 static void ioc3_get_eaddr(struct ioc3_private *ip)
346 {
347 struct ioc3 *ioc3 = ip->regs;
348 u8 nic[14];
349 int i;
350 int tries = 2; /* There may be some problem with the battery? */
351
352 ioc3_w(gpcr_s, (1 << 21));
353
354 while (tries--) {
355 if (!nic_init(ioc3))
356 break;
357 udelay(500);
358 }
359
360 if (tries < 0) {
361 printk("Failed to read MAC address\n");
362 return;
363 }
364
365 /* Read Memory. */
366 nic_write_byte(ioc3, 0xf0);
367 nic_write_byte(ioc3, 0x00);
368 nic_write_byte(ioc3, 0x00);
369
370 for (i = 13; i >= 0; i--)
371 nic[i] = nic_read_byte(ioc3);
372
373 printk("Ethernet address is ");
374 for (i = 2; i < 8; i++) {
375 ip->dev->dev_addr[i - 2] = nic[i];
376 printk("%02x", nic[i]);
377 if (i < 7)
378 printk(":");
379 }
380 printk(".\n");
381 }
382
383 /*
384 * Caller must hold the ioc3_lock ever for MII readers. This is also
385 * used to protect the transmitter side but it's low contention.
386 */
387 static u16 mii_read(struct ioc3_private *ip, int reg)
388 {
389 struct ioc3 *ioc3 = ip->regs;
390 int phy = ip->phy;
391
392 while (ioc3->micr & MICR_BUSY);
393 ioc3->micr = (phy << MICR_PHYADDR_SHIFT) | reg | MICR_READTRIG;
394 while (ioc3->micr & MICR_BUSY);
395
396 return ioc3->midr_r & MIDR_DATA_MASK;
397 }
398
399 static void mii_write(struct ioc3_private *ip, int reg, u16 data)
400 {
401 struct ioc3 *ioc3 = ip->regs;
402 int phy = ip->phy;
403
404 while (ioc3->micr & MICR_BUSY);
405 ioc3->midr_w = data;
406 ioc3->micr = (phy << MICR_PHYADDR_SHIFT) | reg;
407 while (ioc3->micr & MICR_BUSY);
408 }
409
410 static int ioc3_mii_init(struct ioc3_private *ip);
411
412 static struct net_device_stats *ioc3_get_stats(struct net_device *dev)
413 {
414 struct ioc3_private *ip = dev->priv;
415 struct ioc3 *ioc3 = ip->regs;
416
417 ip->stats.collisions += (ioc3->etcdc & ETCDC_COLLCNT_MASK);
418 return &ip->stats;
419 }
420
421 static inline void
422 ioc3_rx(struct ioc3_private *ip)
423 {
424 struct sk_buff *skb, *new_skb;
425 struct ioc3 *ioc3 = ip->regs;
426 int rx_entry, n_entry, len;
427 struct ioc3_erxbuf *rxb;
428 unsigned long *rxr;
429 u32 w0, err;
430
431 rxr = (unsigned long *) ip->rxr; /* Ring base */
432 rx_entry = ip->rx_ci; /* RX consume index */
433 n_entry = ip->rx_pi;
434
435 skb = ip->rx_skbs[rx_entry];
436 rxb = (struct ioc3_erxbuf *) (skb->data - RX_OFFSET);
437 w0 = rxb->w0;
438
439 while (w0 & ERXBUF_V) {
440 err = rxb->err; /* It's valid ... */
441 if (err & ERXBUF_GOODPKT) {
442 len = ((w0 >> ERXBUF_BYTECNT_SHIFT) & 0x7ff) - 4;
443 skb_trim(skb, len);
444 skb->protocol = eth_type_trans(skb, ip->dev);
445
446 new_skb = ioc3_alloc_skb(RX_BUF_ALLOC_SIZE, GFP_ATOMIC);
447 if (!new_skb) {
448 /* Ouch, drop packet and just recycle packet
449 to keep the ring filled. */
450 ip->stats.rx_dropped++;
451 new_skb = skb;
452 goto next;
453 }
454 netif_rx(skb);
455
456 ip->rx_skbs[rx_entry] = NULL; /* Poison */
457
458 new_skb->dev = ip->dev;
459
460 /* Because we reserve afterwards. */
461 skb_put(new_skb, (1664 + RX_OFFSET));
462 rxb = (struct ioc3_erxbuf *) new_skb->data;
463 skb_reserve(new_skb, RX_OFFSET);
464
465 ip->dev->last_rx = jiffies;
466 ip->stats.rx_packets++; /* Statistics */
467 ip->stats.rx_bytes += len;
468 } else {
469 /* The frame is invalid and the skb never
470 reached the network layer so we can just
471 recycle it. */
472 new_skb = skb;
473 ip->stats.rx_errors++;
474 }
475 if (err & ERXBUF_CRCERR) /* Statistics */
476 ip->stats.rx_crc_errors++;
477 if (err & ERXBUF_FRAMERR)
478 ip->stats.rx_frame_errors++;
479 next:
480 ip->rx_skbs[n_entry] = new_skb;
481 rxr[n_entry] = (0xa5UL << 56) |
482 ((unsigned long) rxb & TO_PHYS_MASK);
483 rxb->w0 = 0; /* Clear valid flag */
484 n_entry = (n_entry + 1) & 511; /* Update erpir */
485
486 /* Now go on to the next ring entry. */
487 rx_entry = (rx_entry + 1) & 511;
488 skb = ip->rx_skbs[rx_entry];
489 rxb = (struct ioc3_erxbuf *) (skb->data - RX_OFFSET);
490 w0 = rxb->w0;
491 }
492 ioc3->erpir = (n_entry << 3) | ERPIR_ARM;
493 ip->rx_pi = n_entry;
494 ip->rx_ci = rx_entry;
495 }
496
497 static inline void
498 ioc3_tx(struct ioc3_private *ip)
499 {
500 unsigned long packets, bytes;
501 struct ioc3 *ioc3 = ip->regs;
502 int tx_entry, o_entry;
503 struct sk_buff *skb;
504 u32 etcir;
505
506 spin_lock(&ip->ioc3_lock);
507 etcir = ioc3->etcir;
508
509 tx_entry = (etcir >> 7) & 127;
510 o_entry = ip->tx_ci;
511 packets = 0;
512 bytes = 0;
513
514 while (o_entry != tx_entry) {
515 packets++;
516 skb = ip->tx_skbs[o_entry];
517 bytes += skb->len;
518 dev_kfree_skb_irq(skb);
519 ip->tx_skbs[o_entry] = NULL;
520
521 o_entry = (o_entry + 1) & 127; /* Next */
522
523 etcir = ioc3->etcir; /* More pkts sent? */
524 tx_entry = (etcir >> 7) & 127;
525 }
526
527 ip->stats.tx_packets += packets;
528 ip->stats.tx_bytes += bytes;
529 ip->txqlen -= packets;
530
531 if (ip->txqlen < 128)
532 netif_wake_queue(ip->dev);
533
534 ip->tx_ci = o_entry;
535 spin_unlock(&ip->ioc3_lock);
536 }
537
538 /*
539 * Deal with fatal IOC3 errors. This condition might be caused by a hard or
540 * software problems, so we should try to recover
541 * more gracefully if this ever happens. In theory we might be flooded
542 * with such error interrupts if something really goes wrong, so we might
543 * also consider to take the interface down.
544 */
545 static void
546 ioc3_error(struct ioc3_private *ip, u32 eisr)
547 {
548 struct net_device *dev = ip->dev;
549 unsigned char *iface = dev->name;
550
551 if (eisr & EISR_RXOFLO)
552 printk(KERN_ERR "%s: RX overflow.\n", iface);
553 if (eisr & EISR_RXBUFOFLO)
554 printk(KERN_ERR "%s: RX buffer overflow.\n", iface);
555 if (eisr & EISR_RXMEMERR)
556 printk(KERN_ERR "%s: RX PCI error.\n", iface);
557 if (eisr & EISR_RXPARERR)
558 printk(KERN_ERR "%s: RX SSRAM parity error.\n", iface);
559 if (eisr & EISR_TXBUFUFLO)
560 printk(KERN_ERR "%s: TX buffer underflow.\n", iface);
561 if (eisr & EISR_TXMEMERR)
562 printk(KERN_ERR "%s: TX PCI error.\n", iface);
563
564 ioc3_stop(ip);
565 ioc3_init(ip);
566 ioc3_mii_init(ip);
567
568 dev->trans_start = jiffies;
569 netif_wake_queue(dev);
570 }
571
572 /* The interrupt handler does all of the Rx thread work and cleans up
573 after the Tx thread. */
574 static void ioc3_interrupt(int irq, void *_dev, struct pt_regs *regs)
575 {
576 struct net_device *dev = (struct net_device *)_dev;
577 struct ioc3_private *ip = dev->priv;
578 struct ioc3 *ioc3 = ip->regs;
579 const u32 enabled = EISR_RXTIMERINT | EISR_RXOFLO | EISR_RXBUFOFLO |
580 EISR_RXMEMERR | EISR_RXPARERR | EISR_TXBUFUFLO |
581 EISR_TXEXPLICIT | EISR_TXMEMERR;
582 u32 eisr;
583
584 eisr = ioc3->eisr & enabled;
585
586 while (eisr) {
587 ioc3->eisr = eisr;
588 ioc3->eisr; /* Flush */
589
590 if (eisr & (EISR_RXOFLO | EISR_RXBUFOFLO | EISR_RXMEMERR |
591 EISR_RXPARERR | EISR_TXBUFUFLO | EISR_TXMEMERR))
592 ioc3_error(ip, eisr);
593 if (eisr & EISR_RXTIMERINT)
594 ioc3_rx(ip);
595 if (eisr & EISR_TXEXPLICIT)
596 ioc3_tx(ip);
597
598 eisr = ioc3->eisr & enabled;
599 }
600 }
601
602 /*
603 * Auto negotiation. The scheme is very simple. We have a timer routine that
604 * keeps watching the auto negotiation process as it progresses. The DP83840
605 * is first told to start doing it's thing, we set up the time and place the
606 * timer state machine in it's initial state.
607 *
608 * Here the timer peeks at the DP83840 status registers at each click to see
609 * if the auto negotiation has completed, we assume here that the DP83840 PHY
610 * will time out at some point and just tell us what (didn't) happen. For
611 * complete coverage we only allow so many of the ticks at this level to run,
612 * when this has expired we print a warning message and try another strategy.
613 * This "other" strategy is to force the interface into various speed/duplex
614 * configurations and we stop when we see a link-up condition before the
615 * maximum number of "peek" ticks have occurred.
616 *
617 * Once a valid link status has been detected we configure the IOC3 to speak
618 * the most efficient protocol we could get a clean link for. The priority
619 * for link configurations, highest first is:
620 *
621 * 100 Base-T Full Duplex
622 * 100 Base-T Half Duplex
623 * 10 Base-T Full Duplex
624 * 10 Base-T Half Duplex
625 *
626 * We start a new timer now, after a successful auto negotiation status has
627 * been detected. This timer just waits for the link-up bit to get set in
628 * the BMCR of the DP83840. When this occurs we print a kernel log message
629 * describing the link type in use and the fact that it is up.
630 *
631 * If a fatal error of some sort is signalled and detected in the interrupt
632 * service routine, and the chip is reset, or the link is ifconfig'd down
633 * and then back up, this entire process repeats itself all over again.
634 */
635 static int ioc3_try_next_permutation(struct ioc3_private *ip)
636 {
637 ip->sw_bmcr = mii_read(ip, MII_BMCR);
638
639 /* Downgrade from full to half duplex. Only possible via ethtool. */
640 if (ip->sw_bmcr & BMCR_FULLDPLX) {
641 ip->sw_bmcr &= ~BMCR_FULLDPLX;
642 mii_write(ip, MII_BMCR, ip->sw_bmcr);
643
644 return 0;
645 }
646
647 /* Downgrade from 100 to 10. */
648 if (ip->sw_bmcr & BMCR_SPEED100) {
649 ip->sw_bmcr &= ~BMCR_SPEED100;
650 mii_write(ip, MII_BMCR, ip->sw_bmcr);
651
652 return 0;
653 }
654
655 /* We've tried everything. */
656 return -1;
657 }
658
659 static void
660 ioc3_display_link_mode(struct ioc3_private *ip)
661 {
662 char *tmode = "";
663
664 ip->sw_lpa = mii_read(ip, MII_LPA);
665
666 if (ip->sw_lpa & (LPA_100HALF | LPA_100FULL)) {
667 if (ip->sw_lpa & LPA_100FULL)
668 tmode = "100Mb/s, Full Duplex";
669 else
670 tmode = "100Mb/s, Half Duplex";
671 } else {
672 if (ip->sw_lpa & LPA_10FULL)
673 tmode = "10Mb/s, Full Duplex";
674 else
675 tmode = "10Mb/s, Half Duplex";
676 }
677
678 printk(KERN_INFO "%s: Link is up at %s.\n", ip->dev->name, tmode);
679 }
680
681 static void
682 ioc3_display_forced_link_mode(struct ioc3_private *ip)
683 {
684 char *speed = "", *duplex = "";
685
686 ip->sw_bmcr = mii_read(ip, MII_BMCR);
687 if (ip->sw_bmcr & BMCR_SPEED100)
688 speed = "100Mb/s, ";
689 else
690 speed = "10Mb/s, ";
691 if (ip->sw_bmcr & BMCR_FULLDPLX)
692 duplex = "Full Duplex.\n";
693 else
694 duplex = "Half Duplex.\n";
695
696 printk(KERN_INFO "%s: Link has been forced up at %s%s", ip->dev->name,
697 speed, duplex);
698 }
699
700 static int ioc3_set_link_modes(struct ioc3_private *ip)
701 {
702 struct ioc3 *ioc3 = ip->regs;
703 int full;
704
705 /*
706 * All we care about is making sure the bigmac tx_cfg has a
707 * proper duplex setting.
708 */
709 if (ip->timer_state == arbwait) {
710 ip->sw_lpa = mii_read(ip, MII_LPA);
711 if (!(ip->sw_lpa & (LPA_10HALF | LPA_10FULL |
712 LPA_100HALF | LPA_100FULL)))
713 goto no_response;
714 if (ip->sw_lpa & LPA_100FULL)
715 full = 1;
716 else if (ip->sw_lpa & LPA_100HALF)
717 full = 0;
718 else if (ip->sw_lpa & LPA_10FULL)
719 full = 1;
720 else
721 full = 0;
722 } else {
723 /* Forcing a link mode. */
724 ip->sw_bmcr = mii_read(ip, MII_BMCR);
725 if (ip->sw_bmcr & BMCR_FULLDPLX)
726 full = 1;
727 else
728 full = 0;
729 }
730
731 if (full)
732 ip->emcr |= EMCR_DUPLEX;
733 else
734 ip->emcr &= ~EMCR_DUPLEX;
735
736 ioc3->emcr = ip->emcr;
737 ioc3->emcr;
738
739 return 0;
740
741 no_response:
742
743 return 1;
744 }
745
746 static int is_lucent_phy(struct ioc3_private *ip)
747 {
748 unsigned short mr2, mr3;
749 int ret = 0;
750
751 mr2 = mii_read(ip, MII_PHYSID1);
752 mr3 = mii_read(ip, MII_PHYSID2);
753 if ((mr2 & 0xffff) == 0x0180 && ((mr3 & 0xffff) >> 10) == 0x1d) {
754 ret = 1;
755 }
756
757 return ret;
758 }
759
760 static void ioc3_timer(unsigned long data)
761 {
762 struct ioc3_private *ip = (struct ioc3_private *) data;
763 int restart_timer = 0;
764
765 ip->timer_ticks++;
766 switch (ip->timer_state) {
767 case arbwait:
768 /*
769 * Only allow for 5 ticks, thats 10 seconds and much too
770 * long to wait for arbitration to complete.
771 */
772 if (ip->timer_ticks >= 10) {
773 /* Enter force mode. */
774 do_force_mode:
775 ip->sw_bmcr = mii_read(ip, MII_BMCR);
776 printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful,"
777 " trying force link mode\n", ip->dev->name);
778 ip->sw_bmcr = BMCR_SPEED100;
779 mii_write(ip, MII_BMCR, ip->sw_bmcr);
780
781 if (!is_lucent_phy(ip)) {
782 /*
783 * OK, seems we need do disable the transceiver
784 * for the first tick to make sure we get an
785 * accurate link state at the second tick.
786 */
787 ip->sw_csconfig = mii_read(ip, MII_CSCONFIG);
788 ip->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
789 mii_write(ip, MII_CSCONFIG, ip->sw_csconfig);
790 }
791 ip->timer_state = ltrywait;
792 ip->timer_ticks = 0;
793 restart_timer = 1;
794 } else {
795 /* Anything interesting happen? */
796 ip->sw_bmsr = mii_read(ip, MII_BMSR);
797 if (ip->sw_bmsr & BMSR_ANEGCOMPLETE) {
798 int ret;
799
800 /* Just what we've been waiting for... */
801 ret = ioc3_set_link_modes(ip);
802 if (ret) {
803 /* Ooops, something bad happened, go to
804 * force mode.
805 *
806 * XXX Broken hubs which don't support
807 * XXX 802.3u auto-negotiation make this
808 * XXX happen as well.
809 */
810 goto do_force_mode;
811 }
812
813 /*
814 * Success, at least so far, advance our state
815 * engine.
816 */
817 ip->timer_state = lupwait;
818 restart_timer = 1;
819 } else {
820 restart_timer = 1;
821 }
822 }
823 break;
824
825 case lupwait:
826 /*
827 * Auto negotiation was successful and we are awaiting a
828 * link up status. I have decided to let this timer run
829 * forever until some sort of error is signalled, reporting
830 * a message to the user at 10 second intervals.
831 */
832 ip->sw_bmsr = mii_read(ip, MII_BMSR);
833 if (ip->sw_bmsr & BMSR_LSTATUS) {
834 /*
835 * Wheee, it's up, display the link mode in use and put
836 * the timer to sleep.
837 */
838 ioc3_display_link_mode(ip);
839 ip->timer_state = asleep;
840 restart_timer = 0;
841 } else {
842 if (ip->timer_ticks >= 10) {
843 printk(KERN_NOTICE "%s: Auto negotiation successful, link still "
844 "not completely up.\n", ip->dev->name);
845 ip->timer_ticks = 0;
846 restart_timer = 1;
847 } else {
848 restart_timer = 1;
849 }
850 }
851 break;
852
853 case ltrywait:
854 /*
855 * Making the timeout here too long can make it take
856 * annoyingly long to attempt all of the link mode
857 * permutations, but then again this is essentially
858 * error recovery code for the most part.
859 */
860 ip->sw_bmsr = mii_read(ip, MII_BMSR);
861 ip->sw_csconfig = mii_read(ip, MII_CSCONFIG);
862 if (ip->timer_ticks == 1) {
863 if (!is_lucent_phy(ip)) {
864 /*
865 * Re-enable transceiver, we'll re-enable the
866 * transceiver next tick, then check link state
867 * on the following tick.
868 */
869 ip->sw_csconfig |= CSCONFIG_TCVDISAB;
870 mii_write(ip, MII_CSCONFIG, ip->sw_csconfig);
871 }
872 restart_timer = 1;
873 break;
874 }
875 if (ip->timer_ticks == 2) {
876 if (!is_lucent_phy(ip)) {
877 ip->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
878 mii_write(ip, MII_CSCONFIG, ip->sw_csconfig);
879 }
880 restart_timer = 1;
881 break;
882 }
883 if (ip->sw_bmsr & BMSR_LSTATUS) {
884 /* Force mode selection success. */
885 ioc3_display_forced_link_mode(ip);
886 ioc3_set_link_modes(ip); /* XXX error? then what? */
887 ip->timer_state = asleep;
888 restart_timer = 0;
889 } else {
890 if (ip->timer_ticks >= 4) { /* 6 seconds or so... */
891 int ret;
892
893 ret = ioc3_try_next_permutation(ip);
894 if (ret == -1) {
895 /*
896 * Aieee, tried them all, reset the
897 * chip and try all over again.
898 */
899 printk(KERN_NOTICE "%s: Link down, "
900 "cable problem?\n",
901 ip->dev->name);
902
903 ioc3_init(ip);
904 return;
905 }
906 if (!is_lucent_phy(ip)) {
907 ip->sw_csconfig = mii_read(ip,
908 MII_CSCONFIG);
909 ip->sw_csconfig |= CSCONFIG_TCVDISAB;
910 mii_write(ip, MII_CSCONFIG,
911 ip->sw_csconfig);
912 }
913 ip->timer_ticks = 0;
914 restart_timer = 1;
915 } else {
916 restart_timer = 1;
917 }
918 }
919 break;
920
921 case asleep:
922 default:
923 /* Can't happens.... */
924 printk(KERN_ERR "%s: Aieee, link timer is asleep but we got "
925 "one anyways!\n", ip->dev->name);
926 restart_timer = 0;
927 ip->timer_ticks = 0;
928 ip->timer_state = asleep; /* foo on you */
929 break;
930 };
931
932 if (restart_timer) {
933 ip->ioc3_timer.expires = jiffies + ((12 * HZ)/10); /* 1.2s */
934 add_timer(&ip->ioc3_timer);
935 }
936 }
937
938 static void
939 ioc3_start_auto_negotiation(struct ioc3_private *ip, struct ethtool_cmd *ep)
940 {
941 int timeout;
942
943 /* Read all of the registers we are interested in now. */
944 ip->sw_bmsr = mii_read(ip, MII_BMSR);
945 ip->sw_bmcr = mii_read(ip, MII_BMCR);
946 ip->sw_physid1 = mii_read(ip, MII_PHYSID1);
947 ip->sw_physid2 = mii_read(ip, MII_PHYSID2);
948
949 /* XXX Check BMSR_ANEGCAPABLE, should not be necessary though. */
950
951 ip->sw_advertise = mii_read(ip, MII_ADVERTISE);
952 if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
953 /* Advertise everything we can support. */
954 if (ip->sw_bmsr & BMSR_10HALF)
955 ip->sw_advertise |= ADVERTISE_10HALF;
956 else
957 ip->sw_advertise &= ~ADVERTISE_10HALF;
958
959 if (ip->sw_bmsr & BMSR_10FULL)
960 ip->sw_advertise |= ADVERTISE_10FULL;
961 else
962 ip->sw_advertise &= ~ADVERTISE_10FULL;
963 if (ip->sw_bmsr & BMSR_100HALF)
964 ip->sw_advertise |= ADVERTISE_100HALF;
965 else
966 ip->sw_advertise &= ~ADVERTISE_100HALF;
967 if (ip->sw_bmsr & BMSR_100FULL)
968 ip->sw_advertise |= ADVERTISE_100FULL;
969 else
970 ip->sw_advertise &= ~ADVERTISE_100FULL;
971 mii_write(ip, MII_ADVERTISE, ip->sw_advertise);
972
973 /*
974 * XXX Currently no IOC3 card I know off supports 100BaseT4,
975 * XXX and this is because the DP83840 does not support it,
976 * XXX changes XXX would need to be made to the tx/rx logic in
977 * XXX the driver as well so I completely skip checking for it
978 * XXX in the BMSR for now.
979 */
980
981 #ifdef AUTO_SWITCH_DEBUG
982 ASD(("%s: Advertising [ ", ip->dev->name));
983 if (ip->sw_advertise & ADVERTISE_10HALF)
984 ASD(("10H "));
985 if (ip->sw_advertise & ADVERTISE_10FULL)
986 ASD(("10F "));
987 if (ip->sw_advertise & ADVERTISE_100HALF)
988 ASD(("100H "));
989 if (ip->sw_advertise & ADVERTISE_100FULL)
990 ASD(("100F "));
991 #endif
992
993 /* Enable Auto-Negotiation, this is usually on already... */
994 ip->sw_bmcr |= BMCR_ANENABLE;
995 mii_write(ip, MII_BMCR, ip->sw_bmcr);
996
997 /* Restart it to make sure it is going. */
998 ip->sw_bmcr |= BMCR_ANRESTART;
999 mii_write(ip, MII_BMCR, ip->sw_bmcr);
1000
1001 /* BMCR_ANRESTART self clears when the process has begun. */
1002
1003 timeout = 64; /* More than enough. */
1004 while (--timeout) {
1005 ip->sw_bmcr = mii_read(ip, MII_BMCR);
1006 if (!(ip->sw_bmcr & BMCR_ANRESTART))
1007 break; /* got it. */
1008 udelay(10);
1009 }
1010 if (!timeout) {
1011 printk(KERN_ERR "%s: IOC3 would not start auto "
1012 "negotiation BMCR=0x%04x\n",
1013 ip->dev->name, ip->sw_bmcr);
1014 printk(KERN_NOTICE "%s: Performing force link "
1015 "detection.\n", ip->dev->name);
1016 goto force_link;
1017 } else {
1018 ip->timer_state = arbwait;
1019 }
1020 } else {
1021 force_link:
1022 /*
1023 * Force the link up, trying first a particular mode. Either
1024 * we are here at the request of ethtool or because the IOC3
1025 * would not start to autoneg.
1026 */
1027
1028 /*
1029 * Disable auto-negotiation in BMCR, enable the duplex and
1030 * speed setting, init the timer state machine, and fire it off.
1031 */
1032 if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
1033 ip->sw_bmcr = BMCR_SPEED100;
1034 } else {
1035 if (ep->speed == SPEED_100)
1036 ip->sw_bmcr = BMCR_SPEED100;
1037 else
1038 ip->sw_bmcr = 0;
1039 if (ep->duplex == DUPLEX_FULL)
1040 ip->sw_bmcr |= BMCR_FULLDPLX;
1041 }
1042 mii_write(ip, MII_BMCR, ip->sw_bmcr);
1043
1044 if (!is_lucent_phy(ip)) {
1045 /*
1046 * OK, seems we need do disable the transceiver for the
1047 * first tick to make sure we get an accurate link
1048 * state at the second tick.
1049 */
1050 ip->sw_csconfig = mii_read(ip, MII_CSCONFIG);
1051 ip->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
1052 mii_write(ip, MII_CSCONFIG, ip->sw_csconfig);
1053 }
1054 ip->timer_state = ltrywait;
1055 }
1056
1057 del_timer(&ip->ioc3_timer);
1058 ip->timer_ticks = 0;
1059 ip->ioc3_timer.expires = jiffies + (12 * HZ)/10; /* 1.2 sec. */
1060 ip->ioc3_timer.data = (unsigned long) ip;
1061 ip->ioc3_timer.function = &ioc3_timer;
1062 add_timer(&ip->ioc3_timer);
1063 }
1064
1065 static int ioc3_mii_init(struct ioc3_private *ip)
1066 {
1067 int i, found;
1068 u16 word;
1069
1070 found = 0;
1071 spin_lock_irq(&ip->ioc3_lock);
1072 for (i = 0; i < 32; i++) {
1073 ip->phy = i;
1074 word = mii_read(ip, 2);
1075 if ((word != 0xffff) && (word != 0x0000)) {
1076 found = 1;
1077 break; /* Found a PHY */
1078 }
1079 }
1080 if (!found) {
1081 spin_unlock_irq(&ip->ioc3_lock);
1082 return -ENODEV;
1083 }
1084
1085 ioc3_start_auto_negotiation(ip, NULL); // XXX ethtool
1086
1087 spin_unlock_irq(&ip->ioc3_lock);
1088
1089 return 0;
1090 }
1091
1092 static inline void
1093 ioc3_clean_rx_ring(struct ioc3_private *ip)
1094 {
1095 struct sk_buff *skb;
1096 int i;
1097
1098 for (i = ip->rx_ci; i & 15; i++) {
1099 ip->rx_skbs[ip->rx_pi] = ip->rx_skbs[ip->rx_ci];
1100 ip->rxr[ip->rx_pi++] = ip->rxr[ip->rx_ci++];
1101 }
1102 ip->rx_pi &= 511;
1103 ip->rx_ci &= 511;
1104
1105 for (i = ip->rx_ci; i != ip->rx_pi; i = (i+1) & 511) {
1106 struct ioc3_erxbuf *rxb;
1107 skb = ip->rx_skbs[i];
1108 rxb = (struct ioc3_erxbuf *) (skb->data - RX_OFFSET);
1109 rxb->w0 = 0;
1110 }
1111 }
1112
1113 static inline void
1114 ioc3_clean_tx_ring(struct ioc3_private *ip)
1115 {
1116 struct sk_buff *skb;
1117 int i;
1118
1119 for (i=0; i < 128; i++) {
1120 skb = ip->tx_skbs[i];
1121 if (skb) {
1122 ip->tx_skbs[i] = NULL;
1123 dev_kfree_skb_any(skb);
1124 }
1125 ip->txr[i].cmd = 0;
1126 }
1127 ip->tx_pi = 0;
1128 ip->tx_ci = 0;
1129 }
1130
1131 static void
1132 ioc3_free_rings(struct ioc3_private *ip)
1133 {
1134 struct sk_buff *skb;
1135 int rx_entry, n_entry;
1136
1137 if (ip->txr) {
1138 ioc3_clean_tx_ring(ip);
1139 free_pages((unsigned long)ip->txr, 2);
1140 ip->txr = NULL;
1141 }
1142
1143 if (ip->rxr) {
1144 n_entry = ip->rx_ci;
1145 rx_entry = ip->rx_pi;
1146
1147 while (n_entry != rx_entry) {
1148 skb = ip->rx_skbs[n_entry];
1149 if (skb)
1150 dev_kfree_skb_any(skb);
1151
1152 n_entry = (n_entry + 1) & 511;
1153 }
1154 free_page((unsigned long)ip->rxr);
1155 ip->rxr = NULL;
1156 }
1157 }
1158
1159 static void
1160 ioc3_alloc_rings(struct net_device *dev, struct ioc3_private *ip,
1161 struct ioc3 *ioc3)
1162 {
1163 struct ioc3_erxbuf *rxb;
1164 unsigned long *rxr;
1165 int i;
1166
1167 if (ip->rxr == NULL) {
1168 /* Allocate and initialize rx ring. 4kb = 512 entries */
1169 ip->rxr = (unsigned long *) get_free_page(GFP_ATOMIC);
1170 rxr = (unsigned long *) ip->rxr;
1171 if (!rxr)
1172 printk("ioc3_alloc_rings(): get_free_page() failed!\n");
1173
1174 /* Now the rx buffers. The RX ring may be larger but
1175 we only allocate 16 buffers for now. Need to tune
1176 this for performance and memory later. */
1177 for (i = 0; i < RX_BUFFS; i++) {
1178 struct sk_buff *skb;
1179
1180 skb = ioc3_alloc_skb(RX_BUF_ALLOC_SIZE, GFP_ATOMIC);
1181 if (!skb) {
1182 show_free_areas();
1183 continue;
1184 }
1185
1186 ip->rx_skbs[i] = skb;
1187 skb->dev = dev;
1188
1189 /* Because we reserve afterwards. */
1190 skb_put(skb, (1664 + RX_OFFSET));
1191 rxb = (struct ioc3_erxbuf *) skb->data;
1192 rxr[i] = (0xa5UL << 56)
1193 | ((unsigned long) rxb & TO_PHYS_MASK);
1194 skb_reserve(skb, RX_OFFSET);
1195 }
1196 ip->rx_ci = 0;
1197 ip->rx_pi = RX_BUFFS;
1198 }
1199
1200 if (ip->txr == NULL) {
1201 /* Allocate and initialize tx rings. 16kb = 128 bufs. */
1202 ip->txr = (struct ioc3_etxd *)__get_free_pages(GFP_KERNEL, 2);
1203 if (!ip->txr)
1204 printk("ioc3_alloc_rings(): get_free_page() failed!\n");
1205 ip->tx_pi = 0;
1206 ip->tx_ci = 0;
1207 }
1208 }
1209
1210 static void
1211 ioc3_init_rings(struct net_device *dev, struct ioc3_private *ip,
1212 struct ioc3 *ioc3)
1213 {
1214 unsigned long ring;
1215
1216 ioc3_free_rings(ip);
1217 ioc3_alloc_rings(dev, ip, ioc3);
1218
1219 ioc3_clean_rx_ring(ip);
1220 ioc3_clean_tx_ring(ip);
1221
1222 /* Now the rx ring base, consume & produce registers. */
1223 ring = (0xa5UL << 56) | ((unsigned long)ip->rxr & TO_PHYS_MASK);
1224 ioc3->erbr_h = ring >> 32;
1225 ioc3->erbr_l = ring & 0xffffffff;
1226 ioc3->ercir = (ip->rx_ci << 3);
1227 ioc3->erpir = (ip->rx_pi << 3) | ERPIR_ARM;
1228
1229 ring = (0xa5UL << 56) | ((unsigned long)ip->txr & TO_PHYS_MASK);
1230
1231 ip->txqlen = 0; /* nothing queued */
1232
1233 /* Now the tx ring base, consume & produce registers. */
1234 ioc3->etbr_h = ring >> 32;
1235 ioc3->etbr_l = ring & 0xffffffff;
1236 ioc3->etpir = (ip->tx_pi << 7);
1237 ioc3->etcir = (ip->tx_ci << 7);
1238 ioc3->etcir; /* Flush */
1239 }
1240
1241 static inline void
1242 ioc3_ssram_disc(struct ioc3_private *ip)
1243 {
1244 struct ioc3 *ioc3 = ip->regs;
1245 volatile u32 *ssram0 = &ioc3->ssram[0x0000];
1246 volatile u32 *ssram1 = &ioc3->ssram[0x4000];
1247 unsigned int pattern = 0x5555;
1248
1249 /* Assume the larger size SSRAM and enable parity checking */
1250 ioc3->emcr |= (EMCR_BUFSIZ | EMCR_RAMPAR);
1251
1252 *ssram0 = pattern;
1253 *ssram1 = ~pattern & IOC3_SSRAM_DM;
1254
1255 if ((*ssram0 & IOC3_SSRAM_DM) != pattern ||
1256 (*ssram1 & IOC3_SSRAM_DM) != (~pattern & IOC3_SSRAM_DM)) {
1257 /* set ssram size to 64 KB */
1258 ip->emcr = EMCR_RAMPAR;
1259 ioc3->emcr &= ~EMCR_BUFSIZ;
1260 } else {
1261 ip->emcr = EMCR_BUFSIZ | EMCR_RAMPAR;
1262 }
1263 }
1264
1265 static void ioc3_init(struct ioc3_private *ip)
1266 {
1267 struct net_device *dev = ip->dev;
1268 struct ioc3 *ioc3 = ip->regs;
1269
1270 del_timer(&ip->ioc3_timer); /* Kill if running */
1271
1272 ioc3->emcr = EMCR_RST; /* Reset */
1273 ioc3->emcr; /* Flush WB */
1274 udelay(4); /* Give it time ... */
1275 ioc3->emcr = 0;
1276 ioc3->emcr;
1277
1278 /* Misc registers */
1279 ioc3->erbar = 0;
1280 ioc3->etcsr = (17<<ETCSR_IPGR2_SHIFT) | (11<<ETCSR_IPGR1_SHIFT) | 21;
1281 ioc3->etcdc; /* Clear on read */
1282 ioc3->ercsr = 15; /* RX low watermark */
1283 ioc3->ertr = 0; /* Interrupt immediately */
1284 ioc3->emar_h = (dev->dev_addr[5] << 8) | dev->dev_addr[4];
1285 ioc3->emar_l = (dev->dev_addr[3] << 24) | (dev->dev_addr[2] << 16) |
1286 (dev->dev_addr[1] << 8) | dev->dev_addr[0];
1287 ioc3->ehar_h = ip->ehar_h;
1288 ioc3->ehar_l = ip->ehar_l;
1289 ioc3->ersr = 42; /* XXX should be random */
1290
1291 ioc3_init_rings(ip->dev, ip, ioc3);
1292
1293 ip->emcr |= ((RX_OFFSET / 2) << EMCR_RXOFF_SHIFT) | EMCR_TXDMAEN |
1294 EMCR_TXEN | EMCR_RXDMAEN | EMCR_RXEN;
1295 ioc3->emcr = ip->emcr;
1296 ioc3->eier = EISR_RXTIMERINT | EISR_RXOFLO | EISR_RXBUFOFLO |
1297 EISR_RXMEMERR | EISR_RXPARERR | EISR_TXBUFUFLO |
1298 EISR_TXEXPLICIT | EISR_TXMEMERR;
1299 ioc3->eier;
1300 }
1301
1302 static inline void ioc3_stop(struct ioc3_private *ip)
1303 {
1304 struct ioc3 *ioc3 = ip->regs;
1305
1306 ioc3->emcr = 0; /* Shutup */
1307 ioc3->eier = 0; /* Disable interrupts */
1308 ioc3->eier; /* Flush */
1309 }
1310
1311 static int
1312 ioc3_open(struct net_device *dev)
1313 {
1314 struct ioc3_private *ip = dev->priv;
1315
1316 if (request_irq(dev->irq, ioc3_interrupt, SA_SHIRQ, ioc3_str, dev)) {
1317 printk(KERN_ERR "%s: Can't get irq %d\n", dev->name, dev->irq);
1318
1319 return -EAGAIN;
1320 }
1321
1322 ip->ehar_h = 0;
1323 ip->ehar_l = 0;
1324 ioc3_init(ip);
1325
1326 netif_start_queue(dev);
1327 return 0;
1328 }
1329
1330 static int
1331 ioc3_close(struct net_device *dev)
1332 {
1333 struct ioc3_private *ip = dev->priv;
1334
1335 del_timer(&ip->ioc3_timer);
1336
1337 netif_stop_queue(dev);
1338
1339 ioc3_stop(ip);
1340 free_irq(dev->irq, dev);
1341
1342 ioc3_free_rings(ip);
1343 return 0;
1344 }
1345
1346 /*
1347 * MENET cards have four IOC3 chips, which are attached to two sets of
1348 * PCI slot resources each: the primary connections are on slots
1349 * 0..3 and the secondaries are on 4..7
1350 *
1351 * All four ethernets are brought out to connectors; six serial ports
1352 * (a pair from each of the first three IOC3s) are brought out to
1353 * MiniDINs; all other subdevices are left swinging in the wind, leave
1354 * them disabled.
1355 */
1356 static inline int ioc3_is_menet(struct pci_dev *pdev)
1357 {
1358 struct pci_dev *dev;
1359
1360 return pdev->bus->parent == NULL
1361 && (dev = pci_find_slot(pdev->bus->number, PCI_DEVFN(0, 0)))
1362 && dev->vendor == PCI_VENDOR_ID_SGI
1363 && dev->device == PCI_DEVICE_ID_SGI_IOC3
1364 && (dev = pci_find_slot(pdev->bus->number, PCI_DEVFN(1, 0)))
1365 && dev->vendor == PCI_VENDOR_ID_SGI
1366 && dev->device == PCI_DEVICE_ID_SGI_IOC3
1367 && (dev = pci_find_slot(pdev->bus->number, PCI_DEVFN(2, 0)))
1368 && dev->vendor == PCI_VENDOR_ID_SGI
1369 && dev->device == PCI_DEVICE_ID_SGI_IOC3;
1370 }
1371
1372 static void inline ioc3_serial_probe(struct pci_dev *pdev,
1373 struct ioc3 *ioc3)
1374 {
1375 struct serial_struct req;
1376
1377 /*
1378 * We need to recognice and treat the fourth MENET serial as it
1379 * does not have an SuperIO chip attached to it, therefore attempting
1380 * to access it will result in bus errors. We call something an
1381 * MENET if PCI slot 0, 1, 2 and 3 of a master PCI bus all have an IOC3
1382 * in it. This is paranoid but we want to avoid blowing up on a
1383 * showhorn PCI box that happens to have 4 IOC3 cards in it so it's
1384 * not paranoid enough ...
1385 */
1386 if (ioc3_is_menet(pdev) && PCI_SLOT(pdev->devfn) == 3)
1387 return;
1388
1389 /* Register to interrupt zero because we share the interrupt with
1390 the serial driver which we don't properly support yet. */
1391 memset(&req, 0, sizeof(req));
1392 req.irq = 0;
1393 req.flags = IOC3_COM_FLAGS;
1394 req.io_type = SERIAL_IO_MEM;
1395 req.iomem_reg_shift = 0;
1396 req.baud_base = IOC3_BAUD;
1397
1398 req.iomem_base = (unsigned char *) &ioc3->sregs.uarta;
1399 register_serial(&req);
1400
1401 req.iomem_base = (unsigned char *) &ioc3->sregs.uartb;
1402 register_serial(&req);
1403 }
1404
1405 static int __devinit ioc3_probe(struct pci_dev *pdev,
1406 const struct pci_device_id *ent)
1407 {
1408 struct net_device *dev = NULL;
1409 struct ioc3_private *ip;
1410 struct ioc3 *ioc3;
1411 unsigned long ioc3_base, ioc3_size;
1412 u32 vendor, model, rev;
1413 int err;
1414
1415 dev = alloc_etherdev(sizeof(struct ioc3_private));
1416 if (!dev)
1417 return -ENOMEM;
1418
1419 err = pci_request_regions(pdev, "ioc3");
1420 if (err)
1421 goto out_free;
1422
1423 SET_MODULE_OWNER(dev);
1424 ip = dev->priv;
1425 ip->dev = dev;
1426
1427 dev->irq = pdev->irq;
1428
1429 ioc3_base = pci_resource_start(pdev, 0);
1430 ioc3_size = pci_resource_len(pdev, 0);
1431 ioc3 = (struct ioc3 *) ioremap(ioc3_base, ioc3_size);
1432 if (!ioc3) {
1433 printk(KERN_CRIT "ioc3eth(%s): ioremap failed, goodbye.\n",
1434 pdev->slot_name);
1435 err = -ENOMEM;
1436 goto out_res;
1437 }
1438 ip->regs = ioc3;
1439
1440 #ifdef CONFIG_SERIAL
1441 ioc3_serial_probe(pdev, ioc3);
1442 #endif
1443
1444 spin_lock_init(&ip->ioc3_lock);
1445
1446 ioc3_stop(ip);
1447 ioc3_init(ip);
1448
1449 init_timer(&ip->ioc3_timer);
1450 ioc3_mii_init(ip);
1451
1452 if (ip->phy == -1) {
1453 printk(KERN_CRIT "ioc3-eth(%s): Didn't find a PHY, goodbye.\n",
1454 pdev->slot_name);
1455 err = -ENODEV;
1456 goto out_stop;
1457 }
1458
1459 ioc3_ssram_disc(ip);
1460 ioc3_get_eaddr(ip);
1461
1462 /* The IOC3-specific entries in the device structure. */
1463 dev->open = ioc3_open;
1464 dev->hard_start_xmit = ioc3_start_xmit;
1465 dev->tx_timeout = ioc3_timeout;
1466 dev->watchdog_timeo = 5 * HZ;
1467 dev->stop = ioc3_close;
1468 dev->get_stats = ioc3_get_stats;
1469 dev->do_ioctl = ioc3_ioctl;
1470 dev->set_multicast_list = ioc3_set_multicast_list;
1471
1472 err = register_netdev(dev);
1473 if (err)
1474 goto out_stop;
1475
1476 vendor = (ip->sw_physid1 << 12) | (ip->sw_physid2 >> 4);
1477 model = (ip->sw_physid2 >> 4) & 0x3f;
1478 rev = ip->sw_physid2 & 0xf;
1479 printk(KERN_INFO "%s: Using PHY %d, vendor 0x%x, model %d, "
1480 "rev %d.\n", dev->name, ip->phy, vendor, model, rev);
1481 printk(KERN_INFO "%s: IOC3 SSRAM has %d kbyte.\n", dev->name,
1482 ip->emcr & EMCR_BUFSIZ ? 128 : 64);
1483
1484 return 0;
1485
1486 out_stop:
1487 ioc3_stop(ip);
1488 free_irq(dev->irq, dev);
1489 ioc3_free_rings(ip);
1490 out_res:
1491 pci_release_regions(pdev);
1492 out_free:
1493 kfree(dev);
1494 return err;
1495 }
1496
1497 static void __devexit ioc3_remove_one (struct pci_dev *pdev)
1498 {
1499 struct net_device *dev = pci_get_drvdata(pdev);
1500 struct ioc3_private *ip = dev->priv;
1501 struct ioc3 *ioc3 = ip->regs;
1502
1503 iounmap(ioc3);
1504 pci_release_regions(pdev);
1505 kfree(dev);
1506 }
1507
1508 static struct pci_device_id ioc3_pci_tbl[] __devinitdata = {
1509 { PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC3, PCI_ANY_ID, PCI_ANY_ID },
1510 { 0 }
1511 };
1512 MODULE_DEVICE_TABLE(pci, ioc3_pci_tbl);
1513
1514 static struct pci_driver ioc3_driver = {
1515 name: "ioc3-eth",
1516 id_table: ioc3_pci_tbl,
1517 probe: ioc3_probe,
1518 remove: ioc3_remove_one,
1519 };
1520
1521 static int __init ioc3_init_module(void)
1522 {
1523 return pci_module_init(&ioc3_driver);
1524 }
1525
1526 static void __exit ioc3_cleanup_module(void)
1527 {
1528 pci_unregister_driver(&ioc3_driver);
1529 }
1530
1531 static int
1532 ioc3_start_xmit(struct sk_buff *skb, struct net_device *dev)
1533 {
1534 unsigned long data;
1535 struct ioc3_private *ip = dev->priv;
1536 struct ioc3 *ioc3 = ip->regs;
1537 unsigned int len;
1538 struct ioc3_etxd *desc;
1539 int produce;
1540
1541 spin_lock_irq(&ip->ioc3_lock);
1542
1543 data = (unsigned long) skb->data;
1544 len = skb->len;
1545
1546 produce = ip->tx_pi;
1547 desc = &ip->txr[produce];
1548
1549 if (len <= 104) {
1550 /* Short packet, let's copy it directly into the ring. */
1551 memcpy(desc->data, skb->data, skb->len);
1552 if (len < ETH_ZLEN) {
1553 /* Very short packet, pad with zeros at the end. */
1554 memset(desc->data + len, 0, ETH_ZLEN - len);
1555 len = ETH_ZLEN;
1556 }
1557 desc->cmd = len | ETXD_INTWHENDONE | ETXD_D0V;
1558 desc->bufcnt = len;
1559 } else if ((data ^ (data + len)) & 0x4000) {
1560 unsigned long b2, s1, s2;
1561
1562 b2 = (data | 0x3fffUL) + 1UL;
1563 s1 = b2 - data;
1564 s2 = data + len - b2;
1565
1566 desc->cmd = len | ETXD_INTWHENDONE | ETXD_B1V | ETXD_B2V;
1567 desc->bufcnt = (s1 << ETXD_B1CNT_SHIFT) |
1568 (s2 << ETXD_B2CNT_SHIFT);
1569 desc->p1 = (0xa5UL << 56) | (data & TO_PHYS_MASK);
1570 desc->p2 = (0xa5UL << 56) | (data & TO_PHYS_MASK);
1571 } else {
1572 /* Normal sized packet that doesn't cross a page boundary. */
1573 desc->cmd = len | ETXD_INTWHENDONE | ETXD_B1V;
1574 desc->bufcnt = len << ETXD_B1CNT_SHIFT;
1575 desc->p1 = (0xa5UL << 56) | (data & TO_PHYS_MASK);
1576 }
1577
1578 BARRIER();
1579
1580 dev->trans_start = jiffies;
1581 ip->tx_skbs[produce] = skb; /* Remember skb */
1582 produce = (produce + 1) & 127;
1583 ip->tx_pi = produce;
1584 ioc3->etpir = produce << 7; /* Fire ... */
1585
1586 ip->txqlen++;
1587
1588 if (ip->txqlen > 127)
1589 netif_stop_queue(dev);
1590
1591 spin_unlock_irq(&ip->ioc3_lock);
1592
1593 return 0;
1594 }
1595
1596 static void ioc3_timeout(struct net_device *dev)
1597 {
1598 struct ioc3_private *ip = dev->priv;
1599
1600 printk(KERN_ERR "%s: transmit timed out, resetting\n", dev->name);
1601
1602 ioc3_stop(ip);
1603 ioc3_init(ip);
1604 ioc3_mii_init(ip);
1605
1606 dev->trans_start = jiffies;
1607 netif_wake_queue(dev);
1608 }
1609
1610 /*
1611 * Given a multicast ethernet address, this routine calculates the
1612 * address's bit index in the logical address filter mask
1613 */
1614 #define CRC_MASK 0xedb88320
1615
1616 static inline unsigned int
1617 ioc3_hash(const unsigned char *addr)
1618 {
1619 unsigned int temp = 0;
1620 unsigned char byte;
1621 unsigned int crc;
1622 int bits, len;
1623
1624 len = ETH_ALEN;
1625 for (crc = ~0; --len >= 0; addr++) {
1626 byte = *addr;
1627 for (bits = 8; --bits >= 0; ) {
1628 if ((byte ^ crc) & 1)
1629 crc = (crc >> 1) ^ CRC_MASK;
1630 else
1631 crc >>= 1;
1632 byte >>= 1;
1633 }
1634 }
1635
1636 crc &= 0x3f; /* bit reverse lowest 6 bits for hash index */
1637 for (bits = 6; --bits >= 0; ) {
1638 temp <<= 1;
1639 temp |= (crc & 0x1);
1640 crc >>= 1;
1641 }
1642
1643 return temp;
1644 }
1645
1646
1647 /* We provide both the mii-tools and the ethtool ioctls. */
1648 static int ioc3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1649 {
1650 struct ioc3_private *ip = dev->priv;
1651 struct ethtool_cmd *ep_user = (struct ethtool_cmd *) rq->ifr_data;
1652 u16 *data = (u16 *)&rq->ifr_data;
1653 struct ioc3 *ioc3 = ip->regs;
1654 struct ethtool_cmd ecmd;
1655
1656 switch (cmd) {
1657 case SIOCGMIIPHY: /* Get the address of the PHY in use. */
1658 if (ip->phy == -1)
1659 return -ENODEV;
1660 data[0] = ip->phy;
1661 return 0;
1662
1663 case SIOCGMIIREG: { /* Read a PHY register. */
1664 unsigned int phy = data[0];
1665 unsigned int reg = data[1];
1666
1667 if (phy > 0x1f || reg > 0x1f)
1668 return -EINVAL;
1669
1670 spin_lock_irq(&ip->ioc3_lock);
1671 while (ioc3->micr & MICR_BUSY);
1672 ioc3->micr = (phy << MICR_PHYADDR_SHIFT) | reg | MICR_READTRIG;
1673 while (ioc3->micr & MICR_BUSY);
1674 data[3] = (ioc3->midr_r & MIDR_DATA_MASK);
1675 spin_unlock_irq(&ip->ioc3_lock);
1676
1677 return 0;
1678
1679 case SIOCSMIIREG: /* Write a PHY register. */
1680 phy = data[0];
1681 reg = data[1];
1682
1683 if (!capable(CAP_NET_ADMIN))
1684 return -EPERM;
1685
1686 if (phy > 0x1f || reg > 0x1f)
1687 return -EINVAL;
1688
1689 spin_lock_irq(&ip->ioc3_lock);
1690 while (ioc3->micr & MICR_BUSY);
1691 ioc3->midr_w = data[2];
1692 ioc3->micr = (phy << MICR_PHYADDR_SHIFT) | reg;
1693 while (ioc3->micr & MICR_BUSY);
1694 spin_unlock_irq(&ip->ioc3_lock);
1695
1696 return 0;
1697 }
1698 case SIOCETHTOOL:
1699 if (copy_from_user(&ecmd, ep_user, sizeof(ecmd)))
1700 return -EFAULT;
1701
1702 if (ecmd.cmd == ETHTOOL_GSET) {
1703 ecmd.supported =
1704 (SUPPORTED_10baseT_Half |
1705 SUPPORTED_10baseT_Full |
1706 SUPPORTED_100baseT_Half |
1707 SUPPORTED_100baseT_Full | SUPPORTED_Autoneg |
1708 SUPPORTED_TP | SUPPORTED_MII);
1709
1710 ecmd.port = PORT_TP;
1711 ecmd.transceiver = XCVR_INTERNAL;
1712 ecmd.phy_address = ip->phy;
1713
1714 /* Record PHY settings. */
1715 spin_lock_irq(&ip->ioc3_lock);
1716 ip->sw_bmcr = mii_read(ip, MII_BMCR);
1717 ip->sw_lpa = mii_read(ip, MII_LPA);
1718 spin_unlock_irq(&ip->ioc3_lock);
1719 if (ip->sw_bmcr & BMCR_ANENABLE) {
1720 ecmd.autoneg = AUTONEG_ENABLE;
1721 ecmd.speed = (ip->sw_lpa &
1722 (LPA_100HALF | LPA_100FULL)) ?
1723 SPEED_100 : SPEED_10;
1724 if (ecmd.speed == SPEED_100)
1725 ecmd.duplex = (ip->sw_lpa & (LPA_100FULL)) ?
1726 DUPLEX_FULL : DUPLEX_HALF;
1727 else
1728 ecmd.duplex = (ip->sw_lpa & (LPA_10FULL)) ?
1729 DUPLEX_FULL : DUPLEX_HALF;
1730 } else {
1731 ecmd.autoneg = AUTONEG_DISABLE;
1732 ecmd.speed = (ip->sw_bmcr & BMCR_SPEED100) ?
1733 SPEED_100 : SPEED_10;
1734 ecmd.duplex = (ip->sw_bmcr & BMCR_FULLDPLX) ?
1735 DUPLEX_FULL : DUPLEX_HALF;
1736 }
1737 if (copy_to_user(ep_user, &ecmd, sizeof(ecmd)))
1738 return -EFAULT;
1739 return 0;
1740 } else if (ecmd.cmd == ETHTOOL_SSET) {
1741 if (!capable(CAP_NET_ADMIN))
1742 return -EPERM;
1743
1744 /* Verify the settings we care about. */
1745 if (ecmd.autoneg != AUTONEG_ENABLE &&
1746 ecmd.autoneg != AUTONEG_DISABLE)
1747 return -EINVAL;
1748
1749 if (ecmd.autoneg == AUTONEG_DISABLE &&
1750 ((ecmd.speed != SPEED_100 &&
1751 ecmd.speed != SPEED_10) ||
1752 (ecmd.duplex != DUPLEX_HALF &&
1753 ecmd.duplex != DUPLEX_FULL)))
1754 return -EINVAL;
1755
1756 /* Ok, do it to it. */
1757 del_timer(&ip->ioc3_timer);
1758 spin_lock_irq(&ip->ioc3_lock);
1759 ioc3_start_auto_negotiation(ip, &ecmd);
1760 spin_unlock_irq(&ip->ioc3_lock);
1761
1762 return 0;
1763 } else
1764 default:
1765 return -EOPNOTSUPP;
1766 }
1767
1768 return -EOPNOTSUPP;
1769 }
1770
1771 static void ioc3_set_multicast_list(struct net_device *dev)
1772 {
1773 struct dev_mc_list *dmi = dev->mc_list;
1774 struct ioc3_private *ip = dev->priv;
1775 struct ioc3 *ioc3 = ip->regs;
1776 u64 ehar = 0;
1777 int i;
1778
1779 netif_stop_queue(dev); /* Lock out others. */
1780
1781 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1782 /* Unconditionally log net taps. */
1783 printk(KERN_INFO "%s: Promiscuous mode enabled.\n", dev->name);
1784 ip->emcr |= EMCR_PROMISC;
1785 ioc3->emcr = ip->emcr;
1786 ioc3->emcr;
1787 } else {
1788 ip->emcr &= ~EMCR_PROMISC;
1789 ioc3->emcr = ip->emcr; /* Clear promiscuous. */
1790 ioc3->emcr;
1791
1792 if ((dev->flags & IFF_ALLMULTI) || (dev->mc_count > 64)) {
1793 /* Too many for hashing to make sense or we want all
1794 multicast packets anyway, so skip computing all the
1795 hashes and just accept all packets. */
1796 ip->ehar_h = 0xffffffff;
1797 ip->ehar_l = 0xffffffff;
1798 } else {
1799 for (i = 0; i < dev->mc_count; i++) {
1800 char *addr = dmi->dmi_addr;
1801 dmi = dmi->next;
1802
1803 if (!(*addr & 1))
1804 continue;
1805
1806 ehar |= (1UL << ioc3_hash(addr));
1807 }
1808 ip->ehar_h = ehar >> 32;
1809 ip->ehar_l = ehar & 0xffffffff;
1810 }
1811 ioc3->ehar_h = ip->ehar_h;
1812 ioc3->ehar_l = ip->ehar_l;
1813 }
1814
1815 netif_wake_queue(dev); /* Let us get going again. */
1816 }
1817
1818 MODULE_AUTHOR("Ralf Baechle <ralf@oss.sgi.com>");
1819 MODULE_DESCRIPTION("SGI IOC3 Ethernet driver");
1820
1821 module_init(ioc3_init_module);
1822 module_exit(ioc3_cleanup_module);
1823