File: /usr/src/linux/drivers/net/irda/nsc-ircc.c
1 /*********************************************************************
2 *
3 * Filename: nsc-ircc.c
4 * Version: 1.0
5 * Description: Driver for the NSC PC'108 and PC'338 IrDA chipsets
6 * Status: Stable.
7 * Author: Dag Brattli <dagb@cs.uit.no>
8 * Created at: Sat Nov 7 21:43:15 1998
9 * Modified at: Wed Mar 1 11:29:34 2000
10 * Modified by: Dag Brattli <dagb@cs.uit.no>
11 *
12 * Copyright (c) 1998-2000 Dag Brattli <dagb@cs.uit.no>
13 * Copyright (c) 1998 Lichen Wang, <lwang@actisys.com>
14 * Copyright (c) 1998 Actisys Corp., www.actisys.com
15 * All Rights Reserved
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * Neither Dag Brattli nor University of Tromsų admit liability nor
23 * provide warranty for any of this software. This material is
24 * provided "AS-IS" and at no charge.
25 *
26 * Notice that all functions that needs to access the chip in _any_
27 * way, must save BSR register on entry, and restore it on exit.
28 * It is _very_ important to follow this policy!
29 *
30 * __u8 bank;
31 *
32 * bank = inb(iobase+BSR);
33 *
34 * do_your_stuff_here();
35 *
36 * outb(bank, iobase+BSR);
37 *
38 * If you find bugs in this file, its very likely that the same bug
39 * will also be in w83977af_ir.c since the implementations are quite
40 * similar.
41 *
42 ********************************************************************/
43
44 #include <linux/module.h>
45
46 #include <linux/kernel.h>
47 #include <linux/types.h>
48 #include <linux/skbuff.h>
49 #include <linux/netdevice.h>
50 #include <linux/ioport.h>
51 #include <linux/delay.h>
52 #include <linux/slab.h>
53 #include <linux/init.h>
54 #include <linux/rtnetlink.h>
55
56 #include <asm/io.h>
57 #include <asm/dma.h>
58 #include <asm/byteorder.h>
59
60 #include <linux/pm.h>
61
62 #include <net/irda/wrapper.h>
63 #include <net/irda/irda.h>
64 #include <net/irda/irmod.h>
65 #include <net/irda/irlap_frame.h>
66 #include <net/irda/irda_device.h>
67
68 #include <net/irda/nsc-ircc.h>
69
70 #define CHIP_IO_EXTENT 8
71 #define BROKEN_DONGLE_ID
72
73 static char *driver_name = "nsc-ircc";
74
75 /* Module parameters */
76 static int qos_mtt_bits = 0x07; /* 1 ms or more */
77 static int dongle_id;
78
79 /* Use BIOS settions by default, but user may supply module parameters */
80 static unsigned int io[] = { ~0, ~0, ~0, ~0 };
81 static unsigned int irq[] = { 0, 0, 0, 0, 0 };
82 static unsigned int dma[] = { 0, 0, 0, 0, 0 };
83
84 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info);
85 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info);
86 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info);
87 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info);
88
89 /* These are the known NSC chips */
90 static nsc_chip_t chips[] = {
91 { "PC87108", { 0x150, 0x398, 0xea }, 0x05, 0x10, 0xf0,
92 nsc_ircc_probe_108, nsc_ircc_init_108 },
93 { "PC87338", { 0x398, 0x15c, 0x2e }, 0x08, 0xb0, 0xf8,
94 nsc_ircc_probe_338, nsc_ircc_init_338 },
95 { NULL }
96 };
97
98 /* Max 4 instances for now */
99 static struct nsc_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL };
100
101 static char *dongle_types[] = {
102 "Differential serial interface",
103 "Differential serial interface",
104 "Reserved",
105 "Reserved",
106 "Sharp RY5HD01",
107 "Reserved",
108 "Single-ended serial interface",
109 "Consumer-IR only",
110 "HP HSDL-2300, HP HSDL-3600/HSDL-3610",
111 "IBM31T1100 or Temic TFDS6000/TFDS6500",
112 "Reserved",
113 "Reserved",
114 "HP HSDL-1100/HSDL-2100",
115 "HP HSDL-1100/HSDL-2100"
116 "Supports SIR Mode only",
117 "No dongle connected",
118 };
119
120 /* Some prototypes */
121 static int nsc_ircc_open(int i, chipio_t *info);
122 #ifdef MODULE
123 static int nsc_ircc_close(struct nsc_ircc_cb *self);
124 #endif /* MODULE */
125 static int nsc_ircc_setup(chipio_t *info);
126 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self);
127 static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self);
128 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase);
129 static int nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev);
130 static int nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev);
131 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
132 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase);
133 static void nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 baud);
134 static void nsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *regs);
135 static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self);
136 static int nsc_ircc_read_dongle_id (int iobase);
137 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id);
138
139 static int nsc_ircc_net_init(struct net_device *dev);
140 static int nsc_ircc_net_open(struct net_device *dev);
141 static int nsc_ircc_net_close(struct net_device *dev);
142 static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
143 static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev);
144 static int nsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data);
145
146 /*
147 * Function nsc_ircc_init ()
148 *
149 * Initialize chip. Just try to find out how many chips we are dealing with
150 * and where they are
151 */
152 int __init nsc_ircc_init(void)
153 {
154 chipio_t info;
155 nsc_chip_t *chip;
156 int ret = -ENODEV;
157 int cfg_base;
158 int cfg, id;
159 int reg;
160 int i = 0;
161
162 /* Probe for all the NSC chipsets we know about */
163 for (chip=chips; chip->name ; chip++) {
164 IRDA_DEBUG(2, __FUNCTION__"(), Probing for %s ...\n",
165 chip->name);
166
167 /* Try all config registers for this chip */
168 for (cfg=0; cfg<3; cfg++) {
169 cfg_base = chip->cfg[cfg];
170 if (!cfg_base)
171 continue;
172
173 memset(&info, 0, sizeof(chipio_t));
174 info.cfg_base = cfg_base;
175 info.fir_base = io[i];
176 info.dma = dma[i];
177 info.irq = irq[i];
178
179 /* Read index register */
180 reg = inb(cfg_base);
181 if (reg == 0xff) {
182 IRDA_DEBUG(2, __FUNCTION__
183 "() no chip at 0x%03x\n", cfg_base);
184 continue;
185 }
186
187 /* Read chip identification register */
188 outb(chip->cid_index, cfg_base);
189 id = inb(cfg_base+1);
190 if ((id & chip->cid_mask) == chip->cid_value) {
191 IRDA_DEBUG(2, __FUNCTION__
192 "() Found %s chip, revision=%d\n",
193 chip->name, id & ~chip->cid_mask);
194 /*
195 * If the user supplies the base address, then
196 * we init the chip, if not we probe the values
197 * set by the BIOS
198 */
199 if (io[i] < 0x2000) {
200 chip->init(chip, &info);
201 } else
202 chip->probe(chip, &info);
203
204 if (nsc_ircc_open(i, &info) == 0)
205 ret = 0;
206 i++;
207 } else {
208 IRDA_DEBUG(2, __FUNCTION__
209 "(), Wrong chip id=0x%02x\n", id);
210 }
211 }
212
213 }
214
215 return ret;
216 }
217
218 /*
219 * Function nsc_ircc_cleanup ()
220 *
221 * Close all configured chips
222 *
223 */
224 #ifdef MODULE
225 static void nsc_ircc_cleanup(void)
226 {
227 int i;
228
229 pm_unregister_all(nsc_ircc_pmproc);
230
231 for (i=0; i < 4; i++) {
232 if (dev_self[i])
233 nsc_ircc_close(dev_self[i]);
234 }
235 }
236 #endif /* MODULE */
237
238 /*
239 * Function nsc_ircc_open (iobase, irq)
240 *
241 * Open driver instance
242 *
243 */
244 static int nsc_ircc_open(int i, chipio_t *info)
245 {
246 struct net_device *dev;
247 struct nsc_ircc_cb *self;
248 struct pm_dev *pmdev;
249 int ret;
250 int err;
251
252 IRDA_DEBUG(2, __FUNCTION__ "()\n");
253
254 MESSAGE("%s, Found chip at base=0x%03x\n", driver_name,
255 info->cfg_base);
256
257 if ((nsc_ircc_setup(info)) == -1)
258 return -1;
259
260 MESSAGE("%s, driver loaded (Dag Brattli)\n", driver_name);
261
262 /* Allocate new instance of the driver */
263 self = kmalloc(sizeof(struct nsc_ircc_cb), GFP_KERNEL);
264 if (self == NULL) {
265 ERROR(__FUNCTION__ "(), can't allocate memory for "
266 "control block!\n");
267 return -ENOMEM;
268 }
269 memset(self, 0, sizeof(struct nsc_ircc_cb));
270 spin_lock_init(&self->lock);
271
272 /* Need to store self somewhere */
273 dev_self[i] = self;
274 self->index = i;
275
276 /* Initialize IO */
277 self->io.cfg_base = info->cfg_base;
278 self->io.fir_base = info->fir_base;
279 self->io.irq = info->irq;
280 self->io.fir_ext = CHIP_IO_EXTENT;
281 self->io.dma = info->dma;
282 self->io.fifo_size = 32;
283
284 /* Reserve the ioports that we need */
285 ret = check_region(self->io.fir_base, self->io.fir_ext);
286 if (ret < 0) {
287 WARNING(__FUNCTION__ "(), can't get iobase of 0x%03x\n",
288 self->io.fir_base);
289 dev_self[i] = NULL;
290 kfree(self);
291 return -ENODEV;
292 }
293 request_region(self->io.fir_base, self->io.fir_ext, driver_name);
294
295 /* Initialize QoS for this device */
296 irda_init_max_qos_capabilies(&self->qos);
297
298 /* The only value we must override it the baudrate */
299 self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
300 IR_115200|IR_576000|IR_1152000 |(IR_4000000 << 8);
301
302 self->qos.min_turn_time.bits = qos_mtt_bits;
303 irda_qos_bits_to_value(&self->qos);
304
305 self->flags = IFF_FIR|IFF_MIR|IFF_SIR|IFF_DMA|IFF_PIO|IFF_DONGLE;
306
307 /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
308 self->rx_buff.truesize = 14384;
309 self->tx_buff.truesize = 14384;
310
311 /* Allocate memory if needed */
312 self->rx_buff.head = (__u8 *) kmalloc(self->rx_buff.truesize,
313 GFP_KERNEL|GFP_DMA);
314 if (self->rx_buff.head == NULL) {
315 kfree(self);
316 return -ENOMEM;
317 }
318 memset(self->rx_buff.head, 0, self->rx_buff.truesize);
319
320 self->tx_buff.head = (__u8 *) kmalloc(self->tx_buff.truesize,
321 GFP_KERNEL|GFP_DMA);
322 if (self->tx_buff.head == NULL) {
323 kfree(self->rx_buff.head);
324 kfree(self);
325 return -ENOMEM;
326 }
327 memset(self->tx_buff.head, 0, self->tx_buff.truesize);
328
329 self->rx_buff.in_frame = FALSE;
330 self->rx_buff.state = OUTSIDE_FRAME;
331 self->tx_buff.data = self->tx_buff.head;
332 self->rx_buff.data = self->rx_buff.head;
333
334 /* Reset Tx queue info */
335 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
336 self->tx_fifo.tail = self->tx_buff.head;
337
338 if (!(dev = dev_alloc("irda%d", &err))) {
339 ERROR(__FUNCTION__ "(), dev_alloc() failed!\n");
340 return -ENOMEM;
341 }
342
343 dev->priv = (void *) self;
344 self->netdev = dev;
345
346 /* Override the network functions we need to use */
347 dev->init = nsc_ircc_net_init;
348 dev->hard_start_xmit = nsc_ircc_hard_xmit_sir;
349 dev->open = nsc_ircc_net_open;
350 dev->stop = nsc_ircc_net_close;
351 dev->do_ioctl = nsc_ircc_net_ioctl;
352 dev->get_stats = nsc_ircc_net_get_stats;
353
354 rtnl_lock();
355 err = register_netdevice(dev);
356 rtnl_unlock();
357 if (err) {
358 ERROR(__FUNCTION__ "(), register_netdev() failed!\n");
359 return -1;
360 }
361 MESSAGE("IrDA: Registered device %s\n", dev->name);
362
363 /* Check if user has supplied the dongle id or not */
364 if (!dongle_id) {
365 dongle_id = nsc_ircc_read_dongle_id(self->io.fir_base);
366
367 MESSAGE("%s, Found dongle: %s\n", driver_name,
368 dongle_types[dongle_id]);
369 } else {
370 MESSAGE("%s, Using dongle: %s\n", driver_name,
371 dongle_types[dongle_id]);
372 }
373
374 self->io.dongle_id = dongle_id;
375 nsc_ircc_init_dongle_interface(self->io.fir_base, dongle_id);
376
377 pmdev = pm_register(PM_SYS_DEV, PM_SYS_IRDA, nsc_ircc_pmproc);
378 if (pmdev)
379 pmdev->data = self;
380
381 return 0;
382 }
383
384 #ifdef MODULE
385 /*
386 * Function nsc_ircc_close (self)
387 *
388 * Close driver instance
389 *
390 */
391 static int nsc_ircc_close(struct nsc_ircc_cb *self)
392 {
393 int iobase;
394
395 IRDA_DEBUG(4, __FUNCTION__ "()\n");
396
397 ASSERT(self != NULL, return -1;);
398
399 iobase = self->io.fir_base;
400
401 /* Remove netdevice */
402 if (self->netdev) {
403 rtnl_lock();
404 unregister_netdevice(self->netdev);
405 rtnl_unlock();
406 }
407
408 /* Release the PORT that this driver is using */
409 IRDA_DEBUG(4, __FUNCTION__ "(), Releasing Region %03x\n",
410 self->io.fir_base);
411 release_region(self->io.fir_base, self->io.fir_ext);
412
413 if (self->tx_buff.head)
414 kfree(self->tx_buff.head);
415
416 if (self->rx_buff.head)
417 kfree(self->rx_buff.head);
418
419 dev_self[self->index] = NULL;
420 kfree(self);
421
422 return 0;
423 }
424 #endif /* MODULE */
425
426 /*
427 * Function nsc_ircc_init_108 (iobase, cfg_base, irq, dma)
428 *
429 * Initialize the NSC '108 chip
430 *
431 */
432 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info)
433 {
434 int cfg_base = info->cfg_base;
435 __u8 temp=0;
436
437 outb(2, cfg_base); /* Mode Control Register (MCTL) */
438 outb(0x00, cfg_base+1); /* Disable device */
439
440 /* Base Address and Interrupt Control Register (BAIC) */
441 outb(0, cfg_base);
442 switch (info->fir_base) {
443 case 0x3e8: outb(0x14, cfg_base+1); break;
444 case 0x2e8: outb(0x15, cfg_base+1); break;
445 case 0x3f8: outb(0x16, cfg_base+1); break;
446 case 0x2f8: outb(0x17, cfg_base+1); break;
447 default: ERROR(__FUNCTION__ "(), invalid base_address");
448 }
449
450 /* Control Signal Routing Register (CSRT) */
451 switch (info->irq) {
452 case 3: temp = 0x01; break;
453 case 4: temp = 0x02; break;
454 case 5: temp = 0x03; break;
455 case 7: temp = 0x04; break;
456 case 9: temp = 0x05; break;
457 case 11: temp = 0x06; break;
458 case 15: temp = 0x07; break;
459 default: ERROR(__FUNCTION__ "(), invalid irq");
460 }
461 outb(1, cfg_base);
462
463 switch (info->dma) {
464 case 0: outb(0x08+temp, cfg_base+1); break;
465 case 1: outb(0x10+temp, cfg_base+1); break;
466 case 3: outb(0x18+temp, cfg_base+1); break;
467 default: ERROR(__FUNCTION__ "(), invalid dma");
468 }
469
470 outb(2, cfg_base); /* Mode Control Register (MCTL) */
471 outb(0x03, cfg_base+1); /* Enable device */
472
473 return 0;
474 }
475
476 /*
477 * Function nsc_ircc_probe_108 (chip, info)
478 *
479 *
480 *
481 */
482 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info)
483 {
484 int cfg_base = info->cfg_base;
485 int reg;
486
487 /* Read address and interrupt control register (BAIC) */
488 outb(CFG_BAIC, cfg_base);
489 reg = inb(cfg_base+1);
490
491 switch (reg & 0x03) {
492 case 0:
493 info->fir_base = 0x3e8;
494 break;
495 case 1:
496 info->fir_base = 0x2e8;
497 break;
498 case 2:
499 info->fir_base = 0x3f8;
500 break;
501 case 3:
502 info->fir_base = 0x2f8;
503 break;
504 }
505 info->sir_base = info->fir_base;
506 IRDA_DEBUG(2, __FUNCTION__ "(), probing fir_base=0x%03x\n",
507 info->fir_base);
508
509 /* Read control signals routing register (CSRT) */
510 outb(CFG_CSRT, cfg_base);
511 reg = inb(cfg_base+1);
512
513 switch (reg & 0x07) {
514 case 0:
515 info->irq = -1;
516 break;
517 case 1:
518 info->irq = 3;
519 break;
520 case 2:
521 info->irq = 4;
522 break;
523 case 3:
524 info->irq = 5;
525 break;
526 case 4:
527 info->irq = 7;
528 break;
529 case 5:
530 info->irq = 9;
531 break;
532 case 6:
533 info->irq = 11;
534 break;
535 case 7:
536 info->irq = 15;
537 break;
538 }
539 IRDA_DEBUG(2, __FUNCTION__ "(), probing irq=%d\n", info->irq);
540
541 /* Currently we only read Rx DMA but it will also be used for Tx */
542 switch ((reg >> 3) & 0x03) {
543 case 0:
544 info->dma = -1;
545 break;
546 case 1:
547 info->dma = 0;
548 break;
549 case 2:
550 info->dma = 1;
551 break;
552 case 3:
553 info->dma = 3;
554 break;
555 }
556 IRDA_DEBUG(2, __FUNCTION__ "(), probing dma=%d\n", info->dma);
557
558 /* Read mode control register (MCTL) */
559 outb(CFG_MCTL, cfg_base);
560 reg = inb(cfg_base+1);
561
562 info->enabled = reg & 0x01;
563 info->suspended = !((reg >> 1) & 0x01);
564
565 return 0;
566 }
567
568 /*
569 * Function nsc_ircc_init_338 (chip, info)
570 *
571 * Initialize the NSC '338 chip. Remember that the 87338 needs two
572 * consecutive writes to the data registers while CPU interrupts are
573 * disabled. The 97338 does not require this, but shouldn't be any
574 * harm if we do it anyway.
575 */
576 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info)
577 {
578 /* No init yet */
579
580 return 0;
581 }
582
583 /*
584 * Function nsc_ircc_probe_338 (chip, info)
585 *
586 *
587 *
588 */
589 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info)
590 {
591 int cfg_base = info->cfg_base;
592 int reg, com = 0;
593 int pnp;
594
595 /* Read funtion enable register (FER) */
596 outb(CFG_FER, cfg_base);
597 reg = inb(cfg_base+1);
598
599 info->enabled = (reg >> 2) & 0x01;
600
601 /* Check if we are in Legacy or PnP mode */
602 outb(CFG_PNP0, cfg_base);
603 reg = inb(cfg_base+1);
604
605 pnp = (reg >> 3) & 0x01;
606 if (pnp) {
607 IRDA_DEBUG(2, "(), Chip is in PnP mode\n");
608 outb(0x46, cfg_base);
609 reg = (inb(cfg_base+1) & 0xfe) << 2;
610
611 outb(0x47, cfg_base);
612 reg |= ((inb(cfg_base+1) & 0xfc) << 8);
613
614 info->fir_base = reg;
615 } else {
616 /* Read function address register (FAR) */
617 outb(CFG_FAR, cfg_base);
618 reg = inb(cfg_base+1);
619
620 switch ((reg >> 4) & 0x03) {
621 case 0:
622 info->fir_base = 0x3f8;
623 break;
624 case 1:
625 info->fir_base = 0x2f8;
626 break;
627 case 2:
628 com = 3;
629 break;
630 case 3:
631 com = 4;
632 break;
633 }
634
635 if (com) {
636 switch ((reg >> 6) & 0x03) {
637 case 0:
638 if (com == 3)
639 info->fir_base = 0x3e8;
640 else
641 info->fir_base = 0x2e8;
642 break;
643 case 1:
644 if (com == 3)
645 info->fir_base = 0x338;
646 else
647 info->fir_base = 0x238;
648 break;
649 case 2:
650 if (com == 3)
651 info->fir_base = 0x2e8;
652 else
653 info->fir_base = 0x2e0;
654 break;
655 case 3:
656 if (com == 3)
657 info->fir_base = 0x220;
658 else
659 info->fir_base = 0x228;
660 break;
661 }
662 }
663 }
664 info->sir_base = info->fir_base;
665
666 /* Read PnP register 1 (PNP1) */
667 outb(CFG_PNP1, cfg_base);
668 reg = inb(cfg_base+1);
669
670 info->irq = reg >> 4;
671
672 /* Read PnP register 3 (PNP3) */
673 outb(CFG_PNP3, cfg_base);
674 reg = inb(cfg_base+1);
675
676 info->dma = (reg & 0x07) - 1;
677
678 /* Read power and test register (PTR) */
679 outb(CFG_PTR, cfg_base);
680 reg = inb(cfg_base+1);
681
682 info->suspended = reg & 0x01;
683
684 return 0;
685 }
686
687 /*
688 * Function nsc_ircc_setup (info)
689 *
690 * Returns non-negative on success.
691 *
692 */
693 static int nsc_ircc_setup(chipio_t *info)
694 {
695 int version;
696 int iobase = info->fir_base;
697
698 /* Read the Module ID */
699 switch_bank(iobase, BANK3);
700 version = inb(iobase+MID);
701
702 /* Should be 0x2? */
703 if (0x20 != (version & 0xf0)) {
704 ERROR("%s, Wrong chip version %02x\n", driver_name, version);
705 return -1;
706 }
707
708 /* Switch to advanced mode */
709 switch_bank(iobase, BANK2);
710 outb(ECR1_EXT_SL, iobase+ECR1);
711 switch_bank(iobase, BANK0);
712
713 /* Set FIFO threshold to TX17, RX16, reset and enable FIFO's */
714 switch_bank(iobase, BANK0);
715 outb(FCR_RXTH|FCR_TXTH|FCR_TXSR|FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
716
717 outb(0x03, iobase+LCR); /* 8 bit word length */
718 outb(MCR_SIR, iobase+MCR); /* Start at SIR-mode, also clears LSR*/
719
720 /* Set FIFO size to 32 */
721 switch_bank(iobase, BANK2);
722 outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
723
724 /* IRCR2: FEND_MD is not set */
725 switch_bank(iobase, BANK5);
726 outb(0x02, iobase+4);
727
728 /* Make sure that some defaults are OK */
729 switch_bank(iobase, BANK6);
730 outb(0x20, iobase+0); /* Set 32 bits FIR CRC */
731 outb(0x0a, iobase+1); /* Set MIR pulse width */
732 outb(0x0d, iobase+2); /* Set SIR pulse width to 1.6us */
733 outb(0x2a, iobase+4); /* Set beginning frag, and preamble length */
734
735 /* Enable receive interrupts */
736 switch_bank(iobase, BANK0);
737 outb(IER_RXHDL_IE, iobase+IER);
738
739 return 0;
740 }
741
742 /*
743 * Function nsc_ircc_read_dongle_id (void)
744 *
745 * Try to read dongle indentification. This procedure needs to be executed
746 * once after power-on/reset. It also needs to be used whenever you suspect
747 * that the user may have plugged/unplugged the IrDA Dongle.
748 */
749 static int nsc_ircc_read_dongle_id (int iobase)
750 {
751 int dongle_id;
752 __u8 bank;
753
754 bank = inb(iobase+BSR);
755
756 /* Select Bank 7 */
757 switch_bank(iobase, BANK7);
758
759 /* IRCFG4: IRSL0_DS and IRSL21_DS are cleared */
760 outb(0x00, iobase+7);
761
762 /* ID0, 1, and 2 are pulled up/down very slowly */
763 udelay(50);
764
765 /* IRCFG1: read the ID bits */
766 dongle_id = inb(iobase+4) & 0x0f;
767
768 #ifdef BROKEN_DONGLE_ID
769 if (dongle_id == 0x0a)
770 dongle_id = 0x09;
771 #endif
772 /* Go back to bank 0 before returning */
773 switch_bank(iobase, BANK0);
774
775 outb(bank, iobase+BSR);
776
777 return dongle_id;
778 }
779
780 /*
781 * Function nsc_ircc_init_dongle_interface (iobase, dongle_id)
782 *
783 * This function initializes the dongle for the transceiver that is
784 * used. This procedure needs to be executed once after
785 * power-on/reset. It also needs to be used whenever you suspect that
786 * the dongle is changed.
787 */
788 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id)
789 {
790 int bank;
791
792 /* Save current bank */
793 bank = inb(iobase+BSR);
794
795 /* Select Bank 7 */
796 switch_bank(iobase, BANK7);
797
798 /* IRCFG4: set according to dongle_id */
799 switch (dongle_id) {
800 case 0x00: /* same as */
801 case 0x01: /* Differential serial interface */
802 IRDA_DEBUG(0, __FUNCTION__ "(), %s not defined by irda yet\n",
803 dongle_types[dongle_id]);
804 break;
805 case 0x02: /* same as */
806 case 0x03: /* Reserved */
807 IRDA_DEBUG(0, __FUNCTION__ "(), %s not defined by irda yet\n",
808 dongle_types[dongle_id]);
809 break;
810 case 0x04: /* Sharp RY5HD01 */
811 break;
812 case 0x05: /* Reserved, but this is what the Thinkpad reports */
813 IRDA_DEBUG(0, __FUNCTION__ "(), %s not defined by irda yet\n",
814 dongle_types[dongle_id]);
815 break;
816 case 0x06: /* Single-ended serial interface */
817 IRDA_DEBUG(0, __FUNCTION__ "(), %s not defined by irda yet\n",
818 dongle_types[dongle_id]);
819 break;
820 case 0x07: /* Consumer-IR only */
821 IRDA_DEBUG(0, __FUNCTION__ "(), %s is not for IrDA mode\n",
822 dongle_types[dongle_id]);
823 break;
824 case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
825 IRDA_DEBUG(0, __FUNCTION__ "(), %s\n",
826 dongle_types[dongle_id]);
827 break;
828 case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
829 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
830 break;
831 case 0x0A: /* same as */
832 case 0x0B: /* Reserved */
833 IRDA_DEBUG(0, __FUNCTION__ "(), %s not defined by irda yet\n",
834 dongle_types[dongle_id]);
835 break;
836 case 0x0C: /* same as */
837 case 0x0D: /* HP HSDL-1100/HSDL-2100 */
838 /*
839 * Set irsl0 as input, irsl[1-2] as output, and separate
840 * inputs are used for SIR and MIR/FIR
841 */
842 outb(0x48, iobase+7);
843 break;
844 case 0x0E: /* Supports SIR Mode only */
845 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
846 break;
847 case 0x0F: /* No dongle connected */
848 IRDA_DEBUG(0, __FUNCTION__ "(), %s\n",
849 dongle_types[dongle_id]);
850
851 switch_bank(iobase, BANK0);
852 outb(0x62, iobase+MCR);
853 break;
854 default:
855 IRDA_DEBUG(0, __FUNCTION__ "(), invalid dongle_id %#x",
856 dongle_id);
857 }
858
859 /* IRCFG1: IRSL1 and 2 are set to IrDA mode */
860 outb(0x00, iobase+4);
861
862 /* Restore bank register */
863 outb(bank, iobase+BSR);
864
865 } /* set_up_dongle_interface */
866
867 /*
868 * Function nsc_ircc_change_dongle_speed (iobase, speed, dongle_id)
869 *
870 * Change speed of the attach dongle
871 *
872 */
873 static void nsc_ircc_change_dongle_speed(int iobase, int speed, int dongle_id)
874 {
875 unsigned long flags;
876 __u8 bank;
877
878 /* Save current bank */
879 bank = inb(iobase+BSR);
880
881 /* Select Bank 7 */
882 switch_bank(iobase, BANK7);
883
884 /* IRCFG1: set according to dongle_id */
885 switch (dongle_id) {
886 case 0x00: /* same as */
887 case 0x01: /* Differential serial interface */
888 IRDA_DEBUG(0, __FUNCTION__ "(), %s not defined by irda yet\n",
889 dongle_types[dongle_id]);
890 break;
891 case 0x02: /* same as */
892 case 0x03: /* Reserved */
893 IRDA_DEBUG(0, __FUNCTION__ "(), %s not defined by irda yet\n",
894 dongle_types[dongle_id]);
895 break;
896 case 0x04: /* Sharp RY5HD01 */
897 break;
898 case 0x05: /* Reserved */
899 IRDA_DEBUG(0, __FUNCTION__ "(), %s not defined by irda yet\n",
900 dongle_types[dongle_id]);
901 break;
902 case 0x06: /* Single-ended serial interface */
903 IRDA_DEBUG(0, __FUNCTION__ "(), %s not defined by irda yet\n",
904 dongle_types[dongle_id]);
905 break;
906 case 0x07: /* Consumer-IR only */
907 IRDA_DEBUG(0, __FUNCTION__ "(), %s is not for IrDA mode\n",
908 dongle_types[dongle_id]);
909 break;
910 case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
911 IRDA_DEBUG(0, __FUNCTION__ "(), %s\n",
912 dongle_types[dongle_id]);
913 outb(0x00, iobase+4);
914 if (speed > 115200)
915 outb(0x01, iobase+4);
916 break;
917 case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
918 outb(0x01, iobase+4);
919
920 if (speed == 4000000) {
921 save_flags(flags);
922 cli();
923 outb(0x81, iobase+4);
924 outb(0x80, iobase+4);
925 restore_flags(flags);
926 } else
927 outb(0x00, iobase+4);
928 break;
929 case 0x0A: /* same as */
930 case 0x0B: /* Reserved */
931 IRDA_DEBUG(0, __FUNCTION__ "(), %s not defined by irda yet\n",
932 dongle_types[dongle_id]);
933 break;
934 case 0x0C: /* same as */
935 case 0x0D: /* HP HSDL-1100/HSDL-2100 */
936 break;
937 case 0x0E: /* Supports SIR Mode only */
938 break;
939 case 0x0F: /* No dongle connected */
940 IRDA_DEBUG(0, __FUNCTION__ "(), %s is not for IrDA mode\n",
941 dongle_types[dongle_id]);
942
943 switch_bank(iobase, BANK0);
944 outb(0x62, iobase+MCR);
945 break;
946 default:
947 IRDA_DEBUG(0, __FUNCTION__ "(), invalid data_rate\n");
948 }
949 /* Restore bank register */
950 outb(bank, iobase+BSR);
951 }
952
953 /*
954 * Function nsc_ircc_change_speed (self, baud)
955 *
956 * Change the speed of the device
957 *
958 */
959 static void nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 speed)
960 {
961 struct net_device *dev = self->netdev;
962 __u8 mcr = MCR_SIR;
963 int iobase;
964 __u8 bank;
965
966 IRDA_DEBUG(2, __FUNCTION__ "(), speed=%d\n", speed);
967
968 ASSERT(self != NULL, return;);
969
970 iobase = self->io.fir_base;
971
972 /* Update accounting for new speed */
973 self->io.speed = speed;
974
975 /* Save current bank */
976 bank = inb(iobase+BSR);
977
978 /* Disable interrupts */
979 switch_bank(iobase, BANK0);
980 outb(0, iobase+IER);
981
982 /* Select Bank 2 */
983 switch_bank(iobase, BANK2);
984
985 outb(0x00, iobase+BGDH);
986 switch (speed) {
987 case 9600: outb(0x0c, iobase+BGDL); break;
988 case 19200: outb(0x06, iobase+BGDL); break;
989 case 38400: outb(0x03, iobase+BGDL); break;
990 case 57600: outb(0x02, iobase+BGDL); break;
991 case 115200: outb(0x01, iobase+BGDL); break;
992 case 576000:
993 switch_bank(iobase, BANK5);
994
995 /* IRCR2: MDRS is set */
996 outb(inb(iobase+4) | 0x04, iobase+4);
997
998 mcr = MCR_MIR;
999 IRDA_DEBUG(0, __FUNCTION__ "(), handling baud of 576000\n");
1000 break;
1001 case 1152000:
1002 mcr = MCR_MIR;
1003 IRDA_DEBUG(0, __FUNCTION__ "(), handling baud of 1152000\n");
1004 break;
1005 case 4000000:
1006 mcr = MCR_FIR;
1007 IRDA_DEBUG(0, __FUNCTION__ "(), handling baud of 4000000\n");
1008 break;
1009 default:
1010 mcr = MCR_FIR;
1011 IRDA_DEBUG(0, __FUNCTION__ "(), unknown baud rate of %d\n",
1012 speed);
1013 break;
1014 }
1015
1016 /* Set appropriate speed mode */
1017 switch_bank(iobase, BANK0);
1018 outb(mcr | MCR_TX_DFR, iobase+MCR);
1019
1020 /* Give some hits to the transceiver */
1021 nsc_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id);
1022
1023 /* Set FIFO threshold to TX17, RX16 */
1024 switch_bank(iobase, BANK0);
1025 outb(0x00, iobase+FCR);
1026 outb(FCR_FIFO_EN, iobase+FCR);
1027 outb(FCR_RXTH| /* Set Rx FIFO threshold */
1028 FCR_TXTH| /* Set Tx FIFO threshold */
1029 FCR_TXSR| /* Reset Tx FIFO */
1030 FCR_RXSR| /* Reset Rx FIFO */
1031 FCR_FIFO_EN, /* Enable FIFOs */
1032 iobase+FCR);
1033
1034 /* Set FIFO size to 32 */
1035 switch_bank(iobase, BANK2);
1036 outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
1037
1038 /* Enable some interrupts so we can receive frames */
1039 switch_bank(iobase, BANK0);
1040 if (speed > 115200) {
1041 /* Install FIR xmit handler */
1042 dev->hard_start_xmit = nsc_ircc_hard_xmit_fir;
1043 outb(IER_SFIF_IE, iobase+IER);
1044 nsc_ircc_dma_receive(self);
1045 } else {
1046 /* Install SIR xmit handler */
1047 dev->hard_start_xmit = nsc_ircc_hard_xmit_sir;
1048 outb(IER_RXHDL_IE, iobase+IER);
1049 }
1050
1051 /* Restore BSR */
1052 outb(bank, iobase+BSR);
1053 netif_wake_queue(dev);
1054
1055 }
1056
1057 /*
1058 * Function nsc_ircc_hard_xmit (skb, dev)
1059 *
1060 * Transmit the frame!
1061 *
1062 */
1063 static int nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev)
1064 {
1065 struct nsc_ircc_cb *self;
1066 unsigned long flags;
1067 int iobase;
1068 __s32 speed;
1069 __u8 bank;
1070
1071 self = (struct nsc_ircc_cb *) dev->priv;
1072
1073 ASSERT(self != NULL, return 0;);
1074
1075 iobase = self->io.fir_base;
1076
1077 netif_stop_queue(dev);
1078
1079 /* Check if we need to change the speed */
1080 speed = irda_get_next_speed(skb);
1081 if ((speed != self->io.speed) && (speed != -1)) {
1082 /* Check for empty frame */
1083 if (!skb->len) {
1084 nsc_ircc_change_speed(self, speed);
1085 dev_kfree_skb(skb);
1086 return 0;
1087 } else
1088 self->new_speed = speed;
1089 }
1090
1091 spin_lock_irqsave(&self->lock, flags);
1092
1093 /* Save current bank */
1094 bank = inb(iobase+BSR);
1095
1096 self->tx_buff.data = self->tx_buff.head;
1097
1098 self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
1099 self->tx_buff.truesize);
1100
1101 self->stats.tx_bytes += self->tx_buff.len;
1102
1103 /* Add interrupt on tx low level (will fire immediately) */
1104 switch_bank(iobase, BANK0);
1105 outb(IER_TXLDL_IE, iobase+IER);
1106
1107 /* Restore bank register */
1108 outb(bank, iobase+BSR);
1109
1110 spin_unlock_irqrestore(&self->lock, flags);
1111
1112 dev_kfree_skb(skb);
1113
1114 return 0;
1115 }
1116
1117 static int nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev)
1118 {
1119 struct nsc_ircc_cb *self;
1120 unsigned long flags;
1121 int iobase;
1122 __s32 speed;
1123 __u8 bank;
1124 int mtt, diff;
1125
1126 self = (struct nsc_ircc_cb *) dev->priv;
1127 iobase = self->io.fir_base;
1128
1129 netif_stop_queue(dev);
1130
1131 /* Check if we need to change the speed */
1132 speed = irda_get_next_speed(skb);
1133 if ((speed != self->io.speed) && (speed != -1)) {
1134 /* Check for empty frame */
1135 if (!skb->len) {
1136 nsc_ircc_change_speed(self, speed);
1137 dev_kfree_skb(skb);
1138 return 0;
1139 } else
1140 self->new_speed = speed;
1141 }
1142
1143 spin_lock_irqsave(&self->lock, flags);
1144
1145 /* Save current bank */
1146 bank = inb(iobase+BSR);
1147
1148 /* Register and copy this frame to DMA memory */
1149 self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
1150 self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
1151 self->tx_fifo.tail += skb->len;
1152
1153 self->stats.tx_bytes += skb->len;
1154
1155 memcpy(self->tx_fifo.queue[self->tx_fifo.free].start, skb->data,
1156 skb->len);
1157
1158 self->tx_fifo.len++;
1159 self->tx_fifo.free++;
1160
1161 /* Start transmit only if there is currently no transmit going on */
1162 if (self->tx_fifo.len == 1) {
1163 /* Check if we must wait the min turn time or not */
1164 mtt = irda_get_mtt(skb);
1165 if (mtt) {
1166 /* Check how much time we have used already */
1167 get_fast_time(&self->now);
1168 diff = self->now.tv_usec - self->stamp.tv_usec;
1169 if (diff < 0)
1170 diff += 1000000;
1171
1172 /* Check if the mtt is larger than the time we have
1173 * already used by all the protocol processing
1174 */
1175 if (mtt > diff) {
1176 mtt -= diff;
1177
1178 /*
1179 * Use timer if delay larger than 125 us, and
1180 * use udelay for smaller values which should
1181 * be acceptable
1182 */
1183 if (mtt > 125) {
1184 /* Adjust for timer resolution */
1185 mtt = mtt / 125;
1186
1187 /* Setup timer */
1188 switch_bank(iobase, BANK4);
1189 outb(mtt & 0xff, iobase+TMRL);
1190 outb((mtt >> 8) & 0x0f, iobase+TMRH);
1191
1192 /* Start timer */
1193 outb(IRCR1_TMR_EN, iobase+IRCR1);
1194 self->io.direction = IO_XMIT;
1195
1196 /* Enable timer interrupt */
1197 switch_bank(iobase, BANK0);
1198 outb(IER_TMR_IE, iobase+IER);
1199
1200 /* Timer will take care of the rest */
1201 goto out;
1202 } else
1203 udelay(mtt);
1204 }
1205 }
1206 /* Enable DMA interrupt */
1207 switch_bank(iobase, BANK0);
1208 outb(IER_DMA_IE, iobase+IER);
1209
1210 /* Transmit frame */
1211 nsc_ircc_dma_xmit(self, iobase);
1212 }
1213 out:
1214 /* Not busy transmitting anymore if window is not full */
1215 if (self->tx_fifo.free < MAX_TX_WINDOW)
1216 netif_wake_queue(self->netdev);
1217
1218 /* Restore bank register */
1219 outb(bank, iobase+BSR);
1220
1221 spin_unlock_irqrestore(&self->lock, flags);
1222 dev_kfree_skb(skb);
1223
1224 return 0;
1225 }
1226
1227 /*
1228 * Function nsc_ircc_dma_xmit (self, iobase)
1229 *
1230 * Transmit data using DMA
1231 *
1232 */
1233 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase)
1234 {
1235 int bsr;
1236
1237 /* Save current bank */
1238 bsr = inb(iobase+BSR);
1239
1240 /* Disable DMA */
1241 switch_bank(iobase, BANK0);
1242 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1243
1244 self->io.direction = IO_XMIT;
1245
1246 /* Choose transmit DMA channel */
1247 switch_bank(iobase, BANK2);
1248 outb(ECR1_DMASWP|ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1249
1250 setup_dma(self->io.dma,
1251 self->tx_fifo.queue[self->tx_fifo.ptr].start,
1252 self->tx_fifo.queue[self->tx_fifo.ptr].len,
1253 DMA_TX_MODE);
1254
1255 /* Enable DMA and SIR interaction pulse */
1256 switch_bank(iobase, BANK0);
1257 outb(inb(iobase+MCR)|MCR_TX_DFR|MCR_DMA_EN|MCR_IR_PLS, iobase+MCR);
1258
1259 /* Restore bank register */
1260 outb(bsr, iobase+BSR);
1261 }
1262
1263 /*
1264 * Function nsc_ircc_pio_xmit (self, iobase)
1265 *
1266 * Transmit data using PIO. Returns the number of bytes that actually
1267 * got transferred
1268 *
1269 */
1270 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size)
1271 {
1272 int actual = 0;
1273 __u8 bank;
1274
1275 IRDA_DEBUG(4, __FUNCTION__ "()\n");
1276
1277 /* Save current bank */
1278 bank = inb(iobase+BSR);
1279
1280 switch_bank(iobase, BANK0);
1281 if (!(inb_p(iobase+LSR) & LSR_TXEMP)) {
1282 IRDA_DEBUG(4, __FUNCTION__
1283 "(), warning, FIFO not empty yet!\n");
1284
1285 /* FIFO may still be filled to the Tx interrupt threshold */
1286 fifo_size -= 17;
1287 }
1288
1289 /* Fill FIFO with current frame */
1290 while ((fifo_size-- > 0) && (actual < len)) {
1291 /* Transmit next byte */
1292 outb(buf[actual++], iobase+TXD);
1293 }
1294
1295 IRDA_DEBUG(4, __FUNCTION__ "(), fifo_size %d ; %d sent of %d\n",
1296 fifo_size, actual, len);
1297
1298 /* Restore bank */
1299 outb(bank, iobase+BSR);
1300
1301 return actual;
1302 }
1303
1304 /*
1305 * Function nsc_ircc_dma_xmit_complete (self)
1306 *
1307 * The transfer of a frame in finished. This function will only be called
1308 * by the interrupt handler
1309 *
1310 */
1311 static int nsc_ircc_dma_xmit_complete(struct nsc_ircc_cb *self)
1312 {
1313 int iobase;
1314 __u8 bank;
1315 int ret = TRUE;
1316
1317 IRDA_DEBUG(2, __FUNCTION__ "()\n");
1318
1319 iobase = self->io.fir_base;
1320
1321 /* Save current bank */
1322 bank = inb(iobase+BSR);
1323
1324 /* Disable DMA */
1325 switch_bank(iobase, BANK0);
1326 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1327
1328 /* Check for underrrun! */
1329 if (inb(iobase+ASCR) & ASCR_TXUR) {
1330 self->stats.tx_errors++;
1331 self->stats.tx_fifo_errors++;
1332
1333 /* Clear bit, by writing 1 into it */
1334 outb(ASCR_TXUR, iobase+ASCR);
1335 } else {
1336 self->stats.tx_packets++;
1337 }
1338
1339 /* Check if we need to change the speed */
1340 if (self->new_speed) {
1341 nsc_ircc_change_speed(self, self->new_speed);
1342 self->new_speed = 0;
1343 }
1344
1345 /* Finished with this frame, so prepare for next */
1346 self->tx_fifo.ptr++;
1347 self->tx_fifo.len--;
1348
1349 /* Any frames to be sent back-to-back? */
1350 if (self->tx_fifo.len) {
1351 nsc_ircc_dma_xmit(self, iobase);
1352
1353 /* Not finished yet! */
1354 ret = FALSE;
1355 } else {
1356 /* Reset Tx FIFO info */
1357 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1358 self->tx_fifo.tail = self->tx_buff.head;
1359 }
1360
1361 /* Make sure we have room for more frames */
1362 if (self->tx_fifo.free < MAX_TX_WINDOW) {
1363 /* Not busy transmitting anymore */
1364 /* Tell the network layer, that we can accept more frames */
1365 netif_wake_queue(self->netdev);
1366 }
1367
1368 /* Restore bank */
1369 outb(bank, iobase+BSR);
1370
1371 return ret;
1372 }
1373
1374 /*
1375 * Function nsc_ircc_dma_receive (self)
1376 *
1377 * Get ready for receiving a frame. The device will initiate a DMA
1378 * if it starts to receive a frame.
1379 *
1380 */
1381 static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self)
1382 {
1383 int iobase;
1384 __u8 bsr;
1385
1386 iobase = self->io.fir_base;
1387
1388 /* Reset Tx FIFO info */
1389 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1390 self->tx_fifo.tail = self->tx_buff.head;
1391
1392 /* Save current bank */
1393 bsr = inb(iobase+BSR);
1394
1395 /* Disable DMA */
1396 switch_bank(iobase, BANK0);
1397 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1398
1399 /* Choose DMA Rx, DMA Fairness, and Advanced mode */
1400 switch_bank(iobase, BANK2);
1401 outb(ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1402
1403 self->io.direction = IO_RECV;
1404 self->rx_buff.data = self->rx_buff.head;
1405
1406 /* Reset Rx FIFO. This will also flush the ST_FIFO */
1407 switch_bank(iobase, BANK0);
1408 outb(FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
1409
1410 self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1411 self->st_fifo.tail = self->st_fifo.head = 0;
1412
1413 setup_dma(self->io.dma, self->rx_buff.data, self->rx_buff.truesize,
1414 DMA_RX_MODE);
1415
1416 /* Enable DMA */
1417 switch_bank(iobase, BANK0);
1418 outb(inb(iobase+MCR)|MCR_DMA_EN, iobase+MCR);
1419
1420 /* Restore bank register */
1421 outb(bsr, iobase+BSR);
1422
1423 return 0;
1424 }
1425
1426 /*
1427 * Function nsc_ircc_dma_receive_complete (self)
1428 *
1429 * Finished with receiving frames
1430 *
1431 *
1432 */
1433 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase)
1434 {
1435 struct st_fifo *st_fifo;
1436 struct sk_buff *skb;
1437 __u8 status;
1438 __u8 bank;
1439 int len;
1440
1441 st_fifo = &self->st_fifo;
1442
1443 /* Save current bank */
1444 bank = inb(iobase+BSR);
1445
1446 /* Read all entries in status FIFO */
1447 switch_bank(iobase, BANK5);
1448 while ((status = inb(iobase+FRM_ST)) & FRM_ST_VLD) {
1449 /* We must empty the status FIFO no matter what */
1450 len = inb(iobase+RFLFL) | ((inb(iobase+RFLFH) & 0x1f) << 8);
1451
1452 if (st_fifo->tail >= MAX_RX_WINDOW) {
1453 IRDA_DEBUG(0, __FUNCTION__ "(), window is full!\n");
1454 continue;
1455 }
1456
1457 st_fifo->entries[st_fifo->tail].status = status;
1458 st_fifo->entries[st_fifo->tail].len = len;
1459 st_fifo->pending_bytes += len;
1460 st_fifo->tail++;
1461 st_fifo->len++;
1462 }
1463 /* Try to process all entries in status FIFO */
1464 while (st_fifo->len > 0) {
1465 /* Get first entry */
1466 status = st_fifo->entries[st_fifo->head].status;
1467 len = st_fifo->entries[st_fifo->head].len;
1468 st_fifo->pending_bytes -= len;
1469 st_fifo->head++;
1470 st_fifo->len--;
1471
1472 /* Check for errors */
1473 if (status & FRM_ST_ERR_MSK) {
1474 if (status & FRM_ST_LOST_FR) {
1475 /* Add number of lost frames to stats */
1476 self->stats.rx_errors += len;
1477 } else {
1478 /* Skip frame */
1479 self->stats.rx_errors++;
1480
1481 self->rx_buff.data += len;
1482
1483 if (status & FRM_ST_MAX_LEN)
1484 self->stats.rx_length_errors++;
1485
1486 if (status & FRM_ST_PHY_ERR)
1487 self->stats.rx_frame_errors++;
1488
1489 if (status & FRM_ST_BAD_CRC)
1490 self->stats.rx_crc_errors++;
1491 }
1492 /* The errors below can be reported in both cases */
1493 if (status & FRM_ST_OVR1)
1494 self->stats.rx_fifo_errors++;
1495
1496 if (status & FRM_ST_OVR2)
1497 self->stats.rx_fifo_errors++;
1498 } else {
1499 /*
1500 * First we must make sure that the frame we
1501 * want to deliver is all in main memory. If we
1502 * cannot tell, then we check if the Rx FIFO is
1503 * empty. If not then we will have to take a nap
1504 * and try again later.
1505 */
1506 if (st_fifo->pending_bytes < self->io.fifo_size) {
1507 switch_bank(iobase, BANK0);
1508 if (inb(iobase+LSR) & LSR_RXDA) {
1509 /* Put this entry back in fifo */
1510 st_fifo->head--;
1511 st_fifo->len++;
1512 st_fifo->pending_bytes += len;
1513 st_fifo->entries[st_fifo->head].status = status;
1514 st_fifo->entries[st_fifo->head].len = len;
1515 /*
1516 * DMA not finished yet, so try again
1517 * later, set timer value, resolution
1518 * 125 us
1519 */
1520 switch_bank(iobase, BANK4);
1521 outb(0x02, iobase+TMRL); /* x 125 us */
1522 outb(0x00, iobase+TMRH);
1523
1524 /* Start timer */
1525 outb(IRCR1_TMR_EN, iobase+IRCR1);
1526
1527 /* Restore bank register */
1528 outb(bank, iobase+BSR);
1529
1530 return FALSE; /* I'll be back! */
1531 }
1532 }
1533
1534 /*
1535 * Remember the time we received this frame, so we can
1536 * reduce the min turn time a bit since we will know
1537 * how much time we have used for protocol processing
1538 */
1539 get_fast_time(&self->stamp);
1540
1541 skb = dev_alloc_skb(len+1);
1542 if (skb == NULL) {
1543 WARNING(__FUNCTION__ "(), memory squeeze, "
1544 "dropping frame.\n");
1545 self->stats.rx_dropped++;
1546
1547 /* Restore bank register */
1548 outb(bank, iobase+BSR);
1549
1550 return FALSE;
1551 }
1552
1553 /* Make sure IP header gets aligned */
1554 skb_reserve(skb, 1);
1555
1556 /* Copy frame without CRC */
1557 if (self->io.speed < 4000000) {
1558 skb_put(skb, len-2);
1559 memcpy(skb->data, self->rx_buff.data, len-2);
1560 } else {
1561 skb_put(skb, len-4);
1562 memcpy(skb->data, self->rx_buff.data, len-4);
1563 }
1564
1565 /* Move to next frame */
1566 self->rx_buff.data += len;
1567 self->stats.rx_bytes += len;
1568 self->stats.rx_packets++;
1569
1570 skb->dev = self->netdev;
1571 skb->mac.raw = skb->data;
1572 skb->protocol = htons(ETH_P_IRDA);
1573 netif_rx(skb);
1574 }
1575 }
1576 /* Restore bank register */
1577 outb(bank, iobase+BSR);
1578
1579 return TRUE;
1580 }
1581
1582 /*
1583 * Function nsc_ircc_pio_receive (self)
1584 *
1585 * Receive all data in receiver FIFO
1586 *
1587 */
1588 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self)
1589 {
1590 __u8 byte;
1591 int iobase;
1592
1593 iobase = self->io.fir_base;
1594
1595 /* Receive all characters in Rx FIFO */
1596 do {
1597 byte = inb(iobase+RXD);
1598 async_unwrap_char(self->netdev, &self->stats, &self->rx_buff,
1599 byte);
1600 } while (inb(iobase+LSR) & LSR_RXDA); /* Data available */
1601 }
1602
1603 /*
1604 * Function nsc_ircc_sir_interrupt (self, eir)
1605 *
1606 * Handle SIR interrupt
1607 *
1608 */
1609 static void nsc_ircc_sir_interrupt(struct nsc_ircc_cb *self, int eir)
1610 {
1611 int actual;
1612
1613 /* Check if transmit FIFO is low on data */
1614 if (eir & EIR_TXLDL_EV) {
1615 /* Write data left in transmit buffer */
1616 actual = nsc_ircc_pio_write(self->io.fir_base,
1617 self->tx_buff.data,
1618 self->tx_buff.len,
1619 self->io.fifo_size);
1620 self->tx_buff.data += actual;
1621 self->tx_buff.len -= actual;
1622
1623 self->io.direction = IO_XMIT;
1624
1625 /* Check if finished */
1626 if (self->tx_buff.len > 0)
1627 self->ier = IER_TXLDL_IE;
1628 else {
1629
1630 self->stats.tx_packets++;
1631 netif_wake_queue(self->netdev);
1632 self->ier = IER_TXEMP_IE;
1633 }
1634
1635 }
1636 /* Check if transmission has completed */
1637 if (eir & EIR_TXEMP_EV) {
1638 /* Check if we need to change the speed? */
1639 if (self->new_speed) {
1640 IRDA_DEBUG(2, __FUNCTION__ "(), Changing speed!\n");
1641 nsc_ircc_change_speed(self, self->new_speed);
1642 self->new_speed = 0;
1643
1644 /* Check if we are going to FIR */
1645 if (self->io.speed > 115200) {
1646 /* Should wait for status FIFO interrupt */
1647 self->ier = IER_SFIF_IE;
1648
1649 /* No need to do anymore SIR stuff */
1650 return;
1651 }
1652 }
1653 /* Turn around and get ready to receive some data */
1654 self->io.direction = IO_RECV;
1655 self->ier = IER_RXHDL_IE;
1656 }
1657
1658 /* Rx FIFO threshold or timeout */
1659 if (eir & EIR_RXHDL_EV) {
1660 nsc_ircc_pio_receive(self);
1661
1662 /* Keep receiving */
1663 self->ier = IER_RXHDL_IE;
1664 }
1665 }
1666
1667 /*
1668 * Function nsc_ircc_fir_interrupt (self, eir)
1669 *
1670 * Handle MIR/FIR interrupt
1671 *
1672 */
1673 static void nsc_ircc_fir_interrupt(struct nsc_ircc_cb *self, int iobase,
1674 int eir)
1675 {
1676 __u8 bank;
1677
1678 bank = inb(iobase+BSR);
1679
1680 /* Status FIFO event*/
1681 if (eir & EIR_SFIF_EV) {
1682 /* Check if DMA has finished */
1683 if (nsc_ircc_dma_receive_complete(self, iobase)) {
1684 /* Wait for next status FIFO interrupt */
1685 self->ier = IER_SFIF_IE;
1686 } else {
1687 self->ier = IER_SFIF_IE | IER_TMR_IE;
1688 }
1689 } else if (eir & EIR_TMR_EV) { /* Timer finished */
1690 /* Disable timer */
1691 switch_bank(iobase, BANK4);
1692 outb(0, iobase+IRCR1);
1693
1694 /* Clear timer event */
1695 switch_bank(iobase, BANK0);
1696 outb(ASCR_CTE, iobase+ASCR);
1697
1698 /* Check if this is a Tx timer interrupt */
1699 if (self->io.direction == IO_XMIT) {
1700 nsc_ircc_dma_xmit(self, iobase);
1701
1702 /* Interrupt on DMA */
1703 self->ier = IER_DMA_IE;
1704 } else {
1705 /* Check (again) if DMA has finished */
1706 if (nsc_ircc_dma_receive_complete(self, iobase)) {
1707 self->ier = IER_SFIF_IE;
1708 } else {
1709 self->ier = IER_SFIF_IE | IER_TMR_IE;
1710 }
1711 }
1712 } else if (eir & EIR_DMA_EV) {
1713 /* Finished with all transmissions? */
1714 if (nsc_ircc_dma_xmit_complete(self)) {
1715 /* Check if there are more frames to be transmitted */
1716 if (irda_device_txqueue_empty(self->netdev)) {
1717 /* Prepare for receive */
1718 nsc_ircc_dma_receive(self);
1719
1720 self->ier = IER_SFIF_IE;
1721 }
1722 } else {
1723 /* Not finished yet, so interrupt on DMA again */
1724 self->ier = IER_DMA_IE;
1725 }
1726 }
1727 outb(bank, iobase+BSR);
1728 }
1729
1730 /*
1731 * Function nsc_ircc_interrupt (irq, dev_id, regs)
1732 *
1733 * An interrupt from the chip has arrived. Time to do some work
1734 *
1735 */
1736 static void nsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1737 {
1738 struct net_device *dev = (struct net_device *) dev_id;
1739 struct nsc_ircc_cb *self;
1740 __u8 bsr, eir;
1741 int iobase;
1742
1743 if (!dev) {
1744 WARNING("%s: irq %d for unknown device.\n", driver_name, irq);
1745 return;
1746 }
1747 self = (struct nsc_ircc_cb *) dev->priv;
1748
1749 spin_lock(&self->lock);
1750
1751 iobase = self->io.fir_base;
1752
1753 bsr = inb(iobase+BSR); /* Save current bank */
1754
1755 switch_bank(iobase, BANK0);
1756 self->ier = inb(iobase+IER);
1757 eir = inb(iobase+EIR) & self->ier; /* Mask out the interesting ones */
1758
1759 outb(0, iobase+IER); /* Disable interrupts */
1760
1761 if (eir) {
1762 /* Dispatch interrupt handler for the current speed */
1763 if (self->io.speed > 115200)
1764 nsc_ircc_fir_interrupt(self, iobase, eir);
1765 else
1766 nsc_ircc_sir_interrupt(self, eir);
1767 }
1768
1769 outb(self->ier, iobase+IER); /* Restore interrupts */
1770 outb(bsr, iobase+BSR); /* Restore bank register */
1771
1772 spin_unlock(&self->lock);
1773 }
1774
1775 /*
1776 * Function nsc_ircc_is_receiving (self)
1777 *
1778 * Return TRUE is we are currently receiving a frame
1779 *
1780 */
1781 static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self)
1782 {
1783 unsigned long flags;
1784 int status = FALSE;
1785 int iobase;
1786 __u8 bank;
1787
1788 ASSERT(self != NULL, return FALSE;);
1789
1790 spin_lock_irqsave(&self->lock, flags);
1791
1792 if (self->io.speed > 115200) {
1793 iobase = self->io.fir_base;
1794
1795 /* Check if rx FIFO is not empty */
1796 bank = inb(iobase+BSR);
1797 switch_bank(iobase, BANK2);
1798 if ((inb(iobase+RXFLV) & 0x3f) != 0) {
1799 /* We are receiving something */
1800 status = TRUE;
1801 }
1802 outb(bank, iobase+BSR);
1803 } else
1804 status = (self->rx_buff.state != OUTSIDE_FRAME);
1805
1806 spin_unlock_irqrestore(&self->lock, flags);
1807
1808 return status;
1809 }
1810
1811 /*
1812 * Function nsc_ircc_net_init (dev)
1813 *
1814 * Initialize network device
1815 *
1816 */
1817 static int nsc_ircc_net_init(struct net_device *dev)
1818 {
1819 IRDA_DEBUG(4, __FUNCTION__ "()\n");
1820
1821 /* Setup to be a normal IrDA network device driver */
1822 irda_device_setup(dev);
1823
1824 /* Insert overrides below this line! */
1825
1826 return 0;
1827 }
1828
1829 /*
1830 * Function nsc_ircc_net_open (dev)
1831 *
1832 * Start the device
1833 *
1834 */
1835 static int nsc_ircc_net_open(struct net_device *dev)
1836 {
1837 struct nsc_ircc_cb *self;
1838 int iobase;
1839 char hwname[32];
1840 __u8 bank;
1841
1842 IRDA_DEBUG(4, __FUNCTION__ "()\n");
1843
1844 ASSERT(dev != NULL, return -1;);
1845 self = (struct nsc_ircc_cb *) dev->priv;
1846
1847 ASSERT(self != NULL, return 0;);
1848
1849 iobase = self->io.fir_base;
1850
1851 if (request_irq(self->io.irq, nsc_ircc_interrupt, 0, dev->name, dev)) {
1852 WARNING("%s, unable to allocate irq=%d\n", driver_name,
1853 self->io.irq);
1854 return -EAGAIN;
1855 }
1856 /*
1857 * Always allocate the DMA channel after the IRQ, and clean up on
1858 * failure.
1859 */
1860 if (request_dma(self->io.dma, dev->name)) {
1861 WARNING("%s, unable to allocate dma=%d\n", driver_name,
1862 self->io.dma);
1863 free_irq(self->io.irq, dev);
1864 return -EAGAIN;
1865 }
1866
1867 /* Save current bank */
1868 bank = inb(iobase+BSR);
1869
1870 /* turn on interrupts */
1871 switch_bank(iobase, BANK0);
1872 outb(IER_LS_IE | IER_RXHDL_IE, iobase+IER);
1873
1874 /* Restore bank register */
1875 outb(bank, iobase+BSR);
1876
1877 /* Ready to play! */
1878 netif_start_queue(dev);
1879
1880 /* Give self a hardware name */
1881 sprintf(hwname, "NSC-FIR @ 0x%03x", self->io.fir_base);
1882
1883 /*
1884 * Open new IrLAP layer instance, now that everything should be
1885 * initialized properly
1886 */
1887 self->irlap = irlap_open(dev, &self->qos, hwname);
1888
1889 MOD_INC_USE_COUNT;
1890
1891 return 0;
1892 }
1893
1894 /*
1895 * Function nsc_ircc_net_close (dev)
1896 *
1897 * Stop the device
1898 *
1899 */
1900 static int nsc_ircc_net_close(struct net_device *dev)
1901 {
1902 struct nsc_ircc_cb *self;
1903 int iobase;
1904 __u8 bank;
1905
1906 IRDA_DEBUG(4, __FUNCTION__ "()\n");
1907
1908 ASSERT(dev != NULL, return -1;);
1909
1910 self = (struct nsc_ircc_cb *) dev->priv;
1911 ASSERT(self != NULL, return 0;);
1912
1913 /* Stop device */
1914 netif_stop_queue(dev);
1915
1916 /* Stop and remove instance of IrLAP */
1917 if (self->irlap)
1918 irlap_close(self->irlap);
1919 self->irlap = NULL;
1920
1921 iobase = self->io.fir_base;
1922
1923 disable_dma(self->io.dma);
1924
1925 /* Save current bank */
1926 bank = inb(iobase+BSR);
1927
1928 /* Disable interrupts */
1929 switch_bank(iobase, BANK0);
1930 outb(0, iobase+IER);
1931
1932 free_irq(self->io.irq, dev);
1933 free_dma(self->io.dma);
1934
1935 /* Restore bank register */
1936 outb(bank, iobase+BSR);
1937
1938 MOD_DEC_USE_COUNT;
1939
1940 return 0;
1941 }
1942
1943 /*
1944 * Function nsc_ircc_net_ioctl (dev, rq, cmd)
1945 *
1946 * Process IOCTL commands for this device
1947 *
1948 */
1949 static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1950 {
1951 struct if_irda_req *irq = (struct if_irda_req *) rq;
1952 struct nsc_ircc_cb *self;
1953 unsigned long flags;
1954 int ret = 0;
1955
1956 ASSERT(dev != NULL, return -1;);
1957
1958 self = dev->priv;
1959
1960 ASSERT(self != NULL, return -1;);
1961
1962 IRDA_DEBUG(2, __FUNCTION__ "(), %s, (cmd=0x%X)\n", dev->name, cmd);
1963
1964 /* Disable interrupts & save flags */
1965 save_flags(flags);
1966 cli();
1967
1968 switch (cmd) {
1969 case SIOCSBANDWIDTH: /* Set bandwidth */
1970 if (!capable(CAP_NET_ADMIN)) {
1971 ret = -EPERM;
1972 goto out;
1973 }
1974 nsc_ircc_change_speed(self, irq->ifr_baudrate);
1975 break;
1976 case SIOCSMEDIABUSY: /* Set media busy */
1977 if (!capable(CAP_NET_ADMIN)) {
1978 ret = -EPERM;
1979 goto out;
1980 }
1981 irda_device_set_media_busy(self->netdev, TRUE);
1982 break;
1983 case SIOCGRECEIVING: /* Check if we are receiving right now */
1984 irq->ifr_receiving = nsc_ircc_is_receiving(self);
1985 break;
1986 default:
1987 ret = -EOPNOTSUPP;
1988 }
1989 out:
1990 restore_flags(flags);
1991 return ret;
1992 }
1993
1994 static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev)
1995 {
1996 struct nsc_ircc_cb *self = (struct nsc_ircc_cb *) dev->priv;
1997
1998 return &self->stats;
1999 }
2000
2001 static void nsc_ircc_suspend(struct nsc_ircc_cb *self)
2002 {
2003 MESSAGE("%s, Suspending\n", driver_name);
2004
2005 if (self->io.suspended)
2006 return;
2007
2008 nsc_ircc_net_close(self->netdev);
2009
2010 self->io.suspended = 1;
2011 }
2012
2013 static void nsc_ircc_wakeup(struct nsc_ircc_cb *self)
2014 {
2015 if (!self->io.suspended)
2016 return;
2017
2018 nsc_ircc_setup(&self->io);
2019 nsc_ircc_net_open(self->netdev);
2020
2021 MESSAGE("%s, Waking up\n", driver_name);
2022
2023 self->io.suspended = 0;
2024 }
2025
2026 static int nsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data)
2027 {
2028 struct nsc_ircc_cb *self = (struct nsc_ircc_cb*) dev->data;
2029 if (self) {
2030 switch (rqst) {
2031 case PM_SUSPEND:
2032 nsc_ircc_suspend(self);
2033 break;
2034 case PM_RESUME:
2035 nsc_ircc_wakeup(self);
2036 break;
2037 }
2038 }
2039 return 0;
2040 }
2041
2042 #ifdef MODULE
2043 MODULE_AUTHOR("Dag Brattli <dagb@cs.uit.no>");
2044 MODULE_DESCRIPTION("NSC IrDA Device Driver");
2045
2046 MODULE_PARM(qos_mtt_bits, "i");
2047 MODULE_PARM_DESC(qos_mtt_bits, "Minimum Turn Time");
2048 MODULE_PARM(io, "1-4i");
2049 MODULE_PARM_DESC(io, "Base I/O addresses");
2050 MODULE_PARM(irq, "1-4i");
2051 MODULE_PARM_DESC(irq, "IRQ lines");
2052 MODULE_PARM(dma, "1-4i");
2053 MODULE_PARM_DESC(dma, "DMA channels");
2054 MODULE_PARM(dongle_id, "i");
2055 MODULE_PARM_DESC(dongle_id, "Type-id of used dongle");
2056
2057 int init_module(void)
2058 {
2059 return nsc_ircc_init();
2060 }
2061
2062 void cleanup_module(void)
2063 {
2064 nsc_ircc_cleanup();
2065 }
2066 #endif /* MODULE */
2067
2068