File: /usr/src/linux/drivers/net/irda/smc-ircc.c
1 /*********************************************************************
2 *
3 * Filename: smc-ircc.c
4 * Version: 0.4
5 * Description: Driver for the SMC Infrared Communications Controller
6 * Status: Experimental.
7 * Author: Thomas Davis (tadavis@jps.net)
8 * Created at:
9 * Modified at: Tue Feb 22 10:05:06 2000
10 * Modified by: Dag Brattli <dag@brattli.net>
11 * Modified at: Tue Jun 26 2001
12 * Modified by: Stefani Seibold <stefani@seibold.net>
13 *
14 * Copyright (c) 2001 Stefani Seibold
15 * Copyright (c) 1999-2001 Dag Brattli
16 * Copyright (c) 1998-1999 Thomas Davis,
17 * All Rights Reserved.
18 *
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License as
21 * published by the Free Software Foundation; either version 2 of
22 * the License, or (at your option) any later version.
23 *
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
28 *
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32 * MA 02111-1307 USA
33 *
34 * SIO's: all SIO documentet by SMC (June, 2001)
35 * Applicable Models : Fujitsu Lifebook 635t, Sony PCG-505TX,
36 * Dell Inspiron 8000
37 *
38 ********************************************************************/
39
40 #include <linux/module.h>
41 #include <linux/kernel.h>
42 #include <linux/types.h>
43 #include <linux/skbuff.h>
44 #include <linux/netdevice.h>
45 #include <linux/ioport.h>
46 #include <linux/delay.h>
47 #include <linux/slab.h>
48 #include <linux/init.h>
49 #include <linux/rtnetlink.h>
50 #include <linux/serial_reg.h>
51
52 #include <asm/io.h>
53 #include <asm/dma.h>
54 #include <asm/byteorder.h>
55
56 #include <linux/pm.h>
57
58 #include <net/irda/wrapper.h>
59 #include <net/irda/irda.h>
60 #include <net/irda/irmod.h>
61 #include <net/irda/irlap_frame.h>
62 #include <net/irda/irda_device.h>
63 #include <net/irda/smc-ircc.h>
64 #include <net/irda/irport.h>
65
66 struct smc_chip {
67 char *name;
68 u16 flags;
69 u8 devid;
70 u8 rev;
71 };
72 typedef struct smc_chip smc_chip_t;
73
74 static const char *driver_name = "smc-ircc";
75
76 #define DIM(x) (sizeof(x)/(sizeof(*(x))))
77
78 #define CHIP_IO_EXTENT 8
79
80 static struct ircc_cb *dev_self[] = { NULL, NULL};
81
82 /* Some prototypes */
83 static int ircc_open(unsigned int iobase, unsigned int board_addr);
84 static int ircc_dma_receive(struct ircc_cb *self, int iobase);
85 static void ircc_dma_receive_complete(struct ircc_cb *self, int iobase);
86 static int ircc_hard_xmit(struct sk_buff *skb, struct net_device *dev);
87 static void ircc_dma_xmit(struct ircc_cb *self, int iobase, int bofs);
88 static void ircc_change_speed(void *priv, u32 speed);
89 static void ircc_interrupt(int irq, void *dev_id, struct pt_regs *regs);
90 static int ircc_net_open(struct net_device *dev);
91 static int ircc_net_close(struct net_device *dev);
92 static int ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data);
93
94 #define KEY55_1 0 /* SuperIO Configuration mode with Key <0x55> */
95 #define KEY55_2 1 /* SuperIO Configuration mode with Key <0x55,0x55> */
96 #define NoIRDA 2 /* SuperIO Chip has no IRDA Port */
97 #define SIR 0 /* SuperIO Chip has only slow IRDA */
98 #define FIR 4 /* SuperIO Chip has fast IRDA */
99 #define SERx4 8 /* SuperIO Chip supports 115,2 KBaud * 4=460,8 KBaud */
100
101 /* These are the currently known SMC SuperIO chipsets */
102 static const smc_chip_t __init fdc_chips_flat[]=
103 {
104 /* Base address 0x3f0 or 0x370 */
105 { "37C44", KEY55_1|NoIRDA, 0x00, 0x00 }, /* This chip can not detected */
106 { "37C665GT", KEY55_2|NoIRDA, 0x65, 0x01 },
107 { "37C665GT", KEY55_2|NoIRDA, 0x66, 0x01 },
108 { "37C669", KEY55_2|SIR|SERx4, 0x03, 0x02 },
109 { "37C669", KEY55_2|SIR|SERx4, 0x04, 0x02 }, /* ID? */
110 { "37C78", KEY55_2|NoIRDA, 0x78, 0x00 },
111 { "37N769", KEY55_1|FIR|SERx4, 0x28, 0x00 },
112 { "37N869", KEY55_1|FIR|SERx4, 0x29, 0x00 },
113 { NULL }
114 };
115
116 static const smc_chip_t __init fdc_chips_paged[]=
117 {
118 /* Base address 0x3f0 or 0x370 */
119 { "37B72X", KEY55_1|SIR|SERx4, 0x4c, 0x00 },
120 { "37B77X", KEY55_1|SIR|SERx4, 0x43, 0x00 },
121 { "37B78X", KEY55_1|SIR|SERx4, 0x44, 0x00 },
122 { "37B80X", KEY55_1|SIR|SERx4, 0x42, 0x00 },
123 { "37C67X", KEY55_1|FIR|SERx4, 0x40, 0x00 },
124 { "37C93X", KEY55_2|SIR|SERx4, 0x02, 0x01 },
125 { "37C93XAPM", KEY55_1|SIR|SERx4, 0x30, 0x01 },
126 { "37C93XFR", KEY55_2|FIR|SERx4, 0x03, 0x01 },
127 { "37M707", KEY55_1|SIR|SERx4, 0x42, 0x00 },
128 { "37M81X", KEY55_1|SIR|SERx4, 0x4d, 0x00 },
129 { "37N958FR", KEY55_1|FIR|SERx4, 0x09, 0x04 },
130 { "37N972", KEY55_1|FIR|SERx4, 0x0a, 0x00 },
131 { "37N972", KEY55_1|FIR|SERx4, 0x0b, 0x00 },
132 { NULL }
133 };
134
135 static const smc_chip_t __init lpc_chips_flat[]=
136 {
137 /* Base address 0x2E or 0x4E */
138 { "47N227", KEY55_1|FIR|SERx4, 0x5a, 0x00 },
139 { "47N267", KEY55_1|FIR|SERx4, 0x5e, 0x00 },
140 { NULL }
141 };
142
143 static const smc_chip_t __init lpc_chips_paged[]=
144 {
145 /* Base address 0x2E or 0x4E */
146 { "47B27X", KEY55_1|SIR|SERx4, 0x51, 0x00 },
147 { "47B37X", KEY55_1|SIR|SERx4, 0x52, 0x00 },
148 { "47M10X", KEY55_1|SIR|SERx4, 0x59, 0x00 },
149 { "47M120", KEY55_1|NoIRDA|SERx4, 0x5c, 0x00 },
150 { "47M13X", KEY55_1|SIR|SERx4, 0x59, 0x00 },
151 { "47M14X", KEY55_1|SIR|SERx4, 0x5f, 0x00 },
152 { "47N252", KEY55_1|FIR|SERx4, 0x0e, 0x00 },
153 { "47S42X", KEY55_1|SIR|SERx4, 0x57, 0x00 },
154 { NULL }
155 };
156
157 static int ircc_irq=255;
158 static int ircc_dma=255;
159 static int ircc_fir=0;
160 static int ircc_sir=0;
161
162 static unsigned short dev_count=0;
163
164 static inline void register_bank(int iobase, int bank)
165 {
166 outb(((inb(iobase+IRCC_MASTER) & 0xf0) | (bank & 0x07)),
167 iobase+IRCC_MASTER);
168 }
169
170 static int __init smc_access(unsigned short cfg_base,unsigned char reg)
171 {
172 IRDA_DEBUG(0, __FUNCTION__ "()\n");
173
174 outb(reg, cfg_base);
175
176 if (inb(cfg_base)!=reg)
177 return -1;
178
179 return 0;
180 }
181
182 static const smc_chip_t * __init smc_probe(unsigned short cfg_base,u8 reg,const smc_chip_t *chip,char *type)
183 {
184 u8 devid,xdevid,rev;
185
186 IRDA_DEBUG(0, __FUNCTION__ "()\n");
187
188 /* Leave configuration */
189
190 outb(0xaa, cfg_base);
191
192 if (inb(cfg_base)==0xaa) /* not a smc superio chip */
193 return NULL;
194
195 outb(reg, cfg_base);
196
197 xdevid=inb(cfg_base+1);
198
199 /* Enter configuration */
200
201 outb(0x55, cfg_base);
202
203 if (smc_access(cfg_base,0x55)) /* send second key and check */
204 return NULL;
205
206 /* probe device ID */
207
208 if (smc_access(cfg_base,reg))
209 return NULL;
210
211 devid=inb(cfg_base+1);
212
213 if (devid==0) /* typical value for unused port */
214 return NULL;
215
216 if (devid==0xff) /* typical value for unused port */
217 return NULL;
218
219 /* probe revision ID */
220
221 if (smc_access(cfg_base,reg+1))
222 return NULL;
223
224 rev=inb(cfg_base+1);
225
226 if (rev>=128) /* i think this will make no sense */
227 return NULL;
228
229 if (devid==xdevid) /* protection against false positives */
230 return NULL;
231
232 /* Check for expected device ID; are there others? */
233
234 while(chip->devid!=devid) {
235
236 chip++;
237
238 if (chip->name==NULL)
239 return NULL;
240 }
241 if (chip->rev>rev)
242 return NULL;
243
244 MESSAGE("found SMC SuperIO Chip (devid=0x%02x rev=%02X base=0x%04x): %s%s\n",devid,rev,cfg_base,type,chip->name);
245
246 if (chip->flags&NoIRDA)
247 MESSAGE("chipset does not support IRDA\n");
248
249 return chip;
250 }
251
252 /*
253 * Function smc_superio_flat (chip, base, type)
254 *
255 * Try get configuration of a smc SuperIO chip with flat register model
256 *
257 */
258 static int __init smc_superio_flat(const smc_chip_t *chips, unsigned short cfg_base, char *type)
259 {
260 unsigned short fir_io;
261 unsigned short sir_io;
262 u8 mode;
263 int ret = -ENODEV;
264
265 IRDA_DEBUG(0, __FUNCTION__ "()\n");
266
267 if (smc_probe(cfg_base,0xD,chips,type)==NULL)
268 return ret;
269
270 outb(0x0c, cfg_base);
271
272 mode = inb(cfg_base+1);
273 mode = (mode & 0x38) >> 3;
274
275 /* Value for IR port */
276 if (mode && mode < 4) {
277 /* SIR iobase */
278 outb(0x25, cfg_base);
279 sir_io = inb(cfg_base+1) << 2;
280
281 /* FIR iobase */
282 outb(0x2b, cfg_base);
283 fir_io = inb(cfg_base+1) << 3;
284
285 if (fir_io) {
286 if (ircc_open(fir_io, sir_io) == 0)
287 ret=0;
288 }
289 }
290
291 /* Exit configuration */
292 outb(0xaa, cfg_base);
293
294 return ret;
295 }
296
297 /*
298 * Function smc_superio_paged (chip, base, type)
299 *
300 * Try get configuration of a smc SuperIO chip with paged register model
301 *
302 */
303 static int __init smc_superio_paged(const smc_chip_t *chips, unsigned short cfg_base, char *type)
304 {
305 unsigned short fir_io;
306 unsigned short sir_io;
307 int ret = -ENODEV;
308
309 IRDA_DEBUG(0, __FUNCTION__ "()\n");
310
311 if (smc_probe(cfg_base,0x20,chips,type)==NULL)
312 return ret;
313
314 /* Select logical device (UART2) */
315 outb(0x07, cfg_base);
316 outb(0x05, cfg_base + 1);
317
318 /* SIR iobase */
319 outb(0x60, cfg_base);
320 sir_io = inb(cfg_base + 1) << 8;
321 outb(0x61, cfg_base);
322 sir_io |= inb(cfg_base + 1);
323
324 /* Read FIR base */
325 outb(0x62, cfg_base);
326 fir_io = inb(cfg_base + 1) << 8;
327 outb(0x63, cfg_base);
328 fir_io |= inb(cfg_base + 1);
329 outb(0x2b, cfg_base); /* ??? */
330
331 if (fir_io) {
332 if (ircc_open(fir_io, sir_io) == 0)
333 ret=0;
334 }
335
336 /* Exit configuration */
337 outb(0xaa, cfg_base);
338
339 return ret;
340 }
341
342 static int __init smc_superio_fdc(unsigned short cfg_base)
343 {
344 if (check_region(cfg_base, 2) < 0) {
345 IRDA_DEBUG(0, __FUNCTION__ ": can't get cfg_base of 0x%03x\n",
346 cfg_base);
347 return -1;
348 }
349
350 if (!smc_superio_flat(fdc_chips_flat,cfg_base,"FDC")||!smc_superio_paged(fdc_chips_paged,cfg_base,"FDC"))
351 return 0;
352
353 return -1;
354 }
355
356 static int __init smc_superio_lpc(unsigned short cfg_base)
357 {
358 #if 0
359 if (check_region(cfg_base, 2) < 0) {
360 IRDA_DEBUG(0, __FUNCTION__ ": can't get cfg_base of 0x%03x\n",
361 cfg_base);
362 return -1;
363 }
364 #endif
365
366 if (!smc_superio_flat(lpc_chips_flat,cfg_base,"LPC")||!smc_superio_paged(lpc_chips_paged,cfg_base,"LPC"))
367 return 0;
368
369 return -1;
370 }
371
372 /*
373 * Function ircc_init ()
374 *
375 * Initialize chip. Just try to find out how many chips we are dealing with
376 * and where they are
377 */
378 int __init ircc_init(void)
379 {
380 int ret=-ENODEV;
381
382 IRDA_DEBUG(0, __FUNCTION__ "\n");
383
384 dev_count=0;
385
386 if ((ircc_fir>0)&&(ircc_sir>0)) {
387 MESSAGE(" Overriding FIR address 0x%04x\n", ircc_fir);
388 MESSAGE(" Overriding SIR address 0x%04x\n", ircc_sir);
389
390 if (ircc_open(ircc_fir, ircc_sir) == 0)
391 return 0;
392
393 return -ENODEV;
394 }
395
396 /* Trys to open for all the SMC chipsets we know about */
397
398 IRDA_DEBUG(0, __FUNCTION__
399 " Try to open all known SMC chipsets\n");
400
401 if (!smc_superio_fdc(0x3f0))
402 ret=0;
403 if (!smc_superio_fdc(0x370))
404 ret=0;
405 if (!smc_superio_lpc(0x2e))
406 ret=0;
407 if (!smc_superio_lpc(0x4e))
408 ret=0;
409
410 return ret;
411 }
412
413 /*
414 * Function ircc_open (iobase, irq)
415 *
416 * Try to open driver instance
417 *
418 */
419 static int __init ircc_open(unsigned int fir_base, unsigned int sir_base)
420 {
421 struct ircc_cb *self;
422 struct irport_cb *irport;
423 unsigned char low, high, chip, config, dma, irq, version;
424
425
426 IRDA_DEBUG(0, __FUNCTION__ "\n");
427
428 if (check_region(fir_base, CHIP_IO_EXTENT) < 0) {
429 IRDA_DEBUG(0, __FUNCTION__ ": can't get fir_base of 0x%03x\n",
430 fir_base);
431 return -ENODEV;
432 }
433 #if POSSIBLE_USED_BY_SERIAL_DRIVER
434 if (check_region(sir_base, CHIP_IO_EXTENT) < 0) {
435 IRDA_DEBUG(0, __FUNCTION__ ": can't get sir_base of 0x%03x\n",
436 sir_base);
437 return -ENODEV;
438 }
439 #endif
440
441 register_bank(fir_base, 3);
442
443 high = inb(fir_base+IRCC_ID_HIGH);
444 low = inb(fir_base+IRCC_ID_LOW);
445 chip = inb(fir_base+IRCC_CHIP_ID);
446 version = inb(fir_base+IRCC_VERSION);
447 config = inb(fir_base+IRCC_INTERFACE);
448
449 irq = config >> 4 & 0x0f;
450 dma = config & 0x0f;
451
452 if (high != 0x10 || low != 0xb8 || (chip != 0xf1 && chip != 0xf2)) {
453 IRDA_DEBUG(0, __FUNCTION__
454 "(), addr 0x%04x - no device found!\n", fir_base);
455 return -ENODEV;
456 }
457 MESSAGE("SMC IrDA Controller found\n IrCC version %d.%d, "
458 "firport 0x%03x, sirport 0x%03x dma=%d, irq=%d\n",
459 chip & 0x0f, version, fir_base, sir_base, dma, irq);
460
461 if (dev_count>DIM(dev_self)) {
462 IRDA_DEBUG(0, __FUNCTION__
463 "(), to many devices!\n");
464 return -ENOMEM;
465 }
466
467 /*
468 * Allocate new instance of the driver
469 */
470 self = kmalloc(sizeof(struct ircc_cb), GFP_KERNEL);
471 if (self == NULL) {
472 ERROR("%s, Can't allocate memory for control block!\n",
473 driver_name);
474 return -ENOMEM;
475 }
476 memset(self, 0, sizeof(struct ircc_cb));
477 spin_lock_init(&self->lock);
478
479 /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
480 self->rx_buff.truesize = 4000;
481 self->tx_buff.truesize = 4000;
482
483 self->rx_buff.head = (u8 *) kmalloc(self->rx_buff.truesize,
484 GFP_KERNEL|GFP_DMA);
485 if (self->rx_buff.head == NULL) {
486 ERROR("%s, Can't allocate memory for receive buffer!\n",
487 driver_name);
488 kfree(self);
489 return -ENOMEM;
490 }
491
492 self->tx_buff.head = (u8 *) kmalloc(self->tx_buff.truesize,
493 GFP_KERNEL|GFP_DMA);
494 if (self->tx_buff.head == NULL) {
495 ERROR("%s, Can't allocate memory for transmit buffer!\n",
496 driver_name);
497 kfree(self->rx_buff.head);
498 kfree(self);
499 return -ENOMEM;
500 }
501
502 irport = irport_open(dev_count, sir_base, irq);
503 if (!irport) {
504 kfree(self->tx_buff.head);
505 kfree(self->rx_buff.head);
506 kfree(self);
507 return -ENODEV;
508 }
509
510 memset(self->rx_buff.head, 0, self->rx_buff.truesize);
511 memset(self->tx_buff.head, 0, self->tx_buff.truesize);
512
513 /* Need to store self somewhere */
514 dev_self[dev_count++] = self;
515
516 /* Steal the network device from irport */
517 self->netdev = irport->netdev;
518 self->irport = irport;
519
520 irport->priv = self;
521
522 /* Initialize IO */
523 self->io = &irport->io;
524 self->io->fir_base = fir_base;
525 self->io->sir_base = sir_base; /* Used by irport */
526 self->io->fir_ext = CHIP_IO_EXTENT;
527 self->io->sir_ext = 8; /* Used by irport */
528
529 if (ircc_irq < 255) {
530 if (ircc_irq!=irq)
531 MESSAGE("%s, Overriding IRQ - chip says %d, using %d\n",
532 driver_name, self->io->irq, ircc_irq);
533 self->io->irq = ircc_irq;
534 }
535 else
536 self->io->irq = irq;
537 if (ircc_dma < 255) {
538 if (ircc_dma!=dma)
539 MESSAGE("%s, Overriding DMA - chip says %d, using %d\n",
540 driver_name, self->io->dma, ircc_dma);
541 self->io->dma = ircc_dma;
542 }
543 else
544 self->io->dma = dma;
545
546 request_region(fir_base, CHIP_IO_EXTENT, driver_name);
547
548 /* Initialize QoS for this device */
549 irda_init_max_qos_capabilies(&irport->qos);
550
551 /* The only value we must override it the baudrate */
552 irport->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
553 IR_115200|IR_576000|IR_1152000|(IR_4000000 << 8);
554
555 irport->qos.min_turn_time.bits = 0x07;
556 irport->qos.window_size.bits = 0x01;
557 irda_qos_bits_to_value(&irport->qos);
558
559 irport->flags = IFF_FIR|IFF_MIR|IFF_SIR|IFF_DMA|IFF_PIO;
560
561
562 self->rx_buff.in_frame = FALSE;
563 self->rx_buff.state = OUTSIDE_FRAME;
564 self->tx_buff.data = self->tx_buff.head;
565 self->rx_buff.data = self->rx_buff.head;
566
567 /* Override the speed change function, since we must control it now */
568 irport->change_speed = &ircc_change_speed;
569 irport->interrupt = &ircc_interrupt;
570 self->netdev->open = &ircc_net_open;
571 self->netdev->stop = &ircc_net_close;
572
573 irport_start(self->irport);
574
575 self->pmdev = pm_register(PM_SYS_DEV, PM_SYS_IRDA, ircc_pmproc);
576 if (self->pmdev)
577 self->pmdev->data = self;
578
579 /* Power on device */
580
581 outb(0x00, fir_base+IRCC_MASTER);
582
583 return 0;
584 }
585
586 /*
587 * Function ircc_change_speed (self, baud)
588 *
589 * Change the speed of the device
590 *
591 */
592 static void ircc_change_speed(void *priv, u32 speed)
593 {
594 int iobase, ir_mode, ctrl, fast;
595 struct ircc_cb *self = (struct ircc_cb *) priv;
596 struct net_device *dev;
597
598 IRDA_DEBUG(0, __FUNCTION__ "\n");
599
600 ASSERT(self != NULL, return;);
601
602 dev = self->netdev;
603 iobase = self->io->fir_base;
604
605 /* Update accounting for new speed */
606 self->io->speed = speed;
607
608 outb(IRCC_MASTER_RESET, iobase+IRCC_MASTER);
609 outb(0x00, iobase+IRCC_MASTER);
610
611 switch (speed) {
612 default:
613 IRDA_DEBUG(0, __FUNCTION__ "(), unknown baud rate of %d\n",
614 speed);
615 /* FALLTHROUGH */
616 case 9600:
617 case 19200:
618 case 38400:
619 case 57600:
620 case 115200:
621 ir_mode = IRCC_CFGA_IRDA_SIR_A;
622 ctrl = 0;
623 fast = 0;
624 break;
625 case 576000:
626 ir_mode = IRCC_CFGA_IRDA_HDLC;
627 ctrl = IRCC_CRC;
628 fast = 0;
629 IRDA_DEBUG(0, __FUNCTION__ "(), handling baud of 576000\n");
630 break;
631 case 1152000:
632 ir_mode = IRCC_CFGA_IRDA_HDLC;
633 ctrl = IRCC_1152 | IRCC_CRC;
634 fast = 0;
635 IRDA_DEBUG(0, __FUNCTION__ "(), handling baud of 1152000\n");
636 break;
637 case 4000000:
638 ir_mode = IRCC_CFGA_IRDA_4PPM;
639 ctrl = IRCC_CRC;
640 fast = IRCC_LCR_A_FAST;
641 IRDA_DEBUG(0, __FUNCTION__ "(), handling baud of 4000000\n");
642 break;
643 }
644
645 register_bank(iobase, 0);
646 outb(0, iobase+IRCC_IER);
647 outb(IRCC_MASTER_INT_EN, iobase+IRCC_MASTER);
648
649 /* Make special FIR init if necessary */
650 if (speed > 115200) {
651 irport_stop(self->irport);
652
653 /* Install FIR transmit handler */
654 dev->hard_start_xmit = &ircc_hard_xmit;
655
656 /*
657 * Don't know why we have to do this, but FIR interrupts
658 * stops working if we remove it.
659 */
660 /* outb(UART_MCR_OUT2, self->io->sir_base + UART_MCR); */
661
662 /* Be ready for incoming frames */
663 ircc_dma_receive(self, iobase);
664 } else {
665 /* Install SIR transmit handler */
666 dev->hard_start_xmit = &irport_hard_xmit;
667 irport_start(self->irport);
668
669 IRDA_DEBUG(0, __FUNCTION__
670 "(), using irport to change speed to %d\n", speed);
671 irport_change_speed(self->irport, speed);
672 }
673
674 register_bank(iobase, 1);
675 outb(((inb(iobase+IRCC_SCE_CFGA) & 0x87) | ir_mode),
676 iobase+IRCC_SCE_CFGA);
677
678 #ifdef SMC_669 /* Uses pin 88/89 for Rx/Tx */
679 outb(((inb(iobase+IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM),
680 iobase+IRCC_SCE_CFGB);
681 #else
682 outb(((inb(iobase+IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR),
683 iobase+IRCC_SCE_CFGB);
684 #endif
685 (void) inb(iobase+IRCC_FIFO_THRESHOLD);
686 outb(64, iobase+IRCC_FIFO_THRESHOLD);
687
688 register_bank(iobase, 4);
689 outb((inb(iobase+IRCC_CONTROL) & 0x30) | ctrl, iobase+IRCC_CONTROL);
690
691 register_bank(iobase, 0);
692 outb(fast, iobase+IRCC_LCR_A);
693
694 netif_start_queue(dev);
695 }
696
697 /*
698 * Function ircc_hard_xmit (skb, dev)
699 *
700 * Transmit the frame!
701 *
702 */
703 static int ircc_hard_xmit(struct sk_buff *skb, struct net_device *dev)
704 {
705 struct irport_cb *irport;
706 struct ircc_cb *self;
707 unsigned long flags;
708 s32 speed;
709 int iobase;
710 int mtt;
711
712 irport = (struct irport_cb *) dev->priv;
713 self = (struct ircc_cb *) irport->priv;
714 ASSERT(self != NULL, return 0;);
715
716 iobase = self->io->fir_base;
717
718 netif_stop_queue(dev);
719
720 /* Check if we need to change the speed after this frame */
721 speed = irda_get_next_speed(skb);
722 if ((speed != self->io->speed) && (speed != -1)) {
723 /* Check for empty frame */
724 if (!skb->len) {
725 ircc_change_speed(self, speed);
726 dev_kfree_skb(skb);
727 return 0;
728 } else
729 self->new_speed = speed;
730 }
731
732 spin_lock_irqsave(&self->lock, flags);
733
734 memcpy(self->tx_buff.head, skb->data, skb->len);
735
736 self->tx_buff.len = skb->len;
737 self->tx_buff.data = self->tx_buff.head;
738
739 mtt = irda_get_mtt(skb);
740 if (mtt) {
741 int bofs;
742
743 /*
744 * Compute how many BOFs (STA or PA's) we need to waste the
745 * min turn time given the speed of the link.
746 */
747 bofs = mtt * (self->io->speed / 1000) / 8000;
748 if (bofs > 4095)
749 bofs = 4095;
750
751 ircc_dma_xmit(self, iobase, bofs);
752 } else {
753 /* Transmit frame */
754 ircc_dma_xmit(self, iobase, 0);
755 }
756 spin_unlock_irqrestore(&self->lock, flags);
757 dev_kfree_skb(skb);
758
759 return 0;
760 }
761
762 /*
763 * Function ircc_dma_xmit (self, iobase)
764 *
765 * Transmit data using DMA
766 *
767 */
768 static void ircc_dma_xmit(struct ircc_cb *self, int iobase, int bofs)
769 {
770 u8 ctrl;
771
772 IRDA_DEBUG(2, __FUNCTION__ "\n");
773 #if 0
774 /* Disable Rx */
775 register_bank(iobase, 0);
776 outb(0x00, iobase+IRCC_LCR_B);
777 #endif
778 register_bank(iobase, 1);
779 outb(inb(iobase+IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
780 iobase+IRCC_SCE_CFGB);
781
782 self->io->direction = IO_XMIT;
783
784 /* Set BOF additional count for generating the min turn time */
785 register_bank(iobase, 4);
786 outb(bofs & 0xff, iobase+IRCC_BOF_COUNT_LO);
787 ctrl = inb(iobase+IRCC_CONTROL) & 0xf0;
788 outb(ctrl | ((bofs >> 8) & 0x0f), iobase+IRCC_BOF_COUNT_HI);
789
790 /* Set max Tx frame size */
791 outb(self->tx_buff.len >> 8, iobase+IRCC_TX_SIZE_HI);
792 outb(self->tx_buff.len & 0xff, iobase+IRCC_TX_SIZE_LO);
793
794 /* Setup DMA controller (must be done after enabling chip DMA) */
795 setup_dma(self->io->dma, self->tx_buff.data, self->tx_buff.len,
796 DMA_TX_MODE);
797
798 outb(UART_MCR_OUT2, self->io->sir_base + UART_MCR);
799 /* Enable burst mode chip Tx DMA */
800 register_bank(iobase, 1);
801 outb(inb(iobase+IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE |
802 IRCC_CFGB_DMA_BURST, iobase+IRCC_SCE_CFGB);
803
804 /* Enable interrupt */
805 outb(IRCC_MASTER_INT_EN, iobase+IRCC_MASTER);
806 register_bank(iobase, 0);
807 outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase+IRCC_IER);
808
809 /* Enable transmit */
810 outb(IRCC_LCR_B_SCE_TRANSMIT|IRCC_LCR_B_SIP_ENABLE, iobase+IRCC_LCR_B);
811 }
812
813 /*
814 * Function ircc_dma_xmit_complete (self)
815 *
816 * The transfer of a frame in finished. This function will only be called
817 * by the interrupt handler
818 *
819 */
820 static void ircc_dma_xmit_complete(struct ircc_cb *self, int iobase)
821 {
822 IRDA_DEBUG(2, __FUNCTION__ "\n");
823 #if 0
824 /* Disable Tx */
825 register_bank(iobase, 0);
826 outb(0x00, iobase+IRCC_LCR_B);
827 #endif
828 register_bank(self->io->fir_base, 1);
829 outb(inb(self->io->fir_base+IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
830 self->io->fir_base+IRCC_SCE_CFGB);
831
832 /* Check for underrrun! */
833 register_bank(iobase, 0);
834 if (inb(iobase+IRCC_LSR) & IRCC_LSR_UNDERRUN) {
835 self->irport->stats.tx_errors++;
836 self->irport->stats.tx_fifo_errors++;
837
838 /* Reset error condition */
839 register_bank(iobase, 0);
840 outb(IRCC_MASTER_ERROR_RESET, iobase+IRCC_MASTER);
841 outb(0x00, iobase+IRCC_MASTER);
842 } else {
843 self->irport->stats.tx_packets++;
844 self->irport->stats.tx_bytes += self->tx_buff.len;
845 }
846
847 /* Check if it's time to change the speed */
848 if (self->new_speed) {
849 ircc_change_speed(self, self->new_speed);
850 self->new_speed = 0;
851 }
852
853 netif_wake_queue(self->netdev);
854 }
855
856 /*
857 * Function ircc_dma_receive (self)
858 *
859 * Get ready for receiving a frame. The device will initiate a DMA
860 * if it starts to receive a frame.
861 *
862 */
863 static int ircc_dma_receive(struct ircc_cb *self, int iobase)
864 {
865 #if 0
866 /* Turn off chip DMA */
867 register_bank(iobase, 1);
868 outb(inb(iobase+IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
869 iobase+IRCC_SCE_CFGB);
870 #endif
871 setup_dma(self->io->dma, self->rx_buff.data, self->rx_buff.truesize,
872 DMA_RX_MODE);
873
874 /* Set max Rx frame size */
875 register_bank(iobase, 4);
876 outb((2050 >> 8) & 0x0f, iobase+IRCC_RX_SIZE_HI);
877 outb(2050 & 0xff, iobase+IRCC_RX_SIZE_LO);
878
879 self->io->direction = IO_RECV;
880 self->rx_buff.data = self->rx_buff.head;
881
882 /* Setup DMA controller */
883
884 /* Enable receiver */
885 register_bank(iobase, 0);
886 outb(IRCC_LCR_B_SCE_RECEIVE | IRCC_LCR_B_SIP_ENABLE,
887 iobase+IRCC_LCR_B);
888
889 /* Enable burst mode chip Rx DMA */
890 register_bank(iobase, 1);
891 outb(inb(iobase+IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE |
892 IRCC_CFGB_DMA_BURST, iobase+IRCC_SCE_CFGB);
893
894 return 0;
895 }
896
897 /*
898 * Function ircc_dma_receive_complete (self)
899 *
900 * Finished with receiving frames
901 *
902 */
903 static void ircc_dma_receive_complete(struct ircc_cb *self, int iobase)
904 {
905 struct sk_buff *skb;
906 int len, msgcnt;
907
908 IRDA_DEBUG(2, __FUNCTION__ "\n");
909 #if 0
910 /* Disable Rx */
911 register_bank(iobase, 0);
912 outb(0x00, iobase+IRCC_LCR_B);
913 #endif
914 register_bank(iobase, 0);
915 msgcnt = inb(iobase+IRCC_LCR_B) & 0x08;
916
917 IRDA_DEBUG(2, __FUNCTION__ ": dma count = %d\n",
918 get_dma_residue(self->io->dma));
919
920 len = self->rx_buff.truesize - get_dma_residue(self->io->dma);
921
922 /* Remove CRC */
923 if (self->io->speed < 4000000)
924 len -= 2;
925 else
926 len -= 4;
927
928 if ((len < 2) || (len > 2050)) {
929 WARNING(__FUNCTION__ "(), bogus len=%d\n", len);
930 return;
931 }
932 IRDA_DEBUG(2, __FUNCTION__ ": msgcnt = %d, len=%d\n", msgcnt, len);
933
934 skb = dev_alloc_skb(len+1);
935 if (!skb) {
936 WARNING(__FUNCTION__ "(), memory squeeze, dropping frame.\n");
937 return;
938 }
939 /* Make sure IP header gets aligned */
940 skb_reserve(skb, 1);
941
942 memcpy(skb_put(skb, len), self->rx_buff.data, len);
943 self->irport->stats.rx_packets++;
944 self->irport->stats.rx_bytes += len;
945
946 skb->dev = self->netdev;
947 skb->mac.raw = skb->data;
948 skb->protocol = htons(ETH_P_IRDA);
949 netif_rx(skb);
950 }
951
952 /*
953 * Function ircc_interrupt (irq, dev_id, regs)
954 *
955 * An interrupt from the chip has arrived. Time to do some work
956 *
957 */
958 static void ircc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
959 {
960 struct net_device *dev = (struct net_device *) dev_id;
961 struct irport_cb *irport;
962 struct ircc_cb *self;
963 int iobase, iir;
964
965 if (dev == NULL) {
966 printk(KERN_WARNING "%s: irq %d for unknown device.\n",
967 driver_name, irq);
968 return;
969 }
970 irport = (struct irport_cb *) dev->priv;
971 ASSERT(irport != NULL, return;);
972 self = (struct ircc_cb *) irport->priv;
973 ASSERT(self != NULL, return;);
974
975 /* Check if we should use the SIR interrupt handler */
976 if (self->io->speed < 576000) {
977 irport_interrupt(irq, dev_id, regs);
978 return;
979 }
980 iobase = self->io->fir_base;
981
982 spin_lock(&self->lock);
983
984 register_bank(iobase, 0);
985 iir = inb(iobase+IRCC_IIR);
986
987 /* Disable interrupts */
988 outb(0, iobase+IRCC_IER);
989
990 IRDA_DEBUG(2, __FUNCTION__ "(), iir = 0x%02x\n", iir);
991
992 if (iir & IRCC_IIR_EOM) {
993 if (self->io->direction == IO_RECV)
994 ircc_dma_receive_complete(self, iobase);
995 else
996 ircc_dma_xmit_complete(self, iobase);
997
998 ircc_dma_receive(self, iobase);
999 }
1000
1001 /* Enable interrupts again */
1002 register_bank(iobase, 0);
1003 outb(IRCC_IER_ACTIVE_FRAME|IRCC_IER_EOM, iobase+IRCC_IER);
1004
1005 spin_unlock(&self->lock);
1006 }
1007
1008 #if 0 /* unused */
1009 /*
1010 * Function ircc_is_receiving (self)
1011 *
1012 * Return TRUE is we are currently receiving a frame
1013 *
1014 */
1015 static int ircc_is_receiving(struct ircc_cb *self)
1016 {
1017 int status = FALSE;
1018 /* int iobase; */
1019
1020 IRDA_DEBUG(0, __FUNCTION__ "\n");
1021
1022 ASSERT(self != NULL, return FALSE;);
1023
1024 IRDA_DEBUG(0, __FUNCTION__ ": dma count = %d\n",
1025 get_dma_residue(self->io->dma));
1026
1027 status = (self->rx_buff.state != OUTSIDE_FRAME);
1028
1029 return status;
1030 }
1031 #endif /* unused */
1032
1033 /*
1034 * Function ircc_net_open (dev)
1035 *
1036 * Start the device
1037 *
1038 */
1039 static int ircc_net_open(struct net_device *dev)
1040 {
1041 struct irport_cb *irport;
1042 struct ircc_cb *self;
1043 int iobase;
1044
1045 IRDA_DEBUG(0, __FUNCTION__ "\n");
1046
1047 ASSERT(dev != NULL, return -1;);
1048 irport = (struct irport_cb *) dev->priv;
1049 self = (struct ircc_cb *) irport->priv;
1050
1051 ASSERT(self != NULL, return 0;);
1052
1053 iobase = self->io->fir_base;
1054
1055 irport_net_open(dev); /* irport allocates the irq */
1056
1057 /*
1058 * Always allocate the DMA channel after the IRQ,
1059 * and clean up on failure.
1060 */
1061 if (request_dma(self->io->dma, dev->name)) {
1062 irport_net_close(dev);
1063
1064 WARNING(__FUNCTION__ "(), unable to allocate DMA=%d\n", self->io->dma);
1065 return -EAGAIN;
1066 }
1067
1068 MOD_INC_USE_COUNT;
1069
1070 return 0;
1071 }
1072
1073 /*
1074 * Function ircc_net_close (dev)
1075 *
1076 * Stop the device
1077 *
1078 */
1079 static int ircc_net_close(struct net_device *dev)
1080 {
1081 struct irport_cb *irport;
1082 struct ircc_cb *self;
1083 int iobase;
1084
1085 IRDA_DEBUG(0, __FUNCTION__ "\n");
1086
1087 ASSERT(dev != NULL, return -1;);
1088 irport = (struct irport_cb *) dev->priv;
1089 self = (struct ircc_cb *) irport->priv;
1090
1091 ASSERT(self != NULL, return 0;);
1092
1093 iobase = self->io->fir_base;
1094
1095 irport_net_close(dev);
1096
1097 disable_dma(self->io->dma);
1098
1099 free_dma(self->io->dma);
1100
1101 MOD_DEC_USE_COUNT;
1102
1103 return 0;
1104 }
1105
1106 static void ircc_suspend(struct ircc_cb *self)
1107 {
1108 MESSAGE("%s, Suspending\n", driver_name);
1109
1110 if (self->io->suspended)
1111 return;
1112
1113 ircc_net_close(self->netdev);
1114
1115 self->io->suspended = 1;
1116 }
1117
1118 static void ircc_wakeup(struct ircc_cb *self)
1119 {
1120 unsigned long flags;
1121
1122 if (!self->io->suspended)
1123 return;
1124
1125 save_flags(flags);
1126 cli();
1127
1128 ircc_net_open(self->netdev);
1129
1130 restore_flags(flags);
1131 MESSAGE("%s, Waking up\n", driver_name);
1132 }
1133
1134 static int ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data)
1135 {
1136 struct ircc_cb *self = (struct ircc_cb*) dev->data;
1137 if (self) {
1138 switch (rqst) {
1139 case PM_SUSPEND:
1140 ircc_suspend(self);
1141 break;
1142 case PM_RESUME:
1143 ircc_wakeup(self);
1144 break;
1145 }
1146 }
1147 return 0;
1148 }
1149
1150 #ifdef MODULE
1151
1152 /*
1153 * Function ircc_close (self)
1154 *
1155 * Close driver instance
1156 *
1157 */
1158 #ifdef MODULE
1159 static int __exit ircc_close(struct ircc_cb *self)
1160 {
1161 int iobase;
1162
1163 IRDA_DEBUG(0, __FUNCTION__ "\n");
1164
1165 ASSERT(self != NULL, return -1;);
1166
1167 iobase = self->irport->io.fir_base;
1168
1169 irport_close(self->irport);
1170
1171 /* Stop interrupts */
1172 register_bank(iobase, 0);
1173 outb(0, iobase+IRCC_IER);
1174 outb(IRCC_MASTER_RESET, iobase+IRCC_MASTER);
1175 outb(0x00, iobase+IRCC_MASTER);
1176 #if 0
1177 /* Reset to SIR mode */
1178 register_bank(iobase, 1);
1179 outb(IRCC_CFGA_IRDA_SIR_A|IRCC_CFGA_TX_POLARITY, iobase+IRCC_SCE_CFGA);
1180 outb(IRCC_CFGB_IR, iobase+IRCC_SCE_CFGB);
1181 #endif
1182 /* Release the PORT that this driver is using */
1183 IRDA_DEBUG(0, __FUNCTION__ "(), releasing 0x%03x\n",
1184 self->io->fir_base);
1185
1186 release_region(self->io->fir_base, self->io->fir_ext);
1187
1188 if (self->tx_buff.head)
1189 kfree(self->tx_buff.head);
1190
1191 if (self->rx_buff.head)
1192 kfree(self->rx_buff.head);
1193
1194 kfree(self);
1195
1196 return 0;
1197 }
1198 #endif /* MODULE */
1199
1200 int __init smc_init(void)
1201 {
1202 return ircc_init();
1203 }
1204
1205 void __exit smc_cleanup(void)
1206 {
1207 int i;
1208
1209 IRDA_DEBUG(0, __FUNCTION__ "\n");
1210
1211 for (i=0; i < 2; i++) {
1212 if (dev_self[i])
1213 ircc_close(dev_self[i]);
1214 }
1215 }
1216
1217 module_init(smc_init);
1218 module_exit(smc_cleanup);
1219
1220 MODULE_AUTHOR("Thomas Davis <tadavis@jps.net>");
1221 MODULE_DESCRIPTION("SMC IrCC controller driver");
1222 MODULE_PARM(ircc_dma, "1i");
1223 MODULE_PARM_DESC(ircc_dma, "DMA channel");
1224 MODULE_PARM(ircc_irq, "1i");
1225 MODULE_PARM_DESC(ircc_irq, "IRQ line");
1226 MODULE_PARM(ircc_fir, "1-4i");
1227 MODULE_PARM_DESC(ircc_fir, "FIR Base Address");
1228 MODULE_PARM(ircc_sir, "1-4i");
1229 MODULE_PARM_DESC(ircc_sir, "SIR Base Address");
1230
1231 #endif /* MODULE */
1232