File: /usr/src/linux/drivers/net/irda/w83977af_ir.c
1 /*********************************************************************
2 *
3 * Filename: w83977af_ir.c
4 * Version: 1.0
5 * Description: FIR driver for the Winbond W83977AF Super I/O chip
6 * Status: Experimental.
7 * Author: Paul VanderSpek
8 * Created at: Wed Nov 4 11:46:16 1998
9 * Modified at: Fri Jan 28 12:10:59 2000
10 * Modified by: Dag Brattli <dagb@cs.uit.no>
11 *
12 * Copyright (c) 1998-2000 Dag Brattli <dagb@cs.uit.no>
13 * Copyright (c) 1998-1999 Rebel.com
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * Neither Paul VanderSpek nor Rebel.com admit liability nor provide
21 * warranty for any of this software. This material is provided "AS-IS"
22 * and at no charge.
23 *
24 * If you find bugs in this file, its very likely that the same bug
25 * will also be in pc87108.c since the implementations are quite
26 * similar.
27 *
28 * Notice that all functions that needs to access the chip in _any_
29 * way, must save BSR register on entry, and restore it on exit.
30 * It is _very_ important to follow this policy!
31 *
32 * __u8 bank;
33 *
34 * bank = inb( iobase+BSR);
35 *
36 * do_your_stuff_here();
37 *
38 * outb( bank, iobase+BSR);
39 *
40 ********************************************************************/
41
42 #include <linux/module.h>
43 #include <linux/config.h>
44 #include <linux/kernel.h>
45 #include <linux/types.h>
46 #include <linux/skbuff.h>
47 #include <linux/netdevice.h>
48 #include <linux/ioport.h>
49 #include <linux/delay.h>
50 #include <linux/slab.h>
51 #include <linux/init.h>
52 #include <linux/rtnetlink.h>
53
54 #include <asm/io.h>
55 #include <asm/dma.h>
56 #include <asm/byteorder.h>
57
58 #include <net/irda/irda.h>
59 #include <net/irda/irmod.h>
60 #include <net/irda/wrapper.h>
61 #include <net/irda/irda_device.h>
62 #include <net/irda/w83977af.h>
63 #include <net/irda/w83977af_ir.h>
64
65 #ifdef CONFIG_ARCH_NETWINDER /* Adjust to NetWinder differences */
66 #undef CONFIG_NETWINDER_TX_DMA_PROBLEMS /* Not needed */
67 #define CONFIG_NETWINDER_RX_DMA_PROBLEMS /* Must have this one! */
68 #endif
69 #undef CONFIG_USE_INTERNAL_TIMER /* Just cannot make that timer work */
70 #define CONFIG_USE_W977_PNP /* Currently needed */
71 #define PIO_MAX_SPEED 115200
72
73 static char *driver_name = "w83977af_ir";
74 static int qos_mtt_bits = 0x07; /* 1 ms or more */
75
76 #define CHIP_IO_EXTENT 8
77
78 static unsigned int io[] = { 0x180, ~0, ~0, ~0 };
79 #ifdef CONFIG_ARCH_NETWINDER /* Adjust to NetWinder differences */
80 static unsigned int irq[] = { 6, 0, 0, 0 };
81 #else
82 static unsigned int irq[] = { 11, 0, 0, 0 };
83 #endif
84 static unsigned int dma[] = { 1, 0, 0, 0 };
85 static unsigned int efbase[] = { W977_EFIO_BASE, W977_EFIO2_BASE };
86 static unsigned int efio = W977_EFIO_BASE;
87
88 static struct w83977af_ir *dev_self[] = { NULL, NULL, NULL, NULL};
89
90 /* Some prototypes */
91 static int w83977af_open(int i, unsigned int iobase, unsigned int irq,
92 unsigned int dma);
93 static int w83977af_close(struct w83977af_ir *self);
94 static int w83977af_probe(int iobase, int irq, int dma);
95 static int w83977af_dma_receive(struct w83977af_ir *self);
96 static int w83977af_dma_receive_complete(struct w83977af_ir *self);
97 static int w83977af_hard_xmit(struct sk_buff *skb, struct net_device *dev);
98 static int w83977af_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
99 static void w83977af_dma_write(struct w83977af_ir *self, int iobase);
100 static void w83977af_change_speed(struct w83977af_ir *self, __u32 speed);
101 static void w83977af_interrupt(int irq, void *dev_id, struct pt_regs *regs);
102 static int w83977af_is_receiving(struct w83977af_ir *self);
103
104 static int w83977af_net_init(struct net_device *dev);
105 static int w83977af_net_open(struct net_device *dev);
106 static int w83977af_net_close(struct net_device *dev);
107 static int w83977af_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
108 static struct net_device_stats *w83977af_net_get_stats(struct net_device *dev);
109
110 /*
111 * Function w83977af_init ()
112 *
113 * Initialize chip. Just try to find out how many chips we are dealing with
114 * and where they are
115 */
116 int __init w83977af_init(void)
117 {
118 int i;
119
120 IRDA_DEBUG(0, __FUNCTION__ "()\n");
121
122 for (i=0; (io[i] < 2000) && (i < 4); i++) {
123 int ioaddr = io[i];
124 if (check_region(ioaddr, CHIP_IO_EXTENT) < 0)
125 continue;
126 if (w83977af_open(i, io[i], irq[i], dma[i]) == 0)
127 return 0;
128 }
129 return -ENODEV;
130 }
131
132 /*
133 * Function w83977af_cleanup ()
134 *
135 * Close all configured chips
136 *
137 */
138 #ifdef MODULE
139 void w83977af_cleanup(void)
140 {
141 int i;
142
143 IRDA_DEBUG(4, __FUNCTION__ "()\n");
144
145 for (i=0; i < 4; i++) {
146 if (dev_self[i])
147 w83977af_close(dev_self[i]);
148 }
149 }
150 #endif /* MODULE */
151
152 /*
153 * Function w83977af_open (iobase, irq)
154 *
155 * Open driver instance
156 *
157 */
158 int w83977af_open(int i, unsigned int iobase, unsigned int irq,
159 unsigned int dma)
160 {
161 struct net_device *dev;
162 struct w83977af_ir *self;
163 int ret;
164 int err;
165
166 IRDA_DEBUG(0, __FUNCTION__ "()\n");
167
168 if (w83977af_probe(iobase, irq, dma) == -1)
169 return -1;
170
171 /*
172 * Allocate new instance of the driver
173 */
174 self = kmalloc(sizeof(struct w83977af_ir), GFP_KERNEL);
175 if (self == NULL) {
176 printk( KERN_ERR "IrDA: Can't allocate memory for "
177 "IrDA control block!\n");
178 return -ENOMEM;
179 }
180 memset(self, 0, sizeof(struct w83977af_ir));
181
182 /* Need to store self somewhere */
183 dev_self[i] = self;
184
185 /* Initialize IO */
186 self->io.fir_base = iobase;
187 self->io.irq = irq;
188 self->io.fir_ext = CHIP_IO_EXTENT;
189 self->io.dma = dma;
190 self->io.fifo_size = 32;
191
192 /* Lock the port that we need */
193 ret = check_region(self->io.fir_base, self->io.fir_ext);
194 if (ret < 0) {
195 IRDA_DEBUG(0, __FUNCTION__ "(), can't get iobase of 0x%03x\n",
196 self->io.fir_base);
197 /* w83977af_cleanup( self); */
198 return -ENODEV;
199 }
200 request_region(self->io.fir_base, self->io.fir_ext, driver_name);
201
202 /* Initialize QoS for this device */
203 irda_init_max_qos_capabilies(&self->qos);
204
205 /* The only value we must override it the baudrate */
206
207 /* FIXME: The HP HDLS-1100 does not support 1152000! */
208 self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
209 IR_115200|IR_576000|IR_1152000|(IR_4000000 << 8);
210
211 /* The HP HDLS-1100 needs 1 ms according to the specs */
212 self->qos.min_turn_time.bits = qos_mtt_bits;
213 irda_qos_bits_to_value(&self->qos);
214
215 self->flags = IFF_FIR|IFF_MIR|IFF_SIR|IFF_DMA|IFF_PIO;
216
217 /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
218 self->rx_buff.truesize = 14384;
219 self->tx_buff.truesize = 4000;
220
221 /* Allocate memory if needed */
222 self->rx_buff.head = (__u8 *) kmalloc(self->rx_buff.truesize,
223 GFP_KERNEL|GFP_DMA);
224 if (self->rx_buff.head == NULL)
225 return -ENOMEM;
226
227 memset(self->rx_buff.head, 0, self->rx_buff.truesize);
228
229 self->tx_buff.head = (__u8 *) kmalloc(self->tx_buff.truesize,
230 GFP_KERNEL|GFP_DMA);
231 if (self->tx_buff.head == NULL) {
232 kfree(self->rx_buff.head);
233 return -ENOMEM;
234 }
235 memset(self->tx_buff.head, 0, self->tx_buff.truesize);
236
237 self->rx_buff.in_frame = FALSE;
238 self->rx_buff.state = OUTSIDE_FRAME;
239 self->tx_buff.data = self->tx_buff.head;
240 self->rx_buff.data = self->rx_buff.head;
241
242 if (!(dev = dev_alloc("irda%d", &err))) {
243 ERROR(__FUNCTION__ "(), dev_alloc() failed!\n");
244 return -ENOMEM;
245 }
246 dev->priv = (void *) self;
247 self->netdev = dev;
248
249 /* Override the network functions we need to use */
250 dev->init = w83977af_net_init;
251 dev->hard_start_xmit = w83977af_hard_xmit;
252 dev->open = w83977af_net_open;
253 dev->stop = w83977af_net_close;
254 dev->do_ioctl = w83977af_net_ioctl;
255 dev->get_stats = w83977af_net_get_stats;
256
257 rtnl_lock();
258 err = register_netdevice(dev);
259 rtnl_unlock();
260 if (err) {
261 ERROR(__FUNCTION__ "(), register_netdevice() failed!\n");
262 return -1;
263 }
264 MESSAGE("IrDA: Registered device %s\n", dev->name);
265
266 return 0;
267 }
268
269 /*
270 * Function w83977af_close (self)
271 *
272 * Close driver instance
273 *
274 */
275 static int w83977af_close(struct w83977af_ir *self)
276 {
277 int iobase;
278
279 IRDA_DEBUG(0, __FUNCTION__ "()\n");
280
281 iobase = self->io.fir_base;
282
283 #ifdef CONFIG_USE_W977_PNP
284 /* enter PnP configuration mode */
285 w977_efm_enter(efio);
286
287 w977_select_device(W977_DEVICE_IR, efio);
288
289 /* Deactivate device */
290 w977_write_reg(0x30, 0x00, efio);
291
292 w977_efm_exit(efio);
293 #endif /* CONFIG_USE_W977_PNP */
294
295 /* Remove netdevice */
296 if (self->netdev) {
297 rtnl_lock();
298 unregister_netdevice(self->netdev);
299 rtnl_unlock();
300 }
301
302 /* Release the PORT that this driver is using */
303 IRDA_DEBUG(0 , __FUNCTION__ "(), Releasing Region %03x\n",
304 self->io.fir_base);
305 release_region(self->io.fir_base, self->io.fir_ext);
306
307 if (self->tx_buff.head)
308 kfree(self->tx_buff.head);
309
310 if (self->rx_buff.head)
311 kfree(self->rx_buff.head);
312
313 kfree(self);
314
315 return 0;
316 }
317
318 int w83977af_probe( int iobase, int irq, int dma)
319 {
320 int version;
321 int i;
322
323 for (i=0; i < 2; i++) {
324 IRDA_DEBUG( 0, __FUNCTION__ "()\n");
325 #ifdef CONFIG_USE_W977_PNP
326 /* Enter PnP configuration mode */
327 w977_efm_enter(efbase[i]);
328
329 w977_select_device(W977_DEVICE_IR, efbase[i]);
330
331 /* Configure PnP port, IRQ, and DMA channel */
332 w977_write_reg(0x60, (iobase >> 8) & 0xff, efbase[i]);
333 w977_write_reg(0x61, (iobase) & 0xff, efbase[i]);
334
335 w977_write_reg(0x70, irq, efbase[i]);
336 #ifdef CONFIG_ARCH_NETWINDER
337 /* Netwinder uses 1 higher than Linux */
338 w977_write_reg(0x74, dma+1, efbase[i]);
339 #else
340 w977_write_reg(0x74, dma, efbase[i]);
341 #endif /*CONFIG_ARCH_NETWINDER */
342 w977_write_reg(0x75, 0x04, efbase[i]); /* Disable Tx DMA */
343
344 /* Set append hardware CRC, enable IR bank selection */
345 w977_write_reg(0xf0, APEDCRC|ENBNKSEL, efbase[i]);
346
347 /* Activate device */
348 w977_write_reg(0x30, 0x01, efbase[i]);
349
350 w977_efm_exit(efbase[i]);
351 #endif /* CONFIG_USE_W977_PNP */
352 /* Disable Advanced mode */
353 switch_bank(iobase, SET2);
354 outb(iobase+2, 0x00);
355
356 /* Turn on UART (global) interrupts */
357 switch_bank(iobase, SET0);
358 outb(HCR_EN_IRQ, iobase+HCR);
359
360 /* Switch to advanced mode */
361 switch_bank(iobase, SET2);
362 outb(inb(iobase+ADCR1) | ADCR1_ADV_SL, iobase+ADCR1);
363
364 /* Set default IR-mode */
365 switch_bank(iobase, SET0);
366 outb(HCR_SIR, iobase+HCR);
367
368 /* Read the Advanced IR ID */
369 switch_bank(iobase, SET3);
370 version = inb(iobase+AUID);
371
372 /* Should be 0x1? */
373 if (0x10 == (version & 0xf0)) {
374 efio = efbase[i];
375
376 /* Set FIFO size to 32 */
377 switch_bank(iobase, SET2);
378 outb(ADCR2_RXFS32|ADCR2_TXFS32, iobase+ADCR2);
379
380 /* Set FIFO threshold to TX17, RX16 */
381 switch_bank(iobase, SET0);
382 outb(UFR_RXTL|UFR_TXTL|UFR_TXF_RST|UFR_RXF_RST|
383 UFR_EN_FIFO,iobase+UFR);
384
385 /* Receiver frame length */
386 switch_bank(iobase, SET4);
387 outb(2048 & 0xff, iobase+6);
388 outb((2048 >> 8) & 0x1f, iobase+7);
389
390 /*
391 * Init HP HSDL-1100 transceiver.
392 *
393 * Set IRX_MSL since we have 2 * receive paths IRRX,
394 * and IRRXH. Clear IRSL0D since we want IRSL0 * to
395 * be a input pin used for IRRXH
396 *
397 * IRRX pin 37 connected to receiver
398 * IRTX pin 38 connected to transmitter
399 * FIRRX pin 39 connected to receiver (IRSL0)
400 * CIRRX pin 40 connected to pin 37
401 */
402 switch_bank(iobase, SET7);
403 outb(0x40, iobase+7);
404
405 MESSAGE("W83977AF (IR) driver loaded. "
406 "Version: 0x%02x\n", version);
407
408 return 0;
409 } else {
410 /* Try next extented function register address */
411 IRDA_DEBUG( 0, __FUNCTION__ "(), Wrong chip version");
412 }
413 }
414 return -1;
415 }
416
417 void w83977af_change_speed(struct w83977af_ir *self, __u32 speed)
418 {
419 int ir_mode = HCR_SIR;
420 int iobase;
421 __u8 set;
422
423 iobase = self->io.fir_base;
424
425 /* Update accounting for new speed */
426 self->io.speed = speed;
427
428 /* Save current bank */
429 set = inb(iobase+SSR);
430
431 /* Disable interrupts */
432 switch_bank(iobase, SET0);
433 outb(0, iobase+ICR);
434
435 /* Select Set 2 */
436 switch_bank(iobase, SET2);
437 outb(0x00, iobase+ABHL);
438
439 switch (speed) {
440 case 9600: outb(0x0c, iobase+ABLL); break;
441 case 19200: outb(0x06, iobase+ABLL); break;
442 case 38400: outb(0x03, iobase+ABLL); break;
443 case 57600: outb(0x02, iobase+ABLL); break;
444 case 115200: outb(0x01, iobase+ABLL); break;
445 case 576000:
446 ir_mode = HCR_MIR_576;
447 IRDA_DEBUG(0, __FUNCTION__ "(), handling baud of 576000\n");
448 break;
449 case 1152000:
450 ir_mode = HCR_MIR_1152;
451 IRDA_DEBUG(0, __FUNCTION__ "(), handling baud of 1152000\n");
452 break;
453 case 4000000:
454 ir_mode = HCR_FIR;
455 IRDA_DEBUG(0, __FUNCTION__ "(), handling baud of 4000000\n");
456 break;
457 default:
458 ir_mode = HCR_FIR;
459 IRDA_DEBUG(0, __FUNCTION__ "(), unknown baud rate of %d\n", speed);
460 break;
461 }
462
463 /* Set speed mode */
464 switch_bank(iobase, SET0);
465 outb(ir_mode, iobase+HCR);
466
467 /* set FIFO size to 32 */
468 switch_bank(iobase, SET2);
469 outb(ADCR2_RXFS32|ADCR2_TXFS32, iobase+ADCR2);
470
471 /* set FIFO threshold to TX17, RX16 */
472 switch_bank(iobase, SET0);
473 outb(0x00, iobase+UFR); /* Reset */
474 outb(UFR_EN_FIFO, iobase+UFR); /* First we must enable FIFO */
475 outb(0xa7, iobase+UFR);
476
477 netif_wake_queue(self->netdev);
478
479 /* Enable some interrupts so we can receive frames */
480 switch_bank(iobase, SET0);
481 if (speed > PIO_MAX_SPEED) {
482 outb(ICR_EFSFI, iobase+ICR);
483 w83977af_dma_receive(self);
484 } else
485 outb(ICR_ERBRI, iobase+ICR);
486
487 /* Restore SSR */
488 outb(set, iobase+SSR);
489 }
490
491 /*
492 * Function w83977af_hard_xmit (skb, dev)
493 *
494 * Sets up a DMA transfer to send the current frame.
495 *
496 */
497 int w83977af_hard_xmit(struct sk_buff *skb, struct net_device *dev)
498 {
499 struct w83977af_ir *self;
500 __s32 speed;
501 int iobase;
502 __u8 set;
503 int mtt;
504
505 self = (struct w83977af_ir *) dev->priv;
506
507 iobase = self->io.fir_base;
508
509 IRDA_DEBUG(4, __FUNCTION__ "(%ld), skb->len=%d\n", jiffies,
510 (int) skb->len);
511
512 /* Lock transmit buffer */
513 netif_stop_queue(dev);
514
515 /* Check if we need to change the speed */
516 speed = irda_get_next_speed(skb);
517 if ((speed != self->io.speed) && (speed != -1)) {
518 /* Check for empty frame */
519 if (!skb->len) {
520 w83977af_change_speed(self, speed);
521 dev_kfree_skb(skb);
522 return 0;
523 } else
524 self->new_speed = speed;
525 }
526
527 /* Save current set */
528 set = inb(iobase+SSR);
529
530 /* Decide if we should use PIO or DMA transfer */
531 if (self->io.speed > PIO_MAX_SPEED) {
532 self->tx_buff.data = self->tx_buff.head;
533 memcpy(self->tx_buff.data, skb->data, skb->len);
534 self->tx_buff.len = skb->len;
535
536 mtt = irda_get_mtt(skb);
537 #ifdef CONFIG_USE_INTERNAL_TIMER
538 if (mtt > 50) {
539 /* Adjust for timer resolution */
540 mtt /= 1000+1;
541
542 /* Setup timer */
543 switch_bank(iobase, SET4);
544 outb(mtt & 0xff, iobase+TMRL);
545 outb((mtt >> 8) & 0x0f, iobase+TMRH);
546
547 /* Start timer */
548 outb(IR_MSL_EN_TMR, iobase+IR_MSL);
549 self->io.direction = IO_XMIT;
550
551 /* Enable timer interrupt */
552 switch_bank(iobase, SET0);
553 outb(ICR_ETMRI, iobase+ICR);
554 } else {
555 #endif
556 IRDA_DEBUG(4,__FUNCTION__ "(%ld), mtt=%d\n", jiffies, mtt);
557 if (mtt)
558 udelay(mtt);
559
560 /* Enable DMA interrupt */
561 switch_bank(iobase, SET0);
562 outb(ICR_EDMAI, iobase+ICR);
563 w83977af_dma_write(self, iobase);
564 #ifdef CONFIG_USE_INTERNAL_TIMER
565 }
566 #endif
567 } else {
568 self->tx_buff.data = self->tx_buff.head;
569 self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
570 self->tx_buff.truesize);
571
572 /* Add interrupt on tx low level (will fire immediately) */
573 switch_bank(iobase, SET0);
574 outb(ICR_ETXTHI, iobase+ICR);
575 }
576 dev_kfree_skb(skb);
577
578 /* Restore set register */
579 outb(set, iobase+SSR);
580
581 return 0;
582 }
583
584 /*
585 * Function w83977af_dma_write (self, iobase)
586 *
587 * Send frame using DMA
588 *
589 */
590 static void w83977af_dma_write(struct w83977af_ir *self, int iobase)
591 {
592 __u8 set;
593 #ifdef CONFIG_NETWINDER_TX_DMA_PROBLEMS
594 unsigned long flags;
595 __u8 hcr;
596 #endif
597 IRDA_DEBUG(4, __FUNCTION__ "(), len=%d\n", self->tx_buff.len);
598
599 /* Save current set */
600 set = inb(iobase+SSR);
601
602 /* Disable DMA */
603 switch_bank(iobase, SET0);
604 outb(inb(iobase+HCR) & ~HCR_EN_DMA, iobase+HCR);
605
606 /* Choose transmit DMA channel */
607 switch_bank(iobase, SET2);
608 outb(ADCR1_D_CHSW|/*ADCR1_DMA_F|*/ADCR1_ADV_SL, iobase+ADCR1);
609 #ifdef CONFIG_NETWINDER_TX_DMA_PROBLEMS
610 save_flags(flags);
611 cli();
612
613 disable_dma(self->io.dma);
614 clear_dma_ff(self->io.dma);
615 set_dma_mode(self->io.dma, DMA_MODE_READ);
616 set_dma_addr(self->io.dma, virt_to_bus(self->tx_buff.data));
617 set_dma_count(self->io.dma, self->tx_buff.len);
618 #else
619 setup_dma(self->io.dma, self->tx_buff.data, self->tx_buff.len,
620 DMA_MODE_WRITE);
621 #endif
622 self->io.direction = IO_XMIT;
623
624 /* Enable DMA */
625 switch_bank(iobase, SET0);
626 #ifdef CONFIG_NETWINDER_TX_DMA_PROBLEMS
627 hcr = inb(iobase+HCR);
628 outb(hcr | HCR_EN_DMA, iobase+HCR);
629 enable_dma(self->io.dma);
630 restore_flags(flags);
631 #else
632 outb(inb(iobase+HCR) | HCR_EN_DMA | HCR_TX_WT, iobase+HCR);
633 #endif
634
635 /* Restore set register */
636 outb(set, iobase+SSR);
637 }
638
639 /*
640 * Function w83977af_pio_write (iobase, buf, len, fifo_size)
641 *
642 *
643 *
644 */
645 static int w83977af_pio_write(int iobase, __u8 *buf, int len, int fifo_size)
646 {
647 int actual = 0;
648 __u8 set;
649
650 IRDA_DEBUG(4, __FUNCTION__ "()\n");
651
652 /* Save current bank */
653 set = inb(iobase+SSR);
654
655 switch_bank(iobase, SET0);
656 if (!(inb_p(iobase+USR) & USR_TSRE)) {
657 IRDA_DEBUG(4, __FUNCTION__
658 "(), warning, FIFO not empty yet!\n");
659
660 fifo_size -= 17;
661 IRDA_DEBUG(4, __FUNCTION__ "%d bytes left in tx fifo\n",
662 fifo_size);
663 }
664
665 /* Fill FIFO with current frame */
666 while ((fifo_size-- > 0) && (actual < len)) {
667 /* Transmit next byte */
668 outb(buf[actual++], iobase+TBR);
669 }
670
671 IRDA_DEBUG(4, __FUNCTION__ "(), fifo_size %d ; %d sent of %d\n",
672 fifo_size, actual, len);
673
674 /* Restore bank */
675 outb(set, iobase+SSR);
676
677 return actual;
678 }
679
680 /*
681 * Function w83977af_dma_xmit_complete (self)
682 *
683 * The transfer of a frame in finished. So do the necessary things
684 *
685 *
686 */
687 void w83977af_dma_xmit_complete(struct w83977af_ir *self)
688 {
689 int iobase;
690 __u8 set;
691
692 IRDA_DEBUG(4, __FUNCTION__ "(%ld)\n", jiffies);
693
694 ASSERT(self != NULL, return;);
695
696 iobase = self->io.fir_base;
697
698 /* Save current set */
699 set = inb(iobase+SSR);
700
701 /* Disable DMA */
702 switch_bank(iobase, SET0);
703 outb(inb(iobase+HCR) & ~HCR_EN_DMA, iobase+HCR);
704
705 /* Check for underrrun! */
706 if (inb(iobase+AUDR) & AUDR_UNDR) {
707 IRDA_DEBUG(0, __FUNCTION__ "(), Transmit underrun!\n");
708
709 self->stats.tx_errors++;
710 self->stats.tx_fifo_errors++;
711
712 /* Clear bit, by writing 1 to it */
713 outb(AUDR_UNDR, iobase+AUDR);
714 } else
715 self->stats.tx_packets++;
716
717
718 if (self->new_speed) {
719 w83977af_change_speed(self, self->new_speed);
720 self->new_speed = 0;
721 }
722
723 /* Unlock tx_buff and request another frame */
724 /* Tell the network layer, that we want more frames */
725 netif_wake_queue(self->netdev);
726
727 /* Restore set */
728 outb(set, iobase+SSR);
729 }
730
731 /*
732 * Function w83977af_dma_receive (self)
733 *
734 * Get ready for receiving a frame. The device will initiate a DMA
735 * if it starts to receive a frame.
736 *
737 */
738 int w83977af_dma_receive(struct w83977af_ir *self)
739 {
740 int iobase;
741 __u8 set;
742 #ifdef CONFIG_NETWINDER_RX_DMA_PROBLEMS
743 unsigned long flags;
744 __u8 hcr;
745 #endif
746 ASSERT(self != NULL, return -1;);
747
748 IRDA_DEBUG(4, __FUNCTION__ "\n");
749
750 iobase= self->io.fir_base;
751
752 /* Save current set */
753 set = inb(iobase+SSR);
754
755 /* Disable DMA */
756 switch_bank(iobase, SET0);
757 outb(inb(iobase+HCR) & ~HCR_EN_DMA, iobase+HCR);
758
759 /* Choose DMA Rx, DMA Fairness, and Advanced mode */
760 switch_bank(iobase, SET2);
761 outb((inb(iobase+ADCR1) & ~ADCR1_D_CHSW)/*|ADCR1_DMA_F*/|ADCR1_ADV_SL,
762 iobase+ADCR1);
763
764 self->io.direction = IO_RECV;
765 self->rx_buff.data = self->rx_buff.head;
766
767 #ifdef CONFIG_NETWINDER_RX_DMA_PROBLEMS
768 save_flags(flags);
769 cli();
770
771 disable_dma(self->io.dma);
772 clear_dma_ff(self->io.dma);
773 set_dma_mode(self->io.dma, DMA_MODE_READ);
774 set_dma_addr(self->io.dma, virt_to_bus(self->rx_buff.data));
775 set_dma_count(self->io.dma, self->rx_buff.truesize);
776 #else
777 setup_dma(self->io.dma, self->rx_buff.data, self->rx_buff.truesize,
778 DMA_MODE_READ);
779 #endif
780 /*
781 * Reset Rx FIFO. This will also flush the ST_FIFO, it's very
782 * important that we don't reset the Tx FIFO since it might not
783 * be finished transmitting yet
784 */
785 switch_bank(iobase, SET0);
786 outb(UFR_RXTL|UFR_TXTL|UFR_RXF_RST|UFR_EN_FIFO, iobase+UFR);
787 self->st_fifo.len = self->st_fifo.tail = self->st_fifo.head = 0;
788
789 /* Enable DMA */
790 switch_bank(iobase, SET0);
791 #ifdef CONFIG_NETWINDER_RX_DMA_PROBLEMS
792 hcr = inb(iobase+HCR);
793 outb(hcr | HCR_EN_DMA, iobase+HCR);
794 enable_dma(self->io.dma);
795 restore_flags(flags);
796 #else
797 outb(inb(iobase+HCR) | HCR_EN_DMA, iobase+HCR);
798 #endif
799 /* Restore set */
800 outb(set, iobase+SSR);
801
802 return 0;
803 }
804
805 /*
806 * Function w83977af_receive_complete (self)
807 *
808 * Finished with receiving a frame
809 *
810 */
811 int w83977af_dma_receive_complete(struct w83977af_ir *self)
812 {
813 struct sk_buff *skb;
814 struct st_fifo *st_fifo;
815 int len;
816 int iobase;
817 __u8 set;
818 __u8 status;
819
820 IRDA_DEBUG(4, __FUNCTION__ "\n");
821
822 st_fifo = &self->st_fifo;
823
824 iobase = self->io.fir_base;
825
826 /* Save current set */
827 set = inb(iobase+SSR);
828
829 iobase = self->io.fir_base;
830
831 /* Read status FIFO */
832 switch_bank(iobase, SET5);
833 while ((status = inb(iobase+FS_FO)) & FS_FO_FSFDR) {
834 st_fifo->entries[st_fifo->tail].status = status;
835
836 st_fifo->entries[st_fifo->tail].len = inb(iobase+RFLFL);
837 st_fifo->entries[st_fifo->tail].len |= inb(iobase+RFLFH) << 8;
838
839 st_fifo->tail++;
840 st_fifo->len++;
841 }
842
843 while (st_fifo->len) {
844 /* Get first entry */
845 status = st_fifo->entries[st_fifo->head].status;
846 len = st_fifo->entries[st_fifo->head].len;
847 st_fifo->head++;
848 st_fifo->len--;
849
850 /* Check for errors */
851 if (status & FS_FO_ERR_MSK) {
852 if (status & FS_FO_LST_FR) {
853 /* Add number of lost frames to stats */
854 self->stats.rx_errors += len;
855 } else {
856 /* Skip frame */
857 self->stats.rx_errors++;
858
859 self->rx_buff.data += len;
860
861 if (status & FS_FO_MX_LEX)
862 self->stats.rx_length_errors++;
863
864 if (status & FS_FO_PHY_ERR)
865 self->stats.rx_frame_errors++;
866
867 if (status & FS_FO_CRC_ERR)
868 self->stats.rx_crc_errors++;
869 }
870 /* The errors below can be reported in both cases */
871 if (status & FS_FO_RX_OV)
872 self->stats.rx_fifo_errors++;
873
874 if (status & FS_FO_FSF_OV)
875 self->stats.rx_fifo_errors++;
876
877 } else {
878 /* Check if we have transferred all data to memory */
879 switch_bank(iobase, SET0);
880 if (inb(iobase+USR) & USR_RDR) {
881 #ifdef CONFIG_USE_INTERNAL_TIMER
882 /* Put this entry back in fifo */
883 st_fifo->head--;
884 st_fifo->len++;
885 st_fifo->entries[st_fifo->head].status = status;
886 st_fifo->entries[st_fifo->head].len = len;
887
888 /* Restore set register */
889 outb(set, iobase+SSR);
890
891 return FALSE; /* I'll be back! */
892 #else
893 udelay(80); /* Should be enough!? */
894 #endif
895 }
896
897 skb = dev_alloc_skb(len+1);
898 if (skb == NULL) {
899 printk(KERN_INFO __FUNCTION__
900 "(), memory squeeze, dropping frame.\n");
901 /* Restore set register */
902 outb(set, iobase+SSR);
903
904 return FALSE;
905 }
906
907 /* Align to 20 bytes */
908 skb_reserve(skb, 1);
909
910 /* Copy frame without CRC */
911 if (self->io.speed < 4000000) {
912 skb_put(skb, len-2);
913 memcpy(skb->data, self->rx_buff.data, len-2);
914 } else {
915 skb_put(skb, len-4);
916 memcpy(skb->data, self->rx_buff.data, len-4);
917 }
918
919 /* Move to next frame */
920 self->rx_buff.data += len;
921 self->stats.rx_packets++;
922
923 skb->dev = self->netdev;
924 skb->mac.raw = skb->data;
925 skb->protocol = htons(ETH_P_IRDA);
926 netif_rx(skb);
927 }
928 }
929 /* Restore set register */
930 outb(set, iobase+SSR);
931
932 return TRUE;
933 }
934
935 /*
936 * Function pc87108_pio_receive (self)
937 *
938 * Receive all data in receiver FIFO
939 *
940 */
941 static void w83977af_pio_receive(struct w83977af_ir *self)
942 {
943 __u8 byte = 0x00;
944 int iobase;
945
946 IRDA_DEBUG(4, __FUNCTION__ "()\n");
947
948 ASSERT(self != NULL, return;);
949
950 iobase = self->io.fir_base;
951
952 /* Receive all characters in Rx FIFO */
953 do {
954 byte = inb(iobase+RBR);
955 async_unwrap_char(self->netdev, &self->stats, &self->rx_buff,
956 byte);
957 } while (inb(iobase+USR) & USR_RDR); /* Data available */
958 }
959
960 /*
961 * Function w83977af_sir_interrupt (self, eir)
962 *
963 * Handle SIR interrupt
964 *
965 */
966 static __u8 w83977af_sir_interrupt(struct w83977af_ir *self, int isr)
967 {
968 int actual;
969 __u8 new_icr = 0;
970 __u8 set;
971 int iobase;
972
973 IRDA_DEBUG(4, __FUNCTION__ "(), isr=%#x\n", isr);
974
975 iobase = self->io.fir_base;
976 /* Transmit FIFO low on data */
977 if (isr & ISR_TXTH_I) {
978 /* Write data left in transmit buffer */
979 actual = w83977af_pio_write(self->io.fir_base,
980 self->tx_buff.data,
981 self->tx_buff.len,
982 self->io.fifo_size);
983
984 self->tx_buff.data += actual;
985 self->tx_buff.len -= actual;
986
987 self->io.direction = IO_XMIT;
988
989 /* Check if finished */
990 if (self->tx_buff.len > 0) {
991 new_icr |= ICR_ETXTHI;
992 } else {
993 set = inb(iobase+SSR);
994 switch_bank(iobase, SET0);
995 outb(AUDR_SFEND, iobase+AUDR);
996 outb(set, iobase+SSR);
997
998 self->stats.tx_packets++;
999
1000 /* Feed me more packets */
1001 netif_wake_queue(self->netdev);
1002 new_icr |= ICR_ETBREI;
1003 }
1004 }
1005 /* Check if transmission has completed */
1006 if (isr & ISR_TXEMP_I) {
1007 /* Check if we need to change the speed? */
1008 if (self->new_speed) {
1009 IRDA_DEBUG(2, __FUNCTION__
1010 "(), Changing speed!\n");
1011 w83977af_change_speed(self, self->new_speed);
1012 self->new_speed = 0;
1013 }
1014
1015 /* Turn around and get ready to receive some data */
1016 self->io.direction = IO_RECV;
1017 new_icr |= ICR_ERBRI;
1018 }
1019
1020 /* Rx FIFO threshold or timeout */
1021 if (isr & ISR_RXTH_I) {
1022 w83977af_pio_receive(self);
1023
1024 /* Keep receiving */
1025 new_icr |= ICR_ERBRI;
1026 }
1027 return new_icr;
1028 }
1029
1030 /*
1031 * Function pc87108_fir_interrupt (self, eir)
1032 *
1033 * Handle MIR/FIR interrupt
1034 *
1035 */
1036 static __u8 w83977af_fir_interrupt(struct w83977af_ir *self, int isr)
1037 {
1038 __u8 new_icr = 0;
1039 __u8 set;
1040 int iobase;
1041
1042 iobase = self->io.fir_base;
1043 set = inb(iobase+SSR);
1044
1045 /* End of frame detected in FIFO */
1046 if (isr & (ISR_FEND_I|ISR_FSF_I)) {
1047 if (w83977af_dma_receive_complete(self)) {
1048
1049 /* Wait for next status FIFO interrupt */
1050 new_icr |= ICR_EFSFI;
1051 } else {
1052 /* DMA not finished yet */
1053
1054 /* Set timer value, resolution 1 ms */
1055 switch_bank(iobase, SET4);
1056 outb(0x01, iobase+TMRL); /* 1 ms */
1057 outb(0x00, iobase+TMRH);
1058
1059 /* Start timer */
1060 outb(IR_MSL_EN_TMR, iobase+IR_MSL);
1061
1062 new_icr |= ICR_ETMRI;
1063 }
1064 }
1065 /* Timer finished */
1066 if (isr & ISR_TMR_I) {
1067 /* Disable timer */
1068 switch_bank(iobase, SET4);
1069 outb(0, iobase+IR_MSL);
1070
1071 /* Clear timer event */
1072 /* switch_bank(iobase, SET0); */
1073 /* outb(ASCR_CTE, iobase+ASCR); */
1074
1075 /* Check if this is a TX timer interrupt */
1076 if (self->io.direction == IO_XMIT) {
1077 w83977af_dma_write(self, iobase);
1078
1079 new_icr |= ICR_EDMAI;
1080 } else {
1081 /* Check if DMA has now finished */
1082 w83977af_dma_receive_complete(self);
1083
1084 new_icr |= ICR_EFSFI;
1085 }
1086 }
1087 /* Finished with DMA */
1088 if (isr & ISR_DMA_I) {
1089 w83977af_dma_xmit_complete(self);
1090
1091 /* Check if there are more frames to be transmitted */
1092 /* if (irda_device_txqueue_empty(self)) { */
1093
1094 /* Prepare for receive
1095 *
1096 * ** Netwinder Tx DMA likes that we do this anyway **
1097 */
1098 w83977af_dma_receive(self);
1099 new_icr = ICR_EFSFI;
1100 /* } */
1101 }
1102
1103 /* Restore set */
1104 outb(set, iobase+SSR);
1105
1106 return new_icr;
1107 }
1108
1109 /*
1110 * Function w83977af_interrupt (irq, dev_id, regs)
1111 *
1112 * An interrupt from the chip has arrived. Time to do some work
1113 *
1114 */
1115 static void w83977af_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1116 {
1117 struct net_device *dev = (struct net_device *) dev_id;
1118 struct w83977af_ir *self;
1119 __u8 set, icr, isr;
1120 int iobase;
1121
1122 if (!dev) {
1123 printk(KERN_WARNING "%s: irq %d for unknown device.\n",
1124 driver_name, irq);
1125 return;
1126 }
1127 self = (struct w83977af_ir *) dev->priv;
1128
1129 iobase = self->io.fir_base;
1130
1131 /* Save current bank */
1132 set = inb(iobase+SSR);
1133 switch_bank(iobase, SET0);
1134
1135 icr = inb(iobase+ICR);
1136 isr = inb(iobase+ISR) & icr; /* Mask out the interesting ones */
1137
1138 outb(0, iobase+ICR); /* Disable interrupts */
1139
1140 if (isr) {
1141 /* Dispatch interrupt handler for the current speed */
1142 if (self->io.speed > PIO_MAX_SPEED )
1143 icr = w83977af_fir_interrupt(self, isr);
1144 else
1145 icr = w83977af_sir_interrupt(self, isr);
1146 }
1147
1148 outb(icr, iobase+ICR); /* Restore (new) interrupts */
1149 outb(set, iobase+SSR); /* Restore bank register */
1150
1151 }
1152
1153 /*
1154 * Function w83977af_is_receiving (self)
1155 *
1156 * Return TRUE is we are currently receiving a frame
1157 *
1158 */
1159 static int w83977af_is_receiving(struct w83977af_ir *self)
1160 {
1161 int status = FALSE;
1162 int iobase;
1163 __u8 set;
1164
1165 ASSERT(self != NULL, return FALSE;);
1166
1167 if (self->io.speed > 115200) {
1168 iobase = self->io.fir_base;
1169
1170 /* Check if rx FIFO is not empty */
1171 set = inb(iobase+SSR);
1172 switch_bank(iobase, SET2);
1173 if ((inb(iobase+RXFDTH) & 0x3f) != 0) {
1174 /* We are receiving something */
1175 status = TRUE;
1176 }
1177 outb(set, iobase+SSR);
1178 } else
1179 status = (self->rx_buff.state != OUTSIDE_FRAME);
1180
1181 return status;
1182 }
1183
1184 /*
1185 * Function w83977af_net_init (dev)
1186 *
1187 *
1188 *
1189 */
1190 static int w83977af_net_init(struct net_device *dev)
1191 {
1192 IRDA_DEBUG(0, __FUNCTION__ "()\n");
1193
1194 /* Set up to be a normal IrDA network device driver */
1195 irda_device_setup(dev);
1196
1197 /* Insert overrides below this line! */
1198
1199 return 0;
1200 }
1201
1202
1203 /*
1204 * Function w83977af_net_open (dev)
1205 *
1206 * Start the device
1207 *
1208 */
1209 static int w83977af_net_open(struct net_device *dev)
1210 {
1211 struct w83977af_ir *self;
1212 int iobase;
1213 char hwname[32];
1214 __u8 set;
1215
1216 IRDA_DEBUG(0, __FUNCTION__ "()\n");
1217
1218 ASSERT(dev != NULL, return -1;);
1219 self = (struct w83977af_ir *) dev->priv;
1220
1221 ASSERT(self != NULL, return 0;);
1222
1223 iobase = self->io.fir_base;
1224
1225 if (request_irq(self->io.irq, w83977af_interrupt, 0, dev->name,
1226 (void *) dev)) {
1227 return -EAGAIN;
1228 }
1229 /*
1230 * Always allocate the DMA channel after the IRQ,
1231 * and clean up on failure.
1232 */
1233 if (request_dma(self->io.dma, dev->name)) {
1234 free_irq(self->io.irq, self);
1235 return -EAGAIN;
1236 }
1237
1238 /* Save current set */
1239 set = inb(iobase+SSR);
1240
1241 /* Enable some interrupts so we can receive frames again */
1242 switch_bank(iobase, SET0);
1243 if (self->io.speed > 115200) {
1244 outb(ICR_EFSFI, iobase+ICR);
1245 w83977af_dma_receive(self);
1246 } else
1247 outb(ICR_ERBRI, iobase+ICR);
1248
1249 /* Restore bank register */
1250 outb(set, iobase+SSR);
1251
1252 /* Ready to play! */
1253 netif_start_queue(dev);
1254
1255 /* Give self a hardware name */
1256 sprintf(hwname, "w83977af @ 0x%03x", self->io.fir_base);
1257
1258 /*
1259 * Open new IrLAP layer instance, now that everything should be
1260 * initialized properly
1261 */
1262 self->irlap = irlap_open(dev, &self->qos, hwname);
1263
1264 MOD_INC_USE_COUNT;
1265
1266 return 0;
1267 }
1268
1269 /*
1270 * Function w83977af_net_close (dev)
1271 *
1272 * Stop the device
1273 *
1274 */
1275 static int w83977af_net_close(struct net_device *dev)
1276 {
1277 struct w83977af_ir *self;
1278 int iobase;
1279 __u8 set;
1280
1281 IRDA_DEBUG(0, __FUNCTION__ "()\n");
1282
1283 ASSERT(dev != NULL, return -1;);
1284
1285 self = (struct w83977af_ir *) dev->priv;
1286
1287 ASSERT(self != NULL, return 0;);
1288
1289 iobase = self->io.fir_base;
1290
1291 /* Stop device */
1292 netif_stop_queue(dev);
1293
1294 /* Stop and remove instance of IrLAP */
1295 if (self->irlap)
1296 irlap_close(self->irlap);
1297 self->irlap = NULL;
1298
1299 disable_dma(self->io.dma);
1300
1301 /* Save current set */
1302 set = inb(iobase+SSR);
1303
1304 /* Disable interrupts */
1305 switch_bank(iobase, SET0);
1306 outb(0, iobase+ICR);
1307
1308 free_irq(self->io.irq, dev);
1309 free_dma(self->io.dma);
1310
1311 /* Restore bank register */
1312 outb(set, iobase+SSR);
1313
1314 MOD_DEC_USE_COUNT;
1315
1316 return 0;
1317 }
1318
1319 /*
1320 * Function w83977af_net_ioctl (dev, rq, cmd)
1321 *
1322 * Process IOCTL commands for this device
1323 *
1324 */
1325 static int w83977af_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1326 {
1327 struct if_irda_req *irq = (struct if_irda_req *) rq;
1328 struct w83977af_ir *self;
1329 unsigned long flags;
1330 int ret = 0;
1331
1332 ASSERT(dev != NULL, return -1;);
1333
1334 self = dev->priv;
1335
1336 ASSERT(self != NULL, return -1;);
1337
1338 IRDA_DEBUG(2, __FUNCTION__ "(), %s, (cmd=0x%X)\n", dev->name, cmd);
1339
1340 /* Disable interrupts & save flags */
1341 save_flags(flags);
1342 cli();
1343
1344 switch (cmd) {
1345 case SIOCSBANDWIDTH: /* Set bandwidth */
1346 if (!capable(CAP_NET_ADMIN)) {
1347 ret = -EPERM;
1348 goto out;
1349 }
1350 w83977af_change_speed(self, irq->ifr_baudrate);
1351 break;
1352 case SIOCSMEDIABUSY: /* Set media busy */
1353 if (!capable(CAP_NET_ADMIN)) {
1354 ret = -EPERM;
1355 goto out;
1356 }
1357 irda_device_set_media_busy(self->netdev, TRUE);
1358 break;
1359 case SIOCGRECEIVING: /* Check if we are receiving right now */
1360 irq->ifr_receiving = w83977af_is_receiving(self);
1361 break;
1362 default:
1363 ret = -EOPNOTSUPP;
1364 }
1365 out:
1366 restore_flags(flags);
1367 return ret;
1368 }
1369
1370 static struct net_device_stats *w83977af_net_get_stats(struct net_device *dev)
1371 {
1372 struct w83977af_ir *self = (struct w83977af_ir *) dev->priv;
1373
1374 return &self->stats;
1375 }
1376
1377 #ifdef MODULE
1378
1379 MODULE_AUTHOR("Dag Brattli <dagb@cs.uit.no>");
1380 MODULE_DESCRIPTION("Winbond W83977AF IrDA Device Driver");
1381
1382 MODULE_PARM(qos_mtt_bits, "i");
1383 MODULE_PARM_DESC(qos_mtt_bits, "Mimimum Turn Time");
1384 MODULE_PARM(io, "1-4i");
1385 MODULE_PARM_DESC(io, "Base I/O addresses");
1386 MODULE_PARM(irq, "1-4i");
1387 MODULE_PARM_DESC(irq, "IRQ lines");
1388
1389 /*
1390 * Function init_module (void)
1391 *
1392 *
1393 *
1394 */
1395 int init_module(void)
1396 {
1397 return w83977af_init();
1398 }
1399
1400 /*
1401 * Function cleanup_module (void)
1402 *
1403 *
1404 *
1405 */
1406 void cleanup_module(void)
1407 {
1408 w83977af_cleanup();
1409 }
1410 #endif /* MODULE */
1411