File: /usr/src/linux/drivers/net/pcnet32.c

1     /* pcnet32.c: An AMD PCnet32 ethernet driver for linux. */
2     /*
3      *	Copyright 1996-1999 Thomas Bogendoerfer
4      * 
5      *	Derived from the lance driver written 1993,1994,1995 by Donald Becker.
6      * 
7      *	Copyright 1993 United States Government as represented by the
8      *	Director, National Security Agency.
9      * 
10      *	This software may be used and distributed according to the terms
11      *	of the GNU General Public License, incorporated herein by reference.
12      *
13      *	This driver is for PCnet32 and PCnetPCI based ethercards
14      */
15     /**************************************************************************
16      *  23 Oct, 2000.
17      *  Fixed a few bugs, related to running the controller in 32bit mode.
18      *
19      *  Carsten Langgaard, carstenl@mips.com
20      *  Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
21      *
22      *************************************************************************/
23     
24     static const char *version = "pcnet32.c:v1.25kf 26.9.1999 tsbogend@alpha.franken.de\n";
25     
26     #include <linux/module.h>
27     
28     #include <linux/kernel.h>
29     #include <linux/sched.h>
30     #include <linux/string.h>
31     #include <linux/ptrace.h>
32     #include <linux/errno.h>
33     #include <linux/ioport.h>
34     #include <linux/slab.h>
35     #include <linux/interrupt.h>
36     #include <linux/pci.h>
37     #include <linux/delay.h>
38     #include <linux/init.h>
39     #include <asm/bitops.h>
40     #include <asm/io.h>
41     #include <asm/dma.h>
42     
43     #include <linux/netdevice.h>
44     #include <linux/etherdevice.h>
45     #include <linux/skbuff.h>
46     #include <linux/spinlock.h>
47     
48     static unsigned int pcnet32_portlist[] __initdata = {0x300, 0x320, 0x340, 0x360, 0};
49     
50     /*
51      * PCI device identifiers for "new style" Linux PCI Device Drivers
52      */
53     static struct pci_device_id pcnet32_pci_tbl[] __devinitdata = {
54         { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE_HOME, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
55         { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
56         { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE, 0x1014, 0x2000, 0, 0, 0 },
57         { 0, }
58     };
59     
60     static int pcnet32_debug = 1;
61     static int tx_start = 1; /* Mapping -- 0:20, 1:64, 2:128, 3:~220 (depends on chip vers) */
62     
63     static struct net_device *pcnet32_dev;
64     
65     static const int max_interrupt_work = 80;
66     static const int rx_copybreak = 200;
67     
68     #define PORT_AUI      0x00
69     #define PORT_10BT     0x01
70     #define PORT_GPSI     0x02
71     #define PORT_MII      0x03
72     
73     #define PORT_PORTSEL  0x03
74     #define PORT_ASEL     0x04
75     #define PORT_100      0x40
76     #define PORT_FD	      0x80
77     
78     #define PCNET32_DMA_MASK 0xffffffff
79     
80     /*
81      * table to translate option values from tulip
82      * to internal options
83      */
84     static unsigned char options_mapping[] = {
85         PORT_ASEL,			   /*  0 Auto-select	  */
86         PORT_AUI,			   /*  1 BNC/AUI	  */
87         PORT_AUI,			   /*  2 AUI/BNC	  */ 
88         PORT_ASEL,			   /*  3 not supported	  */
89         PORT_10BT | PORT_FD,	   /*  4 10baseT-FD	  */
90         PORT_ASEL,			   /*  5 not supported	  */
91         PORT_ASEL,			   /*  6 not supported	  */
92         PORT_ASEL,			   /*  7 not supported	  */
93         PORT_ASEL,			   /*  8 not supported	  */
94         PORT_MII,			   /*  9 MII 10baseT	  */
95         PORT_MII | PORT_FD,		   /* 10 MII 10baseT-FD	  */
96         PORT_MII,			   /* 11 MII (autosel)	  */
97         PORT_10BT,			   /* 12 10BaseT	  */
98         PORT_MII | PORT_100,	   /* 13 MII 100BaseTx	  */
99         PORT_MII | PORT_100 | PORT_FD, /* 14 MII 100BaseTx-FD */
100         PORT_ASEL			   /* 15 not supported	  */
101     };
102     
103     #define MAX_UNITS 8
104     static int options[MAX_UNITS];
105     static int full_duplex[MAX_UNITS];
106     
107     /*
108      *				Theory of Operation
109      * 
110      * This driver uses the same software structure as the normal lance
111      * driver. So look for a verbose description in lance.c. The differences
112      * to the normal lance driver is the use of the 32bit mode of PCnet32
113      * and PCnetPCI chips. Because these chips are 32bit chips, there is no
114      * 16MB limitation and we don't need bounce buffers.
115      */
116      
117     /*
118      * History:
119      * v0.01:  Initial version
120      *	   only tested on Alpha Noname Board
121      * v0.02:  changed IRQ handling for new interrupt scheme (dev_id)
122      *	   tested on a ASUS SP3G
123      * v0.10:  fixed an odd problem with the 79C974 in a Compaq Deskpro XL
124      *	   looks like the 974 doesn't like stopping and restarting in a
125      *	   short period of time; now we do a reinit of the lance; the
126      *	   bug was triggered by doing ifconfig eth0 <ip> broadcast <addr>
127      *	   and hangs the machine (thanks to Klaus Liedl for debugging)
128      * v0.12:  by suggestion from Donald Becker: Renamed driver to pcnet32,
129      *	   made it standalone (no need for lance.c)
130      * v0.13:  added additional PCI detecting for special PCI devices (Compaq)
131      * v0.14:  stripped down additional PCI probe (thanks to David C Niemi
132      *	   and sveneric@xs4all.nl for testing this on their Compaq boxes)
133      * v0.15:  added 79C965 (VLB) probe
134      *	   added interrupt sharing for PCI chips
135      * v0.16:  fixed set_multicast_list on Alpha machines
136      * v0.17:  removed hack from dev.c; now pcnet32 uses ethif_probe in Space.c
137      * v0.19:  changed setting of autoselect bit
138      * v0.20:  removed additional Compaq PCI probe; there is now a working one
139      *	   in arch/i386/bios32.c
140      * v0.21:  added endian conversion for ppc, from work by cort@cs.nmt.edu
141      * v0.22:  added printing of status to ring dump
142      * v0.23:  changed enet_statistics to net_devive_stats
143      * v0.90:  added multicast filter
144      *	   added module support
145      *	   changed irq probe to new style
146      *	   added PCnetFast chip id
147      *	   added fix for receive stalls with Intel saturn chipsets
148      *	   added in-place rx skbs like in the tulip driver
149      *	   minor cleanups
150      * v0.91:  added PCnetFast+ chip id
151      *	   back port to 2.0.x
152      * v1.00:  added some stuff from Donald Becker's 2.0.34 version
153      *	   added support for byte counters in net_dev_stats
154      * v1.01:  do ring dumps, only when debugging the driver
155      *	   increased the transmit timeout
156      * v1.02:  fixed memory leak in pcnet32_init_ring()
157      * v1.10:  workaround for stopped transmitter
158      *	   added port selection for modules
159      *	   detect special T1/E1 WAN card and setup port selection
160      * v1.11:  fixed wrong checking of Tx errors
161      * v1.20:  added check of return value kmalloc (cpeterso@cs.washington.edu)
162      *	   added save original kmalloc addr for freeing (mcr@solidum.com)
163      *	   added support for PCnetHome chip (joe@MIT.EDU)
164      *	   rewritten PCI card detection
165      *	   added dwio mode to get driver working on some PPC machines
166      * v1.21:  added mii selection and mii ioctl
167      * v1.22:  changed pci scanning code to make PPC people happy
168      *	   fixed switching to 32bit mode in pcnet32_open() (thanks
169      *	   to Michael Richard <mcr@solidum.com> for noticing this one)
170      *	   added sub vendor/device id matching (thanks again to 
171      *	   Michael Richard <mcr@solidum.com>)
172      *	   added chip id for 79c973/975 (thanks to Zach Brown <zab@zabbo.net>)
173      * v1.23   fixed small bug, when manual selecting MII speed/duplex
174      * v1.24   Applied Thomas' patch to use TxStartPoint and thus decrease TxFIFO
175      *	   underflows.	Added tx_start_pt module parameter. Increased
176      *	   TX_RING_SIZE from 16 to 32.	Added #ifdef'd code to use DXSUFLO
177      *	   for FAST[+] chipsets. <kaf@fc.hp.com>
178      * v1.24ac Added SMP spinlocking - Alan Cox <alan@redhat.com>
179      * v1.25kf Added No Interrupt on successful Tx for some Tx's <kaf@fc.hp.com>
180      * v1.26   Converted to pci_alloc_consistent, Jamey Hicks / George France
181      *                                           <jamey@crl.dec.com>
182      * v1.26p Fix oops on rmmod+insmod; plug i/o resource leak - Paul Gortmaker
183      */
184     
185     
186     /*
187      * Set the number of Tx and Rx buffers, using Log_2(# buffers).
188      * Reasonable default values are 4 Tx buffers, and 16 Rx buffers.
189      * That translates to 2 (4 == 2^^2) and 4 (16 == 2^^4).
190      */
191     #ifndef PCNET32_LOG_TX_BUFFERS
192     #define PCNET32_LOG_TX_BUFFERS 4
193     #define PCNET32_LOG_RX_BUFFERS 5
194     #endif
195     
196     #define TX_RING_SIZE			(1 << (PCNET32_LOG_TX_BUFFERS))
197     #define TX_RING_MOD_MASK		(TX_RING_SIZE - 1)
198     #define TX_RING_LEN_BITS		((PCNET32_LOG_TX_BUFFERS) << 12)
199     
200     #define RX_RING_SIZE			(1 << (PCNET32_LOG_RX_BUFFERS))
201     #define RX_RING_MOD_MASK		(RX_RING_SIZE - 1)
202     #define RX_RING_LEN_BITS		((PCNET32_LOG_RX_BUFFERS) << 4)
203     
204     #define PKT_BUF_SZ		1544
205     
206     /* Offsets from base I/O address. */
207     #define PCNET32_WIO_RDP		0x10
208     #define PCNET32_WIO_RAP		0x12
209     #define PCNET32_WIO_RESET	0x14
210     #define PCNET32_WIO_BDP		0x16
211     
212     #define PCNET32_DWIO_RDP	0x10
213     #define PCNET32_DWIO_RAP	0x14
214     #define PCNET32_DWIO_RESET	0x18
215     #define PCNET32_DWIO_BDP	0x1C
216     
217     #define PCNET32_TOTAL_SIZE 0x20
218     
219     #define CRC_POLYNOMIAL_LE 0xedb88320UL	/* Ethernet CRC, little endian */
220     
221     /* The PCNET32 Rx and Tx ring descriptors. */
222     struct pcnet32_rx_head {
223         u32 base;
224         s16 buf_length;
225         s16 status;	   
226         u32 msg_length;
227         u32 reserved;
228     };
229     	
230     struct pcnet32_tx_head {
231         u32 base;
232         s16 length;
233         s16 status;
234         u32 misc;
235         u32 reserved;
236     };
237     
238     /* The PCNET32 32-Bit initialization block, described in databook. */
239     struct pcnet32_init_block {
240         u16 mode;
241         u16 tlen_rlen;
242         u8	phys_addr[6];
243         u16 reserved;
244         u32 filter[2];
245         /* Receive and transmit ring base, along with extra bits. */    
246         u32 rx_ring;
247         u32 tx_ring;
248     };
249     
250     /* PCnet32 access functions */
251     struct pcnet32_access {
252         u16 (*read_csr)(unsigned long, int);
253         void (*write_csr)(unsigned long, int, u16);
254         u16 (*read_bcr)(unsigned long, int);
255         void (*write_bcr)(unsigned long, int, u16);
256         u16 (*read_rap)(unsigned long);
257         void (*write_rap)(unsigned long, u16);
258         void (*reset)(unsigned long);
259     };
260     
261     /*
262      * The first three fields of pcnet32_private are read by the ethernet device 
263      * so we allocate the structure should be allocated by pci_alloc_consistent().
264      */
265     struct pcnet32_private {
266         /* The Tx and Rx ring entries must be aligned on 16-byte boundaries in 32bit mode. */
267         struct pcnet32_rx_head   rx_ring[RX_RING_SIZE];
268         struct pcnet32_tx_head   tx_ring[TX_RING_SIZE];
269         struct pcnet32_init_block	init_block;
270         dma_addr_t dma_addr;		/* DMA address of beginning of this object, returned by pci_alloc_consistent */
271         struct pci_dev *pci_dev;		/* Pointer to the associated pci device structure */
272         const char *name;
273         /* The saved address of a sent-in-place packet/buffer, for skfree(). */
274         struct sk_buff *tx_skbuff[TX_RING_SIZE];
275         struct sk_buff *rx_skbuff[RX_RING_SIZE];
276         dma_addr_t tx_dma_addr[TX_RING_SIZE];
277         dma_addr_t rx_dma_addr[RX_RING_SIZE];
278         struct pcnet32_access a;
279         spinlock_t lock;					/* Guard lock */
280         unsigned int cur_rx, cur_tx;		/* The next free ring entry */
281         unsigned int dirty_rx, dirty_tx;	/* The ring entries to be free()ed. */
282         struct net_device_stats stats;
283         char tx_full;
284         int	 options;
285         int	 shared_irq:1,			/* shared irq possible */
286     	ltint:1,
287     #ifdef DO_DXSUFLO
288     	      dxsuflo:1,						    /* disable transmit stop on uflo */
289     #endif
290     	full_duplex:1,				/* full duplex possible */
291     	mii:1;					/* mii port available */
292         struct net_device *next;
293     };
294     
295     static int  pcnet32_probe_vlbus(int cards_found);
296     static int  pcnet32_probe_pci(struct pci_dev *, const struct pci_device_id *);
297     static int  pcnet32_probe1(unsigned long, unsigned char, int, int, struct pci_dev *);
298     static int  pcnet32_open(struct net_device *);
299     static int  pcnet32_init_ring(struct net_device *);
300     static int  pcnet32_start_xmit(struct sk_buff *, struct net_device *);
301     static int  pcnet32_rx(struct net_device *);
302     static void pcnet32_tx_timeout (struct net_device *dev);
303     static void pcnet32_interrupt(int, void *, struct pt_regs *);
304     static int  pcnet32_close(struct net_device *);
305     static struct net_device_stats *pcnet32_get_stats(struct net_device *);
306     static void pcnet32_set_multicast_list(struct net_device *);
307     #ifdef HAVE_PRIVATE_IOCTL
308     static int  pcnet32_mii_ioctl(struct net_device *, struct ifreq *, int);
309     #endif
310     
311     enum pci_flags_bit {
312         PCI_USES_IO=1, PCI_USES_MEM=2, PCI_USES_MASTER=4,
313         PCI_ADDR0=0x10<<0, PCI_ADDR1=0x10<<1, PCI_ADDR2=0x10<<2, PCI_ADDR3=0x10<<3,
314     };
315     
316     struct pcnet32_pci_id_info {
317         const char *name;
318         u16 vendor_id, device_id, svid, sdid, flags;
319         int io_size;
320         int (*probe1) (unsigned long, unsigned char, int, int, struct pci_dev *);
321     };
322     
323     
324     MODULE_DEVICE_TABLE (pci, pcnet32_pci_tbl);
325     
326     static u16 pcnet32_wio_read_csr (unsigned long addr, int index)
327     {
328         outw (index, addr+PCNET32_WIO_RAP);
329         return inw (addr+PCNET32_WIO_RDP);
330     }
331     
332     static void pcnet32_wio_write_csr (unsigned long addr, int index, u16 val)
333     {
334         outw (index, addr+PCNET32_WIO_RAP);
335         outw (val, addr+PCNET32_WIO_RDP);
336     }
337     
338     static u16 pcnet32_wio_read_bcr (unsigned long addr, int index)
339     {
340         outw (index, addr+PCNET32_WIO_RAP);
341         return inw (addr+PCNET32_WIO_BDP);
342     }
343     
344     static void pcnet32_wio_write_bcr (unsigned long addr, int index, u16 val)
345     {
346         outw (index, addr+PCNET32_WIO_RAP);
347         outw (val, addr+PCNET32_WIO_BDP);
348     }
349     
350     static u16 pcnet32_wio_read_rap (unsigned long addr)
351     {
352         return inw (addr+PCNET32_WIO_RAP);
353     }
354     
355     static void pcnet32_wio_write_rap (unsigned long addr, u16 val)
356     {
357         outw (val, addr+PCNET32_WIO_RAP);
358     }
359     
360     static void pcnet32_wio_reset (unsigned long addr)
361     {
362         inw (addr+PCNET32_WIO_RESET);
363     }
364     
365     static int pcnet32_wio_check (unsigned long addr)
366     {
367         outw (88, addr+PCNET32_WIO_RAP);
368         return (inw (addr+PCNET32_WIO_RAP) == 88);
369     }
370     
371     static struct pcnet32_access pcnet32_wio = {
372         pcnet32_wio_read_csr,
373         pcnet32_wio_write_csr,
374         pcnet32_wio_read_bcr,
375         pcnet32_wio_write_bcr,
376         pcnet32_wio_read_rap,
377         pcnet32_wio_write_rap,
378         pcnet32_wio_reset
379     };
380     
381     static u16 pcnet32_dwio_read_csr (unsigned long addr, int index)
382     {
383         outl (index, addr+PCNET32_DWIO_RAP);
384         return (inl (addr+PCNET32_DWIO_RDP) & 0xffff);
385     }
386     
387     static void pcnet32_dwio_write_csr (unsigned long addr, int index, u16 val)
388     {
389         outl (index, addr+PCNET32_DWIO_RAP);
390         outl (val, addr+PCNET32_DWIO_RDP);
391     }
392     
393     static u16 pcnet32_dwio_read_bcr (unsigned long addr, int index)
394     {
395         outl (index, addr+PCNET32_DWIO_RAP);
396         return (inl (addr+PCNET32_DWIO_BDP) & 0xffff);
397     }
398     
399     static void pcnet32_dwio_write_bcr (unsigned long addr, int index, u16 val)
400     {
401         outl (index, addr+PCNET32_DWIO_RAP);
402         outl (val, addr+PCNET32_DWIO_BDP);
403     }
404     
405     static u16 pcnet32_dwio_read_rap (unsigned long addr)
406     {
407         return (inl (addr+PCNET32_DWIO_RAP) & 0xffff);
408     }
409     
410     static void pcnet32_dwio_write_rap (unsigned long addr, u16 val)
411     {
412         outl (val, addr+PCNET32_DWIO_RAP);
413     }
414     
415     static void pcnet32_dwio_reset (unsigned long addr)
416     {
417         inl (addr+PCNET32_DWIO_RESET);
418     }
419     
420     static int pcnet32_dwio_check (unsigned long addr)
421     {
422         outl (88, addr+PCNET32_DWIO_RAP);
423         return ((inl (addr+PCNET32_DWIO_RAP) & 0xffff) == 88);
424     }
425     
426     static struct pcnet32_access pcnet32_dwio = {
427         pcnet32_dwio_read_csr,
428         pcnet32_dwio_write_csr,
429         pcnet32_dwio_read_bcr,
430         pcnet32_dwio_write_bcr,
431         pcnet32_dwio_read_rap,
432         pcnet32_dwio_write_rap,
433         pcnet32_dwio_reset
434     
435     };
436     
437     
438     
439     /* only probes for non-PCI devices, the rest are handled by pci_register_driver via pcnet32_probe_pci*/
440     static int __init pcnet32_probe_vlbus(int cards_found)
441     {
442         unsigned long ioaddr = 0; // FIXME dev ? dev->base_addr: 0;
443         unsigned int  irq_line = 0; // FIXME dev ? dev->irq : 0;
444         int *port;
445         
446         printk(KERN_INFO "pcnet32_probe_vlbus: cards_found=%d\n", cards_found);
447     #ifndef __powerpc__
448         if (ioaddr > 0x1ff) {
449     	if (check_region(ioaddr, PCNET32_TOTAL_SIZE) == 0)
450     	    return pcnet32_probe1(ioaddr, irq_line, 0, 0, NULL);
451     	else
452     	    return -ENODEV;
453         } else
454     #endif
455     	if (ioaddr != 0)
456     	    return -ENXIO;
457         
458         /* now look for PCnet32 VLB cards */
459         for (port = pcnet32_portlist; *port; port++) {
460     	unsigned long ioaddr = *port;
461     	
462     	if ( check_region(ioaddr, PCNET32_TOTAL_SIZE) == 0) {
463     	    /* check if there is really a pcnet chip on that ioaddr */
464     	    if ((inb(ioaddr + 14) == 0x57) &&
465     		(inb(ioaddr + 15) == 0x57) &&
466     		(pcnet32_probe1(ioaddr, 0, 0, 0, NULL) == 0))
467     		cards_found++;
468     	}
469         }
470         return cards_found ? 0: -ENODEV;
471     }
472     
473     
474     
475     static int __devinit
476     pcnet32_probe_pci(struct pci_dev *pdev, const struct pci_device_id *ent)
477     {
478         static int card_idx;
479         long ioaddr;
480         int err = 0;
481     
482         printk(KERN_INFO "pcnet32_probe_pci: found device %#08x.%#08x\n", ent->vendor, ent->device);
483     
484         if ((err = pci_enable_device(pdev)) < 0) {
485     	printk(KERN_ERR "pcnet32.c: failed to enable device -- err=%d\n", err);
486     	return err;
487         }
488         pci_set_master(pdev);
489     
490         ioaddr = pci_resource_start (pdev, 0);
491         printk(KERN_INFO "    ioaddr=%#08lx  resource_flags=%#08lx\n", ioaddr, pci_resource_flags (pdev, 0));
492         if (!ioaddr) {
493             printk (KERN_ERR "no PCI IO resources, aborting\n");
494             return -ENODEV;
495         }
496     	
497         if (!pci_dma_supported(pdev, PCNET32_DMA_MASK)) {
498     	printk(KERN_ERR "pcnet32.c: architecture does not support 32bit PCI busmaster DMA\n");
499     	return -ENODEV;
500         }
501     
502         return pcnet32_probe1(ioaddr, pdev->irq, 1, card_idx, pdev);
503     }
504     
505     
506     /* pcnet32_probe1 
507      *  Called from both pcnet32_probe_vlbus and pcnet_probe_pci.  
508      *  pdev will be NULL when called from pcnet32_probe_vlbus.
509      */
510     static int __devinit
511     pcnet32_probe1(unsigned long ioaddr, unsigned char irq_line, int shared, int card_idx, struct pci_dev *pdev)
512     {
513         struct pcnet32_private *lp;
514         struct resource *res;
515         dma_addr_t lp_dma_addr;
516         int i,media,fdx = 0, mii = 0, fset = 0;
517     #ifdef DO_DXSUFLO
518         int dxsuflo = 0;
519     #endif
520         int ltint = 0;
521         int chip_version;
522         char *chipname;
523         struct net_device *dev;
524         struct pcnet32_access *a = NULL;
525     
526         /* reset the chip */
527         pcnet32_dwio_reset(ioaddr);
528         pcnet32_wio_reset(ioaddr);
529     
530         /* NOTE: 16-bit check is first, otherwise some older PCnet chips fail */
531         if (pcnet32_wio_read_csr (ioaddr, 0) == 4 && pcnet32_wio_check (ioaddr)) {
532     	a = &pcnet32_wio;
533         } else {
534     	if (pcnet32_dwio_read_csr (ioaddr, 0) == 4 && pcnet32_dwio_check(ioaddr)) {
535     	    a = &pcnet32_dwio;
536     	} else
537     	    return -ENODEV;
538         }
539     
540         chip_version = a->read_csr (ioaddr, 88) | (a->read_csr (ioaddr,89) << 16);
541         if (pcnet32_debug > 2)
542     	printk(KERN_INFO "  PCnet chip version is %#x.\n", chip_version);
543         if ((chip_version & 0xfff) != 0x003)
544     	return -ENODEV;
545         chip_version = (chip_version >> 12) & 0xffff;
546         switch (chip_version) {
547         case 0x2420:
548     	chipname = "PCnet/PCI 79C970"; /* PCI */
549     	break;
550         case 0x2430:
551     	if (shared)
552     	    chipname = "PCnet/PCI 79C970"; /* 970 gives the wrong chip id back */
553     	else
554     	    chipname = "PCnet/32 79C965"; /* 486/VL bus */
555     	break;
556         case 0x2621:
557     	chipname = "PCnet/PCI II 79C970A"; /* PCI */
558     	fdx = 1;
559     	break;
560         case 0x2623:
561     	chipname = "PCnet/FAST 79C971"; /* PCI */
562     	fdx = 1; mii = 1; fset = 1;
563     	ltint = 1;
564     	break;
565         case 0x2624:
566     	chipname = "PCnet/FAST+ 79C972"; /* PCI */
567     	fdx = 1; mii = 1; fset = 1;
568     	break;
569         case 0x2625:
570     	chipname = "PCnet/FAST III 79C973"; /* PCI */
571     	fdx = 1; mii = 1;
572     	break;
573         case 0x2626:
574     	chipname = "PCnet/Home 79C978"; /* PCI */
575     	fdx = 1;
576     	/* 
577     	 * This is based on specs published at www.amd.com.  This section
578     	 * assumes that a card with a 79C978 wants to go into 1Mb HomePNA
579     	 * mode.  The 79C978 can also go into standard ethernet, and there
580     	 * probably should be some sort of module option to select the
581     	 * mode by which the card should operate
582     	 */
583     	/* switch to home wiring mode */
584     	media = a->read_bcr (ioaddr, 49);
585     #if 0
586     	if (pcnet32_debug > 2)
587     	    printk(KERN_DEBUG "pcnet32: pcnet32 media value %#x.\n",  media);
588     	media &= ~3;
589     	media |= 1;
590     #endif
591     	if (pcnet32_debug > 2)
592     	    printk(KERN_DEBUG "pcnet32: pcnet32 media reset to %#x.\n",  media);
593     	a->write_bcr (ioaddr, 49, media);
594     	break;
595         case 0x2627:
596     	chipname = "PCnet/FAST III 79C975"; /* PCI */
597     	fdx = 1; mii = 1;
598     	break;
599         default:
600     	printk(KERN_INFO "pcnet32: PCnet version %#x, no PCnet32 chip.\n",chip_version);
601     	return -ENODEV;
602         }
603     
604         /*
605          *	On selected chips turn on the BCR18:NOUFLO bit. This stops transmit
606          *	starting until the packet is loaded. Strike one for reliability, lose
607          *	one for latency - although on PCI this isnt a big loss. Older chips 
608          *	have FIFO's smaller than a packet, so you can't do this.
609          */
610     	 
611         if(fset)
612         {
613     	a->write_bcr(ioaddr, 18, (a->read_bcr(ioaddr, 18) | 0x0800));
614     	a->write_csr(ioaddr, 80, (a->read_csr(ioaddr, 80) & 0x0C00) | 0x0c00);
615     #ifdef DO_DXSUFLO
616     	dxsuflo = 1;
617     #endif
618     	ltint = 1;
619         }
620         
621         dev = init_etherdev(NULL, 0);
622         if(dev==NULL)
623     	return -ENOMEM;
624     
625         printk(KERN_INFO "%s: %s at %#3lx,", dev->name, chipname, ioaddr);
626     
627         /* In most chips, after a chip reset, the ethernet address is read from the
628          * station address PROM at the base address and programmed into the
629          * "Physical Address Registers" CSR12-14.
630          * As a precautionary measure, we read the PROM values and complain if
631          * they disagree with the CSRs.  Either way, we use the CSR values, and
632          * double check that they are valid.
633          */
634         for (i = 0; i < 3; i++) {
635     	unsigned int val;
636     	val = a->read_csr(ioaddr, i+12) & 0x0ffff;
637     	/* There may be endianness issues here. */
638     	dev->dev_addr[2*i] = val & 0x0ff;
639     	dev->dev_addr[2*i+1] = (val >> 8) & 0x0ff;
640         }
641         {
642     	u8 promaddr[6];
643     	for (i = 0; i < 6; i++) {
644     	    promaddr[i] = inb(ioaddr + i);
645     	}
646     	if( memcmp( promaddr, dev->dev_addr, 6) )
647     	{
648     	    printk(" warning PROM address does not match CSR address\n");
649     #if defined(__i386__)
650     	    printk(KERN_WARNING "%s: Probably a Compaq, using the PROM address of", dev->name);
651     	    memcpy(dev->dev_addr, promaddr, 6);
652     #endif
653     	}	    	    
654         }
655         /* if the ethernet address is not valid, force to 00:00:00:00:00:00 */
656         if( !is_valid_ether_addr(dev->dev_addr) )
657     	for (i = 0; i < 6; i++)
658     	    dev->dev_addr[i]=0;
659     
660         for (i = 0; i < 6; i++)
661     	printk(" %2.2x", dev->dev_addr[i] );
662     
663         if (((chip_version + 1) & 0xfffe) == 0x2624) { /* Version 0x2623 or 0x2624 */
664     	i = a->read_csr(ioaddr, 80) & 0x0C00;  /* Check tx_start_pt */
665     	printk("\n" KERN_INFO "    tx_start_pt(0x%04x):",i);
666     	switch(i>>10) {
667     	    case 0: printk("  20 bytes,"); break;
668     	    case 1: printk("  64 bytes,"); break;
669     	    case 2: printk(" 128 bytes,"); break;
670     	    case 3: printk("~220 bytes,"); break;
671     	}
672     	i = a->read_bcr(ioaddr, 18);  /* Check Burst/Bus control */
673     	printk(" BCR18(%x):",i&0xffff);
674     	if (i & (1<<5)) printk("BurstWrEn ");
675     	if (i & (1<<6)) printk("BurstRdEn ");
676     	if (i & (1<<7)) printk("DWordIO ");
677     	if (i & (1<<11)) printk("NoUFlow ");
678     	i = a->read_bcr(ioaddr, 25);
679     	printk("\n" KERN_INFO "    SRAMSIZE=0x%04x,",i<<8);
680     	i = a->read_bcr(ioaddr, 26);
681     	printk(" SRAM_BND=0x%04x,",i<<8);
682     	i = a->read_bcr(ioaddr, 27);
683     	if (i & (1<<14)) printk("LowLatRx");
684         }
685     
686         dev->base_addr = ioaddr;
687         res = request_region(ioaddr, PCNET32_TOTAL_SIZE, chipname);
688         if (res == NULL)
689     	return -EBUSY;
690         
691         /* pci_alloc_consistent returns page-aligned memory, so we do not have to check the alignment */
692         if ((lp = pci_alloc_consistent(pdev, sizeof(*lp), &lp_dma_addr)) == NULL) {
693     	release_resource(res);
694     	return -ENOMEM;
695         }
696     
697         memset(lp, 0, sizeof(*lp));
698         lp->dma_addr = lp_dma_addr;
699         lp->pci_dev = pdev;
700         printk("\n" KERN_INFO "pcnet32: pcnet32_private lp=%p lp_dma_addr=%#08x", lp, lp_dma_addr);
701     
702         spin_lock_init(&lp->lock);
703         
704         dev->priv = lp;
705         lp->name = chipname;
706         lp->shared_irq = shared;
707         lp->full_duplex = fdx;
708     #ifdef DO_DXSUFLO
709         lp->dxsuflo = dxsuflo;
710     #endif
711         lp->ltint = ltint;
712         lp->mii = mii;
713         if (options[card_idx] > sizeof (options_mapping))
714     	lp->options = PORT_ASEL;
715         else
716     	lp->options = options_mapping[options[card_idx]];
717         
718         if (fdx && !(lp->options & PORT_ASEL) && full_duplex[card_idx])
719     	lp->options |= PORT_FD;
720         
721         if (a == NULL) {
722           printk(KERN_ERR "pcnet32: No access methods\n");
723           pci_free_consistent(lp->pci_dev, sizeof(*lp), lp, lp->dma_addr);
724           release_resource(res);
725           return -ENODEV;
726         }
727         lp->a = *a;
728         
729         /* detect special T1/E1 WAN card by checking for MAC address */
730         if (dev->dev_addr[0] == 0x00 && dev->dev_addr[1] == 0xe0 && dev->dev_addr[2] == 0x75)
731     	lp->options = PORT_FD | PORT_GPSI;
732     
733         lp->init_block.mode = le16_to_cpu(0x0003);	/* Disable Rx and Tx. */
734         lp->init_block.tlen_rlen = le16_to_cpu(TX_RING_LEN_BITS | RX_RING_LEN_BITS); 
735         for (i = 0; i < 6; i++)
736     	lp->init_block.phys_addr[i] = dev->dev_addr[i];
737         lp->init_block.filter[0] = 0x00000000;
738         lp->init_block.filter[1] = 0x00000000;
739         lp->init_block.rx_ring = (u32)le32_to_cpu(lp->dma_addr + offsetof(struct pcnet32_private, rx_ring));
740         lp->init_block.tx_ring = (u32)le32_to_cpu(lp->dma_addr + offsetof(struct pcnet32_private, tx_ring));
741         
742         /* switch pcnet32 to 32bit mode */
743         a->write_bcr (ioaddr, 20, 2);
744     
745         a->write_csr (ioaddr, 1, (lp->dma_addr + offsetof(struct pcnet32_private, init_block)) & 0xffff);
746         a->write_csr (ioaddr, 2, (lp->dma_addr + offsetof(struct pcnet32_private, init_block)) >> 16);
747         
748         if (irq_line) {
749     	dev->irq = irq_line;
750         }
751         
752         if (dev->irq >= 2)
753     	printk(" assigned IRQ %d.\n", dev->irq);
754         else {
755     	unsigned long irq_mask = probe_irq_on();
756     	
757     	/*
758     	 * To auto-IRQ we enable the initialization-done and DMA error
759     	 * interrupts. For ISA boards we get a DMA error, but VLB and PCI
760     	 * boards will work.
761     	 */
762     	/* Trigger an initialization just for the interrupt. */
763     	a->write_csr (ioaddr, 0, 0x41);
764     	mdelay (1);
765     	
766     	dev->irq = probe_irq_off (irq_mask);
767     	if (dev->irq)
768     	    printk(", probed IRQ %d.\n", dev->irq);
769     	else {
770     	    printk(", failed to detect IRQ line.\n");
771     	    pci_free_consistent(lp->pci_dev, sizeof(*lp), lp, lp->dma_addr);
772     	    release_resource(res);
773     	    return -ENODEV;
774     	}
775         }
776     
777         if (pcnet32_debug > 0)
778     	printk(KERN_INFO "%s", version);
779         
780         /* The PCNET32-specific entries in the device structure. */
781         dev->open = &pcnet32_open;
782         dev->hard_start_xmit = &pcnet32_start_xmit;
783         dev->stop = &pcnet32_close;
784         dev->get_stats = &pcnet32_get_stats;
785         dev->set_multicast_list = &pcnet32_set_multicast_list;
786     #ifdef HAVE_PRIVATE_IOCTL
787         dev->do_ioctl = &pcnet32_mii_ioctl;
788     #endif
789         dev->tx_timeout = pcnet32_tx_timeout;
790         dev->watchdog_timeo = (HZ >> 1);
791     
792         lp->next = pcnet32_dev;
793         pcnet32_dev = dev;
794     
795         /* Fill in the generic fields of the device structure. */
796         ether_setup(dev);
797         return 0;
798     }
799     
800     
801     static int
802     pcnet32_open(struct net_device *dev)
803     {
804         struct pcnet32_private *lp = dev->priv;
805         unsigned long ioaddr = dev->base_addr;
806         u16 val;
807         int i;
808     
809         if (dev->irq == 0 ||
810     	request_irq(dev->irq, &pcnet32_interrupt,
811     		    lp->shared_irq ? SA_SHIRQ : 0, lp->name, (void *)dev)) {
812     	return -EAGAIN;
813         }
814     
815         /* Check for a valid station address */
816         if( !is_valid_ether_addr(dev->dev_addr) )
817     	return -EINVAL;
818     
819         /* Reset the PCNET32 */
820         lp->a.reset (ioaddr);
821     
822         /* switch pcnet32 to 32bit mode */
823         lp->a.write_bcr (ioaddr, 20, 2);
824     
825         if (pcnet32_debug > 1)
826     	printk(KERN_DEBUG "%s: pcnet32_open() irq %d tx/rx rings %#x/%#x init %#x.\n",
827     	       dev->name, dev->irq,
828     	       (u32) (lp->dma_addr + offsetof(struct pcnet32_private, tx_ring)),
829     	       (u32) (lp->dma_addr + offsetof(struct pcnet32_private, rx_ring)),
830     	       (u32) (lp->dma_addr + offsetof(struct pcnet32_private, init_block)));
831         
832         /* set/reset autoselect bit */
833         val = lp->a.read_bcr (ioaddr, 2) & ~2;
834         if (lp->options & PORT_ASEL)
835     	val |= 2;
836         lp->a.write_bcr (ioaddr, 2, val);
837         
838         /* handle full duplex setting */
839         if (lp->full_duplex) {
840     	val = lp->a.read_bcr (ioaddr, 9) & ~3;
841     	if (lp->options & PORT_FD) {
842     	    val |= 1;
843     	    if (lp->options == (PORT_FD | PORT_AUI))
844     		val |= 2;
845     	}
846     	lp->a.write_bcr (ioaddr, 9, val);
847         }
848         
849         /* set/reset GPSI bit in test register */
850         val = lp->a.read_csr (ioaddr, 124) & ~0x10;
851         if ((lp->options & PORT_PORTSEL) == PORT_GPSI)
852     	val |= 0x10;
853         lp->a.write_csr (ioaddr, 124, val);
854         
855         if (lp->mii && !(lp->options & PORT_ASEL)) {
856     	val = lp->a.read_bcr (ioaddr, 32) & ~0x38; /* disable Auto Negotiation, set 10Mpbs, HD */
857     	if (lp->options & PORT_FD)
858     	    val |= 0x10;
859     	if (lp->options & PORT_100)
860     	    val |= 0x08;
861     	lp->a.write_bcr (ioaddr, 32, val);
862         } else {
863     	if (lp->options & PORT_ASEL) {  /* enable auto negotiate, setup, disable fd */
864     		val = lp->a.read_bcr(ioaddr, 32) & ~0x98;
865     		val |= 0x20;
866     		lp->a.write_bcr(ioaddr, 32, val);
867     	}
868         }
869     
870     #ifdef DO_DXSUFLO 
871         if (lp->dxsuflo) { /* Disable transmit stop on underflow */
872     	val = lp->a.read_csr (ioaddr, 3);
873     	val |= 0x40;
874     	lp->a.write_csr (ioaddr, 3, val);
875         }
876     #endif
877         if (lp->ltint) { /* Enable TxDone-intr inhibitor */
878     	val = lp->a.read_csr (ioaddr, 5);
879     	val |= (1<<14);
880     	lp->a.write_csr (ioaddr, 5, val);
881         }
882        
883         lp->init_block.mode = le16_to_cpu((lp->options & PORT_PORTSEL) << 7);
884         lp->init_block.filter[0] = 0x00000000;
885         lp->init_block.filter[1] = 0x00000000;
886         if (pcnet32_init_ring(dev))
887     	return -ENOMEM;
888         
889         /* Re-initialize the PCNET32, and start it when done. */
890         lp->a.write_csr (ioaddr, 1, (lp->dma_addr + offsetof(struct pcnet32_private, init_block)) &0xffff);
891         lp->a.write_csr (ioaddr, 2, (lp->dma_addr + offsetof(struct pcnet32_private, init_block)) >> 16);
892     
893         lp->a.write_csr (ioaddr, 4, 0x0915);
894         lp->a.write_csr (ioaddr, 0, 0x0001);
895     
896         netif_start_queue(dev);
897     
898         i = 0;
899         while (i++ < 100)
900     	if (lp->a.read_csr (ioaddr, 0) & 0x0100)
901     	    break;
902         /* 
903          * We used to clear the InitDone bit, 0x0100, here but Mark Stockton
904          * reports that doing so triggers a bug in the '974.
905          */
906         lp->a.write_csr (ioaddr, 0, 0x0042);
907     
908         if (pcnet32_debug > 2)
909     	printk(KERN_DEBUG "%s: pcnet32 open after %d ticks, init block %#x csr0 %4.4x.\n",
910     	       dev->name, i, (u32) (lp->dma_addr + offsetof(struct pcnet32_private, init_block)),
911     	       lp->a.read_csr (ioaddr, 0));
912     
913     
914         MOD_INC_USE_COUNT;
915         
916         return 0;	/* Always succeed */
917     }
918     
919     /*
920      * The LANCE has been halted for one reason or another (busmaster memory
921      * arbitration error, Tx FIFO underflow, driver stopped it to reconfigure,
922      * etc.).  Modern LANCE variants always reload their ring-buffer
923      * configuration when restarted, so we must reinitialize our ring
924      * context before restarting.  As part of this reinitialization,
925      * find all packets still on the Tx ring and pretend that they had been
926      * sent (in effect, drop the packets on the floor) - the higher-level
927      * protocols will time out and retransmit.  It'd be better to shuffle
928      * these skbs to a temp list and then actually re-Tx them after
929      * restarting the chip, but I'm too lazy to do so right now.  dplatt@3do.com
930      */
931     
932     static void 
933     pcnet32_purge_tx_ring(struct net_device *dev)
934     {
935         struct pcnet32_private *lp = dev->priv;
936         int i;
937     
938         for (i = 0; i < TX_RING_SIZE; i++) {
939     	if (lp->tx_skbuff[i]) {
940                 pci_unmap_single(lp->pci_dev, lp->tx_dma_addr[i], lp->tx_skbuff[i]->len, PCI_DMA_TODEVICE);
941     	    dev_kfree_skb(lp->tx_skbuff[i]); 
942     	    lp->tx_skbuff[i] = NULL;
943                 lp->tx_dma_addr[i] = 0;
944     	}
945         }
946     }
947     
948     
949     /* Initialize the PCNET32 Rx and Tx rings. */
950     static int
951     pcnet32_init_ring(struct net_device *dev)
952     {
953         struct pcnet32_private *lp = dev->priv;
954         int i;
955     
956         lp->tx_full = 0;
957         lp->cur_rx = lp->cur_tx = 0;
958         lp->dirty_rx = lp->dirty_tx = 0;
959     
960         for (i = 0; i < RX_RING_SIZE; i++) {
961             struct sk_buff *rx_skbuff = lp->rx_skbuff[i];
962     	if (rx_skbuff == NULL) {
963     	    if (!(rx_skbuff = lp->rx_skbuff[i] = dev_alloc_skb (PKT_BUF_SZ))) {
964     		/* there is not much, we can do at this point */
965     		printk(KERN_ERR "%s: pcnet32_init_ring dev_alloc_skb failed.\n",dev->name);
966     		return -1;
967     	    }
968     	    skb_reserve (rx_skbuff, 2);
969     	}
970             lp->rx_dma_addr[i] = pci_map_single(lp->pci_dev, rx_skbuff->tail, rx_skbuff->len, PCI_DMA_FROMDEVICE);
971     	lp->rx_ring[i].base = (u32)le32_to_cpu(lp->rx_dma_addr[i]);
972     	lp->rx_ring[i].buf_length = le16_to_cpu(-PKT_BUF_SZ);
973     	lp->rx_ring[i].status = le16_to_cpu(0x8000);
974         }
975         /* The Tx buffer address is filled in as needed, but we do need to clear
976            the upper ownership bit. */
977         for (i = 0; i < TX_RING_SIZE; i++) {
978     	lp->tx_ring[i].base = 0;
979     	lp->tx_ring[i].status = 0;
980             lp->tx_dma_addr[i] = 0;
981         }
982     
983         lp->init_block.tlen_rlen = le16_to_cpu(TX_RING_LEN_BITS | RX_RING_LEN_BITS);
984         for (i = 0; i < 6; i++)
985     	lp->init_block.phys_addr[i] = dev->dev_addr[i];
986         lp->init_block.rx_ring = (u32)le32_to_cpu(lp->dma_addr + offsetof(struct pcnet32_private, rx_ring));
987         lp->init_block.tx_ring = (u32)le32_to_cpu(lp->dma_addr + offsetof(struct pcnet32_private, tx_ring));
988         return 0;
989     }
990     
991     static void
992     pcnet32_restart(struct net_device *dev, unsigned int csr0_bits)
993     {
994         struct pcnet32_private *lp = dev->priv;
995         unsigned long ioaddr = dev->base_addr;
996         int i;
997         
998         pcnet32_purge_tx_ring(dev);
999         if (pcnet32_init_ring(dev))
1000     	return;
1001         
1002         /* ReInit Ring */
1003         lp->a.write_csr (ioaddr, 0, 1);
1004         i = 0;
1005         while (i++ < 100)
1006     	if (lp->a.read_csr (ioaddr, 0) & 0x0100)
1007     	    break;
1008     
1009         lp->a.write_csr (ioaddr, 0, csr0_bits);
1010     }
1011     
1012     
1013     static void
1014     pcnet32_tx_timeout (struct net_device *dev)
1015     {
1016         struct pcnet32_private *lp = dev->priv;
1017         unsigned int ioaddr = dev->base_addr;
1018     
1019         /* Transmitter timeout, serious problems. */
1020     	printk(KERN_ERR "%s: transmit timed out, status %4.4x, resetting.\n",
1021     	       dev->name, lp->a.read_csr (ioaddr, 0));
1022     	lp->a.write_csr (ioaddr, 0, 0x0004);
1023     	lp->stats.tx_errors++;
1024     	if (pcnet32_debug > 2) {
1025     	    int i;
1026     	    printk(KERN_DEBUG " Ring data dump: dirty_tx %d cur_tx %d%s cur_rx %d.",
1027     	       lp->dirty_tx, lp->cur_tx, lp->tx_full ? " (full)" : "",
1028     	       lp->cur_rx);
1029     	    for (i = 0 ; i < RX_RING_SIZE; i++)
1030     	    printk("%s %08x %04x %08x %04x", i & 1 ? "" : "\n ",
1031     		   lp->rx_ring[i].base, -lp->rx_ring[i].buf_length,
1032     		   lp->rx_ring[i].msg_length, (unsigned)lp->rx_ring[i].status);
1033     	    for (i = 0 ; i < TX_RING_SIZE; i++)
1034     	    printk("%s %08x %04x %08x %04x", i & 1 ? "" : "\n ",
1035     		   lp->tx_ring[i].base, -lp->tx_ring[i].length,
1036     		   lp->tx_ring[i].misc, (unsigned)lp->tx_ring[i].status);
1037     	    printk("\n");
1038     	}
1039     	pcnet32_restart(dev, 0x0042);
1040     
1041     	dev->trans_start = jiffies;
1042     	netif_start_queue(dev);
1043     }
1044     
1045     
1046     static int
1047     pcnet32_start_xmit(struct sk_buff *skb, struct net_device *dev)
1048     {
1049         struct pcnet32_private *lp = dev->priv;
1050         unsigned int ioaddr = dev->base_addr;
1051         u16 status;
1052         int entry;
1053         unsigned long flags;
1054     
1055         if (pcnet32_debug > 3) {
1056     	printk(KERN_DEBUG "%s: pcnet32_start_xmit() called, csr0 %4.4x.\n",
1057     	       dev->name, lp->a.read_csr (ioaddr, 0));
1058         }
1059     
1060         spin_lock_irqsave(&lp->lock, flags);
1061     
1062         /* Default status -- will not enable Successful-TxDone
1063          * interrupt when that option is available to us.
1064          */
1065         status = 0x8300;
1066         if ((lp->ltint) &&
1067     	((lp->cur_tx - lp->dirty_tx == TX_RING_SIZE/2) ||
1068     	 (lp->cur_tx - lp->dirty_tx >= TX_RING_SIZE-2)))
1069         {
1070     	/* Enable Successful-TxDone interrupt if we have
1071     	 * 1/2 of, or nearly all of, our ring buffer Tx'd
1072     	 * but not yet cleaned up.  Thus, most of the time,
1073     	 * we will not enable Successful-TxDone interrupts.
1074     	 */
1075     	status = 0x9300;
1076         }
1077       
1078         /* Fill in a Tx ring entry */
1079       
1080         /* Mask to ring buffer boundary. */
1081         entry = lp->cur_tx & TX_RING_MOD_MASK;
1082       
1083         /* Caution: the write order is important here, set the base address
1084            with the "ownership" bits last. */
1085     
1086         lp->tx_ring[entry].length = le16_to_cpu(-skb->len);
1087     
1088         lp->tx_ring[entry].misc = 0x00000000;
1089     
1090         lp->tx_skbuff[entry] = skb;
1091         lp->tx_dma_addr[entry] = pci_map_single(lp->pci_dev, skb->data, skb->len, PCI_DMA_TODEVICE);
1092         lp->tx_ring[entry].base = (u32)le32_to_cpu(lp->tx_dma_addr[entry]);
1093         lp->tx_ring[entry].status = le16_to_cpu(status);
1094     
1095         lp->cur_tx++;
1096         lp->stats.tx_bytes += skb->len;
1097     
1098         /* Trigger an immediate send poll. */
1099         lp->a.write_csr (ioaddr, 0, 0x0048);
1100     
1101         dev->trans_start = jiffies;
1102     
1103         if (lp->tx_ring[(entry+1) & TX_RING_MOD_MASK].base == 0)
1104     	netif_start_queue(dev);
1105         else {
1106     	lp->tx_full = 1;
1107     	netif_stop_queue(dev);
1108         }
1109         spin_unlock_irqrestore(&lp->lock, flags);
1110         return 0;
1111     }
1112     
1113     /* The PCNET32 interrupt handler. */
1114     static void
1115     pcnet32_interrupt(int irq, void *dev_id, struct pt_regs * regs)
1116     {
1117         struct net_device *dev = dev_id;
1118         struct pcnet32_private *lp;
1119         unsigned long ioaddr;
1120         u16 csr0,rap;
1121         int boguscnt =  max_interrupt_work;
1122         int must_restart;
1123     
1124         if (dev == NULL) {
1125     	printk (KERN_DEBUG "pcnet32_interrupt(): irq %d for unknown device.\n", irq);
1126     	return;
1127         }
1128     
1129         ioaddr = dev->base_addr;
1130         lp = dev->priv;
1131         
1132         spin_lock(&lp->lock);
1133         
1134         rap = lp->a.read_rap(ioaddr);
1135         while ((csr0 = lp->a.read_csr (ioaddr, 0)) & 0x8600 && --boguscnt >= 0) {
1136     	/* Acknowledge all of the current interrupt sources ASAP. */
1137     	lp->a.write_csr (ioaddr, 0, csr0 & ~0x004f);
1138     
1139     	must_restart = 0;
1140     
1141     	if (pcnet32_debug > 5)
1142     	    printk(KERN_DEBUG "%s: interrupt  csr0=%#2.2x new csr=%#2.2x.\n",
1143     		   dev->name, csr0, lp->a.read_csr (ioaddr, 0));
1144     
1145     	if (csr0 & 0x0400)		/* Rx interrupt */
1146     	    pcnet32_rx(dev);
1147     
1148     	if (csr0 & 0x0200) {		/* Tx-done interrupt */
1149     	    unsigned int dirty_tx = lp->dirty_tx;
1150     
1151     	    while (dirty_tx < lp->cur_tx) {
1152     		int entry = dirty_tx & TX_RING_MOD_MASK;
1153     		int status = (short)le16_to_cpu(lp->tx_ring[entry].status);
1154     			
1155     		if (status < 0)
1156     		    break;		/* It still hasn't been Txed */
1157     
1158     		lp->tx_ring[entry].base = 0;
1159     
1160     		if (status & 0x4000) {
1161     		    /* There was an major error, log it. */
1162     		    int err_status = le32_to_cpu(lp->tx_ring[entry].misc);
1163     		    lp->stats.tx_errors++;
1164     		    if (err_status & 0x04000000) lp->stats.tx_aborted_errors++;
1165     		    if (err_status & 0x08000000) lp->stats.tx_carrier_errors++;
1166     		    if (err_status & 0x10000000) lp->stats.tx_window_errors++;
1167     #ifndef DO_DXSUFLO
1168     		    if (err_status & 0x40000000) {
1169     			lp->stats.tx_fifo_errors++;
1170     			/* Ackk!  On FIFO errors the Tx unit is turned off! */
1171     			/* Remove this verbosity later! */
1172     			printk(KERN_ERR "%s: Tx FIFO error! CSR0=%4.4x\n",
1173     			       dev->name, csr0);
1174     			must_restart = 1;
1175     		    }
1176     #else
1177     		    if (err_status & 0x40000000) {
1178     			lp->stats.tx_fifo_errors++;
1179     			if (! lp->dxsuflo) {  /* If controller doesn't recover ... */
1180     			    /* Ackk!  On FIFO errors the Tx unit is turned off! */
1181     			    /* Remove this verbosity later! */
1182     			    printk(KERN_ERR "%s: Tx FIFO error! CSR0=%4.4x\n",
1183     				   dev->name, csr0);
1184     			    must_restart = 1;
1185     			}
1186     		    }
1187     #endif
1188     		} else {
1189     		    if (status & 0x1800)
1190     			lp->stats.collisions++;
1191     		    lp->stats.tx_packets++;
1192     		}
1193     
1194     		/* We must free the original skb */
1195     		if (lp->tx_skbuff[entry]) {
1196                         pci_unmap_single(lp->pci_dev, lp->tx_dma_addr[entry], lp->tx_skbuff[entry]->len, PCI_DMA_TODEVICE);
1197     		    dev_kfree_skb_irq(lp->tx_skbuff[entry]);
1198     		    lp->tx_skbuff[entry] = 0;
1199                         lp->tx_dma_addr[entry] = 0;
1200     		}
1201     		dirty_tx++;
1202     	    }
1203     
1204     #ifndef final_version
1205     	    if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) {
1206     		printk(KERN_ERR "out-of-sync dirty pointer, %d vs. %d, full=%d.\n",
1207     		       dirty_tx, lp->cur_tx, lp->tx_full);
1208     		dirty_tx += TX_RING_SIZE;
1209     	    }
1210     #endif
1211     	    if (lp->tx_full &&
1212     		netif_queue_stopped(dev) &&
1213     		dirty_tx > lp->cur_tx - TX_RING_SIZE + 2) {
1214     		/* The ring is no longer full, clear tbusy. */
1215     		lp->tx_full = 0;
1216     		netif_wake_queue (dev);
1217     	    }
1218     	    lp->dirty_tx = dirty_tx;
1219     	}
1220     
1221     	/* Log misc errors. */
1222     	if (csr0 & 0x4000) lp->stats.tx_errors++; /* Tx babble. */
1223     	if (csr0 & 0x1000) {
1224     	    /*
1225     	     * this happens when our receive ring is full. This shouldn't
1226     	     * be a problem as we will see normal rx interrupts for the frames
1227     	     * in the receive ring. But there are some PCI chipsets (I can reproduce
1228     	     * this on SP3G with Intel saturn chipset) which have sometimes problems
1229     	     * and will fill up the receive ring with error descriptors. In this
1230     	     * situation we don't get a rx interrupt, but a missed frame interrupt sooner
1231     	     * or later. So we try to clean up our receive ring here.
1232     	     */
1233     	    pcnet32_rx(dev);
1234     	    lp->stats.rx_errors++; /* Missed a Rx frame. */
1235     	}
1236     	if (csr0 & 0x0800) {
1237     	    printk(KERN_ERR "%s: Bus master arbitration failure, status %4.4x.\n",
1238     		   dev->name, csr0);
1239     	    /* unlike for the lance, there is no restart needed */
1240     	}
1241     
1242     	if (must_restart) {
1243     	    /* stop the chip to clear the error condition, then restart */
1244     	    lp->a.write_csr (ioaddr, 0, 0x0004);
1245     	    pcnet32_restart(dev, 0x0002);
1246     	}
1247         }
1248     
1249         /* Clear any other interrupt, and set interrupt enable. */
1250         lp->a.write_csr (ioaddr, 0, 0x7940);
1251         lp->a.write_rap(ioaddr,rap);
1252         
1253         if (pcnet32_debug > 4)
1254     	printk(KERN_DEBUG "%s: exiting interrupt, csr0=%#4.4x.\n",
1255     	       dev->name, lp->a.read_csr (ioaddr, 0));
1256     
1257         spin_unlock(&lp->lock);
1258     }
1259     
1260     static int
1261     pcnet32_rx(struct net_device *dev)
1262     {
1263         struct pcnet32_private *lp = dev->priv;
1264         int entry = lp->cur_rx & RX_RING_MOD_MASK;
1265     
1266         /* If we own the next entry, it's a new packet. Send it up. */
1267         while ((short)le16_to_cpu(lp->rx_ring[entry].status) >= 0) {
1268     	int status = (short)le16_to_cpu(lp->rx_ring[entry].status) >> 8;
1269     
1270     	if (status != 0x03) {			/* There was an error. */
1271     	    /* 
1272     	     * There is a tricky error noted by John Murphy,
1273     	     * <murf@perftech.com> to Russ Nelson: Even with full-sized
1274     	     * buffers it's possible for a jabber packet to use two
1275     	     * buffers, with only the last correctly noting the error.
1276     	     */
1277     	    if (status & 0x01)	/* Only count a general error at the */
1278     		lp->stats.rx_errors++; /* end of a packet.*/
1279     	    if (status & 0x20) lp->stats.rx_frame_errors++;
1280     	    if (status & 0x10) lp->stats.rx_over_errors++;
1281     	    if (status & 0x08) lp->stats.rx_crc_errors++;
1282     	    if (status & 0x04) lp->stats.rx_fifo_errors++;
1283     	    lp->rx_ring[entry].status &= le16_to_cpu(0x03ff);
1284     	} else {
1285     	    /* Malloc up new buffer, compatible with net-2e. */
1286     	    short pkt_len = (le32_to_cpu(lp->rx_ring[entry].msg_length) & 0xfff)-4;
1287     	    struct sk_buff *skb;
1288     			
1289     	    if(pkt_len < 60) {
1290     		printk(KERN_ERR "%s: Runt packet!\n",dev->name);
1291     		lp->stats.rx_errors++;
1292     	    } else {
1293     		int rx_in_place = 0;
1294     
1295     		if (pkt_len > rx_copybreak) {
1296     		    struct sk_buff *newskb;
1297     				
1298     		    if ((newskb = dev_alloc_skb (PKT_BUF_SZ))) {
1299     			skb_reserve (newskb, 2);
1300     			skb = lp->rx_skbuff[entry];
1301     			skb_put (skb, pkt_len);
1302     			lp->rx_skbuff[entry] = newskb;
1303     			newskb->dev = dev;
1304                             lp->rx_dma_addr[entry] = pci_map_single(lp->pci_dev, newskb->tail, newskb->len, PCI_DMA_FROMDEVICE);
1305     			lp->rx_ring[entry].base = le32_to_cpu(lp->rx_dma_addr[entry]);
1306     			rx_in_place = 1;
1307     		    } else
1308     			skb = NULL;
1309     		} else {
1310     		    skb = dev_alloc_skb(pkt_len+2);
1311                     }
1312     			    
1313     		if (skb == NULL) {
1314                         int i;
1315     		    printk(KERN_ERR "%s: Memory squeeze, deferring packet.\n", dev->name);
1316     		    for (i = 0; i < RX_RING_SIZE; i++)
1317     			if ((short)le16_to_cpu(lp->rx_ring[(entry+i) & RX_RING_MOD_MASK].status) < 0)
1318     			    break;
1319     
1320     		    if (i > RX_RING_SIZE -2) {
1321     			lp->stats.rx_dropped++;
1322     			lp->rx_ring[entry].status |= le16_to_cpu(0x8000);
1323     			lp->cur_rx++;
1324     		    }
1325     		    break;
1326     		}
1327     		skb->dev = dev;
1328     		if (!rx_in_place) {
1329     		    skb_reserve(skb,2); /* 16 byte align */
1330     		    skb_put(skb,pkt_len);	/* Make room */
1331     		    eth_copy_and_sum(skb,
1332     				     (unsigned char *)(lp->rx_skbuff[entry]->tail),
1333     				     pkt_len,0);
1334     		}
1335     		lp->stats.rx_bytes += skb->len;
1336     		skb->protocol=eth_type_trans(skb,dev);
1337     		netif_rx(skb);
1338     		lp->stats.rx_packets++;
1339     	    }
1340     	}
1341     	/*
1342     	 * The docs say that the buffer length isn't touched, but Andrew Boyd
1343     	 * of QNX reports that some revs of the 79C965 clear it.
1344     	 */
1345     	lp->rx_ring[entry].buf_length = le16_to_cpu(-PKT_BUF_SZ);
1346     	lp->rx_ring[entry].status |= le16_to_cpu(0x8000);
1347     	entry = (++lp->cur_rx) & RX_RING_MOD_MASK;
1348         }
1349     
1350         return 0;
1351     }
1352     
1353     static int
1354     pcnet32_close(struct net_device *dev)
1355     {
1356         unsigned long ioaddr = dev->base_addr;
1357         struct pcnet32_private *lp = dev->priv;
1358         int i;
1359     
1360         netif_stop_queue(dev);
1361     
1362         lp->stats.rx_missed_errors = lp->a.read_csr (ioaddr, 112);
1363     
1364         if (pcnet32_debug > 1)
1365     	printk(KERN_DEBUG "%s: Shutting down ethercard, status was %2.2x.\n",
1366     	       dev->name, lp->a.read_csr (ioaddr, 0));
1367     
1368         /* We stop the PCNET32 here -- it occasionally polls memory if we don't. */
1369         lp->a.write_csr (ioaddr, 0, 0x0004);
1370     
1371         /*
1372          * Switch back to 16bit mode to avoid problems with dumb 
1373          * DOS packet driver after a warm reboot
1374          */
1375         lp->a.write_bcr (ioaddr, 20, 4);
1376     
1377         free_irq(dev->irq, dev);
1378         
1379         /* free all allocated skbuffs */
1380         for (i = 0; i < RX_RING_SIZE; i++) {
1381     	lp->rx_ring[i].status = 0;			    
1382     	if (lp->rx_skbuff[i]) {
1383                 pci_unmap_single(lp->pci_dev, lp->rx_dma_addr[i], lp->rx_skbuff[i]->len, PCI_DMA_FROMDEVICE);
1384     	    dev_kfree_skb(lp->rx_skbuff[i]);
1385             }
1386     	lp->rx_skbuff[i] = NULL;
1387             lp->rx_dma_addr[i] = 0;
1388         }
1389         
1390         for (i = 0; i < TX_RING_SIZE; i++) {
1391     	if (lp->tx_skbuff[i]) {
1392                 pci_unmap_single(lp->pci_dev, lp->tx_dma_addr[i], lp->tx_skbuff[i]->len, PCI_DMA_TODEVICE);
1393     	    dev_kfree_skb(lp->tx_skbuff[i]);
1394             }
1395     	lp->tx_skbuff[i] = NULL;
1396             lp->tx_dma_addr[i] = 0;
1397         }
1398         
1399         MOD_DEC_USE_COUNT;
1400     
1401         return 0;
1402     }
1403     
1404     static struct net_device_stats *
1405     pcnet32_get_stats(struct net_device *dev)
1406     {
1407         struct pcnet32_private *lp = dev->priv;
1408         unsigned long ioaddr = dev->base_addr;
1409         u16 saved_addr;
1410         unsigned long flags;
1411     
1412         spin_lock_irqsave(&lp->lock, flags);
1413         saved_addr = lp->a.read_rap(ioaddr);
1414         lp->stats.rx_missed_errors = lp->a.read_csr (ioaddr, 112);
1415         lp->a.write_rap(ioaddr, saved_addr);
1416         spin_unlock_irqrestore(&lp->lock, flags);
1417     
1418         return &lp->stats;
1419     }
1420     
1421     /* taken from the sunlance driver, which it took from the depca driver */
1422     static void pcnet32_load_multicast (struct net_device *dev)
1423     {
1424         struct pcnet32_private *lp = dev->priv;
1425         volatile struct pcnet32_init_block *ib = &lp->init_block;
1426         volatile u16 *mcast_table = (u16 *)&ib->filter;
1427         struct dev_mc_list *dmi=dev->mc_list;
1428         char *addrs;
1429         int i, j, bit, byte;
1430         u32 crc, poly = CRC_POLYNOMIAL_LE;
1431     	
1432         /* set all multicast bits */
1433         if (dev->flags & IFF_ALLMULTI){ 
1434     	ib->filter [0] = 0xffffffff;
1435     	ib->filter [1] = 0xffffffff;
1436     	return;
1437         }
1438         /* clear the multicast filter */
1439         ib->filter [0] = 0;
1440         ib->filter [1] = 0;
1441     
1442         /* Add addresses */
1443         for (i = 0; i < dev->mc_count; i++){
1444     	addrs = dmi->dmi_addr;
1445     	dmi   = dmi->next;
1446     	
1447     	/* multicast address? */
1448     	if (!(*addrs & 1))
1449     	    continue;
1450     	
1451     	crc = 0xffffffff;
1452     	for (byte = 0; byte < 6; byte++)
1453     	    for (bit = *addrs++, j = 0; j < 8; j++, bit >>= 1) {
1454     		int test;
1455     		
1456     		test = ((bit ^ crc) & 0x01);
1457     		crc >>= 1;
1458     		
1459     		if (test) {
1460     		    crc = crc ^ poly;
1461     		}
1462     	    }
1463     	
1464     	crc = crc >> 26;
1465     	mcast_table [crc >> 4] |= 1 << (crc & 0xf);
1466         }
1467         return;
1468     }
1469     
1470     
1471     /*
1472      * Set or clear the multicast filter for this adaptor.
1473      */
1474     static void pcnet32_set_multicast_list(struct net_device *dev)
1475     {
1476         unsigned long ioaddr = dev->base_addr;
1477         struct pcnet32_private *lp = dev->priv;	 
1478     
1479         if (dev->flags&IFF_PROMISC) {
1480     	/* Log any net taps. */
1481     	printk(KERN_INFO "%s: Promiscuous mode enabled.\n", dev->name);
1482     	lp->init_block.mode = le16_to_cpu(0x8000 | (lp->options & PORT_PORTSEL) << 7);
1483         } else {
1484     	lp->init_block.mode = le16_to_cpu((lp->options & PORT_PORTSEL) << 7);
1485     	pcnet32_load_multicast (dev);
1486         }
1487         
1488         lp->a.write_csr (ioaddr, 0, 0x0004); /* Temporarily stop the lance. */
1489     
1490         pcnet32_restart(dev, 0x0042); /*  Resume normal operation */
1491     }
1492     
1493     #ifdef HAVE_PRIVATE_IOCTL
1494     static int pcnet32_mii_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1495     {
1496         unsigned long ioaddr = dev->base_addr;
1497         struct pcnet32_private *lp = dev->priv;	 
1498         u16 *data = (u16 *)&rq->ifr_data;
1499         int phyaddr = lp->a.read_bcr (ioaddr, 33);
1500     
1501         if (lp->mii) {
1502     	switch(cmd) {
1503     	case SIOCDEVPRIVATE:		/* Get the address of the PHY in use. */
1504     	    data[0] = (phyaddr >> 5) & 0x1f;
1505     	    /* Fall Through */
1506     	case SIOCDEVPRIVATE+1:		/* Read the specified MII register. */
1507     	    lp->a.write_bcr (ioaddr, 33, ((data[0] & 0x1f) << 5) | (data[1] & 0x1f));
1508     	    data[3] = lp->a.read_bcr (ioaddr, 34);
1509     	    lp->a.write_bcr (ioaddr, 33, phyaddr);
1510     	    return 0;
1511     	case SIOCDEVPRIVATE+2:		/* Write the specified MII register */
1512     	    if (!capable(CAP_NET_ADMIN))
1513     		return -EPERM;
1514     	    lp->a.write_bcr (ioaddr, 33, ((data[0] & 0x1f) << 5) | (data[1] & 0x1f));
1515     	    lp->a.write_bcr (ioaddr, 34, data[2]);
1516     	    lp->a.write_bcr (ioaddr, 33, phyaddr);
1517     	    return 0;
1518     	default:
1519     	    return -EOPNOTSUPP;
1520     	}
1521         }
1522         return -EOPNOTSUPP;
1523     }
1524     #endif	/* HAVE_PRIVATE_IOCTL */
1525     					    
1526     static struct pci_driver pcnet32_driver = {
1527         name:  "pcnet32",
1528         probe: pcnet32_probe_pci,
1529         remove: NULL,
1530         id_table: pcnet32_pci_tbl,
1531     };
1532     
1533     MODULE_PARM(debug, "i");
1534     MODULE_PARM(max_interrupt_work, "i");
1535     MODULE_PARM(rx_copybreak, "i");
1536     MODULE_PARM(tx_start_pt, "i");
1537     MODULE_PARM(options, "1-" __MODULE_STRING(MAX_UNITS) "i");
1538     MODULE_PARM(full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
1539     MODULE_AUTHOR("Thomas Bogendoerfer");
1540     MODULE_DESCRIPTION("Driver for PCnet32 and PCnetPCI based ethercards");
1541     
1542     /* An additional parameter that may be passed in... */
1543     static int debug = -1;
1544     static int tx_start_pt = -1;
1545     
1546     static int __init pcnet32_init_module(void)
1547     {
1548         int cards_found = 0;
1549         int err;
1550     
1551         if (debug > 0)
1552     	pcnet32_debug = debug;
1553         if ((tx_start_pt >= 0) && (tx_start_pt <= 3))
1554     	tx_start = tx_start_pt;
1555         
1556         pcnet32_dev = NULL;
1557         /* find the PCI devices */
1558     #define USE_PCI_REGISTER_DRIVER
1559     #ifdef USE_PCI_REGISTER_DRIVER
1560         if ((err = pci_module_init(&pcnet32_driver)) < 0 )
1561            return err;
1562     #else
1563         {
1564             struct pci_device_id *devid = pcnet32_pci_tbl;
1565             for (devid = pcnet32_pci_tbl; devid != NULL && devid->vendor != 0; devid++) {
1566                 struct pci_dev *pdev = pci_find_subsys(devid->vendor, devid->device, devid->subvendor, devid->subdevice, NULL);
1567                 if (pdev != NULL) {
1568                     if (pcnet32_probe_pci(pdev, devid) >= 0) {
1569                         cards_found++;
1570                     }
1571                 }
1572             }
1573         }
1574     #endif
1575         return 0;
1576         /* find any remaining VLbus devices */
1577         return pcnet32_probe_vlbus(cards_found);
1578     }
1579     
1580     static void __exit pcnet32_cleanup_module(void)
1581     {
1582         struct net_device *next_dev;
1583     
1584         /* No need to check MOD_IN_USE, as sys_delete_module() checks. */
1585         while (pcnet32_dev) {
1586             struct pcnet32_private *lp = pcnet32_dev->priv;
1587     	next_dev = lp->next;
1588     	unregister_netdev(pcnet32_dev);
1589     	release_region(pcnet32_dev->base_addr, PCNET32_TOTAL_SIZE);
1590     	if (lp->pci_dev != NULL)
1591     	    pci_unregister_driver(&pcnet32_driver);
1592             pci_free_consistent(lp->pci_dev, sizeof(*lp), lp, lp->dma_addr);
1593     	kfree(pcnet32_dev);
1594     	pcnet32_dev = next_dev;
1595         }
1596     }
1597     
1598     module_init(pcnet32_init_module);
1599     module_exit(pcnet32_cleanup_module);
1600     
1601     /*
1602      * Local variables:
1603      *  compile-command: "gcc -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -m486 -c pcnet32.c"
1604      *  c-indent-level: 4
1605      *  tab-width: 8
1606      * End:
1607      */
1608