File: /usr/src/linux/drivers/net/sunlance.c
1 /* $Id: sunlance.c,v 1.108 2001/04/19 22:32:41 davem Exp $
2 * lance.c: Linux/Sparc/Lance driver
3 *
4 * Written 1995, 1996 by Miguel de Icaza
5 * Sources:
6 * The Linux depca driver
7 * The Linux lance driver.
8 * The Linux skeleton driver.
9 * The NetBSD Sparc/Lance driver.
10 * Theo de Raadt (deraadt@openbsd.org)
11 * NCR92C990 Lan Controller manual
12 *
13 * 1.4:
14 * Added support to run with a ledma on the Sun4m
15 *
16 * 1.5:
17 * Added multiple card detection.
18 *
19 * 4/17/96: Burst sizes and tpe selection on sun4m by Eddie C. Dost
20 * (ecd@skynet.be)
21 *
22 * 5/15/96: auto carrier detection on sun4m by Eddie C. Dost
23 * (ecd@skynet.be)
24 *
25 * 5/17/96: lebuffer on scsi/ether cards now work David S. Miller
26 * (davem@caip.rutgers.edu)
27 *
28 * 5/29/96: override option 'tpe-link-test?', if it is 'false', as
29 * this disables auto carrier detection on sun4m. Eddie C. Dost
30 * (ecd@skynet.be)
31 *
32 * 1.7:
33 * 6/26/96: Bug fix for multiple ledmas, miguel.
34 *
35 * 1.8:
36 * Stole multicast code from depca.c, fixed lance_tx.
37 *
38 * 1.9:
39 * 8/21/96: Fixed the multicast code (Pedro Roque)
40 *
41 * 8/28/96: Send fake packet in lance_open() if auto_select is true,
42 * so we can detect the carrier loss condition in time.
43 * Eddie C. Dost (ecd@skynet.be)
44 *
45 * 9/15/96: Align rx_buf so that eth_copy_and_sum() won't cause an
46 * MNA trap during chksum_partial_copy(). (ecd@skynet.be)
47 *
48 * 11/17/96: Handle LE_C0_MERR in lance_interrupt(). (ecd@skynet.be)
49 *
50 * 12/22/96: Don't loop forever in lance_rx() on incomplete packets.
51 * This was the sun4c killer. Shit, stupid bug.
52 * (ecd@skynet.be)
53 *
54 * 1.10:
55 * 1/26/97: Modularize driver. (ecd@skynet.be)
56 *
57 * 1.11:
58 * 12/27/97: Added sun4d support. (jj@sunsite.mff.cuni.cz)
59 *
60 * 1.12:
61 * 11/3/99: Fixed SMP race in lance_start_xmit found by davem.
62 * Anton Blanchard (anton@progsoc.uts.edu.au)
63 * 2.00: 11/9/99: Massive overhaul and port to new SBUS driver interfaces.
64 * David S. Miller (davem@redhat.com)
65 */
66
67 #undef DEBUG_DRIVER
68
69 static char version[] =
70 "sunlance.c:v2.00 11/Sep/99 Miguel de Icaza (miguel@nuclecu.unam.mx)\n";
71
72 static char lancestr[] = "LANCE";
73
74 #include <linux/config.h>
75 #include <linux/module.h>
76
77 #include <linux/kernel.h>
78 #include <linux/sched.h>
79 #include <linux/types.h>
80 #include <linux/fcntl.h>
81 #include <linux/interrupt.h>
82 #include <linux/ptrace.h>
83 #include <linux/ioport.h>
84 #include <linux/in.h>
85 #include <linux/slab.h>
86 #include <linux/string.h>
87 #include <linux/delay.h>
88 #include <linux/init.h>
89 #include <asm/system.h>
90 #include <asm/bitops.h>
91 #include <asm/io.h>
92 #include <asm/dma.h>
93 #include <asm/pgtable.h>
94 #include <linux/errno.h>
95 #include <asm/byteorder.h> /* Used by the checksum routines */
96
97 /* Used for the temporal inet entries and routing */
98 #include <linux/socket.h>
99 #include <linux/route.h>
100
101 #include <asm/idprom.h>
102 #include <asm/sbus.h>
103 #include <asm/openprom.h>
104 #include <asm/oplib.h>
105 #include <asm/auxio.h> /* For tpe-link-test? setting */
106 #include <asm/irq.h>
107
108 #include <linux/netdevice.h>
109 #include <linux/etherdevice.h>
110 #include <linux/skbuff.h>
111
112 /* Define: 2^4 Tx buffers and 2^4 Rx buffers */
113 #ifndef LANCE_LOG_TX_BUFFERS
114 #define LANCE_LOG_TX_BUFFERS 4
115 #define LANCE_LOG_RX_BUFFERS 4
116 #endif
117
118 #define CRC_POLYNOMIAL_BE 0x04c11db7UL /* Ethernet CRC, big endian */
119 #define CRC_POLYNOMIAL_LE 0xedb88320UL /* Ethernet CRC, little endian */
120
121 #define LE_CSR0 0
122 #define LE_CSR1 1
123 #define LE_CSR2 2
124 #define LE_CSR3 3
125
126 #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */
127
128 #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */
129 #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */
130 #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */
131 #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */
132 #define LE_C0_MERR 0x0800 /* ME: Memory error */
133 #define LE_C0_RINT 0x0400 /* Received interrupt */
134 #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */
135 #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */
136 #define LE_C0_INTR 0x0080 /* Interrupt or error */
137 #define LE_C0_INEA 0x0040 /* Interrupt enable */
138 #define LE_C0_RXON 0x0020 /* Receiver on */
139 #define LE_C0_TXON 0x0010 /* Transmitter on */
140 #define LE_C0_TDMD 0x0008 /* Transmitter demand */
141 #define LE_C0_STOP 0x0004 /* Stop the card */
142 #define LE_C0_STRT 0x0002 /* Start the card */
143 #define LE_C0_INIT 0x0001 /* Init the card */
144
145 #define LE_C3_BSWP 0x4 /* SWAP */
146 #define LE_C3_ACON 0x2 /* ALE Control */
147 #define LE_C3_BCON 0x1 /* Byte control */
148
149 /* Receive message descriptor 1 */
150 #define LE_R1_OWN 0x80 /* Who owns the entry */
151 #define LE_R1_ERR 0x40 /* Error: if FRA, OFL, CRC or BUF is set */
152 #define LE_R1_FRA 0x20 /* FRA: Frame error */
153 #define LE_R1_OFL 0x10 /* OFL: Frame overflow */
154 #define LE_R1_CRC 0x08 /* CRC error */
155 #define LE_R1_BUF 0x04 /* BUF: Buffer error */
156 #define LE_R1_SOP 0x02 /* Start of packet */
157 #define LE_R1_EOP 0x01 /* End of packet */
158 #define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */
159
160 #define LE_T1_OWN 0x80 /* Lance owns the packet */
161 #define LE_T1_ERR 0x40 /* Error summary */
162 #define LE_T1_EMORE 0x10 /* Error: more than one retry needed */
163 #define LE_T1_EONE 0x08 /* Error: one retry needed */
164 #define LE_T1_EDEF 0x04 /* Error: deferred */
165 #define LE_T1_SOP 0x02 /* Start of packet */
166 #define LE_T1_EOP 0x01 /* End of packet */
167 #define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */
168
169 #define LE_T3_BUF 0x8000 /* Buffer error */
170 #define LE_T3_UFL 0x4000 /* Error underflow */
171 #define LE_T3_LCOL 0x1000 /* Error late collision */
172 #define LE_T3_CLOS 0x0800 /* Error carrier loss */
173 #define LE_T3_RTY 0x0400 /* Error retry */
174 #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */
175
176 #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
177 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
178 #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
179 #define TX_NEXT(__x) (((__x)+1) & TX_RING_MOD_MASK)
180
181 #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
182 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
183 #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
184 #define RX_NEXT(__x) (((__x)+1) & RX_RING_MOD_MASK)
185
186 #define PKT_BUF_SZ 1544
187 #define RX_BUFF_SIZE PKT_BUF_SZ
188 #define TX_BUFF_SIZE PKT_BUF_SZ
189
190 struct lance_rx_desc {
191 u16 rmd0; /* low address of packet */
192 u8 rmd1_bits; /* descriptor bits */
193 u8 rmd1_hadr; /* high address of packet */
194 s16 length; /* This length is 2s complement (negative)!
195 * Buffer length
196 */
197 u16 mblength; /* This is the actual number of bytes received */
198 };
199
200 struct lance_tx_desc {
201 u16 tmd0; /* low address of packet */
202 u8 tmd1_bits; /* descriptor bits */
203 u8 tmd1_hadr; /* high address of packet */
204 s16 length; /* Length is 2s complement (negative)! */
205 u16 misc;
206 };
207
208 /* The LANCE initialization block, described in databook. */
209 /* On the Sparc, this block should be on a DMA region */
210 struct lance_init_block {
211 u16 mode; /* Pre-set mode (reg. 15) */
212 u8 phys_addr[6]; /* Physical ethernet address */
213 u32 filter[2]; /* Multicast filter. */
214
215 /* Receive and transmit ring base, along with extra bits. */
216 u16 rx_ptr; /* receive descriptor addr */
217 u16 rx_len; /* receive len and high addr */
218 u16 tx_ptr; /* transmit descriptor addr */
219 u16 tx_len; /* transmit len and high addr */
220
221 /* The Tx and Rx ring entries must aligned on 8-byte boundaries. */
222 struct lance_rx_desc brx_ring[RX_RING_SIZE];
223 struct lance_tx_desc btx_ring[TX_RING_SIZE];
224
225 u8 tx_buf [TX_RING_SIZE][TX_BUFF_SIZE];
226 u8 pad[2]; /* align rx_buf for copy_and_sum(). */
227 u8 rx_buf [RX_RING_SIZE][RX_BUFF_SIZE];
228 };
229
230 #define libdesc_offset(rt, elem) \
231 ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem])))))
232
233 #define libbuff_offset(rt, elem) \
234 ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem][0])))))
235
236 struct lance_private {
237 unsigned long lregs; /* Lance RAP/RDP regs. */
238 unsigned long dregs; /* DMA controller regs. */
239 volatile struct lance_init_block *init_block;
240
241 spinlock_t lock;
242
243 int rx_new, tx_new;
244 int rx_old, tx_old;
245
246 struct net_device_stats stats;
247 struct sbus_dma *ledma; /* If set this points to ledma */
248 char tpe; /* cable-selection is TPE */
249 char auto_select; /* cable-selection by carrier */
250 char burst_sizes; /* ledma SBus burst sizes */
251 char pio_buffer; /* init block in PIO space? */
252
253 unsigned short busmaster_regval;
254
255 void (*init_ring)(struct net_device *);
256 void (*rx)(struct net_device *);
257 void (*tx)(struct net_device *);
258
259 char *name;
260 __u32 init_block_dvma;
261 struct net_device *dev; /* Backpointer */
262 struct lance_private *next_module;
263 struct sbus_dev *sdev;
264 struct timer_list multicast_timer;
265 };
266
267 #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
268 lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
269 lp->tx_old - lp->tx_new-1)
270
271 /* Lance registers. */
272 #define RDP 0x00UL /* register data port */
273 #define RAP 0x02UL /* register address port */
274 #define LANCE_REG_SIZE 0x04UL
275
276 #define STOP_LANCE(__lp) \
277 do { unsigned long __base = (__lp)->lregs; \
278 sbus_writew(LE_CSR0, __base + RAP); \
279 sbus_writew(LE_C0_STOP, __base + RDP); \
280 } while (0)
281
282 int sparc_lance_debug = 2;
283
284 /* The Lance uses 24 bit addresses */
285 /* On the Sun4c the DVMA will provide the remaining bytes for us */
286 /* On the Sun4m we have to instruct the ledma to provide them */
287 /* Even worse, on scsi/ether SBUS cards, the init block and the
288 * transmit/receive buffers are addresses as offsets from absolute
289 * zero on the lebuffer PIO area. -DaveM
290 */
291
292 #define LANCE_ADDR(x) ((long)(x) & ~0xff000000)
293
294 static struct lance_private *root_lance_dev;
295
296 /* Load the CSR registers */
297 static void load_csrs(struct lance_private *lp)
298 {
299 u32 leptr;
300
301 if (lp->pio_buffer)
302 leptr = 0;
303 else
304 leptr = LANCE_ADDR(lp->init_block_dvma);
305
306 sbus_writew(LE_CSR1, lp->lregs + RAP);
307 sbus_writew(leptr & 0xffff, lp->lregs + RDP);
308 sbus_writew(LE_CSR2, lp->lregs + RAP);
309 sbus_writew(leptr >> 16, lp->lregs + RDP);
310 sbus_writew(LE_CSR3, lp->lregs + RAP);
311 sbus_writew(lp->busmaster_regval, lp->lregs + RDP);
312
313 /* Point back to csr0 */
314 sbus_writew(LE_CSR0, lp->lregs + RAP);
315 }
316
317 /* Setup the Lance Rx and Tx rings */
318 static void lance_init_ring_dvma(struct net_device *dev)
319 {
320 struct lance_private *lp = (struct lance_private *) dev->priv;
321 volatile struct lance_init_block *ib = lp->init_block;
322 __u32 aib = lp->init_block_dvma;
323 __u32 leptr;
324 int i;
325
326 /* Lock out other processes while setting up hardware */
327 netif_stop_queue(dev);
328 lp->rx_new = lp->tx_new = 0;
329 lp->rx_old = lp->tx_old = 0;
330
331 /* Copy the ethernet address to the lance init block
332 * Note that on the sparc you need to swap the ethernet address.
333 */
334 ib->phys_addr [0] = dev->dev_addr [1];
335 ib->phys_addr [1] = dev->dev_addr [0];
336 ib->phys_addr [2] = dev->dev_addr [3];
337 ib->phys_addr [3] = dev->dev_addr [2];
338 ib->phys_addr [4] = dev->dev_addr [5];
339 ib->phys_addr [5] = dev->dev_addr [4];
340
341 /* Setup the Tx ring entries */
342 for (i = 0; i <= TX_RING_SIZE; i++) {
343 leptr = LANCE_ADDR(aib + libbuff_offset(tx_buf, i));
344 ib->btx_ring [i].tmd0 = leptr;
345 ib->btx_ring [i].tmd1_hadr = leptr >> 16;
346 ib->btx_ring [i].tmd1_bits = 0;
347 ib->btx_ring [i].length = 0xf000; /* The ones required by tmd2 */
348 ib->btx_ring [i].misc = 0;
349 }
350
351 /* Setup the Rx ring entries */
352 for (i = 0; i < RX_RING_SIZE; i++) {
353 leptr = LANCE_ADDR(aib + libbuff_offset(rx_buf, i));
354
355 ib->brx_ring [i].rmd0 = leptr;
356 ib->brx_ring [i].rmd1_hadr = leptr >> 16;
357 ib->brx_ring [i].rmd1_bits = LE_R1_OWN;
358 ib->brx_ring [i].length = -RX_BUFF_SIZE | 0xf000;
359 ib->brx_ring [i].mblength = 0;
360 }
361
362 /* Setup the initialization block */
363
364 /* Setup rx descriptor pointer */
365 leptr = LANCE_ADDR(aib + libdesc_offset(brx_ring, 0));
366 ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16);
367 ib->rx_ptr = leptr;
368
369 /* Setup tx descriptor pointer */
370 leptr = LANCE_ADDR(aib + libdesc_offset(btx_ring, 0));
371 ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16);
372 ib->tx_ptr = leptr;
373 }
374
375 static void lance_init_ring_pio(struct net_device *dev)
376 {
377 struct lance_private *lp = (struct lance_private *) dev->priv;
378 volatile struct lance_init_block *ib = lp->init_block;
379 u32 leptr;
380 int i;
381
382 /* Lock out other processes while setting up hardware */
383 netif_stop_queue(dev);
384 lp->rx_new = lp->tx_new = 0;
385 lp->rx_old = lp->tx_old = 0;
386
387 /* Copy the ethernet address to the lance init block
388 * Note that on the sparc you need to swap the ethernet address.
389 */
390 sbus_writeb(dev->dev_addr[1], &ib->phys_addr[0]);
391 sbus_writeb(dev->dev_addr[0], &ib->phys_addr[1]);
392 sbus_writeb(dev->dev_addr[3], &ib->phys_addr[2]);
393 sbus_writeb(dev->dev_addr[2], &ib->phys_addr[3]);
394 sbus_writeb(dev->dev_addr[5], &ib->phys_addr[4]);
395 sbus_writeb(dev->dev_addr[4], &ib->phys_addr[5]);
396
397 /* Setup the Tx ring entries */
398 for (i = 0; i <= TX_RING_SIZE; i++) {
399 leptr = libbuff_offset(tx_buf, i);
400 sbus_writew(leptr, &ib->btx_ring [i].tmd0);
401 sbus_writeb(leptr >> 16,&ib->btx_ring [i].tmd1_hadr);
402 sbus_writeb(0, &ib->btx_ring [i].tmd1_bits);
403
404 /* The ones required by tmd2 */
405 sbus_writew(0xf000, &ib->btx_ring [i].length);
406 sbus_writew(0, &ib->btx_ring [i].misc);
407 }
408
409 /* Setup the Rx ring entries */
410 for (i = 0; i < RX_RING_SIZE; i++) {
411 leptr = libbuff_offset(rx_buf, i);
412
413 sbus_writew(leptr, &ib->brx_ring [i].rmd0);
414 sbus_writeb(leptr >> 16,&ib->brx_ring [i].rmd1_hadr);
415 sbus_writeb(LE_R1_OWN, &ib->brx_ring [i].rmd1_bits);
416 sbus_writew(-RX_BUFF_SIZE|0xf000,
417 &ib->brx_ring [i].length);
418 sbus_writew(0, &ib->brx_ring [i].mblength);
419 }
420
421 /* Setup the initialization block */
422
423 /* Setup rx descriptor pointer */
424 leptr = libdesc_offset(brx_ring, 0);
425 sbus_writew((LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16),
426 &ib->rx_len);
427 sbus_writew(leptr, &ib->rx_ptr);
428
429 /* Setup tx descriptor pointer */
430 leptr = libdesc_offset(btx_ring, 0);
431 sbus_writew((LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16),
432 &ib->tx_len);
433 sbus_writew(leptr, &ib->tx_ptr);
434 }
435
436 static void init_restart_ledma(struct lance_private *lp)
437 {
438 u32 csr = sbus_readl(lp->dregs + DMA_CSR);
439
440 if (!(csr & DMA_HNDL_ERROR)) {
441 /* E-Cache draining */
442 while (sbus_readl(lp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN)
443 barrier();
444 }
445
446 csr = sbus_readl(lp->dregs + DMA_CSR);
447 csr &= ~DMA_E_BURSTS;
448 if (lp->burst_sizes & DMA_BURST32)
449 csr |= DMA_E_BURST32;
450 else
451 csr |= DMA_E_BURST16;
452
453 csr |= (DMA_DSBL_RD_DRN | DMA_DSBL_WR_INV | DMA_FIFO_INV);
454
455 if (lp->tpe)
456 csr |= DMA_EN_ENETAUI;
457 else
458 csr &= ~DMA_EN_ENETAUI;
459 udelay(20);
460 sbus_writel(csr, lp->dregs + DMA_CSR);
461 udelay(200);
462 }
463
464 static int init_restart_lance(struct lance_private *lp)
465 {
466 u16 regval = 0;
467 int i;
468
469 if (lp->dregs)
470 init_restart_ledma(lp);
471
472 sbus_writew(LE_CSR0, lp->lregs + RAP);
473 sbus_writew(LE_C0_INIT, lp->lregs + RDP);
474
475 /* Wait for the lance to complete initialization */
476 for (i = 0; i < 100; i++) {
477 regval = sbus_readw(lp->lregs + RDP);
478
479 if (regval & (LE_C0_ERR | LE_C0_IDON))
480 break;
481 barrier();
482 }
483 if (i == 100 || (regval & LE_C0_ERR)) {
484 printk(KERN_ERR "LANCE unopened after %d ticks, csr0=%4.4x.\n",
485 i, regval);
486 if (lp->dregs)
487 printk("dcsr=%8.8x\n", sbus_readl(lp->dregs + DMA_CSR));
488 return -1;
489 }
490
491 /* Clear IDON by writing a "1", enable interrupts and start lance */
492 sbus_writew(LE_C0_IDON, lp->lregs + RDP);
493 sbus_writew(LE_C0_INEA | LE_C0_STRT, lp->lregs + RDP);
494
495 if (lp->dregs) {
496 u32 csr = sbus_readl(lp->dregs + DMA_CSR);
497
498 csr |= DMA_INT_ENAB;
499 sbus_writel(csr, lp->dregs + DMA_CSR);
500 }
501
502 return 0;
503 }
504
505 static void lance_rx_dvma(struct net_device *dev)
506 {
507 struct lance_private *lp = (struct lance_private *) dev->priv;
508 volatile struct lance_init_block *ib = lp->init_block;
509 volatile struct lance_rx_desc *rd;
510 u8 bits;
511 int len, entry = lp->rx_new;
512 struct sk_buff *skb;
513
514 for (rd = &ib->brx_ring [entry];
515 !((bits = rd->rmd1_bits) & LE_R1_OWN);
516 rd = &ib->brx_ring [entry]) {
517
518 /* We got an incomplete frame? */
519 if ((bits & LE_R1_POK) != LE_R1_POK) {
520 lp->stats.rx_over_errors++;
521 lp->stats.rx_errors++;
522 } else if (bits & LE_R1_ERR) {
523 /* Count only the end frame as a rx error,
524 * not the beginning
525 */
526 if (bits & LE_R1_BUF) lp->stats.rx_fifo_errors++;
527 if (bits & LE_R1_CRC) lp->stats.rx_crc_errors++;
528 if (bits & LE_R1_OFL) lp->stats.rx_over_errors++;
529 if (bits & LE_R1_FRA) lp->stats.rx_frame_errors++;
530 if (bits & LE_R1_EOP) lp->stats.rx_errors++;
531 } else {
532 len = (rd->mblength & 0xfff) - 4;
533 skb = dev_alloc_skb(len + 2);
534
535 if (skb == NULL) {
536 printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n",
537 dev->name);
538 lp->stats.rx_dropped++;
539 rd->mblength = 0;
540 rd->rmd1_bits = LE_R1_OWN;
541 lp->rx_new = RX_NEXT(entry);
542 return;
543 }
544
545 lp->stats.rx_bytes += len;
546
547 skb->dev = dev;
548 skb_reserve(skb, 2); /* 16 byte align */
549 skb_put(skb, len); /* make room */
550 eth_copy_and_sum(skb,
551 (unsigned char *)&(ib->rx_buf [entry][0]),
552 len, 0);
553 skb->protocol = eth_type_trans(skb, dev);
554 netif_rx(skb);
555 dev->last_rx = jiffies;
556 lp->stats.rx_packets++;
557 }
558
559 /* Return the packet to the pool */
560 rd->mblength = 0;
561 rd->rmd1_bits = LE_R1_OWN;
562 entry = RX_NEXT(entry);
563 }
564
565 lp->rx_new = entry;
566 }
567
568 static void lance_tx_dvma(struct net_device *dev)
569 {
570 struct lance_private *lp = (struct lance_private *) dev->priv;
571 volatile struct lance_init_block *ib = lp->init_block;
572 int i, j;
573
574 spin_lock(&lp->lock);
575
576 j = lp->tx_old;
577 for (i = j; i != lp->tx_new; i = j) {
578 volatile struct lance_tx_desc *td = &ib->btx_ring [i];
579 u8 bits = td->tmd1_bits;
580
581 /* If we hit a packet not owned by us, stop */
582 if (bits & LE_T1_OWN)
583 break;
584
585 if (bits & LE_T1_ERR) {
586 u16 status = td->misc;
587
588 lp->stats.tx_errors++;
589 if (status & LE_T3_RTY) lp->stats.tx_aborted_errors++;
590 if (status & LE_T3_LCOL) lp->stats.tx_window_errors++;
591
592 if (status & LE_T3_CLOS) {
593 lp->stats.tx_carrier_errors++;
594 if (lp->auto_select) {
595 lp->tpe = 1 - lp->tpe;
596 printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
597 dev->name, lp->tpe?"TPE":"AUI");
598 STOP_LANCE(lp);
599 lp->init_ring(dev);
600 load_csrs(lp);
601 init_restart_lance(lp);
602 goto out;
603 }
604 }
605
606 /* Buffer errors and underflows turn off the
607 * transmitter, restart the adapter.
608 */
609 if (status & (LE_T3_BUF|LE_T3_UFL)) {
610 lp->stats.tx_fifo_errors++;
611
612 printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
613 dev->name);
614 STOP_LANCE(lp);
615 lp->init_ring(dev);
616 load_csrs(lp);
617 init_restart_lance(lp);
618 goto out;
619 }
620 } else if ((bits & LE_T1_POK) == LE_T1_POK) {
621 /*
622 * So we don't count the packet more than once.
623 */
624 td->tmd1_bits = bits & ~(LE_T1_POK);
625
626 /* One collision before packet was sent. */
627 if (bits & LE_T1_EONE)
628 lp->stats.collisions++;
629
630 /* More than one collision, be optimistic. */
631 if (bits & LE_T1_EMORE)
632 lp->stats.collisions += 2;
633
634 lp->stats.tx_packets++;
635 }
636
637 j = TX_NEXT(j);
638 }
639 lp->tx_old = j;
640 out:
641 if (netif_queue_stopped(dev) &&
642 TX_BUFFS_AVAIL > 0)
643 netif_wake_queue(dev);
644
645 spin_unlock(&lp->lock);
646 }
647
648 static void lance_piocopy_to_skb(struct sk_buff *skb, volatile void *piobuf, int len)
649 {
650 u16 *p16 = (u16 *) skb->data;
651 u32 *p32;
652 u8 *p8;
653 unsigned long pbuf = (unsigned long) piobuf;
654
655 /* We know here that both src and dest are on a 16bit boundry. */
656 *p16++ = sbus_readw(pbuf);
657 p32 = (u32 *) p16;
658 pbuf += 2;
659 len -= 2;
660
661 while (len >= 4) {
662 *p32++ = sbus_readl(pbuf);
663 pbuf += 4;
664 len -= 4;
665 }
666 p8 = (u8 *) p32;
667 if (len >= 2) {
668 p16 = (u16 *) p32;
669 *p16++ = sbus_readw(pbuf);
670 pbuf += 2;
671 len -= 2;
672 p8 = (u8 *) p16;
673 }
674 if (len >= 1)
675 *p8 = sbus_readb(pbuf);
676 }
677
678 static void lance_rx_pio(struct net_device *dev)
679 {
680 struct lance_private *lp = (struct lance_private *) dev->priv;
681 volatile struct lance_init_block *ib = lp->init_block;
682 volatile struct lance_rx_desc *rd;
683 unsigned char bits;
684 int len, entry;
685 struct sk_buff *skb;
686
687 entry = lp->rx_new;
688 for (rd = &ib->brx_ring [entry];
689 !((bits = sbus_readb(&rd->rmd1_bits)) & LE_R1_OWN);
690 rd = &ib->brx_ring [entry]) {
691
692 /* We got an incomplete frame? */
693 if ((bits & LE_R1_POK) != LE_R1_POK) {
694 lp->stats.rx_over_errors++;
695 lp->stats.rx_errors++;
696 } else if (bits & LE_R1_ERR) {
697 /* Count only the end frame as a rx error,
698 * not the beginning
699 */
700 if (bits & LE_R1_BUF) lp->stats.rx_fifo_errors++;
701 if (bits & LE_R1_CRC) lp->stats.rx_crc_errors++;
702 if (bits & LE_R1_OFL) lp->stats.rx_over_errors++;
703 if (bits & LE_R1_FRA) lp->stats.rx_frame_errors++;
704 if (bits & LE_R1_EOP) lp->stats.rx_errors++;
705 } else {
706 len = (sbus_readw(&rd->mblength) & 0xfff) - 4;
707 skb = dev_alloc_skb(len + 2);
708
709 if (skb == NULL) {
710 printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n",
711 dev->name);
712 lp->stats.rx_dropped++;
713 sbus_writew(0, &rd->mblength);
714 sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
715 lp->rx_new = RX_NEXT(entry);
716 return;
717 }
718
719 lp->stats.rx_bytes += len;
720
721 skb->dev = dev;
722 skb_reserve (skb, 2); /* 16 byte align */
723 skb_put(skb, len); /* make room */
724 lance_piocopy_to_skb(skb, &(ib->rx_buf[entry][0]), len);
725 skb->protocol = eth_type_trans(skb, dev);
726 netif_rx(skb);
727 dev->last_rx = jiffies;
728 lp->stats.rx_packets++;
729 }
730
731 /* Return the packet to the pool */
732 sbus_writew(0, &rd->mblength);
733 sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
734 entry = RX_NEXT(entry);
735 }
736
737 lp->rx_new = entry;
738 }
739
740 static void lance_tx_pio(struct net_device *dev)
741 {
742 struct lance_private *lp = (struct lance_private *) dev->priv;
743 volatile struct lance_init_block *ib = lp->init_block;
744 int i, j;
745
746 spin_lock(&lp->lock);
747
748 j = lp->tx_old;
749 for (i = j; i != lp->tx_new; i = j) {
750 volatile struct lance_tx_desc *td = &ib->btx_ring [i];
751 u8 bits = sbus_readb(&td->tmd1_bits);
752
753 /* If we hit a packet not owned by us, stop */
754 if (bits & LE_T1_OWN)
755 break;
756
757 if (bits & LE_T1_ERR) {
758 u16 status = sbus_readw(&td->misc);
759
760 lp->stats.tx_errors++;
761 if (status & LE_T3_RTY) lp->stats.tx_aborted_errors++;
762 if (status & LE_T3_LCOL) lp->stats.tx_window_errors++;
763
764 if (status & LE_T3_CLOS) {
765 lp->stats.tx_carrier_errors++;
766 if (lp->auto_select) {
767 lp->tpe = 1 - lp->tpe;
768 printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
769 dev->name, lp->tpe?"TPE":"AUI");
770 STOP_LANCE(lp);
771 lp->init_ring(dev);
772 load_csrs(lp);
773 init_restart_lance(lp);
774 goto out;
775 }
776 }
777
778 /* Buffer errors and underflows turn off the
779 * transmitter, restart the adapter.
780 */
781 if (status & (LE_T3_BUF|LE_T3_UFL)) {
782 lp->stats.tx_fifo_errors++;
783
784 printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
785 dev->name);
786 STOP_LANCE(lp);
787 lp->init_ring(dev);
788 load_csrs(lp);
789 init_restart_lance(lp);
790 goto out;
791 }
792 } else if ((bits & LE_T1_POK) == LE_T1_POK) {
793 /*
794 * So we don't count the packet more than once.
795 */
796 sbus_writeb(bits & ~(LE_T1_POK), &td->tmd1_bits);
797
798 /* One collision before packet was sent. */
799 if (bits & LE_T1_EONE)
800 lp->stats.collisions++;
801
802 /* More than one collision, be optimistic. */
803 if (bits & LE_T1_EMORE)
804 lp->stats.collisions += 2;
805
806 lp->stats.tx_packets++;
807 }
808
809 j = TX_NEXT(j);
810 }
811 lp->tx_old = j;
812
813 if (netif_queue_stopped(dev) &&
814 TX_BUFFS_AVAIL > 0)
815 netif_wake_queue(dev);
816 out:
817 spin_unlock(&lp->lock);
818 }
819
820 static void lance_interrupt(int irq, void *dev_id, struct pt_regs *regs)
821 {
822 struct net_device *dev = (struct net_device *)dev_id;
823 struct lance_private *lp = (struct lance_private *)dev->priv;
824 int csr0;
825
826 sbus_writew(LE_CSR0, lp->lregs + RAP);
827 csr0 = sbus_readw(lp->lregs + RDP);
828
829 /* Acknowledge all the interrupt sources ASAP */
830 sbus_writew(csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT),
831 lp->lregs + RDP);
832
833 if ((csr0 & LE_C0_ERR) != 0) {
834 /* Clear the error condition */
835 sbus_writew((LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
836 LE_C0_CERR | LE_C0_MERR),
837 lp->lregs + RDP);
838 }
839
840 if (csr0 & LE_C0_RINT)
841 lp->rx(dev);
842
843 if (csr0 & LE_C0_TINT)
844 lp->tx(dev);
845
846 if (csr0 & LE_C0_BABL)
847 lp->stats.tx_errors++;
848
849 if (csr0 & LE_C0_MISS)
850 lp->stats.rx_errors++;
851
852 if (csr0 & LE_C0_MERR) {
853 if (lp->dregs) {
854 u32 addr = sbus_readl(lp->dregs + DMA_ADDR);
855
856 printk(KERN_ERR "%s: Memory error, status %04x, addr %06x\n",
857 dev->name, csr0, addr & 0xffffff);
858 } else {
859 printk(KERN_ERR "%s: Memory error, status %04x\n",
860 dev->name, csr0);
861 }
862
863 sbus_writew(LE_C0_STOP, lp->lregs + RDP);
864
865 if (lp->dregs) {
866 u32 dma_csr = sbus_readl(lp->dregs + DMA_CSR);
867
868 dma_csr |= DMA_FIFO_INV;
869 sbus_writel(dma_csr, lp->dregs + DMA_CSR);
870 }
871
872 lp->init_ring(dev);
873 load_csrs(lp);
874 init_restart_lance(lp);
875 netif_wake_queue(dev);
876 }
877
878 sbus_writew(LE_C0_INEA, lp->lregs + RDP);
879 }
880
881 /* Build a fake network packet and send it to ourselves. */
882 static void build_fake_packet(struct lance_private *lp)
883 {
884 struct net_device *dev = lp->dev;
885 volatile struct lance_init_block *ib = lp->init_block;
886 u16 *packet;
887 struct ethhdr *eth;
888 int i, entry;
889
890 entry = lp->tx_new & TX_RING_MOD_MASK;
891 packet = (u16 *) &(ib->tx_buf[entry][0]);
892 eth = (struct ethhdr *) packet;
893 if (lp->pio_buffer) {
894 for (i = 0; i < (ETH_ZLEN / sizeof(u16)); i++)
895 sbus_writew(0, &packet[i]);
896 for (i = 0; i < 6; i++) {
897 sbus_writeb(dev->dev_addr[i], ð->h_dest[i]);
898 sbus_writeb(dev->dev_addr[i], ð->h_source[i]);
899 }
900 sbus_writew((-ETH_ZLEN) | 0xf000, &ib->btx_ring[entry].length);
901 sbus_writew(0, &ib->btx_ring[entry].misc);
902 sbus_writeb(LE_T1_POK|LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
903 } else {
904 memset(packet, 0, ETH_ZLEN);
905 for (i = 0; i < 6; i++) {
906 eth->h_dest[i] = dev->dev_addr[i];
907 eth->h_source[i] = dev->dev_addr[i];
908 }
909 ib->btx_ring[entry].length = (-ETH_ZLEN) | 0xf000;
910 ib->btx_ring[entry].misc = 0;
911 ib->btx_ring[entry].tmd1_bits = (LE_T1_POK|LE_T1_OWN);
912 }
913 lp->tx_new = TX_NEXT(entry);
914 }
915
916 struct net_device *last_dev = 0;
917
918 static int lance_open(struct net_device *dev)
919 {
920 struct lance_private *lp = (struct lance_private *)dev->priv;
921 volatile struct lance_init_block *ib = lp->init_block;
922 int status = 0;
923
924 last_dev = dev;
925
926 if (request_irq(dev->irq, &lance_interrupt, SA_SHIRQ,
927 lancestr, (void *) dev)) {
928 printk(KERN_ERR "Lance: Can't get irq %s\n", __irq_itoa(dev->irq));
929 return -EAGAIN;
930 }
931
932 STOP_LANCE(lp);
933
934 /* On the 4m, setup the ledma to provide the upper bits for buffers */
935 if (lp->dregs) {
936 u32 regval = lp->init_block_dvma & 0xff000000;
937
938 sbus_writel(regval, lp->dregs + DMA_TEST);
939 }
940
941 /* Set mode and clear multicast filter only at device open,
942 * so that lance_init_ring() called at any error will not
943 * forget multicast filters.
944 *
945 * BTW it is common bug in all lance drivers! --ANK
946 */
947 if (lp->pio_buffer) {
948 sbus_writew(0, &ib->mode);
949 sbus_writel(0, &ib->filter[0]);
950 sbus_writel(0, &ib->filter[1]);
951 } else {
952 ib->mode = 0;
953 ib->filter [0] = 0;
954 ib->filter [1] = 0;
955 }
956
957 lp->init_ring(dev);
958 load_csrs(lp);
959
960 netif_start_queue(dev);
961
962 status = init_restart_lance(lp);
963 if (!status && lp->auto_select) {
964 build_fake_packet(lp);
965 sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
966 }
967
968 return status;
969 }
970
971 static int lance_close(struct net_device *dev)
972 {
973 struct lance_private *lp = (struct lance_private *) dev->priv;
974
975 netif_stop_queue(dev);
976 del_timer_sync(&lp->multicast_timer);
977
978 STOP_LANCE(lp);
979
980 free_irq(dev->irq, (void *) dev);
981 return 0;
982 }
983
984 static int lance_reset(struct net_device *dev)
985 {
986 struct lance_private *lp = (struct lance_private *) dev->priv;
987 int status;
988
989 STOP_LANCE(lp);
990
991 /* On the 4m, reset the dma too */
992 if (lp->dregs) {
993 u32 csr, addr;
994
995 printk(KERN_ERR "resetting ledma\n");
996 csr = sbus_readl(lp->dregs + DMA_CSR);
997 sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
998 udelay(200);
999 sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
1000
1001 addr = lp->init_block_dvma & 0xff000000;
1002 sbus_writel(addr, lp->dregs + DMA_TEST);
1003 }
1004 lp->init_ring(dev);
1005 load_csrs(lp);
1006 dev->trans_start = jiffies;
1007 status = init_restart_lance(lp);
1008 return status;
1009 }
1010
1011 static void lance_piocopy_from_skb(volatile void *dest, unsigned char *src, int len)
1012 {
1013 unsigned long piobuf = (unsigned long) dest;
1014 u32 *p32;
1015 u16 *p16;
1016 u8 *p8;
1017
1018 switch ((unsigned long)src & 0x3) {
1019 case 0:
1020 p32 = (u32 *) src;
1021 while (len >= 4) {
1022 sbus_writel(*p32, piobuf);
1023 p32++;
1024 piobuf += 4;
1025 len -= 4;
1026 }
1027 src = (char *) p32;
1028 break;
1029 case 1:
1030 case 3:
1031 p8 = (u8 *) src;
1032 while (len >= 4) {
1033 u32 val;
1034
1035 val = p8[0] << 24;
1036 val |= p8[1] << 16;
1037 val |= p8[2] << 8;
1038 val |= p8[3];
1039 sbus_writel(val, piobuf);
1040 p8 += 4;
1041 piobuf += 4;
1042 len -= 4;
1043 }
1044 src = (char *) p8;
1045 break;
1046 case 2:
1047 p16 = (u16 *) src;
1048 while (len >= 4) {
1049 u32 val = p16[0]<<16 | p16[1];
1050 sbus_writel(val, piobuf);
1051 p16 += 2;
1052 piobuf += 4;
1053 len -= 4;
1054 }
1055 src = (char *) p16;
1056 break;
1057 };
1058 if (len >= 2) {
1059 u16 val = src[0] << 8 | src[1];
1060 sbus_writew(val, piobuf);
1061 src += 2;
1062 piobuf += 2;
1063 len -= 2;
1064 }
1065 if (len >= 1)
1066 sbus_writeb(src[0], piobuf);
1067 }
1068
1069 static void lance_piozero(volatile void *dest, int len)
1070 {
1071 unsigned long piobuf = (unsigned long) dest;
1072
1073 if (piobuf & 1) {
1074 sbus_writeb(0, piobuf);
1075 piobuf += 1;
1076 len -= 1;
1077 if (len == 0)
1078 return;
1079 }
1080 if (len == 1) {
1081 sbus_writeb(0, piobuf);
1082 return;
1083 }
1084 if (piobuf & 2) {
1085 sbus_writew(0, piobuf);
1086 piobuf += 2;
1087 len -= 2;
1088 if (len == 0)
1089 return;
1090 }
1091 while (len >= 4) {
1092 sbus_writel(0, piobuf);
1093 piobuf += 4;
1094 len -= 4;
1095 }
1096 if (len >= 2) {
1097 sbus_writew(0, piobuf);
1098 piobuf += 2;
1099 len -= 2;
1100 }
1101 if (len >= 1)
1102 sbus_writeb(0, piobuf);
1103 }
1104
1105 static void lance_tx_timeout(struct net_device *dev)
1106 {
1107 struct lance_private *lp = (struct lance_private *) dev->priv;
1108
1109 printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n",
1110 dev->name, sbus_readw(lp->lregs + RDP));
1111 lance_reset(dev);
1112 netif_wake_queue(dev);
1113 }
1114
1115 static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
1116 {
1117 struct lance_private *lp = (struct lance_private *) dev->priv;
1118 volatile struct lance_init_block *ib = lp->init_block;
1119 int entry, skblen, len;
1120
1121 skblen = skb->len;
1122
1123 len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
1124
1125 spin_lock_irq(&lp->lock);
1126
1127 lp->stats.tx_bytes += len;
1128
1129 entry = lp->tx_new & TX_RING_MOD_MASK;
1130 if (lp->pio_buffer) {
1131 sbus_writew((-len) | 0xf000, &ib->btx_ring[entry].length);
1132 sbus_writew(0, &ib->btx_ring[entry].misc);
1133 lance_piocopy_from_skb(&ib->tx_buf[entry][0], skb->data, skblen);
1134 if (len != skblen)
1135 lance_piozero(&ib->tx_buf[entry][skblen], len - skblen);
1136 sbus_writeb(LE_T1_POK | LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
1137 } else {
1138 ib->btx_ring [entry].length = (-len) | 0xf000;
1139 ib->btx_ring [entry].misc = 0;
1140 memcpy((char *)&ib->tx_buf [entry][0], skb->data, skblen);
1141 if (len != skblen)
1142 memset((char *) &ib->tx_buf [entry][skblen], 0, len - skblen);
1143 ib->btx_ring [entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN);
1144 }
1145
1146 lp->tx_new = TX_NEXT(entry);
1147
1148 if (TX_BUFFS_AVAIL <= 0)
1149 netif_stop_queue(dev);
1150
1151 /* Kick the lance: transmit now */
1152 sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
1153
1154 /* Read back CSR to invalidate the E-Cache.
1155 * This is needed, because DMA_DSBL_WR_INV is set.
1156 */
1157 if (lp->dregs)
1158 sbus_readw(lp->lregs + RDP);
1159
1160 spin_unlock_irq(&lp->lock);
1161
1162 dev->trans_start = jiffies;
1163 dev_kfree_skb(skb);
1164
1165 return 0;
1166 }
1167
1168 static struct net_device_stats *lance_get_stats(struct net_device *dev)
1169 {
1170 struct lance_private *lp = (struct lance_private *) dev->priv;
1171
1172 return &lp->stats;
1173 }
1174
1175 /* taken from the depca driver */
1176 static void lance_load_multicast(struct net_device *dev)
1177 {
1178 struct lance_private *lp = (struct lance_private *) dev->priv;
1179 volatile struct lance_init_block *ib = lp->init_block;
1180 volatile u16 *mcast_table = (u16 *) &ib->filter;
1181 struct dev_mc_list *dmi = dev->mc_list;
1182 char *addrs;
1183 int i, j, bit, byte;
1184 u32 crc, poly = CRC_POLYNOMIAL_LE;
1185
1186 /* set all multicast bits */
1187 if (dev->flags & IFF_ALLMULTI) {
1188 if (lp->pio_buffer) {
1189 sbus_writel(0xffffffff, &ib->filter[0]);
1190 sbus_writel(0xffffffff, &ib->filter[1]);
1191 } else {
1192 ib->filter [0] = 0xffffffff;
1193 ib->filter [1] = 0xffffffff;
1194 }
1195 return;
1196 }
1197 /* clear the multicast filter */
1198 if (lp->pio_buffer) {
1199 sbus_writel(0, &ib->filter[0]);
1200 sbus_writel(0, &ib->filter[1]);
1201 } else {
1202 ib->filter [0] = 0;
1203 ib->filter [1] = 0;
1204 }
1205
1206 /* Add addresses */
1207 for (i = 0; i < dev->mc_count; i++) {
1208 addrs = dmi->dmi_addr;
1209 dmi = dmi->next;
1210
1211 /* multicast address? */
1212 if (!(*addrs & 1))
1213 continue;
1214
1215 crc = 0xffffffff;
1216 for (byte = 0; byte < 6; byte++) {
1217 for (bit = *addrs++, j = 0; j < 8; j++, bit >>= 1) {
1218 int test;
1219
1220 test = ((bit ^ crc) & 0x01);
1221 crc >>= 1;
1222
1223 if (test)
1224 crc = crc ^ poly;
1225 }
1226 }
1227 crc = crc >> 26;
1228 if (lp->pio_buffer) {
1229 u16 tmp = sbus_readw(&mcast_table[crc>>4]);
1230 tmp |= 1 << (crc & 0xf);
1231 sbus_writew(tmp, &mcast_table[crc>>4]);
1232 } else {
1233 mcast_table [crc >> 4] |= 1 << (crc & 0xf);
1234 }
1235 }
1236 }
1237
1238 static void lance_set_multicast(struct net_device *dev)
1239 {
1240 struct lance_private *lp = (struct lance_private *) dev->priv;
1241 volatile struct lance_init_block *ib = lp->init_block;
1242 u16 mode;
1243
1244 if (!netif_running(dev))
1245 return;
1246
1247 if (lp->tx_old != lp->tx_new) {
1248 mod_timer(&lp->multicast_timer, jiffies + 4);
1249 netif_wake_queue(dev);
1250 return;
1251 }
1252
1253 netif_stop_queue(dev);
1254
1255 STOP_LANCE(lp);
1256 lp->init_ring(dev);
1257
1258 if (lp->pio_buffer)
1259 mode = sbus_readw(&ib->mode);
1260 else
1261 mode = ib->mode;
1262 if (dev->flags & IFF_PROMISC) {
1263 mode |= LE_MO_PROM;
1264 if (lp->pio_buffer)
1265 sbus_writew(mode, &ib->mode);
1266 else
1267 ib->mode = mode;
1268 } else {
1269 mode &= ~LE_MO_PROM;
1270 if (lp->pio_buffer)
1271 sbus_writew(mode, &ib->mode);
1272 else
1273 ib->mode = mode;
1274 lance_load_multicast(dev);
1275 }
1276 load_csrs(lp);
1277 init_restart_lance(lp);
1278 netif_wake_queue(dev);
1279 }
1280
1281 static void lance_set_multicast_retry(unsigned long _opaque)
1282 {
1283 struct net_device *dev = (struct net_device *) _opaque;
1284
1285 lance_set_multicast(dev);
1286 }
1287
1288 static void lance_free_hwresources(struct lance_private *lp)
1289 {
1290 if (lp->lregs)
1291 sbus_iounmap(lp->lregs, LANCE_REG_SIZE);
1292 if (lp->init_block != NULL) {
1293 if (lp->pio_buffer) {
1294 sbus_iounmap((unsigned long)lp->init_block,
1295 sizeof(struct lance_init_block));
1296 } else {
1297 sbus_free_consistent(lp->sdev,
1298 sizeof(struct lance_init_block),
1299 (void *)lp->init_block,
1300 lp->init_block_dvma);
1301 }
1302 }
1303 }
1304
1305 static int __init sparc_lance_init(struct net_device *dev,
1306 struct sbus_dev *sdev,
1307 struct sbus_dma *ledma,
1308 struct sbus_dev *lebuffer)
1309 {
1310 static unsigned version_printed;
1311 struct lance_private *lp = NULL;
1312 int i;
1313
1314 if (dev == NULL) {
1315 dev = init_etherdev (0, sizeof (struct lance_private) + 8);
1316 } else {
1317 dev->priv = kmalloc(sizeof (struct lance_private) + 8,
1318 GFP_KERNEL);
1319 if (dev->priv == NULL)
1320 return -ENOMEM;
1321 memset(dev->priv, 0, sizeof (struct lance_private) + 8);
1322 }
1323 if (sparc_lance_debug && version_printed++ == 0)
1324 printk (KERN_INFO "%s", version);
1325
1326 printk(KERN_INFO "%s: LANCE ", dev->name);
1327
1328 /* Make certain the data structures used by the LANCE are aligned. */
1329 dev->priv = (void *)(((unsigned long)dev->priv + 7) & ~7);
1330 lp = (struct lance_private *) dev->priv;
1331 spin_lock_init(&lp->lock);
1332
1333 /* Copy the IDPROM ethernet address to the device structure, later we
1334 * will copy the address in the device structure to the lance
1335 * initialization block.
1336 */
1337 for (i = 0; i < 6; i++)
1338 printk("%2.2x%c", dev->dev_addr[i] = idprom->id_ethaddr[i],
1339 i == 5 ? ' ': ':');
1340 printk("\n");
1341
1342 /* Get the IO region */
1343 lp->lregs = sbus_ioremap(&sdev->resource[0], 0,
1344 LANCE_REG_SIZE, lancestr);
1345 if (lp->lregs == 0UL) {
1346 printk(KERN_ERR "%s: Cannot map SunLance registers.\n",
1347 dev->name);
1348 goto fail;
1349 }
1350
1351 lp->sdev = sdev;
1352 if (lebuffer) {
1353 lp->init_block = (volatile struct lance_init_block *)
1354 sbus_ioremap(&lebuffer->resource[0], 0,
1355 sizeof(struct lance_init_block), "lebuffer");
1356 if (lp->init_block == NULL) {
1357 printk(KERN_ERR "%s: Cannot map SunLance PIO buffer.\n",
1358 dev->name);
1359 goto fail;
1360 }
1361 lp->init_block_dvma = 0;
1362 lp->pio_buffer = 1;
1363 lp->init_ring = lance_init_ring_pio;
1364 lp->rx = lance_rx_pio;
1365 lp->tx = lance_tx_pio;
1366 } else {
1367 lp->init_block = (volatile struct lance_init_block *)
1368 sbus_alloc_consistent(sdev, sizeof(struct lance_init_block),
1369 &lp->init_block_dvma);
1370 if (lp->init_block == NULL ||
1371 lp->init_block_dvma == 0) {
1372 printk(KERN_ERR "%s: Cannot allocate consistent DMA memory.\n",
1373 dev->name);
1374 goto fail;
1375 }
1376 lp->pio_buffer = 0;
1377 lp->init_ring = lance_init_ring_dvma;
1378 lp->rx = lance_rx_dvma;
1379 lp->tx = lance_tx_dvma;
1380 }
1381 lp->busmaster_regval = prom_getintdefault(sdev->prom_node,
1382 "busmaster-regval",
1383 (LE_C3_BSWP | LE_C3_ACON |
1384 LE_C3_BCON));
1385
1386 lp->name = lancestr;
1387 lp->ledma = ledma;
1388
1389 lp->burst_sizes = 0;
1390 if (lp->ledma) {
1391 char prop[6];
1392 unsigned int sbmask;
1393 u32 csr;
1394
1395 /* Find burst-size property for ledma */
1396 lp->burst_sizes = prom_getintdefault(ledma->sdev->prom_node,
1397 "burst-sizes", 0);
1398
1399 /* ledma may be capable of fast bursts, but sbus may not. */
1400 sbmask = prom_getintdefault(ledma->sdev->bus->prom_node,
1401 "burst-sizes", DMA_BURSTBITS);
1402 lp->burst_sizes &= sbmask;
1403
1404 /* Get the cable-selection property */
1405 memset(prop, 0, sizeof(prop));
1406 prom_getstring(ledma->sdev->prom_node, "cable-selection",
1407 prop, sizeof(prop));
1408 if (prop[0] == 0) {
1409 int topnd, nd;
1410
1411 printk(KERN_INFO "%s: using auto-carrier-detection.\n",
1412 dev->name);
1413
1414 /* Is this found at /options .attributes in all
1415 * Prom versions? XXX
1416 */
1417 topnd = prom_getchild(prom_root_node);
1418
1419 nd = prom_searchsiblings(topnd, "options");
1420 if (!nd)
1421 goto no_link_test;
1422
1423 if (!prom_node_has_property(nd, "tpe-link-test?"))
1424 goto no_link_test;
1425
1426 memset(prop, 0, sizeof(prop));
1427 prom_getstring(nd, "tpe-link-test?", prop,
1428 sizeof(prop));
1429
1430 if (strcmp(prop, "true")) {
1431 printk(KERN_NOTICE "%s: warning: overriding option "
1432 "'tpe-link-test?'\n", dev->name);
1433 printk(KERN_NOTICE "%s: warning: mail any problems "
1434 "to ecd@skynet.be\n", dev->name);
1435 set_auxio(AUXIO_LINK_TEST, 0);
1436 }
1437 no_link_test:
1438 lp->auto_select = 1;
1439 lp->tpe = 0;
1440 } else if (!strcmp(prop, "aui")) {
1441 lp->auto_select = 0;
1442 lp->tpe = 0;
1443 } else {
1444 lp->auto_select = 0;
1445 lp->tpe = 1;
1446 }
1447
1448 lp->dregs = ledma->regs;
1449
1450 /* Reset ledma */
1451 csr = sbus_readl(lp->dregs + DMA_CSR);
1452 sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
1453 udelay(200);
1454 sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
1455 } else
1456 lp->dregs = 0;
1457
1458 /* This should never happen. */
1459 if ((unsigned long)(lp->init_block->brx_ring) & 0x07) {
1460 printk(KERN_ERR "%s: ERROR: Rx and Tx rings not on even boundary.\n",
1461 dev->name);
1462 goto fail;
1463 }
1464
1465 lp->dev = dev;
1466 SET_MODULE_OWNER(dev);
1467 dev->open = &lance_open;
1468 dev->stop = &lance_close;
1469 dev->hard_start_xmit = &lance_start_xmit;
1470 dev->tx_timeout = &lance_tx_timeout;
1471 dev->watchdog_timeo = 5*HZ;
1472 dev->get_stats = &lance_get_stats;
1473 dev->set_multicast_list = &lance_set_multicast;
1474
1475 dev->irq = sdev->irqs[0];
1476
1477 dev->dma = 0;
1478 ether_setup(dev);
1479
1480 /* We cannot sleep if the chip is busy during a
1481 * multicast list update event, because such events
1482 * can occur from interrupts (ex. IPv6). So we
1483 * use a timer to try again later when necessary. -DaveM
1484 */
1485 init_timer(&lp->multicast_timer);
1486 lp->multicast_timer.data = (unsigned long) dev;
1487 lp->multicast_timer.function = &lance_set_multicast_retry;
1488
1489 dev->ifindex = dev_new_index();
1490 lp->next_module = root_lance_dev;
1491 root_lance_dev = lp;
1492
1493 return 0;
1494
1495 fail:
1496 if (lp != NULL)
1497 lance_free_hwresources(lp);
1498 return -ENODEV;
1499 }
1500
1501 /* On 4m, find the associated dma for the lance chip */
1502 static inline struct sbus_dma *find_ledma(struct sbus_dev *sdev)
1503 {
1504 struct sbus_dma *p;
1505
1506 for_each_dvma(p) {
1507 if (p->sdev == sdev)
1508 return p;
1509 }
1510 return NULL;
1511 }
1512
1513 #ifdef CONFIG_SUN4
1514
1515 #include <asm/sun4paddr.h>
1516
1517 /* Find all the lance cards on the system and initialize them */
1518 static int __init sparc_lance_probe(void)
1519 {
1520 static struct sbus_dev sdev;
1521 static int called;
1522
1523 root_lance_dev = NULL;
1524
1525 if (called)
1526 return -ENODEV;
1527 called++;
1528
1529 if ((idprom->id_machtype == (SM_SUN4|SM_4_330)) ||
1530 (idprom->id_machtype == (SM_SUN4|SM_4_470))) {
1531 memset(&sdev, 0, sizeof(sdev));
1532 sdev.reg_addrs[0].phys_addr = sun4_eth_physaddr;
1533 sdev.irqs[0] = 6;
1534 return sparc_lance_init(NULL, &sdev, 0, 0);
1535 }
1536 return -ENODEV;
1537 }
1538
1539 #else /* !CONFIG_SUN4 */
1540
1541 /* Find all the lance cards on the system and initialize them */
1542 static int __init sparc_lance_probe(void)
1543 {
1544 struct sbus_bus *bus;
1545 struct sbus_dev *sdev = 0;
1546 struct net_device *dev = NULL;
1547 struct sbus_dma *ledma = 0;
1548 static int called;
1549 int cards = 0, v;
1550
1551 root_lance_dev = NULL;
1552
1553 if (called)
1554 return -ENODEV;
1555 called++;
1556
1557 for_each_sbus (bus) {
1558 for_each_sbusdev (sdev, bus) {
1559 if (cards)
1560 dev = NULL;
1561 if (strcmp(sdev->prom_name, "le") == 0) {
1562 cards++;
1563 if ((v = sparc_lance_init(dev, sdev, 0, 0)))
1564 return v;
1565 continue;
1566 }
1567 if (strcmp(sdev->prom_name, "ledma") == 0) {
1568 cards++;
1569 ledma = find_ledma(sdev);
1570 if ((v = sparc_lance_init(dev, sdev->child,
1571 ledma, 0)))
1572 return v;
1573 continue;
1574 }
1575 if (strcmp(sdev->prom_name, "lebuffer") == 0){
1576 cards++;
1577 if ((v = sparc_lance_init(dev, sdev->child,
1578 0, sdev)))
1579 return v;
1580 continue;
1581 }
1582 } /* for each sbusdev */
1583 } /* for each sbus */
1584 if (!cards)
1585 return -ENODEV;
1586 return 0;
1587 }
1588 #endif /* !CONFIG_SUN4 */
1589
1590 static void __exit sparc_lance_cleanup(void)
1591 {
1592 struct lance_private *lp;
1593
1594 while (root_lance_dev) {
1595 lp = root_lance_dev->next_module;
1596
1597 unregister_netdev(root_lance_dev->dev);
1598 lance_free_hwresources(root_lance_dev);
1599 kfree(root_lance_dev->dev);
1600 root_lance_dev = lp;
1601 }
1602 }
1603
1604 module_init(sparc_lance_probe);
1605 module_exit(sparc_lance_cleanup);
1606