File: /usr/src/linux/drivers/net/tokenring/madgemc.c
1 /*
2 * madgemc.c: Driver for the Madge Smart 16/4 MC16 MCA token ring card.
3 *
4 * Written 2000 by Adam Fritzler
5 *
6 * This software may be used and distributed according to the terms
7 * of the GNU General Public License, incorporated herein by reference.
8 *
9 * This driver module supports the following cards:
10 * - Madge Smart 16/4 Ringnode MC16
11 * - Madge Smart 16/4 Ringnode MC32 (??)
12 *
13 * Maintainer(s):
14 * AF Adam Fritzler mid@auk.cx
15 *
16 * Modification History:
17 * 16-Jan-00 AF Created
18 *
19 */
20 static const char version[] = "madgemc.c: v0.91 23/01/2000 by Adam Fritzler\n";
21
22 #include <linux/module.h>
23 #include <linux/mca.h>
24 #include <linux/kernel.h>
25 #include <linux/sched.h>
26 #include <linux/errno.h>
27 #include <linux/pci.h>
28 #include <linux/init.h>
29
30 #include <asm/system.h>
31 #include <asm/io.h>
32 #include <asm/irq.h>
33
34 #include <linux/netdevice.h>
35 #include <linux/trdevice.h>
36 #include "tms380tr.h"
37 #include "madgemc.h" /* Madge-specific constants */
38
39 #define MADGEMC_IO_EXTENT 32
40 #define MADGEMC_SIF_OFFSET 0x08
41
42 struct madgemc_card {
43 struct net_device *dev;
44
45 /*
46 * These are read from the BIA ROM.
47 */
48 unsigned int manid;
49 unsigned int cardtype;
50 unsigned int cardrev;
51 unsigned int ramsize;
52
53 /*
54 * These are read from the MCA POS registers.
55 */
56 unsigned int burstmode:2;
57 unsigned int fairness:1; /* 0 = Fair, 1 = Unfair */
58 unsigned int arblevel:4;
59 unsigned int ringspeed:2; /* 0 = 4mb, 1 = 16, 2 = Auto/none */
60 unsigned int cabletype:1; /* 0 = RJ45, 1 = DB9 */
61
62 struct madgemc_card *next;
63 };
64 static struct madgemc_card *madgemc_card_list;
65
66
67 int madgemc_probe(void);
68 static int madgemc_open(struct net_device *dev);
69 static int madgemc_close(struct net_device *dev);
70 static int madgemc_chipset_init(struct net_device *dev);
71 static void madgemc_read_rom(struct madgemc_card *card);
72 static unsigned short madgemc_setnselout_pins(struct net_device *dev);
73 static void madgemc_setcabletype(struct net_device *dev, int type);
74
75 static int madgemc_mcaproc(char *buf, int slot, void *d);
76
77 static void madgemc_setregpage(struct net_device *dev, int page);
78 static void madgemc_setsifsel(struct net_device *dev, int val);
79 static void madgemc_setint(struct net_device *dev, int val);
80
81 static void madgemc_interrupt(int irq, void *dev_id, struct pt_regs *regs);
82
83 /*
84 * These work around paging, however they dont guarentee you're on the
85 * right page.
86 */
87 #define SIFREADB(reg) (inb(dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
88 #define SIFWRITEB(val, reg) (outb(val, dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
89 #define SIFREADW(reg) (inw(dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
90 #define SIFWRITEW(val, reg) (outw(val, dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
91
92 /*
93 * Read a byte-length value from the register.
94 */
95 static unsigned short madgemc_sifreadb(struct net_device *dev, unsigned short reg)
96 {
97 unsigned short ret;
98 if (reg<0x8)
99 ret = SIFREADB(reg);
100 else {
101 madgemc_setregpage(dev, 1);
102 ret = SIFREADB(reg);
103 madgemc_setregpage(dev, 0);
104 }
105 return ret;
106 }
107
108 /*
109 * Write a byte-length value to a register.
110 */
111 static void madgemc_sifwriteb(struct net_device *dev, unsigned short val, unsigned short reg)
112 {
113 if (reg<0x8)
114 SIFWRITEB(val, reg);
115 else {
116 madgemc_setregpage(dev, 1);
117 SIFWRITEB(val, reg);
118 madgemc_setregpage(dev, 0);
119 }
120 return;
121 }
122
123 /*
124 * Read a word-length value from a register
125 */
126 static unsigned short madgemc_sifreadw(struct net_device *dev, unsigned short reg)
127 {
128 unsigned short ret;
129 if (reg<0x8)
130 ret = SIFREADW(reg);
131 else {
132 madgemc_setregpage(dev, 1);
133 ret = SIFREADW(reg);
134 madgemc_setregpage(dev, 0);
135 }
136 return ret;
137 }
138
139 /*
140 * Write a word-length value to a register.
141 */
142 static void madgemc_sifwritew(struct net_device *dev, unsigned short val, unsigned short reg)
143 {
144 if (reg<0x8)
145 SIFWRITEW(val, reg);
146 else {
147 madgemc_setregpage(dev, 1);
148 SIFWRITEW(val, reg);
149 madgemc_setregpage(dev, 0);
150 }
151 return;
152 }
153
154
155
156 int __init madgemc_probe(void)
157 {
158 static int versionprinted;
159 struct net_device *dev;
160 struct net_local *tp;
161 struct madgemc_card *card;
162 int i,slot = 0;
163 __u8 posreg[4];
164
165 if (!MCA_bus)
166 return -1;
167
168 while (slot != MCA_NOTFOUND) {
169 /*
170 * Currently we only support the MC16/32 (MCA ID 002d)
171 */
172 slot = mca_find_unused_adapter(0x002d, slot);
173 if (slot == MCA_NOTFOUND)
174 break;
175
176 /*
177 * If we get here, we have an adapter.
178 */
179 if (versionprinted++ == 0)
180 printk("%s", version);
181
182 if ((dev = init_trdev(NULL, 0))==NULL) {
183 printk("madgemc: unable to allocate dev space\n");
184 return -1;
185 }
186 dev->dma = 0;
187
188 /*
189 * Fetch MCA config registers
190 */
191 for(i=0;i<4;i++)
192 posreg[i] = mca_read_stored_pos(slot, i+2);
193
194 card = kmalloc(sizeof(struct madgemc_card), GFP_KERNEL);
195 if (card==NULL) {
196 printk("madgemc: unable to allocate card struct\n");
197 return -1;
198 }
199 card->dev = dev;
200
201 /*
202 * Parse configuration information. This all comes
203 * directly from the publicly available @002d.ADF.
204 * Get it from Madge or your local ADF library.
205 */
206
207 /*
208 * Base address
209 */
210 dev->base_addr = 0x0a20 +
211 ((posreg[2] & MC16_POS2_ADDR2)?0x0400:0) +
212 ((posreg[0] & MC16_POS0_ADDR1)?0x1000:0) +
213 ((posreg[3] & MC16_POS3_ADDR3)?0x2000:0);
214
215 /*
216 * Interrupt line
217 */
218 switch(posreg[0] >> 6) { /* upper two bits */
219 case 0x1: dev->irq = 3; break;
220 case 0x2: dev->irq = 9; break; /* IRQ 2 = IRQ 9 */
221 case 0x3: dev->irq = 10; break;
222 default: dev->irq = 0; break;
223 }
224
225 if (dev->irq == 0) {
226 printk("%s: invalid IRQ\n", dev->name);
227 goto getout;
228 }
229
230 request_region(dev->base_addr, MADGEMC_IO_EXTENT, "madgemc");
231 #if 0
232 /* why is this not working? */
233 if (request_region(dev->base_addr, MADGEMC_IO_EXTENT,
234 "madgemc")) {
235 printk(KERN_INFO "madgemc: unable to setup Smart MC in slot %d because of I/O base conflict at 0x%04lx\n", slot, dev->base_addr);
236 dev->base_addr += MADGEMC_SIF_OFFSET;
237 goto getout;
238 }
239 #endif
240 dev->base_addr += MADGEMC_SIF_OFFSET;
241
242 /*
243 * Arbitration Level
244 */
245 card->arblevel = ((posreg[0] >> 1) & 0x7) + 8;
246
247 /*
248 * Burst mode and Fairness
249 */
250 card->burstmode = ((posreg[2] >> 6) & 0x3);
251 card->fairness = ((posreg[2] >> 4) & 0x1);
252
253 /*
254 * Ring Speed
255 */
256 if ((posreg[1] >> 2)&0x1)
257 card->ringspeed = 2; /* not selected */
258 else if ((posreg[2] >> 5) & 0x1)
259 card->ringspeed = 1; /* 16Mb */
260 else
261 card->ringspeed = 0; /* 4Mb */
262
263 /*
264 * Cable type
265 */
266 if ((posreg[1] >> 6)&0x1)
267 card->cabletype = 1; /* STP/DB9 */
268 else
269 card->cabletype = 0; /* UTP/RJ-45 */
270
271
272 /*
273 * ROM Info. This requires us to actually twiddle
274 * bits on the card, so we must ensure above that
275 * the base address is free of conflict (request_region above).
276 */
277 madgemc_read_rom(card);
278
279 if (card->manid != 0x4d) { /* something went wrong */
280 printk(KERN_INFO "%s: Madge MC ROM read failed (unknown manufacturer ID %02x)\n", dev->name, card->manid);
281 goto getout;
282 }
283
284 if ((card->cardtype != 0x08) && (card->cardtype != 0x0d)) {
285 printk(KERN_INFO "%s: Madge MC ROM read failed (unknown card ID %02x)\n", dev->name, card->cardtype);
286 goto getout;
287 }
288
289 /* All cards except Rev 0 and 1 MC16's have 256kb of RAM */
290 if ((card->cardtype == 0x08) && (card->cardrev <= 0x01))
291 card->ramsize = 128;
292 else
293 card->ramsize = 256;
294
295 printk("%s: %s Rev %d at 0x%04lx IRQ %d\n",
296 dev->name,
297 (card->cardtype == 0x08)?MADGEMC16_CARDNAME:
298 MADGEMC32_CARDNAME, card->cardrev,
299 dev->base_addr, dev->irq);
300
301 if (card->cardtype == 0x0d)
302 printk("%s: Warning: MC32 support is experimental and highly untested\n", dev->name);
303
304 if (card->ringspeed==2) { /* Unknown */
305 printk("%s: Warning: Ring speed not set in POS -- Please run the reference disk and set it!\n", dev->name);
306 card->ringspeed = 1; /* default to 16mb */
307 }
308
309 printk("%s: RAM Size: %dKB\n", dev->name, card->ramsize);
310
311 printk("%s: Ring Speed: %dMb/sec on %s\n", dev->name,
312 (card->ringspeed)?16:4,
313 card->cabletype?"STP/DB9":"UTP/RJ-45");
314 printk("%s: Arbitration Level: %d\n", dev->name,
315 card->arblevel);
316
317 printk("%s: Burst Mode: ", dev->name);
318 switch(card->burstmode) {
319 case 0: printk("Cycle steal"); break;
320 case 1: printk("Limited burst"); break;
321 case 2: printk("Delayed release"); break;
322 case 3: printk("Immediate release"); break;
323 }
324 printk(" (%s)\n", (card->fairness)?"Unfair":"Fair");
325
326
327 /*
328 * Enable SIF before we assign the interrupt handler,
329 * just in case we get spurious interrupts that need
330 * handling.
331 */
332 outb(0, dev->base_addr + MC_CONTROL_REG0); /* sanity */
333 madgemc_setsifsel(dev, 1);
334 if(request_irq(dev->irq, madgemc_interrupt, SA_SHIRQ,
335 "madgemc", dev))
336 goto getout;
337
338 madgemc_chipset_init(dev); /* enables interrupts! */
339 madgemc_setcabletype(dev, card->cabletype);
340
341 /* Setup MCA structures */
342 mca_set_adapter_name(slot, (card->cardtype == 0x08)?MADGEMC16_CARDNAME:MADGEMC32_CARDNAME);
343 mca_set_adapter_procfn(slot, madgemc_mcaproc, dev);
344 mca_mark_as_used(slot);
345
346 printk("%s: Ring Station Address: ", dev->name);
347 printk("%2.2x", dev->dev_addr[0]);
348 for (i = 1; i < 6; i++)
349 printk(":%2.2x", dev->dev_addr[i]);
350 printk("\n");
351
352 /* XXX is ISA_MAX_ADDRESS correct here? */
353 if (tmsdev_init(dev, ISA_MAX_ADDRESS, NULL)) {
354 printk("%s: unable to get memory for dev->priv.\n",
355 dev->name);
356 return -1;
357 }
358 tp = (struct net_local *)dev->priv;
359
360 /*
361 * The MC16 is physically a 32bit card. However, Madge
362 * insists on calling it 16bit, so I'll assume here that
363 * they know what they're talking about. Cut off DMA
364 * at 16mb.
365 */
366 tp->setnselout = madgemc_setnselout_pins;
367 tp->sifwriteb = madgemc_sifwriteb;
368 tp->sifreadb = madgemc_sifreadb;
369 tp->sifwritew = madgemc_sifwritew;
370 tp->sifreadw = madgemc_sifreadw;
371 tp->DataRate = (card->ringspeed)?SPEED_16:SPEED_4;
372
373 memcpy(tp->ProductID, "Madge MCA 16/4 ", PROD_ID_SIZE + 1);
374
375 dev->open = madgemc_open;
376 dev->stop = madgemc_close;
377
378 if (register_trdev(dev) == 0) {
379 /* Enlist in the card list */
380 card->next = madgemc_card_list;
381 madgemc_card_list = card;
382 } else {
383 printk("madgemc: register_trdev() returned non-zero.\n");
384
385 kfree(card);
386 tmsdev_term(dev);
387 kfree(dev);
388 return -1;
389 }
390
391 slot++;
392 continue; /* successful, try to find another */
393
394 getout:
395 release_region(dev->base_addr-MADGEMC_SIF_OFFSET,
396 MADGEMC_IO_EXTENT);
397 kfree(card);
398 kfree(dev); /* release_trdev? */
399 slot++;
400 }
401
402 if (madgemc_card_list)
403 return 0;
404 return -1;
405 }
406
407 /*
408 * Handle interrupts generated by the card
409 *
410 * The MicroChannel Madge cards need slightly more handling
411 * after an interrupt than other TMS380 cards do.
412 *
413 * First we must make sure it was this card that generated the
414 * interrupt (since interrupt sharing is allowed). Then,
415 * because we're using level-triggered interrupts (as is
416 * standard on MCA), we must toggle the interrupt line
417 * on the card in order to claim and acknowledge the interrupt.
418 * Once that is done, the interrupt should be handlable in
419 * the normal tms380tr_interrupt() routine.
420 *
421 * There's two ways we can check to see if the interrupt is ours,
422 * both with their own disadvantages...
423 *
424 * 1) Read in the SIFSTS register from the TMS controller. This
425 * is guarenteed to be accurate, however, there's a fairly
426 * large performance penalty for doing so: the Madge chips
427 * must request the register from the Eagle, the Eagle must
428 * read them from its internal bus, and then take the route
429 * back out again, for a 16bit read.
430 *
431 * 2) Use the MC_CONTROL_REG0_SINTR bit from the Madge ASICs.
432 * The major disadvantage here is that the accuracy of the
433 * bit is in question. However, it cuts out the extra read
434 * cycles it takes to read the Eagle's SIF, as its only an
435 * 8bit read, and theoretically the Madge bit is directly
436 * connected to the interrupt latch coming out of the Eagle
437 * hardware (that statement is not verified).
438 *
439 * I can't determine which of these methods has the best win. For now,
440 * we make a compromise. Use the Madge way for the first interrupt,
441 * which should be the fast-path, and then once we hit the first
442 * interrupt, keep on trying using the SIF method until we've
443 * exhausted all contiguous interrupts.
444 *
445 */
446 static void madgemc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
447 {
448 int pending,reg1;
449 struct net_device *dev;
450
451 if (!dev_id) {
452 printk("madgemc_interrupt: was not passed a dev_id!\n");
453 return;
454 }
455
456 dev = (struct net_device *)dev_id;
457
458 /* Make sure its really us. -- the Madge way */
459 pending = inb(dev->base_addr + MC_CONTROL_REG0);
460 if (!(pending & MC_CONTROL_REG0_SINTR))
461 return; /* not our interrupt */
462
463 /*
464 * Since we're level-triggered, we may miss the rising edge
465 * of the next interrupt while we're off handling this one,
466 * so keep checking until the SIF verifies that it has nothing
467 * left for us to do.
468 */
469 pending = STS_SYSTEM_IRQ;
470 do {
471 if (pending & STS_SYSTEM_IRQ) {
472
473 /* Toggle the interrupt to reset the latch on card */
474 reg1 = inb(dev->base_addr + MC_CONTROL_REG1);
475 outb(reg1 ^ MC_CONTROL_REG1_SINTEN,
476 dev->base_addr + MC_CONTROL_REG1);
477 outb(reg1, dev->base_addr + MC_CONTROL_REG1);
478
479 /* Continue handling as normal */
480 tms380tr_interrupt(irq, dev_id, regs);
481
482 pending = SIFREADW(SIFSTS); /* restart - the SIF way */
483
484 } else
485 return;
486 } while (1);
487
488 return; /* not reachable */
489 }
490
491 /*
492 * Set the card to the prefered ring speed.
493 *
494 * Unlike newer cards, the MC16/32 have their speed selection
495 * circuit connected to the Madge ASICs and not to the TMS380
496 * NSELOUT pins. Set the ASIC bits correctly here, and return
497 * zero to leave the TMS NSELOUT bits unaffected.
498 *
499 */
500 unsigned short madgemc_setnselout_pins(struct net_device *dev)
501 {
502 unsigned char reg1;
503 struct net_local *tp = (struct net_local *)dev->priv;
504
505 reg1 = inb(dev->base_addr + MC_CONTROL_REG1);
506
507 if(tp->DataRate == SPEED_16)
508 reg1 |= MC_CONTROL_REG1_SPEED_SEL; /* add for 16mb */
509 else if (reg1 & MC_CONTROL_REG1_SPEED_SEL)
510 reg1 ^= MC_CONTROL_REG1_SPEED_SEL; /* remove for 4mb */
511 outb(reg1, dev->base_addr + MC_CONTROL_REG1);
512
513 return 0; /* no change */
514 }
515
516 /*
517 * Set the register page. This equates to the SRSX line
518 * on the TMS380Cx6.
519 *
520 * Register selection is normally done via three contiguous
521 * bits. However, some boards (such as the MC16/32) use only
522 * two bits, plus a seperate bit in the glue chip. This
523 * sets the SRSX bit (the top bit). See page 4-17 in the
524 * Yellow Book for which registers are affected.
525 *
526 */
527 static void madgemc_setregpage(struct net_device *dev, int page)
528 {
529 static int reg1;
530
531 reg1 = inb(dev->base_addr + MC_CONTROL_REG1);
532 if ((page == 0) && (reg1 & MC_CONTROL_REG1_SRSX)) {
533 outb(reg1 ^ MC_CONTROL_REG1_SRSX,
534 dev->base_addr + MC_CONTROL_REG1);
535 }
536 else if (page == 1) {
537 outb(reg1 | MC_CONTROL_REG1_SRSX,
538 dev->base_addr + MC_CONTROL_REG1);
539 }
540 reg1 = inb(dev->base_addr + MC_CONTROL_REG1);
541
542 return;
543 }
544
545 /*
546 * The SIF registers are not mapped into register space by default
547 * Set this to 1 to map them, 0 to map the BIA ROM.
548 *
549 */
550 static void madgemc_setsifsel(struct net_device *dev, int val)
551 {
552 unsigned int reg0;
553
554 reg0 = inb(dev->base_addr + MC_CONTROL_REG0);
555 if ((val == 0) && (reg0 & MC_CONTROL_REG0_SIFSEL)) {
556 outb(reg0 ^ MC_CONTROL_REG0_SIFSEL,
557 dev->base_addr + MC_CONTROL_REG0);
558 } else if (val == 1) {
559 outb(reg0 | MC_CONTROL_REG0_SIFSEL,
560 dev->base_addr + MC_CONTROL_REG0);
561 }
562 reg0 = inb(dev->base_addr + MC_CONTROL_REG0);
563
564 return;
565 }
566
567 /*
568 * Enable SIF interrupts
569 *
570 * This does not enable interrupts in the SIF, but rather
571 * enables SIF interrupts to be passed onto the host.
572 *
573 */
574 static void madgemc_setint(struct net_device *dev, int val)
575 {
576 unsigned int reg1;
577
578 reg1 = inb(dev->base_addr + MC_CONTROL_REG1);
579 if ((val == 0) && (reg1 & MC_CONTROL_REG1_SINTEN)) {
580 outb(reg1 ^ MC_CONTROL_REG1_SINTEN,
581 dev->base_addr + MC_CONTROL_REG1);
582 } else if (val == 1) {
583 outb(reg1 | MC_CONTROL_REG1_SINTEN,
584 dev->base_addr + MC_CONTROL_REG1);
585 }
586
587 return;
588 }
589
590 /*
591 * Cable type is set via control register 7. Bit zero high
592 * for UTP, low for STP.
593 */
594 static void madgemc_setcabletype(struct net_device *dev, int type)
595 {
596 outb((type==0)?MC_CONTROL_REG7_CABLEUTP:MC_CONTROL_REG7_CABLESTP,
597 dev->base_addr + MC_CONTROL_REG7);
598 }
599
600 /*
601 * Enable the functions of the Madge chipset needed for
602 * full working order.
603 */
604 static int madgemc_chipset_init(struct net_device *dev)
605 {
606 outb(0, dev->base_addr + MC_CONTROL_REG1); /* pull SRESET low */
607 tms380tr_wait(100); /* wait for card to reset */
608
609 /* bring back into normal operating mode */
610 outb(MC_CONTROL_REG1_NSRESET, dev->base_addr + MC_CONTROL_REG1);
611
612 /* map SIF registers */
613 madgemc_setsifsel(dev, 1);
614
615 /* enable SIF interrupts */
616 madgemc_setint(dev, 1);
617
618 return 0;
619 }
620
621 /*
622 * Disable the board, and put back into power-up state.
623 */
624 void madgemc_chipset_close(struct net_device *dev)
625 {
626 /* disable interrupts */
627 madgemc_setint(dev, 0);
628 /* unmap SIF registers */
629 madgemc_setsifsel(dev, 0);
630
631 return;
632 }
633
634 /*
635 * Read the card type (MC16 or MC32) from the card.
636 *
637 * The configuration registers are stored in two seperate
638 * pages. Pages are flipped by clearing bit 3 of CONTROL_REG0 (PAGE)
639 * for page zero, or setting bit 3 for page one.
640 *
641 * Page zero contains the following data:
642 * Byte 0: Manufacturer ID (0x4D -- ASCII "M")
643 * Byte 1: Card type:
644 * 0x08 for MC16
645 * 0x0D for MC32
646 * Byte 2: Card revision
647 * Byte 3: Mirror of POS config register 0
648 * Byte 4: Mirror of POS 1
649 * Byte 5: Mirror of POS 2
650 *
651 * Page one contains the following data:
652 * Byte 0: Unused
653 * Byte 1-6: BIA, MSB to LSB.
654 *
655 * Note that to read the BIA, we must unmap the SIF registers
656 * by clearing bit 2 of CONTROL_REG0 (SIFSEL), as the data
657 * will reside in the same logical location. For this reason,
658 * _never_ read the BIA while the Eagle processor is running!
659 * The SIF will be completely inaccessible until the BIA operation
660 * is complete.
661 *
662 */
663 static void madgemc_read_rom(struct madgemc_card *card)
664 {
665 unsigned long ioaddr;
666 unsigned char reg0, reg1, tmpreg0, i;
667
668 ioaddr = card->dev->base_addr;
669
670 reg0 = inb(ioaddr + MC_CONTROL_REG0);
671 reg1 = inb(ioaddr + MC_CONTROL_REG1);
672
673 /* Switch to page zero and unmap SIF */
674 tmpreg0 = reg0 & ~(MC_CONTROL_REG0_PAGE + MC_CONTROL_REG0_SIFSEL);
675 outb(tmpreg0, ioaddr + MC_CONTROL_REG0);
676
677 card->manid = inb(ioaddr + MC_ROM_MANUFACTURERID);
678 card->cardtype = inb(ioaddr + MC_ROM_ADAPTERID);
679 card->cardrev = inb(ioaddr + MC_ROM_REVISION);
680
681 /* Switch to rom page one */
682 outb(tmpreg0 | MC_CONTROL_REG0_PAGE, ioaddr + MC_CONTROL_REG0);
683
684 /* Read BIA */
685 card->dev->addr_len = 6;
686 for (i = 0; i < 6; i++)
687 card->dev->dev_addr[i] = inb(ioaddr + MC_ROM_BIA_START + i);
688
689 /* Restore original register values */
690 outb(reg0, ioaddr + MC_CONTROL_REG0);
691 outb(reg1, ioaddr + MC_CONTROL_REG1);
692
693 return;
694 }
695
696 static int madgemc_open(struct net_device *dev)
697 {
698 /*
699 * Go ahead and reinitialize the chipset again, just to
700 * make sure we didn't get left in a bad state.
701 */
702 madgemc_chipset_init(dev);
703 tms380tr_open(dev);
704 MOD_INC_USE_COUNT;
705 return 0;
706 }
707
708 static int madgemc_close(struct net_device *dev)
709 {
710 tms380tr_close(dev);
711 madgemc_chipset_close(dev);
712 MOD_DEC_USE_COUNT;
713 return 0;
714 }
715
716 /*
717 * Give some details available from /proc/mca/slotX
718 */
719 static int madgemc_mcaproc(char *buf, int slot, void *d)
720 {
721 struct net_device *dev = (struct net_device *)d;
722 struct madgemc_card *curcard = madgemc_card_list;
723 int len = 0;
724
725 while (curcard) { /* search for card struct */
726 if (curcard->dev == dev)
727 break;
728 curcard = curcard->next;
729 }
730 len += sprintf(buf+len, "-------\n");
731 if (curcard) {
732 struct net_local *tp = (struct net_local *)dev->priv;
733 int i;
734
735 len += sprintf(buf+len, "Card Revision: %d\n", curcard->cardrev);
736 len += sprintf(buf+len, "RAM Size: %dkb\n", curcard->ramsize);
737 len += sprintf(buf+len, "Cable type: %s\n", (curcard->cabletype)?"STP/DB9":"UTP/RJ-45");
738 len += sprintf(buf+len, "Configured ring speed: %dMb/sec\n", (curcard->ringspeed)?16:4);
739 len += sprintf(buf+len, "Running ring speed: %dMb/sec\n", (tp->DataRate==SPEED_16)?16:4);
740 len += sprintf(buf+len, "Device: %s\n", dev->name);
741 len += sprintf(buf+len, "IO Port: 0x%04lx\n", dev->base_addr);
742 len += sprintf(buf+len, "IRQ: %d\n", dev->irq);
743 len += sprintf(buf+len, "Arbitration Level: %d\n", curcard->arblevel);
744 len += sprintf(buf+len, "Burst Mode: ");
745 switch(curcard->burstmode) {
746 case 0: len += sprintf(buf+len, "Cycle steal"); break;
747 case 1: len += sprintf(buf+len, "Limited burst"); break;
748 case 2: len += sprintf(buf+len, "Delayed release"); break;
749 case 3: len += sprintf(buf+len, "Immediate release"); break;
750 }
751 len += sprintf(buf+len, " (%s)\n", (curcard->fairness)?"Unfair":"Fair");
752
753 len += sprintf(buf+len, "Ring Station Address: ");
754 len += sprintf(buf+len, "%2.2x", dev->dev_addr[0]);
755 for (i = 1; i < 6; i++)
756 len += sprintf(buf+len, " %2.2x", dev->dev_addr[i]);
757 len += sprintf(buf+len, "\n");
758 } else
759 len += sprintf(buf+len, "Card not configured\n");
760
761 return len;
762 }
763
764 #ifdef MODULE
765
766 int init_module(void)
767 {
768 /* Probe for cards. */
769 if (madgemc_probe()) {
770 printk(KERN_NOTICE "madgemc.c: No cards found.\n");
771 }
772 /* lock_tms380_module(); */
773 return (0);
774 }
775
776 void cleanup_module(void)
777 {
778 struct net_device *dev;
779 struct madgemc_card *this_card;
780
781 while (madgemc_card_list) {
782 dev = madgemc_card_list->dev;
783 unregister_trdev(dev);
784 release_region(dev->base_addr-MADGEMC_SIF_OFFSET, MADGEMC_IO_EXTENT);
785 free_irq(dev->irq, dev);
786 tmsdev_term(dev);
787 kfree(dev);
788 this_card = madgemc_card_list;
789 madgemc_card_list = this_card->next;
790 kfree(this_card);
791 }
792 /* unlock_tms380_module(); */
793 }
794 #endif /* MODULE */
795
796 MODULE_LICENSE("GPL");
797
798
799 /*
800 * Local variables:
801 * compile-command: "gcc -DMODVERSIONS -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer -I/usr/src/linux/drivers/net/tokenring/ -c madgemc.c"
802 * alt-compile-command: "gcc -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer -I/usr/src/linux/drivers/net/tokenring/ -c madgemc.c"
803 * c-set-style "K&R"
804 * c-indent-level: 8
805 * c-basic-offset: 8
806 * tab-width: 8
807 * End:
808 */
809
810