File: /usr/src/linux/drivers/net/tokenring/olympic.h
1 /*
2 * olympic.h (c) 1999 Peter De Schrijver All Rights Reserved
3 * 1999,2000 Mike Phillips (mikep@linuxtr.net)
4 *
5 * Linux driver for IBM PCI tokenring cards based on the olympic and the PIT/PHY chipset.
6 *
7 * Base Driver Skeleton:
8 * Written 1993-94 by Donald Becker.
9 *
10 * Copyright 1993 United States Government as represented by the
11 * Director, National Security Agency.
12 *
13 * This software may be used and distributed according to the terms
14 * of the GNU General Public License, incorporated herein by reference.
15 */
16
17 #define CID 0x4e
18
19 #define BCTL 0x70
20 #define BCTL_SOFTRESET (1<<15)
21 #define BCTL_MIMREB (1<<6)
22 #define BCTL_MODE_INDICATOR (1<<5)
23
24 #define GPR 0x4a
25 #define GPR_OPTI_BF (1<<6)
26 #define GPR_NEPTUNE_BF (1<<4)
27 #define GPR_AUTOSENSE (1<<2)
28 #define GPR_16MBPS (1<<3)
29
30 #define PAG 0x85
31 #define LBC 0x8e
32
33 #define LISR 0x10
34 #define LISR_SUM 0x14
35 #define LISR_RWM 0x18
36
37 #define LISR_LIE (1<<15)
38 #define LISR_SLIM (1<<13)
39 #define LISR_SLI (1<<12)
40 #define LISR_PCMSRMASK (1<<11)
41 #define LISR_PCMSRINT (1<<10)
42 #define LISR_WOLMASK (1<<9)
43 #define LISR_WOL (1<<8)
44 #define LISR_SRB_CMD (1<<5)
45 #define LISR_ASB_REPLY (1<<4)
46 #define LISR_ASB_FREE_REQ (1<<2)
47 #define LISR_ARB_FREE (1<<1)
48 #define LISR_TRB_FRAME (1<<0)
49
50 #define SISR 0x20
51 #define SISR_SUM 0x24
52 #define SISR_RWM 0x28
53 #define SISR_RR 0x2C
54 #define SISR_RESMASK 0x30
55 #define SISR_MASK 0x54
56 #define SISR_MASK_SUM 0x58
57 #define SISR_MASK_RWM 0x5C
58
59 #define SISR_TX2_IDLE (1<<31)
60 #define SISR_TX2_HALT (1<<29)
61 #define SISR_TX2_EOF (1<<28)
62 #define SISR_TX1_IDLE (1<<27)
63 #define SISR_TX1_HALT (1<<25)
64 #define SISR_TX1_EOF (1<<24)
65 #define SISR_TIMEOUT (1<<23)
66 #define SISR_RX_NOBUF (1<<22)
67 #define SISR_RX_STATUS (1<<21)
68 #define SISR_RX_HALT (1<<18)
69 #define SISR_RX_EOF_EARLY (1<<16)
70 #define SISR_MI (1<<15)
71 #define SISR_PI (1<<13)
72 #define SISR_ERR (1<<9)
73 #define SISR_ADAPTER_CHECK (1<<6)
74 #define SISR_SRB_REPLY (1<<5)
75 #define SISR_ASB_FREE (1<<4)
76 #define SISR_ARB_CMD (1<<3)
77 #define SISR_TRB_REPLY (1<<2)
78
79 #define EISR 0x34
80 #define EISR_RWM 0x38
81 #define EISR_MASK 0x3c
82
83 #define LAPA 0x60
84 #define LAPWWO 0x64
85 #define LAPWWC 0x68
86 #define LAPCTL 0x6C
87 #define LAIPD 0x78
88 #define LAIPDDINC 0x7C
89
90 #define TIMER 0x50
91
92 #define CLKCTL 0x74
93
94 #define PM_CON 0x4
95
96 #define BMCTL_SUM 0x40
97 #define BMCTL_RWM 0x44
98 #define BMCTL_TX2_DIS (1<<30)
99 #define BMCTL_TX1_DIS (1<<26)
100 #define BMCTL_RX_DIS (1<<22)
101
102 #define BMASR 0xcc
103
104 #define RXDESCQ 0x90
105 #define RXDESCQCNT 0x94
106 #define RXCDA 0x98
107 #define RXENQ 0x9C
108 #define RXSTATQ 0xA0
109 #define RXSTATQCNT 0xA4
110 #define RXCSA 0xA8
111 #define RXCLEN 0xAC
112 #define RXHLEN 0xAE
113
114 #define TXDESCQ_1 0xb0
115 #define TXDESCQ_2 0xd0
116 #define TXDESCQCNT_1 0xb4
117 #define TXDESCQCNT_2 0xd4
118 #define TXCDA_1 0xb8
119 #define TXCDA_2 0xd8
120 #define TXENQ_1 0xbc
121 #define TXENQ_2 0xdc
122 #define TXSTATQ_1 0xc0
123 #define TXSTATQ_2 0xe0
124 #define TXSTATQCNT_1 0xc4
125 #define TXSTATQCNT_2 0xe4
126 #define TXCSA_1 0xc8
127 #define TXCSA_2 0xe8
128 /* Cardbus */
129 #define FERMASK 0xf4
130 #define FERMASK_INT_BIT (1<<15)
131
132 #define OLYMPIC_IO_SPACE 256
133
134 #define SRB_COMMAND_SIZE 50
135
136 #define OLYMPIC_MAX_ADAPTERS 8 /* 0x08 __MODULE_STRING can't hand 0xnn */
137
138 /* Defines for LAN STATUS CHANGE reports */
139 #define LSC_SIG_LOSS 0x8000
140 #define LSC_HARD_ERR 0x4000
141 #define LSC_SOFT_ERR 0x2000
142 #define LSC_TRAN_BCN 0x1000
143 #define LSC_LWF 0x0800
144 #define LSC_ARW 0x0400
145 #define LSC_FPE 0x0200
146 #define LSC_RR 0x0100
147 #define LSC_CO 0x0080
148 #define LSC_SS 0x0040
149 #define LSC_RING_REC 0x0020
150 #define LSC_SR_CO 0x0010
151 #define LSC_FDX_MODE 0x0004
152
153 /* Defines for OPEN ADAPTER command */
154
155 #define OPEN_ADAPTER_EXT_WRAP (1<<15)
156 #define OPEN_ADAPTER_DIS_HARDEE (1<<14)
157 #define OPEN_ADAPTER_DIS_SOFTERR (1<<13)
158 #define OPEN_ADAPTER_PASS_ADC_MAC (1<<12)
159 #define OPEN_ADAPTER_PASS_ATT_MAC (1<<11)
160 #define OPEN_ADAPTER_ENABLE_EC (1<<10)
161 #define OPEN_ADAPTER_CONTENDER (1<<8)
162 #define OPEN_ADAPTER_PASS_BEACON (1<<7)
163 #define OPEN_ADAPTER_ENABLE_FDX (1<<6)
164 #define OPEN_ADAPTER_ENABLE_RPL (1<<5)
165 #define OPEN_ADAPTER_INHIBIT_ETR (1<<4)
166 #define OPEN_ADAPTER_INTERNAL_WRAP (1<<3)
167 #define OPEN_ADAPTER_USE_OPTS2 (1<<0)
168
169 #define OPEN_ADAPTER_2_ENABLE_ONNOW (1<<15)
170
171 /* Defines for SRB Commands */
172
173 #define SRB_ACCESS_REGISTER 0x1f
174 #define SRB_CLOSE_ADAPTER 0x04
175 #define SRB_CONFIGURE_BRIDGE 0x0c
176 #define SRB_CONFIGURE_WAKEUP_EVENT 0x1a
177 #define SRB_MODIFY_BRIDGE_PARMS 0x15
178 #define SRB_MODIFY_OPEN_OPTIONS 0x01
179 #define SRB_MODIFY_RECEIVE_OPTIONS 0x17
180 #define SRB_NO_OPERATION 0x00
181 #define SRB_OPEN_ADAPTER 0x03
182 #define SRB_READ_LOG 0x08
183 #define SRB_READ_SR_COUNTERS 0x16
184 #define SRB_RESET_GROUP_ADDRESS 0x02
185 #define SRB_SAVE_CONFIGURATION 0x1b
186 #define SRB_SET_BRIDGE_PARMS 0x09
187 #define SRB_SET_BRIDGE_TARGETS 0x10
188 #define SRB_SET_FUNC_ADDRESS 0x07
189 #define SRB_SET_GROUP_ADDRESS 0x06
190 #define SRB_SET_GROUP_ADDR_OPTIONS 0x11
191 #define SRB_UPDATE_WAKEUP_PATTERN 0x19
192
193 /* Clear return code */
194
195 #define OLYMPIC_CLEAR_RET_CODE 0xfe
196
197 /* ARB Commands */
198 #define ARB_RECEIVE_DATA 0x81
199 #define ARB_LAN_CHANGE_STATUS 0x84
200 /* ASB Response commands */
201
202 #define ASB_RECEIVE_DATA 0x81
203
204
205 /* Olympic defaults for buffers */
206
207 #define OLYMPIC_RX_RING_SIZE 16 /* should be a power of 2 */
208 #define OLYMPIC_TX_RING_SIZE 8 /* should be a power of 2 */
209
210 #define PKT_BUF_SZ 4096 /* Default packet size */
211
212 /* Olympic data structures */
213
214 /* xxxx These structures are all little endian in hardware. */
215
216 struct olympic_tx_desc {
217 u32 buffer;
218 u32 status_length;
219 };
220
221 struct olympic_tx_status {
222 u32 status;
223 };
224
225 struct olympic_rx_desc {
226 u32 buffer;
227 u32 res_length;
228 };
229
230 struct olympic_rx_status {
231 u32 fragmentcnt_framelen;
232 u32 status_buffercnt;
233 };
234 /* xxxx END These structures are all little endian in hardware. */
235 /* xxxx There may be more, but I'm pretty sure about these */
236
237 struct mac_receive_buffer {
238 u16 next ;
239 u8 padding ;
240 u8 frame_status ;
241 u16 buffer_length ;
242 u8 frame_data ;
243 };
244
245 struct olympic_private {
246
247 u16 srb; /* be16 */
248 u16 trb; /* be16 */
249 u16 arb; /* be16 */
250 u16 asb; /* be16 */
251
252 u8 *olympic_mmio;
253 u8 *olympic_lap;
254 struct pci_dev *pdev ;
255 char *olympic_card_name ;
256
257 spinlock_t olympic_lock ;
258
259 volatile int srb_queued; /* True if an SRB is still posted */
260 wait_queue_head_t srb_wait;
261
262 volatile int asb_queued; /* True if an ASB is posted */
263
264 volatile int trb_queued; /* True if a TRB is posted */
265 wait_queue_head_t trb_wait ;
266
267 /* These must be on a 4 byte boundary. */
268 struct olympic_rx_desc olympic_rx_ring[OLYMPIC_RX_RING_SIZE];
269 struct olympic_tx_desc olympic_tx_ring[OLYMPIC_TX_RING_SIZE];
270 struct olympic_rx_status olympic_rx_status_ring[OLYMPIC_RX_RING_SIZE];
271 struct olympic_tx_status olympic_tx_status_ring[OLYMPIC_TX_RING_SIZE];
272
273 struct sk_buff *tx_ring_skb[OLYMPIC_TX_RING_SIZE], *rx_ring_skb[OLYMPIC_RX_RING_SIZE];
274 int tx_ring_free, tx_ring_last_status, rx_ring_last_received,rx_status_last_received, free_tx_ring_entries;
275
276 struct net_device_stats olympic_stats ;
277 u16 olympic_lan_status ;
278 u8 olympic_ring_speed ;
279 u16 pkt_buf_sz ;
280 u8 olympic_receive_options, olympic_copy_all_options,olympic_message_level, olympic_network_monitor;
281 u16 olympic_addr_table_addr, olympic_parms_addr ;
282 u8 olympic_laa[6] ;
283 u32 rx_ring_dma_addr;
284 u32 rx_status_ring_dma_addr;
285 u32 tx_ring_dma_addr;
286 u32 tx_status_ring_dma_addr;
287 };
288
289 struct olympic_adapter_addr_table {
290
291 u8 node_addr[6] ;
292 u8 reserved[4] ;
293 u8 func_addr[4] ;
294 } ;
295
296 struct olympic_parameters_table {
297
298 u8 phys_addr[4] ;
299 u8 up_node_addr[6] ;
300 u8 up_phys_addr[4] ;
301 u8 poll_addr[6] ;
302 u16 reserved ;
303 u16 acc_priority ;
304 u16 auth_source_class ;
305 u16 att_code ;
306 u8 source_addr[6] ;
307 u16 beacon_type ;
308 u16 major_vector ;
309 u16 lan_status ;
310 u16 soft_error_time ;
311 u16 reserved1 ;
312 u16 local_ring ;
313 u16 mon_error ;
314 u16 beacon_transmit ;
315 u16 beacon_receive ;
316 u16 frame_correl ;
317 u8 beacon_naun[6] ;
318 u32 reserved2 ;
319 u8 beacon_phys[4] ;
320 };
321