File: /usr/src/linux/arch/cris/drivers/eeprom.c
1 /*!*****************************************************************************
2 *!
3 *! Implements an interface for i2c compatible eeproms to run under linux.
4 *! Supports 2k, 8k(?) and 16k. Uses adaptive timing adjustents by
5 *! Johan.Adolfsson@axis.com
6 *!
7 *! Probing results:
8 *! 8k or not is detected (the assumes 2k or 16k)
9 *! 2k or 16k detected using test reads and writes.
10 *!
11 *!------------------------------------------------------------------------
12 *! HISTORY
13 *!
14 *! DATE NAME CHANGES
15 *! ---- ---- -------
16 *! Aug 28 1999 Edgar Iglesias Initial Version
17 *! Aug 31 1999 Edgar Iglesias Allow simultaneous users.
18 *! Sep 03 1999 Edgar Iglesias Updated probe.
19 *! Sep 03 1999 Edgar Iglesias Added bail-out stuff if we get interrupted
20 *! in the spin-lock.
21 *!
22 *! $Log: eeprom.c,v $
23 *! Revision 1.8 2001/06/15 13:24:29 jonashg
24 *! * Added verification of pointers from userspace in read and write.
25 *! * Made busy counter volatile.
26 *! * Added define for inital write delay.
27 *! * Removed warnings by using loff_t instead of unsigned long.
28 *!
29 *! Revision 1.7 2001/06/14 15:26:54 jonashg
30 *! Removed test because condition is always true.
31 *!
32 *! Revision 1.6 2001/06/14 15:18:20 jonashg
33 *! Kb -> kB (makes quite a difference if you don't know if you have 2k or 16k).
34 *!
35 *! Revision 1.5 2001/06/14 14:39:51 jonashg
36 *! Forgot to use name when registering the driver.
37 *!
38 *! Revision 1.4 2001/06/14 14:35:47 jonashg
39 *! * Gave driver a name and used it in printk's.
40 *! * Cleanup.
41 *!
42 *! Revision 1.3 2001/03/19 16:04:46 markusl
43 *! Fixed init of fops struct
44 *!
45 *! Revision 1.2 2001/03/19 10:35:07 markusl
46 *! 2.4 port of eeprom driver
47 *!
48 *! Revision 1.8 2000/05/18 10:42:25 edgar
49 *! Make sure to end write cycle on _every_ write
50 *!
51 *! Revision 1.7 2000/01/17 17:41:01 johana
52 *! Adjusted probing and return -ENOSPC when writing outside EEPROM
53 *!
54 *! Revision 1.6 2000/01/17 15:50:36 johana
55 *! Added adaptive timing adjustments and fixed autoprobing for 2k and 16k(?)
56 *! EEPROMs
57 *!
58 *! Revision 1.5 1999/09/03 15:07:37 edgar
59 *! Added bail-out check to the spinlock
60 *!
61 *! Revision 1.4 1999/09/03 12:11:17 bjornw
62 *! Proper atomicity (need to use spinlocks, not if's). users -> busy.
63 *!
64 *!
65 *! (c) 1999 Axis Communications AB, Lund, Sweden
66 *!*****************************************************************************/
67
68 #include <linux/config.h>
69 #include <linux/kernel.h>
70 #include <linux/sched.h>
71 #include <linux/fs.h>
72 #include <linux/init.h>
73 #include <linux/delay.h>
74 #include <asm/uaccess.h>
75 #include "i2c.h"
76
77 #define D(x)
78
79 /* If we should use adaptive timing or not: */
80 //#define EEPROM_ADAPTIVE_TIMING
81
82 #define EEPROM_MAJOR_NR 122 /* use a LOCAL/EXPERIMENTAL major for now */
83 #define EEPROM_MINOR_NR 0
84
85 /* Empirical sane initial value of the delay, the value will be adapted to
86 * what the chip needs when using EEPROM_ADAPTIVE_TIMING.
87 */
88 #define INITIAL_WRITEDELAY_US 4000
89 #define MAX_WRITEDELAY_US 10000 /* 10 ms according to spec for 2KB EEPROM */
90
91 /* This one defines how many times to try when eeprom fails. */
92 #define EEPROM_RETRIES 10
93
94 #define EEPROM_2KB (2 * 1024)
95 /*#define EEPROM_4KB (4 * 1024)*/ /* Exists but not used in Axis products */
96 #define EEPROM_8KB (8 * 1024 - 1 ) /* Last byte has write protection bit */
97 #define EEPROM_16KB (16 * 1024)
98
99 #define i2c_delay(x) udelay(x)
100
101 /*
102 * This structure describes the attached eeprom chip.
103 * The values are probed for.
104 */
105
106 struct eeprom_type
107 {
108 unsigned long size;
109 unsigned long sequential_write_pagesize;
110 unsigned char select_cmd;
111 unsigned long usec_delay_writecycles; /* Min time between write cycles
112 (up to 10ms for some models) */
113 unsigned long usec_delay_step; /* For adaptive algorithm */
114 int adapt_state; /* 1 = To high , 0 = Even, -1 = To low */
115
116 /* this one is to keep the read/write operations atomic */
117 wait_queue_head_t wait_q;
118 volatile int busy;
119 int retry_cnt_addr; /* Used to keep track of number of retries for
120 adaptive timing adjustments */
121 int retry_cnt_read;
122 };
123
124 static int eeprom_open(struct inode * inode, struct file * file);
125 static loff_t eeprom_lseek(struct file * file, loff_t offset, int orig);
126 static ssize_t eeprom_read(struct file * file, char * buf, size_t count,
127 loff_t *off);
128 static ssize_t eeprom_write(struct file * file, const char * buf, size_t count,
129 loff_t *off);
130 static int eeprom_close(struct inode * inode, struct file * file);
131
132 static int eeprom_address(unsigned long addr);
133 static int read_from_eeprom(char * buf, int count);
134 static int eeprom_write_buf(loff_t addr, const char * buf, int count);
135 static int eeprom_read_buf(loff_t addr, char * buf, int count);
136
137 static void eeprom_disable_write_protect(void);
138
139
140 static const char eeprom_name[] = "eeprom";
141
142 /* chip description */
143 static struct eeprom_type eeprom;
144
145 /* This is the exported file-operations structure for this device. */
146 struct file_operations eeprom_fops =
147 {
148 llseek: eeprom_lseek,
149 read: eeprom_read,
150 write: eeprom_write,
151 open: eeprom_open,
152 release: eeprom_close
153 };
154
155 /* eeprom init call. Probes for different eeprom models. */
156
157 int __init eeprom_init(void)
158 {
159 init_waitqueue_head(&eeprom.wait_q);
160 eeprom.busy = 0;
161
162 #if CONFIG_ETRAX_I2C_EEPROM_PROBE
163 #define EETEXT "Found"
164 #else
165 #define EETEXT "Assuming"
166 #endif
167 if (register_chrdev(EEPROM_MAJOR_NR, eeprom_name, &eeprom_fops))
168 {
169 printk(KERN_INFO "%s: unable to get major %d for eeprom device\n",
170 eeprom_name, EEPROM_MAJOR_NR);
171 return -1;
172 }
173
174 printk("EEPROM char device v0.3, (c) 2000 Axis Communications AB\n");
175
176 /*
177 * Note: Most of this probing method was taken from the printserver (5470e)
178 * codebase. It did not contain a way of finding the 16kB chips
179 * (M24128 or variants). The method used here might not work
180 * for all models. If you encounter problems the easiest way
181 * is probably to define your model within #ifdef's, and hard-
182 * code it.
183 */
184
185 eeprom.size = 0;
186 eeprom.usec_delay_writecycles = INITIAL_WRITEDELAY_US;
187 eeprom.usec_delay_step = 128;
188 eeprom.adapt_state = 0;
189
190 #if CONFIG_ETRAX_I2C_EEPROM_PROBE
191 i2c_start();
192 i2c_outbyte(0x80);
193 if(!i2c_getack())
194 {
195 /* It's not 8k.. */
196 int success = 0;
197 unsigned char buf_2k_start[16];
198
199 /* Im not sure this will work... :) */
200 /* assume 2kB, if failure go for 16kB */
201 /* Test with 16kB settings.. */
202 /* If it's a 2kB EEPROM and we address it outside it's range
203 * it will mirror the address space:
204 * 1. We read two locations (that are mirrored),
205 * if the content differs * it's a 16kB EEPROM.
206 * 2. if it doesn't differ - write diferent value to one of the locations,
207 * check the other - if content still is the same it's a 2k EEPROM,
208 * restore original data.
209 */
210 #define LOC1 8
211 #define LOC2 (0x1fb) /*1fb, 3ed, 5df, 7d1 */
212
213 /* 2k settings */
214 i2c_stop();
215 eeprom.size = EEPROM_2KB;
216 eeprom.select_cmd = 0xA0;
217 eeprom.sequential_write_pagesize = 16;
218 if( eeprom_read_buf( 0, buf_2k_start, 16 ) == 16 )
219 {
220 D(printk("2k start: '%16.16s'\n", buf_2k_start));
221 }
222 else
223 {
224 printk(KERN_INFO "%s: Failed to read in 2k mode!\n", eeprom_name);
225 }
226
227 /* 16k settings */
228 eeprom.size = EEPROM_16KB;
229 eeprom.select_cmd = 0xA0;
230 eeprom.sequential_write_pagesize = 64;
231
232 {
233 unsigned char loc1[4], loc2[4], tmp[4];
234 if( eeprom_read_buf(LOC2, loc2, 4) == 4)
235 {
236 if( eeprom_read_buf(LOC1, loc1, 4) == 4)
237 {
238 D(printk("0 loc1: (%i) '%4.4s' loc2 (%i) '%4.4s'\n",
239 LOC1, loc1, LOC2, loc2));
240 #if 0
241 if (memcmp(loc1, loc2, 4) != 0 )
242 {
243 /* It's 16k */
244 printk(KERN_INFO "%s: 16k detected in step 1\n", eeprom_name);
245 eeprom.size = EEPROM_16KB;
246 success = 1;
247 }
248 else
249 #endif
250 {
251 /* Do step 2 check */
252 /* Invert value */
253 loc1[0] = ~loc1[0];
254 if (eeprom_write_buf(LOC1, loc1, 1) == 1)
255 {
256 /* If 2k EEPROM this write will actually write 10 bytes
257 * from pos 0
258 */
259 D(printk("1 loc1: (%i) '%4.4s' loc2 (%i) '%4.4s'\n",
260 LOC1, loc1, LOC2, loc2));
261 if( eeprom_read_buf(LOC1, tmp, 4) == 4)
262 {
263 D(printk("2 loc1: (%i) '%4.4s' tmp '%4.4s'\n",
264 LOC1, loc1, tmp));
265 if (memcmp(loc1, tmp, 4) != 0 )
266 {
267 printk(KERN_INFO "%s: read and write differs! Not 16kB\n",
268 eeprom_name);
269 loc1[0] = ~loc1[0];
270
271 if (eeprom_write_buf(LOC1, loc1, 1) == 1)
272 {
273 success = 1;
274 }
275 else
276 {
277 printk(KERN_INFO "%s: Restore 2k failed during probe,"
278 " EEPROM might be corrupt!\n", eeprom_name);
279
280 }
281 i2c_stop();
282 /* Go to 2k mode and write original data */
283 eeprom.size = EEPROM_2KB;
284 eeprom.select_cmd = 0xA0;
285 eeprom.sequential_write_pagesize = 16;
286 if( eeprom_write_buf(0, buf_2k_start, 16) == 16)
287 {
288 }
289 else
290 {
291 printk(KERN_INFO "%s: Failed to write back 2k start!\n",
292 eeprom_name);
293 }
294
295 eeprom.size = EEPROM_2KB;
296 }
297 }
298
299 if(!success)
300 {
301 if( eeprom_read_buf(LOC2, loc2, 1) == 1)
302 {
303 D(printk("0 loc1: (%i) '%4.4s' loc2 (%i) '%4.4s'\n",
304 LOC1, loc1, LOC2, loc2));
305 if (memcmp(loc1, loc2, 4) == 0 )
306 {
307 /* Data the same, must be mirrored -> 2k */
308 /* Restore data */
309 printk(KERN_INFO "%s: 2k detected in step 2\n", eeprom_name);
310 loc1[0] = ~loc1[0];
311 if (eeprom_write_buf(LOC1, loc1, 1) == 1)
312 {
313 success = 1;
314 }
315 else
316 {
317 printk(KERN_INFO "%s: Restore 2k failed during probe,"
318 " EEPROM might be corrupt!\n", eeprom_name);
319
320 }
321
322 eeprom.size = EEPROM_2KB;
323 }
324 else
325 {
326 printk(KERN_INFO "%s: 16k detected in step 2\n",
327 eeprom_name);
328 loc1[0] = ~loc1[0];
329 /* Data differs, assume 16k */
330 /* Restore data */
331 if (eeprom_write_buf(LOC1, loc1, 1) == 1)
332 {
333 success = 1;
334 }
335 else
336 {
337 printk(KERN_INFO "%s: Restore 16k failed during probe,"
338 " EEPROM might be corrupt!\n", eeprom_name);
339 }
340
341 eeprom.size = EEPROM_16KB;
342 }
343 }
344 }
345 }
346 } /* read LOC1 */
347 } /* address LOC1 */
348 if (!success)
349 {
350 printk(KERN_INFO "%s: Probing failed!, using 2KB!\n", eeprom_name);
351 eeprom.size = EEPROM_2KB;
352 }
353 } /* read */
354 }
355 }
356 else
357 {
358 i2c_outbyte(0x00);
359 if(!i2c_getack())
360 {
361 /* No 8k */
362 eeprom.size = EEPROM_2KB;
363 }
364 else
365 {
366 i2c_start();
367 i2c_outbyte(0x81);
368 if (!i2c_getack())
369 {
370 eeprom.size = EEPROM_2KB;
371 }
372 else
373 {
374 /* It's a 8kB */
375 i2c_inbyte();
376 eeprom.size = EEPROM_8KB;
377 }
378 }
379 }
380 i2c_stop();
381 #elif defined(CONFIG_ETRAX_I2C_EEPROM_16KB)
382 eeprom.size = EEPROM_16KB;
383 #elif defined(CONFIG_ETRAX_I2C_EEPROM_8KB)
384 eeprom.size = EEPROM_8KB;
385 #elif defined(CONFIG_ETRAX_I2C_EEPROM_2KB)
386 eeprom.size = EEPROM_2KB;
387 #endif
388
389 switch(eeprom.size)
390 {
391 case (EEPROM_2KB):
392 printk("%s: " EETEXT " i2c compatible 2kB eeprom.\n", eeprom_name);
393 eeprom.sequential_write_pagesize = 16;
394 eeprom.select_cmd = 0xA0;
395 break;
396 case (EEPROM_8KB):
397 printk("%s: " EETEXT " i2c compatible 8kB eeprom.\n", eeprom_name);
398 eeprom.sequential_write_pagesize = 16;
399 eeprom.select_cmd = 0x80;
400 break;
401 case (EEPROM_16KB):
402 printk("%s: " EETEXT " i2c compatible 16kB eeprom.\n", eeprom_name);
403 eeprom.sequential_write_pagesize = 64;
404 eeprom.select_cmd = 0xA0;
405 break;
406 default:
407 eeprom.size = 0;
408 printk("%s: Did not find a supported eeprom\n", eeprom_name);
409 break;
410 }
411
412
413
414 eeprom_disable_write_protect();
415
416 return 0;
417 }
418
419 /* Opens the device. */
420
421 static int eeprom_open(struct inode * inode, struct file * file)
422 {
423
424 if(MINOR(inode->i_rdev) != EEPROM_MINOR_NR)
425 return -ENXIO;
426 if(MAJOR(inode->i_rdev) != EEPROM_MAJOR_NR)
427 return -ENXIO;
428
429 if( eeprom.size > 0 )
430 {
431 /* OK */
432 return 0;
433 }
434
435 /* No EEprom found */
436 return -EFAULT;
437 }
438
439 /* Changes the current file position. */
440
441 static loff_t eeprom_lseek(struct file * file, loff_t offset, int orig)
442 {
443 /*
444 * orig 0: position from begning of eeprom
445 * orig 1: relative from current position
446 * orig 2: position from last eeprom address
447 */
448
449 switch (orig)
450 {
451 case 0:
452 file->f_pos = offset;
453 break;
454 case 1:
455 file->f_pos += offset;
456 break;
457 case 2:
458 file->f_pos = eeprom.size - offset;
459 break;
460 default:
461 return -EINVAL;
462 }
463
464 /* truncate position */
465 if (file->f_pos < 0)
466 {
467 file->f_pos = 0;
468 return(-EOVERFLOW);
469 }
470
471 if (file->f_pos >= eeprom.size)
472 {
473 file->f_pos = eeprom.size - 1;
474 return(-EOVERFLOW);
475 }
476
477 return ( file->f_pos );
478 }
479
480 /* Reads data from eeprom. */
481
482 static int eeprom_read_buf(loff_t addr, char * buf, int count)
483 {
484 struct file f;
485
486 f.f_pos = addr;
487 return eeprom_read(&f, buf, count, &addr);
488 }
489
490
491
492 /* Reads data from eeprom. */
493
494 static ssize_t eeprom_read(struct file * file, char * buf, size_t count, loff_t *off)
495 {
496 int i, read=0;
497 unsigned long p = file->f_pos;
498
499 unsigned char page;
500
501 if(p >= eeprom.size) /* Address i 0 - (size-1) */
502 {
503 return -EFAULT;
504 }
505
506 while(eeprom.busy)
507 {
508 interruptible_sleep_on(&eeprom.wait_q);
509
510 /* bail out if we get interrupted */
511 if (signal_pending(current))
512 return -EINTR;
513
514 }
515 eeprom.busy++;
516
517 page = (unsigned char) (p >> 8);
518
519 if(!eeprom_address(p))
520 {
521 printk(KERN_INFO "%s: Read failed to address the eeprom: "
522 "0x%08X (%i) page: %i\n", eeprom_name, p, p, page);
523 i2c_stop();
524
525 /* don't forget to wake them up */
526 eeprom.busy--;
527 wake_up_interruptible(&eeprom.wait_q);
528 return -EFAULT;
529 }
530
531 if( (p + count) > eeprom.size)
532 {
533 /* truncate count */
534 count = eeprom.size - p;
535 }
536
537 /* stop dummy write op and initiate the read op */
538 i2c_start();
539
540 /* special case for small eeproms */
541 if(eeprom.size < EEPROM_16KB)
542 {
543 i2c_outbyte( eeprom.select_cmd | 1 | (page << 1) );
544 }
545
546 /* go on with the actual read */
547 read = read_from_eeprom( buf, count);
548
549 if(read > 0)
550 {
551 file->f_pos += read;
552 }
553
554 eeprom.busy--;
555 wake_up_interruptible(&eeprom.wait_q);
556 return read;
557 }
558
559 /* Writes data to eeprom. */
560
561 static int eeprom_write_buf(loff_t addr, const char * buf, int count)
562 {
563 struct file f;
564
565 f.f_pos = addr;
566
567 return eeprom_write(&f, buf, count, &addr);
568 }
569
570
571 /* Writes data to eeprom. */
572
573 static ssize_t eeprom_write(struct file * file, const char * buf, size_t count,
574 loff_t *off)
575 {
576 int i, written, restart=1;
577 unsigned long p;
578
579 if (verify_area(VERIFY_READ, buf, count))
580 {
581 return -EFAULT;
582 }
583
584 while(eeprom.busy)
585 {
586 interruptible_sleep_on(&eeprom.wait_q);
587 /* bail out if we get interrupted */
588 if (signal_pending(current))
589 return -EINTR;
590 }
591 eeprom.busy++;
592 for(i = 0; (i < EEPROM_RETRIES) && (restart > 0); i++)
593 {
594 restart = 0;
595 written = 0;
596 p = file->f_pos;
597
598
599 while( (written < count) && (p < eeprom.size))
600 {
601 /* address the eeprom */
602 if(!eeprom_address(p))
603 {
604 printk(KERN_INFO "%s: Write failed to address the eeprom: "
605 "0x%08X (%i) \n", eeprom_name, p, p);
606 i2c_stop();
607
608 /* don't forget to wake them up */
609 eeprom.busy--;
610 wake_up_interruptible(&eeprom.wait_q);
611 return -EFAULT;
612 }
613 #ifdef EEPROM_ADAPTIVE_TIMING
614 /* Adaptive algorithm to adjust timing */
615 if (eeprom.retry_cnt_addr > 0)
616 {
617 /* To Low now */
618 D(printk(">D=%i d=%i\n",
619 eeprom.usec_delay_writecycles, eeprom.usec_delay_step));
620
621 if (eeprom.usec_delay_step < 4)
622 {
623 eeprom.usec_delay_step++;
624 eeprom.usec_delay_writecycles += eeprom.usec_delay_step;
625 }
626 else
627 {
628
629 if (eeprom.adapt_state > 0)
630 {
631 /* To Low before */
632 eeprom.usec_delay_step *= 2;
633 if (eeprom.usec_delay_step > 2)
634 {
635 eeprom.usec_delay_step--;
636 }
637 eeprom.usec_delay_writecycles += eeprom.usec_delay_step;
638 }
639 else if (eeprom.adapt_state < 0)
640 {
641 /* To High before (toggle dir) */
642 eeprom.usec_delay_writecycles += eeprom.usec_delay_step;
643 if (eeprom.usec_delay_step > 1)
644 {
645 eeprom.usec_delay_step /= 2;
646 eeprom.usec_delay_step--;
647 }
648 }
649 }
650
651 eeprom.adapt_state = 1;
652 }
653 else
654 {
655 /* To High (or good) now */
656 D(printk("<D=%i d=%i\n",
657 eeprom.usec_delay_writecycles, eeprom.usec_delay_step));
658
659 if (eeprom.adapt_state < 0)
660 {
661 /* To High before */
662 if (eeprom.usec_delay_step > 1)
663 {
664 eeprom.usec_delay_step *= 2;
665 eeprom.usec_delay_step--;
666
667 if (eeprom.usec_delay_writecycles > eeprom.usec_delay_step)
668 {
669 eeprom.usec_delay_writecycles -= eeprom.usec_delay_step;
670 }
671 }
672 }
673 else if (eeprom.adapt_state > 0)
674 {
675 /* To Low before (toggle dir) */
676 if (eeprom.usec_delay_writecycles > eeprom.usec_delay_step)
677 {
678 eeprom.usec_delay_writecycles -= eeprom.usec_delay_step;
679 }
680 if (eeprom.usec_delay_step > 1)
681 {
682 eeprom.usec_delay_step /= 2;
683 eeprom.usec_delay_step--;
684 }
685
686 eeprom.adapt_state = -1;
687 }
688
689 if (eeprom.adapt_state > -100)
690 {
691 eeprom.adapt_state--;
692 }
693 else
694 {
695 /* Restart adaption */
696 D(printk("#Restart\n"));
697 eeprom.usec_delay_step++;
698 }
699 }
700 #endif /* EEPROM_ADAPTIVE_TIMING */
701 /* write until we hit a page boundary or count */
702 do
703 {
704 i2c_outbyte(buf[written]);
705 if(!i2c_getack())
706 {
707 restart=1;
708 printk(KERN_INFO "%s: write error, retrying. %d\n", eeprom_name, i);
709 i2c_stop();
710 break;
711 }
712 written++;
713 p++;
714 } while( written < count && ( p % eeprom.sequential_write_pagesize ));
715
716 /* end write cycle */
717 i2c_stop();
718 i2c_delay(eeprom.usec_delay_writecycles);
719 } /* while */
720 } /* for */
721
722 eeprom.busy--;
723 wake_up_interruptible(&eeprom.wait_q);
724 if (written == 0 && file->f_pos >= eeprom.size){
725 return -ENOSPC;
726 }
727 file->f_pos += written;
728 return written;
729 }
730
731 /* Closes the device. */
732
733 static int eeprom_close(struct inode * inode, struct file * file)
734 {
735 /* do nothing for now */
736 return 0;
737 }
738
739 /* Sets the current address of the eeprom. */
740
741 static int eeprom_address(unsigned long addr)
742 {
743 int i, j;
744 unsigned char page, offset;
745
746 page = (unsigned char) (addr >> 8);
747 offset = (unsigned char) addr;
748
749 for(i = 0; i < EEPROM_RETRIES; i++)
750 {
751 /* start a dummy write for addressing */
752 i2c_start();
753
754 if(eeprom.size == EEPROM_16KB)
755 {
756 i2c_outbyte( eeprom.select_cmd );
757 i2c_getack();
758 i2c_outbyte(page);
759 }
760 else
761 {
762 i2c_outbyte( eeprom.select_cmd | (page << 1) );
763 }
764 if(!i2c_getack())
765 {
766 /* retry */
767 i2c_stop();
768 /* Must have a delay here.. 500 works, >50, 100->works 5th time*/
769 i2c_delay(MAX_WRITEDELAY_US / EEPROM_RETRIES * i);
770 /* The chip needs up to 10 ms from write stop to next start */
771
772 }
773 else
774 {
775 i2c_outbyte(offset);
776
777 if(!i2c_getack())
778 {
779 /* retry */
780 i2c_stop();
781 }
782 else
783 break;
784 }
785 }
786
787
788 eeprom.retry_cnt_addr = i;
789 D(printk("%i\n", eeprom.retry_cnt_addr));
790 if(eeprom.retry_cnt_addr == EEPROM_RETRIES)
791 {
792 /* failed */
793 return 0;
794 }
795 return 1;
796 }
797
798 /* Reads from current adress. */
799
800 static int read_from_eeprom(char * buf, int count)
801 {
802 int i, read=0;
803
804 for(i = 0; i < EEPROM_RETRIES; i++)
805 {
806 if(eeprom.size == EEPROM_16KB)
807 {
808 i2c_outbyte( eeprom.select_cmd | 1 );
809 }
810
811 if(i2c_getack());
812 {
813 break;
814 }
815 }
816
817 if(i == EEPROM_RETRIES)
818 {
819 printk(KERN_INFO "%s: failed to read from eeprom\n", eeprom_name);
820 i2c_stop();
821
822 return -EFAULT;
823 }
824
825 while( (read < count))
826 {
827 if (put_user(i2c_inbyte(), &buf[read++]))
828 {
829 i2c_stop();
830
831 return -EFAULT;
832 }
833
834 /*
835 * make sure we don't ack last byte or you will get very strange
836 * results!
837 */
838 if(read < count)
839 {
840 i2c_sendack();
841 }
842 }
843
844 /* stop the operation */
845 i2c_stop();
846
847 return read;
848 }
849
850 /* Disables write protection if applicable. */
851
852 #define DBP_SAVE(x)
853 #define ax_printf printk
854 static void eeprom_disable_write_protect(void)
855 {
856 /* Disable write protect */
857 if (eeprom.size == EEPROM_8KB)
858 {
859 /* Step 1 Set WEL = 1 (write 00000010 to address 1FFFh */
860 i2c_start();
861 i2c_outbyte(0xbe);
862 if(!i2c_getack())
863 {
864 DBP_SAVE(ax_printf("Get ack returns false\n"));
865 }
866 i2c_outbyte(0xFF);
867 if(!i2c_getack())
868 {
869 DBP_SAVE(ax_printf("Get ack returns false 2\n"));
870 }
871 i2c_outbyte(0x02);
872 if(!i2c_getack())
873 {
874 DBP_SAVE(ax_printf("Get ack returns false 3\n"));
875 }
876 i2c_stop();
877
878 i2c_delay(1000);
879
880 /* Step 2 Set RWEL = 1 (write 00000110 to address 1FFFh */
881 i2c_start();
882 i2c_outbyte(0xbe);
883 if(!i2c_getack())
884 {
885 DBP_SAVE(ax_printf("Get ack returns false 55\n"));
886 }
887 i2c_outbyte(0xFF);
888 if(!i2c_getack())
889 {
890 DBP_SAVE(ax_printf("Get ack returns false 52\n"));
891 }
892 i2c_outbyte(0x06);
893 if(!i2c_getack())
894 {
895 DBP_SAVE(ax_printf("Get ack returns false 53\n"));
896 }
897 i2c_stop();
898
899 /* Step 3 Set BP1, BP0, and/or WPEN bits (write 00000110 to address 1FFFh */
900 i2c_start();
901 i2c_outbyte(0xbe);
902 if(!i2c_getack())
903 {
904 DBP_SAVE(ax_printf("Get ack returns false 56\n"));
905 }
906 i2c_outbyte(0xFF);
907 if(!i2c_getack())
908 {
909 DBP_SAVE(ax_printf("Get ack returns false 57\n"));
910 }
911 i2c_outbyte(0x06);
912 if(!i2c_getack())
913 {
914 DBP_SAVE(ax_printf("Get ack returns false 58\n"));
915 }
916 i2c_stop();
917
918 /* Write protect disabled */
919 }
920 }
921
922 module_init(eeprom_init);
923