File: /usr/src/linux/drivers/net/via-rhine.c
1 /* via-rhine.c: A Linux Ethernet device driver for VIA Rhine family chips. */
2 /*
3 Written 1998-2001 by Donald Becker.
4
5 This software may be used and distributed according to the terms of
6 the GNU General Public License (GPL), incorporated herein by reference.
7 Drivers based on or derived from this code fall under the GPL and must
8 retain the authorship, copyright and license notice. This file is not
9 a complete program and may only be used when the entire operating
10 system is licensed under the GPL.
11
12 This driver is designed for the VIA VT86c100A Rhine-II PCI Fast Ethernet
13 controller. It also works with the older 3043 Rhine-I chip.
14
15 The author may be reached as becker@scyld.com, or C/O
16 Scyld Computing Corporation
17 410 Severn Ave., Suite 210
18 Annapolis MD 21403
19
20
21 This driver contains some changes from the original Donald Becker
22 version. He may or may not be interested in bug reports on this
23 code. You can find his versions at:
24 http://www.scyld.com/network/via-rhine.html
25
26
27 Linux kernel version history:
28
29 LK1.1.0:
30 - Jeff Garzik: softnet 'n stuff
31
32 LK1.1.1:
33 - Justin Guyett: softnet and locking fixes
34 - Jeff Garzik: use PCI interface
35
36 LK1.1.2:
37 - Urban Widmark: minor cleanups, merges from Becker 1.03a/1.04 versions
38
39 LK1.1.3:
40 - Urban Widmark: use PCI DMA interface (with thanks to the eepro100.c
41 code) update "Theory of Operation" with
42 softnet/locking changes
43 - Dave Miller: PCI DMA and endian fixups
44 - Jeff Garzik: MOD_xxx race fixes, updated PCI resource allocation
45
46 LK1.1.4:
47 - Urban Widmark: fix gcc 2.95.2 problem and
48 remove writel's to fixed address 0x7c
49
50 LK1.1.5:
51 - Urban Widmark: mdio locking, bounce buffer changes
52 merges from Beckers 1.05 version
53 added netif_running_on/off support
54
55 LK1.1.6:
56 - Urban Widmark: merges from Beckers 1.08b version (VT6102 + mdio)
57 set netif_running_on/off on startup, del_timer_sync
58
59 LK1.1.7:
60 - Manfred Spraul: added reset into tx_timeout
61
62 LK1.1.9:
63 - Urban Widmark: merges from Beckers 1.10 version
64 (media selection + eeprom reload)
65 - David Vrabel: merges from D-Link "1.11" version
66 (disable WOL and PME on startup)
67
68 LK1.1.10:
69 - Manfred Spraul: use "singlecopy" for unaligned buffers
70 don't allocate bounce buffers for !ReqTxAlign cards
71
72 LK1.1.11:
73 - David Woodhouse: Set dev->base_addr before the first time we call
74 wait_for_reset(). It's a lot happier that way.
75 Free np->tx_bufs only if we actually allocated it.
76 */
77
78
79 /* A few user-configurable values.
80 These may be modified when a driver module is loaded. */
81
82 static int debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */
83 static int max_interrupt_work = 20;
84
85 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
86 Setting to > 1518 effectively disables this feature. */
87 static int rx_copybreak;
88
89 /* Used to pass the media type, etc.
90 Both 'options[]' and 'full_duplex[]' should exist for driver
91 interoperability.
92 The media type is usually passed in 'options[]'.
93 The default is autonegotation for speed and duplex.
94 This should rarely be overridden.
95 Use option values 0x10/0x20 for 10Mbps, 0x100,0x200 for 100Mbps.
96 Use option values 0x10 and 0x100 for forcing half duplex fixed speed.
97 Use option values 0x20 and 0x200 for forcing full duplex operation.
98 */
99 #define MAX_UNITS 8 /* More are supported, limit only on options */
100 static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
101 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
102
103 /* Maximum number of multicast addresses to filter (vs. rx-all-multicast).
104 The Rhine has a 64 element 8390-like hash table. */
105 static const int multicast_filter_limit = 32;
106
107
108 /* Operational parameters that are set at compile time. */
109
110 /* Keep the ring sizes a power of two for compile efficiency.
111 The compiler will convert <unsigned>'%'<2^N> into a bit mask.
112 Making the Tx ring too large decreases the effectiveness of channel
113 bonding and packet priority.
114 There are no ill effects from too-large receive rings. */
115 #define TX_RING_SIZE 16
116 #define TX_QUEUE_LEN 10 /* Limit ring entries actually used. */
117 #define RX_RING_SIZE 16
118
119
120 /* Operational parameters that usually are not changed. */
121
122 /* Time in jiffies before concluding the transmitter is hung. */
123 #define TX_TIMEOUT (2*HZ)
124
125 #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/
126
127 /* max time out delay time */
128 #define W_MAX_TIMEOUT 0x0FFFU
129
130 #if !defined(__OPTIMIZE__) || !defined(__KERNEL__)
131 #warning You must compile this file with the correct options!
132 #warning See the last lines of the source file.
133 #error You must compile this driver with "-O".
134 #endif
135
136 #include <linux/module.h>
137 #include <linux/kernel.h>
138 #include <linux/string.h>
139 #include <linux/timer.h>
140 #include <linux/errno.h>
141 #include <linux/ioport.h>
142 #include <linux/slab.h>
143 #include <linux/interrupt.h>
144 #include <linux/pci.h>
145 #include <linux/netdevice.h>
146 #include <linux/etherdevice.h>
147 #include <linux/skbuff.h>
148 #include <linux/init.h>
149 #include <linux/delay.h>
150 #include <linux/mii.h>
151 #include <asm/processor.h> /* Processor type for cache alignment. */
152 #include <asm/bitops.h>
153 #include <asm/io.h>
154 #include <asm/irq.h>
155
156 /* These identify the driver base version and may not be removed. */
157 static char version[] __devinitdata =
158 KERN_INFO "via-rhine.c:v1.10-LK1.1.11 20/08/2001 Written by Donald Becker\n"
159 KERN_INFO " http://www.scyld.com/network/via-rhine.html\n";
160
161 static char shortname[] __devinitdata = "via-rhine";
162
163
164 /* This driver was written to use PCI memory space, however most versions
165 of the Rhine only work correctly with I/O space accesses. */
166 #if defined(VIA_USE_MEMORY)
167 #warning Many adapters using the VIA Rhine chip are not configured to work
168 #warning with PCI memory space accesses.
169 #else
170 #define USE_IO
171 #undef readb
172 #undef readw
173 #undef readl
174 #undef writeb
175 #undef writew
176 #undef writel
177 #define readb inb
178 #define readw inw
179 #define readl inl
180 #define writeb outb
181 #define writew outw
182 #define writel outl
183 #endif
184
185 MODULE_AUTHOR("Donald Becker <becker@scyld.com>");
186 MODULE_DESCRIPTION("VIA Rhine PCI Fast Ethernet driver");
187 MODULE_PARM(max_interrupt_work, "i");
188 MODULE_PARM(debug, "i");
189 MODULE_PARM(rx_copybreak, "i");
190 MODULE_PARM(options, "1-" __MODULE_STRING(MAX_UNITS) "i");
191 MODULE_PARM(full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
192 MODULE_PARM_DESC(max_interrupt_work, "VIA Rhine maximum events handled per interrupt");
193 MODULE_PARM_DESC(debug, "VIA Rhine debug level (0-7)");
194 MODULE_PARM_DESC(rx_copybreak, "VIA Rhine copy breakpoint for copy-only-tiny-frames");
195 MODULE_PARM_DESC(options, "VIA Rhine: Bits 0-3: media type, bit 17: full duplex");
196 MODULE_PARM_DESC(full_duplex, "VIA Rhine full duplex setting(s) (1)");
197
198 /*
199 Theory of Operation
200
201 I. Board Compatibility
202
203 This driver is designed for the VIA 86c100A Rhine-II PCI Fast Ethernet
204 controller.
205
206 II. Board-specific settings
207
208 Boards with this chip are functional only in a bus-master PCI slot.
209
210 Many operational settings are loaded from the EEPROM to the Config word at
211 offset 0x78. This driver assumes that they are correct.
212 If this driver is compiled to use PCI memory space operations the EEPROM
213 must be configured to enable memory ops.
214
215 III. Driver operation
216
217 IIIa. Ring buffers
218
219 This driver uses two statically allocated fixed-size descriptor lists
220 formed into rings by a branch from the final descriptor to the beginning of
221 the list. The ring sizes are set at compile time by RX/TX_RING_SIZE.
222
223 IIIb/c. Transmit/Receive Structure
224
225 This driver attempts to use a zero-copy receive and transmit scheme.
226
227 Alas, all data buffers are required to start on a 32 bit boundary, so
228 the driver must often copy transmit packets into bounce buffers.
229
230 The driver allocates full frame size skbuffs for the Rx ring buffers at
231 open() time and passes the skb->data field to the chip as receive data
232 buffers. When an incoming frame is less than RX_COPYBREAK bytes long,
233 a fresh skbuff is allocated and the frame is copied to the new skbuff.
234 When the incoming frame is larger, the skbuff is passed directly up the
235 protocol stack. Buffers consumed this way are replaced by newly allocated
236 skbuffs in the last phase of via_rhine_rx().
237
238 The RX_COPYBREAK value is chosen to trade-off the memory wasted by
239 using a full-sized skbuff for small frames vs. the copying costs of larger
240 frames. New boards are typically used in generously configured machines
241 and the underfilled buffers have negligible impact compared to the benefit of
242 a single allocation size, so the default value of zero results in never
243 copying packets. When copying is done, the cost is usually mitigated by using
244 a combined copy/checksum routine. Copying also preloads the cache, which is
245 most useful with small frames.
246
247 Since the VIA chips are only able to transfer data to buffers on 32 bit
248 boundaries, the IP header at offset 14 in an ethernet frame isn't
249 longword aligned for further processing. Copying these unaligned buffers
250 has the beneficial effect of 16-byte aligning the IP header.
251
252 IIId. Synchronization
253
254 The driver runs as two independent, single-threaded flows of control. One
255 is the send-packet routine, which enforces single-threaded use by the
256 dev->priv->lock spinlock. The other thread is the interrupt handler, which
257 is single threaded by the hardware and interrupt handling software.
258
259 The send packet thread has partial control over the Tx ring. It locks the
260 dev->priv->lock whenever it's queuing a Tx packet. If the next slot in the ring
261 is not available it stops the transmit queue by calling netif_stop_queue.
262
263 The interrupt handler has exclusive control over the Rx ring and records stats
264 from the Tx ring. After reaping the stats, it marks the Tx queue entry as
265 empty by incrementing the dirty_tx mark. If at least half of the entries in
266 the Rx ring are available the transmit queue is woken up if it was stopped.
267
268 IV. Notes
269
270 IVb. References
271
272 Preliminary VT86C100A manual from http://www.via.com.tw/
273 http://www.scyld.com/expert/100mbps.html
274 http://www.scyld.com/expert/NWay.html
275 ftp://ftp.via.com.tw/public/lan/Products/NIC/VT86C100A/Datasheet/VT86C100A03.pdf
276 ftp://ftp.via.com.tw/public/lan/Products/NIC/VT6102/Datasheet/VT6102_021.PDF
277
278
279 IVc. Errata
280
281 The VT86C100A manual is not reliable information.
282 The 3043 chip does not handle unaligned transmit or receive buffers, resulting
283 in significant performance degradation for bounce buffer copies on transmit
284 and unaligned IP headers on receive.
285 The chip does not pad to minimum transmit length.
286
287 */
288
289
290 /* This table drives the PCI probe routines. It's mostly boilerplate in all
291 of the drivers, and will likely be provided by some future kernel.
292 Note the matching code -- the first table entry matchs all 56** cards but
293 second only the 1234 card.
294 */
295
296 enum pci_flags_bit {
297 PCI_USES_IO=1, PCI_USES_MEM=2, PCI_USES_MASTER=4,
298 PCI_ADDR0=0x10<<0, PCI_ADDR1=0x10<<1, PCI_ADDR2=0x10<<2, PCI_ADDR3=0x10<<3,
299 };
300
301 enum via_rhine_chips {
302 VT86C100A = 0,
303 VT6102,
304 VT3043,
305 };
306
307 struct via_rhine_chip_info {
308 const char *name;
309 u16 pci_flags;
310 int io_size;
311 int drv_flags;
312 };
313
314
315 enum chip_capability_flags {
316 CanHaveMII=1, HasESIPhy=2, HasDavicomPhy=4,
317 ReqTxAlign=0x10, HasWOL=0x20, };
318
319 #if defined(VIA_USE_MEMORY)
320 #define RHINE_IOTYPE (PCI_USES_MEM | PCI_USES_MASTER | PCI_ADDR1)
321 #define RHINEII_IOSIZE 4096
322 #else
323 #define RHINE_IOTYPE (PCI_USES_IO | PCI_USES_MASTER | PCI_ADDR0)
324 #define RHINEII_IOSIZE 256
325 #endif
326
327 /* directly indexed by enum via_rhine_chips, above */
328 static struct via_rhine_chip_info via_rhine_chip_info[] __devinitdata =
329 {
330 { "VIA VT86C100A Rhine", RHINE_IOTYPE, 128,
331 CanHaveMII | ReqTxAlign },
332 { "VIA VT6102 Rhine-II", RHINE_IOTYPE, RHINEII_IOSIZE,
333 CanHaveMII | HasWOL },
334 { "VIA VT3043 Rhine", RHINE_IOTYPE, 128,
335 CanHaveMII | ReqTxAlign }
336 };
337
338 static struct pci_device_id via_rhine_pci_tbl[] __devinitdata =
339 {
340 {0x1106, 0x6100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, VT86C100A},
341 {0x1106, 0x3065, PCI_ANY_ID, PCI_ANY_ID, 0, 0, VT6102},
342 {0x1106, 0x3043, PCI_ANY_ID, PCI_ANY_ID, 0, 0, VT3043},
343 {0,} /* terminate list */
344 };
345 MODULE_DEVICE_TABLE(pci, via_rhine_pci_tbl);
346
347
348 /* Offsets to the device registers. */
349 enum register_offsets {
350 StationAddr=0x00, RxConfig=0x06, TxConfig=0x07, ChipCmd=0x08,
351 IntrStatus=0x0C, IntrEnable=0x0E,
352 MulticastFilter0=0x10, MulticastFilter1=0x14,
353 RxRingPtr=0x18, TxRingPtr=0x1C, GFIFOTest=0x54,
354 MIIPhyAddr=0x6C, MIIStatus=0x6D, PCIBusConfig=0x6E,
355 MIICmd=0x70, MIIRegAddr=0x71, MIIData=0x72, MACRegEEcsr=0x74,
356 Config=0x78, ConfigA=0x7A, RxMissed=0x7C, RxCRCErrs=0x7E,
357 StickyHW=0x83, WOLcrClr=0xA4, WOLcgClr=0xA7, PwrcsrClr=0xAC,
358 };
359
360 /* Bits in the interrupt status/mask registers. */
361 enum intr_status_bits {
362 IntrRxDone=0x0001, IntrRxErr=0x0004, IntrRxEmpty=0x0020,
363 IntrTxDone=0x0002, IntrTxAbort=0x0008, IntrTxUnderrun=0x0010,
364 IntrPCIErr=0x0040,
365 IntrStatsMax=0x0080, IntrRxEarly=0x0100, IntrMIIChange=0x0200,
366 IntrRxOverflow=0x0400, IntrRxDropped=0x0800, IntrRxNoBuf=0x1000,
367 IntrTxAborted=0x2000, IntrLinkChange=0x4000,
368 IntrRxWakeUp=0x8000,
369 IntrNormalSummary=0x0003, IntrAbnormalSummary=0xC260,
370 };
371
372 /* MII interface, status flags.
373 Not to be confused with the MIIStatus register ... */
374 enum mii_status_bits {
375 MIICap100T4 = 0x8000,
376 MIICap10100HdFd = 0x7800,
377 MIIPreambleSupr = 0x0040,
378 MIIAutoNegCompleted = 0x0020,
379 MIIRemoteFault = 0x0010,
380 MIICapAutoNeg = 0x0008,
381 MIILink = 0x0004,
382 MIIJabber = 0x0002,
383 MIIExtended = 0x0001
384 };
385
386 /* The Rx and Tx buffer descriptors. */
387 struct rx_desc {
388 s32 rx_status;
389 u32 desc_length;
390 u32 addr;
391 u32 next_desc;
392 };
393 struct tx_desc {
394 s32 tx_status;
395 u32 desc_length;
396 u32 addr;
397 u32 next_desc;
398 };
399
400 /* Bits in *_desc.status */
401 enum rx_status_bits {
402 RxOK=0x8000, RxWholePkt=0x0300, RxErr=0x008F
403 };
404
405 enum desc_status_bits {
406 DescOwn=0x80000000, DescEndPacket=0x4000, DescIntr=0x1000,
407 };
408
409 /* Bits in ChipCmd. */
410 enum chip_cmd_bits {
411 CmdInit=0x0001, CmdStart=0x0002, CmdStop=0x0004, CmdRxOn=0x0008,
412 CmdTxOn=0x0010, CmdTxDemand=0x0020, CmdRxDemand=0x0040,
413 CmdEarlyRx=0x0100, CmdEarlyTx=0x0200, CmdFDuplex=0x0400,
414 CmdNoTxPoll=0x0800, CmdReset=0x8000,
415 };
416
417 #define MAX_MII_CNT 4
418 struct netdev_private {
419 /* Descriptor rings */
420 struct rx_desc *rx_ring;
421 struct tx_desc *tx_ring;
422 dma_addr_t rx_ring_dma;
423 dma_addr_t tx_ring_dma;
424
425 /* The addresses of receive-in-place skbuffs. */
426 struct sk_buff *rx_skbuff[RX_RING_SIZE];
427 dma_addr_t rx_skbuff_dma[RX_RING_SIZE];
428
429 /* The saved address of a sent-in-place packet/buffer, for later free(). */
430 struct sk_buff *tx_skbuff[TX_RING_SIZE];
431 dma_addr_t tx_skbuff_dma[TX_RING_SIZE];
432
433 /* Tx bounce buffers */
434 unsigned char *tx_buf[TX_RING_SIZE];
435 unsigned char *tx_bufs;
436 dma_addr_t tx_bufs_dma;
437
438 struct pci_dev *pdev;
439 struct net_device_stats stats;
440 struct timer_list timer; /* Media monitoring timer. */
441 spinlock_t lock;
442
443 /* Frequently used values: keep some adjacent for cache effect. */
444 int chip_id, drv_flags;
445 struct rx_desc *rx_head_desc;
446 unsigned int cur_rx, dirty_rx; /* Producer/consumer ring indices */
447 unsigned int cur_tx, dirty_tx;
448 unsigned int rx_buf_sz; /* Based on MTU+slack. */
449 u16 chip_cmd; /* Current setting for ChipCmd */
450
451 /* These values are keep track of the transceiver/media in use. */
452 unsigned int full_duplex:1; /* Full-duplex operation requested. */
453 unsigned int duplex_lock:1;
454 unsigned int default_port:4; /* Last dev->if_port value. */
455 u8 tx_thresh, rx_thresh;
456
457 /* MII transceiver section. */
458 u16 advertising; /* NWay media advertisement */
459 unsigned char phys[MAX_MII_CNT]; /* MII device addresses. */
460 unsigned int mii_cnt; /* number of MIIs found, but only the first one is used */
461 u16 mii_status; /* last read MII status */
462 };
463
464 static int mdio_read(struct net_device *dev, int phy_id, int location);
465 static void mdio_write(struct net_device *dev, int phy_id, int location, int value);
466 static int via_rhine_open(struct net_device *dev);
467 static void via_rhine_check_duplex(struct net_device *dev);
468 static void via_rhine_timer(unsigned long data);
469 static void via_rhine_tx_timeout(struct net_device *dev);
470 static int via_rhine_start_tx(struct sk_buff *skb, struct net_device *dev);
471 static void via_rhine_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
472 static void via_rhine_tx(struct net_device *dev);
473 static void via_rhine_rx(struct net_device *dev);
474 static void via_rhine_error(struct net_device *dev, int intr_status);
475 static void via_rhine_set_rx_mode(struct net_device *dev);
476 static struct net_device_stats *via_rhine_get_stats(struct net_device *dev);
477 static int mii_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
478 static int via_rhine_close(struct net_device *dev);
479 static inline void clear_tally_counters(long ioaddr);
480
481 static void wait_for_reset(struct net_device *dev, char *name)
482 {
483 struct netdev_private *np = dev->priv;
484 long ioaddr = dev->base_addr;
485 int chip_id = np->chip_id;
486 int i;
487
488 /* 3043 may need long delay after reset (dlink) */
489 if (chip_id == VT3043 || chip_id == VT86C100A)
490 udelay(100);
491
492 i = 0;
493 do {
494 udelay(5);
495 i++;
496 if(i > 2000) {
497 printk(KERN_ERR "%s: reset did not complete in 10 ms.\n", name);
498 break;
499 }
500 } while(readw(ioaddr + ChipCmd) & CmdReset);
501 if (debug > 1)
502 printk(KERN_INFO "%s: reset finished after %d microseconds.\n",
503 name, 5*i);
504 }
505
506 static int __devinit via_rhine_init_one (struct pci_dev *pdev,
507 const struct pci_device_id *ent)
508 {
509 struct net_device *dev;
510 struct netdev_private *np;
511 int i, option;
512 int chip_id = (int) ent->driver_data;
513 static int card_idx = -1;
514 long ioaddr;
515 int io_size;
516 int pci_flags;
517
518 /* when built into the kernel, we only print version if device is found */
519 #ifndef MODULE
520 static int printed_version;
521 if (!printed_version++)
522 printk(version);
523 #endif
524
525 card_idx++;
526 option = card_idx < MAX_UNITS ? options[card_idx] : 0;
527 io_size = via_rhine_chip_info[chip_id].io_size;
528 pci_flags = via_rhine_chip_info[chip_id].pci_flags;
529
530 if (pci_enable_device (pdev))
531 goto err_out;
532
533 /* this should always be supported */
534 if (pci_set_dma_mask(pdev, 0xffffffff)) {
535 printk(KERN_ERR "32-bit PCI DMA addresses not supported by the card!?\n");
536 goto err_out;
537 }
538
539 /* sanity check */
540 if ((pci_resource_len (pdev, 0) < io_size) ||
541 (pci_resource_len (pdev, 1) < io_size)) {
542 printk (KERN_ERR "Insufficient PCI resources, aborting\n");
543 goto err_out;
544 }
545
546 ioaddr = pci_resource_start (pdev, pci_flags & PCI_ADDR0 ? 0 : 1);
547
548 if (pci_flags & PCI_USES_MASTER)
549 pci_set_master (pdev);
550
551 dev = alloc_etherdev(sizeof(*np));
552 if (dev == NULL) {
553 printk (KERN_ERR "init_ethernet failed for card #%d\n", card_idx);
554 goto err_out;
555 }
556 SET_MODULE_OWNER(dev);
557
558 if (pci_request_regions(pdev, shortname))
559 goto err_out_free_netdev;
560
561 #ifndef USE_IO
562 ioaddr = (long) ioremap (ioaddr, io_size);
563 if (!ioaddr) {
564 printk (KERN_ERR "ioremap failed for device %s, region 0x%X @ 0x%X\n",
565 pdev->slot_name, io_size,
566 pci_resource_start (pdev, 1));
567 goto err_out_free_res;
568 }
569 #endif
570
571 /* D-Link provided reset code (with comment additions) */
572 if (via_rhine_chip_info[chip_id].drv_flags & HasWOL) {
573 unsigned char byOrgValue;
574
575 /* clear sticky bit before reset & read ethernet address */
576 byOrgValue = readb(ioaddr + StickyHW);
577 byOrgValue = byOrgValue & 0xFC;
578 writeb(byOrgValue, ioaddr + StickyHW);
579
580 /* (bits written are cleared?) */
581 /* disable force PME-enable */
582 writeb(0x80, ioaddr + WOLcgClr);
583 /* disable power-event config bit */
584 writeb(0xFF, ioaddr + WOLcrClr);
585 /* clear power status (undocumented in vt6102 docs?) */
586 writeb(0xFF, ioaddr + PwrcsrClr);
587 }
588
589 /* Reset the chip to erase previous misconfiguration. */
590 writew(CmdReset, ioaddr + ChipCmd);
591
592 dev->base_addr = ioaddr;
593 wait_for_reset(dev, shortname);
594
595 /* Reload the station address from the EEPROM. */
596 writeb(0x20, ioaddr + MACRegEEcsr);
597 /* Typically 2 cycles to reload. */
598 for (i = 0; i < 150; i++)
599 if (! (readb(ioaddr + MACRegEEcsr) & 0x20))
600 break;
601 for (i = 0; i < 6; i++)
602 dev->dev_addr[i] = readb(ioaddr + StationAddr + i);
603
604 if (!is_valid_ether_addr(dev->dev_addr)) {
605 printk(KERN_ERR "Invalid MAC address for card #%d\n", card_idx);
606 goto err_out_unmap;
607 }
608
609 if (chip_id == VT6102) {
610 /*
611 * for 3065D, EEPROM reloaded will cause bit 0 in MAC_REG_CFGA
612 * turned on. it makes MAC receive magic packet
613 * automatically. So, we turn it off. (D-Link)
614 */
615 writeb(readb(ioaddr + ConfigA) & 0xFE, ioaddr + ConfigA);
616 }
617
618 dev->irq = pdev->irq;
619
620 np = dev->priv;
621 spin_lock_init (&np->lock);
622 np->chip_id = chip_id;
623 np->drv_flags = via_rhine_chip_info[chip_id].drv_flags;
624 np->pdev = pdev;
625
626 if (dev->mem_start)
627 option = dev->mem_start;
628
629 /* The lower four bits are the media type. */
630 if (option > 0) {
631 if (option & 0x200)
632 np->full_duplex = 1;
633 np->default_port = option & 15;
634 }
635 if (card_idx < MAX_UNITS && full_duplex[card_idx] > 0)
636 np->full_duplex = 1;
637
638 if (np->full_duplex) {
639 printk(KERN_INFO "%s: Set to forced full duplex, autonegotiation"
640 " disabled.\n", dev->name);
641 np->duplex_lock = 1;
642 }
643
644 /* The chip-specific entries in the device structure. */
645 dev->open = via_rhine_open;
646 dev->hard_start_xmit = via_rhine_start_tx;
647 dev->stop = via_rhine_close;
648 dev->get_stats = via_rhine_get_stats;
649 dev->set_multicast_list = via_rhine_set_rx_mode;
650 dev->do_ioctl = mii_ioctl;
651 dev->tx_timeout = via_rhine_tx_timeout;
652 dev->watchdog_timeo = TX_TIMEOUT;
653 if (np->drv_flags & ReqTxAlign)
654 dev->features |= NETIF_F_SG|NETIF_F_HW_CSUM;
655
656 i = register_netdev(dev);
657 if (i)
658 goto err_out_unmap;
659
660 printk(KERN_INFO "%s: %s at 0x%lx, ",
661 dev->name, via_rhine_chip_info[chip_id].name, ioaddr);
662 for (i = 0; i < 5; i++)
663 printk("%2.2x:", dev->dev_addr[i]);
664 printk("%2.2x, IRQ %d.\n", dev->dev_addr[i], pdev->irq);
665
666 pci_set_drvdata(pdev, dev);
667
668 if (np->drv_flags & CanHaveMII) {
669 int phy, phy_idx = 0;
670 np->phys[0] = 1; /* Standard for this chip. */
671 for (phy = 1; phy < 32 && phy_idx < MAX_MII_CNT; phy++) {
672 int mii_status = mdio_read(dev, phy, 1);
673 if (mii_status != 0xffff && mii_status != 0x0000) {
674 np->phys[phy_idx++] = phy;
675 np->advertising = mdio_read(dev, phy, 4);
676 printk(KERN_INFO "%s: MII PHY found at address %d, status "
677 "0x%4.4x advertising %4.4x Link %4.4x.\n",
678 dev->name, phy, mii_status, np->advertising,
679 mdio_read(dev, phy, 5));
680
681 /* set IFF_RUNNING */
682 if (mii_status & MIILink)
683 netif_carrier_on(dev);
684 else
685 netif_carrier_off(dev);
686 }
687 }
688 np->mii_cnt = phy_idx;
689 }
690
691 /* Allow forcing the media type. */
692 if (option > 0) {
693 if (option & 0x220)
694 np->full_duplex = 1;
695 np->default_port = option & 0x3ff;
696 if (np->default_port & 0x330) {
697 /* FIXME: shouldn't someone check this variable? */
698 /* np->medialock = 1; */
699 printk(KERN_INFO " Forcing %dMbs %s-duplex operation.\n",
700 (option & 0x300 ? 100 : 10),
701 (option & 0x220 ? "full" : "half"));
702 if (np->mii_cnt)
703 mdio_write(dev, np->phys[0], 0,
704 ((option & 0x300) ? 0x2000 : 0) | /* 100mbps? */
705 ((option & 0x220) ? 0x0100 : 0)); /* Full duplex? */
706 }
707 }
708
709 return 0;
710
711 err_out_unmap:
712 #ifndef USE_IO
713 iounmap((void *)ioaddr);
714 err_out_free_res:
715 #endif
716 pci_release_regions(pdev);
717 err_out_free_netdev:
718 kfree (dev);
719 err_out:
720 return -ENODEV;
721 }
722
723 static int alloc_ring(struct net_device* dev)
724 {
725 struct netdev_private *np = dev->priv;
726 void *ring;
727 dma_addr_t ring_dma;
728
729 ring = pci_alloc_consistent(np->pdev,
730 RX_RING_SIZE * sizeof(struct rx_desc) +
731 TX_RING_SIZE * sizeof(struct tx_desc),
732 &ring_dma);
733 if (!ring) {
734 printk(KERN_ERR "Could not allocate DMA memory.\n");
735 return -ENOMEM;
736 }
737 if (np->drv_flags & ReqTxAlign) {
738 np->tx_bufs = pci_alloc_consistent(np->pdev, PKT_BUF_SZ * TX_RING_SIZE,
739 &np->tx_bufs_dma);
740 if (np->tx_bufs == NULL) {
741 pci_free_consistent(np->pdev,
742 RX_RING_SIZE * sizeof(struct rx_desc) +
743 TX_RING_SIZE * sizeof(struct tx_desc),
744 ring, ring_dma);
745 return -ENOMEM;
746 }
747 }
748
749 np->rx_ring = ring;
750 np->tx_ring = ring + RX_RING_SIZE * sizeof(struct rx_desc);
751 np->rx_ring_dma = ring_dma;
752 np->tx_ring_dma = ring_dma + RX_RING_SIZE * sizeof(struct rx_desc);
753
754 return 0;
755 }
756
757 void free_ring(struct net_device* dev)
758 {
759 struct netdev_private *np = dev->priv;
760
761 pci_free_consistent(np->pdev,
762 RX_RING_SIZE * sizeof(struct rx_desc) +
763 TX_RING_SIZE * sizeof(struct tx_desc),
764 np->rx_ring, np->rx_ring_dma);
765
766 if (np->tx_bufs)
767 pci_free_consistent(np->pdev, PKT_BUF_SZ * TX_RING_SIZE,
768 np->tx_bufs, np->tx_bufs_dma);
769
770 np->tx_bufs = NULL;
771
772 }
773
774 static void alloc_rbufs(struct net_device *dev)
775 {
776 struct netdev_private *np = dev->priv;
777 dma_addr_t next;
778 int i;
779
780 np->dirty_rx = np->cur_rx = 0;
781
782 np->rx_buf_sz = (dev->mtu <= 1500 ? PKT_BUF_SZ : dev->mtu + 32);
783 np->rx_head_desc = &np->rx_ring[0];
784 next = np->rx_ring_dma;
785
786 /* Init the ring entries */
787 for (i = 0; i < RX_RING_SIZE; i++) {
788 np->rx_ring[i].rx_status = 0;
789 np->rx_ring[i].desc_length = cpu_to_le32(np->rx_buf_sz);
790 next += sizeof(struct rx_desc);
791 np->rx_ring[i].next_desc = cpu_to_le32(next);
792 np->rx_skbuff[i] = 0;
793 }
794 /* Mark the last entry as wrapping the ring. */
795 np->rx_ring[i-1].next_desc = cpu_to_le32(np->rx_ring_dma);
796
797 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
798 for (i = 0; i < RX_RING_SIZE; i++) {
799 struct sk_buff *skb = dev_alloc_skb(np->rx_buf_sz);
800 np->rx_skbuff[i] = skb;
801 if (skb == NULL)
802 break;
803 skb->dev = dev; /* Mark as being used by this device. */
804
805 np->rx_skbuff_dma[i] =
806 pci_map_single(np->pdev, skb->tail, np->rx_buf_sz,
807 PCI_DMA_FROMDEVICE);
808
809 np->rx_ring[i].addr = cpu_to_le32(np->rx_skbuff_dma[i]);
810 np->rx_ring[i].rx_status = cpu_to_le32(DescOwn);
811 }
812 np->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
813 }
814
815 static void free_rbufs(struct net_device* dev)
816 {
817 struct netdev_private *np = dev->priv;
818 int i;
819
820 /* Free all the skbuffs in the Rx queue. */
821 for (i = 0; i < RX_RING_SIZE; i++) {
822 np->rx_ring[i].rx_status = 0;
823 np->rx_ring[i].addr = cpu_to_le32(0xBADF00D0); /* An invalid address. */
824 if (np->rx_skbuff[i]) {
825 pci_unmap_single(np->pdev,
826 np->rx_skbuff_dma[i],
827 np->rx_buf_sz, PCI_DMA_FROMDEVICE);
828 dev_kfree_skb(np->rx_skbuff[i]);
829 }
830 np->rx_skbuff[i] = 0;
831 }
832 }
833
834 static void alloc_tbufs(struct net_device* dev)
835 {
836 struct netdev_private *np = dev->priv;
837 dma_addr_t next;
838 int i;
839
840 np->dirty_tx = np->cur_tx = 0;
841 next = np->tx_ring_dma;
842 for (i = 0; i < TX_RING_SIZE; i++) {
843 np->tx_skbuff[i] = 0;
844 np->tx_ring[i].tx_status = 0;
845 np->tx_ring[i].desc_length = cpu_to_le32(0x00e08000);
846 next += sizeof(struct tx_desc);
847 np->tx_ring[i].next_desc = cpu_to_le32(next);
848 np->tx_buf[i] = &np->tx_bufs[i * PKT_BUF_SZ];
849 }
850 np->tx_ring[i-1].next_desc = cpu_to_le32(np->tx_ring_dma);
851
852 }
853
854 static void free_tbufs(struct net_device* dev)
855 {
856 struct netdev_private *np = dev->priv;
857 int i;
858
859 for (i = 0; i < TX_RING_SIZE; i++) {
860 np->tx_ring[i].tx_status = 0;
861 np->tx_ring[i].desc_length = cpu_to_le32(0x00e08000);
862 np->tx_ring[i].addr = cpu_to_le32(0xBADF00D0); /* An invalid address. */
863 if (np->tx_skbuff[i]) {
864 if (np->tx_skbuff_dma[i]) {
865 pci_unmap_single(np->pdev,
866 np->tx_skbuff_dma[i],
867 np->tx_skbuff[i]->len, PCI_DMA_TODEVICE);
868 }
869 dev_kfree_skb(np->tx_skbuff[i]);
870 }
871 np->tx_skbuff[i] = 0;
872 np->tx_buf[i] = 0;
873 }
874 }
875
876 static void init_registers(struct net_device *dev)
877 {
878 struct netdev_private *np = dev->priv;
879 long ioaddr = dev->base_addr;
880 int i;
881
882 for (i = 0; i < 6; i++)
883 writeb(dev->dev_addr[i], ioaddr + StationAddr + i);
884
885 /* Initialize other registers. */
886 writew(0x0006, ioaddr + PCIBusConfig); /* Tune configuration??? */
887 /* Configure the FIFO thresholds. */
888 writeb(0x20, ioaddr + TxConfig); /* Initial threshold 32 bytes */
889 np->tx_thresh = 0x20;
890 np->rx_thresh = 0x60; /* Written in via_rhine_set_rx_mode(). */
891
892 if (dev->if_port == 0)
893 dev->if_port = np->default_port;
894
895 writel(np->rx_ring_dma, ioaddr + RxRingPtr);
896 writel(np->tx_ring_dma, ioaddr + TxRingPtr);
897
898 via_rhine_set_rx_mode(dev);
899
900 /* Enable interrupts by setting the interrupt mask. */
901 writew(IntrRxDone | IntrRxErr | IntrRxEmpty| IntrRxOverflow| IntrRxDropped|
902 IntrTxDone | IntrTxAbort | IntrTxUnderrun |
903 IntrPCIErr | IntrStatsMax | IntrLinkChange | IntrMIIChange,
904 ioaddr + IntrEnable);
905
906 np->chip_cmd = CmdStart|CmdTxOn|CmdRxOn|CmdNoTxPoll;
907 if (np->duplex_lock)
908 np->chip_cmd |= CmdFDuplex;
909 writew(np->chip_cmd, ioaddr + ChipCmd);
910
911 via_rhine_check_duplex(dev);
912
913 /* The LED outputs of various MII xcvrs should be configured. */
914 /* For NS or Mison phys, turn on bit 1 in register 0x17 */
915 /* For ESI phys, turn on bit 7 in register 0x17. */
916 mdio_write(dev, np->phys[0], 0x17, mdio_read(dev, np->phys[0], 0x17) |
917 (np->drv_flags & HasESIPhy) ? 0x0080 : 0x0001);
918 }
919 /* Read and write over the MII Management Data I/O (MDIO) interface. */
920
921 static int mdio_read(struct net_device *dev, int phy_id, int regnum)
922 {
923 long ioaddr = dev->base_addr;
924 int boguscnt = 1024;
925
926 /* Wait for a previous command to complete. */
927 while ((readb(ioaddr + MIICmd) & 0x60) && --boguscnt > 0)
928 ;
929 writeb(0x00, ioaddr + MIICmd);
930 writeb(phy_id, ioaddr + MIIPhyAddr);
931 writeb(regnum, ioaddr + MIIRegAddr);
932 writeb(0x40, ioaddr + MIICmd); /* Trigger read */
933 boguscnt = 1024;
934 while ((readb(ioaddr + MIICmd) & 0x40) && --boguscnt > 0)
935 ;
936 return readw(ioaddr + MIIData);
937 }
938
939 static void mdio_write(struct net_device *dev, int phy_id, int regnum, int value)
940 {
941 struct netdev_private *np = dev->priv;
942 long ioaddr = dev->base_addr;
943 int boguscnt = 1024;
944
945 if (phy_id == np->phys[0]) {
946 switch (regnum) {
947 case 0: /* Is user forcing speed/duplex? */
948 if (value & 0x9000) /* Autonegotiation. */
949 np->duplex_lock = 0;
950 else
951 np->full_duplex = (value & 0x0100) ? 1 : 0;
952 break;
953 case 4:
954 np->advertising = value;
955 break;
956 }
957 }
958
959 /* Wait for a previous command to complete. */
960 while ((readb(ioaddr + MIICmd) & 0x60) && --boguscnt > 0)
961 ;
962 writeb(0x00, ioaddr + MIICmd);
963 writeb(phy_id, ioaddr + MIIPhyAddr);
964 writeb(regnum, ioaddr + MIIRegAddr);
965 writew(value, ioaddr + MIIData);
966 writeb(0x20, ioaddr + MIICmd); /* Trigger write. */
967 }
968
969
970 static int via_rhine_open(struct net_device *dev)
971 {
972 struct netdev_private *np = dev->priv;
973 long ioaddr = dev->base_addr;
974 int i;
975
976 /* Reset the chip. */
977 writew(CmdReset, ioaddr + ChipCmd);
978
979 i = request_irq(np->pdev->irq, &via_rhine_interrupt, SA_SHIRQ, dev->name, dev);
980 if (i)
981 return i;
982
983 if (debug > 1)
984 printk(KERN_DEBUG "%s: via_rhine_open() irq %d.\n",
985 dev->name, np->pdev->irq);
986
987 i = alloc_ring(dev);
988 if (i)
989 return i;
990 alloc_rbufs(dev);
991 alloc_tbufs(dev);
992 wait_for_reset(dev, dev->name);
993 init_registers(dev);
994 if (debug > 2)
995 printk(KERN_DEBUG "%s: Done via_rhine_open(), status %4.4x "
996 "MII status: %4.4x.\n",
997 dev->name, readw(ioaddr + ChipCmd),
998 mdio_read(dev, np->phys[0], 1));
999
1000 netif_start_queue(dev);
1001
1002 /* Set the timer to check for link beat. */
1003 init_timer(&np->timer);
1004 np->timer.expires = jiffies + 2;
1005 np->timer.data = (unsigned long)dev;
1006 np->timer.function = &via_rhine_timer; /* timer handler */
1007 add_timer(&np->timer);
1008
1009 return 0;
1010 }
1011
1012 static void via_rhine_check_duplex(struct net_device *dev)
1013 {
1014 struct netdev_private *np = dev->priv;
1015 long ioaddr = dev->base_addr;
1016 int mii_reg5 = mdio_read(dev, np->phys[0], 5);
1017 int negotiated = mii_reg5 & np->advertising;
1018 int duplex;
1019
1020 if (np->duplex_lock || mii_reg5 == 0xffff)
1021 return;
1022 duplex = (negotiated & 0x0100) || (negotiated & 0x01C0) == 0x0040;
1023 if (np->full_duplex != duplex) {
1024 np->full_duplex = duplex;
1025 if (debug)
1026 printk(KERN_INFO "%s: Setting %s-duplex based on MII #%d link"
1027 " partner capability of %4.4x.\n", dev->name,
1028 duplex ? "full" : "half", np->phys[0], mii_reg5);
1029 if (duplex)
1030 np->chip_cmd |= CmdFDuplex;
1031 else
1032 np->chip_cmd &= ~CmdFDuplex;
1033 writew(np->chip_cmd, ioaddr + ChipCmd);
1034 }
1035 }
1036
1037
1038 static void via_rhine_timer(unsigned long data)
1039 {
1040 struct net_device *dev = (struct net_device *)data;
1041 struct netdev_private *np = dev->priv;
1042 long ioaddr = dev->base_addr;
1043 int next_tick = 10*HZ;
1044 int mii_status;
1045
1046 if (debug > 3) {
1047 printk(KERN_DEBUG "%s: VIA Rhine monitor tick, status %4.4x.\n",
1048 dev->name, readw(ioaddr + IntrStatus));
1049 }
1050
1051 spin_lock_irq (&np->lock);
1052
1053 via_rhine_check_duplex(dev);
1054
1055 /* make IFF_RUNNING follow the MII status bit "Link established" */
1056 mii_status = mdio_read(dev, np->phys[0], 1);
1057 if ( (mii_status & MIILink) != (np->mii_status & MIILink) ) {
1058 if (mii_status & MIILink)
1059 netif_carrier_on(dev);
1060 else
1061 netif_carrier_off(dev);
1062 }
1063 np->mii_status = mii_status;
1064
1065 spin_unlock_irq (&np->lock);
1066
1067 np->timer.expires = jiffies + next_tick;
1068 add_timer(&np->timer);
1069 }
1070
1071
1072 static void via_rhine_tx_timeout (struct net_device *dev)
1073 {
1074 struct netdev_private *np = dev->priv;
1075 long ioaddr = dev->base_addr;
1076
1077 printk (KERN_WARNING "%s: Transmit timed out, status %4.4x, PHY status "
1078 "%4.4x, resetting...\n",
1079 dev->name, readw (ioaddr + IntrStatus),
1080 mdio_read (dev, np->phys[0], 1));
1081
1082 dev->if_port = 0;
1083
1084 /* protect against concurrent rx interrupts */
1085 disable_irq(np->pdev->irq);
1086
1087 spin_lock(&np->lock);
1088
1089 /* Reset the chip. */
1090 writew(CmdReset, ioaddr + ChipCmd);
1091
1092 /* clear all descriptors */
1093 free_tbufs(dev);
1094 free_rbufs(dev);
1095 alloc_tbufs(dev);
1096 alloc_rbufs(dev);
1097
1098 /* Reinitialize the hardware. */
1099 wait_for_reset(dev, dev->name);
1100 init_registers(dev);
1101
1102 spin_unlock(&np->lock);
1103 enable_irq(np->pdev->irq);
1104
1105 dev->trans_start = jiffies;
1106 np->stats.tx_errors++;
1107 netif_wake_queue(dev);
1108 }
1109
1110 static int via_rhine_start_tx(struct sk_buff *skb, struct net_device *dev)
1111 {
1112 struct netdev_private *np = dev->priv;
1113 unsigned entry;
1114
1115 /* Caution: the write order is important here, set the field
1116 with the "ownership" bits last. */
1117
1118 /* Calculate the next Tx descriptor entry. */
1119 entry = np->cur_tx % TX_RING_SIZE;
1120
1121 np->tx_skbuff[entry] = skb;
1122
1123 if ((np->drv_flags & ReqTxAlign) &&
1124 (((long)skb->data & 3) || skb_shinfo(skb)->nr_frags != 0 || skb->ip_summed == CHECKSUM_HW)
1125 ) {
1126 /* Must use alignment buffer. */
1127 if (skb->len > PKT_BUF_SZ) {
1128 /* packet too long, drop it */
1129 dev_kfree_skb(skb);
1130 np->tx_skbuff[entry] = NULL;
1131 np->stats.tx_dropped++;
1132 return 0;
1133 }
1134 skb_copy_and_csum_dev(skb, np->tx_buf[entry]);
1135 np->tx_skbuff_dma[entry] = 0;
1136 np->tx_ring[entry].addr = cpu_to_le32(np->tx_bufs_dma +
1137 (np->tx_buf[entry] - np->tx_bufs));
1138 } else {
1139 np->tx_skbuff_dma[entry] =
1140 pci_map_single(np->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1141 np->tx_ring[entry].addr = cpu_to_le32(np->tx_skbuff_dma[entry]);
1142 }
1143
1144 np->tx_ring[entry].desc_length =
1145 cpu_to_le32(0x00E08000 | (skb->len >= ETH_ZLEN ? skb->len : ETH_ZLEN));
1146
1147 /* lock eth irq */
1148 spin_lock_irq (&np->lock);
1149 wmb();
1150 np->tx_ring[entry].tx_status = cpu_to_le32(DescOwn);
1151 wmb();
1152
1153 np->cur_tx++;
1154
1155 /* Non-x86 Todo: explicitly flush cache lines here. */
1156
1157 /* Wake the potentially-idle transmit channel. */
1158 writew(CmdTxDemand | np->chip_cmd, dev->base_addr + ChipCmd);
1159
1160 if (np->cur_tx == np->dirty_tx + TX_QUEUE_LEN)
1161 netif_stop_queue(dev);
1162
1163 dev->trans_start = jiffies;
1164
1165 spin_unlock_irq (&np->lock);
1166
1167 if (debug > 4) {
1168 printk(KERN_DEBUG "%s: Transmit frame #%d queued in slot %d.\n",
1169 dev->name, np->cur_tx, entry);
1170 }
1171 return 0;
1172 }
1173
1174 /* The interrupt handler does all of the Rx thread work and cleans up
1175 after the Tx thread. */
1176 static void via_rhine_interrupt(int irq, void *dev_instance, struct pt_regs *rgs)
1177 {
1178 struct net_device *dev = dev_instance;
1179 long ioaddr;
1180 u32 intr_status;
1181 int boguscnt = max_interrupt_work;
1182
1183 ioaddr = dev->base_addr;
1184
1185 while ((intr_status = readw(ioaddr + IntrStatus))) {
1186 /* Acknowledge all of the current interrupt sources ASAP. */
1187 writew(intr_status & 0xffff, ioaddr + IntrStatus);
1188
1189 if (debug > 4)
1190 printk(KERN_DEBUG "%s: Interrupt, status %4.4x.\n",
1191 dev->name, intr_status);
1192
1193 if (intr_status & (IntrRxDone | IntrRxErr | IntrRxDropped |
1194 IntrRxWakeUp | IntrRxEmpty | IntrRxNoBuf))
1195 via_rhine_rx(dev);
1196
1197 if (intr_status & (IntrTxDone | IntrTxAbort | IntrTxUnderrun |
1198 IntrTxAborted))
1199 via_rhine_tx(dev);
1200
1201 /* Abnormal error summary/uncommon events handlers. */
1202 if (intr_status & (IntrPCIErr | IntrLinkChange | IntrMIIChange |
1203 IntrStatsMax | IntrTxAbort | IntrTxUnderrun))
1204 via_rhine_error(dev, intr_status);
1205
1206 if (--boguscnt < 0) {
1207 printk(KERN_WARNING "%s: Too much work at interrupt, "
1208 "status=0x%4.4x.\n",
1209 dev->name, intr_status);
1210 break;
1211 }
1212 }
1213
1214 if (debug > 3)
1215 printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
1216 dev->name, readw(ioaddr + IntrStatus));
1217 }
1218
1219 /* This routine is logically part of the interrupt handler, but isolated
1220 for clarity. */
1221 static void via_rhine_tx(struct net_device *dev)
1222 {
1223 struct netdev_private *np = dev->priv;
1224 int txstatus = 0, entry = np->dirty_tx % TX_RING_SIZE;
1225
1226 spin_lock (&np->lock);
1227
1228 /* find and cleanup dirty tx descriptors */
1229 while (np->dirty_tx != np->cur_tx) {
1230 txstatus = le32_to_cpu(np->tx_ring[entry].tx_status);
1231 if (txstatus & DescOwn)
1232 break;
1233 if (debug > 6)
1234 printk(KERN_DEBUG " Tx scavenge %d status %8.8x.\n",
1235 entry, txstatus);
1236 if (txstatus & 0x8000) {
1237 if (debug > 1)
1238 printk(KERN_DEBUG "%s: Transmit error, Tx status %8.8x.\n",
1239 dev->name, txstatus);
1240 np->stats.tx_errors++;
1241 if (txstatus & 0x0400) np->stats.tx_carrier_errors++;
1242 if (txstatus & 0x0200) np->stats.tx_window_errors++;
1243 if (txstatus & 0x0100) np->stats.tx_aborted_errors++;
1244 if (txstatus & 0x0080) np->stats.tx_heartbeat_errors++;
1245 if (txstatus & 0x0002) np->stats.tx_fifo_errors++;
1246 /* Transmitter restarted in 'abnormal' handler. */
1247 } else {
1248 np->stats.collisions += (txstatus >> 3) & 15;
1249 np->stats.tx_bytes += np->tx_skbuff[entry]->len;
1250 np->stats.tx_packets++;
1251 }
1252 /* Free the original skb. */
1253 if (np->tx_skbuff_dma[entry]) {
1254 pci_unmap_single(np->pdev,
1255 np->tx_skbuff_dma[entry],
1256 np->tx_skbuff[entry]->len, PCI_DMA_TODEVICE);
1257 }
1258 dev_kfree_skb_irq(np->tx_skbuff[entry]);
1259 np->tx_skbuff[entry] = NULL;
1260 entry = (++np->dirty_tx) % TX_RING_SIZE;
1261 }
1262 if ((np->cur_tx - np->dirty_tx) < TX_QUEUE_LEN - 4)
1263 netif_wake_queue (dev);
1264
1265 spin_unlock (&np->lock);
1266 }
1267
1268 /* This routine is logically part of the interrupt handler, but isolated
1269 for clarity and better register allocation. */
1270 static void via_rhine_rx(struct net_device *dev)
1271 {
1272 struct netdev_private *np = dev->priv;
1273 int entry = np->cur_rx % RX_RING_SIZE;
1274 int boguscnt = np->dirty_rx + RX_RING_SIZE - np->cur_rx;
1275
1276 if (debug > 4) {
1277 printk(KERN_DEBUG " In via_rhine_rx(), entry %d status %8.8x.\n",
1278 entry, le32_to_cpu(np->rx_head_desc->rx_status));
1279 }
1280
1281 /* If EOP is set on the next entry, it's a new packet. Send it up. */
1282 while ( ! (np->rx_head_desc->rx_status & cpu_to_le32(DescOwn))) {
1283 struct rx_desc *desc = np->rx_head_desc;
1284 u32 desc_status = le32_to_cpu(desc->rx_status);
1285 int data_size = desc_status >> 16;
1286
1287 if (debug > 4)
1288 printk(KERN_DEBUG " via_rhine_rx() status is %8.8x.\n",
1289 desc_status);
1290 if (--boguscnt < 0)
1291 break;
1292 if ( (desc_status & (RxWholePkt | RxErr)) != RxWholePkt) {
1293 if ((desc_status & RxWholePkt) != RxWholePkt) {
1294 printk(KERN_WARNING "%s: Oversized Ethernet frame spanned "
1295 "multiple buffers, entry %#x length %d status %8.8x!\n",
1296 dev->name, entry, data_size, desc_status);
1297 printk(KERN_WARNING "%s: Oversized Ethernet frame %p vs %p.\n",
1298 dev->name, np->rx_head_desc, &np->rx_ring[entry]);
1299 np->stats.rx_length_errors++;
1300 } else if (desc_status & RxErr) {
1301 /* There was a error. */
1302 if (debug > 2)
1303 printk(KERN_DEBUG " via_rhine_rx() Rx error was %8.8x.\n",
1304 desc_status);
1305 np->stats.rx_errors++;
1306 if (desc_status & 0x0030) np->stats.rx_length_errors++;
1307 if (desc_status & 0x0048) np->stats.rx_fifo_errors++;
1308 if (desc_status & 0x0004) np->stats.rx_frame_errors++;
1309 if (desc_status & 0x0002) {
1310 /* this can also be updated outside the interrupt handler */
1311 spin_lock (&np->lock);
1312 np->stats.rx_crc_errors++;
1313 spin_unlock (&np->lock);
1314 }
1315 }
1316 } else {
1317 struct sk_buff *skb;
1318 /* Length should omit the CRC */
1319 int pkt_len = data_size - 4;
1320
1321 /* Check if the packet is long enough to accept without copying
1322 to a minimally-sized skbuff. */
1323 if (pkt_len < rx_copybreak &&
1324 (skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
1325 skb->dev = dev;
1326 skb_reserve(skb, 2); /* 16 byte align the IP header */
1327 pci_dma_sync_single(np->pdev, np->rx_skbuff_dma[entry],
1328 np->rx_buf_sz, PCI_DMA_FROMDEVICE);
1329
1330 /* *_IP_COPYSUM isn't defined anywhere and eth_copy_and_sum
1331 is memcpy for all archs so this is kind of pointless right
1332 now ... or? */
1333 #if HAS_IP_COPYSUM /* Call copy + cksum if available. */
1334 eth_copy_and_sum(skb, np->rx_skbuff[entry]->tail, pkt_len, 0);
1335 skb_put(skb, pkt_len);
1336 #else
1337 memcpy(skb_put(skb, pkt_len), np->rx_skbuff[entry]->tail,
1338 pkt_len);
1339 #endif
1340 } else {
1341 skb = np->rx_skbuff[entry];
1342 if (skb == NULL) {
1343 printk(KERN_ERR "%s: Inconsistent Rx descriptor chain.\n",
1344 dev->name);
1345 break;
1346 }
1347 np->rx_skbuff[entry] = NULL;
1348 skb_put(skb, pkt_len);
1349 pci_unmap_single(np->pdev, np->rx_skbuff_dma[entry],
1350 np->rx_buf_sz, PCI_DMA_FROMDEVICE);
1351 }
1352 skb->protocol = eth_type_trans(skb, dev);
1353 netif_rx(skb);
1354 dev->last_rx = jiffies;
1355 np->stats.rx_bytes += pkt_len;
1356 np->stats.rx_packets++;
1357 }
1358 entry = (++np->cur_rx) % RX_RING_SIZE;
1359 np->rx_head_desc = &np->rx_ring[entry];
1360 }
1361
1362 /* Refill the Rx ring buffers. */
1363 for (; np->cur_rx - np->dirty_rx > 0; np->dirty_rx++) {
1364 struct sk_buff *skb;
1365 entry = np->dirty_rx % RX_RING_SIZE;
1366 if (np->rx_skbuff[entry] == NULL) {
1367 skb = dev_alloc_skb(np->rx_buf_sz);
1368 np->rx_skbuff[entry] = skb;
1369 if (skb == NULL)
1370 break; /* Better luck next round. */
1371 skb->dev = dev; /* Mark as being used by this device. */
1372 np->rx_skbuff_dma[entry] =
1373 pci_map_single(np->pdev, skb->tail, np->rx_buf_sz,
1374 PCI_DMA_FROMDEVICE);
1375 np->rx_ring[entry].addr = cpu_to_le32(np->rx_skbuff_dma[entry]);
1376 }
1377 np->rx_ring[entry].rx_status = cpu_to_le32(DescOwn);
1378 }
1379
1380 /* Pre-emptively restart Rx engine. */
1381 writew(CmdRxDemand | np->chip_cmd, dev->base_addr + ChipCmd);
1382 }
1383
1384 static void via_rhine_error(struct net_device *dev, int intr_status)
1385 {
1386 struct netdev_private *np = dev->priv;
1387 long ioaddr = dev->base_addr;
1388
1389 spin_lock (&np->lock);
1390
1391 if (intr_status & (IntrMIIChange | IntrLinkChange)) {
1392 if (readb(ioaddr + MIIStatus) & 0x02) {
1393 /* Link failed, restart autonegotiation. */
1394 if (np->drv_flags & HasDavicomPhy)
1395 mdio_write(dev, np->phys[0], 0, 0x3300);
1396 } else
1397 via_rhine_check_duplex(dev);
1398 if (debug)
1399 printk(KERN_ERR "%s: MII status changed: Autonegotiation "
1400 "advertising %4.4x partner %4.4x.\n", dev->name,
1401 mdio_read(dev, np->phys[0], 4),
1402 mdio_read(dev, np->phys[0], 5));
1403 }
1404 if (intr_status & IntrStatsMax) {
1405 np->stats.rx_crc_errors += readw(ioaddr + RxCRCErrs);
1406 np->stats.rx_missed_errors += readw(ioaddr + RxMissed);
1407 clear_tally_counters(ioaddr);
1408 }
1409 if (intr_status & IntrTxAbort) {
1410 /* Stats counted in Tx-done handler, just restart Tx. */
1411 writew(CmdTxDemand | np->chip_cmd, dev->base_addr + ChipCmd);
1412 }
1413 if (intr_status & IntrTxUnderrun) {
1414 if (np->tx_thresh < 0xE0)
1415 writeb(np->tx_thresh += 0x20, ioaddr + TxConfig);
1416 if (debug > 1)
1417 printk(KERN_INFO "%s: Transmitter underrun, increasing Tx "
1418 "threshold setting to %2.2x.\n", dev->name, np->tx_thresh);
1419 }
1420 if ((intr_status & ~( IntrLinkChange | IntrStatsMax |
1421 IntrTxAbort | IntrTxAborted))) {
1422 if (debug > 1)
1423 printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n",
1424 dev->name, intr_status);
1425 /* Recovery for other fault sources not known. */
1426 writew(CmdTxDemand | np->chip_cmd, dev->base_addr + ChipCmd);
1427 }
1428
1429 spin_unlock (&np->lock);
1430 }
1431
1432 static struct net_device_stats *via_rhine_get_stats(struct net_device *dev)
1433 {
1434 struct netdev_private *np = dev->priv;
1435 long ioaddr = dev->base_addr;
1436 unsigned long flags;
1437
1438 spin_lock_irqsave(&np->lock, flags);
1439 np->stats.rx_crc_errors += readw(ioaddr + RxCRCErrs);
1440 np->stats.rx_missed_errors += readw(ioaddr + RxMissed);
1441 clear_tally_counters(ioaddr);
1442 spin_unlock_irqrestore(&np->lock, flags);
1443
1444 return &np->stats;
1445 }
1446
1447 /* Clears the "tally counters" for CRC errors and missed frames(?).
1448 It has been reported that some chips need a write of 0 to clear
1449 these, for others the counters are set to 1 when written to and
1450 instead cleared when read. So we clear them both ways ... */
1451 static inline void clear_tally_counters(const long ioaddr)
1452 {
1453 writel(0, ioaddr + RxMissed);
1454 readw(ioaddr + RxCRCErrs);
1455 readw(ioaddr + RxMissed);
1456 }
1457
1458
1459 /* The big-endian AUTODIN II ethernet CRC calculation.
1460 N.B. Do not use for bulk data, use a table-based routine instead.
1461 This is common code and should be moved to net/core/crc.c */
1462 static unsigned const ethernet_polynomial = 0x04c11db7U;
1463 static inline u32 ether_crc(int length, unsigned char *data)
1464 {
1465 int crc = -1;
1466
1467 while(--length >= 0) {
1468 unsigned char current_octet = *data++;
1469 int bit;
1470 for (bit = 0; bit < 8; bit++, current_octet >>= 1) {
1471 crc = (crc << 1) ^
1472 ((crc < 0) ^ (current_octet & 1) ? ethernet_polynomial : 0);
1473 }
1474 }
1475 return crc;
1476 }
1477
1478 static void via_rhine_set_rx_mode(struct net_device *dev)
1479 {
1480 struct netdev_private *np = dev->priv;
1481 long ioaddr = dev->base_addr;
1482 u32 mc_filter[2]; /* Multicast hash filter */
1483 u8 rx_mode; /* Note: 0x02=accept runt, 0x01=accept errs */
1484
1485 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1486 /* Unconditionally log net taps. */
1487 printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n", dev->name);
1488 rx_mode = 0x1C;
1489 } else if ((dev->mc_count > multicast_filter_limit)
1490 || (dev->flags & IFF_ALLMULTI)) {
1491 /* Too many to match, or accept all multicasts. */
1492 writel(0xffffffff, ioaddr + MulticastFilter0);
1493 writel(0xffffffff, ioaddr + MulticastFilter1);
1494 rx_mode = 0x0C;
1495 } else {
1496 struct dev_mc_list *mclist;
1497 int i;
1498 memset(mc_filter, 0, sizeof(mc_filter));
1499 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1500 i++, mclist = mclist->next) {
1501 int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
1502
1503 mc_filter[bit_nr >> 5] |= cpu_to_le32(1 << (bit_nr & 31));
1504 }
1505 writel(mc_filter[0], ioaddr + MulticastFilter0);
1506 writel(mc_filter[1], ioaddr + MulticastFilter1);
1507 rx_mode = 0x0C;
1508 }
1509 writeb(np->rx_thresh | rx_mode, ioaddr + RxConfig);
1510 }
1511
1512 static int mii_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1513 {
1514 struct netdev_private *np = dev->priv;
1515 struct mii_ioctl_data *data = (struct mii_ioctl_data *)&rq->ifr_data;
1516 unsigned long flags;
1517 int retval;
1518
1519 spin_lock_irqsave(&np->lock, flags);
1520 retval = 0;
1521
1522 switch(cmd) {
1523 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
1524 case SIOCDEVPRIVATE: /* for binary compat, remove in 2.5 */
1525 data->phy_id = np->phys[0] & 0x1f;
1526 /* Fall Through */
1527
1528 case SIOCGMIIREG: /* Read MII PHY register. */
1529 case SIOCDEVPRIVATE+1: /* for binary compat, remove in 2.5 */
1530 data->val_out = mdio_read(dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
1531 break;
1532
1533 case SIOCSMIIREG: /* Write MII PHY register. */
1534 case SIOCDEVPRIVATE+2: /* for binary compat, remove in 2.5 */
1535 if (!capable(CAP_NET_ADMIN)) {
1536 retval = -EPERM;
1537 break;
1538 }
1539 mdio_write(dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
1540 break;
1541 default:
1542 retval = -EOPNOTSUPP;
1543 }
1544
1545 spin_unlock_irqrestore(&np->lock, flags);
1546 return retval;
1547 }
1548
1549 static int via_rhine_close(struct net_device *dev)
1550 {
1551 long ioaddr = dev->base_addr;
1552 struct netdev_private *np = dev->priv;
1553
1554 del_timer_sync(&np->timer);
1555
1556 spin_lock_irq(&np->lock);
1557
1558 netif_stop_queue(dev);
1559
1560 if (debug > 1)
1561 printk(KERN_DEBUG "%s: Shutting down ethercard, status was %4.4x.\n",
1562 dev->name, readw(ioaddr + ChipCmd));
1563
1564 /* Switch to loopback mode to avoid hardware races. */
1565 writeb(np->tx_thresh | 0x02, ioaddr + TxConfig);
1566
1567 /* Disable interrupts by clearing the interrupt mask. */
1568 writew(0x0000, ioaddr + IntrEnable);
1569
1570 /* Stop the chip's Tx and Rx processes. */
1571 writew(CmdStop, ioaddr + ChipCmd);
1572
1573 spin_unlock_irq(&np->lock);
1574
1575 free_irq(np->pdev->irq, dev);
1576 free_rbufs(dev);
1577 free_tbufs(dev);
1578 free_ring(dev);
1579
1580 return 0;
1581 }
1582
1583
1584 static void __devexit via_rhine_remove_one (struct pci_dev *pdev)
1585 {
1586 struct net_device *dev = pci_get_drvdata(pdev);
1587 struct netdev_private *np = dev->priv;
1588
1589 unregister_netdev(dev);
1590
1591 pci_release_regions(pdev);
1592
1593 #ifndef USE_IO
1594 iounmap((char *)(dev->base_addr));
1595 #endif
1596
1597 pci_free_consistent(pdev,
1598 RX_RING_SIZE * sizeof(struct rx_desc) +
1599 TX_RING_SIZE * sizeof(struct tx_desc),
1600 np->rx_ring, np->rx_ring_dma);
1601
1602 kfree(dev);
1603
1604 pci_set_drvdata(pdev, NULL);
1605 }
1606
1607
1608 static struct pci_driver via_rhine_driver = {
1609 name: "via-rhine",
1610 id_table: via_rhine_pci_tbl,
1611 probe: via_rhine_init_one,
1612 remove: via_rhine_remove_one,
1613 };
1614
1615
1616 static int __init via_rhine_init (void)
1617 {
1618 /* when a module, this is printed whether or not devices are found in probe */
1619 #ifdef MODULE
1620 printk(version);
1621 #endif
1622 return pci_module_init (&via_rhine_driver);
1623 }
1624
1625
1626 static void __exit via_rhine_cleanup (void)
1627 {
1628 pci_unregister_driver (&via_rhine_driver);
1629 }
1630
1631
1632 module_init(via_rhine_init);
1633 module_exit(via_rhine_cleanup);
1634
1635
1636 /*
1637 * Local variables:
1638 * compile-command: "gcc -DMODULE -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -c via-rhine.c `[ -f /usr/include/linux/modversions.h ] && echo -DMODVERSIONS`"
1639 * c-indent-level: 4
1640 * c-basic-offset: 4
1641 * tab-width: 4
1642 * End:
1643 */
1644