File: /usr/src/linux/arch/cris/drivers/ethernet.c
1 /* $Id: ethernet.c,v 1.17 2001/06/11 12:43:46 olof Exp $
2 *
3 * e100net.c: A network driver for the ETRAX 100LX network controller.
4 *
5 * Copyright (c) 1998-2001 Axis Communications AB.
6 *
7 * The outline of this driver comes from skeleton.c.
8 *
9 * $Log: ethernet.c,v $
10 * Revision 1.17 2001/06/11 12:43:46 olof
11 * Modified defines for network LED behavior
12 *
13 * Revision 1.16 2001/05/30 06:12:46 markusl
14 * TxDesc.next should not be set to NULL
15 *
16 * Revision 1.15 2001/05/29 10:27:04 markusl
17 * Updated after review remarks:
18 * +Use IO_EXTRACT
19 * +Handle underrun
20 *
21 * Revision 1.14 2001/05/29 09:20:14 jonashg
22 * Use driver name on printk output so one can tell which driver that complains.
23 *
24 * Revision 1.13 2001/05/09 12:35:59 johana
25 * Use DMA_NBR and IRQ_NBR defines from dma.h and irq.h
26 *
27 * Revision 1.12 2001/04/05 11:43:11 tobiasa
28 * Check dev before panic.
29 *
30 * Revision 1.11 2001/04/04 11:21:05 markusl
31 * Updated according to review remarks
32 *
33 * Revision 1.10 2001/03/26 16:03:06 bjornw
34 * Needs linux/config.h
35 *
36 * Revision 1.9 2001/03/19 14:47:48 pkj
37 * * Make sure there is always a pause after the network LEDs are
38 * changed so they will not look constantly lit during heavy traffic.
39 * * Always use HZ when setting times relative to jiffies.
40 * * Use LED_NETWORK_SET() when setting the network LEDs.
41 *
42 * Revision 1.8 2001/02/27 13:52:48 bjornw
43 * malloc.h -> slab.h
44 *
45 * Revision 1.7 2001/02/23 13:46:38 bjornw
46 * Spellling check
47 *
48 * Revision 1.6 2001/01/26 15:21:04 starvik
49 * Don't disable interrupts while reading MDIO registers (MDIO is slow)
50 * Corrected promiscuous mode
51 * Improved deallocation of IRQs ("ifconfig eth0 down" now works)
52 *
53 * Revision 1.5 2000/11/29 17:22:22 bjornw
54 * Get rid of the udword types legacy stuff
55 *
56 * Revision 1.4 2000/11/22 16:36:09 bjornw
57 * Please marketing by using the correct case when spelling Etrax.
58 *
59 * Revision 1.3 2000/11/21 16:43:04 bjornw
60 * Minor short->int change
61 *
62 * Revision 1.2 2000/11/08 14:27:57 bjornw
63 * 2.4 port
64 *
65 * Revision 1.1 2000/11/06 13:56:00 bjornw
66 * Verbatim copy of the 1.24 version of e100net.c from elinux
67 *
68 * Revision 1.24 2000/10/04 15:55:23 bjornw
69 * * Use virt_to_phys etc. for DMA addresses
70 * * Removed bogus CHECKSUM_UNNECESSARY
71 *
72 *
73 */
74
75 #include <linux/config.h>
76
77 #include <linux/module.h>
78
79 #include <linux/kernel.h>
80 #include <linux/sched.h>
81 #include <linux/delay.h>
82 #include <linux/types.h>
83 #include <linux/fcntl.h>
84 #include <linux/interrupt.h>
85 #include <linux/ptrace.h>
86 #include <linux/ioport.h>
87 #include <linux/in.h>
88 #include <linux/slab.h>
89 #include <linux/string.h>
90 #include <linux/spinlock.h>
91 #include <linux/errno.h>
92 #include <linux/init.h>
93
94 #include <linux/netdevice.h>
95 #include <linux/etherdevice.h>
96 #include <linux/skbuff.h>
97
98 #include <asm/svinto.h> /* DMA and register descriptions */
99 #include <asm/io.h> /* LED_* I/O functions */
100 #include <asm/irq.h>
101 #include <asm/dma.h>
102 #include <asm/system.h>
103 #include <asm/bitops.h>
104
105 //#define ETHDEBUG
106 #define D(x)
107
108
109 /*
110 * The name of the card. Is used for messages and in the requests for
111 * io regions, irqs and dma channels
112 */
113
114 static const char* cardname = "ETRAX 100LX built-in ethernet controller";
115
116 /* A default ethernet address. Highlevel SW will set the real one later */
117
118 static struct sockaddr default_mac = {
119 0,
120 { 0x00, 0x40, 0x8C, 0xCD, 0x00, 0x00 }
121 };
122
123 /* Information that need to be kept for each board. */
124 struct net_local {
125 struct net_device_stats stats;
126
127 /* Tx control lock. This protects the transmit buffer ring
128 * state along with the "tx full" state of the driver. This
129 * means all netif_queue flow control actions are protected
130 * by this lock as well.
131 */
132 spinlock_t lock;
133 };
134
135
136 /* Dma descriptors etc. */
137
138 #define RX_BUF_SIZE 32768
139
140 #define MAX_MEDIA_DATA_SIZE 1518
141
142 #define MIN_PACKET_LEN 46
143 #define ETHER_HEAD_LEN 14
144
145 /*
146 ** MDIO constants.
147 */
148 #define MDIO_BASE_STATUS_REG 0x1
149 #define MDIO_BASE_CONTROL_REG 0x0
150 #define MDIO_LINK_UP_MASK 0x4
151 #define MDIO_START 0x1
152 #define MDIO_READ 0x2
153 #define MDIO_WRITE 0x1
154 #define MDIO_PREAMBLE 0xfffffffful
155
156 /* Broadcom specific */
157 #define MDIO_AUX_CTRL_STATUS_REG 0x18
158 #define MDIO_SPEED 0x2
159 #define MDIO_PHYS_ADDR 0x0
160
161 /* Network flash constants */
162 #define NET_FLASH_TIME (HZ/50) /* 20 ms */
163 #define NET_FLASH_PAUSE (HZ/100) /* 10 ms */
164 #define NET_LINK_UP_CHECK_INTERVAL (2*HZ) /* 2 s */
165
166 #define NO_NETWORK_ACTIVITY 0
167 #define NETWORK_ACTIVITY 1
168
169 #define RX_DESC_BUF_SIZE 256
170 #define NBR_OF_RX_DESC (RX_BUF_SIZE / \
171 RX_DESC_BUF_SIZE)
172
173 #define GET_BIT(bit,val) (((val) >> (bit)) & 0x01)
174
175 static etrax_dma_descr *myNextRxDesc; /* Points to the next descriptor to
176 to be processed */
177 static etrax_dma_descr *myLastRxDesc; /* The last processed descriptor */
178 static etrax_dma_descr *myPrevRxDesc; /* The descriptor right before myNextRxDesc */
179
180 static unsigned char RxBuf[RX_BUF_SIZE];
181
182 static etrax_dma_descr RxDescList[NBR_OF_RX_DESC] __attribute__ ((aligned(4)));
183 static etrax_dma_descr TxDesc __attribute__ ((aligned(4)));
184
185 static struct sk_buff *tx_skb;
186
187 /* Network speed indication. */
188 static struct timer_list speed_timer;
189 static struct timer_list clear_led_timer;
190 static int current_speed;
191 static int led_next_time;
192 static int led_active;
193
194 /* Index to functions, as function prototypes. */
195
196 static int etrax_ethernet_init(struct net_device *dev);
197
198 static int e100_open(struct net_device *dev);
199 static int e100_set_mac_address(struct net_device *dev, void *addr);
200 static int e100_send_packet(struct sk_buff *skb, struct net_device *dev);
201 static void e100rx_interrupt(int irq, void *dev_id, struct pt_regs *regs);
202 static void e100tx_interrupt(int irq, void *dev_id, struct pt_regs *regs);
203 static void e100nw_interrupt(int irq, void *dev_id, struct pt_regs *regs);
204 static void e100_rx(struct net_device *dev);
205 static int e100_close(struct net_device *dev);
206 static struct net_device_stats *e100_get_stats(struct net_device *dev);
207 static void set_multicast_list(struct net_device *dev);
208 static void e100_hardware_send_packet(char *buf, int length);
209 static void update_rx_stats(struct net_device_stats *);
210 static void update_tx_stats(struct net_device_stats *);
211
212 static void e100_check_speed(unsigned long dummy);
213 static unsigned short e100_get_mdio_reg(unsigned char reg_num);
214 static void e100_send_mdio_cmd(unsigned short cmd, int write_cmd);
215 static void e100_send_mdio_bit(unsigned char bit);
216 static unsigned char e100_receive_mdio_bit(void);
217 static void e100_reset_tranceiver(void);
218
219 static void e100_clear_network_leds(unsigned long dummy);
220 static void e100_set_network_leds(int active);
221
222 #define tx_done(dev) (*R_DMA_CH0_CMD == 0)
223
224 /*
225 * Check for a network adaptor of this type, and return '0' if one exists.
226 * If dev->base_addr == 0, probe all likely locations.
227 * If dev->base_addr == 1, always return failure.
228 * If dev->base_addr == 2, allocate space for the device and return success
229 * (detachable devices only).
230 */
231
232 static int __init
233 etrax_ethernet_init(struct net_device *dev)
234 {
235 int i;
236 int anOffset = 0;
237
238 printk("ETRAX 100LX 10/100MBit ethernet v2.0 (c) 2000-2001 Axis Communications AB\n");
239
240 dev->base_addr = (unsigned int)R_NETWORK_SA_0; /* just to have something to show */
241
242 printk("%s initialized\n", dev->name);
243
244 /* make Linux aware of the new hardware */
245
246 if (!dev) {
247 printk(KERN_WARNING "%s: dev == NULL. Should this happen?\n",
248 cardname);
249 dev = init_etherdev(dev, sizeof(struct net_local));
250 if (!dev)
251 panic("init_etherdev failed\n");
252 }
253
254 /* setup generic handlers and stuff in the dev struct */
255
256 ether_setup(dev);
257
258 /* make room for the local structure containing stats etc */
259
260 dev->priv = kmalloc(sizeof(struct net_local), GFP_KERNEL);
261 if (dev->priv == NULL)
262 return -ENOMEM;
263 memset(dev->priv, 0, sizeof(struct net_local));
264
265 /* now setup our etrax specific stuff */
266
267 dev->irq = NETWORK_DMA_RX_IRQ_NBR; /* we really use DMATX as well... */
268 dev->dma = NETWORK_RX_DMA_NBR;
269
270 /* fill in our handlers so the network layer can talk to us in the future */
271
272 dev->open = e100_open;
273 dev->hard_start_xmit = e100_send_packet;
274 dev->stop = e100_close;
275 dev->get_stats = e100_get_stats;
276 dev->set_multicast_list = set_multicast_list;
277 dev->set_mac_address = e100_set_mac_address;
278
279 /* set the default MAC address */
280
281 e100_set_mac_address(dev, &default_mac);
282
283 /* Initialise the list of Etrax DMA-descriptors */
284
285 /* Initialise receive descriptors */
286
287 for(i = 0; i < (NBR_OF_RX_DESC - 1); i++) {
288 RxDescList[i].ctrl = 0;
289 RxDescList[i].sw_len = RX_DESC_BUF_SIZE;
290 RxDescList[i].next = virt_to_phys(&RxDescList[i + 1]);
291 RxDescList[i].buf = virt_to_phys(RxBuf + anOffset);
292 RxDescList[i].status = 0;
293 RxDescList[i].hw_len = 0;
294 anOffset += RX_DESC_BUF_SIZE;
295 }
296
297 RxDescList[i].ctrl = d_eol;
298 RxDescList[i].sw_len = RX_DESC_BUF_SIZE;
299 RxDescList[i].next = virt_to_phys(&RxDescList[0]);
300 RxDescList[i].buf = virt_to_phys(RxBuf + anOffset);
301 RxDescList[i].status = 0;
302 RxDescList[i].hw_len = 0;
303
304 /* Initialise initial pointers */
305
306 myNextRxDesc = &RxDescList[0];
307 myLastRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
308 myPrevRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
309
310 /* Initialize speed indicator stuff. */
311
312 current_speed = 10;
313 speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
314 speed_timer.function = e100_check_speed;
315 add_timer(&speed_timer);
316 clear_led_timer.function = e100_clear_network_leds;
317 clear_led_timer.expires = jiffies + HZ/10;
318 add_timer(&clear_led_timer);
319
320 return 0;
321 }
322
323 /* set MAC address of the interface. called from the core after a
324 * SIOCSIFADDR ioctl, and from the bootup above.
325 */
326
327 static int
328 e100_set_mac_address(struct net_device *dev, void *p)
329 {
330 struct sockaddr *addr = p;
331 int i;
332
333 /* remember it */
334
335 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
336
337 /* Write it to the hardware.
338 * Note the way the address is wrapped:
339 * *R_NETWORK_SA_0 = a0_0 | (a0_1 << 8) | (a0_2 << 16) | (a0_3 << 24);
340 * *R_NETWORK_SA_1 = a0_4 | (a0_5 << 8);
341 */
342
343 *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) |
344 (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
345 *R_NETWORK_SA_1 = dev->dev_addr[4] | (dev->dev_addr[5] << 8);
346 *R_NETWORK_SA_2 = 0;
347
348 /* show it in the log as well */
349
350 printk("%s: changed MAC to ", dev->name);
351
352 for (i = 0; i < 5; i++)
353 printk("%02X:", dev->dev_addr[i]);
354
355 printk("%02X\n", dev->dev_addr[i]);
356
357 return 0;
358 }
359
360 /*
361 * Open/initialize the board. This is called (in the current kernel)
362 * sometime after booting when the 'ifconfig' program is run.
363 *
364 * This routine should set everything up anew at each open, even
365 * registers that "should" only need to be set once at boot, so that
366 * there is non-reboot way to recover if something goes wrong.
367 */
368
369 static int
370 e100_open(struct net_device *dev)
371 {
372 unsigned long flags;
373
374 /* disable the ethernet interface while we configure it */
375
376 *R_NETWORK_GEN_CONFIG =
377 IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk) |
378 IO_STATE(R_NETWORK_GEN_CONFIG, enable, off);
379
380 /* enable the MDIO output pin */
381
382 *R_NETWORK_MGM_CTRL = IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable);
383
384 *R_IRQ_MASK0_CLR =
385 IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) |
386 IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) |
387 IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr);
388
389 /* clear dma0 and 1 eop and descr irq masks */
390 *R_IRQ_MASK2_CLR =
391 IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) |
392 IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
393 IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) |
394 IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
395
396 /* Reset and wait for the DMA channels */
397
398 RESET_DMA(NETWORK_TX_DMA_NBR);
399 RESET_DMA(NETWORK_RX_DMA_NBR);
400 WAIT_DMA(NETWORK_TX_DMA_NBR);
401 WAIT_DMA(NETWORK_RX_DMA_NBR);
402
403 /* Initialise the etrax network controller */
404
405 /* allocate the irq corresponding to the receiving DMA */
406
407 if (request_irq(NETWORK_DMA_RX_IRQ_NBR, e100rx_interrupt, 0,
408 cardname, (void *)dev)) {
409 goto grace_exit;
410 }
411
412 /* allocate the irq corresponding to the transmitting DMA */
413
414 if (request_irq(NETWORK_DMA_TX_IRQ_NBR, e100tx_interrupt, 0,
415 cardname, (void *)dev)) {
416 goto grace_exit;
417 }
418
419 /* allocate the irq corresponding to the network errors etc */
420
421 if (request_irq(NETWORK_STATUS_IRQ_NBR, e100nw_interrupt, 0,
422 cardname, (void *)dev)) {
423 goto grace_exit;
424 }
425
426 /*
427 * Always allocate the DMA channels after the IRQ,
428 * and clean up on failure.
429 */
430
431 if(request_dma(NETWORK_TX_DMA_NBR, cardname)) {
432 goto grace_exit;
433 }
434
435 if(request_dma(NETWORK_RX_DMA_NBR, cardname)) {
436 grace_exit:
437 /* this will cause some 'trying to free free irq' but what the heck... */
438 free_dma(NETWORK_TX_DMA_NBR);
439 free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev);
440 free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev);
441 free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);
442 return -EAGAIN;
443 }
444
445 /* give the HW an idea of what MAC address we want */
446
447 *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) |
448 (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
449 *R_NETWORK_SA_1 = dev->dev_addr[4] | (dev->dev_addr[5] << 8);
450 *R_NETWORK_SA_2 = 0;
451
452 #if 0
453 /* use promiscuous mode for testing */
454 *R_NETWORK_GA_0 = 0xffffffff;
455 *R_NETWORK_GA_1 = 0xffffffff;
456
457 *R_NETWORK_REC_CONFIG = 0xd; /* broadcast rec, individ. rec, ma0 enabled */
458 #else
459 *R_NETWORK_REC_CONFIG =
460 IO_STATE(R_NETWORK_REC_CONFIG, broadcast, receive) |
461 IO_STATE(R_NETWORK_REC_CONFIG, ma0, enable);
462 #endif
463
464 *R_NETWORK_GEN_CONFIG =
465 IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk) |
466 IO_STATE(R_NETWORK_GEN_CONFIG, enable, on);
467
468 save_flags(flags);
469 cli();
470
471 /* enable the irq's for ethernet DMA */
472
473 *R_IRQ_MASK2_SET =
474 IO_STATE(R_IRQ_MASK2_SET, dma0_eop, set) |
475 IO_STATE(R_IRQ_MASK2_SET, dma1_eop, set);
476
477 *R_IRQ_MASK0_SET =
478 IO_STATE(R_IRQ_MASK0_SET, overrun, set) |
479 IO_STATE(R_IRQ_MASK0_SET, underrun, set) |
480 IO_STATE(R_IRQ_MASK0_SET, excessive_col, set);
481
482 tx_skb = 0;
483
484 /* make sure the irqs are cleared */
485
486 *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do);
487 *R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do);
488
489 /* make sure the rec and transmit error counters are cleared */
490
491 (void)*R_REC_COUNTERS; /* dummy read */
492 (void)*R_TR_COUNTERS; /* dummy read */
493
494 /* start the receiving DMA channel so we can receive packets from now on */
495
496 *R_DMA_CH1_FIRST = virt_to_phys(myNextRxDesc);
497 *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, start);
498
499 restore_flags(flags);
500
501 /* We are now ready to accept transmit requeusts from
502 * the queueing layer of the networking.
503 */
504 netif_start_queue(dev);
505
506 return 0;
507 }
508
509
510 static void
511 e100_check_speed(unsigned long dummy)
512 {
513 unsigned long data;
514 int old_speed = current_speed;
515
516 data = e100_get_mdio_reg(MDIO_BASE_STATUS_REG);
517 if (!(data & MDIO_LINK_UP_MASK)) {
518 current_speed = 0;
519 } else {
520 data = e100_get_mdio_reg(MDIO_AUX_CTRL_STATUS_REG);
521 current_speed = (data & MDIO_SPEED ? 100 : 10);
522 }
523
524 if (old_speed != current_speed)
525 e100_set_network_leds(NO_NETWORK_ACTIVITY);
526
527 /* Reinitialize the timer. */
528 speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
529 add_timer(&speed_timer);
530 }
531
532 static unsigned short
533 e100_get_mdio_reg(unsigned char reg_num)
534 {
535 unsigned long flags;
536 unsigned short cmd; /* Data to be sent on MDIO port */
537 unsigned short data; /* Data read from MDIO */
538 int bitCounter;
539
540 /* Start of frame, OP Code, Physical Address, Register Address */
541 cmd = (MDIO_START << 14) | (MDIO_READ << 12) | (MDIO_PHYS_ADDR << 7) |
542 (reg_num << 2);
543
544 e100_send_mdio_cmd(cmd, 0);
545
546 data = 0;
547
548 /* Data... */
549 for(bitCounter=15; bitCounter>=0 ; bitCounter--) {
550 data |= (e100_receive_mdio_bit() << bitCounter);
551 }
552
553 return data;
554 }
555
556 static void
557 e100_send_mdio_cmd(unsigned short cmd, int write_cmd)
558 {
559 int bitCounter;
560 unsigned char data = 0x2;
561
562 /* Preamble */
563 for(bitCounter = 31; bitCounter>= 0; bitCounter--)
564 e100_send_mdio_bit(GET_BIT(bitCounter, MDIO_PREAMBLE));
565
566 for(bitCounter = 15; bitCounter >= 2; bitCounter--)
567 e100_send_mdio_bit(GET_BIT(bitCounter, cmd));
568
569 /* Turnaround */
570 for(bitCounter = 1; bitCounter >= 0 ; bitCounter--)
571 if (write_cmd)
572 e100_send_mdio_bit(GET_BIT(bitCounter, data));
573 else
574 e100_receive_mdio_bit();
575 }
576
577 static void
578 e100_send_mdio_bit(unsigned char bit)
579 {
580 *R_NETWORK_MGM_CTRL =
581 IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) |
582 IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit);
583 udelay(1);
584 *R_NETWORK_MGM_CTRL =
585 IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) |
586 IO_MASK(R_NETWORK_MGM_CTRL, mdck) |
587 IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit);
588 udelay(1);
589 }
590
591 static unsigned char
592 e100_receive_mdio_bit()
593 {
594 unsigned char bit;
595 *R_NETWORK_MGM_CTRL = 0;
596 bit = IO_EXTRACT(R_NETWORK_STAT, mdio, *R_NETWORK_STAT);
597 udelay(1);
598 *R_NETWORK_MGM_CTRL = IO_MASK(R_NETWORK_MGM_CTRL, mdck);
599 udelay(1);
600 return bit;
601 }
602
603 static void
604 e100_reset_tranceiver(void)
605 {
606 unsigned long flags;
607 unsigned short cmd;
608 unsigned short data;
609 int bitCounter;
610
611 data = e100_get_mdio_reg(MDIO_BASE_CONTROL_REG);
612
613 cmd = (MDIO_START << 14) | (MDIO_WRITE << 12) | (MDIO_PHYS_ADDR << 7) | (MDIO_BASE_CONTROL_REG << 2);
614
615 e100_send_mdio_cmd(cmd, 1);
616
617 data |= 0x8000;
618
619 for(bitCounter = 15; bitCounter >= 0 ; bitCounter--) {
620 e100_send_mdio_bit(GET_BIT(bitCounter, data));
621 }
622 }
623
624 /* Called by upper layers if they decide it took too long to complete
625 * sending a packet - we need to reset and stuff.
626 */
627
628 static void
629 e100_tx_timeout(struct net_device *dev)
630 {
631 struct net_local *np = (struct net_local *)dev->priv;
632
633 printk(KERN_WARNING "%s: transmit timed out, %s?\n", dev->name,
634 tx_done(dev) ? "IRQ problem" : "network cable problem");
635
636 /* remember we got an error */
637
638 np->stats.tx_errors++;
639
640 /* reset the TX DMA in case it has hung on something */
641
642 RESET_DMA(NETWORK_TX_DMA_NBR);
643 WAIT_DMA(NETWORK_TX_DMA_NBR);
644
645 /* Reset the tranceiver. */
646
647 e100_reset_tranceiver();
648
649 /* and get rid of the packet that never got an interrupt */
650
651 dev_kfree_skb(tx_skb);
652 tx_skb = 0;
653
654 /* tell the upper layers we're ok again */
655
656 netif_wake_queue(dev);
657 }
658
659
660 /* This will only be invoked if the driver is _not_ in XOFF state.
661 * What this means is that we need not check it, and that this
662 * invariant will hold if we make sure that the netif_*_queue()
663 * calls are done at the proper times.
664 */
665
666 static int
667 e100_send_packet(struct sk_buff *skb, struct net_device *dev)
668 {
669 struct net_local *np = (struct net_local *)dev->priv;
670 int length = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
671 unsigned char *buf = skb->data;
672
673 #ifdef ETHDEBUG
674 printk("send packet len %d\n", length);
675 #endif
676 spin_lock_irq(&np->lock); /* protect from tx_interrupt */
677
678 tx_skb = skb; /* remember it so we can free it in the tx irq handler later */
679 dev->trans_start = jiffies;
680
681 e100_hardware_send_packet(buf, length);
682
683 /* this simple TX driver has only one send-descriptor so we're full
684 * directly. If this had a send-ring instead, we would only do this if
685 * the ring got full.
686 */
687
688 netif_stop_queue(dev);
689
690 spin_unlock_irq(&np->lock);
691
692 return 0;
693 }
694
695 /*
696 * The typical workload of the driver:
697 * Handle the network interface interrupts.
698 */
699
700 static void
701 e100rx_interrupt(int irq, void *dev_id, struct pt_regs * regs)
702 {
703 struct net_device *dev = (struct net_device *)dev_id;
704 unsigned long irqbits = *R_IRQ_MASK2_RD;
705
706 if(irqbits & IO_STATE(R_IRQ_MASK2_RD, dma1_eop, active)) {
707
708 /* acknowledge the eop interrupt */
709
710 *R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do);
711
712 /* check if one or more complete packets were indeed received */
713
714 while(*R_DMA_CH1_FIRST != virt_to_phys(myNextRxDesc)) {
715 /* Take out the buffer and give it to the OS, then
716 * allocate a new buffer to put a packet in.
717 */
718 e100_rx(dev);
719 ((struct net_local *)dev->priv)->stats.rx_packets++;
720 /* restart/continue on the channel, for safety */
721 *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, restart);
722 /* clear dma channel 1 eop/descr irq bits */
723 *R_DMA_CH1_CLR_INTR =
724 IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do) |
725 IO_STATE(R_DMA_CH1_CLR_INTR, clr_descr, do);
726
727 /* now, we might have gotten another packet
728 so we have to loop back and check if so */
729 }
730 }
731 }
732
733 /* the transmit dma channel interrupt
734 *
735 * this is supposed to free the skbuff which was pending during transmission,
736 * and inform the kernel that we can send one more buffer
737 */
738
739 static void
740 e100tx_interrupt(int irq, void *dev_id, struct pt_regs * regs)
741 {
742 struct net_device *dev = (struct net_device *)dev_id;
743 unsigned long irqbits = *R_IRQ_MASK2_RD;
744 struct net_local *np = (struct net_local *)dev->priv;
745
746 /* check for a dma0_eop interrupt */
747 if(irqbits & IO_STATE(R_IRQ_MASK2_RD, dma0_eop, active)) {
748
749 /* This protects us from concurrent execution of
750 * our dev->hard_start_xmit function above.
751 */
752
753 spin_lock(&np->lock);
754
755 /* acknowledge the eop interrupt */
756
757 *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do);
758
759 if(*R_DMA_CH0_FIRST == 0 && tx_skb) {
760 np->stats.tx_bytes += tx_skb->len;
761 np->stats.tx_packets++;
762 /* dma is ready with the transmission of the data in tx_skb, so now
763 we can release the skb memory */
764 dev_kfree_skb_irq(tx_skb);
765 tx_skb = 0;
766 netif_wake_queue(dev);
767 } else {
768 printk(KERN_WARNING "%s: tx weird interrupt\n",
769 cardname);
770 }
771
772 spin_unlock(&np->lock);
773 }
774 }
775
776 static void
777 e100nw_interrupt(int irq, void *dev_id, struct pt_regs * regs)
778 {
779 struct net_device *dev = (struct net_device *)dev_id;
780 struct net_local *np = (struct net_local *)dev->priv;
781 unsigned long irqbits = *R_IRQ_MASK0_RD;
782
783 /* check for underrun irq */
784 if(irqbits & IO_STATE(R_IRQ_MASK0_RD, underrun, active)) {
785 *R_NETWORK_TR_CTRL = IO_STATE(R_NETWORK_TR_CTRL, clr_error, clr);
786 np->stats.tx_errors++;
787 D(printk("ethernet receiver underrun!\n"));
788 }
789
790 /* check for overrun irq */
791 if(irqbits & IO_STATE(R_IRQ_MASK0_RD, overrun, active)) {
792 update_rx_stats(&np->stats); /* this will ack the irq */
793 D(printk("ethernet receiver overrun!\n"));
794 }
795 /* check for excessive collision irq */
796 if(irqbits & IO_STATE(R_IRQ_MASK0_RD, excessive_col, active)) {
797 *R_NETWORK_TR_CTRL = IO_STATE(R_NETWORK_TR_CTRL, clr_error, clr);
798 np->stats.tx_errors++;
799 D(printk("ethernet excessive collisions!\n"));
800 }
801
802 }
803
804 /* We have a good packet(s), get it/them out of the buffers. */
805 static void
806 e100_rx(struct net_device *dev)
807 {
808 struct sk_buff *skb;
809 int length=0;
810 int i;
811 struct net_local *np = (struct net_local *)dev->priv;
812 struct etrax_dma_descr *mySaveRxDesc = myNextRxDesc;
813 unsigned char *skb_data_ptr;
814
815 if (!led_active && jiffies > led_next_time) {
816 /* light the network leds depending on the current speed. */
817 e100_set_network_leds(NETWORK_ACTIVITY);
818
819 /* Set the earliest time we may clear the LED */
820 led_next_time = jiffies + NET_FLASH_TIME;
821 led_active = 1;
822 }
823
824 /* If the packet is broken down in many small packages then merge
825 * count how much space we will need to alloc with skb_alloc() for
826 * it to fit.
827 */
828
829 while (!(myNextRxDesc->status & d_eop)) {
830 length += myNextRxDesc->sw_len; /* use sw_len for the first descs */
831 myNextRxDesc->status = 0;
832 myNextRxDesc = phys_to_virt(myNextRxDesc->next);
833 }
834
835 length += myNextRxDesc->hw_len; /* use hw_len for the last descr */
836
837 #ifdef ETHDEBUG
838 printk("Got a packet of length %d:\n", length);
839 /* dump the first bytes in the packet */
840 skb_data_ptr = (unsigned char *)phys_to_virt(mySaveRxDesc->buf);
841 for(i = 0; i < 8; i++) {
842 printk("%d: %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x\n", i * 8,
843 skb_data_ptr[0],skb_data_ptr[1],skb_data_ptr[2],skb_data_ptr[3],
844 skb_data_ptr[4],skb_data_ptr[5],skb_data_ptr[6],skb_data_ptr[7]);
845 skb_data_ptr += 8;
846 }
847 #endif
848
849 skb = dev_alloc_skb(length - ETHER_HEAD_LEN);
850 if (!skb) {
851 np->stats.rx_errors++;
852 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n",
853 dev->name);
854 return;
855 }
856
857 skb_put(skb, length - ETHER_HEAD_LEN); /* allocate room for the packet body */
858 skb_data_ptr = skb_push(skb, ETHER_HEAD_LEN); /* allocate room for the header */
859
860 #ifdef ETHDEBUG
861 printk("head = 0x%x, data = 0x%x, tail = 0x%x, end = 0x%x\n",
862 skb->head, skb->data, skb->tail, skb->end);
863 printk("copying packet to 0x%x.\n", skb_data_ptr);
864 #endif
865
866 /* this loop can be made using max two memcpy's if optimized */
867
868 while(mySaveRxDesc != myNextRxDesc) {
869 memcpy(skb_data_ptr, phys_to_virt(mySaveRxDesc->buf),
870 mySaveRxDesc->sw_len);
871 skb_data_ptr += mySaveRxDesc->sw_len;
872 mySaveRxDesc = phys_to_virt(mySaveRxDesc->next);
873 }
874
875 memcpy(skb_data_ptr, phys_to_virt(mySaveRxDesc->buf),
876 mySaveRxDesc->hw_len);
877
878 skb->dev = dev;
879 skb->protocol = eth_type_trans(skb, dev);
880
881 /* Send the packet to the upper layers */
882
883 netif_rx(skb);
884
885 /* Prepare for next packet */
886
887 myNextRxDesc->status = 0;
888 myPrevRxDesc = myNextRxDesc;
889 myNextRxDesc = phys_to_virt(myNextRxDesc->next);
890
891 myPrevRxDesc->ctrl |= d_eol;
892 myLastRxDesc->ctrl &= ~d_eol;
893 myLastRxDesc = myPrevRxDesc;
894
895 return;
896 }
897
898 /* The inverse routine to net_open(). */
899 static int
900 e100_close(struct net_device *dev)
901 {
902 struct net_local *np = (struct net_local *)dev->priv;
903
904 printk("Closing %s.\n", dev->name);
905
906 netif_stop_queue(dev);
907
908 *R_NETWORK_GEN_CONFIG =
909 IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk) |
910 IO_STATE(R_NETWORK_GEN_CONFIG, enable, off);
911
912 *R_IRQ_MASK0_CLR =
913 IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) |
914 IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) |
915 IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr);
916
917 *R_IRQ_MASK2_CLR =
918 IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) |
919 IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
920 IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) |
921 IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
922
923 /* Stop the receiver and the transmitter */
924
925 RESET_DMA(NETWORK_TX_DMA_NBR);
926 RESET_DMA(NETWORK_RX_DMA_NBR);
927
928 /* Flush the Tx and disable Rx here. */
929
930 free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev);
931 free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev);
932 free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);
933
934 free_dma(NETWORK_TX_DMA_NBR);
935 free_dma(NETWORK_RX_DMA_NBR);
936
937 /* Update the statistics here. */
938
939 update_rx_stats(&np->stats);
940 update_tx_stats(&np->stats);
941
942 return 0;
943 }
944
945 static void
946 update_rx_stats(struct net_device_stats *es)
947 {
948 unsigned long r = *R_REC_COUNTERS;
949 /* update stats relevant to reception errors */
950 es->rx_fifo_errors += IO_EXTRACT(R_REC_COUNTERS, congestion, r);
951 es->rx_crc_errors += IO_EXTRACT(R_REC_COUNTERS, crc_error, r);
952 es->rx_frame_errors += IO_EXTRACT(R_REC_COUNTERS, alignment_error, r);
953 es->rx_length_errors += IO_EXTRACT(R_REC_COUNTERS, oversize, r);
954 }
955
956 static void
957 update_tx_stats(struct net_device_stats *es)
958 {
959 unsigned long r = *R_TR_COUNTERS;
960 /* update stats relevant to transmission errors */
961 es->collisions +=
962 IO_EXTRACT(R_TR_COUNTERS, single_col, r) +
963 IO_EXTRACT(R_TR_COUNTERS, multiple_col, r);
964 es->tx_errors += IO_EXTRACT(R_TR_COUNTERS, deferred, r);
965 }
966
967 /*
968 * Get the current statistics.
969 * This may be called with the card open or closed.
970 */
971 static struct net_device_stats *
972 e100_get_stats(struct net_device *dev)
973 {
974 struct net_local *lp = (struct net_local *)dev->priv;
975
976 update_rx_stats(&lp->stats);
977 update_tx_stats(&lp->stats);
978
979 return &lp->stats;
980 }
981
982 /*
983 * Set or clear the multicast filter for this adaptor.
984 * num_addrs == -1 Promiscuous mode, receive all packets
985 * num_addrs == 0 Normal mode, clear multicast list
986 * num_addrs > 0 Multicast mode, receive normal and MC packets,
987 * and do best-effort filtering.
988 */
989 static void
990 set_multicast_list(struct net_device *dev)
991 {
992 int num_addr = dev->mc_count;
993 unsigned long int lo_bits;
994 unsigned long int hi_bits;
995 if (num_addr == -1)
996 {
997 /* promiscuous mode */
998 lo_bits = 0xfffffffful;
999 hi_bits = 0xfffffffful;
1000
1001 /* Enable individual receive */
1002 *R_NETWORK_REC_CONFIG =
1003 IO_STATE(R_NETWORK_REC_CONFIG, broadcast, receive) |
1004 IO_STATE(R_NETWORK_REC_CONFIG, ma0, enable) |
1005 IO_STATE(R_NETWORK_REC_CONFIG, individual, receive);
1006 } else if (num_addr == 0) {
1007 /* Normal, clear the mc list */
1008 lo_bits = 0x00000000ul;
1009 hi_bits = 0x00000000ul;
1010
1011 /* Disable individual receive */
1012 *R_NETWORK_REC_CONFIG =
1013 IO_STATE(R_NETWORK_REC_CONFIG, broadcast, receive) |
1014 IO_STATE(R_NETWORK_REC_CONFIG, ma0, enable);
1015 } else {
1016 /* MC mode, receive normal and MC packets */
1017 char hash_ix;
1018 struct dev_mc_list *dmi = dev->mc_list;
1019 int i;
1020 char *baddr;
1021 lo_bits = 0x00000000ul;
1022 hi_bits = 0x00000000ul;
1023 for (i=0; i<num_addr; i++) {
1024 /* Calculate the hash index for the GA registers */
1025
1026 hash_ix = 0;
1027 baddr = dmi->dmi_addr;
1028 hash_ix ^= (*baddr) & 0x3f;
1029 hash_ix ^= ((*baddr) >> 6) & 0x03;
1030 ++baddr;
1031 hash_ix ^= ((*baddr) << 2) & 0x03c;
1032 hash_ix ^= ((*baddr) >> 4) & 0xf;
1033 ++baddr;
1034 hash_ix ^= ((*baddr) << 4) & 0x30;
1035 hash_ix ^= ((*baddr) >> 2) & 0x3f;
1036 ++baddr;
1037 hash_ix ^= (*baddr) & 0x3f;
1038 hash_ix ^= ((*baddr) >> 6) & 0x03;
1039 ++baddr;
1040 hash_ix ^= ((*baddr) << 2) & 0x03c;
1041 hash_ix ^= ((*baddr) >> 4) & 0xf;
1042 ++baddr;
1043 hash_ix ^= ((*baddr) << 4) & 0x30;
1044 hash_ix ^= ((*baddr) >> 2) & 0x3f;
1045
1046 hash_ix &= 0x3f;
1047
1048 if (hash_ix > 32) {
1049 hi_bits |= (1 << (hash_ix-32));
1050 }
1051 else {
1052 lo_bits |= (1 << hash_ix);
1053 }
1054 dmi = dmi->next;
1055 }
1056 /* Disable individual receive */
1057 *R_NETWORK_REC_CONFIG =
1058 IO_STATE(R_NETWORK_REC_CONFIG, broadcast, receive) |
1059 IO_STATE(R_NETWORK_REC_CONFIG, ma0, enable);
1060 }
1061 *R_NETWORK_GA_0 = lo_bits;
1062 *R_NETWORK_GA_1 = hi_bits;
1063 }
1064
1065 void
1066 e100_hardware_send_packet(char *buf, int length)
1067 {
1068 D(printk("e100 send pack, buf 0x%x len %d\n", buf, length));
1069
1070 if (!led_active && jiffies > led_next_time) {
1071 /* light the network leds depending on the current speed. */
1072 e100_set_network_leds(NETWORK_ACTIVITY);
1073
1074 /* Set the earliest time we may clear the LED */
1075 led_next_time = jiffies + NET_FLASH_TIME;
1076 led_active = 1;
1077 }
1078
1079 /* configure the tx dma descriptor */
1080
1081 TxDesc.sw_len = length;
1082 TxDesc.ctrl = d_eop | d_eol | d_wait;
1083 TxDesc.buf = virt_to_phys(buf);
1084
1085 /* setup the dma channel and start it */
1086
1087 *R_DMA_CH0_FIRST = virt_to_phys(&TxDesc);
1088 *R_DMA_CH0_CMD = IO_STATE(R_DMA_CH0_CMD, cmd, start);
1089 }
1090
1091 static void
1092 e100_clear_network_leds(unsigned long dummy)
1093 {
1094 if (led_active && jiffies > led_next_time) {
1095 e100_set_network_leds(NO_NETWORK_ACTIVITY);
1096
1097 /* Set the earliest time we may set the LED */
1098 led_next_time = jiffies + NET_FLASH_PAUSE;
1099 led_active = 0;
1100 }
1101
1102 clear_led_timer.expires = jiffies + HZ/10;
1103 add_timer(&clear_led_timer);
1104 }
1105
1106 static void
1107 e100_set_network_leds(int active)
1108 {
1109 #if defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK)
1110 int light_leds = (active == NO_NETWORK_ACTIVITY);
1111 #elif defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY)
1112 int light_leds = (active == NETWORK_ACTIVITY);
1113 #else
1114 #error "Define either CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK or CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY"
1115 #endif
1116
1117 if (!current_speed) {
1118 /* Make LED red, link is down */
1119 LED_NETWORK_SET(LED_RED);
1120 }
1121 else if (light_leds) {
1122 if (current_speed == 10) {
1123 LED_NETWORK_SET(LED_ORANGE);
1124 } else {
1125 LED_NETWORK_SET(LED_GREEN);
1126 }
1127 }
1128 else {
1129 LED_NETWORK_SET(LED_OFF);
1130 }
1131 }
1132
1133 static struct net_device dev_etrax_ethernet; /* only got one */
1134
1135 static int
1136 etrax_init_module(void)
1137 {
1138 struct net_device *d = &dev_etrax_ethernet;
1139
1140 d->init = etrax_ethernet_init;
1141
1142 if(register_netdev(d) == 0)
1143 return 0;
1144 else
1145 return -ENODEV;
1146 }
1147
1148 module_init(etrax_init_module);
1149