File: /usr/src/linux/drivers/net/wan/lmc/lmc_media.c
1 /* $Id: lmc_media.c,v 1.13 2000/04/11 05:25:26 asj Exp $ */
2
3 #include <linux/version.h>
4 #include <linux/config.h>
5 #include <linux/kernel.h>
6 #include <linux/sched.h>
7 #include <linux/string.h>
8 #include <linux/timer.h>
9 #include <linux/ptrace.h>
10 #include <linux/errno.h>
11 #include <linux/ioport.h>
12 #include <linux/slab.h>
13 #include <linux/interrupt.h>
14 #include <linux/pci.h>
15 #include <asm/segment.h>
16 //#include <asm/smp.h>
17
18 #if LINUX_VERSION_CODE < 0x20155
19 #include <linux/bios32.h>
20 #endif
21
22 #include <linux/in.h>
23 #include <linux/if_arp.h>
24 #include <asm/processor.h> /* Processor type for cache alignment. */
25 #include <asm/bitops.h>
26 #include <asm/io.h>
27 #include <asm/dma.h>
28
29 #include <linux/netdevice.h>
30 #include <linux/etherdevice.h>
31 #include <linux/skbuff.h>
32 #include <net/syncppp.h>
33 #include <linux/inet.h>
34
35 #if LINUX_VERSION_CODE >= 0x20200
36 #include <asm/uaccess.h>
37 //#include <asm/spinlock.h>
38 #endif
39
40 #include "lmc_ver.h"
41 #include "lmc.h"
42 #include "lmc_var.h"
43 #include "lmc_ioctl.h"
44 #include "lmc_debug.h"
45
46 #define CONFIG_LMC_IGNORE_HARDWARE_HANDSHAKE 1
47
48 /*
49 * Copyright (c) 1997-2000 LAN Media Corporation (LMC)
50 * All rights reserved. www.lanmedia.com
51 *
52 * This code is written by:
53 * Andrew Stanley-Jones (asj@cban.com)
54 * Rob Braun (bbraun@vix.com),
55 * Michael Graff (explorer@vix.com) and
56 * Matt Thomas (matt@3am-software.com).
57 *
58 * This software may be used and distributed according to the terms
59 * of the GNU General Public License version 2, incorporated herein by reference.
60 */
61
62 /*
63 * For lack of a better place, put the SSI cable stuff here.
64 */
65 char *lmc_t1_cables[] = {
66 "V.10/RS423", "EIA530A", "reserved", "X.21", "V.35",
67 "EIA449/EIA530/V.36", "V.28/EIA232", "none", NULL
68 };
69
70 /*
71 * protocol independent method.
72 */
73 static void lmc_set_protocol (lmc_softc_t * const, lmc_ctl_t *);
74
75 /*
76 * media independent methods to check on media status, link, light LEDs,
77 * etc.
78 */
79 static void lmc_ds3_init (lmc_softc_t * const);
80 static void lmc_ds3_default (lmc_softc_t * const);
81 static void lmc_ds3_set_status (lmc_softc_t * const, lmc_ctl_t *);
82 static void lmc_ds3_set_100ft (lmc_softc_t * const, int);
83 static int lmc_ds3_get_link_status (lmc_softc_t * const);
84 static void lmc_ds3_set_crc_length (lmc_softc_t * const, int);
85 static void lmc_ds3_set_scram (lmc_softc_t * const, int);
86 static void lmc_ds3_watchdog (lmc_softc_t * const);
87
88 static void lmc_hssi_init (lmc_softc_t * const);
89 static void lmc_hssi_default (lmc_softc_t * const);
90 static void lmc_hssi_set_status (lmc_softc_t * const, lmc_ctl_t *);
91 static void lmc_hssi_set_clock (lmc_softc_t * const, int);
92 static int lmc_hssi_get_link_status (lmc_softc_t * const);
93 static void lmc_hssi_set_link_status (lmc_softc_t * const, int);
94 static void lmc_hssi_set_crc_length (lmc_softc_t * const, int);
95 static void lmc_hssi_watchdog (lmc_softc_t * const);
96
97 static void lmc_ssi_init (lmc_softc_t * const);
98 static void lmc_ssi_default (lmc_softc_t * const);
99 static void lmc_ssi_set_status (lmc_softc_t * const, lmc_ctl_t *);
100 static void lmc_ssi_set_clock (lmc_softc_t * const, int);
101 static void lmc_ssi_set_speed (lmc_softc_t * const, lmc_ctl_t *);
102 static int lmc_ssi_get_link_status (lmc_softc_t * const);
103 static void lmc_ssi_set_link_status (lmc_softc_t * const, int);
104 static void lmc_ssi_set_crc_length (lmc_softc_t * const, int);
105 static void lmc_ssi_watchdog (lmc_softc_t * const);
106
107 static void lmc_t1_init (lmc_softc_t * const);
108 static void lmc_t1_default (lmc_softc_t * const);
109 static void lmc_t1_set_status (lmc_softc_t * const, lmc_ctl_t *);
110 static int lmc_t1_get_link_status (lmc_softc_t * const);
111 static void lmc_t1_set_circuit_type (lmc_softc_t * const, int);
112 static void lmc_t1_set_crc_length (lmc_softc_t * const, int);
113 static void lmc_t1_set_clock (lmc_softc_t * const, int);
114 static void lmc_t1_watchdog (lmc_softc_t * const);
115
116 static void lmc_dummy_set_1 (lmc_softc_t * const, int);
117 static void lmc_dummy_set2_1 (lmc_softc_t * const, lmc_ctl_t *);
118
119 static inline void write_av9110_bit (lmc_softc_t *, int);
120 static void write_av9110 (lmc_softc_t *, u_int32_t, u_int32_t, u_int32_t,
121 u_int32_t, u_int32_t);
122
123 lmc_media_t lmc_ds3_media = {
124 lmc_ds3_init, /* special media init stuff */
125 lmc_ds3_default, /* reset to default state */
126 lmc_ds3_set_status, /* reset status to state provided */
127 lmc_dummy_set_1, /* set clock source */
128 lmc_dummy_set2_1, /* set line speed */
129 lmc_ds3_set_100ft, /* set cable length */
130 lmc_ds3_set_scram, /* set scrambler */
131 lmc_ds3_get_link_status, /* get link status */
132 lmc_dummy_set_1, /* set link status */
133 lmc_ds3_set_crc_length, /* set CRC length */
134 lmc_dummy_set_1, /* set T1 or E1 circuit type */
135 lmc_ds3_watchdog
136 };
137
138 lmc_media_t lmc_hssi_media = {
139 lmc_hssi_init, /* special media init stuff */
140 lmc_hssi_default, /* reset to default state */
141 lmc_hssi_set_status, /* reset status to state provided */
142 lmc_hssi_set_clock, /* set clock source */
143 lmc_dummy_set2_1, /* set line speed */
144 lmc_dummy_set_1, /* set cable length */
145 lmc_dummy_set_1, /* set scrambler */
146 lmc_hssi_get_link_status, /* get link status */
147 lmc_hssi_set_link_status, /* set link status */
148 lmc_hssi_set_crc_length, /* set CRC length */
149 lmc_dummy_set_1, /* set T1 or E1 circuit type */
150 lmc_hssi_watchdog
151 };
152
153 lmc_media_t lmc_ssi_media = { lmc_ssi_init, /* special media init stuff */
154 lmc_ssi_default, /* reset to default state */
155 lmc_ssi_set_status, /* reset status to state provided */
156 lmc_ssi_set_clock, /* set clock source */
157 lmc_ssi_set_speed, /* set line speed */
158 lmc_dummy_set_1, /* set cable length */
159 lmc_dummy_set_1, /* set scrambler */
160 lmc_ssi_get_link_status, /* get link status */
161 lmc_ssi_set_link_status, /* set link status */
162 lmc_ssi_set_crc_length, /* set CRC length */
163 lmc_dummy_set_1, /* set T1 or E1 circuit type */
164 lmc_ssi_watchdog
165 };
166
167 lmc_media_t lmc_t1_media = {
168 lmc_t1_init, /* special media init stuff */
169 lmc_t1_default, /* reset to default state */
170 lmc_t1_set_status, /* reset status to state provided */
171 lmc_t1_set_clock, /* set clock source */
172 lmc_dummy_set2_1, /* set line speed */
173 lmc_dummy_set_1, /* set cable length */
174 lmc_dummy_set_1, /* set scrambler */
175 lmc_t1_get_link_status, /* get link status */
176 lmc_dummy_set_1, /* set link status */
177 lmc_t1_set_crc_length, /* set CRC length */
178 lmc_t1_set_circuit_type, /* set T1 or E1 circuit type */
179 lmc_t1_watchdog
180 };
181
182 static void
183 lmc_dummy_set_1 (lmc_softc_t * const sc, int a)
184 {
185 }
186
187 static void
188 lmc_dummy_set2_1 (lmc_softc_t * const sc, lmc_ctl_t * a)
189 {
190 }
191
192 /*
193 * HSSI methods
194 */
195
196 static void
197 lmc_hssi_init (lmc_softc_t * const sc)
198 {
199 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC5200;
200
201 lmc_gpio_mkoutput (sc, LMC_GEP_HSSI_CLOCK);
202 }
203
204 static void
205 lmc_hssi_default (lmc_softc_t * const sc)
206 {
207 sc->lmc_miireg16 = LMC_MII16_LED_ALL;
208
209 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN);
210 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT);
211 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16);
212 }
213
214 /*
215 * Given a user provided state, set ourselves up to match it. This will
216 * always reset the card if needed.
217 */
218 static void
219 lmc_hssi_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
220 {
221 if (ctl == NULL)
222 {
223 sc->lmc_media->set_clock_source (sc, sc->ictl.clock_source);
224 lmc_set_protocol (sc, NULL);
225
226 return;
227 }
228
229 /*
230 * check for change in clock source
231 */
232 if (ctl->clock_source && !sc->ictl.clock_source)
233 {
234 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_INT);
235 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_INT;
236 }
237 else if (!ctl->clock_source && sc->ictl.clock_source)
238 {
239 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
240 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT);
241 }
242
243 lmc_set_protocol (sc, ctl);
244 }
245
246 /*
247 * 1 == internal, 0 == external
248 */
249 static void
250 lmc_hssi_set_clock (lmc_softc_t * const sc, int ie)
251 {
252 int old;
253 old = sc->ictl.clock_source;
254 if (ie == LMC_CTL_CLOCK_SOURCE_EXT)
255 {
256 sc->lmc_gpio |= LMC_GEP_HSSI_CLOCK;
257 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
258 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT;
259 if(old != ie)
260 printk (LMC_PRINTF_FMT ": clock external\n", LMC_PRINTF_ARGS);
261 }
262 else
263 {
264 sc->lmc_gpio &= ~(LMC_GEP_HSSI_CLOCK);
265 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
266 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
267 if(old != ie)
268 printk (LMC_PRINTF_FMT ": clock internal\n", LMC_PRINTF_ARGS);
269 }
270 }
271
272 /*
273 * return hardware link status.
274 * 0 == link is down, 1 == link is up.
275 */
276 static int
277 lmc_hssi_get_link_status (lmc_softc_t * const sc)
278 {
279 /*
280 * We're using the same code as SSI since
281 * they're practically the same
282 */
283 return lmc_ssi_get_link_status(sc);
284 }
285
286 static void
287 lmc_hssi_set_link_status (lmc_softc_t * const sc, int state)
288 {
289 if (state == LMC_LINK_UP)
290 sc->lmc_miireg16 |= LMC_MII16_HSSI_TA;
291 else
292 sc->lmc_miireg16 &= ~LMC_MII16_HSSI_TA;
293
294 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
295 }
296
297 /*
298 * 0 == 16bit, 1 == 32bit
299 */
300 static void
301 lmc_hssi_set_crc_length (lmc_softc_t * const sc, int state)
302 {
303 if (state == LMC_CTL_CRC_LENGTH_32)
304 {
305 /* 32 bit */
306 sc->lmc_miireg16 |= LMC_MII16_HSSI_CRC;
307 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
308 }
309 else
310 {
311 /* 16 bit */
312 sc->lmc_miireg16 &= ~LMC_MII16_HSSI_CRC;
313 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
314 }
315
316 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
317 }
318
319 static void
320 lmc_hssi_watchdog (lmc_softc_t * const sc)
321 {
322 /* HSSI is blank */
323 }
324
325 /*
326 * DS3 methods
327 */
328
329 /*
330 * Set cable length
331 */
332 static void
333 lmc_ds3_set_100ft (lmc_softc_t * const sc, int ie)
334 {
335 if (ie == LMC_CTL_CABLE_LENGTH_GT_100FT)
336 {
337 sc->lmc_miireg16 &= ~LMC_MII16_DS3_ZERO;
338 sc->ictl.cable_length = LMC_CTL_CABLE_LENGTH_GT_100FT;
339 }
340 else if (ie == LMC_CTL_CABLE_LENGTH_LT_100FT)
341 {
342 sc->lmc_miireg16 |= LMC_MII16_DS3_ZERO;
343 sc->ictl.cable_length = LMC_CTL_CABLE_LENGTH_LT_100FT;
344 }
345 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
346 }
347
348 static void
349 lmc_ds3_default (lmc_softc_t * const sc)
350 {
351 sc->lmc_miireg16 = LMC_MII16_LED_ALL;
352
353 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN);
354 sc->lmc_media->set_cable_length (sc, LMC_CTL_CABLE_LENGTH_LT_100FT);
355 sc->lmc_media->set_scrambler (sc, LMC_CTL_OFF);
356 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16);
357 }
358
359 /*
360 * Given a user provided state, set ourselves up to match it. This will
361 * always reset the card if needed.
362 */
363 static void
364 lmc_ds3_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
365 {
366 if (ctl == NULL)
367 {
368 sc->lmc_media->set_cable_length (sc, sc->ictl.cable_length);
369 sc->lmc_media->set_scrambler (sc, sc->ictl.scrambler_onoff);
370 lmc_set_protocol (sc, NULL);
371
372 return;
373 }
374
375 /*
376 * check for change in cable length setting
377 */
378 if (ctl->cable_length && !sc->ictl.cable_length)
379 lmc_ds3_set_100ft (sc, LMC_CTL_CABLE_LENGTH_GT_100FT);
380 else if (!ctl->cable_length && sc->ictl.cable_length)
381 lmc_ds3_set_100ft (sc, LMC_CTL_CABLE_LENGTH_LT_100FT);
382
383 /*
384 * Check for change in scrambler setting (requires reset)
385 */
386 if (ctl->scrambler_onoff && !sc->ictl.scrambler_onoff)
387 lmc_ds3_set_scram (sc, LMC_CTL_ON);
388 else if (!ctl->scrambler_onoff && sc->ictl.scrambler_onoff)
389 lmc_ds3_set_scram (sc, LMC_CTL_OFF);
390
391 lmc_set_protocol (sc, ctl);
392 }
393
394 static void
395 lmc_ds3_init (lmc_softc_t * const sc)
396 {
397 int i;
398
399 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC5245;
400
401 /* writes zeros everywhere */
402 for (i = 0; i < 21; i++)
403 {
404 lmc_mii_writereg (sc, 0, 17, i);
405 lmc_mii_writereg (sc, 0, 18, 0);
406 }
407
408 /* set some essential bits */
409 lmc_mii_writereg (sc, 0, 17, 1);
410 lmc_mii_writereg (sc, 0, 18, 0x25); /* ser, xtx */
411
412 lmc_mii_writereg (sc, 0, 17, 5);
413 lmc_mii_writereg (sc, 0, 18, 0x80); /* emode */
414
415 lmc_mii_writereg (sc, 0, 17, 14);
416 lmc_mii_writereg (sc, 0, 18, 0x30); /* rcgen, tcgen */
417
418 /* clear counters and latched bits */
419 for (i = 0; i < 21; i++)
420 {
421 lmc_mii_writereg (sc, 0, 17, i);
422 lmc_mii_readreg (sc, 0, 18);
423 }
424 }
425
426 /*
427 * 1 == DS3 payload scrambled, 0 == not scrambled
428 */
429 static void
430 lmc_ds3_set_scram (lmc_softc_t * const sc, int ie)
431 {
432 if (ie == LMC_CTL_ON)
433 {
434 sc->lmc_miireg16 |= LMC_MII16_DS3_SCRAM;
435 sc->ictl.scrambler_onoff = LMC_CTL_ON;
436 }
437 else
438 {
439 sc->lmc_miireg16 &= ~LMC_MII16_DS3_SCRAM;
440 sc->ictl.scrambler_onoff = LMC_CTL_OFF;
441 }
442 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
443 }
444
445 /*
446 * return hardware link status.
447 * 0 == link is down, 1 == link is up.
448 */
449 static int
450 lmc_ds3_get_link_status (lmc_softc_t * const sc)
451 {
452 u_int16_t link_status, link_status_11;
453 int ret = 1;
454
455 lmc_mii_writereg (sc, 0, 17, 7);
456 link_status = lmc_mii_readreg (sc, 0, 18);
457
458 /* LMC5245 (DS3) & LMC1200 (DS1) LED definitions
459 * led0 yellow = far-end adapter is in Red alarm condition
460 * led1 blue = received an Alarm Indication signal
461 * (upstream failure)
462 * led2 Green = power to adapter, Gate Array loaded & driver
463 * attached
464 * led3 red = Loss of Signal (LOS) or out of frame (OOF)
465 * conditions detected on T3 receive signal
466 */
467
468 lmc_led_on(sc, LMC_DS3_LED2);
469
470 if ((link_status & LMC_FRAMER_REG0_DLOS) ||
471 (link_status & LMC_FRAMER_REG0_OOFS)){
472 ret = 0;
473 if(sc->last_led_err[3] != 1){
474 u16 r1;
475 lmc_mii_writereg (sc, 0, 17, 01); /* Turn on Xbit error as our cisco does */
476 r1 = lmc_mii_readreg (sc, 0, 18);
477 r1 &= 0xfe;
478 lmc_mii_writereg(sc, 0, 18, r1);
479 printk(KERN_WARNING "%s: Red Alarm - Loss of Signal or Loss of Framing\n", sc->name);
480 }
481 lmc_led_on(sc, LMC_DS3_LED3); /* turn on red LED */
482 sc->last_led_err[3] = 1;
483 }
484 else {
485 lmc_led_off(sc, LMC_DS3_LED3); /* turn on red LED */
486 if(sc->last_led_err[3] == 1){
487 u16 r1;
488 lmc_mii_writereg (sc, 0, 17, 01); /* Turn off Xbit error */
489 r1 = lmc_mii_readreg (sc, 0, 18);
490 r1 |= 0x01;
491 lmc_mii_writereg(sc, 0, 18, r1);
492 }
493 sc->last_led_err[3] = 0;
494 }
495
496 lmc_mii_writereg(sc, 0, 17, 0x10);
497 link_status_11 = lmc_mii_readreg(sc, 0, 18);
498 if((link_status & LMC_FRAMER_REG0_AIS) ||
499 (link_status_11 & LMC_FRAMER_REG10_XBIT)) {
500 ret = 0;
501 if(sc->last_led_err[0] != 1){
502 printk(KERN_WARNING "%s: AIS Alarm or XBit Error\n", sc->name);
503 printk(KERN_WARNING "%s: Remote end has loss of signal or framing\n", sc->name);
504 }
505 lmc_led_on(sc, LMC_DS3_LED0);
506 sc->last_led_err[0] = 1;
507 }
508 else {
509 lmc_led_off(sc, LMC_DS3_LED0);
510 sc->last_led_err[0] = 0;
511 }
512
513 lmc_mii_writereg (sc, 0, 17, 9);
514 link_status = lmc_mii_readreg (sc, 0, 18);
515
516 if(link_status & LMC_FRAMER_REG9_RBLUE){
517 ret = 0;
518 if(sc->last_led_err[1] != 1){
519 printk(KERN_WARNING "%s: Blue Alarm - Receiving all 1's\n", sc->name);
520 }
521 lmc_led_on(sc, LMC_DS3_LED1);
522 sc->last_led_err[1] = 1;
523 }
524 else {
525 lmc_led_off(sc, LMC_DS3_LED1);
526 sc->last_led_err[1] = 0;
527 }
528
529 return ret;
530 }
531
532 /*
533 * 0 == 16bit, 1 == 32bit
534 */
535 static void
536 lmc_ds3_set_crc_length (lmc_softc_t * const sc, int state)
537 {
538 if (state == LMC_CTL_CRC_LENGTH_32)
539 {
540 /* 32 bit */
541 sc->lmc_miireg16 |= LMC_MII16_DS3_CRC;
542 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
543 }
544 else
545 {
546 /* 16 bit */
547 sc->lmc_miireg16 &= ~LMC_MII16_DS3_CRC;
548 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
549 }
550
551 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
552 }
553
554 static void
555 lmc_ds3_watchdog (lmc_softc_t * const sc)
556 {
557
558 }
559
560
561 /*
562 * SSI methods
563 */
564
565 static void
566 lmc_ssi_init (lmc_softc_t * const sc)
567 {
568 u_int16_t mii17;
569 int cable;
570
571 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC1000;
572
573 mii17 = lmc_mii_readreg (sc, 0, 17);
574
575 cable = (mii17 & LMC_MII17_SSI_CABLE_MASK) >> LMC_MII17_SSI_CABLE_SHIFT;
576 sc->ictl.cable_type = cable;
577
578 lmc_gpio_mkoutput (sc, LMC_GEP_SSI_TXCLOCK);
579 }
580
581 static void
582 lmc_ssi_default (lmc_softc_t * const sc)
583 {
584 sc->lmc_miireg16 = LMC_MII16_LED_ALL;
585
586 /*
587 * make TXCLOCK always be an output
588 */
589 lmc_gpio_mkoutput (sc, LMC_GEP_SSI_TXCLOCK);
590
591 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN);
592 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT);
593 sc->lmc_media->set_speed (sc, NULL);
594 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16);
595 }
596
597 /*
598 * Given a user provided state, set ourselves up to match it. This will
599 * always reset the card if needed.
600 */
601 static void
602 lmc_ssi_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
603 {
604 if (ctl == NULL)
605 {
606 sc->lmc_media->set_clock_source (sc, sc->ictl.clock_source);
607 sc->lmc_media->set_speed (sc, &sc->ictl);
608 lmc_set_protocol (sc, NULL);
609
610 return;
611 }
612
613 /*
614 * check for change in clock source
615 */
616 if (ctl->clock_source == LMC_CTL_CLOCK_SOURCE_INT
617 && sc->ictl.clock_source == LMC_CTL_CLOCK_SOURCE_EXT)
618 {
619 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_INT);
620 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_INT;
621 }
622 else if (ctl->clock_source == LMC_CTL_CLOCK_SOURCE_EXT
623 && sc->ictl.clock_source == LMC_CTL_CLOCK_SOURCE_INT)
624 {
625 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT);
626 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
627 }
628
629 if (ctl->clock_rate != sc->ictl.clock_rate)
630 sc->lmc_media->set_speed (sc, ctl);
631
632 lmc_set_protocol (sc, ctl);
633 }
634
635 /*
636 * 1 == internal, 0 == external
637 */
638 static void
639 lmc_ssi_set_clock (lmc_softc_t * const sc, int ie)
640 {
641 int old;
642 old = ie;
643 if (ie == LMC_CTL_CLOCK_SOURCE_EXT)
644 {
645 sc->lmc_gpio &= ~(LMC_GEP_SSI_TXCLOCK);
646 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
647 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT;
648 if(ie != old)
649 printk (LMC_PRINTF_FMT ": clock external\n", LMC_PRINTF_ARGS);
650 }
651 else
652 {
653 sc->lmc_gpio |= LMC_GEP_SSI_TXCLOCK;
654 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
655 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
656 if(ie != old)
657 printk (LMC_PRINTF_FMT ": clock internal\n", LMC_PRINTF_ARGS);
658 }
659 }
660
661 static void
662 lmc_ssi_set_speed (lmc_softc_t * const sc, lmc_ctl_t * ctl)
663 {
664 lmc_ctl_t *ictl = &sc->ictl;
665 lmc_av9110_t *av;
666
667 /* original settings for clock rate of:
668 * 100 Khz (8,25,0,0,2) were incorrect
669 * they should have been 80,125,1,3,3
670 * There are 17 param combinations to produce this freq.
671 * For 1.5 Mhz use 120,100,1,1,2 (226 param. combinations)
672 */
673 if (ctl == NULL)
674 {
675 av = &ictl->cardspec.ssi;
676 ictl->clock_rate = 1500000;
677 av->f = ictl->clock_rate;
678 av->n = 120;
679 av->m = 100;
680 av->v = 1;
681 av->x = 1;
682 av->r = 2;
683
684 write_av9110 (sc, av->n, av->m, av->v, av->x, av->r);
685 return;
686 }
687
688 av = &ctl->cardspec.ssi;
689
690 if (av->f == 0)
691 return;
692
693 ictl->clock_rate = av->f; /* really, this is the rate we are */
694 ictl->cardspec.ssi = *av;
695
696 write_av9110 (sc, av->n, av->m, av->v, av->x, av->r);
697 }
698
699 /*
700 * return hardware link status.
701 * 0 == link is down, 1 == link is up.
702 */
703 static int
704 lmc_ssi_get_link_status (lmc_softc_t * const sc)
705 {
706 u_int16_t link_status;
707 u_int32_t ticks;
708 int ret = 1;
709 int hw_hdsk = 1;
710
711 /*
712 * missing CTS? Hmm. If we require CTS on, we may never get the
713 * link to come up, so omit it in this test.
714 *
715 * Also, it seems that with a loopback cable, DCD isn't asserted,
716 * so just check for things like this:
717 * DSR _must_ be asserted.
718 * One of DCD or CTS must be asserted.
719 */
720
721 /* LMC 1000 (SSI) LED definitions
722 * led0 Green = power to adapter, Gate Array loaded &
723 * driver attached
724 * led1 Green = DSR and DTR and RTS and CTS are set
725 * led2 Green = Cable detected
726 * led3 red = No timing is available from the
727 * cable or the on-board frequency
728 * generator.
729 */
730
731 link_status = lmc_mii_readreg (sc, 0, 16);
732
733 /* Is the transmit clock still available */
734 ticks = LMC_CSR_READ (sc, csr_gp_timer);
735 ticks = 0x0000ffff - (ticks & 0x0000ffff);
736
737 lmc_led_on (sc, LMC_MII16_LED0);
738
739 /* ====== transmit clock determination ===== */
740 if (sc->lmc_timing == LMC_CTL_CLOCK_SOURCE_INT) {
741 lmc_led_off(sc, LMC_MII16_LED3);
742 }
743 else if (ticks == 0 ) { /* no clock found ? */
744 ret = 0;
745 if(sc->last_led_err[3] != 1){
746 sc->stats.tx_lossOfClockCnt++;
747 printk(KERN_WARNING "%s: Lost Clock, Link Down\n", sc->name);
748 }
749 sc->last_led_err[3] = 1;
750 lmc_led_on (sc, LMC_MII16_LED3); /* turn ON red LED */
751 }
752 else {
753 if(sc->last_led_err[3] == 1)
754 printk(KERN_WARNING "%s: Clock Returned\n", sc->name);
755 sc->last_led_err[3] = 0;
756 lmc_led_off (sc, LMC_MII16_LED3); /* turn OFF red LED */
757 }
758
759 if ((link_status & LMC_MII16_SSI_DSR) == 0) { /* Also HSSI CA */
760 ret = 0;
761 hw_hdsk = 0;
762 }
763
764 #ifdef CONFIG_LMC_IGNORE_HARDWARE_HANDSHAKE
765 if ((link_status & (LMC_MII16_SSI_CTS | LMC_MII16_SSI_DCD)) == 0){
766 ret = 0;
767 hw_hdsk = 0;
768 }
769 #endif
770
771 if(hw_hdsk == 0){
772 if(sc->last_led_err[1] != 1)
773 printk(KERN_WARNING "%s: DSR not asserted\n", sc->name);
774 sc->last_led_err[1] = 1;
775 lmc_led_off(sc, LMC_MII16_LED1);
776 }
777 else {
778 if(sc->last_led_err[1] != 0)
779 printk(KERN_WARNING "%s: DSR now asserted\n", sc->name);
780 sc->last_led_err[1] = 0;
781 lmc_led_on(sc, LMC_MII16_LED1);
782 }
783
784 if(ret == 1) {
785 lmc_led_on(sc, LMC_MII16_LED2); /* Over all good status? */
786 }
787
788 return ret;
789 }
790
791 static void
792 lmc_ssi_set_link_status (lmc_softc_t * const sc, int state)
793 {
794 if (state == LMC_LINK_UP)
795 {
796 sc->lmc_miireg16 |= (LMC_MII16_SSI_DTR | LMC_MII16_SSI_RTS);
797 printk (LMC_PRINTF_FMT ": asserting DTR and RTS\n", LMC_PRINTF_ARGS);
798 }
799 else
800 {
801 sc->lmc_miireg16 &= ~(LMC_MII16_SSI_DTR | LMC_MII16_SSI_RTS);
802 printk (LMC_PRINTF_FMT ": deasserting DTR and RTS\n", LMC_PRINTF_ARGS);
803 }
804
805 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
806
807 }
808
809 /*
810 * 0 == 16bit, 1 == 32bit
811 */
812 static void
813 lmc_ssi_set_crc_length (lmc_softc_t * const sc, int state)
814 {
815 if (state == LMC_CTL_CRC_LENGTH_32)
816 {
817 /* 32 bit */
818 sc->lmc_miireg16 |= LMC_MII16_SSI_CRC;
819 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
820 sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_4;
821
822 }
823 else
824 {
825 /* 16 bit */
826 sc->lmc_miireg16 &= ~LMC_MII16_SSI_CRC;
827 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
828 sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_2;
829 }
830
831 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
832 }
833
834 /*
835 * These are bits to program the ssi frequency generator
836 */
837 static inline void
838 write_av9110_bit (lmc_softc_t * sc, int c)
839 {
840 /*
841 * set the data bit as we need it.
842 */
843 sc->lmc_gpio &= ~(LMC_GEP_CLK);
844 if (c & 0x01)
845 sc->lmc_gpio |= LMC_GEP_DATA;
846 else
847 sc->lmc_gpio &= ~(LMC_GEP_DATA);
848 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
849
850 /*
851 * set the clock to high
852 */
853 sc->lmc_gpio |= LMC_GEP_CLK;
854 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
855
856 /*
857 * set the clock to low again.
858 */
859 sc->lmc_gpio &= ~(LMC_GEP_CLK);
860 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
861 }
862
863 static void
864 write_av9110 (lmc_softc_t * sc, u_int32_t n, u_int32_t m, u_int32_t v,
865 u_int32_t x, u_int32_t r)
866 {
867 int i;
868
869 #if 0
870 printk (LMC_PRINTF_FMT ": speed %u, %d %d %d %d %d\n",
871 LMC_PRINTF_ARGS, sc->ictl.clock_rate, n, m, v, x, r);
872 #endif
873
874 sc->lmc_gpio |= LMC_GEP_SSI_GENERATOR;
875 sc->lmc_gpio &= ~(LMC_GEP_DATA | LMC_GEP_CLK);
876 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
877
878 /*
879 * Set the TXCLOCK, GENERATOR, SERIAL, and SERIALCLK
880 * as outputs.
881 */
882 lmc_gpio_mkoutput (sc, (LMC_GEP_DATA | LMC_GEP_CLK
883 | LMC_GEP_SSI_GENERATOR));
884
885 sc->lmc_gpio &= ~(LMC_GEP_SSI_GENERATOR);
886 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
887
888 /*
889 * a shifting we will go...
890 */
891 for (i = 0; i < 7; i++)
892 write_av9110_bit (sc, n >> i);
893 for (i = 0; i < 7; i++)
894 write_av9110_bit (sc, m >> i);
895 for (i = 0; i < 1; i++)
896 write_av9110_bit (sc, v >> i);
897 for (i = 0; i < 2; i++)
898 write_av9110_bit (sc, x >> i);
899 for (i = 0; i < 2; i++)
900 write_av9110_bit (sc, r >> i);
901 for (i = 0; i < 5; i++)
902 write_av9110_bit (sc, 0x17 >> i);
903
904 /*
905 * stop driving serial-related signals
906 */
907 lmc_gpio_mkinput (sc,
908 (LMC_GEP_DATA | LMC_GEP_CLK
909 | LMC_GEP_SSI_GENERATOR));
910 }
911
912 static void
913 lmc_ssi_watchdog (lmc_softc_t * const sc)
914 {
915 u_int16_t mii17;
916 struct ssicsr2
917 {
918 unsigned short dtr:1, dsr:1, rts:1, cable:3, crc:1, led0:1, led1:1,
919 led2:1, led3:1, fifo:1, ll:1, rl:1, tm:1, loop:1;
920 };
921 struct ssicsr2 *ssicsr;
922 mii17 = lmc_mii_readreg (sc, 0, 17);
923 ssicsr = (struct ssicsr2 *) &mii17;
924 if (ssicsr->cable == 7)
925 {
926 lmc_led_off (sc, LMC_MII16_LED2);
927 }
928 else
929 {
930 lmc_led_on (sc, LMC_MII16_LED2);
931 }
932
933 }
934
935 /*
936 * T1 methods
937 */
938
939 /*
940 * The framer regs are multiplexed through MII regs 17 & 18
941 * write the register address to MII reg 17 and the * data to MII reg 18. */
942 static void
943 lmc_t1_write (lmc_softc_t * const sc, int a, int d)
944 {
945 lmc_mii_writereg (sc, 0, 17, a);
946 lmc_mii_writereg (sc, 0, 18, d);
947 }
948
949 /* Save a warning
950 static int
951 lmc_t1_read (lmc_softc_t * const sc, int a)
952 {
953 lmc_mii_writereg (sc, 0, 17, a);
954 return lmc_mii_readreg (sc, 0, 18);
955 }
956 */
957
958
959 static void
960 lmc_t1_init (lmc_softc_t * const sc)
961 {
962 u_int16_t mii16;
963 int i;
964
965 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC1200;
966 mii16 = lmc_mii_readreg (sc, 0, 16);
967
968 /* reset 8370 */
969 mii16 &= ~LMC_MII16_T1_RST;
970 lmc_mii_writereg (sc, 0, 16, mii16 | LMC_MII16_T1_RST);
971 lmc_mii_writereg (sc, 0, 16, mii16);
972
973 /* set T1 or E1 line. Uses sc->lmcmii16 reg in function so update it */
974 sc->lmc_miireg16 = mii16;
975 lmc_t1_set_circuit_type(sc, LMC_CTL_CIRCUIT_TYPE_T1);
976 mii16 = sc->lmc_miireg16;
977
978 lmc_t1_write (sc, 0x01, 0x1B); /* CR0 - primary control */
979 lmc_t1_write (sc, 0x02, 0x42); /* JAT_CR - jitter atten config */
980 lmc_t1_write (sc, 0x14, 0x00); /* LOOP - loopback config */
981 lmc_t1_write (sc, 0x15, 0x00); /* DL3_TS - external data link timeslot */
982 lmc_t1_write (sc, 0x18, 0xFF); /* PIO - programmable I/O */
983 lmc_t1_write (sc, 0x19, 0x30); /* POE - programmable OE */
984 lmc_t1_write (sc, 0x1A, 0x0F); /* CMUX - clock input mux */
985 lmc_t1_write (sc, 0x20, 0x41); /* LIU_CR - RX LIU config */
986 lmc_t1_write (sc, 0x22, 0x76); /* RLIU_CR - RX LIU config */
987 lmc_t1_write (sc, 0x40, 0x03); /* RCR0 - RX config */
988 lmc_t1_write (sc, 0x45, 0x00); /* RALM - RX alarm config */
989 lmc_t1_write (sc, 0x46, 0x05); /* LATCH - RX alarm/err/cntr latch */
990 lmc_t1_write (sc, 0x68, 0x40); /* TLIU_CR - TX LIU config */
991 lmc_t1_write (sc, 0x70, 0x0D); /* TCR0 - TX framer config */
992 lmc_t1_write (sc, 0x71, 0x05); /* TCR1 - TX config */
993 lmc_t1_write (sc, 0x72, 0x0B); /* TFRM - TX frame format */
994 lmc_t1_write (sc, 0x73, 0x00); /* TERROR - TX error insert */
995 lmc_t1_write (sc, 0x74, 0x00); /* TMAN - TX manual Sa/FEBE config */
996 lmc_t1_write (sc, 0x75, 0x00); /* TALM - TX alarm signal config */
997 lmc_t1_write (sc, 0x76, 0x00); /* TPATT - TX test pattern config */
998 lmc_t1_write (sc, 0x77, 0x00); /* TLB - TX inband loopback config */
999 lmc_t1_write (sc, 0x90, 0x05); /* CLAD_CR - clock rate adapter config */
1000 lmc_t1_write (sc, 0x91, 0x05); /* CSEL - clad freq sel */
1001 lmc_t1_write (sc, 0xA6, 0x00); /* DL1_CTL - DL1 control */
1002 lmc_t1_write (sc, 0xB1, 0x00); /* DL2_CTL - DL2 control */
1003 lmc_t1_write (sc, 0xD0, 0x47); /* SBI_CR - sys bus iface config */
1004 lmc_t1_write (sc, 0xD1, 0x70); /* RSB_CR - RX sys bus config */
1005 lmc_t1_write (sc, 0xD4, 0x30); /* TSB_CR - TX sys bus config */
1006 for (i = 0; i < 32; i++)
1007 {
1008 lmc_t1_write (sc, 0x0E0 + i, 0x00); /* SBCn - sys bus per-channel ctl */
1009 lmc_t1_write (sc, 0x100 + i, 0x00); /* TPCn - TX per-channel ctl */
1010 lmc_t1_write (sc, 0x180 + i, 0x00); /* RPCn - RX per-channel ctl */
1011 }
1012 for (i = 1; i < 25; i++)
1013 {
1014 lmc_t1_write (sc, 0x0E0 + i, 0x0D); /* SBCn - sys bus per-channel ctl */
1015 }
1016
1017 mii16 |= LMC_MII16_T1_XOE;
1018 lmc_mii_writereg (sc, 0, 16, mii16);
1019 sc->lmc_miireg16 = mii16;
1020 }
1021
1022 static void
1023 lmc_t1_default (lmc_softc_t * const sc)
1024 {
1025 sc->lmc_miireg16 = LMC_MII16_LED_ALL;
1026 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN);
1027 sc->lmc_media->set_circuit_type (sc, LMC_CTL_CIRCUIT_TYPE_T1);
1028 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16);
1029 /* Right now we can only clock from out internal source */
1030 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
1031 }
1032 /* * Given a user provided state, set ourselves up to match it. This will * always reset the card if needed.
1033 */
1034 static void
1035 lmc_t1_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
1036 {
1037 if (ctl == NULL)
1038 {
1039 sc->lmc_media->set_circuit_type (sc, sc->ictl.circuit_type);
1040 lmc_set_protocol (sc, NULL);
1041
1042 return;
1043 }
1044 /*
1045 * check for change in circuit type */
1046 if (ctl->circuit_type == LMC_CTL_CIRCUIT_TYPE_T1
1047 && sc->ictl.circuit_type ==
1048 LMC_CTL_CIRCUIT_TYPE_E1) sc->lmc_media->set_circuit_type (sc,
1049 LMC_CTL_CIRCUIT_TYPE_E1);
1050 else if (ctl->circuit_type == LMC_CTL_CIRCUIT_TYPE_E1
1051 && sc->ictl.circuit_type == LMC_CTL_CIRCUIT_TYPE_T1)
1052 sc->lmc_media->set_circuit_type (sc, LMC_CTL_CIRCUIT_TYPE_T1);
1053 lmc_set_protocol (sc, ctl);
1054 }
1055 /*
1056 * return hardware link status.
1057 * 0 == link is down, 1 == link is up.
1058 */ static int
1059 lmc_t1_get_link_status (lmc_softc_t * const sc)
1060 {
1061 u_int16_t link_status;
1062 int ret = 1;
1063
1064 /* LMC5245 (DS3) & LMC1200 (DS1) LED definitions
1065 * led0 yellow = far-end adapter is in Red alarm condition
1066 * led1 blue = received an Alarm Indication signal
1067 * (upstream failure)
1068 * led2 Green = power to adapter, Gate Array loaded & driver
1069 * attached
1070 * led3 red = Loss of Signal (LOS) or out of frame (OOF)
1071 * conditions detected on T3 receive signal
1072 */
1073 lmc_trace(sc->lmc_device, "lmc_t1_get_link_status in");
1074 lmc_led_on(sc, LMC_DS3_LED2);
1075
1076 lmc_mii_writereg (sc, 0, 17, T1FRAMER_ALARM1_STATUS);
1077 link_status = lmc_mii_readreg (sc, 0, 18);
1078
1079
1080 if (link_status & T1F_RAIS) { /* turn on blue LED */
1081 ret = 0;
1082 if(sc->last_led_err[1] != 1){
1083 printk(KERN_WARNING "%s: Receive AIS/Blue Alarm. Far end in RED alarm\n", sc->name);
1084 }
1085 lmc_led_on(sc, LMC_DS3_LED1);
1086 sc->last_led_err[1] = 1;
1087 }
1088 else {
1089 if(sc->last_led_err[1] != 0){
1090 printk(KERN_WARNING "%s: End AIS/Blue Alarm\n", sc->name);
1091 }
1092 lmc_led_off (sc, LMC_DS3_LED1);
1093 sc->last_led_err[1] = 0;
1094 }
1095
1096 /*
1097 * Yellow Alarm is nasty evil stuff, looks at data patterns
1098 * inside the channel and confuses it with HDLC framing
1099 * ignore all yellow alarms.
1100 *
1101 * Do listen to MultiFrame Yellow alarm which while implemented
1102 * different ways isn't in the channel and hence somewhat
1103 * more reliable
1104 */
1105
1106 if (link_status & T1F_RMYEL) {
1107 ret = 0;
1108 if(sc->last_led_err[0] != 1){
1109 printk(KERN_WARNING "%s: Receive Yellow AIS Alarm\n", sc->name);
1110 }
1111 lmc_led_on(sc, LMC_DS3_LED0);
1112 sc->last_led_err[0] = 1;
1113 }
1114 else {
1115 if(sc->last_led_err[0] != 0){
1116 printk(KERN_WARNING "%s: End of Yellow AIS Alarm\n", sc->name);
1117 }
1118 lmc_led_off(sc, LMC_DS3_LED0);
1119 sc->last_led_err[0] = 0;
1120 }
1121
1122 /*
1123 * Loss of signal and los of frame
1124 * Use the green bit to identify which one lit the led
1125 */
1126 if(link_status & T1F_RLOF){
1127 ret = 0;
1128 if(sc->last_led_err[3] != 1){
1129 printk(KERN_WARNING "%s: Local Red Alarm: Loss of Framing\n", sc->name);
1130 }
1131 lmc_led_on(sc, LMC_DS3_LED3);
1132 sc->last_led_err[3] = 1;
1133
1134 }
1135 else {
1136 if(sc->last_led_err[3] != 0){
1137 printk(KERN_WARNING "%s: End Red Alarm (LOF)\n", sc->name);
1138 }
1139 if( ! (link_status & T1F_RLOS))
1140 lmc_led_off(sc, LMC_DS3_LED3);
1141 sc->last_led_err[3] = 0;
1142 }
1143
1144 if(link_status & T1F_RLOS){
1145 ret = 0;
1146 if(sc->last_led_err[2] != 1){
1147 printk(KERN_WARNING "%s: Local Red Alarm: Loss of Signal\n", sc->name);
1148 }
1149 lmc_led_on(sc, LMC_DS3_LED3);
1150 sc->last_led_err[2] = 1;
1151
1152 }
1153 else {
1154 if(sc->last_led_err[2] != 0){
1155 printk(KERN_WARNING "%s: End Red Alarm (LOS)\n", sc->name);
1156 }
1157 if( ! (link_status & T1F_RLOF))
1158 lmc_led_off(sc, LMC_DS3_LED3);
1159 sc->last_led_err[2] = 0;
1160 }
1161
1162 sc->lmc_xinfo.t1_alarm1_status = link_status;
1163
1164 lmc_mii_writereg (sc, 0, 17, T1FRAMER_ALARM2_STATUS);
1165 sc->lmc_xinfo.t1_alarm2_status = lmc_mii_readreg (sc, 0, 18);
1166
1167
1168 lmc_trace(sc->lmc_device, "lmc_t1_get_link_status out");
1169
1170 return ret;
1171 }
1172
1173 /*
1174 * 1 == T1 Circuit Type , 0 == E1 Circuit Type
1175 */
1176 static void
1177 lmc_t1_set_circuit_type (lmc_softc_t * const sc, int ie)
1178 {
1179 if (ie == LMC_CTL_CIRCUIT_TYPE_T1) {
1180 sc->lmc_miireg16 |= LMC_MII16_T1_Z;
1181 sc->ictl.circuit_type = LMC_CTL_CIRCUIT_TYPE_T1;
1182 printk(KERN_INFO "%s: In T1 Mode\n", sc->name);
1183 }
1184 else {
1185 sc->lmc_miireg16 &= ~LMC_MII16_T1_Z;
1186 sc->ictl.circuit_type = LMC_CTL_CIRCUIT_TYPE_E1;
1187 printk(KERN_INFO "%s: In E1 Mode\n", sc->name);
1188 }
1189
1190 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
1191
1192 }
1193
1194 /*
1195 * 0 == 16bit, 1 == 32bit */
1196 static void
1197 lmc_t1_set_crc_length (lmc_softc_t * const sc, int state)
1198 {
1199 if (state == LMC_CTL_CRC_LENGTH_32)
1200 {
1201 /* 32 bit */
1202 sc->lmc_miireg16 |= LMC_MII16_T1_CRC;
1203 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
1204 sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_4;
1205
1206 }
1207 else
1208 {
1209 /* 16 bit */ sc->lmc_miireg16 &= ~LMC_MII16_T1_CRC;
1210 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
1211 sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_2;
1212
1213 }
1214
1215 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
1216 }
1217
1218 /*
1219 * 1 == internal, 0 == external
1220 */
1221 static void
1222 lmc_t1_set_clock (lmc_softc_t * const sc, int ie)
1223 {
1224 int old;
1225 old = ie;
1226 if (ie == LMC_CTL_CLOCK_SOURCE_EXT)
1227 {
1228 sc->lmc_gpio &= ~(LMC_GEP_SSI_TXCLOCK);
1229 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
1230 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT;
1231 if(old != ie)
1232 printk (LMC_PRINTF_FMT ": clock external\n", LMC_PRINTF_ARGS);
1233 }
1234 else
1235 {
1236 sc->lmc_gpio |= LMC_GEP_SSI_TXCLOCK;
1237 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
1238 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
1239 if(old != ie)
1240 printk (LMC_PRINTF_FMT ": clock internal\n", LMC_PRINTF_ARGS);
1241 }
1242 }
1243
1244 static void
1245 lmc_t1_watchdog (lmc_softc_t * const sc)
1246 {
1247 }
1248
1249 static void
1250 lmc_set_protocol (lmc_softc_t * const sc, lmc_ctl_t * ctl)
1251 {
1252 if (ctl == 0)
1253 {
1254 sc->ictl.keepalive_onoff = LMC_CTL_ON;
1255
1256 return;
1257 }
1258 }
1259