File: /usr/src/linux/drivers/pcmcia/i82365.c
1 /*======================================================================
2
3 Device driver for Intel 82365 and compatible PC Card controllers.
4
5 i82365.c 1.265 1999/11/10 18:36:21
6
7 The contents of this file are subject to the Mozilla Public
8 License Version 1.1 (the "License"); you may not use this file
9 except in compliance with the License. You may obtain a copy of
10 the License at http://www.mozilla.org/MPL/
11
12 Software distributed under the License is distributed on an "AS
13 IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
14 implied. See the License for the specific language governing
15 rights and limitations under the License.
16
17 The initial developer of the original code is David A. Hinds
18 <dhinds@pcmcia.sourceforge.org>. Portions created by David A. Hinds
19 are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
20
21 Alternatively, the contents of this file may be used under the
22 terms of the GNU General Public License version 2 (the "GPL"), in which
23 case the provisions of the GPL are applicable instead of the
24 above. If you wish to allow the use of your version of this file
25 only under the terms of the GPL and not to allow others to use
26 your version of this file under the MPL, indicate your decision
27 by deleting the provisions above and replace them with the notice
28 and other provisions required by the GPL. If you do not delete
29 the provisions above, a recipient may use your version of this
30 file under either the MPL or the GPL.
31
32 ======================================================================*/
33
34 #include <linux/module.h>
35 #include <linux/init.h>
36 #include <linux/config.h>
37 #include <linux/types.h>
38 #include <linux/fcntl.h>
39 #include <linux/string.h>
40 #include <linux/kernel.h>
41 #include <linux/errno.h>
42 #include <linux/timer.h>
43 #include <linux/sched.h>
44 #include <linux/slab.h>
45 #include <linux/pci.h>
46 #include <linux/ioport.h>
47 #include <linux/delay.h>
48 #include <linux/proc_fs.h>
49 #include <asm/irq.h>
50 #include <asm/io.h>
51 #include <asm/bitops.h>
52 #include <asm/segment.h>
53 #include <asm/system.h>
54
55 #include <pcmcia/version.h>
56 #include <pcmcia/cs_types.h>
57 #include <pcmcia/ss.h>
58 #include <pcmcia/cs.h>
59
60 #include <linux/isapnp.h>
61
62 /* ISA-bus controllers */
63 #include "i82365.h"
64 #include "cirrus.h"
65 #include "vg468.h"
66 #include "ricoh.h"
67 #include "o2micro.h"
68
69 /* PCI-bus controllers */
70 #include "old-yenta.h"
71 #include "smc34c90.h"
72 #include "topic.h"
73
74 #ifdef PCMCIA_DEBUG
75 static int pc_debug = PCMCIA_DEBUG;
76 MODULE_PARM(pc_debug, "i");
77 #define DEBUG(n, args...) if (pc_debug>(n)) printk(KERN_DEBUG args)
78 static const char *version =
79 "i82365.c 1.265 1999/11/10 18:36:21 (David Hinds)";
80 #else
81 #define DEBUG(n, args...) do { } while (0)
82 #endif
83
84 static void irq_count(int, void *, struct pt_regs *);
85 static inline int _check_irq(int irq, int flags)
86 {
87 if (request_irq(irq, irq_count, flags, "x", irq_count) != 0)
88 return -1;
89 free_irq(irq, irq_count);
90 return 0;
91 }
92
93 /*====================================================================*/
94
95 /* Parameters that can be set with 'insmod' */
96
97 #ifdef CONFIG_ISA
98 /* Default base address for i82365sl and other ISA chips */
99 static int i365_base = 0x3e0;
100 /* Should we probe at 0x3e2 for an extra ISA controller? */
101 static int extra_sockets = 0;
102 /* Specify a socket number to ignore */
103 static int ignore = -1;
104 /* Bit map or list of interrupts to choose from */
105 static u_int irq_mask = 0xffff;
106 static int irq_list[16] = { -1 };
107 /* The card status change interrupt -- 0 means autoselect */
108 static int cs_irq = 0;
109 #endif
110
111 /* Probe for safe interrupts? */
112 static int do_scan = 1;
113 /* Poll status interval -- 0 means default to interrupt */
114 static int poll_interval = 0;
115 /* External clock time, in nanoseconds. 120 ns = 8.33 MHz */
116 static int cycle_time = 120;
117
118 /* Cirrus options */
119 static int has_dma = -1;
120 static int has_led = -1;
121 static int has_ring = -1;
122 static int dynamic_mode = 0;
123 static int freq_bypass = -1;
124 static int setup_time = -1;
125 static int cmd_time = -1;
126 static int recov_time = -1;
127
128 #ifdef CONFIG_ISA
129 /* Vadem options */
130 static int async_clock = -1;
131 static int cable_mode = -1;
132 static int wakeup = 0;
133 #endif
134
135 #ifdef CONFIG_ISA
136 MODULE_PARM(i365_base, "i");
137 MODULE_PARM(ignore, "i");
138 MODULE_PARM(extra_sockets, "i");
139 MODULE_PARM(irq_mask, "i");
140 MODULE_PARM(irq_list, "1-16i");
141 MODULE_PARM(cs_irq, "i");
142 MODULE_PARM(async_clock, "i");
143 MODULE_PARM(cable_mode, "i");
144 MODULE_PARM(wakeup, "i");
145 #endif
146
147 MODULE_PARM(do_scan, "i");
148 MODULE_PARM(poll_interval, "i");
149 MODULE_PARM(cycle_time, "i");
150 MODULE_PARM(has_dma, "i");
151 MODULE_PARM(has_led, "i");
152 MODULE_PARM(has_ring, "i");
153 MODULE_PARM(dynamic_mode, "i");
154 MODULE_PARM(freq_bypass, "i");
155 MODULE_PARM(setup_time, "i");
156 MODULE_PARM(cmd_time, "i");
157 MODULE_PARM(recov_time, "i");
158
159 /*====================================================================*/
160
161 typedef struct cirrus_state_t {
162 u_char misc1, misc2;
163 u_char timer[6];
164 } cirrus_state_t;
165
166 typedef struct vg46x_state_t {
167 u_char ctl, ema;
168 } vg46x_state_t;
169
170 typedef struct socket_info_t {
171 u_short type, flags;
172 socket_cap_t cap;
173 ioaddr_t ioaddr;
174 u_short psock;
175 u_char cs_irq, intr;
176 void (*handler)(void *info, u_int events);
177 void *info;
178 #ifdef CONFIG_PROC_FS
179 struct proc_dir_entry *proc;
180 #endif
181 union {
182 cirrus_state_t cirrus;
183 vg46x_state_t vg46x;
184 } state;
185 } socket_info_t;
186
187 /* Where we keep track of our sockets... */
188 static int sockets = 0;
189 static socket_info_t socket[8] = {
190 { 0, }, /* ... */
191 };
192
193 /* Default ISA interrupt mask */
194 #define I365_MASK 0xdeb8 /* irq 15,14,12,11,10,9,7,5,4,3 */
195
196 #ifdef CONFIG_ISA
197 static int grab_irq;
198 static spinlock_t isa_lock = SPIN_LOCK_UNLOCKED;
199 #define ISA_LOCK(n, f) spin_lock_irqsave(&isa_lock, f)
200 #define ISA_UNLOCK(n, f) spin_unlock_irqrestore(&isa_lock, f)
201 #else
202 #define ISA_LOCK(n, f) do { } while (0)
203 #define ISA_UNLOCK(n, f) do { } while (0)
204 #endif
205
206 static struct timer_list poll_timer;
207
208 /*====================================================================*/
209
210 /* Default settings for PCI command configuration register */
211 #define CMD_DFLT (PCI_COMMAND_IO|PCI_COMMAND_MEMORY| \
212 PCI_COMMAND_MASTER|PCI_COMMAND_WAIT)
213
214 /* These definitions must match the pcic table! */
215 #ifdef CONFIG_ISA
216 typedef enum pcic_id {
217 IS_I82365A, IS_I82365B, IS_I82365DF,
218 IS_IBM, IS_RF5Cx96, IS_VLSI, IS_VG468, IS_VG469,
219 IS_PD6710, IS_PD672X, IS_VT83C469,
220 } pcic_id;
221 #endif
222
223 /* Flags for classifying groups of controllers */
224 #define IS_VADEM 0x0001
225 #define IS_CIRRUS 0x0002
226 #define IS_TI 0x0004
227 #define IS_O2MICRO 0x0008
228 #define IS_VIA 0x0010
229 #define IS_TOPIC 0x0020
230 #define IS_RICOH 0x0040
231 #define IS_UNKNOWN 0x0400
232 #define IS_VG_PWR 0x0800
233 #define IS_DF_PWR 0x1000
234 #define IS_PCI 0x2000
235 #define IS_ALIVE 0x8000
236
237 typedef struct pcic_t {
238 char *name;
239 u_short flags;
240 } pcic_t;
241
242 static pcic_t pcic[] = {
243 #ifdef CONFIG_ISA
244 { "Intel i82365sl A step", 0 },
245 { "Intel i82365sl B step", 0 },
246 { "Intel i82365sl DF", IS_DF_PWR },
247 { "IBM Clone", 0 },
248 { "Ricoh RF5C296/396", 0 },
249 { "VLSI 82C146", 0 },
250 { "Vadem VG-468", IS_VADEM },
251 { "Vadem VG-469", IS_VADEM|IS_VG_PWR },
252 { "Cirrus PD6710", IS_CIRRUS },
253 { "Cirrus PD672x", IS_CIRRUS },
254 { "VIA VT83C469", IS_CIRRUS|IS_VIA },
255 #endif
256 };
257
258 #define PCIC_COUNT (sizeof(pcic)/sizeof(pcic_t))
259
260 /*====================================================================*/
261
262 static spinlock_t bus_lock = SPIN_LOCK_UNLOCKED;
263
264 static u_char i365_get(u_short sock, u_short reg)
265 {
266 unsigned long flags;
267 spin_lock_irqsave(&bus_lock,flags);
268 {
269 ioaddr_t port = socket[sock].ioaddr;
270 u_char val;
271 reg = I365_REG(socket[sock].psock, reg);
272 outb(reg, port); val = inb(port+1);
273 spin_unlock_irqrestore(&bus_lock,flags);
274 return val;
275 }
276 }
277
278 static void i365_set(u_short sock, u_short reg, u_char data)
279 {
280 unsigned long flags;
281 spin_lock_irqsave(&bus_lock,flags);
282 {
283 ioaddr_t port = socket[sock].ioaddr;
284 u_char val = I365_REG(socket[sock].psock, reg);
285 outb(val, port); outb(data, port+1);
286 spin_unlock_irqrestore(&bus_lock,flags);
287 }
288 }
289
290 static void i365_bset(u_short sock, u_short reg, u_char mask)
291 {
292 u_char d = i365_get(sock, reg);
293 d |= mask;
294 i365_set(sock, reg, d);
295 }
296
297 static void i365_bclr(u_short sock, u_short reg, u_char mask)
298 {
299 u_char d = i365_get(sock, reg);
300 d &= ~mask;
301 i365_set(sock, reg, d);
302 }
303
304 static void i365_bflip(u_short sock, u_short reg, u_char mask, int b)
305 {
306 u_char d = i365_get(sock, reg);
307 if (b)
308 d |= mask;
309 else
310 d &= ~mask;
311 i365_set(sock, reg, d);
312 }
313
314 static u_short i365_get_pair(u_short sock, u_short reg)
315 {
316 u_short a, b;
317 a = i365_get(sock, reg);
318 b = i365_get(sock, reg+1);
319 return (a + (b<<8));
320 }
321
322 static void i365_set_pair(u_short sock, u_short reg, u_short data)
323 {
324 i365_set(sock, reg, data & 0xff);
325 i365_set(sock, reg+1, data >> 8);
326 }
327
328 /*======================================================================
329
330 Code to save and restore global state information for Cirrus
331 PD67xx controllers, and to set and report global configuration
332 options.
333
334 The VIA controllers also use these routines, as they are mostly
335 Cirrus lookalikes, without the timing registers.
336
337 ======================================================================*/
338
339 #define flip(v,b,f) (v = ((f)<0) ? v : ((f) ? ((v)|(b)) : ((v)&(~b))))
340
341 static void cirrus_get_state(u_short s)
342 {
343 int i;
344 cirrus_state_t *p = &socket[s].state.cirrus;
345 p->misc1 = i365_get(s, PD67_MISC_CTL_1);
346 p->misc1 &= (PD67_MC1_MEDIA_ENA | PD67_MC1_INPACK_ENA);
347 p->misc2 = i365_get(s, PD67_MISC_CTL_2);
348 for (i = 0; i < 6; i++)
349 p->timer[i] = i365_get(s, PD67_TIME_SETUP(0)+i);
350 }
351
352 static void cirrus_set_state(u_short s)
353 {
354 int i;
355 u_char misc;
356 cirrus_state_t *p = &socket[s].state.cirrus;
357
358 misc = i365_get(s, PD67_MISC_CTL_2);
359 i365_set(s, PD67_MISC_CTL_2, p->misc2);
360 if (misc & PD67_MC2_SUSPEND) mdelay(50);
361 misc = i365_get(s, PD67_MISC_CTL_1);
362 misc &= ~(PD67_MC1_MEDIA_ENA | PD67_MC1_INPACK_ENA);
363 i365_set(s, PD67_MISC_CTL_1, misc | p->misc1);
364 for (i = 0; i < 6; i++)
365 i365_set(s, PD67_TIME_SETUP(0)+i, p->timer[i]);
366 }
367
368 static u_int __init cirrus_set_opts(u_short s, char *buf)
369 {
370 socket_info_t *t = &socket[s];
371 cirrus_state_t *p = &socket[s].state.cirrus;
372 u_int mask = 0xffff;
373
374 if (has_ring == -1) has_ring = 1;
375 flip(p->misc2, PD67_MC2_IRQ15_RI, has_ring);
376 flip(p->misc2, PD67_MC2_DYNAMIC_MODE, dynamic_mode);
377 if (p->misc2 & PD67_MC2_IRQ15_RI)
378 strcat(buf, " [ring]");
379 if (p->misc2 & PD67_MC2_DYNAMIC_MODE)
380 strcat(buf, " [dyn mode]");
381 if (p->misc1 & PD67_MC1_INPACK_ENA)
382 strcat(buf, " [inpack]");
383 if (!(t->flags & IS_PCI)) {
384 if (p->misc2 & PD67_MC2_IRQ15_RI)
385 mask &= ~0x8000;
386 if (has_led > 0) {
387 strcat(buf, " [led]");
388 mask &= ~0x1000;
389 }
390 if (has_dma > 0) {
391 strcat(buf, " [dma]");
392 mask &= ~0x0600;
393 flip(p->misc2, PD67_MC2_FREQ_BYPASS, freq_bypass);
394 if (p->misc2 & PD67_MC2_FREQ_BYPASS)
395 strcat(buf, " [freq bypass]");
396 }
397 }
398 if (!(t->flags & IS_VIA)) {
399 if (setup_time >= 0)
400 p->timer[0] = p->timer[3] = setup_time;
401 if (cmd_time > 0) {
402 p->timer[1] = cmd_time;
403 p->timer[4] = cmd_time*2+4;
404 }
405 if (p->timer[1] == 0) {
406 p->timer[1] = 6; p->timer[4] = 16;
407 if (p->timer[0] == 0)
408 p->timer[0] = p->timer[3] = 1;
409 }
410 if (recov_time >= 0)
411 p->timer[2] = p->timer[5] = recov_time;
412 buf += strlen(buf);
413 sprintf(buf, " [%d/%d/%d] [%d/%d/%d]", p->timer[0], p->timer[1],
414 p->timer[2], p->timer[3], p->timer[4], p->timer[5]);
415 }
416 return mask;
417 }
418
419 /*======================================================================
420
421 Code to save and restore global state information for Vadem VG468
422 and VG469 controllers, and to set and report global configuration
423 options.
424
425 ======================================================================*/
426
427 #ifdef CONFIG_ISA
428
429 static void vg46x_get_state(u_short s)
430 {
431 vg46x_state_t *p = &socket[s].state.vg46x;
432 p->ctl = i365_get(s, VG468_CTL);
433 if (socket[s].type == IS_VG469)
434 p->ema = i365_get(s, VG469_EXT_MODE);
435 }
436
437 static void vg46x_set_state(u_short s)
438 {
439 vg46x_state_t *p = &socket[s].state.vg46x;
440 i365_set(s, VG468_CTL, p->ctl);
441 if (socket[s].type == IS_VG469)
442 i365_set(s, VG469_EXT_MODE, p->ema);
443 }
444
445 static u_int __init vg46x_set_opts(u_short s, char *buf)
446 {
447 vg46x_state_t *p = &socket[s].state.vg46x;
448
449 flip(p->ctl, VG468_CTL_ASYNC, async_clock);
450 flip(p->ema, VG469_MODE_CABLE, cable_mode);
451 if (p->ctl & VG468_CTL_ASYNC)
452 strcat(buf, " [async]");
453 if (p->ctl & VG468_CTL_INPACK)
454 strcat(buf, " [inpack]");
455 if (socket[s].type == IS_VG469) {
456 u_char vsel = i365_get(s, VG469_VSELECT);
457 if (vsel & VG469_VSEL_EXT_STAT) {
458 strcat(buf, " [ext mode]");
459 if (vsel & VG469_VSEL_EXT_BUS)
460 strcat(buf, " [isa buf]");
461 }
462 if (p->ema & VG469_MODE_CABLE)
463 strcat(buf, " [cable]");
464 if (p->ema & VG469_MODE_COMPAT)
465 strcat(buf, " [c step]");
466 }
467 return 0xffff;
468 }
469
470 #endif
471
472
473 /*======================================================================
474
475 Generic routines to get and set controller options
476
477 ======================================================================*/
478
479 static void get_bridge_state(u_short s)
480 {
481 socket_info_t *t = &socket[s];
482 if (t->flags & IS_CIRRUS)
483 cirrus_get_state(s);
484 #ifdef CONFIG_ISA
485 else if (t->flags & IS_VADEM)
486 vg46x_get_state(s);
487 #endif
488 }
489
490 static void set_bridge_state(u_short s)
491 {
492 socket_info_t *t = &socket[s];
493 if (t->flags & IS_CIRRUS)
494 cirrus_set_state(s);
495 else {
496 i365_set(s, I365_GBLCTL, 0x00);
497 i365_set(s, I365_GENCTL, 0x00);
498 }
499 i365_bflip(s, I365_INTCTL, I365_INTR_ENA, t->intr);
500 #ifdef CONFIG_ISA
501 if (t->flags & IS_VADEM)
502 vg46x_set_state(s);
503 #endif
504 }
505
506 static u_int __init set_bridge_opts(u_short s, u_short ns)
507 {
508 u_short i;
509 u_int m = 0xffff;
510 char buf[128];
511
512 for (i = s; i < s+ns; i++) {
513 if (socket[i].flags & IS_ALIVE) {
514 printk(KERN_INFO " host opts [%d]: already alive!\n", i);
515 continue;
516 }
517 buf[0] = '\0';
518 get_bridge_state(i);
519 if (socket[i].flags & IS_CIRRUS)
520 m = cirrus_set_opts(i, buf);
521 #ifdef CONFIG_ISA
522 else if (socket[i].flags & IS_VADEM)
523 m = vg46x_set_opts(i, buf);
524 #endif
525 set_bridge_state(i);
526 printk(KERN_INFO " host opts [%d]:%s\n", i,
527 (*buf) ? buf : " none");
528 }
529 return m;
530 }
531
532 /*======================================================================
533
534 Interrupt testing code, for ISA and PCI interrupts
535
536 ======================================================================*/
537
538 static volatile u_int irq_hits;
539 static u_short irq_sock;
540
541 static void irq_count(int irq, void *dev, struct pt_regs *regs)
542 {
543 i365_get(irq_sock, I365_CSC);
544 irq_hits++;
545 DEBUG(2, "-> hit on irq %d\n", irq);
546 }
547
548 static u_int __init test_irq(u_short sock, int irq)
549 {
550 DEBUG(2, " testing ISA irq %d\n", irq);
551 if (request_irq(irq, irq_count, 0, "scan", irq_count) != 0)
552 return 1;
553 irq_hits = 0; irq_sock = sock;
554 __set_current_state(TASK_UNINTERRUPTIBLE);
555 schedule_timeout(HZ/100);
556 if (irq_hits) {
557 free_irq(irq, irq_count);
558 DEBUG(2, " spurious hit!\n");
559 return 1;
560 }
561
562 /* Generate one interrupt */
563 i365_set(sock, I365_CSCINT, I365_CSC_DETECT | (irq << 4));
564 i365_bset(sock, I365_GENCTL, I365_CTL_SW_IRQ);
565 udelay(1000);
566
567 free_irq(irq, irq_count);
568
569 /* mask all interrupts */
570 i365_set(sock, I365_CSCINT, 0);
571 DEBUG(2, " hits = %d\n", irq_hits);
572
573 return (irq_hits != 1);
574 }
575
576 #ifdef CONFIG_ISA
577
578 static u_int __init isa_scan(u_short sock, u_int mask0)
579 {
580 u_int mask1 = 0;
581 int i;
582
583 #ifdef __alpha__
584 #define PIC 0x4d0
585 /* Don't probe level-triggered interrupts -- reserved for PCI */
586 mask0 &= ~(inb(PIC) | (inb(PIC+1) << 8));
587 #endif
588
589 if (do_scan) {
590 set_bridge_state(sock);
591 i365_set(sock, I365_CSCINT, 0);
592 for (i = 0; i < 16; i++)
593 if ((mask0 & (1 << i)) && (test_irq(sock, i) == 0))
594 mask1 |= (1 << i);
595 for (i = 0; i < 16; i++)
596 if ((mask1 & (1 << i)) && (test_irq(sock, i) != 0))
597 mask1 ^= (1 << i);
598 }
599
600 printk(KERN_INFO " ISA irqs (");
601 if (mask1) {
602 printk("scanned");
603 } else {
604 /* Fallback: just find interrupts that aren't in use */
605 for (i = 0; i < 16; i++)
606 if ((mask0 & (1 << i)) && (_check_irq(i, 0) == 0))
607 mask1 |= (1 << i);
608 printk("default");
609 /* If scan failed, default to polled status */
610 if (!cs_irq && (poll_interval == 0)) poll_interval = HZ;
611 }
612 printk(") = ");
613
614 for (i = 0; i < 16; i++)
615 if (mask1 & (1<<i))
616 printk("%s%d", ((mask1 & ((1<<i)-1)) ? "," : ""), i);
617 if (mask1 == 0) printk("none!");
618
619 return mask1;
620 }
621
622 #endif /* CONFIG_ISA */
623
624 /*====================================================================*/
625
626 /* Time conversion functions */
627
628 static int to_cycles(int ns)
629 {
630 return ns/cycle_time;
631 }
632
633 static int to_ns(int cycles)
634 {
635 return cycle_time*cycles;
636 }
637
638 /*====================================================================*/
639
640 #ifdef CONFIG_ISA
641
642 static int __init identify(u_short port, u_short sock)
643 {
644 u_char val;
645 int type = -1;
646
647 /* Use the next free entry in the socket table */
648 socket[sockets].ioaddr = port;
649 socket[sockets].psock = sock;
650
651 /* Wake up a sleepy Cirrus controller */
652 if (wakeup) {
653 i365_bclr(sockets, PD67_MISC_CTL_2, PD67_MC2_SUSPEND);
654 /* Pause at least 50 ms */
655 mdelay(50);
656 }
657
658 if ((val = i365_get(sockets, I365_IDENT)) & 0x70)
659 return -1;
660 switch (val) {
661 case 0x82:
662 type = IS_I82365A; break;
663 case 0x83:
664 type = IS_I82365B; break;
665 case 0x84:
666 type = IS_I82365DF; break;
667 case 0x88: case 0x89: case 0x8a:
668 type = IS_IBM; break;
669 }
670
671 /* Check for Vadem VG-468 chips */
672 outb(0x0e, port);
673 outb(0x37, port);
674 i365_bset(sockets, VG468_MISC, VG468_MISC_VADEMREV);
675 val = i365_get(sockets, I365_IDENT);
676 if (val & I365_IDENT_VADEM) {
677 i365_bclr(sockets, VG468_MISC, VG468_MISC_VADEMREV);
678 type = ((val & 7) >= 4) ? IS_VG469 : IS_VG468;
679 }
680
681 /* Check for Ricoh chips */
682 val = i365_get(sockets, RF5C_CHIP_ID);
683 if ((val == RF5C_CHIP_RF5C296) || (val == RF5C_CHIP_RF5C396))
684 type = IS_RF5Cx96;
685
686 /* Check for Cirrus CL-PD67xx chips */
687 i365_set(sockets, PD67_CHIP_INFO, 0);
688 val = i365_get(sockets, PD67_CHIP_INFO);
689 if ((val & PD67_INFO_CHIP_ID) == PD67_INFO_CHIP_ID) {
690 val = i365_get(sockets, PD67_CHIP_INFO);
691 if ((val & PD67_INFO_CHIP_ID) == 0) {
692 type = (val & PD67_INFO_SLOTS) ? IS_PD672X : IS_PD6710;
693 i365_set(sockets, PD67_EXT_INDEX, 0xe5);
694 if (i365_get(sockets, PD67_EXT_INDEX) != 0xe5)
695 type = IS_VT83C469;
696 }
697 }
698 return type;
699 } /* identify */
700
701 #endif
702
703 /*======================================================================
704
705 See if a card is present, powered up, in IO mode, and already
706 bound to a (non PC Card) Linux driver. We leave these alone.
707
708 We make an exception for cards that seem to be serial devices.
709
710 ======================================================================*/
711
712 static int __init is_alive(u_short sock)
713 {
714 u_char stat;
715 u_short start, stop;
716
717 stat = i365_get(sock, I365_STATUS);
718 start = i365_get_pair(sock, I365_IO(0)+I365_W_START);
719 stop = i365_get_pair(sock, I365_IO(0)+I365_W_STOP);
720 if ((stat & I365_CS_DETECT) && (stat & I365_CS_POWERON) &&
721 (i365_get(sock, I365_INTCTL) & I365_PC_IOCARD) &&
722 (i365_get(sock, I365_ADDRWIN) & I365_ENA_IO(0)) &&
723 (check_region(start, stop-start+1) != 0) &&
724 ((start & 0xfeef) != 0x02e8))
725 return 1;
726 else
727 return 0;
728 }
729
730 /*====================================================================*/
731
732 static void __init add_socket(u_short port, int psock, int type)
733 {
734 socket[sockets].ioaddr = port;
735 socket[sockets].psock = psock;
736 socket[sockets].type = type;
737 socket[sockets].flags = pcic[type].flags;
738 if (is_alive(sockets))
739 socket[sockets].flags |= IS_ALIVE;
740 sockets++;
741 }
742
743 static void __init add_pcic(int ns, int type)
744 {
745 u_int mask = 0, i, base;
746 int use_pci = 0, isa_irq = 0;
747 socket_info_t *t = &socket[sockets-ns];
748
749 base = sockets-ns;
750 if (t->ioaddr > 0) request_region(t->ioaddr, 2, "i82365");
751
752 if (base == 0) printk("\n");
753 printk(KERN_INFO " %s", pcic[type].name);
754 printk(" ISA-to-PCMCIA at port %#x ofs 0x%02x",
755 t->ioaddr, t->psock*0x40);
756 printk(", %d socket%s\n", ns, ((ns > 1) ? "s" : ""));
757
758 #ifdef CONFIG_ISA
759 /* Set host options, build basic interrupt mask */
760 if (irq_list[0] == -1)
761 mask = irq_mask;
762 else
763 for (i = mask = 0; i < 16; i++)
764 mask |= (1<<irq_list[i]);
765 #endif
766 mask &= I365_MASK & set_bridge_opts(base, ns);
767 #ifdef CONFIG_ISA
768 /* Scan for ISA interrupts */
769 mask = isa_scan(base, mask);
770 #else
771 printk(KERN_INFO " PCI card interrupts,");
772 #endif
773
774 #ifdef CONFIG_ISA
775 /* Poll if only two interrupts available */
776 if (!use_pci && !poll_interval) {
777 u_int tmp = (mask & 0xff20);
778 tmp = tmp & (tmp-1);
779 if ((tmp & (tmp-1)) == 0)
780 poll_interval = HZ;
781 }
782 /* Only try an ISA cs_irq if this is the first controller */
783 if (!use_pci && !grab_irq && (cs_irq || !poll_interval)) {
784 /* Avoid irq 12 unless it is explicitly requested */
785 u_int cs_mask = mask & ((cs_irq) ? (1<<cs_irq) : ~(1<<12));
786 for (cs_irq = 15; cs_irq > 0; cs_irq--)
787 if ((cs_mask & (1 << cs_irq)) &&
788 (_check_irq(cs_irq, 0) == 0))
789 break;
790 if (cs_irq) {
791 grab_irq = 1;
792 isa_irq = cs_irq;
793 printk(" status change on irq %d\n", cs_irq);
794 }
795 }
796 #endif
797
798 if (!use_pci && !isa_irq) {
799 if (poll_interval == 0)
800 poll_interval = HZ;
801 printk(" polling interval = %d ms\n",
802 poll_interval * 1000 / HZ);
803
804 }
805
806 /* Update socket interrupt information, capabilities */
807 for (i = 0; i < ns; i++) {
808 t[i].cap.features |= SS_CAP_PCCARD;
809 t[i].cap.map_size = 0x1000;
810 t[i].cap.irq_mask = mask;
811 t[i].cs_irq = isa_irq;
812 }
813
814 } /* add_pcic */
815
816
817 /*====================================================================*/
818
819 #ifdef CONFIG_ISA
820
821 #if defined(CONFIG_ISAPNP) || (defined(CONFIG_ISAPNP_MODULE) && defined(MODULE))
822 #define I82365_ISAPNP
823 #endif
824
825 #ifdef I82365_ISAPNP
826 static struct isapnp_device_id id_table[] __initdata = {
827 { ISAPNP_ANY_ID, ISAPNP_ANY_ID, ISAPNP_VENDOR('P', 'N', 'P'),
828 ISAPNP_FUNCTION(0x0e00), (unsigned long) "Intel 82365-Compatible" },
829 { ISAPNP_ANY_ID, ISAPNP_ANY_ID, ISAPNP_VENDOR('P', 'N', 'P'),
830 ISAPNP_FUNCTION(0x0e01), (unsigned long) "Cirrus Logic CL-PD6720" },
831 { ISAPNP_ANY_ID, ISAPNP_ANY_ID, ISAPNP_VENDOR('P', 'N', 'P'),
832 ISAPNP_FUNCTION(0x0e02), (unsigned long) "VLSI VL82C146" },
833 { 0 }
834 };
835 MODULE_DEVICE_TABLE(isapnp, id_table);
836
837 static struct pci_dev *i82365_pnpdev;
838 #endif
839
840 static void __init isa_probe(void)
841 {
842 int i, j, sock, k, ns, id;
843 ioaddr_t port;
844 #ifdef I82365_ISAPNP
845 struct isapnp_device_id *devid;
846 struct pci_dev *dev;
847
848 for (devid = id_table; devid->vendor; devid++) {
849 if ((dev = isapnp_find_dev(NULL, devid->vendor, devid->function, NULL))) {
850 printk("ISAPNP ");
851
852 if (dev->prepare && dev->prepare(dev) < 0) {
853 printk("prepare failed\n");
854 break;
855 }
856
857 if (dev->activate && dev->activate(dev) < 0) {
858 printk("activate failed\n");
859 break;
860 }
861
862 if ((i365_base = pci_resource_start(dev, 0))) {
863 printk("no resources ?\n");
864 break;
865 }
866 i82365_pnpdev = dev;
867 break;
868 }
869 }
870 #endif
871
872 if (check_region(i365_base, 2) != 0) {
873 if (sockets == 0)
874 printk("port conflict at %#x\n", i365_base);
875 return;
876 }
877
878 id = identify(i365_base, 0);
879 if ((id == IS_I82365DF) && (identify(i365_base, 1) != id)) {
880 for (i = 0; i < 4; i++) {
881 if (i == ignore) continue;
882 port = i365_base + ((i & 1) << 2) + ((i & 2) << 1);
883 sock = (i & 1) << 1;
884 if (identify(port, sock) == IS_I82365DF) {
885 add_socket(port, sock, IS_VLSI);
886 add_pcic(1, IS_VLSI);
887 }
888 }
889 } else {
890 for (i = 0; i < (extra_sockets ? 8 : 4); i += 2) {
891 port = i365_base + 2*(i>>2);
892 sock = (i & 3);
893 id = identify(port, sock);
894 if (id < 0) continue;
895
896 for (j = ns = 0; j < 2; j++) {
897 /* Does the socket exist? */
898 if ((ignore == i+j) || (identify(port, sock+j) < 0))
899 continue;
900 /* Check for bad socket decode */
901 for (k = 0; k <= sockets; k++)
902 i365_set(k, I365_MEM(0)+I365_W_OFF, k);
903 for (k = 0; k <= sockets; k++)
904 if (i365_get(k, I365_MEM(0)+I365_W_OFF) != k)
905 break;
906 if (k <= sockets) break;
907 add_socket(port, sock+j, id); ns++;
908 }
909 if (ns != 0) add_pcic(ns, id);
910 }
911 }
912 }
913
914 #endif
915
916 /*====================================================================*/
917
918 static u_int pending_events[8];
919 static spinlock_t pending_event_lock = SPIN_LOCK_UNLOCKED;
920
921 static void pcic_bh(void *dummy)
922 {
923 u_int events;
924 int i;
925
926 for (i=0; i < sockets; i++) {
927 spin_lock_irq(&pending_event_lock);
928 events = pending_events[i];
929 pending_events[i] = 0;
930 spin_unlock_irq(&pending_event_lock);
931 /*
932 SS_DETECT events need a small delay here. The reason for this is that
933 the "is there a card" electronics need time to see the card after the
934 "we have a card coming in" electronics have seen it.
935 */
936 if (events & SS_DETECT)
937 mdelay(4);
938 if (socket[i].handler)
939 socket[i].handler(socket[i].info, events);
940 }
941 }
942
943 static struct tq_struct pcic_task = {
944 routine: pcic_bh
945 };
946
947 static unsigned long last_detect_jiffies;
948
949 static void pcic_interrupt(int irq, void *dev,
950 struct pt_regs *regs)
951 {
952 int i, j, csc;
953 u_int events, active;
954 #ifdef CONFIG_ISA
955 u_long flags = 0;
956 #endif
957
958 DEBUG(4, "i82365: pcic_interrupt(%d)\n", irq);
959
960 for (j = 0; j < 20; j++) {
961 active = 0;
962 for (i = 0; i < sockets; i++) {
963 if ((socket[i].cs_irq != irq) &&
964 (socket[i].cap.pci_irq != irq))
965 continue;
966 ISA_LOCK(i, flags);
967 csc = i365_get(i, I365_CSC);
968 if ((csc == 0) || (!socket[i].handler) ||
969 (i365_get(i, I365_IDENT) & 0x70)) {
970 ISA_UNLOCK(i, flags);
971 continue;
972 }
973 events = (csc & I365_CSC_DETECT) ? SS_DETECT : 0;
974
975
976 /* Several sockets will send multiple "new card detected"
977 events in rapid succession. However, the rest of the pcmcia expects
978 only one such event. We just ignore these events by having a
979 timeout */
980
981 if (events) {
982 if ((jiffies - last_detect_jiffies)<(HZ/20))
983 events = 0;
984 last_detect_jiffies = jiffies;
985
986 }
987
988 if (i365_get(i, I365_INTCTL) & I365_PC_IOCARD)
989 events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
990 else {
991 events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
992 events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
993 events |= (csc & I365_CSC_READY) ? SS_READY : 0;
994 }
995 ISA_UNLOCK(i, flags);
996 DEBUG(2, "i82365: socket %d event 0x%02x\n", i, events);
997
998 if (events) {
999 spin_lock(&pending_event_lock);
1000 pending_events[i] |= events;
1001 spin_unlock(&pending_event_lock);
1002 schedule_task(&pcic_task);
1003 }
1004 active |= events;
1005 }
1006 if (!active) break;
1007 }
1008 if (j == 20)
1009 printk(KERN_NOTICE "i82365: infinite loop in interrupt handler\n");
1010
1011 DEBUG(4, "i82365: interrupt done\n");
1012 } /* pcic_interrupt */
1013
1014 static void pcic_interrupt_wrapper(u_long data)
1015 {
1016 pcic_interrupt(0, NULL, NULL);
1017 poll_timer.expires = jiffies + poll_interval;
1018 add_timer(&poll_timer);
1019 }
1020
1021 /*====================================================================*/
1022
1023 static int pcic_register_callback(unsigned int sock, void (*handler)(void *, unsigned int), void * info)
1024 {
1025 socket[sock].handler = handler;
1026 socket[sock].info = info;
1027 if (handler == NULL) {
1028 MOD_DEC_USE_COUNT;
1029 } else {
1030 MOD_INC_USE_COUNT;
1031 }
1032 return 0;
1033 } /* pcic_register_callback */
1034
1035 /*====================================================================*/
1036
1037 static int pcic_inquire_socket(unsigned int sock, socket_cap_t *cap)
1038 {
1039 *cap = socket[sock].cap;
1040 return 0;
1041 } /* pcic_inquire_socket */
1042
1043 /*====================================================================*/
1044
1045 static int i365_get_status(u_short sock, u_int *value)
1046 {
1047 u_int status;
1048
1049 status = i365_get(sock, I365_STATUS);
1050 *value = ((status & I365_CS_DETECT) == I365_CS_DETECT)
1051 ? SS_DETECT : 0;
1052
1053 if (i365_get(sock, I365_INTCTL) & I365_PC_IOCARD)
1054 *value |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG;
1055 else {
1056 *value |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD;
1057 *value |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN;
1058 }
1059 *value |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0;
1060 *value |= (status & I365_CS_READY) ? SS_READY : 0;
1061 *value |= (status & I365_CS_POWERON) ? SS_POWERON : 0;
1062
1063 #ifdef CONFIG_ISA
1064 if (socket[sock].type == IS_VG469) {
1065 status = i365_get(sock, VG469_VSENSE);
1066 if (socket[sock].psock & 1) {
1067 *value |= (status & VG469_VSENSE_B_VS1) ? 0 : SS_3VCARD;
1068 *value |= (status & VG469_VSENSE_B_VS2) ? 0 : SS_XVCARD;
1069 } else {
1070 *value |= (status & VG469_VSENSE_A_VS1) ? 0 : SS_3VCARD;
1071 *value |= (status & VG469_VSENSE_A_VS2) ? 0 : SS_XVCARD;
1072 }
1073 }
1074 #endif
1075
1076 DEBUG(1, "i82365: GetStatus(%d) = %#4.4x\n", sock, *value);
1077 return 0;
1078 } /* i365_get_status */
1079
1080 /*====================================================================*/
1081
1082 static int i365_get_socket(u_short sock, socket_state_t *state)
1083 {
1084 socket_info_t *t = &socket[sock];
1085 u_char reg, vcc, vpp;
1086
1087 reg = i365_get(sock, I365_POWER);
1088 state->flags = (reg & I365_PWR_AUTO) ? SS_PWR_AUTO : 0;
1089 state->flags |= (reg & I365_PWR_OUT) ? SS_OUTPUT_ENA : 0;
1090 vcc = reg & I365_VCC_MASK; vpp = reg & I365_VPP1_MASK;
1091 state->Vcc = state->Vpp = 0;
1092 if (t->flags & IS_CIRRUS) {
1093 if (i365_get(sock, PD67_MISC_CTL_1) & PD67_MC1_VCC_3V) {
1094 if (reg & I365_VCC_5V) state->Vcc = 33;
1095 if (vpp == I365_VPP1_5V) state->Vpp = 33;
1096 } else {
1097 if (reg & I365_VCC_5V) state->Vcc = 50;
1098 if (vpp == I365_VPP1_5V) state->Vpp = 50;
1099 }
1100 if (vpp == I365_VPP1_12V) state->Vpp = 120;
1101 } else if (t->flags & IS_VG_PWR) {
1102 if (i365_get(sock, VG469_VSELECT) & VG469_VSEL_VCC) {
1103 if (reg & I365_VCC_5V) state->Vcc = 33;
1104 if (vpp == I365_VPP1_5V) state->Vpp = 33;
1105 } else {
1106 if (reg & I365_VCC_5V) state->Vcc = 50;
1107 if (vpp == I365_VPP1_5V) state->Vpp = 50;
1108 }
1109 if (vpp == I365_VPP1_12V) state->Vpp = 120;
1110 } else if (t->flags & IS_DF_PWR) {
1111 if (vcc == I365_VCC_3V) state->Vcc = 33;
1112 if (vcc == I365_VCC_5V) state->Vcc = 50;
1113 if (vpp == I365_VPP1_5V) state->Vpp = 50;
1114 if (vpp == I365_VPP1_12V) state->Vpp = 120;
1115 } else {
1116 if (reg & I365_VCC_5V) {
1117 state->Vcc = 50;
1118 if (vpp == I365_VPP1_5V) state->Vpp = 50;
1119 if (vpp == I365_VPP1_12V) state->Vpp = 120;
1120 }
1121 }
1122
1123 /* IO card, RESET flags, IO interrupt */
1124 reg = i365_get(sock, I365_INTCTL);
1125 state->flags |= (reg & I365_PC_RESET) ? 0 : SS_RESET;
1126 if (reg & I365_PC_IOCARD) state->flags |= SS_IOCARD;
1127 state->io_irq = reg & I365_IRQ_MASK;
1128
1129 /* speaker control */
1130 if (t->flags & IS_CIRRUS) {
1131 if (i365_get(sock, PD67_MISC_CTL_1) & PD67_MC1_SPKR_ENA)
1132 state->flags |= SS_SPKR_ENA;
1133 }
1134
1135 /* Card status change mask */
1136 reg = i365_get(sock, I365_CSCINT);
1137 state->csc_mask = (reg & I365_CSC_DETECT) ? SS_DETECT : 0;
1138 if (state->flags & SS_IOCARD)
1139 state->csc_mask |= (reg & I365_CSC_STSCHG) ? SS_STSCHG : 0;
1140 else {
1141 state->csc_mask |= (reg & I365_CSC_BVD1) ? SS_BATDEAD : 0;
1142 state->csc_mask |= (reg & I365_CSC_BVD2) ? SS_BATWARN : 0;
1143 state->csc_mask |= (reg & I365_CSC_READY) ? SS_READY : 0;
1144 }
1145
1146 DEBUG(1, "i82365: GetSocket(%d) = flags %#3.3x, Vcc %d, Vpp %d, "
1147 "io_irq %d, csc_mask %#2.2x\n", sock, state->flags,
1148 state->Vcc, state->Vpp, state->io_irq, state->csc_mask);
1149 return 0;
1150 } /* i365_get_socket */
1151
1152 /*====================================================================*/
1153
1154 static int i365_set_socket(u_short sock, socket_state_t *state)
1155 {
1156 socket_info_t *t = &socket[sock];
1157 u_char reg;
1158
1159 DEBUG(1, "i82365: SetSocket(%d, flags %#3.3x, Vcc %d, Vpp %d, "
1160 "io_irq %d, csc_mask %#2.2x)\n", sock, state->flags,
1161 state->Vcc, state->Vpp, state->io_irq, state->csc_mask);
1162
1163 /* First set global controller options */
1164 set_bridge_state(sock);
1165
1166 /* IO card, RESET flag, IO interrupt */
1167 reg = t->intr;
1168 if (state->io_irq != t->cap.pci_irq) reg |= state->io_irq;
1169 reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET;
1170 reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0;
1171 i365_set(sock, I365_INTCTL, reg);
1172
1173 reg = I365_PWR_NORESET;
1174 if (state->flags & SS_PWR_AUTO) reg |= I365_PWR_AUTO;
1175 if (state->flags & SS_OUTPUT_ENA) reg |= I365_PWR_OUT;
1176
1177 if (t->flags & IS_CIRRUS) {
1178 if (state->Vpp != 0) {
1179 if (state->Vpp == 120)
1180 reg |= I365_VPP1_12V;
1181 else if (state->Vpp == state->Vcc)
1182 reg |= I365_VPP1_5V;
1183 else return -EINVAL;
1184 }
1185 if (state->Vcc != 0) {
1186 reg |= I365_VCC_5V;
1187 if (state->Vcc == 33)
1188 i365_bset(sock, PD67_MISC_CTL_1, PD67_MC1_VCC_3V);
1189 else if (state->Vcc == 50)
1190 i365_bclr(sock, PD67_MISC_CTL_1, PD67_MC1_VCC_3V);
1191 else return -EINVAL;
1192 }
1193 } else if (t->flags & IS_VG_PWR) {
1194 if (state->Vpp != 0) {
1195 if (state->Vpp == 120)
1196 reg |= I365_VPP1_12V;
1197 else if (state->Vpp == state->Vcc)
1198 reg |= I365_VPP1_5V;
1199 else return -EINVAL;
1200 }
1201 if (state->Vcc != 0) {
1202 reg |= I365_VCC_5V;
1203 if (state->Vcc == 33)
1204 i365_bset(sock, VG469_VSELECT, VG469_VSEL_VCC);
1205 else if (state->Vcc == 50)
1206 i365_bclr(sock, VG469_VSELECT, VG469_VSEL_VCC);
1207 else return -EINVAL;
1208 }
1209 } else if (t->flags & IS_DF_PWR) {
1210 switch (state->Vcc) {
1211 case 0: break;
1212 case 33: reg |= I365_VCC_3V; break;
1213 case 50: reg |= I365_VCC_5V; break;
1214 default: return -EINVAL;
1215 }
1216 switch (state->Vpp) {
1217 case 0: break;
1218 case 50: reg |= I365_VPP1_5V; break;
1219 case 120: reg |= I365_VPP1_12V; break;
1220 default: return -EINVAL;
1221 }
1222 } else {
1223 switch (state->Vcc) {
1224 case 0: break;
1225 case 50: reg |= I365_VCC_5V; break;
1226 default: return -EINVAL;
1227 }
1228 switch (state->Vpp) {
1229 case 0: break;
1230 case 50: reg |= I365_VPP1_5V | I365_VPP2_5V; break;
1231 case 120: reg |= I365_VPP1_12V | I365_VPP2_12V; break;
1232 default: return -EINVAL;
1233 }
1234 }
1235
1236 if (reg != i365_get(sock, I365_POWER))
1237 i365_set(sock, I365_POWER, reg);
1238
1239 /* Chipset-specific functions */
1240 if (t->flags & IS_CIRRUS) {
1241 /* Speaker control */
1242 i365_bflip(sock, PD67_MISC_CTL_1, PD67_MC1_SPKR_ENA,
1243 state->flags & SS_SPKR_ENA);
1244 }
1245
1246 /* Card status change interrupt mask */
1247 reg = t->cs_irq << 4;
1248 if (state->csc_mask & SS_DETECT) reg |= I365_CSC_DETECT;
1249 if (state->flags & SS_IOCARD) {
1250 if (state->csc_mask & SS_STSCHG) reg |= I365_CSC_STSCHG;
1251 } else {
1252 if (state->csc_mask & SS_BATDEAD) reg |= I365_CSC_BVD1;
1253 if (state->csc_mask & SS_BATWARN) reg |= I365_CSC_BVD2;
1254 if (state->csc_mask & SS_READY) reg |= I365_CSC_READY;
1255 }
1256 i365_set(sock, I365_CSCINT, reg);
1257 i365_get(sock, I365_CSC);
1258
1259 return 0;
1260 } /* i365_set_socket */
1261
1262 /*====================================================================*/
1263
1264 static int i365_get_io_map(u_short sock, struct pccard_io_map *io)
1265 {
1266 u_char map, ioctl, addr;
1267
1268 map = io->map;
1269 if (map > 1) return -EINVAL;
1270 io->start = i365_get_pair(sock, I365_IO(map)+I365_W_START);
1271 io->stop = i365_get_pair(sock, I365_IO(map)+I365_W_STOP);
1272 ioctl = i365_get(sock, I365_IOCTL);
1273 addr = i365_get(sock, I365_ADDRWIN);
1274 io->speed = to_ns(ioctl & I365_IOCTL_WAIT(map)) ? 1 : 0;
1275 io->flags = (addr & I365_ENA_IO(map)) ? MAP_ACTIVE : 0;
1276 io->flags |= (ioctl & I365_IOCTL_0WS(map)) ? MAP_0WS : 0;
1277 io->flags |= (ioctl & I365_IOCTL_16BIT(map)) ? MAP_16BIT : 0;
1278 io->flags |= (ioctl & I365_IOCTL_IOCS16(map)) ? MAP_AUTOSZ : 0;
1279 DEBUG(1, "i82365: GetIOMap(%d, %d) = %#2.2x, %d ns, "
1280 "%#4.4x-%#4.4x\n", sock, map, io->flags, io->speed,
1281 io->start, io->stop);
1282 return 0;
1283 } /* i365_get_io_map */
1284
1285 /*====================================================================*/
1286
1287 static int i365_set_io_map(u_short sock, struct pccard_io_map *io)
1288 {
1289 u_char map, ioctl;
1290
1291 DEBUG(1, "i82365: SetIOMap(%d, %d, %#2.2x, %d ns, "
1292 "%#4.4x-%#4.4x)\n", sock, io->map, io->flags,
1293 io->speed, io->start, io->stop);
1294 map = io->map;
1295 if ((map > 1) || (io->start > 0xffff) || (io->stop > 0xffff) ||
1296 (io->stop < io->start)) return -EINVAL;
1297 /* Turn off the window before changing anything */
1298 if (i365_get(sock, I365_ADDRWIN) & I365_ENA_IO(map))
1299 i365_bclr(sock, I365_ADDRWIN, I365_ENA_IO(map));
1300 i365_set_pair(sock, I365_IO(map)+I365_W_START, io->start);
1301 i365_set_pair(sock, I365_IO(map)+I365_W_STOP, io->stop);
1302 ioctl = i365_get(sock, I365_IOCTL) & ~I365_IOCTL_MASK(map);
1303 if (io->speed) ioctl |= I365_IOCTL_WAIT(map);
1304 if (io->flags & MAP_0WS) ioctl |= I365_IOCTL_0WS(map);
1305 if (io->flags & MAP_16BIT) ioctl |= I365_IOCTL_16BIT(map);
1306 if (io->flags & MAP_AUTOSZ) ioctl |= I365_IOCTL_IOCS16(map);
1307 i365_set(sock, I365_IOCTL, ioctl);
1308 /* Turn on the window if necessary */
1309 if (io->flags & MAP_ACTIVE)
1310 i365_bset(sock, I365_ADDRWIN, I365_ENA_IO(map));
1311 return 0;
1312 } /* i365_set_io_map */
1313
1314 /*====================================================================*/
1315
1316 static int i365_get_mem_map(u_short sock, struct pccard_mem_map *mem)
1317 {
1318 u_short base, i;
1319 u_char map, addr;
1320
1321 map = mem->map;
1322 if (map > 4) return -EINVAL;
1323 addr = i365_get(sock, I365_ADDRWIN);
1324 mem->flags = (addr & I365_ENA_MEM(map)) ? MAP_ACTIVE : 0;
1325 base = I365_MEM(map);
1326
1327 i = i365_get_pair(sock, base+I365_W_START);
1328 mem->flags |= (i & I365_MEM_16BIT) ? MAP_16BIT : 0;
1329 mem->flags |= (i & I365_MEM_0WS) ? MAP_0WS : 0;
1330 mem->sys_start = ((u_long)(i & 0x0fff) << 12);
1331
1332 i = i365_get_pair(sock, base+I365_W_STOP);
1333 mem->speed = (i & I365_MEM_WS0) ? 1 : 0;
1334 mem->speed += (i & I365_MEM_WS1) ? 2 : 0;
1335 mem->speed = to_ns(mem->speed);
1336 mem->sys_stop = ((u_long)(i & 0x0fff) << 12) + 0x0fff;
1337
1338 i = i365_get_pair(sock, base+I365_W_OFF);
1339 mem->flags |= (i & I365_MEM_WRPROT) ? MAP_WRPROT : 0;
1340 mem->flags |= (i & I365_MEM_REG) ? MAP_ATTRIB : 0;
1341 mem->card_start = ((u_int)(i & 0x3fff) << 12) + mem->sys_start;
1342 mem->card_start &= 0x3ffffff;
1343
1344 DEBUG(1, "i82365: GetMemMap(%d, %d) = %#2.2x, %d ns, %#5.5lx-%#5."
1345 "5lx, %#5.5x\n", sock, mem->map, mem->flags, mem->speed,
1346 mem->sys_start, mem->sys_stop, mem->card_start);
1347 return 0;
1348 } /* i365_get_mem_map */
1349
1350 /*====================================================================*/
1351
1352 static int i365_set_mem_map(u_short sock, struct pccard_mem_map *mem)
1353 {
1354 u_short base, i;
1355 u_char map;
1356
1357 DEBUG(1, "i82365: SetMemMap(%d, %d, %#2.2x, %d ns, %#5.5lx-%#5.5"
1358 "lx, %#5.5x)\n", sock, mem->map, mem->flags, mem->speed,
1359 mem->sys_start, mem->sys_stop, mem->card_start);
1360
1361 map = mem->map;
1362 if ((map > 4) || (mem->card_start > 0x3ffffff) ||
1363 (mem->sys_start > mem->sys_stop) || (mem->speed > 1000))
1364 return -EINVAL;
1365 if (!(socket[sock].flags & IS_PCI) &&
1366 ((mem->sys_start > 0xffffff) || (mem->sys_stop > 0xffffff)))
1367 return -EINVAL;
1368
1369 /* Turn off the window before changing anything */
1370 if (i365_get(sock, I365_ADDRWIN) & I365_ENA_MEM(map))
1371 i365_bclr(sock, I365_ADDRWIN, I365_ENA_MEM(map));
1372
1373 base = I365_MEM(map);
1374 i = (mem->sys_start >> 12) & 0x0fff;
1375 if (mem->flags & MAP_16BIT) i |= I365_MEM_16BIT;
1376 if (mem->flags & MAP_0WS) i |= I365_MEM_0WS;
1377 i365_set_pair(sock, base+I365_W_START, i);
1378
1379 i = (mem->sys_stop >> 12) & 0x0fff;
1380 switch (to_cycles(mem->speed)) {
1381 case 0: break;
1382 case 1: i |= I365_MEM_WS0; break;
1383 case 2: i |= I365_MEM_WS1; break;
1384 default: i |= I365_MEM_WS1 | I365_MEM_WS0; break;
1385 }
1386 i365_set_pair(sock, base+I365_W_STOP, i);
1387
1388 i = ((mem->card_start - mem->sys_start) >> 12) & 0x3fff;
1389 if (mem->flags & MAP_WRPROT) i |= I365_MEM_WRPROT;
1390 if (mem->flags & MAP_ATTRIB) i |= I365_MEM_REG;
1391 i365_set_pair(sock, base+I365_W_OFF, i);
1392
1393 /* Turn on the window if necessary */
1394 if (mem->flags & MAP_ACTIVE)
1395 i365_bset(sock, I365_ADDRWIN, I365_ENA_MEM(map));
1396 return 0;
1397 } /* i365_set_mem_map */
1398
1399 /*======================================================================
1400
1401 Routines for accessing socket information and register dumps via
1402 /proc/bus/pccard/...
1403
1404 ======================================================================*/
1405
1406 #ifdef CONFIG_PROC_FS
1407
1408 static int proc_read_info(char *buf, char **start, off_t pos,
1409 int count, int *eof, void *data)
1410 {
1411 socket_info_t *s = data;
1412 char *p = buf;
1413 p += sprintf(p, "type: %s\npsock: %d\n",
1414 pcic[s->type].name, s->psock);
1415 return (p - buf);
1416 }
1417
1418 static int proc_read_exca(char *buf, char **start, off_t pos,
1419 int count, int *eof, void *data)
1420 {
1421 u_short sock = (socket_info_t *)data - socket;
1422 char *p = buf;
1423 int i, top;
1424
1425 #ifdef CONFIG_ISA
1426 u_long flags = 0;
1427 #endif
1428 ISA_LOCK(sock, flags);
1429 top = 0x40;
1430 for (i = 0; i < top; i += 4) {
1431 if (i == 0x50) {
1432 p += sprintf(p, "\n");
1433 i = 0x100;
1434 }
1435 p += sprintf(p, "%02x %02x %02x %02x%s",
1436 i365_get(sock,i), i365_get(sock,i+1),
1437 i365_get(sock,i+2), i365_get(sock,i+3),
1438 ((i % 16) == 12) ? "\n" : " ");
1439 }
1440 ISA_UNLOCK(sock, flags);
1441 return (p - buf);
1442 }
1443
1444 static void pcic_proc_setup(unsigned int sock, struct proc_dir_entry *base)
1445 {
1446 socket_info_t *s = &socket[sock];
1447
1448 if (s->flags & IS_ALIVE)
1449 return;
1450
1451 create_proc_read_entry("info", 0, base, proc_read_info, s);
1452 create_proc_read_entry("exca", 0, base, proc_read_exca, s);
1453 s->proc = base;
1454 }
1455
1456 static void pcic_proc_remove(u_short sock)
1457 {
1458 struct proc_dir_entry *base = socket[sock].proc;
1459 if (base == NULL) return;
1460 remove_proc_entry("info", base);
1461 remove_proc_entry("exca", base);
1462 }
1463
1464 #else
1465
1466 #define pcic_proc_setup NULL
1467
1468 #endif /* CONFIG_PROC_FS */
1469
1470 /*====================================================================*/
1471
1472 /*
1473 * The locking is rather broken. Why do we only lock for ISA, not for
1474 * all other cases? If there are reasons to lock, we should lock. Not
1475 * this silly conditional.
1476 *
1477 * Plan: make it bug-for-bug compatible with the old stuff, and clean
1478 * it up when the infrastructure is done.
1479 */
1480 #ifdef CONFIG_ISA
1481 #define LOCKED(x) do { \
1482 int retval; \
1483 unsigned long flags; \
1484 spin_lock_irqsave(&isa_lock, flags); \
1485 retval = x; \
1486 spin_unlock_irqrestore(&isa_lock, flags); \
1487 return retval; \
1488 } while (0)
1489 #else
1490 #define LOCKED(x) return x
1491 #endif
1492
1493
1494 static int pcic_get_status(unsigned int sock, u_int *value)
1495 {
1496 if (socket[sock].flags & IS_ALIVE) {
1497 *value = 0;
1498 return -EINVAL;
1499 }
1500
1501 LOCKED(i365_get_status(sock, value));
1502 }
1503
1504 static int pcic_get_socket(unsigned int sock, socket_state_t *state)
1505 {
1506 if (socket[sock].flags & IS_ALIVE)
1507 return -EINVAL;
1508
1509 LOCKED(i365_get_socket(sock, state));
1510 }
1511
1512 static int pcic_set_socket(unsigned int sock, socket_state_t *state)
1513 {
1514 if (socket[sock].flags & IS_ALIVE)
1515 return -EINVAL;
1516
1517 LOCKED(i365_set_socket(sock, state));
1518 }
1519
1520 static int pcic_get_io_map(unsigned int sock, struct pccard_io_map *io)
1521 {
1522 if (socket[sock].flags & IS_ALIVE)
1523 return -EINVAL;
1524
1525 LOCKED(i365_get_io_map(sock, io));
1526 }
1527
1528 static int pcic_set_io_map(unsigned int sock, struct pccard_io_map *io)
1529 {
1530 if (socket[sock].flags & IS_ALIVE)
1531 return -EINVAL;
1532
1533 LOCKED(i365_set_io_map(sock, io));
1534 }
1535
1536 static int pcic_get_mem_map(unsigned int sock, struct pccard_mem_map *mem)
1537 {
1538 if (socket[sock].flags & IS_ALIVE)
1539 return -EINVAL;
1540
1541 LOCKED(i365_get_mem_map(sock, mem));
1542 }
1543
1544 static int pcic_set_mem_map(unsigned int sock, struct pccard_mem_map *mem)
1545 {
1546 if (socket[sock].flags & IS_ALIVE)
1547 return -EINVAL;
1548
1549 LOCKED(i365_set_mem_map(sock, mem));
1550 }
1551
1552 static int pcic_init(unsigned int s)
1553 {
1554 int i;
1555 pccard_io_map io = { 0, 0, 0, 0, 1 };
1556 pccard_mem_map mem = { 0, 0, 0, 0, 0, 0 };
1557
1558 mem.sys_stop = 0x1000;
1559 pcic_set_socket(s, &dead_socket);
1560 for (i = 0; i < 2; i++) {
1561 io.map = i;
1562 pcic_set_io_map(s, &io);
1563 }
1564 for (i = 0; i < 5; i++) {
1565 mem.map = i;
1566 pcic_set_mem_map(s, &mem);
1567 }
1568 return 0;
1569 }
1570
1571 static int pcic_suspend(unsigned int sock)
1572 {
1573 return pcic_set_socket(sock, &dead_socket);
1574 }
1575
1576 static struct pccard_operations pcic_operations = {
1577 pcic_init,
1578 pcic_suspend,
1579 pcic_register_callback,
1580 pcic_inquire_socket,
1581 pcic_get_status,
1582 pcic_get_socket,
1583 pcic_set_socket,
1584 pcic_get_io_map,
1585 pcic_set_io_map,
1586 pcic_get_mem_map,
1587 pcic_set_mem_map,
1588 pcic_proc_setup
1589 };
1590
1591 /*====================================================================*/
1592
1593 static int __init init_i82365(void)
1594 {
1595 servinfo_t serv;
1596 pcmcia_get_card_services_info(&serv);
1597 if (serv.Revision != CS_RELEASE_CODE) {
1598 printk(KERN_NOTICE "i82365: Card Services release "
1599 "does not match!\n");
1600 return -1;
1601 }
1602 DEBUG(0, "%s\n", version);
1603 printk(KERN_INFO "Intel PCIC probe: ");
1604 sockets = 0;
1605
1606 #ifdef CONFIG_ISA
1607 isa_probe();
1608 #endif
1609
1610 if (sockets == 0) {
1611 printk("not found.\n");
1612 return -ENODEV;
1613 }
1614
1615 /* Set up interrupt handler(s) */
1616 #ifdef CONFIG_ISA
1617 if (grab_irq != 0)
1618 request_irq(cs_irq, pcic_interrupt, 0, "i82365", pcic_interrupt);
1619 #endif
1620
1621 if (register_ss_entry(sockets, &pcic_operations) != 0)
1622 printk(KERN_NOTICE "i82365: register_ss_entry() failed\n");
1623
1624 /* Finally, schedule a polling interrupt */
1625 if (poll_interval != 0) {
1626 poll_timer.function = pcic_interrupt_wrapper;
1627 poll_timer.data = 0;
1628 init_timer(&poll_timer);
1629 poll_timer.expires = jiffies + poll_interval;
1630 add_timer(&poll_timer);
1631 }
1632
1633 return 0;
1634
1635 } /* init_i82365 */
1636
1637 static void __exit exit_i82365(void)
1638 {
1639 int i;
1640 #ifdef CONFIG_PROC_FS
1641 for (i = 0; i < sockets; i++) pcic_proc_remove(i);
1642 #endif
1643 unregister_ss_entry(&pcic_operations);
1644 if (poll_interval != 0)
1645 del_timer(&poll_timer);
1646 #ifdef CONFIG_ISA
1647 if (grab_irq != 0)
1648 free_irq(cs_irq, pcic_interrupt);
1649 #endif
1650 for (i = 0; i < sockets; i++) {
1651 /* Turn off all interrupt sources! */
1652 i365_set(i, I365_CSCINT, 0);
1653 release_region(socket[i].ioaddr, 2);
1654 }
1655 #if defined(CONFIG_ISA) && defined(I82365_ISAPNP)
1656 if (i82365_pnpdev && i82365_pnpdev->deactivate)
1657 i82365_pnpdev->deactivate(i82365_pnpdev);
1658 #endif
1659 } /* exit_i82365 */
1660
1661 module_init(init_i82365);
1662 module_exit(exit_i82365);
1663
1664 /*====================================================================*/
1665