File: /usr/src/linux/arch/cris/kernel/time.c
1 /* $Id: time.c,v 1.8 2001/07/18 14:01:03 bjornw Exp $
2 *
3 * linux/arch/cris/kernel/time.c
4 *
5 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
6 * Copyright (C) 1999, 2000, 2001 Axis Communications AB
7 *
8 * 1994-07-02 Alan Modra
9 * fixed set_rtc_mmss, fixed time.year for >= 2000, new mktime
10 * 1995-03-26 Markus Kuhn
11 * fixed 500 ms bug at call to set_rtc_mmss, fixed DS12887
12 * precision CMOS clock update
13 * 1996-05-03 Ingo Molnar
14 * fixed time warps in do_[slow|fast]_gettimeoffset()
15 * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
16 * "A Kernel Model for Precision Timekeeping" by Dave Mills
17 *
18 * Linux/CRIS specific code:
19 *
20 * Authors: Bjorn Wesen
21 *
22 */
23
24 #include <linux/errno.h>
25 #include <linux/sched.h>
26 #include <linux/init.h>
27 #include <linux/kernel.h>
28 #include <linux/param.h>
29 #include <linux/string.h>
30 #include <linux/mm.h>
31 #include <linux/interrupt.h>
32 #include <linux/time.h>
33 #include <linux/delay.h>
34
35 #include <asm/segment.h>
36 #include <asm/io.h>
37 #include <asm/irq.h>
38 #include <asm/delay.h>
39 #include <asm/rtc.h>
40
41 #include <linux/timex.h>
42 #include <linux/config.h>
43
44 #include <asm/svinto.h>
45
46 static int have_rtc; /* used to remember if we have an RTC or not */
47
48 /* define this if you need to use print_timestamp */
49 /* it will make jiffies at 96 hz instead of 100 hz though */
50 #undef USE_CASCADE_TIMERS
51
52 extern int setup_etrax_irq(int, struct irqaction *);
53
54 #define TICK_SIZE tick
55
56 static unsigned long do_slow_gettimeoffset(void)
57 {
58 unsigned long count;
59
60 static unsigned long count_p = LATCH; /* for the first call after boot */
61 static unsigned long jiffies_p = 0;
62
63 /*
64 * cache volatile jiffies temporarily; we have IRQs turned off.
65 */
66 unsigned long jiffies_t;
67
68 /* The timer interrupt comes from Etrax timer 0. In order to get
69 * better precision, we check the current value. It might have
70 * underflowed already though.
71 */
72
73 #ifndef CONFIG_SVINTO_SIM
74 /* Not available in the xsim simulator. */
75 count = *R_TIMER0_DATA;
76 #else
77 count = 0;
78 #endif
79
80 jiffies_t = jiffies;
81
82 /*
83 * avoiding timer inconsistencies (they are rare, but they happen)...
84 * there are three kinds of problems that must be avoided here:
85 * 1. the timer counter underflows
86 * 2. we are after the timer interrupt, but the bottom half handler
87 * hasn't executed yet.
88 */
89 if( jiffies_t == jiffies_p ) {
90 if( count > count_p ) {
91 }
92 } else
93 jiffies_p = jiffies_t;
94
95 count_p = count;
96
97 count = ((LATCH-1) - count) * TICK_SIZE;
98 count = (count + LATCH/2) / LATCH;
99
100 return count;
101 }
102
103 static unsigned long (*do_gettimeoffset)(void) = do_slow_gettimeoffset;
104
105 /*
106 * This version of gettimeofday has near microsecond resolution.
107 */
108 void do_gettimeofday(struct timeval *tv)
109 {
110 unsigned long flags;
111
112 save_flags(flags);
113 cli();
114 *tv = xtime;
115 tv->tv_usec += do_gettimeoffset();
116 if (tv->tv_usec >= 1000000) {
117 tv->tv_usec -= 1000000;
118 tv->tv_sec++;
119 }
120 restore_flags(flags);
121 }
122
123 void do_settimeofday(struct timeval *tv)
124 {
125 cli();
126 /* This is revolting. We need to set the xtime.tv_usec
127 * correctly. However, the value in this location is
128 * is value at the last tick.
129 * Discover what correction gettimeofday
130 * would have done, and then undo it!
131 */
132 tv->tv_usec -= do_gettimeoffset();
133
134 if (tv->tv_usec < 0) {
135 tv->tv_usec += 1000000;
136 tv->tv_sec--;
137 }
138
139 xtime = *tv;
140 time_adjust = 0; /* stop active adjtime() */
141 time_status |= STA_UNSYNC;
142 time_state = TIME_ERROR; /* p. 24, (a) */
143 time_maxerror = NTP_PHASE_LIMIT;
144 time_esterror = NTP_PHASE_LIMIT;
145 sti();
146 }
147
148
149 /*
150 * BUG: This routine does not handle hour overflow properly; it just
151 * sets the minutes. Usually you'll only notice that after reboot!
152 */
153
154 static int set_rtc_mmss(unsigned long nowtime)
155 {
156 int retval = 0;
157 int real_seconds, real_minutes, cmos_minutes;
158 unsigned char save_control, save_freq_select;
159
160 printk("set_rtc_mmss(%d)\n", nowtime);
161
162 if(!have_rtc)
163 return 0;
164
165 cmos_minutes = CMOS_READ(RTC_MINUTES);
166 BCD_TO_BIN(cmos_minutes);
167
168 /*
169 * since we're only adjusting minutes and seconds,
170 * don't interfere with hour overflow. This avoids
171 * messing with unknown time zones but requires your
172 * RTC not to be off by more than 15 minutes
173 */
174 real_seconds = nowtime % 60;
175 real_minutes = nowtime / 60;
176 if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
177 real_minutes += 30; /* correct for half hour time zone */
178 real_minutes %= 60;
179
180 if (abs(real_minutes - cmos_minutes) < 30) {
181 BIN_TO_BCD(real_seconds);
182 BIN_TO_BCD(real_minutes);
183 CMOS_WRITE(real_seconds,RTC_SECONDS);
184 CMOS_WRITE(real_minutes,RTC_MINUTES);
185 } else {
186 printk(KERN_WARNING
187 "set_rtc_mmss: can't update from %d to %d\n",
188 cmos_minutes, real_minutes);
189 retval = -1;
190 }
191
192 return retval;
193 }
194
195 /* Excerpt from the Etrax100 HSDD about the built-in watchdog:
196 *
197 * 3.10.4 Watchdog timer
198
199 * When the watchdog timer is started, it generates an NMI if the watchdog
200 * isn't restarted or stopped within 0.1 s. If it still isn't restarted or
201 * stopped after an additional 3.3 ms, the watchdog resets the chip.
202 * The watchdog timer is stopped after reset. The watchdog timer is controlled
203 * by the R_WATCHDOG register. The R_WATCHDOG register contains an enable bit
204 * and a 3-bit key value. The effect of writing to the R_WATCHDOG register is
205 * described in the table below:
206 *
207 * Watchdog Value written:
208 * state: To enable: To key: Operation:
209 * -------- ---------- ------- ----------
210 * stopped 0 X No effect.
211 * stopped 1 key_val Start watchdog with key = key_val.
212 * started 0 ~key Stop watchdog
213 * started 1 ~key Restart watchdog with key = ~key.
214 * started X new_key_val Change key to new_key_val.
215 *
216 * Note: '~' is the bitwise NOT operator.
217 *
218 */
219
220 /* right now, starting the watchdog is the same as resetting it */
221 #define start_watchdog reset_watchdog
222
223 static int watchdog_key = 0; /* arbitrary number */
224
225 /* number of pages to consider "out of memory". it is normal that the memory
226 * is used though, so put this really low.
227 */
228
229 #define WATCHDOG_MIN_FREE_PAGES 8
230
231 void
232 reset_watchdog(void)
233 {
234 #if defined(CONFIG_ETRAX_WATCHDOG) && !defined(CONFIG_SVINTO_SIM)
235 /* only keep watchdog happy as long as we have memory left! */
236 if(nr_free_pages() > WATCHDOG_MIN_FREE_PAGES) {
237 /* reset the watchdog with the inverse of the old key */
238 watchdog_key ^= 0x7; /* invert key, which is 3 bits */
239 *R_WATCHDOG = IO_FIELD(R_WATCHDOG, key, watchdog_key) |
240 IO_STATE(R_WATCHDOG, enable, start);
241 }
242 #endif
243 }
244
245 /* stop the watchdog - we still need the correct key */
246
247 void
248 stop_watchdog(void)
249 {
250 #if defined(CONFIG_ETRAX_WATCHDOG) && !defined(CONFIG_SVINTO_SIM)
251 watchdog_key ^= 0x7; /* invert key, which is 3 bits */
252 *R_WATCHDOG = IO_FIELD(R_WATCHDOG, key, watchdog_key) |
253 IO_STATE(R_WATCHDOG, enable, stop);
254 #endif
255 }
256
257 /* last time the cmos clock got updated */
258 static long last_rtc_update = 0;
259
260 /*
261 * timer_interrupt() needs to keep up the real-time clock,
262 * as well as call the "do_timer()" routine every clocktick
263 */
264
265 //static unsigned short myjiff; /* used by our debug routine print_timestamp */
266
267 static inline void
268 timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
269 {
270 /* acknowledge the timer irq */
271
272 #ifdef USE_CASCADE_TIMERS
273 *R_TIMER_CTRL =
274 IO_FIELD( R_TIMER_CTRL, timerdiv1, 0) |
275 IO_FIELD( R_TIMER_CTRL, timerdiv0, 0) |
276 IO_STATE( R_TIMER_CTRL, i1, clr) |
277 IO_STATE( R_TIMER_CTRL, tm1, run) |
278 IO_STATE( R_TIMER_CTRL, clksel1, cascade0) |
279 IO_STATE( R_TIMER_CTRL, i0, clr) |
280 IO_STATE( R_TIMER_CTRL, tm0, run) |
281 IO_STATE( R_TIMER_CTRL, clksel0, c6250kHz);
282 #else
283 *R_TIMER_CTRL = r_timer_ctrl_shadow |
284 IO_STATE(R_TIMER_CTRL, i0, clr);
285 #endif
286
287 /* reset watchdog otherwise it resets us! */
288
289 reset_watchdog();
290
291 /* call the real timer interrupt handler */
292
293 do_timer(regs);
294
295 /*
296 * If we have an externally synchronized Linux clock, then update
297 * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
298 * called as close as possible to 500 ms before the new second starts.
299 */
300
301 if ((time_status & STA_UNSYNC) == 0 &&
302 xtime.tv_sec > last_rtc_update + 660 &&
303 xtime.tv_usec > 500000 - (tick >> 1) &&
304 xtime.tv_usec < 500000 + (tick >> 1))
305 if (set_rtc_mmss(xtime.tv_sec) == 0)
306 last_rtc_update = xtime.tv_sec;
307 else
308 last_rtc_update = xtime.tv_sec - 600;
309
310 }
311
312 #if 0
313 /* some old debug code for testing the microsecond timing of packets */
314 static unsigned int lastjiff;
315
316 void print_timestamp(const char *s)
317 {
318 unsigned long flags;
319 unsigned int newjiff;
320 save_flags(flags);
321 cli();
322 newjiff = (myjiff << 16) | (unsigned short)(-*R_TIMER01_DATA);
323 printk("%s: %x (%x)\n", s, newjiff, newjiff - lastjiff);
324 lastjiff = newjiff;
325 restore_flags(flags);
326 }
327 #endif
328
329 /* grab the time from the RTC chip */
330
331 unsigned long
332 get_cmos_time(void)
333 {
334 unsigned int year, mon, day, hour, min, sec;
335 int i;
336
337 sec = CMOS_READ(RTC_SECONDS);
338 min = CMOS_READ(RTC_MINUTES);
339 hour = CMOS_READ(RTC_HOURS);
340 day = CMOS_READ(RTC_DAY_OF_MONTH);
341 mon = CMOS_READ(RTC_MONTH);
342 year = CMOS_READ(RTC_YEAR);
343
344 printk("rtc: sec 0x%x min 0x%x hour 0x%x day 0x%x mon 0x%x year 0x%x\n",
345 sec, min, hour, day, mon, year);
346
347 BCD_TO_BIN(sec);
348 BCD_TO_BIN(min);
349 BCD_TO_BIN(hour);
350 BCD_TO_BIN(day);
351 BCD_TO_BIN(mon);
352 BCD_TO_BIN(year);
353
354 if ((year += 1900) < 1970)
355 year += 100;
356
357 return mktime(year, mon, day, hour, min, sec);
358 }
359
360 /* update xtime from the CMOS settings. used when /dev/rtc gets a SET_TIME.
361 * TODO: this doesn't reset the fancy NTP phase stuff as do_settimeofday does.
362 */
363
364 void
365 update_xtime_from_cmos(void)
366 {
367 if(have_rtc) {
368 xtime.tv_sec = get_cmos_time();
369 xtime.tv_usec = 0;
370 }
371 }
372
373 /* timer is SA_SHIRQ so drivers can add stuff to the timer irq chain
374 * it needs to be SA_INTERRUPT to make the jiffies update work properly
375 */
376
377 static struct irqaction irq2 = { timer_interrupt, SA_SHIRQ | SA_INTERRUPT,
378 0, "timer", NULL, NULL};
379
380 void __init
381 time_init(void)
382 {
383 /* probe for the RTC and read it if it exists */
384
385 if(RTC_INIT() < 0) {
386 /* no RTC, start at 1980 */
387 xtime.tv_sec = 0;
388 xtime.tv_usec = 0;
389 have_rtc = 0;
390 } else {
391 /* get the current time */
392 have_rtc = 1;
393 update_xtime_from_cmos();
394 }
395
396 /* Setup the etrax timers
397 * Base frequency is 19200 hz, divider 192 -> 100 hz as Linux wants
398 * In normal mode, we use timer0, so timer1 is free. In cascade
399 * mode (which we sometimes use for debugging) both timers are used.
400 * Remember that linux/timex.h contains #defines that rely on the
401 * timer settings below (hz and divide factor) !!!
402 */
403
404 #ifdef USE_CASCADE_TIMERS
405 *R_TIMER_CTRL =
406 IO_FIELD( R_TIMER_CTRL, timerdiv1, 0) |
407 IO_FIELD( R_TIMER_CTRL, timerdiv0, 0) |
408 IO_STATE( R_TIMER_CTRL, i1, nop) |
409 IO_STATE( R_TIMER_CTRL, tm1, stop_ld) |
410 IO_STATE( R_TIMER_CTRL, clksel1, cascade0) |
411 IO_STATE( R_TIMER_CTRL, i0, nop) |
412 IO_STATE( R_TIMER_CTRL, tm0, stop_ld) |
413 IO_STATE( R_TIMER_CTRL, clksel0, c6250kHz);
414
415 *R_TIMER_CTRL = r_timer_ctrl_shadow =
416 IO_FIELD( R_TIMER_CTRL, timerdiv1, 0) |
417 IO_FIELD( R_TIMER_CTRL, timerdiv0, 0) |
418 IO_STATE( R_TIMER_CTRL, i1, nop) |
419 IO_STATE( R_TIMER_CTRL, tm1, run) |
420 IO_STATE( R_TIMER_CTRL, clksel1, cascade0) |
421 IO_STATE( R_TIMER_CTRL, i0, nop) |
422 IO_STATE( R_TIMER_CTRL, tm0, run) |
423 IO_STATE( R_TIMER_CTRL, clksel0, c6250kHz);
424 #else
425 *R_TIMER_CTRL =
426 IO_FIELD(R_TIMER_CTRL, timerdiv1, 192) |
427 IO_FIELD(R_TIMER_CTRL, timerdiv0, 192) |
428 IO_STATE(R_TIMER_CTRL, i1, nop) |
429 IO_STATE(R_TIMER_CTRL, tm1, stop_ld) |
430 IO_STATE(R_TIMER_CTRL, clksel1, c19k2Hz) |
431 IO_STATE(R_TIMER_CTRL, i0, nop) |
432 IO_STATE(R_TIMER_CTRL, tm0, stop_ld) |
433 IO_STATE(R_TIMER_CTRL, clksel0, c19k2Hz);
434
435 *R_TIMER_CTRL = r_timer_ctrl_shadow =
436 IO_FIELD(R_TIMER_CTRL, timerdiv1, 192) |
437 IO_FIELD(R_TIMER_CTRL, timerdiv0, 192) |
438 IO_STATE(R_TIMER_CTRL, i1, nop) |
439 IO_STATE(R_TIMER_CTRL, tm1, run) |
440 IO_STATE(R_TIMER_CTRL, clksel1, c19k2Hz) |
441 IO_STATE(R_TIMER_CTRL, i0, nop) |
442 IO_STATE(R_TIMER_CTRL, tm0, run) |
443 IO_STATE(R_TIMER_CTRL, clksel0, c19k2Hz);
444 #endif
445
446 *R_IRQ_MASK0_SET =
447 IO_STATE(R_IRQ_MASK0_SET, timer0, set); /* unmask the timer irq */
448
449 /* now actually register the timer irq handler that calls timer_interrupt() */
450
451 setup_etrax_irq(2, &irq2); /* irq 2 is the timer0 irq in etrax */
452
453 /* enable watchdog if we should use one */
454
455 #if defined(CONFIG_ETRAX_WATCHDOG) && !defined(CONFIG_SVINTO_SIM)
456 printk("Enabling watchdog...\n");
457 start_watchdog();
458
459 /* If we use the hardware watchdog, we want to trap it as an NMI
460 and dump registers before it resets us. For this to happen, we
461 must set the "m" NMI enable flag (which once set, is unset only
462 when an NMI is taken).
463
464 The same goes for the external NMI, but that doesn't have any
465 driver or infrastructure support yet. */
466 asm ("setf m");
467
468 *R_IRQ_MASK0_SET =
469 IO_STATE(R_IRQ_MASK0_SET, watchdog_nmi, set);
470 *R_VECT_MASK_SET =
471 IO_STATE(R_VECT_MASK_SET, nmi, set);
472 #endif
473 }
474