File: /usr/src/linux/drivers/scsi/aic7xxx/aicasm/aicasm_insformat.h
1 /*
2 * Instruction formats for the sequencer program downloaded to
3 * Aic7xxx SCSI host adapters
4 *
5 * Copyright (c) 1997, 1998, 2000 Justin T. Gibbs.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions, and the following disclaimer,
13 * without modification.
14 * 2. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * Alternatively, this software may be distributed under the terms of the
18 * GNU Public License ("GPL").
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 *
32 * $Id: //depot/src/aic7xxx/aicasm/aicasm_insformat.h#4 $
33 *
34 * $FreeBSD: src/sys/dev/aic7xxx/aicasm/aicasm_insformat.h,v 1.3 2000/09/22 22:19:54 gibbs Exp $
35 */
36
37 #if linux
38 #include <endian.h>
39 #else
40 #include <machine/endian.h>
41 #endif
42
43 struct ins_format1 {
44 #if BYTE_ORDER == LITTLE_ENDIAN
45 uint32_t immediate : 8,
46 source : 9,
47 destination : 9,
48 ret : 1,
49 opcode : 4,
50 parity : 1;
51 #else
52 uint32_t parity : 1,
53 opcode : 4,
54 ret : 1,
55 destination : 9,
56 source : 9,
57 immediate : 8;
58 #endif
59 };
60
61 struct ins_format2 {
62 #if BYTE_ORDER == LITTLE_ENDIAN
63 uint32_t shift_control : 8,
64 source : 9,
65 destination : 9,
66 ret : 1,
67 opcode : 4,
68 parity : 1;
69 #else
70 uint32_t parity : 1,
71 opcode : 4,
72 ret : 1,
73 destination : 9,
74 source : 9,
75 shift_control : 8;
76 #endif
77 };
78
79 struct ins_format3 {
80 #if BYTE_ORDER == LITTLE_ENDIAN
81 uint32_t immediate : 8,
82 source : 9,
83 address : 10,
84 opcode : 4,
85 parity : 1;
86 #else
87 uint32_t parity : 1,
88 opcode : 4,
89 address : 10,
90 source : 9,
91 immediate : 8;
92 #endif
93 };
94
95 union ins_formats {
96 struct ins_format1 format1;
97 struct ins_format2 format2;
98 struct ins_format3 format3;
99 uint8_t bytes[4];
100 uint32_t integer;
101 };
102 struct instruction {
103 union ins_formats format;
104 u_int srcline;
105 struct symbol *patch_label;
106 STAILQ_ENTRY(instruction) links;
107 };
108
109 #define AIC_OP_OR 0x0
110 #define AIC_OP_AND 0x1
111 #define AIC_OP_XOR 0x2
112 #define AIC_OP_ADD 0x3
113 #define AIC_OP_ADC 0x4
114 #define AIC_OP_ROL 0x5
115 #define AIC_OP_BMOV 0x6
116
117 #define AIC_OP_JMP 0x8
118 #define AIC_OP_JC 0x9
119 #define AIC_OP_JNC 0xa
120 #define AIC_OP_CALL 0xb
121 #define AIC_OP_JNE 0xc
122 #define AIC_OP_JNZ 0xd
123 #define AIC_OP_JE 0xe
124 #define AIC_OP_JZ 0xf
125
126 /* Pseudo Ops */
127 #define AIC_OP_SHL 0x10
128 #define AIC_OP_SHR 0x20
129 #define AIC_OP_ROR 0x30
130