File: /usr/src/linux/drivers/scsi/aic7xxx_old.c
1 /*+M*************************************************************************
2 * Adaptec AIC7xxx device driver for Linux.
3 *
4 * Copyright (c) 1994 John Aycock
5 * The University of Calgary Department of Computer Science.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; see the file COPYING. If not, write to
19 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
20 *
21 * Sources include the Adaptec 1740 driver (aha1740.c), the Ultrastor 24F
22 * driver (ultrastor.c), various Linux kernel source, the Adaptec EISA
23 * config file (!adp7771.cfg), the Adaptec AHA-2740A Series User's Guide,
24 * the Linux Kernel Hacker's Guide, Writing a SCSI Device Driver for Linux,
25 * the Adaptec 1542 driver (aha1542.c), the Adaptec EISA overlay file
26 * (adp7770.ovl), the Adaptec AHA-2740 Series Technical Reference Manual,
27 * the Adaptec AIC-7770 Data Book, the ANSI SCSI specification, the
28 * ANSI SCSI-2 specification (draft 10c), ...
29 *
30 * --------------------------------------------------------------------------
31 *
32 * Modifications by Daniel M. Eischen (deischen@iworks.InterWorks.org):
33 *
34 * Substantially modified to include support for wide and twin bus
35 * adapters, DMAing of SCBs, tagged queueing, IRQ sharing, bug fixes,
36 * SCB paging, and other rework of the code.
37 *
38 * Parts of this driver were also based on the FreeBSD driver by
39 * Justin T. Gibbs. His copyright follows:
40 *
41 * --------------------------------------------------------------------------
42 * Copyright (c) 1994-1997 Justin Gibbs.
43 * All rights reserved.
44 *
45 * Redistribution and use in source and binary forms, with or without
46 * modification, are permitted provided that the following conditions
47 * are met:
48 * 1. Redistributions of source code must retain the above copyright
49 * notice, this list of conditions, and the following disclaimer,
50 * without modification, immediately at the beginning of the file.
51 * 2. Redistributions in binary form must reproduce the above copyright
52 * notice, this list of conditions and the following disclaimer in the
53 * documentation and/or other materials provided with the distribution.
54 * 3. The name of the author may not be used to endorse or promote products
55 * derived from this software without specific prior written permission.
56 *
57 * Where this Software is combined with software released under the terms of
58 * the GNU General Public License ("GPL") and the terms of the GPL would require the
59 * combined work to also be released under the terms of the GPL, the terms
60 * and conditions of this License will apply in addition to those of the
61 * GPL with the exception of any terms or conditions of this License that
62 * conflict with, or are expressly prohibited by, the GPL.
63 *
64 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
65 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
66 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
67 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
68 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
69 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
70 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
71 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
72 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
73 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
74 * SUCH DAMAGE.
75 *
76 * $Id: aic7xxx.c,v 1.119 1997/06/27 19:39:18 gibbs Exp $
77 *---------------------------------------------------------------------------
78 *
79 * Thanks also go to (in alphabetical order) the following:
80 *
81 * Rory Bolt - Sequencer bug fixes
82 * Jay Estabrook - Initial DEC Alpha support
83 * Doug Ledford - Much needed abort/reset bug fixes
84 * Kai Makisara - DMAing of SCBs
85 *
86 * A Boot time option was also added for not resetting the scsi bus.
87 *
88 * Form: aic7xxx=extended
89 * aic7xxx=no_reset
90 * aic7xxx=ultra
91 * aic7xxx=irq_trigger:[0,1] # 0 edge, 1 level
92 * aic7xxx=verbose
93 *
94 * Daniel M. Eischen, deischen@iworks.InterWorks.org, 1/23/97
95 *
96 * $Id: aic7xxx.c,v 4.1 1997/06/12 08:23:42 deang Exp $
97 *-M*************************************************************************/
98
99 /*+M**************************************************************************
100 *
101 * Further driver modifications made by Doug Ledford <dledford@redhat.com>
102 *
103 * Copyright (c) 1997-1999 Doug Ledford
104 *
105 * These changes are released under the same licensing terms as the FreeBSD
106 * driver written by Justin Gibbs. Please see his Copyright notice above
107 * for the exact terms and conditions covering my changes as well as the
108 * warranty statement.
109 *
110 * Modifications made to the aic7xxx.c,v 4.1 driver from Dan Eischen include
111 * but are not limited to:
112 *
113 * 1: Import of the latest FreeBSD sequencer code for this driver
114 * 2: Modification of kernel code to accomodate different sequencer semantics
115 * 3: Extensive changes throughout kernel portion of driver to improve
116 * abort/reset processing and error hanndling
117 * 4: Other work contributed by various people on the Internet
118 * 5: Changes to printk information and verbosity selection code
119 * 6: General reliability related changes, especially in IRQ management
120 * 7: Modifications to the default probe/attach order for supported cards
121 * 8: SMP friendliness has been improved
122 *
123 * Overall, this driver represents a significant departure from the official
124 * aic7xxx driver released by Dan Eischen in two ways. First, in the code
125 * itself. A diff between the two version of the driver is now a several
126 * thousand line diff. Second, in approach to solving the same problem. The
127 * problem is importing the FreeBSD aic7xxx driver code to linux can be a
128 * difficult and time consuming process, that also can be error prone. Dan
129 * Eischen's official driver uses the approach that the linux and FreeBSD
130 * drivers should be as identical as possible. To that end, his next version
131 * of this driver will be using a mid-layer code library that he is developing
132 * to moderate communications between the linux mid-level SCSI code and the
133 * low level FreeBSD driver. He intends to be able to essentially drop the
134 * FreeBSD driver into the linux kernel with only a few minor tweaks to some
135 * include files and the like and get things working, making for fast easy
136 * imports of the FreeBSD code into linux.
137 *
138 * I disagree with Dan's approach. Not that I don't think his way of doing
139 * things would be nice, easy to maintain, and create a more uniform driver
140 * between FreeBSD and Linux. I have no objection to those issues. My
141 * disagreement is on the needed functionality. There simply are certain
142 * things that are done differently in FreeBSD than linux that will cause
143 * problems for this driver regardless of any middle ware Dan implements.
144 * The biggest example of this at the moment is interrupt semantics. Linux
145 * doesn't provide the same protection techniques as FreeBSD does, nor can
146 * they be easily implemented in any middle ware code since they would truly
147 * belong in the kernel proper and would effect all drivers. For the time
148 * being, I see issues such as these as major stumbling blocks to the
149 * reliability of code based upon such middle ware. Therefore, I choose to
150 * use a different approach to importing the FreeBSD code that doesn't
151 * involve any middle ware type code. My approach is to import the sequencer
152 * code from FreeBSD wholesale. Then, to only make changes in the kernel
153 * portion of the driver as they are needed for the new sequencer semantics.
154 * In this way, the portion of the driver that speaks to the rest of the
155 * linux kernel is fairly static and can be changed/modified to solve
156 * any problems one might encounter without concern for the FreeBSD driver.
157 *
158 * Note: If time and experience should prove me wrong that the middle ware
159 * code Dan writes is reliable in its operation, then I'll retract my above
160 * statements. But, for those that don't know, I'm from Missouri (in the US)
161 * and our state motto is "The Show-Me State". Well, before I will put
162 * faith into it, you'll have to show me that it works :)
163 *
164 *_M*************************************************************************/
165
166 /*
167 * The next three defines are user configurable. These should be the only
168 * defines a user might need to get in here and change. There are other
169 * defines buried deeper in the code, but those really shouldn't need touched
170 * under normal conditions.
171 */
172
173 /*
174 * AIC7XXX_STRICT_PCI_SETUP
175 * Should we assume the PCI config options on our controllers are set with
176 * sane and proper values, or should we be anal about our PCI config
177 * registers and force them to what we want? The main advantage to
178 * defining this option is on non-Intel hardware where the BIOS may not
179 * have been run to set things up, or if you have one of the BIOSless
180 * Adaptec controllers, such as a 2910, that don't get set up by the
181 * BIOS. However, keep in mind that we really do set the most important
182 * items in the driver regardless of this setting, this only controls some
183 * of the more esoteric PCI options on these cards. In that sense, I
184 * would default to leaving this off. However, if people wish to try
185 * things both ways, that would also help me to know if there are some
186 * machines where it works one way but not another.
187 *
188 * -- July 7, 17:09
189 * OK...I need this on my machine for testing, so the default is to
190 * leave it defined.
191 *
192 * -- July 7, 18:49
193 * I needed it for testing, but it didn't make any difference, so back
194 * off she goes.
195 *
196 * -- July 16, 23:04
197 * I turned it back on to try and compensate for the 2.1.x PCI code
198 * which no longer relies solely on the BIOS and now tries to set
199 * things itself.
200 */
201
202 #define AIC7XXX_STRICT_PCI_SETUP
203
204 /*
205 * AIC7XXX_VERBOSE_DEBUGGING
206 * This option enables a lot of extra printk();s in the code, surrounded
207 * by if (aic7xxx_verbose ...) statements. Executing all of those if
208 * statements and the extra checks can get to where it actually does have
209 * an impact on CPU usage and such, as well as code size. Disabling this
210 * define will keep some of those from becoming part of the code.
211 *
212 * NOTE: Currently, this option has no real effect, I will be adding the
213 * various #ifdef's in the code later when I've decided a section is
214 * complete and no longer needs debugging. OK...a lot of things are now
215 * surrounded by this define, so turning this off does have an impact.
216 */
217
218 /*
219 * #define AIC7XXX_VERBOSE_DEBUGGING
220 */
221
222 #if defined(MODULE) || defined(PCMCIA)
223 #include <linux/module.h>
224 #endif
225
226 #if defined(PCMCIA)
227 # undef MODULE
228 #endif
229
230 #include <stdarg.h>
231 #include <asm/io.h>
232 #include <asm/irq.h>
233 #include <asm/byteorder.h>
234 #include <linux/version.h>
235 #include <linux/string.h>
236 #include <linux/errno.h>
237 #include <linux/kernel.h>
238 #include <linux/ioport.h>
239 #include <linux/delay.h>
240 #include <linux/sched.h>
241 #include <linux/pci.h>
242 #include <linux/proc_fs.h>
243 #include <linux/blk.h>
244 #include <linux/tqueue.h>
245 #include <linux/init.h>
246 #include <linux/spinlock.h>
247 #include <linux/smp.h>
248 #include "sd.h"
249 #include "scsi.h"
250 #include "hosts.h"
251 #include "aic7xxx_old/aic7xxx.h"
252
253 #include "aic7xxx_old/sequencer.h"
254 #include "aic7xxx_old/scsi_message.h"
255 #include "aic7xxx_old/aic7xxx_reg.h"
256 #include <scsi/scsicam.h>
257
258 #include <linux/stat.h>
259 #include <linux/slab.h> /* for kmalloc() */
260
261 #include <linux/config.h> /* for CONFIG_PCI */
262
263 /*
264 * To generate the correct addresses for the controller to issue
265 * on the bus. Originally added for DEC Alpha support.
266 */
267 #define VIRT_TO_BUS(a) (unsigned int)virt_to_bus((void *)(a))
268
269 #define AIC7XXX_C_VERSION "5.2.4"
270
271 #define NUMBER(arr) (sizeof(arr) / sizeof(arr[0]))
272 #define MIN(a,b) (((a) < (b)) ? (a) : (b))
273 #define MAX(a,b) (((a) > (b)) ? (a) : (b))
274 #define ALL_TARGETS -1
275 #define ALL_CHANNELS -1
276 #define ALL_LUNS -1
277 #define MAX_TARGETS 16
278 #define MAX_LUNS 8
279 #ifndef TRUE
280 # define TRUE 1
281 #endif
282 #ifndef FALSE
283 # define FALSE 0
284 #endif
285
286 #if defined(__powerpc__) || defined(__i386__) || defined(__x86_64__)
287 # define MMAPIO
288 #endif
289
290 # if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95)
291 # define cpuid smp_processor_id()
292 # define DRIVER_LOCK_INIT \
293 spin_lock_init(&p->spin_lock);
294 # define DRIVER_LOCK \
295 if(!p->cpu_lock_count[cpuid]) { \
296 spin_lock_irqsave(&p->spin_lock, cpu_flags); \
297 p->cpu_lock_count[cpuid]++; \
298 } else { \
299 p->cpu_lock_count[cpuid]++; \
300 }
301 # define DRIVER_UNLOCK \
302 if(--p->cpu_lock_count[cpuid] == 0) \
303 spin_unlock_irqrestore(&p->spin_lock, cpu_flags);
304 # else
305 # define DRIVER_LOCK_INIT
306 # define DRIVER_LOCK
307 # define DRIVER_UNLOCK
308 # endif
309
310 /*
311 * You can try raising me if tagged queueing is enabled, or lowering
312 * me if you only have 4 SCBs.
313 */
314 #ifdef CONFIG_AIC7XXX_OLD_CMDS_PER_DEVICE
315 #define AIC7XXX_CMDS_PER_DEVICE CONFIG_AIC7XXX_OLD_CMDS_PER_DEVICE
316 #else
317 #define AIC7XXX_CMDS_PER_DEVICE 32
318 #endif
319
320 /*
321 * Control collection of SCSI transfer statistics for the /proc filesystem.
322 *
323 * NOTE: Do NOT enable this when running on kernels version 1.2.x and below.
324 * NOTE: This does affect performance since it has to maintain statistics.
325 */
326 #ifdef CONFIG_AIC7XXX_OLD_PROC_STATS
327 #define AIC7XXX_PROC_STATS
328 #endif
329
330 /*
331 * *** Determining commands per LUN ***
332 *
333 * When AIC7XXX_CMDS_PER_DEVICE is not defined, the driver will use its
334 * own algorithm to determine the commands/LUN. If SCB paging is
335 * enabled, which is always now, the default is 8 commands per lun
336 * that indicates it supports tagged queueing. All non-tagged devices
337 * use an internal queue depth of 3, with no more than one of those
338 * three commands active at one time.
339 */
340
341 typedef struct
342 {
343 unsigned char tag_commands[16]; /* Allow for wide/twin adapters. */
344 } adapter_tag_info_t;
345
346 /*
347 * Make a define that will tell the driver not to use tagged queueing
348 * by default.
349 */
350 #ifdef CONFIG_AIC7XXX_OLD_TCQ_ON_BY_DEFAULT
351 #define DEFAULT_TAG_COMMANDS {0, 0, 0, 0, 0, 0, 0, 0,\
352 0, 0, 0, 0, 0, 0, 0, 0}
353 #else
354 #define DEFAULT_TAG_COMMANDS {255, 255, 255, 255, 255, 255, 255, 255,\
355 255, 255, 255, 255, 255, 255, 255, 255}
356 #endif
357
358 /*
359 * Modify this as you see fit for your system. By setting tag_commands
360 * to 0, the driver will use it's own algorithm for determining the
361 * number of commands to use (see above). When 255, the driver will
362 * not enable tagged queueing for that particular device. When positive
363 * (> 0) and (< 255) the values in the array are used for the queue_depth.
364 * Note that the maximum value for an entry is 254, but you're insane if
365 * you try to use that many commands on one device.
366 *
367 * In this example, the first line will disable tagged queueing for all
368 * the devices on the first probed aic7xxx adapter.
369 *
370 * The second line enables tagged queueing with 4 commands/LUN for IDs
371 * (1, 2-11, 13-15), disables tagged queueing for ID 12, and tells the
372 * driver to use its own algorithm for ID 1.
373 *
374 * The third line is the same as the first line.
375 *
376 * The fourth line disables tagged queueing for devices 0 and 3. It
377 * enables tagged queueing for the other IDs, with 16 commands/LUN
378 * for IDs 1 and 4, 127 commands/LUN for ID 8, and 4 commands/LUN for
379 * IDs 2, 5-7, and 9-15.
380 */
381
382 /*
383 * NOTE: The below structure is for reference only, the actual structure
384 * to modify in order to change things is found after this fake one.
385 *
386 adapter_tag_info_t aic7xxx_tag_info[] =
387 {
388 {DEFAULT_TAG_COMMANDS},
389 {{4, 0, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 255, 4, 4, 4}},
390 {DEFAULT_TAG_COMMANDS},
391 {{255, 16, 4, 255, 16, 4, 4, 4, 127, 4, 4, 4, 4, 4, 4, 4}}
392 };
393 */
394
395 static adapter_tag_info_t aic7xxx_tag_info[] =
396 {
397 {DEFAULT_TAG_COMMANDS},
398 {DEFAULT_TAG_COMMANDS},
399 {DEFAULT_TAG_COMMANDS},
400 {DEFAULT_TAG_COMMANDS},
401 {DEFAULT_TAG_COMMANDS},
402 {DEFAULT_TAG_COMMANDS},
403 {DEFAULT_TAG_COMMANDS},
404 {DEFAULT_TAG_COMMANDS},
405 {DEFAULT_TAG_COMMANDS},
406 {DEFAULT_TAG_COMMANDS},
407 {DEFAULT_TAG_COMMANDS},
408 {DEFAULT_TAG_COMMANDS},
409 {DEFAULT_TAG_COMMANDS},
410 {DEFAULT_TAG_COMMANDS},
411 {DEFAULT_TAG_COMMANDS},
412 {DEFAULT_TAG_COMMANDS}
413 };
414
415
416 /*
417 * Define an array of board names that can be indexed by aha_type.
418 * Don't forget to change this when changing the types!
419 */
420 static const char *board_names[] = {
421 "AIC-7xxx Unknown", /* AIC_NONE */
422 "Adaptec AIC-7810 Hardware RAID Controller", /* AIC_7810 */
423 "Adaptec AIC-7770 SCSI host adapter", /* AIC_7770 */
424 "Adaptec AHA-274X SCSI host adapter", /* AIC_7771 */
425 "Adaptec AHA-284X SCSI host adapter", /* AIC_284x */
426 "Adaptec AIC-7850 SCSI host adapter", /* AIC_7850 */
427 "Adaptec AIC-7855 SCSI host adapter", /* AIC_7855 */
428 "Adaptec AIC-7860 Ultra SCSI host adapter", /* AIC_7860 */
429 "Adaptec AHA-2940A Ultra SCSI host adapter", /* AIC_7861 */
430 "Adaptec AIC-7870 SCSI host adapter", /* AIC_7870 */
431 "Adaptec AHA-294X SCSI host adapter", /* AIC_7871 */
432 "Adaptec AHA-394X SCSI host adapter", /* AIC_7872 */
433 "Adaptec AHA-398X SCSI host adapter", /* AIC_7873 */
434 "Adaptec AHA-2944 SCSI host adapter", /* AIC_7874 */
435 "Adaptec AIC-7880 Ultra SCSI host adapter", /* AIC_7880 */
436 "Adaptec AHA-294X Ultra SCSI host adapter", /* AIC_7881 */
437 "Adaptec AHA-394X Ultra SCSI host adapter", /* AIC_7882 */
438 "Adaptec AHA-398X Ultra SCSI host adapter", /* AIC_7883 */
439 "Adaptec AHA-2944 Ultra SCSI host adapter", /* AIC_7884 */
440 "Adaptec AHA-2940UW Pro Ultra SCSI host adapter", /* AIC_7887 */
441 "Adaptec AIC-7895 Ultra SCSI host adapter", /* AIC_7895 */
442 "Adaptec AIC-7890/1 Ultra2 SCSI host adapter", /* AIC_7890 */
443 "Adaptec AHA-293X Ultra2 SCSI host adapter", /* AIC_7890 */
444 "Adaptec AHA-294X Ultra2 SCSI host adapter", /* AIC_7890 */
445 "Adaptec AIC-7896/7 Ultra2 SCSI host adapter", /* AIC_7896 */
446 "Adaptec AHA-394X Ultra2 SCSI host adapter", /* AIC_7897 */
447 "Adaptec AHA-395X Ultra2 SCSI host adapter", /* AIC_7897 */
448 "Adaptec PCMCIA SCSI controller", /* card bus stuff */
449 "Adaptec AIC-7892 Ultra 160/m SCSI host adapter", /* AIC_7892 */
450 "Adaptec AIC-7899 Ultra 160/m SCSI host adapter", /* AIC_7899 */
451 };
452
453 /*
454 * There should be a specific return value for this in scsi.h, but
455 * it seems that most drivers ignore it.
456 */
457 #define DID_UNDERFLOW DID_ERROR
458
459 /*
460 * What we want to do is have the higher level scsi driver requeue
461 * the command to us. There is no specific driver status for this
462 * condition, but the higher level scsi driver will requeue the
463 * command on a DID_BUS_BUSY error.
464 *
465 * Upon further inspection and testing, it seems that DID_BUS_BUSY
466 * will *always* retry the command. We can get into an infinite loop
467 * if this happens when we really want some sort of counter that
468 * will automatically abort/reset the command after so many retries.
469 * Using DID_ERROR will do just that. (Made by a suggestion by
470 * Doug Ledford 8/1/96)
471 */
472 #define DID_RETRY_COMMAND DID_ERROR
473
474 #define HSCSIID 0x07
475 #define SCSI_RESET 0x040
476
477 /*
478 * EISA/VL-bus stuff
479 */
480 #define MINSLOT 1
481 #define MAXSLOT 15
482 #define SLOTBASE(x) ((x) << 12)
483 #define BASE_TO_SLOT(x) ((x) >> 12)
484
485 /*
486 * Standard EISA Host ID regs (Offset from slot base)
487 */
488 #define AHC_HID0 0x80 /* 0,1: msb of ID2, 2-7: ID1 */
489 #define AHC_HID1 0x81 /* 0-4: ID3, 5-7: LSB ID2 */
490 #define AHC_HID2 0x82 /* product */
491 #define AHC_HID3 0x83 /* firmware revision */
492
493 /*
494 * AIC-7770 I/O range to reserve for a card
495 */
496 #define MINREG 0xC00
497 #define MAXREG 0xCFF
498
499 #define INTDEF 0x5C /* Interrupt Definition Register */
500
501 /*
502 * AIC-78X0 PCI registers
503 */
504 #define CLASS_PROGIF_REVID 0x08
505 #define DEVREVID 0x000000FFul
506 #define PROGINFC 0x0000FF00ul
507 #define SUBCLASS 0x00FF0000ul
508 #define BASECLASS 0xFF000000ul
509
510 #define CSIZE_LATTIME 0x0C
511 #define CACHESIZE 0x0000003Ful /* only 5 bits */
512 #define LATTIME 0x0000FF00ul
513
514 #define DEVCONFIG 0x40
515 #define SCBSIZE32 0x00010000ul /* aic789X only */
516 #define MPORTMODE 0x00000400ul /* aic7870 only */
517 #define RAMPSM 0x00000200ul /* aic7870 only */
518 #define RAMPSM_ULTRA2 0x00000004
519 #define VOLSENSE 0x00000100ul
520 #define SCBRAMSEL 0x00000080ul
521 #define SCBRAMSEL_ULTRA2 0x00000008
522 #define MRDCEN 0x00000040ul
523 #define EXTSCBTIME 0x00000020ul /* aic7870 only */
524 #define EXTSCBPEN 0x00000010ul /* aic7870 only */
525 #define BERREN 0x00000008ul
526 #define DACEN 0x00000004ul
527 #define STPWLEVEL 0x00000002ul
528 #define DIFACTNEGEN 0x00000001ul /* aic7870 only */
529
530 #define SCAMCTL 0x1a /* Ultra2 only */
531 #define CCSCBBADDR 0xf0 /* aic7895/6/7 */
532
533 /*
534 * Define the different types of SEEPROMs on aic7xxx adapters
535 * and make it also represent the address size used in accessing
536 * its registers. The 93C46 chips have 1024 bits organized into
537 * 64 16-bit words, while the 93C56 chips have 2048 bits organized
538 * into 128 16-bit words. The C46 chips use 6 bits to address
539 * each word, while the C56 and C66 (4096 bits) use 8 bits to
540 * address each word.
541 */
542 typedef enum {C46 = 6, C56_66 = 8} seeprom_chip_type;
543
544 /*
545 *
546 * Define the format of the SEEPROM registers (16 bits).
547 *
548 */
549 struct seeprom_config {
550
551 /*
552 * SCSI ID Configuration Flags
553 */
554 #define CFXFER 0x0007 /* synchronous transfer rate */
555 #define CFSYNCH 0x0008 /* enable synchronous transfer */
556 #define CFDISC 0x0010 /* enable disconnection */
557 #define CFWIDEB 0x0020 /* wide bus device (wide card) */
558 #define CFSYNCHISULTRA 0x0040 /* CFSYNC is an ultra offset */
559 #define CFNEWULTRAFORMAT 0x0080 /* Use the Ultra2 SEEPROM format */
560 #define CFSTART 0x0100 /* send start unit SCSI command */
561 #define CFINCBIOS 0x0200 /* include in BIOS scan */
562 #define CFRNFOUND 0x0400 /* report even if not found */
563 #define CFMULTILUN 0x0800 /* probe mult luns in BIOS scan */
564 #define CFWBCACHEYES 0x4000 /* Enable W-Behind Cache on drive */
565 #define CFWBCACHENC 0xc000 /* Don't change W-Behind Cache */
566 /* UNUSED 0x3000 */
567 unsigned short device_flags[16]; /* words 0-15 */
568
569 /*
570 * BIOS Control Bits
571 */
572 #define CFSUPREM 0x0001 /* support all removable drives */
573 #define CFSUPREMB 0x0002 /* support removable drives for boot only */
574 #define CFBIOSEN 0x0004 /* BIOS enabled */
575 /* UNUSED 0x0008 */
576 #define CFSM2DRV 0x0010 /* support more than two drives */
577 #define CF284XEXTEND 0x0020 /* extended translation (284x cards) */
578 /* UNUSED 0x0040 */
579 #define CFEXTEND 0x0080 /* extended translation enabled */
580 /* UNUSED 0xFF00 */
581 unsigned short bios_control; /* word 16 */
582
583 /*
584 * Host Adapter Control Bits
585 */
586 #define CFAUTOTERM 0x0001 /* Perform Auto termination */
587 #define CFULTRAEN 0x0002 /* Ultra SCSI speed enable (Ultra cards) */
588 #define CF284XSELTO 0x0003 /* Selection timeout (284x cards) */
589 #define CF284XFIFO 0x000C /* FIFO Threshold (284x cards) */
590 #define CFSTERM 0x0004 /* SCSI low byte termination */
591 #define CFWSTERM 0x0008 /* SCSI high byte termination (wide card) */
592 #define CFSPARITY 0x0010 /* SCSI parity */
593 #define CF284XSTERM 0x0020 /* SCSI low byte termination (284x cards) */
594 #define CFRESETB 0x0040 /* reset SCSI bus at boot */
595 #define CFBPRIMARY 0x0100 /* Channel B primary on 7895 chipsets */
596 #define CFSEAUTOTERM 0x0400 /* aic7890 Perform SE Auto Term */
597 #define CFLVDSTERM 0x0800 /* aic7890 LVD Termination */
598 /* UNUSED 0xF280 */
599 unsigned short adapter_control; /* word 17 */
600
601 /*
602 * Bus Release, Host Adapter ID
603 */
604 #define CFSCSIID 0x000F /* host adapter SCSI ID */
605 /* UNUSED 0x00F0 */
606 #define CFBRTIME 0xFF00 /* bus release time */
607 unsigned short brtime_id; /* word 18 */
608
609 /*
610 * Maximum targets
611 */
612 #define CFMAXTARG 0x00FF /* maximum targets */
613 /* UNUSED 0xFF00 */
614 unsigned short max_targets; /* word 19 */
615
616 unsigned short res_1[11]; /* words 20-30 */
617 unsigned short checksum; /* word 31 */
618 };
619
620 #define SELBUS_MASK 0x0a
621 #define SELNARROW 0x00
622 #define SELBUSB 0x08
623 #define SINGLE_BUS 0x00
624
625 #define SCB_TARGET(scb) \
626 (((scb)->hscb->target_channel_lun & TID) >> 4)
627 #define SCB_LUN(scb) \
628 ((scb)->hscb->target_channel_lun & LID)
629 #define SCB_IS_SCSIBUS_B(scb) \
630 (((scb)->hscb->target_channel_lun & SELBUSB) != 0)
631
632 /*
633 * If an error occurs during a data transfer phase, run the command
634 * to completion - it's easier that way - making a note of the error
635 * condition in this location. This then will modify a DID_OK status
636 * into an appropriate error for the higher-level SCSI code.
637 */
638 #define aic7xxx_error(cmd) ((cmd)->SCp.Status)
639
640 /*
641 * Keep track of the targets returned status.
642 */
643 #define aic7xxx_status(cmd) ((cmd)->SCp.sent_command)
644
645 /*
646 * The position of the SCSI commands scb within the scb array.
647 */
648 #define aic7xxx_position(cmd) ((cmd)->SCp.have_data_in)
649
650 /*
651 * The stored DMA mapping for single-buffer data transfers.
652 */
653 #define aic7xxx_mapping(cmd) ((cmd)->SCp.phase)
654
655 /*
656 * So we can keep track of our host structs
657 */
658 static struct aic7xxx_host *first_aic7xxx = NULL;
659
660 /*
661 * As of Linux 2.1, the mid-level SCSI code uses virtual addresses
662 * in the scatter-gather lists. We need to convert the virtual
663 * addresses to physical addresses.
664 */
665 struct hw_scatterlist {
666 unsigned int address;
667 unsigned int length;
668 };
669
670 /*
671 * Maximum number of SG segments these cards can support.
672 */
673 #define AIC7XXX_MAX_SG 128
674
675 /*
676 * The maximum number of SCBs we could have for ANY type
677 * of card. DON'T FORGET TO CHANGE THE SCB MASK IN THE
678 * SEQUENCER CODE IF THIS IS MODIFIED!
679 */
680 #define AIC7XXX_MAXSCB 255
681
682
683 struct aic7xxx_hwscb {
684 /* ------------ Begin hardware supported fields ---------------- */
685 /* 0*/ unsigned char control;
686 /* 1*/ unsigned char target_channel_lun; /* 4/1/3 bits */
687 /* 2*/ unsigned char target_status;
688 /* 3*/ unsigned char SG_segment_count;
689 /* 4*/ unsigned int SG_list_pointer;
690 /* 8*/ unsigned char residual_SG_segment_count;
691 /* 9*/ unsigned char residual_data_count[3];
692 /*12*/ unsigned int data_pointer;
693 /*16*/ unsigned int data_count;
694 /*20*/ unsigned int SCSI_cmd_pointer;
695 /*24*/ unsigned char SCSI_cmd_length;
696 /*25*/ unsigned char tag; /* Index into our kernel SCB array.
697 * Also used as the tag for tagged I/O
698 */
699 #define SCB_PIO_TRANSFER_SIZE 26 /* amount we need to upload/download
700 * via PIO to initialize a transaction.
701 */
702 /*26*/ unsigned char next; /* Used to thread SCBs awaiting selection
703 * or disconnected down in the sequencer.
704 */
705 /*27*/ unsigned char prev;
706 /*28*/ unsigned int pad; /*
707 * Unused by the kernel, but we require
708 * the padding so that the array of
709 * hardware SCBs is aligned on 32 byte
710 * boundaries so the sequencer can index
711 */
712 };
713
714 typedef enum {
715 SCB_FREE = 0x0000,
716 SCB_DTR_SCB = 0x0001,
717 SCB_WAITINGQ = 0x0002,
718 SCB_ACTIVE = 0x0004,
719 SCB_SENSE = 0x0008,
720 SCB_ABORT = 0x0010,
721 SCB_DEVICE_RESET = 0x0020,
722 SCB_RESET = 0x0040,
723 SCB_RECOVERY_SCB = 0x0080,
724 SCB_MSGOUT_PPR = 0x0100,
725 SCB_MSGOUT_SENT = 0x0200,
726 SCB_MSGOUT_SDTR = 0x0400,
727 SCB_MSGOUT_WDTR = 0x0800,
728 SCB_MSGOUT_BITS = SCB_MSGOUT_PPR |
729 SCB_MSGOUT_SENT |
730 SCB_MSGOUT_SDTR |
731 SCB_MSGOUT_WDTR,
732 SCB_QUEUED_ABORT = 0x1000,
733 SCB_QUEUED_FOR_DONE = 0x2000,
734 SCB_WAS_BUSY = 0x4000
735 } scb_flag_type;
736
737 typedef enum {
738 AHC_FNONE = 0x00000000,
739 AHC_PAGESCBS = 0x00000001,
740 AHC_CHANNEL_B_PRIMARY = 0x00000002,
741 AHC_USEDEFAULTS = 0x00000004,
742 AHC_INDIRECT_PAGING = 0x00000008,
743 AHC_CHNLB = 0x00000020,
744 AHC_CHNLC = 0x00000040,
745 AHC_EXTEND_TRANS_A = 0x00000100,
746 AHC_EXTEND_TRANS_B = 0x00000200,
747 AHC_TERM_ENB_A = 0x00000400,
748 AHC_TERM_ENB_SE_LOW = 0x00000400,
749 AHC_TERM_ENB_B = 0x00000800,
750 AHC_TERM_ENB_SE_HIGH = 0x00000800,
751 AHC_HANDLING_REQINITS = 0x00001000,
752 AHC_TARGETMODE = 0x00002000,
753 AHC_NEWEEPROM_FMT = 0x00004000,
754 /*
755 * Here ends the FreeBSD defined flags and here begins the linux defined
756 * flags. NOTE: I did not preserve the old flag name during this change
757 * specifically to force me to evaluate what flags were being used properly
758 * and what flags weren't. This way, I could clean up the flag usage on
759 * a use by use basis. Doug Ledford
760 */
761 AHC_MOTHERBOARD = 0x00020000,
762 AHC_NO_STPWEN = 0x00040000,
763 AHC_RESET_DELAY = 0x00080000,
764 AHC_A_SCANNED = 0x00100000,
765 AHC_B_SCANNED = 0x00200000,
766 AHC_MULTI_CHANNEL = 0x00400000,
767 AHC_BIOS_ENABLED = 0x00800000,
768 AHC_SEEPROM_FOUND = 0x01000000,
769 AHC_TERM_ENB_LVD = 0x02000000,
770 AHC_ABORT_PENDING = 0x04000000,
771 AHC_RESET_PENDING = 0x08000000,
772 #define AHC_IN_ISR_BIT 28
773 AHC_IN_ISR = 0x10000000,
774 AHC_IN_ABORT = 0x20000000,
775 AHC_IN_RESET = 0x40000000,
776 AHC_EXTERNAL_SRAM = 0x80000000
777 } ahc_flag_type;
778
779 typedef enum {
780 AHC_NONE = 0x0000,
781 AHC_CHIPID_MASK = 0x00ff,
782 AHC_AIC7770 = 0x0001,
783 AHC_AIC7850 = 0x0002,
784 AHC_AIC7860 = 0x0003,
785 AHC_AIC7870 = 0x0004,
786 AHC_AIC7880 = 0x0005,
787 AHC_AIC7890 = 0x0006,
788 AHC_AIC7895 = 0x0007,
789 AHC_AIC7896 = 0x0008,
790 AHC_AIC7892 = 0x0009,
791 AHC_AIC7899 = 0x000a,
792 AHC_VL = 0x0100,
793 AHC_EISA = 0x0200,
794 AHC_PCI = 0x0400,
795 } ahc_chip;
796
797 typedef enum {
798 AHC_FENONE = 0x0000,
799 AHC_ULTRA = 0x0001,
800 AHC_ULTRA2 = 0x0002,
801 AHC_WIDE = 0x0004,
802 AHC_TWIN = 0x0008,
803 AHC_MORE_SRAM = 0x0010,
804 AHC_CMD_CHAN = 0x0020,
805 AHC_QUEUE_REGS = 0x0040,
806 AHC_SG_PRELOAD = 0x0080,
807 AHC_SPIOCAP = 0x0100,
808 AHC_ULTRA3 = 0x0200,
809 AHC_NEW_AUTOTERM = 0x0400,
810 AHC_AIC7770_FE = AHC_FENONE,
811 AHC_AIC7850_FE = AHC_SPIOCAP,
812 AHC_AIC7860_FE = AHC_ULTRA|AHC_SPIOCAP,
813 AHC_AIC7870_FE = AHC_FENONE,
814 AHC_AIC7880_FE = AHC_ULTRA,
815 AHC_AIC7890_FE = AHC_MORE_SRAM|AHC_CMD_CHAN|AHC_ULTRA2|
816 AHC_QUEUE_REGS|AHC_SG_PRELOAD|AHC_NEW_AUTOTERM,
817 AHC_AIC7895_FE = AHC_MORE_SRAM|AHC_CMD_CHAN|AHC_ULTRA,
818 AHC_AIC7896_FE = AHC_AIC7890_FE,
819 AHC_AIC7892_FE = AHC_AIC7890_FE|AHC_ULTRA3,
820 AHC_AIC7899_FE = AHC_AIC7890_FE|AHC_ULTRA3,
821 } ahc_feature;
822
823 #define SCB_DMA_ADDR(scb, addr) ((unsigned long)(addr) + (scb)->scb_dma->dma_offset)
824
825 struct aic7xxx_scb_dma {
826 unsigned long dma_offset; /* Correction you have to add
827 * to virtual address to get
828 * dma handle in this region */
829 dma_addr_t dma_address; /* DMA handle of the start,
830 * for unmap */
831 unsigned int dma_len; /* DMA length */
832 };
833
834 typedef enum {
835 AHC_BUG_NONE = 0x0000,
836 AHC_BUG_TMODE_WIDEODD = 0x0001,
837 AHC_BUG_AUTOFLUSH = 0x0002,
838 AHC_BUG_CACHETHEN = 0x0004,
839 AHC_BUG_CACHETHEN_DIS = 0x0008,
840 AHC_BUG_PCI_2_1_RETRY = 0x0010,
841 AHC_BUG_PCI_MWI = 0x0020,
842 AHC_BUG_SCBCHAN_UPLOAD = 0x0040,
843 } ahc_bugs;
844
845 struct aic7xxx_scb {
846 struct aic7xxx_hwscb *hscb; /* corresponding hardware scb */
847 Scsi_Cmnd *cmd; /* Scsi_Cmnd for this scb */
848 struct aic7xxx_scb *q_next; /* next scb in queue */
849 volatile scb_flag_type flags; /* current state of scb */
850 struct hw_scatterlist *sg_list; /* SG list in adapter format */
851 unsigned char tag_action;
852 unsigned char sg_count;
853 unsigned char *sense_cmd; /*
854 * Allocate 6 characters for
855 * sense command.
856 */
857 unsigned char *cmnd;
858 unsigned int sg_length; /* We init this during buildscb so we
859 * don't have to calculate anything
860 * during underflow/overflow/stat code
861 */
862 void *kmalloc_ptr;
863 struct aic7xxx_scb_dma *scb_dma;
864 };
865
866 /*
867 * Define a linked list of SCBs.
868 */
869 typedef struct {
870 struct aic7xxx_scb *head;
871 struct aic7xxx_scb *tail;
872 } scb_queue_type;
873
874 static struct {
875 unsigned char errno;
876 const char *errmesg;
877 } hard_error[] = {
878 { ILLHADDR, "Illegal Host Access" },
879 { ILLSADDR, "Illegal Sequencer Address referenced" },
880 { ILLOPCODE, "Illegal Opcode in sequencer program" },
881 { SQPARERR, "Sequencer Ram Parity Error" },
882 { DPARERR, "Data-Path Ram Parity Error" },
883 { MPARERR, "Scratch Ram/SCB Array Ram Parity Error" },
884 { PCIERRSTAT,"PCI Error detected" },
885 { CIOPARERR, "CIOBUS Parity Error" }
886 };
887
888 static unsigned char
889 generic_sense[] = { REQUEST_SENSE, 0, 0, 0, 255, 0 };
890
891 typedef struct {
892 scb_queue_type free_scbs; /*
893 * SCBs assigned to free slot on
894 * card (no paging required)
895 */
896 struct aic7xxx_scb *scb_array[AIC7XXX_MAXSCB];
897 struct aic7xxx_hwscb *hscbs;
898 unsigned char numscbs; /* current number of scbs */
899 unsigned char maxhscbs; /* hardware scbs */
900 unsigned char maxscbs; /* max scbs including pageable scbs */
901 dma_addr_t hscbs_dma; /* DMA handle to hscbs */
902 unsigned int hscbs_dma_len; /* length of the above DMA area */
903 void *hscb_kmalloc_ptr;
904 } scb_data_type;
905
906 struct target_cmd {
907 unsigned char mesg_bytes[4];
908 unsigned char command[28];
909 };
910
911 #define AHC_TRANS_CUR 0x0001
912 #define AHC_TRANS_ACTIVE 0x0002
913 #define AHC_TRANS_GOAL 0x0004
914 #define AHC_TRANS_USER 0x0008
915 #define AHC_TRANS_QUITE 0x0010
916 typedef struct {
917 unsigned char cur_width;
918 unsigned char goal_width;
919 unsigned char cur_period;
920 unsigned char goal_period;
921 unsigned char cur_offset;
922 unsigned char goal_offset;
923 unsigned char cur_options;
924 unsigned char goal_options;
925 unsigned char user_width;
926 unsigned char user_period;
927 unsigned char user_offset;
928 unsigned char user_options;
929 } transinfo_type;
930
931 /*
932 * Define a structure used for each host adapter. Note, in order to avoid
933 * problems with architectures I can't test on (because I don't have one,
934 * such as the Alpha based systems) which happen to give faults for
935 * non-aligned memory accesses, care was taken to align this structure
936 * in a way that gauranteed all accesses larger than 8 bits were aligned
937 * on the appropriate boundary. It's also organized to try and be more
938 * cache line efficient. Be careful when changing this lest you might hurt
939 * overall performance and bring down the wrath of the masses.
940 */
941 struct aic7xxx_host {
942 /*
943 * This is the first 64 bytes in the host struct
944 */
945
946 /*
947 * We are grouping things here....first, items that get either read or
948 * written with nearly every interrupt
949 */
950 volatile long flags;
951 ahc_feature features; /* chip features */
952 unsigned long base; /* card base address */
953 volatile unsigned char *maddr; /* memory mapped address */
954 unsigned long isr_count; /* Interrupt count */
955 unsigned long spurious_int;
956 scb_data_type *scb_data;
957 volatile unsigned short needppr;
958 volatile unsigned short needsdtr;
959 volatile unsigned short needwdtr;
960 volatile unsigned short dtr_pending;
961 struct aic7xxx_cmd_queue {
962 Scsi_Cmnd *head;
963 Scsi_Cmnd *tail;
964 } completeq;
965
966 /*
967 * Things read/written on nearly every entry into aic7xxx_queue()
968 */
969 volatile scb_queue_type waiting_scbs;
970 unsigned short discenable; /* Targets allowed to disconnect */
971 unsigned short tagenable; /* Targets using tagged I/O */
972 unsigned short orderedtag; /* Ordered Q tags allowed */
973 unsigned char unpause; /* unpause value for HCNTRL */
974 unsigned char pause; /* pause value for HCNTRL */
975 volatile unsigned char qoutfifonext;
976 volatile unsigned char activescbs; /* active scbs */
977 volatile unsigned char max_activescbs;
978 volatile unsigned char qinfifonext;
979 volatile unsigned char *untagged_scbs;
980 volatile unsigned char *qoutfifo;
981 volatile unsigned char *qinfifo;
982
983 #define DEVICE_PRESENT 0x01
984 #define BUS_DEVICE_RESET_PENDING 0x02
985 #define DEVICE_RESET_DELAY 0x04
986 #define DEVICE_PRINT_DTR 0x08
987 #define DEVICE_WAS_BUSY 0x10
988 #define DEVICE_SCSI_3 0x20
989 #define DEVICE_DTR_SCANNED 0x40
990 volatile unsigned char dev_flags[MAX_TARGETS];
991 volatile unsigned char dev_active_cmds[MAX_TARGETS];
992 volatile unsigned char dev_temp_queue_depth[MAX_TARGETS];
993 unsigned char dev_commands_sent[MAX_TARGETS];
994
995 unsigned int dev_timer_active; /* Which devs have a timer set */
996 struct timer_list dev_timer;
997 unsigned long dev_expires[MAX_TARGETS];
998
999 spinlock_t spin_lock;
1000 volatile unsigned char cpu_lock_count[NR_CPUS];
1001
1002 unsigned char dev_last_queue_full[MAX_TARGETS];
1003 unsigned char dev_last_queue_full_count[MAX_TARGETS];
1004 unsigned char dev_max_queue_depth[MAX_TARGETS];
1005
1006 volatile scb_queue_type delayed_scbs[MAX_TARGETS];
1007
1008
1009 unsigned char msg_buf[13]; /* The message for the target */
1010 unsigned char msg_type;
1011 #define MSG_TYPE_NONE 0x00
1012 #define MSG_TYPE_INITIATOR_MSGOUT 0x01
1013 #define MSG_TYPE_INITIATOR_MSGIN 0x02
1014 unsigned char msg_len; /* Length of message */
1015 unsigned char msg_index; /* Index into msg_buf array */
1016 transinfo_type transinfo[MAX_TARGETS];
1017
1018
1019 /*
1020 * We put the less frequently used host structure items after the more
1021 * frequently used items to try and ease the burden on the cache subsystem.
1022 * These entries are not *commonly* accessed, whereas the preceding entries
1023 * are accessed very often.
1024 */
1025
1026 unsigned int irq; /* IRQ for this adapter */
1027 int instance; /* aic7xxx instance number */
1028 int scsi_id; /* host adapter SCSI ID */
1029 int scsi_id_b; /* channel B for twin adapters */
1030 unsigned int bios_address;
1031 int board_name_index;
1032 unsigned short needppr_copy; /* default config */
1033 unsigned short needsdtr_copy; /* default config */
1034 unsigned short needwdtr_copy; /* default config */
1035 unsigned short ultraenb; /* Ultra mode target list */
1036 unsigned short bios_control; /* bios control - SEEPROM */
1037 unsigned short adapter_control; /* adapter control - SEEPROM */
1038 struct pci_dev *pdev;
1039 unsigned char pci_bus;
1040 unsigned char pci_device_fn;
1041 struct seeprom_config sc;
1042 unsigned short sc_type;
1043 unsigned short sc_size;
1044 struct aic7xxx_host *next; /* allow for multiple IRQs */
1045 struct Scsi_Host *host; /* pointer to scsi host */
1046 int host_no; /* SCSI host number */
1047 unsigned long mbase; /* I/O memory address */
1048 ahc_chip chip; /* chip type */
1049 ahc_bugs bugs;
1050 dma_addr_t fifo_dma; /* DMA handle for fifo arrays */
1051
1052 /*
1053 * Statistics Kept:
1054 *
1055 * Total Xfers (count for each command that has a data xfer),
1056 * broken down further by reads && writes.
1057 *
1058 * Binned sizes, writes && reads:
1059 * < 512, 512, 1-2K, 2-4K, 4-8K, 8-16K, 16-32K, 32-64K, 64K-128K, > 128K
1060 *
1061 * Total amounts read/written above 512 bytes (amts under ignored)
1062 *
1063 * NOTE: Enabling this feature is likely to cause a noticeable performance
1064 * decrease as the accesses into the stats structures blows apart multiple
1065 * cache lines and is CPU time consuming.
1066 *
1067 * NOTE: Since it doesn't really buy us much, but consumes *tons* of RAM
1068 * and blows apart all sorts of cache lines, I modified this so that we
1069 * no longer look at the LUN. All LUNs now go into the same bin on each
1070 * device for stats purposes.
1071 */
1072 struct aic7xxx_xferstats {
1073 long w_total; /* total writes */
1074 long r_total; /* total reads */
1075 #ifdef AIC7XXX_PROC_STATS
1076 long w_bins[8]; /* binned write */
1077 long r_bins[8]; /* binned reads */
1078 #endif /* AIC7XXX_PROC_STATS */
1079 } stats[MAX_TARGETS]; /* [(channel << 3)|target] */
1080
1081 #if 0
1082 struct target_cmd *targetcmds;
1083 unsigned int num_targetcmds;
1084 #endif
1085
1086 };
1087
1088 /*
1089 * Valid SCSIRATE values. (p. 3-17)
1090 * Provides a mapping of transfer periods in ns/4 to the proper value to
1091 * stick in the SCSIRATE reg to use that transfer rate.
1092 */
1093 #define AHC_SYNCRATE_ULTRA3 0
1094 #define AHC_SYNCRATE_ULTRA2 1
1095 #define AHC_SYNCRATE_ULTRA 3
1096 #define AHC_SYNCRATE_FAST 6
1097 #define AHC_SYNCRATE_CRC 0x40
1098 #define AHC_SYNCRATE_SE 0x10
1099 static struct aic7xxx_syncrate {
1100 /* Rates in Ultra mode have bit 8 of sxfr set */
1101 #define ULTRA_SXFR 0x100
1102 int sxfr_ultra2;
1103 int sxfr;
1104 unsigned char period;
1105 const char *rate[2];
1106 } aic7xxx_syncrates[] = {
1107 { 0x42, 0x000, 9, {"80.0", "160.0"} },
1108 { 0x13, 0x000, 10, {"40.0", "80.0"} },
1109 { 0x14, 0x000, 11, {"33.0", "66.6"} },
1110 { 0x15, 0x100, 12, {"20.0", "40.0"} },
1111 { 0x16, 0x110, 15, {"16.0", "32.0"} },
1112 { 0x17, 0x120, 18, {"13.4", "26.8"} },
1113 { 0x18, 0x000, 25, {"10.0", "20.0"} },
1114 { 0x19, 0x010, 31, {"8.0", "16.0"} },
1115 { 0x1a, 0x020, 37, {"6.67", "13.3"} },
1116 { 0x1b, 0x030, 43, {"5.7", "11.4"} },
1117 { 0x10, 0x040, 50, {"5.0", "10.0"} },
1118 { 0x00, 0x050, 56, {"4.4", "8.8" } },
1119 { 0x00, 0x060, 62, {"4.0", "8.0" } },
1120 { 0x00, 0x070, 68, {"3.6", "7.2" } },
1121 { 0x00, 0x000, 0, {NULL, NULL} },
1122 };
1123
1124 #define CTL_OF_SCB(scb) (((scb->hscb)->target_channel_lun >> 3) & 0x1), \
1125 (((scb->hscb)->target_channel_lun >> 4) & 0xf), \
1126 ((scb->hscb)->target_channel_lun & 0x07)
1127
1128 #define CTL_OF_CMD(cmd) ((cmd->channel) & 0x01), \
1129 ((cmd->target) & 0x0f), \
1130 ((cmd->lun) & 0x07)
1131
1132 #define TARGET_INDEX(cmd) ((cmd)->target | ((cmd)->channel << 3))
1133
1134 /*
1135 * A nice little define to make doing our printks a little easier
1136 */
1137
1138 #define WARN_LEAD KERN_WARNING "(scsi%d:%d:%d:%d) "
1139 #define INFO_LEAD KERN_INFO "(scsi%d:%d:%d:%d) "
1140
1141 /*
1142 * XXX - these options apply unilaterally to _all_ 274x/284x/294x
1143 * cards in the system. This should be fixed. Exceptions to this
1144 * rule are noted in the comments.
1145 */
1146
1147
1148 /*
1149 * Skip the scsi bus reset. Non 0 make us skip the reset at startup. This
1150 * has no effect on any later resets that might occur due to things like
1151 * SCSI bus timeouts.
1152 */
1153 static unsigned int aic7xxx_no_reset = 0;
1154 /*
1155 * Certain PCI motherboards will scan PCI devices from highest to lowest,
1156 * others scan from lowest to highest, and they tend to do all kinds of
1157 * strange things when they come into contact with PCI bridge chips. The
1158 * net result of all this is that the PCI card that is actually used to boot
1159 * the machine is very hard to detect. Most motherboards go from lowest
1160 * PCI slot number to highest, and the first SCSI controller found is the
1161 * one you boot from. The only exceptions to this are when a controller
1162 * has its BIOS disabled. So, we by default sort all of our SCSI controllers
1163 * from lowest PCI slot number to highest PCI slot number. We also force
1164 * all controllers with their BIOS disabled to the end of the list. This
1165 * works on *almost* all computers. Where it doesn't work, we have this
1166 * option. Setting this option to non-0 will reverse the order of the sort
1167 * to highest first, then lowest, but will still leave cards with their BIOS
1168 * disabled at the very end. That should fix everyone up unless there are
1169 * really strange cirumstances.
1170 */
1171 static int aic7xxx_reverse_scan = 0;
1172 /*
1173 * Should we force EXTENDED translation on a controller.
1174 * 0 == Use whatever is in the SEEPROM or default to off
1175 * 1 == Use whatever is in the SEEPROM or default to on
1176 */
1177 static unsigned int aic7xxx_extended = 0;
1178 /*
1179 * The IRQ trigger method used on EISA controllers. Does not effect PCI cards.
1180 * -1 = Use detected settings.
1181 * 0 = Force Edge triggered mode.
1182 * 1 = Force Level triggered mode.
1183 */
1184 static int aic7xxx_irq_trigger = -1;
1185 /*
1186 * This variable is used to override the termination settings on a controller.
1187 * This should not be used under normal conditions. However, in the case
1188 * that a controller does not have a readable SEEPROM (so that we can't
1189 * read the SEEPROM settings directly) and that a controller has a buggered
1190 * version of the cable detection logic, this can be used to force the
1191 * correct termination. It is preferable to use the manual termination
1192 * settings in the BIOS if possible, but some motherboard controllers store
1193 * those settings in a format we can't read. In other cases, auto term
1194 * should also work, but the chipset was put together with no auto term
1195 * logic (common on motherboard controllers). In those cases, we have
1196 * 32 bits here to work with. That's good for 8 controllers/channels. The
1197 * bits are organized as 4 bits per channel, with scsi0 getting the lowest
1198 * 4 bits in the int. A 1 in a bit position indicates the termination setting
1199 * that corresponds to that bit should be enabled, a 0 is disabled.
1200 * It looks something like this:
1201 *
1202 * 0x0f = 1111-Single Ended Low Byte Termination on/off
1203 * ||\-Single Ended High Byte Termination on/off
1204 * |\-LVD Low Byte Termination on/off
1205 * \-LVD High Byte Termination on/off
1206 *
1207 * For non-Ultra2 controllers, the upper 2 bits are not important. So, to
1208 * enable both high byte and low byte termination on scsi0, I would need to
1209 * make sure that the override_term variable was set to 0x03 (bits 0011).
1210 * To make sure that all termination is enabled on an Ultra2 controller at
1211 * scsi2 and only high byte termination on scsi1 and high and low byte
1212 * termination on scsi0, I would set override_term=0xf23 (bits 1111 0010 0011)
1213 *
1214 * For the most part, users should never have to use this, that's why I
1215 * left it fairly cryptic instead of easy to understand. If you need it,
1216 * most likely someone will be telling you what your's needs to be set to.
1217 */
1218 static int aic7xxx_override_term = -1;
1219 /*
1220 * Certain motherboard chipset controllers tend to screw
1221 * up the polarity of the term enable output pin. Use this variable
1222 * to force the correct polarity for your system. This is a bitfield variable
1223 * similar to the previous one, but this one has one bit per channel instead
1224 * of four.
1225 * 0 = Force the setting to active low.
1226 * 1 = Force setting to active high.
1227 * Most Adaptec cards are active high, several motherboards are active low.
1228 * To force a 2940 card at SCSI 0 to active high and a motherboard 7895
1229 * controller at scsi1 and scsi2 to active low, and a 2910 card at scsi3
1230 * to active high, you would need to set stpwlev=0x9 (bits 1001).
1231 *
1232 * People shouldn't need to use this, but if you are experiencing lots of
1233 * SCSI timeout problems, this may help. There is one sure way to test what
1234 * this option needs to be. Using a boot floppy to boot the system, configure
1235 * your system to enable all SCSI termination (in the Adaptec SCSI BIOS) and
1236 * if needed then also pass a value to override_term to make sure that the
1237 * driver is enabling SCSI termination, then set this variable to either 0
1238 * or 1. When the driver boots, make sure there are *NO* SCSI cables
1239 * connected to your controller. If it finds and inits the controller
1240 * without problem, then the setting you passed to stpwlev was correct. If
1241 * the driver goes into a reset loop and hangs the system, then you need the
1242 * other setting for this variable. If neither setting lets the machine
1243 * boot then you have definite termination problems that may not be fixable.
1244 */
1245 static int aic7xxx_stpwlev = -1;
1246 /*
1247 * Set this to non-0 in order to force the driver to panic the kernel
1248 * and print out debugging info on a SCSI abort or reset cycle.
1249 */
1250 static int aic7xxx_panic_on_abort = 0;
1251 /*
1252 * PCI bus parity checking of the Adaptec controllers. This is somewhat
1253 * dubious at best. To my knowledge, this option has never actually
1254 * solved a PCI parity problem, but on certain machines with broken PCI
1255 * chipset configurations, it can generate tons of false error messages.
1256 * It's included in the driver for completeness.
1257 * 0 = Shut off PCI parity check
1258 * -1 = Normal polarity pci parity checking
1259 * 1 = reverse polarity pci parity checking
1260 *
1261 * NOTE: you can't actually pass -1 on the lilo prompt. So, to set this
1262 * variable to -1 you would actually want to simply pass the variable
1263 * name without a number. That will invert the 0 which will result in
1264 * -1.
1265 */
1266 static int aic7xxx_pci_parity = 0;
1267 /*
1268 * Set this to any non-0 value to cause us to dump the contents of all
1269 * the card's registers in a hex dump format tailored to each model of
1270 * controller.
1271 *
1272 * NOTE: THE CONTROLLER IS LEFT IN AN UNUSEABLE STATE BY THIS OPTION.
1273 * YOU CANNOT BOOT UP WITH THIS OPTION, IT IS FOR DEBUGGING PURPOSES
1274 * ONLY
1275 */
1276 static int aic7xxx_dump_card = 0;
1277 /*
1278 * Set this to a non-0 value to make us dump out the 32 bit instruction
1279 * registers on the card after completing the sequencer download. This
1280 * allows the actual sequencer download to be verified. It is possible
1281 * to use this option and still boot up and run your system. This is
1282 * only intended for debugging purposes.
1283 */
1284 static int aic7xxx_dump_sequencer = 0;
1285 /*
1286 * Certain newer motherboards have put new PCI based devices into the
1287 * IO spaces that used to typically be occupied by VLB or EISA cards.
1288 * This overlap can cause these newer motherboards to lock up when scanned
1289 * for older EISA and VLB devices. Setting this option to non-0 will
1290 * cause the driver to skip scanning for any VLB or EISA controllers and
1291 * only support the PCI controllers. NOTE: this means that if the kernel
1292 * os compiled with PCI support disabled, then setting this to non-0
1293 * would result in never finding any devices :)
1294 */
1295 static int aic7xxx_no_probe = 0;
1296 /*
1297 * On some machines, enabling the external SCB RAM isn't reliable yet. I
1298 * haven't had time to make test patches for things like changing the
1299 * timing mode on that external RAM either. Some of those changes may
1300 * fix the problem. Until then though, we default to external SCB RAM
1301 * off and give a command line option to enable it.
1302 */
1303 static int aic7xxx_scbram = 0;
1304 /*
1305 * So that we can set how long each device is given as a selection timeout.
1306 * The table of values goes like this:
1307 * 0 - 256ms
1308 * 1 - 128ms
1309 * 2 - 64ms
1310 * 3 - 32ms
1311 * We default to 64ms because it's fast. Some old SCSI-I devices need a
1312 * longer time. The final value has to be left shifted by 3, hence 0x10
1313 * is the final value.
1314 */
1315 static int aic7xxx_seltime = 0x10;
1316 /*
1317 * So that insmod can find the variable and make it point to something
1318 */
1319 #ifdef MODULE
1320 static char * aic7xxx = NULL;
1321 MODULE_PARM(aic7xxx, "s");
1322
1323 /*
1324 * Just in case someone uses commas to separate items on the insmod
1325 * command line, we define a dummy buffer here to avoid having insmod
1326 * write wild stuff into our code segment
1327 */
1328 static char dummy_buffer[60] = "Please don't trounce on me insmod!!\n";
1329
1330 #endif
1331
1332 #define VERBOSE_NORMAL 0x0000
1333 #define VERBOSE_NEGOTIATION 0x0001
1334 #define VERBOSE_SEQINT 0x0002
1335 #define VERBOSE_SCSIINT 0x0004
1336 #define VERBOSE_PROBE 0x0008
1337 #define VERBOSE_PROBE2 0x0010
1338 #define VERBOSE_NEGOTIATION2 0x0020
1339 #define VERBOSE_MINOR_ERROR 0x0040
1340 #define VERBOSE_TRACING 0x0080
1341 #define VERBOSE_ABORT 0x0f00
1342 #define VERBOSE_ABORT_MID 0x0100
1343 #define VERBOSE_ABORT_FIND 0x0200
1344 #define VERBOSE_ABORT_PROCESS 0x0400
1345 #define VERBOSE_ABORT_RETURN 0x0800
1346 #define VERBOSE_RESET 0xf000
1347 #define VERBOSE_RESET_MID 0x1000
1348 #define VERBOSE_RESET_FIND 0x2000
1349 #define VERBOSE_RESET_PROCESS 0x4000
1350 #define VERBOSE_RESET_RETURN 0x8000
1351 static int aic7xxx_verbose = VERBOSE_NORMAL | VERBOSE_NEGOTIATION |
1352 VERBOSE_PROBE; /* verbose messages */
1353
1354
1355 /****************************************************************************
1356 *
1357 * We're going to start putting in function declarations so that order of
1358 * functions is no longer important. As needed, they are added here.
1359 *
1360 ***************************************************************************/
1361
1362 static void aic7xxx_panic_abort(struct aic7xxx_host *p, Scsi_Cmnd *cmd);
1363 static void aic7xxx_print_card(struct aic7xxx_host *p);
1364 static void aic7xxx_print_scratch_ram(struct aic7xxx_host *p);
1365 static void aic7xxx_print_sequencer(struct aic7xxx_host *p, int downloaded);
1366 #ifdef AIC7XXX_VERBOSE_DEBUGGING
1367 static void aic7xxx_check_scbs(struct aic7xxx_host *p, char *buffer);
1368 #endif
1369
1370 /****************************************************************************
1371 *
1372 * These functions are now used. They happen to be wrapped in useless
1373 * inb/outb port read/writes around the real reads and writes because it
1374 * seems that certain very fast CPUs have a problem dealing with us when
1375 * going at full speed.
1376 *
1377 ***************************************************************************/
1378
1379 static inline unsigned char
1380 aic_inb(struct aic7xxx_host *p, long port)
1381 {
1382 #ifdef MMAPIO
1383 unsigned char x;
1384 if(p->maddr)
1385 {
1386 x = readb(p->maddr + port);
1387 }
1388 else
1389 {
1390 x = inb(p->base + port);
1391 }
1392 return(x);
1393 #else
1394 return(inb(p->base + port));
1395 #endif
1396 }
1397
1398 static inline void
1399 aic_outb(struct aic7xxx_host *p, unsigned char val, long port)
1400 {
1401 #ifdef MMAPIO
1402 if(p->maddr)
1403 {
1404 writeb(val, p->maddr + port);
1405 mb(); /* locked operation in order to force CPU ordering */
1406 readb(p->maddr + HCNTRL); /* dummy read to flush the PCI write */
1407 }
1408 else
1409 {
1410 outb(val, p->base + port);
1411 mb(); /* locked operation in order to force CPU ordering */
1412 }
1413 #else
1414 outb(val, p->base + port);
1415 mb(); /* locked operation in order to force CPU ordering */
1416 #endif
1417 }
1418
1419 /*+F*************************************************************************
1420 * Function:
1421 * aic7xxx_setup
1422 *
1423 * Description:
1424 * Handle Linux boot parameters. This routine allows for assigning a value
1425 * to a parameter with a ':' between the parameter and the value.
1426 * ie. aic7xxx=unpause:0x0A,extended
1427 *-F*************************************************************************/
1428 static int
1429 aic7xxx_setup(char *s)
1430 {
1431 int i, n;
1432 char *p;
1433 char *end;
1434
1435 static struct {
1436 const char *name;
1437 unsigned int *flag;
1438 } options[] = {
1439 { "extended", &aic7xxx_extended },
1440 { "no_reset", &aic7xxx_no_reset },
1441 { "irq_trigger", &aic7xxx_irq_trigger },
1442 { "verbose", &aic7xxx_verbose },
1443 { "reverse_scan",&aic7xxx_reverse_scan },
1444 { "override_term", &aic7xxx_override_term },
1445 { "stpwlev", &aic7xxx_stpwlev },
1446 { "no_probe", &aic7xxx_no_probe },
1447 { "panic_on_abort", &aic7xxx_panic_on_abort },
1448 { "pci_parity", &aic7xxx_pci_parity },
1449 { "dump_card", &aic7xxx_dump_card },
1450 { "dump_sequencer", &aic7xxx_dump_sequencer },
1451 { "scbram", &aic7xxx_scbram },
1452 { "seltime", &aic7xxx_seltime },
1453 { "tag_info", NULL }
1454 };
1455
1456 end = strchr(s, '\0');
1457
1458 for (p = strtok(s, ",."); p; p = strtok(NULL, ",."))
1459 {
1460 for (i = 0; i < NUMBER(options); i++)
1461 {
1462 n = strlen(options[i].name);
1463 if (!strncmp(options[i].name, p, n))
1464 {
1465 if (!strncmp(p, "tag_info", n))
1466 {
1467 if (p[n] == ':')
1468 {
1469 char *base;
1470 char *tok, *tok_end, *tok_end2;
1471 char tok_list[] = { '.', ',', '{', '}', '\0' };
1472 int i, instance = -1, device = -1;
1473 unsigned char done = FALSE;
1474
1475 base = p;
1476 tok = base + n + 1; /* Forward us just past the ':' */
1477 tok_end = strchr(tok, '\0');
1478 if (tok_end < end)
1479 *tok_end = ',';
1480 while(!done)
1481 {
1482 switch(*tok)
1483 {
1484 case '{':
1485 if (instance == -1)
1486 instance = 0;
1487 else if (device == -1)
1488 device = 0;
1489 tok++;
1490 break;
1491 case '}':
1492 if (device != -1)
1493 device = -1;
1494 else if (instance != -1)
1495 instance = -1;
1496 tok++;
1497 break;
1498 case ',':
1499 case '.':
1500 if (instance == -1)
1501 done = TRUE;
1502 else if (device >= 0)
1503 device++;
1504 else if (instance >= 0)
1505 instance++;
1506 if ( (device >= MAX_TARGETS) ||
1507 (instance >= NUMBER(aic7xxx_tag_info)) )
1508 done = TRUE;
1509 tok++;
1510 if (!done)
1511 {
1512 base = tok;
1513 }
1514 break;
1515 case '\0':
1516 done = TRUE;
1517 break;
1518 default:
1519 done = TRUE;
1520 tok_end = strchr(tok, '\0');
1521 for(i=0; tok_list[i]; i++)
1522 {
1523 tok_end2 = strchr(tok, tok_list[i]);
1524 if ( (tok_end2) && (tok_end2 < tok_end) )
1525 {
1526 tok_end = tok_end2;
1527 done = FALSE;
1528 }
1529 }
1530 if ( (instance >= 0) && (device >= 0) &&
1531 (instance < NUMBER(aic7xxx_tag_info)) &&
1532 (device < MAX_TARGETS) )
1533 aic7xxx_tag_info[instance].tag_commands[device] =
1534 simple_strtoul(tok, NULL, 0) & 0xff;
1535 tok = tok_end;
1536 break;
1537 }
1538 }
1539 while((p != base) && (p != NULL))
1540 p = strtok(NULL, ",.");
1541 }
1542 }
1543 else if (p[n] == ':')
1544 {
1545 *(options[i].flag) = simple_strtoul(p + n + 1, NULL, 0);
1546 if(!strncmp(p, "seltime", n))
1547 {
1548 *(options[i].flag) = (*(options[i].flag) % 4) << 3;
1549 }
1550 }
1551 else if (!strncmp(p, "verbose", n))
1552 {
1553 *(options[i].flag) = 0xff29;
1554 }
1555 else
1556 {
1557 *(options[i].flag) = ~(*(options[i].flag));
1558 if(!strncmp(p, "seltime", n))
1559 {
1560 *(options[i].flag) = (*(options[i].flag) % 4) << 3;
1561 }
1562 }
1563 }
1564 }
1565 }
1566 return 1;
1567 }
1568
1569 __setup("aic7xxx=", aic7xxx_setup);
1570
1571 /*+F*************************************************************************
1572 * Function:
1573 * pause_sequencer
1574 *
1575 * Description:
1576 * Pause the sequencer and wait for it to actually stop - this
1577 * is important since the sequencer can disable pausing for critical
1578 * sections.
1579 *-F*************************************************************************/
1580 static void
1581 pause_sequencer(struct aic7xxx_host *p)
1582 {
1583 aic_outb(p, p->pause, HCNTRL);
1584 while ((aic_inb(p, HCNTRL) & PAUSE) == 0)
1585 {
1586 ;
1587 }
1588 if(p->features & AHC_ULTRA2)
1589 {
1590 aic_inb(p, CCSCBCTL);
1591 }
1592 }
1593
1594 /*+F*************************************************************************
1595 * Function:
1596 * unpause_sequencer
1597 *
1598 * Description:
1599 * Unpause the sequencer. Unremarkable, yet done often enough to
1600 * warrant an easy way to do it.
1601 *-F*************************************************************************/
1602 static void
1603 unpause_sequencer(struct aic7xxx_host *p, int unpause_always)
1604 {
1605 if (unpause_always ||
1606 ( !(aic_inb(p, INTSTAT) & (SCSIINT | SEQINT | BRKADRINT)) &&
1607 !(p->flags & AHC_HANDLING_REQINITS) ) )
1608 {
1609 aic_outb(p, p->unpause, HCNTRL);
1610 }
1611 }
1612
1613 /*+F*************************************************************************
1614 * Function:
1615 * restart_sequencer
1616 *
1617 * Description:
1618 * Restart the sequencer program from address zero. This assumes
1619 * that the sequencer is already paused.
1620 *-F*************************************************************************/
1621 static void
1622 restart_sequencer(struct aic7xxx_host *p)
1623 {
1624 aic_outb(p, 0, SEQADDR0);
1625 aic_outb(p, 0, SEQADDR1);
1626 aic_outb(p, FASTMODE, SEQCTL);
1627 }
1628
1629 /*
1630 * We include the aic7xxx_seq.c file here so that the other defines have
1631 * already been made, and so that it comes before the code that actually
1632 * downloads the instructions (since we don't typically use function
1633 * prototype, our code has to be ordered that way, it's a left-over from
1634 * the original driver days.....I should fix it some time DL).
1635 */
1636 #include "aic7xxx_old/aic7xxx_seq.c"
1637
1638 /*+F*************************************************************************
1639 * Function:
1640 * aic7xxx_check_patch
1641 *
1642 * Description:
1643 * See if the next patch to download should be downloaded.
1644 *-F*************************************************************************/
1645 static int
1646 aic7xxx_check_patch(struct aic7xxx_host *p,
1647 struct sequencer_patch **start_patch, int start_instr, int *skip_addr)
1648 {
1649 struct sequencer_patch *cur_patch;
1650 struct sequencer_patch *last_patch;
1651 int num_patches;
1652
1653 num_patches = sizeof(sequencer_patches)/sizeof(struct sequencer_patch);
1654 last_patch = &sequencer_patches[num_patches];
1655 cur_patch = *start_patch;
1656
1657 while ((cur_patch < last_patch) && (start_instr == cur_patch->begin))
1658 {
1659 if (cur_patch->patch_func(p) == 0)
1660 {
1661 /*
1662 * Start rejecting code.
1663 */
1664 *skip_addr = start_instr + cur_patch->skip_instr;
1665 cur_patch += cur_patch->skip_patch;
1666 }
1667 else
1668 {
1669 /*
1670 * Found an OK patch. Advance the patch pointer to the next patch
1671 * and wait for our instruction pointer to get here.
1672 */
1673 cur_patch++;
1674 }
1675 }
1676
1677 *start_patch = cur_patch;
1678 if (start_instr < *skip_addr)
1679 /*
1680 * Still skipping
1681 */
1682 return (0);
1683 return(1);
1684 }
1685
1686
1687 /*+F*************************************************************************
1688 * Function:
1689 * aic7xxx_download_instr
1690 *
1691 * Description:
1692 * Find the next patch to download.
1693 *-F*************************************************************************/
1694 static void
1695 aic7xxx_download_instr(struct aic7xxx_host *p, int instrptr,
1696 unsigned char *dconsts)
1697 {
1698 union ins_formats instr;
1699 struct ins_format1 *fmt1_ins;
1700 struct ins_format3 *fmt3_ins;
1701 unsigned char opcode;
1702
1703 instr = *(union ins_formats*) &seqprog[instrptr * 4];
1704
1705 instr.integer = le32_to_cpu(instr.integer);
1706
1707 fmt1_ins = &instr.format1;
1708 fmt3_ins = NULL;
1709
1710 /* Pull the opcode */
1711 opcode = instr.format1.opcode;
1712 switch (opcode)
1713 {
1714 case AIC_OP_JMP:
1715 case AIC_OP_JC:
1716 case AIC_OP_JNC:
1717 case AIC_OP_CALL:
1718 case AIC_OP_JNE:
1719 case AIC_OP_JNZ:
1720 case AIC_OP_JE:
1721 case AIC_OP_JZ:
1722 {
1723 struct sequencer_patch *cur_patch;
1724 int address_offset;
1725 unsigned int address;
1726 int skip_addr;
1727 int i;
1728
1729 fmt3_ins = &instr.format3;
1730 address_offset = 0;
1731 address = fmt3_ins->address;
1732 cur_patch = sequencer_patches;
1733 skip_addr = 0;
1734
1735 for (i = 0; i < address;)
1736 {
1737 aic7xxx_check_patch(p, &cur_patch, i, &skip_addr);
1738 if (skip_addr > i)
1739 {
1740 int end_addr;
1741
1742 end_addr = MIN(address, skip_addr);
1743 address_offset += end_addr - i;
1744 i = skip_addr;
1745 }
1746 else
1747 {
1748 i++;
1749 }
1750 }
1751 address -= address_offset;
1752 fmt3_ins->address = address;
1753 /* Fall Through to the next code section */
1754 }
1755 case AIC_OP_OR:
1756 case AIC_OP_AND:
1757 case AIC_OP_XOR:
1758 case AIC_OP_ADD:
1759 case AIC_OP_ADC:
1760 case AIC_OP_BMOV:
1761 if (fmt1_ins->parity != 0)
1762 {
1763 fmt1_ins->immediate = dconsts[fmt1_ins->immediate];
1764 }
1765 fmt1_ins->parity = 0;
1766 /* Fall Through to the next code section */
1767 case AIC_OP_ROL:
1768 if ((p->features & AHC_ULTRA2) != 0)
1769 {
1770 int i, count;
1771
1772 /* Calculate odd parity for the instruction */
1773 for ( i=0, count=0; i < 31; i++)
1774 {
1775 unsigned int mask;
1776
1777 mask = 0x01 << i;
1778 if ((instr.integer & mask) != 0)
1779 count++;
1780 }
1781 if (!(count & 0x01))
1782 instr.format1.parity = 1;
1783 }
1784 else
1785 {
1786 if (fmt3_ins != NULL)
1787 {
1788 instr.integer = fmt3_ins->immediate |
1789 (fmt3_ins->source << 8) |
1790 (fmt3_ins->address << 16) |
1791 (fmt3_ins->opcode << 25);
1792 }
1793 else
1794 {
1795 instr.integer = fmt1_ins->immediate |
1796 (fmt1_ins->source << 8) |
1797 (fmt1_ins->destination << 16) |
1798 (fmt1_ins->ret << 24) |
1799 (fmt1_ins->opcode << 25);
1800 }
1801 }
1802 aic_outb(p, (instr.integer & 0xff), SEQRAM);
1803 aic_outb(p, ((instr.integer >> 8) & 0xff), SEQRAM);
1804 aic_outb(p, ((instr.integer >> 16) & 0xff), SEQRAM);
1805 aic_outb(p, ((instr.integer >> 24) & 0xff), SEQRAM);
1806 udelay(10);
1807 break;
1808
1809 default:
1810 panic("aic7xxx: Unknown opcode encountered in sequencer program.");
1811 break;
1812 }
1813 }
1814
1815
1816 /*+F*************************************************************************
1817 * Function:
1818 * aic7xxx_loadseq
1819 *
1820 * Description:
1821 * Load the sequencer code into the controller memory.
1822 *-F*************************************************************************/
1823 static void
1824 aic7xxx_loadseq(struct aic7xxx_host *p)
1825 {
1826 struct sequencer_patch *cur_patch;
1827 int i;
1828 int downloaded;
1829 int skip_addr;
1830 unsigned char download_consts[4] = {0, 0, 0, 0};
1831
1832 if (aic7xxx_verbose & VERBOSE_PROBE)
1833 {
1834 printk(KERN_INFO "(scsi%d) Downloading sequencer code...", p->host_no);
1835 }
1836 #if 0
1837 download_consts[TMODE_NUMCMDS] = p->num_targetcmds;
1838 #endif
1839 download_consts[TMODE_NUMCMDS] = 0;
1840 cur_patch = &sequencer_patches[0];
1841 downloaded = 0;
1842 skip_addr = 0;
1843
1844 aic_outb(p, PERRORDIS|LOADRAM|FAILDIS|FASTMODE, SEQCTL);
1845 aic_outb(p, 0, SEQADDR0);
1846 aic_outb(p, 0, SEQADDR1);
1847
1848 for (i = 0; i < sizeof(seqprog) / 4; i++)
1849 {
1850 if (aic7xxx_check_patch(p, &cur_patch, i, &skip_addr) == 0)
1851 {
1852 /* Skip this instruction for this configuration. */
1853 continue;
1854 }
1855 aic7xxx_download_instr(p, i, &download_consts[0]);
1856 downloaded++;
1857 }
1858
1859 aic_outb(p, 0, SEQADDR0);
1860 aic_outb(p, 0, SEQADDR1);
1861 aic_outb(p, FASTMODE | FAILDIS, SEQCTL);
1862 unpause_sequencer(p, TRUE);
1863 mdelay(1);
1864 pause_sequencer(p);
1865 aic_outb(p, FASTMODE, SEQCTL);
1866 if (aic7xxx_verbose & VERBOSE_PROBE)
1867 {
1868 printk(" %d instructions downloaded\n", downloaded);
1869 }
1870 if (aic7xxx_dump_sequencer)
1871 aic7xxx_print_sequencer(p, downloaded);
1872 }
1873
1874 /*+F*************************************************************************
1875 * Function:
1876 * aic7xxx_print_sequencer
1877 *
1878 * Description:
1879 * Print the contents of the sequencer memory to the screen.
1880 *-F*************************************************************************/
1881 static void
1882 aic7xxx_print_sequencer(struct aic7xxx_host *p, int downloaded)
1883 {
1884 int i, k, temp;
1885
1886 aic_outb(p, PERRORDIS|LOADRAM|FAILDIS|FASTMODE, SEQCTL);
1887 aic_outb(p, 0, SEQADDR0);
1888 aic_outb(p, 0, SEQADDR1);
1889
1890 k = 0;
1891 for (i=0; i < downloaded; i++)
1892 {
1893 if ( k == 0 )
1894 printk("%03x: ", i);
1895 temp = aic_inb(p, SEQRAM);
1896 temp |= (aic_inb(p, SEQRAM) << 8);
1897 temp |= (aic_inb(p, SEQRAM) << 16);
1898 temp |= (aic_inb(p, SEQRAM) << 24);
1899 printk("%08x", temp);
1900 if ( ++k == 8 )
1901 {
1902 printk("\n");
1903 k = 0;
1904 }
1905 else
1906 printk(" ");
1907 }
1908 aic_outb(p, 0, SEQADDR0);
1909 aic_outb(p, 0, SEQADDR1);
1910 aic_outb(p, FASTMODE | FAILDIS, SEQCTL);
1911 unpause_sequencer(p, TRUE);
1912 mdelay(1);
1913 pause_sequencer(p);
1914 aic_outb(p, FASTMODE, SEQCTL);
1915 printk("\n");
1916 }
1917
1918 /*+F*************************************************************************
1919 * Function:
1920 * aic7xxx_info
1921 *
1922 * Description:
1923 * Return a string describing the driver.
1924 *-F*************************************************************************/
1925 const char *
1926 aic7xxx_info(struct Scsi_Host *dooh)
1927 {
1928 static char buffer[256];
1929 char *bp;
1930 struct aic7xxx_host *p;
1931
1932 bp = &buffer[0];
1933 p = (struct aic7xxx_host *)dooh->hostdata;
1934 memset(bp, 0, sizeof(buffer));
1935 strcpy(bp, "Adaptec AHA274x/284x/294x (EISA/VLB/PCI-Fast SCSI) ");
1936 strcat(bp, AIC7XXX_C_VERSION);
1937 strcat(bp, "/");
1938 strcat(bp, AIC7XXX_H_VERSION);
1939 strcat(bp, "\n");
1940 strcat(bp, " <");
1941 strcat(bp, board_names[p->board_name_index]);
1942 strcat(bp, ">");
1943
1944 return(bp);
1945 }
1946
1947 /*+F*************************************************************************
1948 * Function:
1949 * aic7xxx_find_syncrate
1950 *
1951 * Description:
1952 * Look up the valid period to SCSIRATE conversion in our table
1953 *-F*************************************************************************/
1954 static struct aic7xxx_syncrate *
1955 aic7xxx_find_syncrate(struct aic7xxx_host *p, unsigned int *period,
1956 unsigned int maxsync, unsigned char *options)
1957 {
1958 struct aic7xxx_syncrate *syncrate;
1959 int done = FALSE;
1960
1961 switch(*options)
1962 {
1963 case MSG_EXT_PPR_OPTION_DT_CRC:
1964 case MSG_EXT_PPR_OPTION_DT_UNITS:
1965 if(!(p->features & AHC_ULTRA3))
1966 {
1967 *options = 0;
1968 maxsync = MAX(maxsync, AHC_SYNCRATE_ULTRA2);
1969 }
1970 break;
1971 case MSG_EXT_PPR_OPTION_DT_CRC_QUICK:
1972 case MSG_EXT_PPR_OPTION_DT_UNITS_QUICK:
1973 if(!(p->features & AHC_ULTRA3))
1974 {
1975 *options = 0;
1976 maxsync = MAX(maxsync, AHC_SYNCRATE_ULTRA2);
1977 }
1978 else
1979 {
1980 /*
1981 * we don't support the Quick Arbitration variants of dual edge
1982 * clocking. As it turns out, we want to send back the
1983 * same basic option, but without the QA attribute.
1984 * We know that we are responding because we would never set
1985 * these options ourself, we would only respond to them.
1986 */
1987 switch(*options)
1988 {
1989 case MSG_EXT_PPR_OPTION_DT_CRC_QUICK:
1990 *options = MSG_EXT_PPR_OPTION_DT_CRC;
1991 break;
1992 case MSG_EXT_PPR_OPTION_DT_UNITS_QUICK:
1993 *options = MSG_EXT_PPR_OPTION_DT_UNITS;
1994 break;
1995 }
1996 }
1997 break;
1998 default:
1999 *options = 0;
2000 maxsync = MAX(maxsync, AHC_SYNCRATE_ULTRA2);
2001 break;
2002 }
2003 syncrate = &aic7xxx_syncrates[maxsync];
2004 while ( (syncrate->rate[0] != NULL) &&
2005 (!(p->features & AHC_ULTRA2) || syncrate->sxfr_ultra2) )
2006 {
2007 if (*period <= syncrate->period)
2008 {
2009 switch(*options)
2010 {
2011 case MSG_EXT_PPR_OPTION_DT_CRC:
2012 case MSG_EXT_PPR_OPTION_DT_UNITS:
2013 if(!(syncrate->sxfr_ultra2 & AHC_SYNCRATE_CRC))
2014 {
2015 done = TRUE;
2016 /*
2017 * oops, we went too low for the CRC/DualEdge signalling, so
2018 * clear the options byte
2019 */
2020 *options = 0;
2021 /*
2022 * We'll be sending a reply to this packet to set the options
2023 * properly, so unilaterally set the period as well.
2024 */
2025 *period = syncrate->period;
2026 }
2027 else
2028 {
2029 done = TRUE;
2030 if(syncrate == &aic7xxx_syncrates[maxsync])
2031 {
2032 *period = syncrate->period;
2033 }
2034 }
2035 break;
2036 default:
2037 if(!(syncrate->sxfr_ultra2 & AHC_SYNCRATE_CRC))
2038 {
2039 done = TRUE;
2040 if(syncrate == &aic7xxx_syncrates[maxsync])
2041 {
2042 *period = syncrate->period;
2043 }
2044 }
2045 break;
2046 }
2047 if(done)
2048 {
2049 break;
2050 }
2051 }
2052 syncrate++;
2053 }
2054 if ( (*period == 0) || (syncrate->rate[0] == NULL) ||
2055 ((p->features & AHC_ULTRA2) && (syncrate->sxfr_ultra2 == 0)) )
2056 {
2057 /*
2058 * Use async transfers for this target
2059 */
2060 *options = 0;
2061 *period = 255;
2062 syncrate = NULL;
2063 }
2064 return (syncrate);
2065 }
2066
2067
2068 /*+F*************************************************************************
2069 * Function:
2070 * aic7xxx_find_period
2071 *
2072 * Description:
2073 * Look up the valid SCSIRATE to period conversion in our table
2074 *-F*************************************************************************/
2075 static unsigned int
2076 aic7xxx_find_period(struct aic7xxx_host *p, unsigned int scsirate,
2077 unsigned int maxsync)
2078 {
2079 struct aic7xxx_syncrate *syncrate;
2080
2081 if (p->features & AHC_ULTRA2)
2082 {
2083 scsirate &= SXFR_ULTRA2;
2084 }
2085 else
2086 {
2087 scsirate &= SXFR;
2088 }
2089
2090 syncrate = &aic7xxx_syncrates[maxsync];
2091 while (syncrate->rate[0] != NULL)
2092 {
2093 if (p->features & AHC_ULTRA2)
2094 {
2095 if (syncrate->sxfr_ultra2 == 0)
2096 break;
2097 else if (scsirate == syncrate->sxfr_ultra2)
2098 return (syncrate->period);
2099 else if (scsirate == (syncrate->sxfr_ultra2 & ~AHC_SYNCRATE_CRC))
2100 return (syncrate->period);
2101 }
2102 else if (scsirate == (syncrate->sxfr & ~ULTRA_SXFR))
2103 {
2104 return (syncrate->period);
2105 }
2106 syncrate++;
2107 }
2108 return (0); /* async */
2109 }
2110
2111 /*+F*************************************************************************
2112 * Function:
2113 * aic7xxx_validate_offset
2114 *
2115 * Description:
2116 * Set a valid offset value for a particular card in use and transfer
2117 * settings in use.
2118 *-F*************************************************************************/
2119 static void
2120 aic7xxx_validate_offset(struct aic7xxx_host *p,
2121 struct aic7xxx_syncrate *syncrate, unsigned int *offset, int wide)
2122 {
2123 unsigned int maxoffset;
2124
2125 /* Limit offset to what the card (and device) can do */
2126 if (syncrate == NULL)
2127 {
2128 maxoffset = 0;
2129 }
2130 else if (p->features & AHC_ULTRA2)
2131 {
2132 maxoffset = MAX_OFFSET_ULTRA2;
2133 }
2134 else
2135 {
2136 if (wide)
2137 maxoffset = MAX_OFFSET_16BIT;
2138 else
2139 maxoffset = MAX_OFFSET_8BIT;
2140 }
2141 *offset = MIN(*offset, maxoffset);
2142 }
2143
2144 /*+F*************************************************************************
2145 * Function:
2146 * aic7xxx_set_syncrate
2147 *
2148 * Description:
2149 * Set the actual syncrate down in the card and in our host structs
2150 *-F*************************************************************************/
2151 static void
2152 aic7xxx_set_syncrate(struct aic7xxx_host *p, struct aic7xxx_syncrate *syncrate,
2153 int target, int channel, unsigned int period, unsigned int offset,
2154 unsigned char options, unsigned int type)
2155 {
2156 unsigned char tindex;
2157 unsigned short target_mask;
2158 unsigned char lun, old_options;
2159 unsigned int old_period, old_offset;
2160
2161 tindex = target | (channel << 3);
2162 target_mask = 0x01 << tindex;
2163 lun = aic_inb(p, SCB_TCL) & 0x07;
2164
2165 if (syncrate == NULL)
2166 {
2167 period = 0;
2168 offset = 0;
2169 }
2170
2171 old_period = p->transinfo[tindex].cur_period;
2172 old_offset = p->transinfo[tindex].cur_offset;
2173 old_options = p->transinfo[tindex].cur_options;
2174
2175
2176 if (type & AHC_TRANS_CUR)
2177 {
2178 unsigned int scsirate;
2179
2180 scsirate = aic_inb(p, TARG_SCSIRATE + tindex);
2181 if (p->features & AHC_ULTRA2)
2182 {
2183 scsirate &= ~SXFR_ULTRA2;
2184 if (syncrate != NULL)
2185 {
2186 switch(options)
2187 {
2188 case MSG_EXT_PPR_OPTION_DT_UNITS:
2189 /*
2190 * mask off the CRC bit in the xfer settings
2191 */
2192 scsirate |= (syncrate->sxfr_ultra2 & ~AHC_SYNCRATE_CRC);
2193 break;
2194 default:
2195 scsirate |= syncrate->sxfr_ultra2;
2196 break;
2197 }
2198 }
2199 if (type & AHC_TRANS_ACTIVE)
2200 {
2201 aic_outb(p, offset, SCSIOFFSET);
2202 }
2203 aic_outb(p, offset, TARG_OFFSET + tindex);
2204 }
2205 else /* Not an Ultra2 controller */
2206 {
2207 scsirate &= ~(SXFR|SOFS);
2208 p->ultraenb &= ~target_mask;
2209 if (syncrate != NULL)
2210 {
2211 if (syncrate->sxfr & ULTRA_SXFR)
2212 {
2213 p->ultraenb |= target_mask;
2214 }
2215 scsirate |= (syncrate->sxfr & SXFR);
2216 scsirate |= (offset & SOFS);
2217 }
2218 if (type & AHC_TRANS_ACTIVE)
2219 {
2220 unsigned char sxfrctl0;
2221
2222 sxfrctl0 = aic_inb(p, SXFRCTL0);
2223 sxfrctl0 &= ~FAST20;
2224 if (p->ultraenb & target_mask)
2225 sxfrctl0 |= FAST20;
2226 aic_outb(p, sxfrctl0, SXFRCTL0);
2227 }
2228 aic_outb(p, p->ultraenb & 0xff, ULTRA_ENB);
2229 aic_outb(p, (p->ultraenb >> 8) & 0xff, ULTRA_ENB + 1 );
2230 }
2231 if (type & AHC_TRANS_ACTIVE)
2232 {
2233 aic_outb(p, scsirate, SCSIRATE);
2234 }
2235 aic_outb(p, scsirate, TARG_SCSIRATE + tindex);
2236 p->transinfo[tindex].cur_period = period;
2237 p->transinfo[tindex].cur_offset = offset;
2238 p->transinfo[tindex].cur_options = options;
2239 if ( !(type & AHC_TRANS_QUITE) &&
2240 (aic7xxx_verbose & VERBOSE_NEGOTIATION) &&
2241 (p->dev_flags[tindex] & DEVICE_PRINT_DTR) )
2242 {
2243 if (offset)
2244 {
2245 int rate_mod = (scsirate & WIDEXFER) ? 1 : 0;
2246
2247 printk(INFO_LEAD "Synchronous at %s Mbyte/sec, "
2248 "offset %d.\n", p->host_no, channel, target, lun,
2249 syncrate->rate[rate_mod], offset);
2250 }
2251 else
2252 {
2253 printk(INFO_LEAD "Using asynchronous transfers.\n",
2254 p->host_no, channel, target, lun);
2255 }
2256 p->dev_flags[tindex] &= ~DEVICE_PRINT_DTR;
2257 }
2258 }
2259
2260 if (type & AHC_TRANS_GOAL)
2261 {
2262 p->transinfo[tindex].goal_period = period;
2263 p->transinfo[tindex].goal_offset = offset;
2264 p->transinfo[tindex].goal_options = options;
2265 }
2266
2267 if (type & AHC_TRANS_USER)
2268 {
2269 p->transinfo[tindex].user_period = period;
2270 p->transinfo[tindex].user_offset = offset;
2271 p->transinfo[tindex].user_options = options;
2272 }
2273 }
2274
2275 /*+F*************************************************************************
2276 * Function:
2277 * aic7xxx_set_width
2278 *
2279 * Description:
2280 * Set the actual width down in the card and in our host structs
2281 *-F*************************************************************************/
2282 static void
2283 aic7xxx_set_width(struct aic7xxx_host *p, int target, int channel, int lun,
2284 unsigned int width, unsigned int type)
2285 {
2286 unsigned char tindex;
2287 unsigned short target_mask;
2288 unsigned int old_width;
2289
2290 tindex = target | (channel << 3);
2291 target_mask = 1 << tindex;
2292
2293 old_width = p->transinfo[tindex].cur_width;
2294
2295 if (type & AHC_TRANS_CUR)
2296 {
2297 unsigned char scsirate;
2298
2299 scsirate = aic_inb(p, TARG_SCSIRATE + tindex);
2300
2301 scsirate &= ~WIDEXFER;
2302 if (width == MSG_EXT_WDTR_BUS_16_BIT)
2303 scsirate |= WIDEXFER;
2304
2305 aic_outb(p, scsirate, TARG_SCSIRATE + tindex);
2306
2307 if (type & AHC_TRANS_ACTIVE)
2308 aic_outb(p, scsirate, SCSIRATE);
2309
2310 p->transinfo[tindex].cur_width = width;
2311
2312 if ( !(type & AHC_TRANS_QUITE) &&
2313 (aic7xxx_verbose & VERBOSE_NEGOTIATION2) &&
2314 (p->dev_flags[tindex] & DEVICE_PRINT_DTR) )
2315 {
2316 printk(INFO_LEAD "Using %s transfers\n", p->host_no, channel, target,
2317 lun, (scsirate & WIDEXFER) ? "Wide(16bit)" : "Narrow(8bit)" );
2318 }
2319 }
2320
2321 if (type & AHC_TRANS_GOAL)
2322 p->transinfo[tindex].goal_width = width;
2323 if (type & AHC_TRANS_USER)
2324 p->transinfo[tindex].user_width = width;
2325
2326 if (p->transinfo[tindex].goal_offset)
2327 {
2328 if (p->features & AHC_ULTRA2)
2329 {
2330 p->transinfo[tindex].goal_offset = MAX_OFFSET_ULTRA2;
2331 }
2332 else if (width == MSG_EXT_WDTR_BUS_16_BIT)
2333 {
2334 p->transinfo[tindex].goal_offset = MAX_OFFSET_16BIT;
2335 }
2336 else
2337 {
2338 p->transinfo[tindex].goal_offset = MAX_OFFSET_8BIT;
2339 }
2340 }
2341 }
2342
2343 /*+F*************************************************************************
2344 * Function:
2345 * scbq_init
2346 *
2347 * Description:
2348 * SCB queue initialization.
2349 *
2350 *-F*************************************************************************/
2351 static void
2352 scbq_init(volatile scb_queue_type *queue)
2353 {
2354 queue->head = NULL;
2355 queue->tail = NULL;
2356 }
2357
2358 /*+F*************************************************************************
2359 * Function:
2360 * scbq_insert_head
2361 *
2362 * Description:
2363 * Add an SCB to the head of the list.
2364 *
2365 *-F*************************************************************************/
2366 static inline void
2367 scbq_insert_head(volatile scb_queue_type *queue, struct aic7xxx_scb *scb)
2368 {
2369 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95)
2370 unsigned long cpu_flags;
2371 #endif
2372
2373 DRIVER_LOCK
2374 scb->q_next = queue->head;
2375 queue->head = scb;
2376 if (queue->tail == NULL) /* If list was empty, update tail. */
2377 queue->tail = queue->head;
2378 DRIVER_UNLOCK
2379 }
2380
2381 /*+F*************************************************************************
2382 * Function:
2383 * scbq_remove_head
2384 *
2385 * Description:
2386 * Remove an SCB from the head of the list.
2387 *
2388 *-F*************************************************************************/
2389 static inline struct aic7xxx_scb *
2390 scbq_remove_head(volatile scb_queue_type *queue)
2391 {
2392 struct aic7xxx_scb * scbp;
2393 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95)
2394 unsigned long cpu_flags;
2395 #endif
2396
2397 DRIVER_LOCK
2398 scbp = queue->head;
2399 if (queue->head != NULL)
2400 queue->head = queue->head->q_next;
2401 if (queue->head == NULL) /* If list is now empty, update tail. */
2402 queue->tail = NULL;
2403 DRIVER_UNLOCK
2404 return(scbp);
2405 }
2406
2407 /*+F*************************************************************************
2408 * Function:
2409 * scbq_remove
2410 *
2411 * Description:
2412 * Removes an SCB from the list.
2413 *
2414 *-F*************************************************************************/
2415 static inline void
2416 scbq_remove(volatile scb_queue_type *queue, struct aic7xxx_scb *scb)
2417 {
2418 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95)
2419 unsigned long cpu_flags;
2420 #endif
2421
2422 DRIVER_LOCK
2423 if (queue->head == scb)
2424 {
2425 /* At beginning of queue, remove from head. */
2426 scbq_remove_head(queue);
2427 }
2428 else
2429 {
2430 struct aic7xxx_scb *curscb = queue->head;
2431
2432 /*
2433 * Search until the next scb is the one we're looking for, or
2434 * we run out of queue.
2435 */
2436 while ((curscb != NULL) && (curscb->q_next != scb))
2437 {
2438 curscb = curscb->q_next;
2439 }
2440 if (curscb != NULL)
2441 {
2442 /* Found it. */
2443 curscb->q_next = scb->q_next;
2444 if (scb->q_next == NULL)
2445 {
2446 /* Update the tail when removing the tail. */
2447 queue->tail = curscb;
2448 }
2449 }
2450 }
2451 DRIVER_UNLOCK
2452 }
2453
2454 /*+F*************************************************************************
2455 * Function:
2456 * scbq_insert_tail
2457 *
2458 * Description:
2459 * Add an SCB at the tail of the list.
2460 *
2461 *-F*************************************************************************/
2462 static inline void
2463 scbq_insert_tail(volatile scb_queue_type *queue, struct aic7xxx_scb *scb)
2464 {
2465 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95)
2466 unsigned long cpu_flags;
2467 #endif
2468
2469 DRIVER_LOCK
2470 scb->q_next = NULL;
2471 if (queue->tail != NULL) /* Add the scb at the end of the list. */
2472 queue->tail->q_next = scb;
2473 queue->tail = scb; /* Update the tail. */
2474 if (queue->head == NULL) /* If list was empty, update head. */
2475 queue->head = queue->tail;
2476 DRIVER_UNLOCK
2477 }
2478
2479 /*+F*************************************************************************
2480 * Function:
2481 * aic7xxx_match_scb
2482 *
2483 * Description:
2484 * Checks to see if an scb matches the target/channel as specified.
2485 * If target is ALL_TARGETS (-1), then we're looking for any device
2486 * on the specified channel; this happens when a channel is going
2487 * to be reset and all devices on that channel must be aborted.
2488 *-F*************************************************************************/
2489 static int
2490 aic7xxx_match_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb,
2491 int target, int channel, int lun, unsigned char tag)
2492 {
2493 int targ = (scb->hscb->target_channel_lun >> 4) & 0x0F;
2494 int chan = (scb->hscb->target_channel_lun >> 3) & 0x01;
2495 int slun = scb->hscb->target_channel_lun & 0x07;
2496 int match;
2497
2498 match = ((chan == channel) || (channel == ALL_CHANNELS));
2499 if (match != 0)
2500 match = ((targ == target) || (target == ALL_TARGETS));
2501 if (match != 0)
2502 match = ((lun == slun) || (lun == ALL_LUNS));
2503 if (match != 0)
2504 match = ((tag == scb->hscb->tag) || (tag == SCB_LIST_NULL));
2505
2506 return (match);
2507 }
2508
2509 /*+F*************************************************************************
2510 * Function:
2511 * aic7xxx_add_curscb_to_free_list
2512 *
2513 * Description:
2514 * Adds the current scb (in SCBPTR) to the list of free SCBs.
2515 *-F*************************************************************************/
2516 static void
2517 aic7xxx_add_curscb_to_free_list(struct aic7xxx_host *p)
2518 {
2519 /*
2520 * Invalidate the tag so that aic7xxx_find_scb doesn't think
2521 * it's active
2522 */
2523 aic_outb(p, SCB_LIST_NULL, SCB_TAG);
2524 aic_outb(p, 0, SCB_CONTROL);
2525
2526 aic_outb(p, aic_inb(p, FREE_SCBH), SCB_NEXT);
2527 aic_outb(p, aic_inb(p, SCBPTR), FREE_SCBH);
2528 }
2529
2530 /*+F*************************************************************************
2531 * Function:
2532 * aic7xxx_rem_scb_from_disc_list
2533 *
2534 * Description:
2535 * Removes the current SCB from the disconnected list and adds it
2536 * to the free list.
2537 *-F*************************************************************************/
2538 static unsigned char
2539 aic7xxx_rem_scb_from_disc_list(struct aic7xxx_host *p, unsigned char scbptr,
2540 unsigned char prev)
2541 {
2542 unsigned char next;
2543
2544 aic_outb(p, scbptr, SCBPTR);
2545 next = aic_inb(p, SCB_NEXT);
2546 aic7xxx_add_curscb_to_free_list(p);
2547
2548 if (prev != SCB_LIST_NULL)
2549 {
2550 aic_outb(p, prev, SCBPTR);
2551 aic_outb(p, next, SCB_NEXT);
2552 }
2553 else
2554 {
2555 aic_outb(p, next, DISCONNECTED_SCBH);
2556 }
2557
2558 return next;
2559 }
2560
2561 /*+F*************************************************************************
2562 * Function:
2563 * aic7xxx_busy_target
2564 *
2565 * Description:
2566 * Set the specified target busy.
2567 *-F*************************************************************************/
2568 static inline void
2569 aic7xxx_busy_target(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
2570 {
2571 p->untagged_scbs[scb->hscb->target_channel_lun] = scb->hscb->tag;
2572 }
2573
2574 /*+F*************************************************************************
2575 * Function:
2576 * aic7xxx_index_busy_target
2577 *
2578 * Description:
2579 * Returns the index of the busy target, and optionally sets the
2580 * target inactive.
2581 *-F*************************************************************************/
2582 static inline unsigned char
2583 aic7xxx_index_busy_target(struct aic7xxx_host *p, unsigned char tcl,
2584 int unbusy)
2585 {
2586 unsigned char busy_scbid;
2587
2588 busy_scbid = p->untagged_scbs[tcl];
2589 if (unbusy)
2590 {
2591 p->untagged_scbs[tcl] = SCB_LIST_NULL;
2592 }
2593 return (busy_scbid);
2594 }
2595
2596 /*+F*************************************************************************
2597 * Function:
2598 * aic7xxx_find_scb
2599 *
2600 * Description:
2601 * Look through the SCB array of the card and attempt to find the
2602 * hardware SCB that corresponds to the passed in SCB. Return
2603 * SCB_LIST_NULL if unsuccessful. This routine assumes that the
2604 * card is already paused.
2605 *-F*************************************************************************/
2606 static unsigned char
2607 aic7xxx_find_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
2608 {
2609 unsigned char saved_scbptr;
2610 unsigned char curindex;
2611
2612 saved_scbptr = aic_inb(p, SCBPTR);
2613 curindex = 0;
2614 for (curindex = 0; curindex < p->scb_data->maxhscbs; curindex++)
2615 {
2616 aic_outb(p, curindex, SCBPTR);
2617 if (aic_inb(p, SCB_TAG) == scb->hscb->tag)
2618 {
2619 break;
2620 }
2621 }
2622 aic_outb(p, saved_scbptr, SCBPTR);
2623 if (curindex >= p->scb_data->maxhscbs)
2624 {
2625 curindex = SCB_LIST_NULL;
2626 }
2627
2628 return (curindex);
2629 }
2630
2631 /*+F*************************************************************************
2632 * Function:
2633 * aic7xxx_allocate_scb
2634 *
2635 * Description:
2636 * Get an SCB from the free list or by allocating a new one.
2637 *-F*************************************************************************/
2638 static int
2639 aic7xxx_allocate_scb(struct aic7xxx_host *p)
2640 {
2641 struct aic7xxx_scb *scbp = NULL;
2642 int scb_size = (sizeof (struct hw_scatterlist) * AIC7XXX_MAX_SG) + 12 + 6;
2643 int i;
2644 int step = PAGE_SIZE / 1024;
2645 unsigned long scb_count = 0;
2646 struct hw_scatterlist *hsgp;
2647 struct aic7xxx_scb *scb_ap;
2648 struct aic7xxx_scb_dma *scb_dma;
2649 unsigned char *bufs;
2650
2651 if (p->scb_data->numscbs < p->scb_data->maxscbs)
2652 {
2653 /*
2654 * Calculate the optimal number of SCBs to allocate.
2655 *
2656 * NOTE: This formula works because the sizeof(sg_array) is always
2657 * 1024. Therefore, scb_size * i would always be > PAGE_SIZE *
2658 * (i/step). The (i-1) allows the left hand side of the equation
2659 * to grow into the right hand side to a point of near perfect
2660 * efficiency since scb_size * (i -1) is growing slightly faster
2661 * than the right hand side. If the number of SG array elements
2662 * is changed, this function may not be near so efficient any more.
2663 *
2664 * Since the DMA'able buffers are now allocated in a seperate
2665 * chunk this algorithm has been modified to match. The '12'
2666 * and '6' factors in scb_size are for the DMA'able command byte
2667 * and sensebuffers respectively. -DaveM
2668 */
2669 for ( i=step;; i *= 2 )
2670 {
2671 if ( (scb_size * (i-1)) >= ( (PAGE_SIZE * (i/step)) - 64 ) )
2672 {
2673 i /= 2;
2674 break;
2675 }
2676 }
2677 scb_count = MIN( (i-1), p->scb_data->maxscbs - p->scb_data->numscbs);
2678 scb_ap = (struct aic7xxx_scb *)kmalloc(sizeof (struct aic7xxx_scb) * scb_count
2679 + sizeof(struct aic7xxx_scb_dma), GFP_ATOMIC);
2680 if (scb_ap == NULL)
2681 return(0);
2682 scb_dma = (struct aic7xxx_scb_dma *)&scb_ap[scb_count];
2683 hsgp = (struct hw_scatterlist *)
2684 pci_alloc_consistent(p->pdev, scb_size * scb_count,
2685 &scb_dma->dma_address);
2686 if (hsgp == NULL)
2687 {
2688 kfree(scb_ap);
2689 return(0);
2690 }
2691 bufs = (unsigned char *)&hsgp[scb_count * AIC7XXX_MAX_SG];
2692 #ifdef AIC7XXX_VERBOSE_DEBUGGING
2693 if (aic7xxx_verbose > 0xffff)
2694 {
2695 if (p->scb_data->numscbs == 0)
2696 printk(INFO_LEAD "Allocating initial %ld SCB structures.\n",
2697 p->host_no, -1, -1, -1, scb_count);
2698 else
2699 printk(INFO_LEAD "Allocating %ld additional SCB structures.\n",
2700 p->host_no, -1, -1, -1, scb_count);
2701 }
2702 #endif
2703 memset(scb_ap, 0, sizeof (struct aic7xxx_scb) * scb_count);
2704 scb_dma->dma_offset = (unsigned long)scb_dma->dma_address
2705 - (unsigned long)hsgp;
2706 scb_dma->dma_len = scb_size * scb_count;
2707 for (i=0; i < scb_count; i++)
2708 {
2709 scbp = &scb_ap[i];
2710 scbp->hscb = &p->scb_data->hscbs[p->scb_data->numscbs];
2711 scbp->sg_list = &hsgp[i * AIC7XXX_MAX_SG];
2712 scbp->sense_cmd = bufs;
2713 scbp->cmnd = bufs + 6;
2714 bufs += 12 + 6;
2715 scbp->scb_dma = scb_dma;
2716 memset(scbp->hscb, 0, sizeof(struct aic7xxx_hwscb));
2717 scbp->hscb->tag = p->scb_data->numscbs;
2718 /*
2719 * Place in the scb array; never is removed
2720 */
2721 p->scb_data->scb_array[p->scb_data->numscbs++] = scbp;
2722 scbq_insert_tail(&p->scb_data->free_scbs, scbp);
2723 }
2724 scbp->kmalloc_ptr = scb_ap;
2725 }
2726 return(scb_count);
2727 }
2728
2729 /*+F*************************************************************************
2730 * Function:
2731 * aic7xxx_queue_cmd_complete
2732 *
2733 * Description:
2734 * Due to race conditions present in the SCSI subsystem, it is easier
2735 * to queue completed commands, then call scsi_done() on them when
2736 * we're finished. This function queues the completed commands.
2737 *-F*************************************************************************/
2738 static void
2739 aic7xxx_queue_cmd_complete(struct aic7xxx_host *p, Scsi_Cmnd *cmd)
2740 {
2741 cmd->host_scribble = (char *)p->completeq.head;
2742 p->completeq.head = cmd;
2743 }
2744
2745 /*+F*************************************************************************
2746 * Function:
2747 * aic7xxx_done_cmds_complete
2748 *
2749 * Description:
2750 * Process the completed command queue.
2751 *-F*************************************************************************/
2752 static void
2753 aic7xxx_done_cmds_complete(struct aic7xxx_host *p)
2754 {
2755 Scsi_Cmnd *cmd;
2756 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95)
2757 unsigned int cpu_flags = 0;
2758 #endif
2759
2760 DRIVER_LOCK
2761 while (p->completeq.head != NULL)
2762 {
2763 cmd = p->completeq.head;
2764 p->completeq.head = (Scsi_Cmnd *)cmd->host_scribble;
2765 cmd->host_scribble = NULL;
2766 cmd->scsi_done(cmd);
2767 }
2768 DRIVER_UNLOCK
2769 }
2770
2771 /*+F*************************************************************************
2772 * Function:
2773 * aic7xxx_free_scb
2774 *
2775 * Description:
2776 * Free the scb and insert into the free scb list.
2777 *-F*************************************************************************/
2778 static void
2779 aic7xxx_free_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
2780 {
2781
2782 scb->flags = SCB_FREE;
2783 scb->cmd = NULL;
2784 scb->sg_count = 0;
2785 scb->sg_length = 0;
2786 scb->tag_action = 0;
2787 scb->hscb->control = 0;
2788 scb->hscb->target_status = 0;
2789 scb->hscb->target_channel_lun = SCB_LIST_NULL;
2790
2791 scbq_insert_head(&p->scb_data->free_scbs, scb);
2792 }
2793
2794 /*+F*************************************************************************
2795 * Function:
2796 * aic7xxx_done
2797 *
2798 * Description:
2799 * Calls the higher level scsi done function and frees the scb.
2800 *-F*************************************************************************/
2801 static void
2802 aic7xxx_done(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
2803 {
2804 Scsi_Cmnd *cmd = scb->cmd;
2805 int tindex = TARGET_INDEX(cmd);
2806 struct aic7xxx_scb *scbp;
2807 unsigned char queue_depth;
2808
2809 if (cmd->use_sg > 1)
2810 {
2811 struct scatterlist *sg;
2812
2813 sg = (struct scatterlist *)cmd->request_buffer;
2814 pci_unmap_sg(p->pdev, sg, cmd->use_sg, scsi_to_pci_dma_dir(cmd->sc_data_direction));
2815 }
2816 else if (cmd->request_bufflen)
2817 pci_unmap_single(p->pdev, aic7xxx_mapping(cmd),
2818 cmd->request_bufflen,
2819 scsi_to_pci_dma_dir(cmd->sc_data_direction));
2820 if (scb->flags & SCB_SENSE)
2821 {
2822 pci_unmap_single(p->pdev,
2823 le32_to_cpu(scb->sg_list[0].address),
2824 sizeof(cmd->sense_buffer),
2825 PCI_DMA_FROMDEVICE);
2826 }
2827 if (scb->flags & SCB_RECOVERY_SCB)
2828 {
2829 p->flags &= ~AHC_ABORT_PENDING;
2830 }
2831 if (scb->flags & (SCB_RESET|SCB_ABORT))
2832 {
2833 cmd->result |= (DID_RESET << 16);
2834 }
2835
2836 if (!(p->dev_flags[tindex] & DEVICE_PRESENT))
2837 {
2838 if ( (cmd->cmnd[0] == INQUIRY) && (cmd->result == DID_OK) )
2839 {
2840
2841 p->dev_flags[tindex] |= DEVICE_PRESENT;
2842 #define WIDE_INQUIRY_BITS 0x60
2843 #define SYNC_INQUIRY_BITS 0x10
2844 #define SCSI_VERSION_BITS 0x07
2845 #define SCSI_DT_BIT 0x04
2846 if(!(p->dev_flags[tindex] & DEVICE_DTR_SCANNED)) {
2847 char *buffer;
2848
2849 if(cmd->use_sg)
2850 {
2851 struct scatterlist *sg;
2852
2853 sg = (struct scatterlist *)cmd->request_buffer;
2854 buffer = (char *)sg[0].address;
2855 }
2856 else
2857 {
2858 buffer = (char *)cmd->request_buffer;
2859 }
2860
2861
2862 if ( (buffer[7] & WIDE_INQUIRY_BITS) &&
2863 (p->features & AHC_WIDE) )
2864 {
2865 p->needwdtr |= (1<<tindex);
2866 p->needwdtr_copy |= (1<<tindex);
2867 p->transinfo[tindex].goal_width = p->transinfo[tindex].user_width;
2868 }
2869 else
2870 {
2871 p->needwdtr &= ~(1<<tindex);
2872 p->needwdtr_copy &= ~(1<<tindex);
2873 pause_sequencer(p);
2874 aic7xxx_set_width(p, cmd->target, cmd->channel, cmd->lun,
2875 MSG_EXT_WDTR_BUS_8_BIT, (AHC_TRANS_ACTIVE |
2876 AHC_TRANS_GOAL |
2877 AHC_TRANS_CUR) );
2878 unpause_sequencer(p, FALSE);
2879 }
2880 if ( (buffer[7] & SYNC_INQUIRY_BITS) &&
2881 p->transinfo[tindex].user_offset )
2882 {
2883 p->transinfo[tindex].goal_period = p->transinfo[tindex].user_period;
2884 p->transinfo[tindex].goal_options = p->transinfo[tindex].user_options;
2885 if (p->features & AHC_ULTRA2)
2886 p->transinfo[tindex].goal_offset = MAX_OFFSET_ULTRA2;
2887 else if (p->transinfo[tindex].goal_width == MSG_EXT_WDTR_BUS_16_BIT)
2888 p->transinfo[tindex].goal_offset = MAX_OFFSET_16BIT;
2889 else
2890 p->transinfo[tindex].goal_offset = MAX_OFFSET_8BIT;
2891 if ( (((buffer[2] & SCSI_VERSION_BITS) >= 3) ||
2892 (buffer[56] & SCSI_DT_BIT) ||
2893 (p->dev_flags[tindex] & DEVICE_SCSI_3) ) &&
2894 (p->transinfo[tindex].user_period <= 9) &&
2895 (p->transinfo[tindex].user_options) )
2896 {
2897 p->needppr |= (1<<tindex);
2898 p->needppr_copy |= (1<<tindex);
2899 p->needsdtr &= ~(1<<tindex);
2900 p->needsdtr_copy &= ~(1<<tindex);
2901 p->needwdtr &= ~(1<<tindex);
2902 p->needwdtr_copy &= ~(1<<tindex);
2903 p->dev_flags[tindex] |= DEVICE_SCSI_3;
2904 }
2905 else
2906 {
2907 p->needsdtr |= (1<<tindex);
2908 p->needsdtr_copy |= (1<<tindex);
2909 p->transinfo[tindex].goal_period =
2910 MAX(10, p->transinfo[tindex].goal_period);
2911 p->transinfo[tindex].goal_options = 0;
2912 }
2913 }
2914 else
2915 {
2916 p->needsdtr &= ~(1<<tindex);
2917 p->needsdtr_copy &= ~(1<<tindex);
2918 p->transinfo[tindex].goal_period = 255;
2919 p->transinfo[tindex].goal_offset = 0;
2920 p->transinfo[tindex].goal_options = 0;
2921 }
2922 p->dev_flags[tindex] |= DEVICE_DTR_SCANNED;
2923 p->dev_flags[tindex] |= DEVICE_PRINT_DTR;
2924 }
2925 #undef WIDE_INQUIRY_BITS
2926 #undef SYNC_INQUIRY_BITS
2927 #undef SCSI_VERSION_BITS
2928 #undef SCSI_DT_BIT
2929 }
2930 }
2931
2932 if ((scb->flags & SCB_MSGOUT_BITS) != 0)
2933 {
2934 unsigned short mask;
2935 int message_error = FALSE;
2936
2937 mask = 0x01 << tindex;
2938
2939 /*
2940 * Check to see if we get an invalid message or a message error
2941 * after failing to negotiate a wide or sync transfer message.
2942 */
2943 if ((scb->flags & SCB_SENSE) &&
2944 ((scb->cmd->sense_buffer[12] == 0x43) || /* INVALID_MESSAGE */
2945 (scb->cmd->sense_buffer[12] == 0x49))) /* MESSAGE_ERROR */
2946 {
2947 message_error = TRUE;
2948 }
2949
2950 if (scb->flags & SCB_MSGOUT_WDTR)
2951 {
2952 if (message_error)
2953 {
2954 if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) &&
2955 (p->dev_flags[tindex] & DEVICE_PRINT_DTR) )
2956 {
2957 printk(INFO_LEAD "Device failed to complete Wide Negotiation "
2958 "processing and\n", p->host_no, CTL_OF_SCB(scb));
2959 printk(INFO_LEAD "returned a sense error code for invalid message, "
2960 "disabling future\n", p->host_no, CTL_OF_SCB(scb));
2961 printk(INFO_LEAD "Wide negotiation to this device.\n", p->host_no,
2962 CTL_OF_SCB(scb));
2963 }
2964 p->needwdtr &= ~mask;
2965 p->needwdtr_copy &= ~mask;
2966 }
2967 }
2968 if (scb->flags & SCB_MSGOUT_SDTR)
2969 {
2970 if (message_error)
2971 {
2972 if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) &&
2973 (p->dev_flags[tindex] & DEVICE_PRINT_DTR) )
2974 {
2975 printk(INFO_LEAD "Device failed to complete Sync Negotiation "
2976 "processing and\n", p->host_no, CTL_OF_SCB(scb));
2977 printk(INFO_LEAD "returned a sense error code for invalid message, "
2978 "disabling future\n", p->host_no, CTL_OF_SCB(scb));
2979 printk(INFO_LEAD "Sync negotiation to this device.\n", p->host_no,
2980 CTL_OF_SCB(scb));
2981 p->dev_flags[tindex] &= ~DEVICE_PRINT_DTR;
2982 }
2983 p->needsdtr &= ~mask;
2984 p->needsdtr_copy &= ~mask;
2985 }
2986 }
2987 if (scb->flags & SCB_MSGOUT_PPR)
2988 {
2989 if(message_error)
2990 {
2991 if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) &&
2992 (p->dev_flags[tindex] & DEVICE_PRINT_DTR) )
2993 {
2994 printk(INFO_LEAD "Device failed to complete Parallel Protocol "
2995 "Request processing and\n", p->host_no, CTL_OF_SCB(scb));
2996 printk(INFO_LEAD "returned a sense error code for invalid message, "
2997 "disabling future\n", p->host_no, CTL_OF_SCB(scb));
2998 printk(INFO_LEAD "Parallel Protocol Request negotiation to this "
2999 "device.\n", p->host_no, CTL_OF_SCB(scb));
3000 }
3001 /*
3002 * Disable PPR negotiation and revert back to WDTR and SDTR setup
3003 */
3004 p->needppr &= ~mask;
3005 p->needppr_copy &= ~mask;
3006 p->needsdtr |= mask;
3007 p->needsdtr_copy |= mask;
3008 p->needwdtr |= mask;
3009 p->needwdtr_copy |= mask;
3010 }
3011 }
3012 }
3013
3014 queue_depth = p->dev_temp_queue_depth[tindex];
3015 if (queue_depth >= p->dev_active_cmds[tindex])
3016 {
3017 scbp = scbq_remove_head(&p->delayed_scbs[tindex]);
3018 if (scbp)
3019 {
3020 if (queue_depth == 1)
3021 {
3022 /*
3023 * Give extra preference to untagged devices, such as CD-R devices
3024 * This makes it more likely that a drive *won't* stuff up while
3025 * waiting on data at a critical time, such as CD-R writing and
3026 * audio CD ripping operations. Should also benefit tape drives.
3027 */
3028 scbq_insert_head(&p->waiting_scbs, scbp);
3029 }
3030 else
3031 {
3032 scbq_insert_tail(&p->waiting_scbs, scbp);
3033 }
3034 #ifdef AIC7XXX_VERBOSE_DEBUGGING
3035 if (aic7xxx_verbose > 0xffff)
3036 printk(INFO_LEAD "Moving SCB from delayed to waiting queue.\n",
3037 p->host_no, CTL_OF_SCB(scbp));
3038 #endif
3039 if (queue_depth > p->dev_active_cmds[tindex])
3040 {
3041 scbp = scbq_remove_head(&p->delayed_scbs[tindex]);
3042 if (scbp)
3043 scbq_insert_tail(&p->waiting_scbs, scbp);
3044 }
3045 }
3046 }
3047 if (!(scb->tag_action))
3048 {
3049 aic7xxx_index_busy_target(p, scb->hscb->target_channel_lun,
3050 /* unbusy */ TRUE);
3051 if (p->tagenable & (1<<tindex))
3052 {
3053 p->dev_temp_queue_depth[tindex] = p->dev_max_queue_depth[tindex];
3054 }
3055 }
3056 if(scb->flags & SCB_DTR_SCB)
3057 {
3058 p->dtr_pending &= ~(1 << tindex);
3059 }
3060 p->dev_active_cmds[tindex]--;
3061 p->activescbs--;
3062
3063 {
3064 int actual;
3065
3066 /*
3067 * XXX: we should actually know how much actually transferred
3068 * XXX: for each command, but apparently that's too difficult.
3069 *
3070 * We set a lower limit of 512 bytes on the transfer length. We
3071 * ignore anything less than this because we don't have a real
3072 * reason to count it. Read/Writes to tapes are usually about 20K
3073 * and disks are a minimum of 512 bytes unless you want to count
3074 * non-read/write commands (such as TEST_UNIT_READY) which we don't
3075 */
3076 actual = scb->sg_length;
3077 if ((actual >= 512) && (((cmd->result >> 16) & 0xf) == DID_OK))
3078 {
3079 struct aic7xxx_xferstats *sp;
3080 #ifdef AIC7XXX_PROC_STATS
3081 long *ptr;
3082 int x;
3083 #endif /* AIC7XXX_PROC_STATS */
3084
3085 sp = &p->stats[TARGET_INDEX(cmd)];
3086
3087 /*
3088 * For block devices, cmd->request.cmd is always == either READ or
3089 * WRITE. For character devices, this isn't always set properly, so
3090 * we check data_cmnd[0]. This catches the conditions for st.c, but
3091 * I'm still not sure if request.cmd is valid for sg devices.
3092 */
3093 if ( (cmd->request.cmd == WRITE) || (cmd->data_cmnd[0] == WRITE_6) ||
3094 (cmd->data_cmnd[0] == WRITE_FILEMARKS) )
3095 {
3096 sp->w_total++;
3097 #ifdef AIC7XXX_VERBOSE_DEBUGGING
3098 if ( (sp->w_total > 16) && (aic7xxx_verbose > 0xffff) )
3099 aic7xxx_verbose &= 0xffff;
3100 #endif
3101 #ifdef AIC7XXX_PROC_STATS
3102 ptr = sp->w_bins;
3103 #endif /* AIC7XXX_PROC_STATS */
3104 }
3105 else
3106 {
3107 sp->r_total++;
3108 #ifdef AIC7XXX_VERBOSE_DEBUGGING
3109 if ( (sp->r_total > 16) && (aic7xxx_verbose > 0xffff) )
3110 aic7xxx_verbose &= 0xffff;
3111 #endif
3112 #ifdef AIC7XXX_PROC_STATS
3113 ptr = sp->r_bins;
3114 #endif /* AIC7XXX_PROC_STATS */
3115 }
3116 #ifdef AIC7XXX_PROC_STATS
3117 x = -11;
3118 while(actual)
3119 {
3120 actual >>= 1;
3121 x++;
3122 }
3123 if (x < 0)
3124 {
3125 ptr[0]++;
3126 }
3127 else if (x > 7)
3128 {
3129 ptr[7]++;
3130 }
3131 else
3132 {
3133 ptr[x]++;
3134 }
3135 #endif /* AIC7XXX_PROC_STATS */
3136 }
3137 }
3138 aic7xxx_free_scb(p, scb);
3139 aic7xxx_queue_cmd_complete(p, cmd);
3140
3141 }
3142
3143 /*+F*************************************************************************
3144 * Function:
3145 * aic7xxx_run_done_queue
3146 *
3147 * Description:
3148 * Calls the aic7xxx_done() for the Scsi_Cmnd of each scb in the
3149 * aborted list, and adds each scb to the free list. If complete
3150 * is TRUE, we also process the commands complete list.
3151 *-F*************************************************************************/
3152 static void
3153 aic7xxx_run_done_queue(struct aic7xxx_host *p, /*complete*/ int complete)
3154 {
3155 struct aic7xxx_scb *scb;
3156 int i, found = 0;
3157
3158 for (i = 0; i < p->scb_data->numscbs; i++)
3159 {
3160 scb = p->scb_data->scb_array[i];
3161 if (scb->flags & SCB_QUEUED_FOR_DONE)
3162 {
3163 if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS))
3164 printk(INFO_LEAD "Aborting scb %d\n",
3165 p->host_no, CTL_OF_SCB(scb), scb->hscb->tag);
3166 found++;
3167 /*
3168 * Clear any residual information since the normal aic7xxx_done() path
3169 * doesn't touch the residuals.
3170 */
3171 scb->hscb->residual_SG_segment_count = 0;
3172 scb->hscb->residual_data_count[0] = 0;
3173 scb->hscb->residual_data_count[1] = 0;
3174 scb->hscb->residual_data_count[2] = 0;
3175 aic7xxx_done(p, scb);
3176 }
3177 }
3178 if (aic7xxx_verbose & (VERBOSE_ABORT_RETURN | VERBOSE_RESET_RETURN))
3179 {
3180 printk(INFO_LEAD "%d commands found and queued for "
3181 "completion.\n", p->host_no, -1, -1, -1, found);
3182 }
3183 if (complete)
3184 {
3185 aic7xxx_done_cmds_complete(p);
3186 }
3187 }
3188
3189 /*+F*************************************************************************
3190 * Function:
3191 * aic7xxx_abort_waiting_scb
3192 *
3193 * Description:
3194 * Manipulate the waiting for selection list and return the
3195 * scb that follows the one that we remove.
3196 *-F*************************************************************************/
3197 static unsigned char
3198 aic7xxx_abort_waiting_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb,
3199 unsigned char scbpos, unsigned char prev)
3200 {
3201 unsigned char curscb, next;
3202
3203 /*
3204 * Select the SCB we want to abort and pull the next pointer out of it.
3205 */
3206 curscb = aic_inb(p, SCBPTR);
3207 aic_outb(p, scbpos, SCBPTR);
3208 next = aic_inb(p, SCB_NEXT);
3209
3210 aic7xxx_add_curscb_to_free_list(p);
3211
3212 /*
3213 * Update the waiting list
3214 */
3215 if (prev == SCB_LIST_NULL)
3216 {
3217 /*
3218 * First in the list
3219 */
3220 aic_outb(p, next, WAITING_SCBH);
3221 }
3222 else
3223 {
3224 /*
3225 * Select the scb that pointed to us and update its next pointer.
3226 */
3227 aic_outb(p, prev, SCBPTR);
3228 aic_outb(p, next, SCB_NEXT);
3229 }
3230 /*
3231 * Point us back at the original scb position and inform the SCSI
3232 * system that the command has been aborted.
3233 */
3234 aic_outb(p, curscb, SCBPTR);
3235 return (next);
3236 }
3237
3238 /*+F*************************************************************************
3239 * Function:
3240 * aic7xxx_search_qinfifo
3241 *
3242 * Description:
3243 * Search the queue-in FIFO for matching SCBs and conditionally
3244 * requeue. Returns the number of matching SCBs.
3245 *-F*************************************************************************/
3246 static int
3247 aic7xxx_search_qinfifo(struct aic7xxx_host *p, int target, int channel,
3248 int lun, unsigned char tag, int flags, int requeue,
3249 volatile scb_queue_type *queue)
3250 {
3251 int found;
3252 unsigned char qinpos, qintail;
3253 struct aic7xxx_scb *scbp;
3254
3255 found = 0;
3256 qinpos = aic_inb(p, QINPOS);
3257 qintail = p->qinfifonext;
3258
3259 p->qinfifonext = qinpos;
3260
3261 while (qinpos != qintail)
3262 {
3263 scbp = p->scb_data->scb_array[p->qinfifo[qinpos++]];
3264 if (aic7xxx_match_scb(p, scbp, target, channel, lun, tag))
3265 {
3266 /*
3267 * We found an scb that needs to be removed.
3268 */
3269 if (requeue && (queue != NULL))
3270 {
3271 if (scbp->flags & SCB_WAITINGQ)
3272 {
3273 scbq_remove(queue, scbp);
3274 scbq_remove(&p->waiting_scbs, scbp);
3275 scbq_remove(&p->delayed_scbs[TARGET_INDEX(scbp->cmd)], scbp);
3276 p->dev_active_cmds[TARGET_INDEX(scbp->cmd)]++;
3277 p->activescbs++;
3278 }
3279 scbq_insert_tail(queue, scbp);
3280 p->dev_active_cmds[TARGET_INDEX(scbp->cmd)]--;
3281 p->activescbs--;
3282 scbp->flags |= SCB_WAITINGQ;
3283 if ( !(scbp->tag_action & TAG_ENB) )
3284 {
3285 aic7xxx_index_busy_target(p, scbp->hscb->target_channel_lun,
3286 TRUE);
3287 }
3288 }
3289 else if (requeue)
3290 {
3291 p->qinfifo[p->qinfifonext++] = scbp->hscb->tag;
3292 }
3293 else
3294 {
3295 /*
3296 * Preserve any SCB_RECOVERY_SCB flags on this scb then set the
3297 * flags we were called with, presumeably so aic7xxx_run_done_queue
3298 * can find this scb
3299 */
3300 scbp->flags = flags | (scbp->flags & SCB_RECOVERY_SCB);
3301 if (aic7xxx_index_busy_target(p, scbp->hscb->target_channel_lun,
3302 FALSE) == scbp->hscb->tag)
3303 {
3304 aic7xxx_index_busy_target(p, scbp->hscb->target_channel_lun,
3305 TRUE);
3306 }
3307 }
3308 found++;
3309 }
3310 else
3311 {
3312 p->qinfifo[p->qinfifonext++] = scbp->hscb->tag;
3313 }
3314 }
3315 /*
3316 * Now that we've done the work, clear out any left over commands in the
3317 * qinfifo and update the KERNEL_QINPOS down on the card.
3318 *
3319 * NOTE: This routine expect the sequencer to already be paused when
3320 * it is run....make sure it's that way!
3321 */
3322 qinpos = p->qinfifonext;
3323 while(qinpos != qintail)
3324 {
3325 p->qinfifo[qinpos++] = SCB_LIST_NULL;
3326 }
3327 if (p->features & AHC_QUEUE_REGS)
3328 aic_outb(p, p->qinfifonext, HNSCB_QOFF);
3329 else
3330 aic_outb(p, p->qinfifonext, KERNEL_QINPOS);
3331
3332 return (found);
3333 }
3334
3335 /*+F*************************************************************************
3336 * Function:
3337 * aic7xxx_scb_on_qoutfifo
3338 *
3339 * Description:
3340 * Is the scb that was passed to us currently on the qoutfifo?
3341 *-F*************************************************************************/
3342 static int
3343 aic7xxx_scb_on_qoutfifo(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
3344 {
3345 int i=0;
3346
3347 while(p->qoutfifo[(p->qoutfifonext + i) & 0xff ] != SCB_LIST_NULL)
3348 {
3349 if(p->qoutfifo[(p->qoutfifonext + i) & 0xff ] == scb->hscb->tag)
3350 return TRUE;
3351 else
3352 i++;
3353 }
3354 return FALSE;
3355 }
3356
3357
3358 /*+F*************************************************************************
3359 * Function:
3360 * aic7xxx_reset_device
3361 *
3362 * Description:
3363 * The device at the given target/channel has been reset. Abort
3364 * all active and queued scbs for that target/channel. This function
3365 * need not worry about linked next pointers because if was a MSG_ABORT_TAG
3366 * then we had a tagged command (no linked next), if it was MSG_ABORT or
3367 * MSG_BUS_DEV_RESET then the device won't know about any commands any more
3368 * and no busy commands will exist, and if it was a bus reset, then nothing
3369 * knows about any linked next commands any more. In all cases, we don't
3370 * need to worry about the linked next or busy scb, we just need to clear
3371 * them.
3372 *-F*************************************************************************/
3373 static void
3374 aic7xxx_reset_device(struct aic7xxx_host *p, int target, int channel,
3375 int lun, unsigned char tag)
3376 {
3377 struct aic7xxx_scb *scbp;
3378 unsigned char active_scb, tcl;
3379 int i = 0, j, init_lists = FALSE;
3380
3381 /*
3382 * Restore this when we're done
3383 */
3384 active_scb = aic_inb(p, SCBPTR);
3385
3386 if (aic7xxx_verbose & (VERBOSE_RESET_PROCESS | VERBOSE_ABORT_PROCESS))
3387 {
3388 printk(INFO_LEAD "Reset device, active_scb %d\n",
3389 p->host_no, channel, target, lun, active_scb);
3390 printk(INFO_LEAD "Current scb_tag %d, SEQADDR 0x%x, LASTPHASE "
3391 "0x%x\n",
3392 p->host_no, channel, target, lun, aic_inb(p, SCB_TAG),
3393 aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8),
3394 aic_inb(p, LASTPHASE));
3395 printk(INFO_LEAD "SG_CACHEPTR 0x%x, SG_COUNT %d, SCSISIGI 0x%x\n",
3396 p->host_no, channel, target, lun,
3397 (p->features & AHC_ULTRA2) ? aic_inb(p, SG_CACHEPTR) : 0,
3398 aic_inb(p, SG_COUNT), aic_inb(p, SCSISIGI));
3399 printk(INFO_LEAD "SSTAT0 0x%x, SSTAT1 0x%x, SSTAT2 0x%x\n",
3400 p->host_no, channel, target, lun, aic_inb(p, SSTAT0),
3401 aic_inb(p, SSTAT1), aic_inb(p, SSTAT2));
3402 }
3403 /*
3404 * Deal with the busy target and linked next issues.
3405 */
3406 {
3407 int min_target, max_target;
3408 struct aic7xxx_scb *scbp, *prev_scbp;
3409
3410 /* Make all targets 'relative' to bus A. */
3411 if (target == ALL_TARGETS)
3412 {
3413 switch (channel)
3414 {
3415 case 0:
3416 min_target = 0;
3417 max_target = (p->features & AHC_WIDE) ? 15 : 7;
3418 break;
3419 case 1:
3420 min_target = 8;
3421 max_target = 15;
3422 break;
3423 case ALL_CHANNELS:
3424 default:
3425 min_target = 0;
3426 max_target = (p->features & (AHC_TWIN|AHC_WIDE)) ? 15 : 7;
3427 break;
3428 }
3429 }
3430 else
3431 {
3432 min_target = target | (channel << 3);
3433 max_target = min_target;
3434 }
3435
3436
3437 for (i = min_target; i <= max_target; i++)
3438 {
3439 if ( i == p->scsi_id )
3440 {
3441 continue;
3442 }
3443 if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS))
3444 printk(INFO_LEAD "Cleaning up status information "
3445 "and delayed_scbs.\n", p->host_no, channel, i, lun);
3446 p->dev_flags[i] &= ~BUS_DEVICE_RESET_PENDING;
3447 if ( tag == SCB_LIST_NULL )
3448 {
3449 p->dev_flags[i] |= DEVICE_PRINT_DTR | DEVICE_RESET_DELAY;
3450 p->dev_expires[i] = jiffies + (1 * HZ);
3451 p->dev_timer_active |= (0x01 << i);
3452 p->dev_last_queue_full_count[i] = 0;
3453 p->dev_last_queue_full[i] = 0;
3454 p->dev_temp_queue_depth[i] =
3455 p->dev_max_queue_depth[i];
3456 }
3457 for(j=0; j<MAX_LUNS; j++)
3458 {
3459 if (channel == 1)
3460 tcl = ((i << 4) & 0x70) | (channel << 3) | j;
3461 else
3462 tcl = (i << 4) | (channel << 3) | j;
3463 if ( (aic7xxx_index_busy_target(p, tcl, FALSE) == tag) ||
3464 (tag == SCB_LIST_NULL) )
3465 aic7xxx_index_busy_target(p, tcl, /* unbusy */ TRUE);
3466 }
3467 j = 0;
3468 prev_scbp = NULL;
3469 scbp = p->delayed_scbs[i].head;
3470 while ( (scbp != NULL) && (j++ <= (p->scb_data->numscbs + 1)) )
3471 {
3472 prev_scbp = scbp;
3473 scbp = scbp->q_next;
3474 if ( prev_scbp == scbp )
3475 {
3476 if (aic7xxx_verbose & (VERBOSE_ABORT | VERBOSE_RESET))
3477 printk(WARN_LEAD "Yikes!! scb->q_next == scb "
3478 "in the delayed_scbs queue!\n", p->host_no, channel, i, lun);
3479 scbp = NULL;
3480 prev_scbp->q_next = NULL;
3481 p->delayed_scbs[i].tail = prev_scbp;
3482 }
3483 if (aic7xxx_match_scb(p, prev_scbp, target, channel, lun, tag))
3484 {
3485 scbq_remove(&p->delayed_scbs[i], prev_scbp);
3486 if (prev_scbp->flags & SCB_WAITINGQ)
3487 {
3488 p->dev_active_cmds[i]++;
3489 p->activescbs++;
3490 }
3491 prev_scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ);
3492 prev_scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE;
3493 }
3494 }
3495 if ( j > (p->scb_data->numscbs + 1) )
3496 {
3497 if (aic7xxx_verbose & (VERBOSE_ABORT | VERBOSE_RESET))
3498 printk(WARN_LEAD "Yikes!! There's a loop in the "
3499 "delayed_scbs queue!\n", p->host_no, channel, i, lun);
3500 scbq_init(&p->delayed_scbs[i]);
3501 }
3502 if ( !(p->dev_timer_active & (0x01 << MAX_TARGETS)) ||
3503 time_after_eq(p->dev_timer.expires, p->dev_expires[i]) )
3504 {
3505 mod_timer(&p->dev_timer, p->dev_expires[i]);
3506 p->dev_timer_active |= (0x01 << MAX_TARGETS);
3507 }
3508 }
3509 }
3510
3511 if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS))
3512 printk(INFO_LEAD "Cleaning QINFIFO.\n", p->host_no, channel, target, lun );
3513 aic7xxx_search_qinfifo(p, target, channel, lun, tag,
3514 SCB_RESET | SCB_QUEUED_FOR_DONE, /* requeue */ FALSE, NULL);
3515
3516 /*
3517 * Search the waiting_scbs queue for matches, this catches any SCB_QUEUED
3518 * ABORT/RESET commands.
3519 */
3520 if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS))
3521 printk(INFO_LEAD "Cleaning waiting_scbs.\n", p->host_no, channel,
3522 target, lun );
3523 {
3524 struct aic7xxx_scb *scbp, *prev_scbp;
3525
3526 j = 0;
3527 prev_scbp = NULL;
3528 scbp = p->waiting_scbs.head;
3529 while ( (scbp != NULL) && (j++ <= (p->scb_data->numscbs + 1)) )
3530 {
3531 prev_scbp = scbp;
3532 scbp = scbp->q_next;
3533 if ( prev_scbp == scbp )
3534 {
3535 if (aic7xxx_verbose & (VERBOSE_ABORT | VERBOSE_RESET))
3536 printk(WARN_LEAD "Yikes!! scb->q_next == scb "
3537 "in the waiting_scbs queue!\n", p->host_no, CTL_OF_SCB(scbp));
3538 scbp = NULL;
3539 prev_scbp->q_next = NULL;
3540 p->waiting_scbs.tail = prev_scbp;
3541 }
3542 if (aic7xxx_match_scb(p, prev_scbp, target, channel, lun, tag))
3543 {
3544 scbq_remove(&p->waiting_scbs, prev_scbp);
3545 if (prev_scbp->flags & SCB_WAITINGQ)
3546 {
3547 p->dev_active_cmds[TARGET_INDEX(prev_scbp->cmd)]++;
3548 p->activescbs++;
3549 }
3550 prev_scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ);
3551 prev_scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE;
3552 }
3553 }
3554 if ( j > (p->scb_data->numscbs + 1) )
3555 {
3556 if (aic7xxx_verbose & (VERBOSE_ABORT | VERBOSE_RESET))
3557 printk(WARN_LEAD "Yikes!! There's a loop in the "
3558 "waiting_scbs queue!\n", p->host_no, channel, target, lun);
3559 scbq_init(&p->waiting_scbs);
3560 }
3561 }
3562
3563
3564 /*
3565 * Search waiting for selection list.
3566 */
3567 if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS))
3568 printk(INFO_LEAD "Cleaning waiting for selection "
3569 "list.\n", p->host_no, channel, target, lun);
3570 {
3571 unsigned char next, prev, scb_index;
3572
3573 next = aic_inb(p, WAITING_SCBH); /* Start at head of list. */
3574 prev = SCB_LIST_NULL;
3575 j = 0;
3576 while ( (next != SCB_LIST_NULL) && (j++ <= (p->scb_data->maxscbs + 1)) )
3577 {
3578 aic_outb(p, next, SCBPTR);
3579 scb_index = aic_inb(p, SCB_TAG);
3580 if (scb_index >= p->scb_data->numscbs)
3581 {
3582 /*
3583 * No aic7xxx_verbose check here.....we want to see this since it
3584 * means either the kernel driver or the sequencer screwed things up
3585 */
3586 printk(WARN_LEAD "Waiting List inconsistency; SCB index=%d, "
3587 "numscbs=%d\n", p->host_no, channel, target, lun, scb_index,
3588 p->scb_data->numscbs);
3589 next = aic_inb(p, SCB_NEXT);
3590 aic7xxx_add_curscb_to_free_list(p);
3591 }
3592 else
3593 {
3594 scbp = p->scb_data->scb_array[scb_index];
3595 if (aic7xxx_match_scb(p, scbp, target, channel, lun, tag))
3596 {
3597 next = aic7xxx_abort_waiting_scb(p, scbp, next, prev);
3598 if (scbp->flags & SCB_WAITINGQ)
3599 {
3600 p->dev_active_cmds[TARGET_INDEX(scbp->cmd)]++;
3601 p->activescbs++;
3602 }
3603 scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ);
3604 scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE;
3605 if (prev == SCB_LIST_NULL)
3606 {
3607 /*
3608 * This is either the first scb on the waiting list, or we
3609 * have already yanked the first and haven't left any behind.
3610 * Either way, we need to turn off the selection hardware if
3611 * it isn't already off.
3612 */
3613 aic_outb(p, aic_inb(p, SCSISEQ) & ~ENSELO, SCSISEQ);
3614 aic_outb(p, CLRSELTIMEO, CLRSINT1);
3615 }
3616 }
3617 else
3618 {
3619 prev = next;
3620 next = aic_inb(p, SCB_NEXT);
3621 }
3622 }
3623 }
3624 if ( j > (p->scb_data->maxscbs + 1) )
3625 {
3626 printk(WARN_LEAD "Yikes!! There is a loop in the waiting for "
3627 "selection list!\n", p->host_no, channel, target, lun);
3628 init_lists = TRUE;
3629 }
3630 }
3631
3632 /*
3633 * Go through disconnected list and remove any entries we have queued
3634 * for completion, zeroing their control byte too.
3635 */
3636 if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS))
3637 printk(INFO_LEAD "Cleaning disconnected scbs "
3638 "list.\n", p->host_no, channel, target, lun);
3639 if (p->flags & AHC_PAGESCBS)
3640 {
3641 unsigned char next, prev, scb_index;
3642
3643 next = aic_inb(p, DISCONNECTED_SCBH);
3644 prev = SCB_LIST_NULL;
3645 j = 0;
3646 while ( (next != SCB_LIST_NULL) && (j++ <= (p->scb_data->maxscbs + 1)) )
3647 {
3648 aic_outb(p, next, SCBPTR);
3649 scb_index = aic_inb(p, SCB_TAG);
3650 if (scb_index > p->scb_data->numscbs)
3651 {
3652 printk(WARN_LEAD "Disconnected List inconsistency; SCB index=%d, "
3653 "numscbs=%d\n", p->host_no, channel, target, lun, scb_index,
3654 p->scb_data->numscbs);
3655 next = aic7xxx_rem_scb_from_disc_list(p, next, prev);
3656 }
3657 else
3658 {
3659 scbp = p->scb_data->scb_array[scb_index];
3660 if (aic7xxx_match_scb(p, scbp, target, channel, lun, tag))
3661 {
3662 next = aic7xxx_rem_scb_from_disc_list(p, next, prev);
3663 if (scbp->flags & SCB_WAITINGQ)
3664 {
3665 p->dev_active_cmds[TARGET_INDEX(scbp->cmd)]++;
3666 p->activescbs++;
3667 }
3668 scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ);
3669 scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE;
3670 scbp->hscb->control = 0;
3671 }
3672 else
3673 {
3674 prev = next;
3675 next = aic_inb(p, SCB_NEXT);
3676 }
3677 }
3678 }
3679 if ( j > (p->scb_data->maxscbs + 1) )
3680 {
3681 printk(WARN_LEAD "Yikes!! There is a loop in the disconnected list!\n",
3682 p->host_no, channel, target, lun);
3683 init_lists = TRUE;
3684 }
3685 }
3686
3687 /*
3688 * Walk the free list making sure no entries on the free list have
3689 * a valid SCB_TAG value or SCB_CONTROL byte.
3690 */
3691 if (p->flags & AHC_PAGESCBS)
3692 {
3693 unsigned char next;
3694
3695 j = 0;
3696 next = aic_inb(p, FREE_SCBH);
3697 if ( (next >= p->scb_data->maxhscbs) && (next != SCB_LIST_NULL) )
3698 {
3699 printk(WARN_LEAD "Bogus FREE_SCBH!.\n", p->host_no, channel,
3700 target, lun);
3701 init_lists = TRUE;
3702 next = SCB_LIST_NULL;
3703 }
3704 while ( (next != SCB_LIST_NULL) && (j++ <= (p->scb_data->maxscbs + 1)) )
3705 {
3706 aic_outb(p, next, SCBPTR);
3707 if (aic_inb(p, SCB_TAG) < p->scb_data->numscbs)
3708 {
3709 printk(WARN_LEAD "Free list inconsistency!.\n", p->host_no, channel,
3710 target, lun);
3711 init_lists = TRUE;
3712 next = SCB_LIST_NULL;
3713 }
3714 else
3715 {
3716 aic_outb(p, SCB_LIST_NULL, SCB_TAG);
3717 aic_outb(p, 0, SCB_CONTROL);
3718 next = aic_inb(p, SCB_NEXT);
3719 }
3720 }
3721 if ( j > (p->scb_data->maxscbs + 1) )
3722 {
3723 printk(WARN_LEAD "Yikes!! There is a loop in the free list!\n",
3724 p->host_no, channel, target, lun);
3725 init_lists = TRUE;
3726 }
3727 }
3728
3729 /*
3730 * Go through the hardware SCB array looking for commands that
3731 * were active but not on any list.
3732 */
3733 if (init_lists)
3734 {
3735 aic_outb(p, SCB_LIST_NULL, FREE_SCBH);
3736 aic_outb(p, SCB_LIST_NULL, WAITING_SCBH);
3737 aic_outb(p, SCB_LIST_NULL, DISCONNECTED_SCBH);
3738 }
3739 for (i = p->scb_data->maxhscbs - 1; i >= 0; i--)
3740 {
3741 unsigned char scbid;
3742
3743 aic_outb(p, i, SCBPTR);
3744 if (init_lists)
3745 {
3746 aic_outb(p, SCB_LIST_NULL, SCB_TAG);
3747 aic_outb(p, SCB_LIST_NULL, SCB_NEXT);
3748 aic_outb(p, 0, SCB_CONTROL);
3749 aic7xxx_add_curscb_to_free_list(p);
3750 }
3751 else
3752 {
3753 scbid = aic_inb(p, SCB_TAG);
3754 if (scbid < p->scb_data->numscbs)
3755 {
3756 scbp = p->scb_data->scb_array[scbid];
3757 if (aic7xxx_match_scb(p, scbp, target, channel, lun, tag))
3758 {
3759 aic_outb(p, 0, SCB_CONTROL);
3760 aic_outb(p, SCB_LIST_NULL, SCB_TAG);
3761 aic7xxx_add_curscb_to_free_list(p);
3762 }
3763 }
3764 }
3765 }
3766
3767 /*
3768 * Go through the entire SCB array now and look for commands for
3769 * for this target that are stillactive. These are other (most likely
3770 * tagged) commands that were disconnected when the reset occurred.
3771 * Any commands we find here we know this about, it wasn't on any queue,
3772 * it wasn't in the qinfifo, it wasn't in the disconnected or waiting
3773 * lists, so it really must have been a paged out SCB. In that case,
3774 * we shouldn't need to bother with updating any counters, just mark
3775 * the correct flags and go on.
3776 */
3777 for (i = 0; i < p->scb_data->numscbs; i++)
3778 {
3779 scbp = p->scb_data->scb_array[i];
3780 if ((scbp->flags & SCB_ACTIVE) &&
3781 aic7xxx_match_scb(p, scbp, target, channel, lun, tag) &&
3782 !aic7xxx_scb_on_qoutfifo(p, scbp))
3783 {
3784 if (scbp->flags & SCB_WAITINGQ)
3785 {
3786 scbq_remove(&p->waiting_scbs, scbp);
3787 scbq_remove(&p->delayed_scbs[TARGET_INDEX(scbp->cmd)], scbp);
3788 p->dev_active_cmds[TARGET_INDEX(scbp->cmd)]++;
3789 p->activescbs++;
3790 }
3791 scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE;
3792 scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ);
3793 }
3794 }
3795
3796 aic_outb(p, active_scb, SCBPTR);
3797 }
3798
3799
3800 /*+F*************************************************************************
3801 * Function:
3802 * aic7xxx_clear_intstat
3803 *
3804 * Description:
3805 * Clears the interrupt status.
3806 *-F*************************************************************************/
3807 static void
3808 aic7xxx_clear_intstat(struct aic7xxx_host *p)
3809 {
3810 /* Clear any interrupt conditions this may have caused. */
3811 aic_outb(p, CLRSELDO | CLRSELDI | CLRSELINGO, CLRSINT0);
3812 aic_outb(p, CLRSELTIMEO | CLRATNO | CLRSCSIRSTI | CLRBUSFREE | CLRSCSIPERR |
3813 CLRPHASECHG | CLRREQINIT, CLRSINT1);
3814 aic_outb(p, CLRSCSIINT | CLRSEQINT | CLRBRKADRINT | CLRPARERR, CLRINT);
3815 }
3816
3817 /*+F*************************************************************************
3818 * Function:
3819 * aic7xxx_reset_current_bus
3820 *
3821 * Description:
3822 * Reset the current SCSI bus.
3823 *-F*************************************************************************/
3824 static void
3825 aic7xxx_reset_current_bus(struct aic7xxx_host *p)
3826 {
3827
3828 /* Disable reset interrupts. */
3829 aic_outb(p, aic_inb(p, SIMODE1) & ~ENSCSIRST, SIMODE1);
3830
3831 /* Turn off the bus' current operations, after all, we shouldn't have any
3832 * valid commands left to cause a RSELI and SELO once we've tossed the
3833 * bus away with this reset, so we might as well shut down the sequencer
3834 * until the bus is restarted as oppossed to saving the current settings
3835 * and restoring them (which makes no sense to me). */
3836
3837 /* Turn on the bus reset. */
3838 aic_outb(p, aic_inb(p, SCSISEQ) | SCSIRSTO, SCSISEQ);
3839 while ( (aic_inb(p, SCSISEQ) & SCSIRSTO) == 0)
3840 mdelay(5);
3841
3842 /*
3843 * Some of the new Ultra2 chipsets need a longer delay after a chip
3844 * reset than just the init setup creates, so we have to delay here
3845 * before we go into a reset in order to make the chips happy.
3846 */
3847 if (p->features & AHC_ULTRA2)
3848 mdelay(250);
3849 else
3850 mdelay(50);
3851
3852 /* Turn off the bus reset. */
3853 aic_outb(p, 0, SCSISEQ);
3854 mdelay(10);
3855
3856 aic7xxx_clear_intstat(p);
3857 /* Re-enable reset interrupts. */
3858 aic_outb(p, aic_inb(p, SIMODE1) | ENSCSIRST, SIMODE1);
3859
3860 }
3861
3862 /*+F*************************************************************************
3863 * Function:
3864 * aic7xxx_reset_channel
3865 *
3866 * Description:
3867 * Reset the channel.
3868 *-F*************************************************************************/
3869 static void
3870 aic7xxx_reset_channel(struct aic7xxx_host *p, int channel, int initiate_reset)
3871 {
3872 unsigned long offset_min, offset_max;
3873 unsigned char sblkctl;
3874 int cur_channel;
3875
3876 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
3877 printk(INFO_LEAD "Reset channel called, %s initiate reset.\n",
3878 p->host_no, channel, -1, -1, (initiate_reset==TRUE) ? "will" : "won't" );
3879
3880
3881 if (channel == 1)
3882 {
3883 p->needsdtr |= (p->needsdtr_copy & 0xFF00);
3884 p->dtr_pending &= 0x00FF;
3885 offset_min = 8;
3886 offset_max = 16;
3887 }
3888 else
3889 {
3890 if (p->features & AHC_TWIN)
3891 {
3892 /* Channel A */
3893 p->needsdtr |= (p->needsdtr_copy & 0x00FF);
3894 p->dtr_pending &= 0xFF00;
3895 offset_min = 0;
3896 offset_max = 8;
3897 }
3898 else
3899 {
3900 p->needppr = p->needppr_copy;
3901 p->needsdtr = p->needsdtr_copy;
3902 p->needwdtr = p->needwdtr_copy;
3903 p->dtr_pending = 0x0;
3904 offset_min = 0;
3905 if (p->features & AHC_WIDE)
3906 {
3907 offset_max = 16;
3908 }
3909 else
3910 {
3911 offset_max = 8;
3912 }
3913 }
3914 }
3915
3916 while (offset_min < offset_max)
3917 {
3918 /*
3919 * Revert to async/narrow transfers until we renegotiate.
3920 */
3921 aic_outb(p, 0, TARG_SCSIRATE + offset_min);
3922 if (p->features & AHC_ULTRA2)
3923 {
3924 aic_outb(p, 0, TARG_OFFSET + offset_min);
3925 }
3926 offset_min++;
3927 }
3928
3929 /*
3930 * Reset the bus and unpause/restart the controller
3931 */
3932 sblkctl = aic_inb(p, SBLKCTL);
3933 if ( (p->chip & AHC_CHIPID_MASK) == AHC_AIC7770 )
3934 cur_channel = (sblkctl & SELBUSB) >> 3;
3935 else
3936 cur_channel = 0;
3937 if ( (cur_channel != channel) && (p->features & AHC_TWIN) )
3938 {
3939 /*
3940 * Case 1: Command for another bus is active
3941 */
3942 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
3943 printk(INFO_LEAD "Stealthily resetting idle channel.\n", p->host_no,
3944 channel, -1, -1);
3945 /*
3946 * Stealthily reset the other bus without upsetting the current bus.
3947 */
3948 aic_outb(p, sblkctl ^ SELBUSB, SBLKCTL);
3949 aic_outb(p, aic_inb(p, SIMODE1) & ~ENBUSFREE, SIMODE1);
3950 if (initiate_reset)
3951 {
3952 aic7xxx_reset_current_bus(p);
3953 }
3954 aic_outb(p, aic_inb(p, SCSISEQ) & (ENSELI|ENRSELI|ENAUTOATNP), SCSISEQ);
3955 aic7xxx_clear_intstat(p);
3956 aic_outb(p, sblkctl, SBLKCTL);
3957 }
3958 else
3959 {
3960 /*
3961 * Case 2: A command from this bus is active or we're idle.
3962 */
3963 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
3964 printk(INFO_LEAD "Resetting currently active channel.\n", p->host_no,
3965 channel, -1, -1);
3966 aic_outb(p, aic_inb(p, SIMODE1) & ~(ENBUSFREE|ENREQINIT),
3967 SIMODE1);
3968 p->flags &= ~AHC_HANDLING_REQINITS;
3969 p->msg_type = MSG_TYPE_NONE;
3970 p->msg_len = 0;
3971 if (initiate_reset)
3972 {
3973 aic7xxx_reset_current_bus(p);
3974 }
3975 aic_outb(p, aic_inb(p, SCSISEQ) & (ENSELI|ENRSELI|ENAUTOATNP), SCSISEQ);
3976 aic7xxx_clear_intstat(p);
3977 }
3978 if (aic7xxx_verbose & VERBOSE_RESET_RETURN)
3979 printk(INFO_LEAD "Channel reset\n", p->host_no, channel, -1, -1);
3980 /*
3981 * Clean up all the state information for the pending transactions
3982 * on this bus.
3983 */
3984 aic7xxx_reset_device(p, ALL_TARGETS, channel, ALL_LUNS, SCB_LIST_NULL);
3985
3986 if ( !(p->features & AHC_TWIN) )
3987 {
3988 restart_sequencer(p);
3989 }
3990
3991 return;
3992 }
3993
3994 /*+F*************************************************************************
3995 * Function:
3996 * aic7xxx_run_waiting_queues
3997 *
3998 * Description:
3999 * Scan the awaiting_scbs queue downloading and starting as many
4000 * scbs as we can.
4001 *-F*************************************************************************/
4002 static void
4003 aic7xxx_run_waiting_queues(struct aic7xxx_host *p)
4004 {
4005 struct aic7xxx_scb *scb;
4006 int tindex;
4007 int sent;
4008 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95)
4009 unsigned long cpu_flags = 0;
4010 #endif
4011
4012
4013 if (p->waiting_scbs.head == NULL)
4014 return;
4015
4016 sent = 0;
4017
4018 /*
4019 * First handle SCBs that are waiting but have been assigned a slot.
4020 */
4021 DRIVER_LOCK
4022 while ((scb = scbq_remove_head(&p->waiting_scbs)) != NULL)
4023 {
4024 tindex = TARGET_INDEX(scb->cmd);
4025 if ( !scb->tag_action && (p->tagenable & (1<<tindex)) )
4026 {
4027 p->dev_temp_queue_depth[tindex] = 1;
4028 }
4029 if ( (p->dev_active_cmds[tindex] >=
4030 p->dev_temp_queue_depth[tindex]) ||
4031 (p->dev_flags[tindex] & (DEVICE_RESET_DELAY|DEVICE_WAS_BUSY)) ||
4032 (p->flags & AHC_RESET_DELAY) )
4033 {
4034 scbq_insert_tail(&p->delayed_scbs[tindex], scb);
4035 }
4036 else
4037 {
4038 scb->flags &= ~SCB_WAITINGQ;
4039 p->dev_active_cmds[tindex]++;
4040 p->activescbs++;
4041 if ( !(scb->tag_action) )
4042 {
4043 aic7xxx_busy_target(p, scb);
4044 }
4045 p->qinfifo[p->qinfifonext++] = scb->hscb->tag;
4046 sent++;
4047 }
4048 }
4049 if (sent)
4050 {
4051 if (p->features & AHC_QUEUE_REGS)
4052 aic_outb(p, p->qinfifonext, HNSCB_QOFF);
4053 else
4054 {
4055 pause_sequencer(p);
4056 aic_outb(p, p->qinfifonext, KERNEL_QINPOS);
4057 unpause_sequencer(p, FALSE);
4058 }
4059 if (p->activescbs > p->max_activescbs)
4060 p->max_activescbs = p->activescbs;
4061 }
4062 DRIVER_UNLOCK
4063 }
4064
4065 #ifdef CONFIG_PCI
4066
4067 #define DPE 0x80
4068 #define SSE 0x40
4069 #define RMA 0x20
4070 #define RTA 0x10
4071 #define STA 0x08
4072 #define DPR 0x01
4073
4074 /*+F*************************************************************************
4075 * Function:
4076 * aic7xxx_pci_intr
4077 *
4078 * Description:
4079 * Check the scsi card for PCI errors and clear the interrupt
4080 *
4081 * NOTE: If you don't have this function and a 2940 card encounters
4082 * a PCI error condition, the machine will end up locked as the
4083 * interrupt handler gets slammed with non-stop PCI error interrupts
4084 *-F*************************************************************************/
4085 static void
4086 aic7xxx_pci_intr(struct aic7xxx_host *p)
4087 {
4088 unsigned char status1;
4089
4090 pci_read_config_byte(p->pdev, PCI_STATUS + 1, &status1);
4091
4092 if ( (status1 & DPE) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) )
4093 printk(WARN_LEAD "Data Parity Error during PCI address or PCI write"
4094 "phase.\n", p->host_no, -1, -1, -1);
4095 if ( (status1 & SSE) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) )
4096 printk(WARN_LEAD "Signal System Error Detected\n", p->host_no,
4097 -1, -1, -1);
4098 if ( (status1 & RMA) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) )
4099 printk(WARN_LEAD "Received a PCI Master Abort\n", p->host_no,
4100 -1, -1, -1);
4101 if ( (status1 & RTA) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) )
4102 printk(WARN_LEAD "Received a PCI Target Abort\n", p->host_no,
4103 -1, -1, -1);
4104 if ( (status1 & STA) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) )
4105 printk(WARN_LEAD "Signaled a PCI Target Abort\n", p->host_no,
4106 -1, -1, -1);
4107 if ( (status1 & DPR) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) )
4108 printk(WARN_LEAD "Data Parity Error has been reported via PCI pin "
4109 "PERR#\n", p->host_no, -1, -1, -1);
4110
4111 pci_write_config_byte(p->pdev, PCI_STATUS + 1, status1);
4112 if (status1 & (DPR|RMA|RTA))
4113 aic_outb(p, CLRPARERR, CLRINT);
4114
4115 if ( (aic7xxx_panic_on_abort) && (p->spurious_int > 500) )
4116 aic7xxx_panic_abort(p, NULL);
4117
4118 }
4119 #endif /* CONFIG_PCI */
4120
4121 /*+F*************************************************************************
4122 * Function:
4123 * aic7xxx_timer
4124 *
4125 * Description:
4126 * Take expired extries off of delayed queues and place on waiting queue
4127 * then run waiting queue to start commands.
4128 ***************************************************************************/
4129 static void
4130 aic7xxx_timer(struct aic7xxx_host *p)
4131 {
4132 int i, j;
4133 unsigned long cpu_flags = 0;
4134 struct aic7xxx_scb *scb;
4135
4136 spin_lock_irqsave(&io_request_lock, cpu_flags);
4137 p->dev_timer_active &= ~(0x01 << MAX_TARGETS);
4138 if ( (p->dev_timer_active & (0x01 << p->scsi_id)) &&
4139 time_after_eq(jiffies, p->dev_expires[p->scsi_id]) )
4140 {
4141 p->flags &= ~AHC_RESET_DELAY;
4142 p->dev_timer_active &= ~(0x01 << p->scsi_id);
4143 }
4144 for(i=0; i<MAX_TARGETS; i++)
4145 {
4146 if ( (i != p->scsi_id) &&
4147 (p->dev_timer_active & (0x01 << i)) &&
4148 time_after_eq(jiffies, p->dev_expires[i]) )
4149 {
4150 p->dev_timer_active &= ~(0x01 << i);
4151 p->dev_flags[i] &= ~(DEVICE_RESET_DELAY|DEVICE_WAS_BUSY);
4152 p->dev_temp_queue_depth[i] = p->dev_max_queue_depth[i];
4153 j = 0;
4154 while ( ((scb = scbq_remove_head(&p->delayed_scbs[i])) != NULL) &&
4155 (j++ < p->scb_data->numscbs) )
4156 {
4157 scbq_insert_tail(&p->waiting_scbs, scb);
4158 }
4159 if (j == p->scb_data->numscbs)
4160 {
4161 printk(INFO_LEAD "timer: Yikes, loop in delayed_scbs list.\n",
4162 p->host_no, 0, i, -1);
4163 scbq_init(&p->delayed_scbs[i]);
4164 scbq_init(&p->waiting_scbs);
4165 /*
4166 * Well, things are screwed now, wait for a reset to clean the junk
4167 * out.
4168 */
4169 }
4170 }
4171 else if ( p->dev_timer_active & (0x01 << i) )
4172 {
4173 if ( p->dev_timer_active & (0x01 << MAX_TARGETS) )
4174 {
4175 if ( time_after_eq(p->dev_timer.expires, p->dev_expires[i]) )
4176 {
4177 p->dev_timer.expires = p->dev_expires[i];
4178 }
4179 }
4180 else
4181 {
4182 p->dev_timer.expires = p->dev_expires[i];
4183 p->dev_timer_active |= (0x01 << MAX_TARGETS);
4184 }
4185 }
4186 }
4187 if ( p->dev_timer_active & (0x01 << MAX_TARGETS) )
4188 {
4189 add_timer(&p->dev_timer);
4190 }
4191
4192 aic7xxx_run_waiting_queues(p);
4193 spin_unlock_irqrestore(&io_request_lock, cpu_flags);
4194 }
4195
4196 /*+F*************************************************************************
4197 * Function:
4198 * aic7xxx_construct_ppr
4199 *
4200 * Description:
4201 * Build up a Parallel Protocol Request message for use with SCSI-3
4202 * devices.
4203 *-F*************************************************************************/
4204 static void
4205 aic7xxx_construct_ppr(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
4206 {
4207 int tindex = TARGET_INDEX(scb->cmd);
4208
4209 p->msg_buf[p->msg_index++] = MSG_EXTENDED;
4210 p->msg_buf[p->msg_index++] = MSG_EXT_PPR_LEN;
4211 p->msg_buf[p->msg_index++] = MSG_EXT_PPR;
4212 p->msg_buf[p->msg_index++] = p->transinfo[tindex].goal_period;
4213 p->msg_buf[p->msg_index++] = 0;
4214 p->msg_buf[p->msg_index++] = p->transinfo[tindex].goal_offset;
4215 p->msg_buf[p->msg_index++] = p->transinfo[tindex].goal_width;
4216 p->msg_buf[p->msg_index++] = p->transinfo[tindex].goal_options;
4217 p->msg_len += 8;
4218 }
4219
4220 /*+F*************************************************************************
4221 * Function:
4222 * aic7xxx_construct_sdtr
4223 *
4224 * Description:
4225 * Constucts a synchronous data transfer message in the message
4226 * buffer on the sequencer.
4227 *-F*************************************************************************/
4228 static void
4229 aic7xxx_construct_sdtr(struct aic7xxx_host *p, unsigned char period,
4230 unsigned char offset)
4231 {
4232 p->msg_buf[p->msg_index++] = MSG_EXTENDED;
4233 p->msg_buf[p->msg_index++] = MSG_EXT_SDTR_LEN;
4234 p->msg_buf[p->msg_index++] = MSG_EXT_SDTR;
4235 p->msg_buf[p->msg_index++] = period;
4236 p->msg_buf[p->msg_index++] = offset;
4237 p->msg_len += 5;
4238 }
4239
4240 /*+F*************************************************************************
4241 * Function:
4242 * aic7xxx_construct_wdtr
4243 *
4244 * Description:
4245 * Constucts a wide data transfer message in the message buffer
4246 * on the sequencer.
4247 *-F*************************************************************************/
4248 static void
4249 aic7xxx_construct_wdtr(struct aic7xxx_host *p, unsigned char bus_width)
4250 {
4251 p->msg_buf[p->msg_index++] = MSG_EXTENDED;
4252 p->msg_buf[p->msg_index++] = MSG_EXT_WDTR_LEN;
4253 p->msg_buf[p->msg_index++] = MSG_EXT_WDTR;
4254 p->msg_buf[p->msg_index++] = bus_width;
4255 p->msg_len += 4;
4256 }
4257
4258 /*+F*************************************************************************
4259 * Function:
4260 * aic7xxx_calc_residual
4261 *
4262 * Description:
4263 * Calculate the residual data not yet transferred.
4264 *-F*************************************************************************/
4265 static void
4266 aic7xxx_calculate_residual (struct aic7xxx_host *p, struct aic7xxx_scb *scb)
4267 {
4268 struct aic7xxx_hwscb *hscb;
4269 Scsi_Cmnd *cmd;
4270 int actual, i;
4271
4272 cmd = scb->cmd;
4273 hscb = scb->hscb;
4274
4275 /*
4276 * Don't destroy valid residual information with
4277 * residual coming from a check sense operation.
4278 */
4279 if (((scb->hscb->control & DISCONNECTED) == 0) &&
4280 (scb->flags & SCB_SENSE) == 0)
4281 {
4282 /*
4283 * We had an underflow. At this time, there's only
4284 * one other driver that bothers to check for this,
4285 * and cmd->underflow seems to be set rather half-
4286 * heartedly in the higher-level SCSI code.
4287 */
4288 actual = scb->sg_length;
4289 for (i=1; i < hscb->residual_SG_segment_count; i++)
4290 {
4291 actual -= scb->sg_list[scb->sg_count - i].length;
4292 }
4293 actual -= (hscb->residual_data_count[2] << 16) |
4294 (hscb->residual_data_count[1] << 8) |
4295 hscb->residual_data_count[0];
4296
4297 if (actual < cmd->underflow)
4298 {
4299 if (aic7xxx_verbose & VERBOSE_MINOR_ERROR)
4300 {
4301 printk(INFO_LEAD "Underflow - Wanted %u, %s %u, residual SG "
4302 "count %d.\n", p->host_no, CTL_OF_SCB(scb), cmd->underflow,
4303 (cmd->request.cmd == WRITE) ? "wrote" : "read", actual,
4304 hscb->residual_SG_segment_count);
4305 printk(INFO_LEAD "status 0x%x.\n", p->host_no, CTL_OF_SCB(scb),
4306 hscb->target_status);
4307 }
4308 /*
4309 * In 2.4, only send back the residual information, don't flag this
4310 * as an error. Before 2.4 we had to flag this as an error because
4311 * the mid layer didn't check residual data counts to see if the
4312 * command needs retried.
4313 */
4314 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0)
4315 cmd->resid = scb->sg_length - actual;
4316 #else
4317 aic7xxx_error(cmd) = DID_RETRY_COMMAND;
4318 #endif
4319 aic7xxx_status(cmd) = hscb->target_status;
4320 }
4321 }
4322
4323 /*
4324 * Clean out the residual information in the SCB for the
4325 * next consumer.
4326 */
4327 hscb->residual_data_count[2] = 0;
4328 hscb->residual_data_count[1] = 0;
4329 hscb->residual_data_count[0] = 0;
4330 hscb->residual_SG_segment_count = 0;
4331 }
4332
4333 /*+F*************************************************************************
4334 * Function:
4335 * aic7xxx_handle_device_reset
4336 *
4337 * Description:
4338 * Interrupt handler for sequencer interrupts (SEQINT).
4339 *-F*************************************************************************/
4340 static void
4341 aic7xxx_handle_device_reset(struct aic7xxx_host *p, int target, int channel)
4342 {
4343 unsigned short targ_mask;
4344 unsigned char tindex = target;
4345
4346 tindex |= ((channel & 0x01) << 3);
4347
4348 targ_mask = (0x01 << tindex);
4349 /*
4350 * Go back to async/narrow transfers and renegotiate.
4351 */
4352 p->needppr |= (p->needppr_copy & targ_mask);
4353 p->needsdtr |= (p->needsdtr_copy & targ_mask);
4354 p->needwdtr |= (p->needwdtr_copy & targ_mask);
4355 p->dtr_pending &= ~targ_mask;
4356 aic_outb(p, 0, TARG_SCSIRATE + tindex);
4357 if (p->features & AHC_ULTRA2)
4358 aic_outb(p, 0, TARG_OFFSET + tindex);
4359 aic7xxx_reset_device(p, target, channel, ALL_LUNS, SCB_LIST_NULL);
4360 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
4361 printk(INFO_LEAD "Bus Device Reset delivered.\n", p->host_no, channel,
4362 target, -1);
4363 aic7xxx_run_done_queue(p, /*complete*/ TRUE);
4364 }
4365
4366 /*+F*************************************************************************
4367 * Function:
4368 * aic7xxx_handle_seqint
4369 *
4370 * Description:
4371 * Interrupt handler for sequencer interrupts (SEQINT).
4372 *-F*************************************************************************/
4373 static void
4374 aic7xxx_handle_seqint(struct aic7xxx_host *p, unsigned char intstat)
4375 {
4376 struct aic7xxx_scb *scb;
4377 unsigned short target_mask;
4378 unsigned char target, lun, tindex;
4379 unsigned char queue_flag = FALSE;
4380 char channel;
4381
4382 target = ((aic_inb(p, SAVED_TCL) >> 4) & 0x0f);
4383 if ( (p->chip & AHC_CHIPID_MASK) == AHC_AIC7770 )
4384 channel = (aic_inb(p, SBLKCTL) & SELBUSB) >> 3;
4385 else
4386 channel = 0;
4387 tindex = target + (channel << 3);
4388 lun = aic_inb(p, SAVED_TCL) & 0x07;
4389 target_mask = (0x01 << tindex);
4390
4391 /*
4392 * Go ahead and clear the SEQINT now, that avoids any interrupt race
4393 * conditions later on in case we enable some other interrupt.
4394 */
4395 aic_outb(p, CLRSEQINT, CLRINT);
4396 switch (intstat & SEQINT_MASK)
4397 {
4398 case NO_MATCH:
4399 {
4400 aic_outb(p, aic_inb(p, SCSISEQ) & (ENSELI|ENRSELI|ENAUTOATNP),
4401 SCSISEQ);
4402 printk(WARN_LEAD "No active SCB for reconnecting target - Issuing "
4403 "BUS DEVICE RESET.\n", p->host_no, channel, target, lun);
4404 printk(WARN_LEAD " SAVED_TCL=0x%x, ARG_1=0x%x, SEQADDR=0x%x\n",
4405 p->host_no, channel, target, lun,
4406 aic_inb(p, SAVED_TCL), aic_inb(p, ARG_1),
4407 (aic_inb(p, SEQADDR1) << 8) | aic_inb(p, SEQADDR0));
4408 if (aic7xxx_panic_on_abort)
4409 aic7xxx_panic_abort(p, NULL);
4410 }
4411 break;
4412
4413 case SEND_REJECT:
4414 {
4415 if (aic7xxx_verbose & VERBOSE_MINOR_ERROR)
4416 printk(INFO_LEAD "Rejecting unknown message (0x%x) received from "
4417 "target, SEQ_FLAGS=0x%x\n", p->host_no, channel, target, lun,
4418 aic_inb(p, ACCUM), aic_inb(p, SEQ_FLAGS));
4419 }
4420 break;
4421
4422 case NO_IDENT:
4423 {
4424 /*
4425 * The reconnecting target either did not send an identify
4426 * message, or did, but we didn't find an SCB to match and
4427 * before it could respond to our ATN/abort, it hit a dataphase.
4428 * The only safe thing to do is to blow it away with a bus
4429 * reset.
4430 */
4431 if (aic7xxx_verbose & (VERBOSE_SEQINT | VERBOSE_RESET_MID))
4432 printk(INFO_LEAD "Target did not send an IDENTIFY message; "
4433 "LASTPHASE 0x%x, SAVED_TCL 0x%x\n", p->host_no, channel, target,
4434 lun, aic_inb(p, LASTPHASE), aic_inb(p, SAVED_TCL));
4435
4436 aic7xxx_reset_channel(p, channel, /*initiate reset*/ TRUE);
4437 aic7xxx_run_done_queue(p, TRUE);
4438
4439 }
4440 break;
4441
4442 case BAD_PHASE:
4443 if (aic_inb(p, LASTPHASE) == P_BUSFREE)
4444 {
4445 if (aic7xxx_verbose & VERBOSE_SEQINT)
4446 printk(INFO_LEAD "Missed busfree.\n", p->host_no, channel,
4447 target, lun);
4448 restart_sequencer(p);
4449 }
4450 else
4451 {
4452 if (aic7xxx_verbose & VERBOSE_SEQINT)
4453 printk(INFO_LEAD "Unknown scsi bus phase, continuing\n", p->host_no,
4454 channel, target, lun);
4455 }
4456 break;
4457
4458 case EXTENDED_MSG:
4459 {
4460 p->msg_type = MSG_TYPE_INITIATOR_MSGIN;
4461 p->msg_len = 0;
4462 p->msg_index = 0;
4463
4464 #ifdef AIC7XXX_VERBOSE_DEBUGGING
4465 if (aic7xxx_verbose > 0xffff)
4466 printk(INFO_LEAD "Enabling REQINITs for MSG_IN\n", p->host_no,
4467 channel, target, lun);
4468 #endif
4469
4470 /*
4471 * To actually receive the message, simply turn on
4472 * REQINIT interrupts and let our interrupt handler
4473 * do the rest (REQINIT should already be true).
4474 */
4475 p->flags |= AHC_HANDLING_REQINITS;
4476 aic_outb(p, aic_inb(p, SIMODE1) | ENREQINIT, SIMODE1);
4477
4478 /*
4479 * We don't want the sequencer unpaused yet so we return early
4480 */
4481 return;
4482 }
4483
4484 case REJECT_MSG:
4485 {
4486 /*
4487 * What we care about here is if we had an outstanding SDTR
4488 * or WDTR message for this target. If we did, this is a
4489 * signal that the target is refusing negotiation.
4490 */
4491 unsigned char scb_index;
4492 unsigned char last_msg;
4493
4494 scb_index = aic_inb(p, SCB_TAG);
4495 scb = p->scb_data->scb_array[scb_index];
4496 last_msg = aic_inb(p, LAST_MSG);
4497
4498 if ( (last_msg == MSG_IDENTIFYFLAG) &&
4499 (scb->tag_action) &&
4500 !(scb->flags & SCB_MSGOUT_BITS) )
4501 {
4502 if (scb->tag_action == MSG_ORDERED_Q_TAG)
4503 {
4504 /*
4505 * OK...the device seems able to accept tagged commands, but
4506 * not ordered tag commands, only simple tag commands. So, we
4507 * disable ordered tag commands and go on with life just like
4508 * normal.
4509 */
4510 p->orderedtag &= ~target_mask;
4511 scb->tag_action = MSG_SIMPLE_Q_TAG;
4512 scb->hscb->control &= ~SCB_TAG_TYPE;
4513 scb->hscb->control |= MSG_SIMPLE_Q_TAG;
4514 aic_outb(p, scb->hscb->control, SCB_CONTROL);
4515 /*
4516 * OK..we set the tag type to simple tag command, now we re-assert
4517 * ATNO and hope this will take us into the identify phase again
4518 * so we can resend the tag type and info to the device.
4519 */
4520 aic_outb(p, MSG_IDENTIFYFLAG, MSG_OUT);
4521 aic_outb(p, aic_inb(p, SCSISIGI) | ATNO, SCSISIGO);
4522 }
4523 else if (scb->tag_action == MSG_SIMPLE_Q_TAG)
4524 {
4525 unsigned char i, reset = 0;
4526 struct aic7xxx_scb *scbp;
4527 int old_verbose;
4528 /*
4529 * Hmmmm....the device is flaking out on tagged commands. The
4530 * bad thing is that we already have tagged commands enabled in
4531 * the device struct in the mid level code. We also have a queue
4532 * set according to the tagged queue depth. Gonna have to live
4533 * with it by controlling our queue depth internally and making
4534 * sure we don't set the tagged command flag any more.
4535 */
4536 p->tagenable &= ~target_mask;
4537 p->orderedtag &= ~target_mask;
4538 p->dev_max_queue_depth[tindex] =
4539 p->dev_temp_queue_depth[tindex] = 1;
4540 /*
4541 * We set this command up as a bus device reset. However, we have
4542 * to clear the tag type as it's causing us problems. We shouldnt
4543 * have to worry about any other commands being active, since if
4544 * the device is refusing tagged commands, this should be the
4545 * first tagged command sent to the device, however, we do have
4546 * to worry about any other tagged commands that may already be
4547 * in the qinfifo. The easiest way to do this, is to issue a BDR,
4548 * send all the commands back to the mid level code, then let them
4549 * come back and get rebuilt as untagged commands.
4550 */
4551 scb->tag_action = 0;
4552 scb->hscb->control &= ~(TAG_ENB | SCB_TAG_TYPE);
4553 aic_outb(p, scb->hscb->control, SCB_CONTROL);
4554
4555 old_verbose = aic7xxx_verbose;
4556 aic7xxx_verbose &= ~(VERBOSE_RESET|VERBOSE_ABORT);
4557 for (i=0; i!=p->scb_data->numscbs; i++)
4558 {
4559 scbp = p->scb_data->scb_array[i];
4560 if ((scbp->flags & SCB_ACTIVE) && (scbp != scb))
4561 {
4562 if (aic7xxx_match_scb(p, scbp, target, channel, lun, i))
4563 {
4564 aic7xxx_reset_device(p, target, channel, lun, i);
4565 reset++;
4566 }
4567 aic7xxx_run_done_queue(p, TRUE);
4568 }
4569 }
4570 aic7xxx_verbose = old_verbose;
4571 /*
4572 * Wait until after the for loop to set the busy index since
4573 * aic7xxx_reset_device will clear the busy index during its
4574 * operation.
4575 */
4576 aic7xxx_busy_target(p, scb);
4577 printk(INFO_LEAD "Device is refusing tagged commands, using "
4578 "untagged I/O.\n", p->host_no, channel, target, lun);
4579 aic_outb(p, MSG_IDENTIFYFLAG, MSG_OUT);
4580 aic_outb(p, aic_inb(p, SCSISIGI) | ATNO, SCSISIGO);
4581 }
4582 }
4583 else if (scb->flags & SCB_MSGOUT_PPR)
4584 {
4585 /*
4586 * As per the draft specs, any device capable of supporting any of
4587 * the option values other than 0 are not allowed to reject the
4588 * PPR message. Instead, they must negotiate out what they do
4589 * support instead of rejecting our offering or else they cause
4590 * a parity error during msg_out phase to signal that they don't
4591 * like our settings.
4592 */
4593 p->needppr &= ~target_mask;
4594 p->needppr_copy &= ~target_mask;
4595 aic7xxx_set_width(p, target, channel, lun, MSG_EXT_WDTR_BUS_8_BIT,
4596 (AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE));
4597 aic7xxx_set_syncrate(p, NULL, target, channel, 0, 0, 0,
4598 AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE);
4599 p->transinfo[tindex].goal_options = 0;
4600 p->dtr_pending &= ~target_mask;
4601 scb->flags &= ~SCB_MSGOUT_BITS;
4602 if(aic7xxx_verbose & VERBOSE_NEGOTIATION2)
4603 {
4604 printk(INFO_LEAD "Device is rejecting PPR messages, falling "
4605 "back.\n", p->host_no, channel, target, lun);
4606 }
4607 if ( p->transinfo[tindex].goal_width )
4608 {
4609 p->needwdtr |= target_mask;
4610 p->needwdtr_copy |= target_mask;
4611 p->dtr_pending |= target_mask;
4612 scb->flags |= SCB_MSGOUT_WDTR;
4613 }
4614 if ( p->transinfo[tindex].goal_offset )
4615 {
4616 p->needsdtr |= target_mask;
4617 p->needsdtr_copy |= target_mask;
4618 if( !(p->dtr_pending & target_mask) )
4619 {
4620 p->dtr_pending |= target_mask;
4621 scb->flags |= SCB_MSGOUT_SDTR;
4622 }
4623 }
4624 if ( p->dtr_pending & target_mask )
4625 {
4626 aic_outb(p, HOST_MSG, MSG_OUT);
4627 aic_outb(p, aic_inb(p, SCSISIGI) | ATNO, SCSISIGO);
4628 }
4629 }
4630 else if (scb->flags & SCB_MSGOUT_WDTR)
4631 {
4632 /*
4633 * note 8bit xfers and clear flag
4634 */
4635 p->needwdtr &= ~target_mask;
4636 p->needwdtr_copy &= ~target_mask;
4637 scb->flags &= ~SCB_MSGOUT_BITS;
4638 aic7xxx_set_width(p, target, channel, lun, MSG_EXT_WDTR_BUS_8_BIT,
4639 (AHC_TRANS_ACTIVE|AHC_TRANS_GOAL|AHC_TRANS_CUR));
4640 aic7xxx_set_syncrate(p, NULL, target, channel, 0, 0, 0,
4641 AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE);
4642 if(aic7xxx_verbose & VERBOSE_NEGOTIATION2)
4643 {
4644 printk(INFO_LEAD "Device is rejecting WDTR messages, using "
4645 "narrow transfers.\n", p->host_no, channel, target, lun);
4646 }
4647 p->needsdtr |= (p->needsdtr_copy & target_mask);
4648 }
4649 else if (scb->flags & SCB_MSGOUT_SDTR)
4650 {
4651 /*
4652 * note asynch xfers and clear flag
4653 */
4654 p->needsdtr &= ~target_mask;
4655 p->needsdtr_copy &= ~target_mask;
4656 scb->flags &= ~SCB_MSGOUT_BITS;
4657 aic7xxx_set_syncrate(p, NULL, target, channel, 0, 0, 0,
4658 (AHC_TRANS_CUR|AHC_TRANS_ACTIVE|AHC_TRANS_GOAL));
4659 if(aic7xxx_verbose & VERBOSE_NEGOTIATION2)
4660 {
4661 printk(INFO_LEAD "Device is rejecting SDTR messages, using "
4662 "async transfers.\n", p->host_no, channel, target, lun);
4663 }
4664 }
4665 else if (aic7xxx_verbose & VERBOSE_SEQINT)
4666 {
4667 /*
4668 * Otherwise, we ignore it.
4669 */
4670 printk(INFO_LEAD "Received MESSAGE_REJECT for unknown cause. "
4671 "Ignoring.\n", p->host_no, channel, target, lun);
4672 }
4673 }
4674 break;
4675
4676 case BAD_STATUS:
4677 {
4678 unsigned char scb_index;
4679 struct aic7xxx_hwscb *hscb;
4680 Scsi_Cmnd *cmd;
4681
4682 /* The sequencer will notify us when a command has an error that
4683 * would be of interest to the kernel. This allows us to leave
4684 * the sequencer running in the common case of command completes
4685 * without error. The sequencer will have DMA'd the SCB back
4686 * up to us, so we can reference the drivers SCB array.
4687 *
4688 * Set the default return value to 0 indicating not to send
4689 * sense. The sense code will change this if needed and this
4690 * reduces code duplication.
4691 */
4692 aic_outb(p, 0, RETURN_1);
4693 scb_index = aic_inb(p, SCB_TAG);
4694 if (scb_index > p->scb_data->numscbs)
4695 {
4696 printk(WARN_LEAD "Invalid SCB during SEQINT 0x%02x, SCB_TAG %d.\n",
4697 p->host_no, channel, target, lun, intstat, scb_index);
4698 break;
4699 }
4700 scb = p->scb_data->scb_array[scb_index];
4701 hscb = scb->hscb;
4702
4703 if (!(scb->flags & SCB_ACTIVE) || (scb->cmd == NULL))
4704 {
4705 printk(WARN_LEAD "Invalid SCB during SEQINT 0x%x, scb %d, flags 0x%x,"
4706 " cmd 0x%lx.\n", p->host_no, channel, target, lun, intstat,
4707 scb_index, scb->flags, (unsigned long) scb->cmd);
4708 }
4709 else
4710 {
4711 cmd = scb->cmd;
4712 hscb->target_status = aic_inb(p, SCB_TARGET_STATUS);
4713 aic7xxx_status(cmd) = hscb->target_status;
4714
4715 cmd->result = hscb->target_status;
4716
4717 switch (status_byte(hscb->target_status))
4718 {
4719 case GOOD:
4720 if (aic7xxx_verbose & VERBOSE_SEQINT)
4721 printk(INFO_LEAD "Interrupted for status of GOOD???\n",
4722 p->host_no, CTL_OF_SCB(scb));
4723 break;
4724
4725 case COMMAND_TERMINATED:
4726 case CHECK_CONDITION:
4727 if ( !(scb->flags & SCB_SENSE) )
4728 {
4729 /*
4730 * Send a sense command to the requesting target.
4731 * XXX - revisit this and get rid of the memcopys.
4732 */
4733 memcpy(scb->sense_cmd, &generic_sense[0],
4734 sizeof(generic_sense));
4735
4736 scb->sense_cmd[1] = (cmd->lun << 5);
4737 scb->sense_cmd[4] = sizeof(cmd->sense_buffer);
4738
4739 scb->sg_list[0].length =
4740 cpu_to_le32(sizeof(cmd->sense_buffer));
4741 scb->sg_list[0].address =
4742 cpu_to_le32(pci_map_single(p->pdev, cmd->sense_buffer,
4743 sizeof(cmd->sense_buffer),
4744 PCI_DMA_FROMDEVICE));
4745
4746 /*
4747 * XXX - We should allow disconnection, but can't as it
4748 * might allow overlapped tagged commands.
4749 */
4750 /* hscb->control &= DISCENB; */
4751 hscb->control = 0;
4752 hscb->target_status = 0;
4753 hscb->SG_list_pointer =
4754 cpu_to_le32(SCB_DMA_ADDR(scb, scb->sg_list));
4755 hscb->SCSI_cmd_pointer =
4756 cpu_to_le32(SCB_DMA_ADDR(scb, scb->sense_cmd));
4757 hscb->data_count = scb->sg_list[0].length;
4758 hscb->data_pointer = scb->sg_list[0].address;
4759 hscb->SCSI_cmd_length = COMMAND_SIZE(scb->sense_cmd[0]);
4760 hscb->residual_SG_segment_count = 0;
4761 hscb->residual_data_count[0] = 0;
4762 hscb->residual_data_count[1] = 0;
4763 hscb->residual_data_count[2] = 0;
4764
4765 scb->sg_count = hscb->SG_segment_count = 1;
4766 scb->sg_length = sizeof(cmd->sense_buffer);
4767 scb->tag_action = 0;
4768 scb->flags |= SCB_SENSE;
4769 /*
4770 * Ensure the target is busy since this will be an
4771 * an untagged request.
4772 */
4773 #ifdef AIC7XXX_VERBOSE_DEBUGGING
4774 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
4775 {
4776 if (scb->flags & SCB_MSGOUT_BITS)
4777 printk(INFO_LEAD "Requesting SENSE with %s\n", p->host_no,
4778 CTL_OF_SCB(scb), (scb->flags & SCB_MSGOUT_SDTR) ?
4779 "SDTR" : "WDTR");
4780 else
4781 printk(INFO_LEAD "Requesting SENSE, no MSG\n", p->host_no,
4782 CTL_OF_SCB(scb));
4783 }
4784 #endif
4785 aic7xxx_busy_target(p, scb);
4786 aic_outb(p, SEND_SENSE, RETURN_1);
4787 aic7xxx_error(cmd) = DID_OK;
4788 break;
4789 } /* first time sense, no errors */
4790 printk(INFO_LEAD "CHECK_CONDITION on REQUEST_SENSE, returning "
4791 "an error.\n", p->host_no, CTL_OF_SCB(scb));
4792 aic7xxx_error(cmd) = DID_ERROR;
4793 scb->flags &= ~SCB_SENSE;
4794 break;
4795
4796 case QUEUE_FULL:
4797 queue_flag = TRUE; /* Mark that this is a QUEUE_FULL and */
4798 case BUSY: /* drop through to here */
4799 {
4800 struct aic7xxx_scb *next_scbp, *prev_scbp;
4801 unsigned char active_hscb, next_hscb, prev_hscb, scb_index;
4802 /*
4803 * We have to look three places for queued commands:
4804 * 1: QINFIFO
4805 * 2: p->waiting_scbs queue
4806 * 3: WAITING_SCBS list on card (for commands that are started
4807 * but haven't yet made it to the device)
4808 */
4809 aic7xxx_search_qinfifo(p, target, channel, lun,
4810 SCB_LIST_NULL, 0, TRUE,
4811 &p->delayed_scbs[tindex]);
4812 next_scbp = p->waiting_scbs.head;
4813 while ( next_scbp != NULL )
4814 {
4815 prev_scbp = next_scbp;
4816 next_scbp = next_scbp->q_next;
4817 if ( aic7xxx_match_scb(p, prev_scbp, target, channel, lun,
4818 SCB_LIST_NULL) )
4819 {
4820 scbq_remove(&p->waiting_scbs, prev_scbp);
4821 scbq_insert_tail(&p->delayed_scbs[tindex],
4822 prev_scbp);
4823 }
4824 }
4825 next_scbp = NULL;
4826 active_hscb = aic_inb(p, SCBPTR);
4827 prev_hscb = next_hscb = scb_index = SCB_LIST_NULL;
4828 next_hscb = aic_inb(p, WAITING_SCBH);
4829 while (next_hscb != SCB_LIST_NULL)
4830 {
4831 aic_outb(p, next_hscb, SCBPTR);
4832 scb_index = aic_inb(p, SCB_TAG);
4833 if (scb_index < p->scb_data->numscbs)
4834 {
4835 next_scbp = p->scb_data->scb_array[scb_index];
4836 if (aic7xxx_match_scb(p, next_scbp, target, channel, lun,
4837 SCB_LIST_NULL) )
4838 {
4839 if (next_scbp->flags & SCB_WAITINGQ)
4840 {
4841 p->dev_active_cmds[tindex]++;
4842 p->activescbs--;
4843 scbq_remove(&p->delayed_scbs[tindex], next_scbp);
4844 scbq_remove(&p->waiting_scbs, next_scbp);
4845 }
4846 scbq_insert_head(&p->delayed_scbs[tindex],
4847 next_scbp);
4848 next_scbp->flags |= SCB_WAITINGQ;
4849 p->dev_active_cmds[tindex]--;
4850 p->activescbs--;
4851 next_hscb = aic_inb(p, SCB_NEXT);
4852 aic_outb(p, 0, SCB_CONTROL);
4853 aic_outb(p, SCB_LIST_NULL, SCB_TAG);
4854 aic7xxx_add_curscb_to_free_list(p);
4855 if (prev_hscb == SCB_LIST_NULL)
4856 {
4857 /* We were first on the list,
4858 * so we kill the selection
4859 * hardware. Let the sequencer
4860 * re-init the hardware itself
4861 */
4862 aic_outb(p, aic_inb(p, SCSISEQ) & ~ENSELO, SCSISEQ);
4863 aic_outb(p, CLRSELTIMEO, CLRSINT1);
4864 aic_outb(p, next_hscb, WAITING_SCBH);
4865 }
4866 else
4867 {
4868 aic_outb(p, prev_hscb, SCBPTR);
4869 aic_outb(p, next_hscb, SCB_NEXT);
4870 }
4871 }
4872 else
4873 {
4874 prev_hscb = next_hscb;
4875 next_hscb = aic_inb(p, SCB_NEXT);
4876 }
4877 } /* scb_index >= p->scb_data->numscbs */
4878 }
4879 aic_outb(p, active_hscb, SCBPTR);
4880 if (scb->flags & SCB_WAITINGQ)
4881 {
4882 scbq_remove(&p->delayed_scbs[tindex], scb);
4883 scbq_remove(&p->waiting_scbs, scb);
4884 p->dev_active_cmds[tindex]++;
4885 p->activescbs++;
4886 }
4887 scbq_insert_head(&p->delayed_scbs[tindex], scb);
4888 p->dev_active_cmds[tindex]--;
4889 p->activescbs--;
4890 scb->flags |= SCB_WAITINGQ | SCB_WAS_BUSY;
4891
4892 if ( !(p->dev_timer_active & (0x01 << tindex)) )
4893 {
4894 p->dev_timer_active |= (0x01 << tindex);
4895 if ( p->dev_active_cmds[tindex] )
4896 {
4897 p->dev_expires[tindex] = jiffies + HZ;
4898 }
4899 else
4900 {
4901 p->dev_expires[tindex] = jiffies + (HZ / 10);
4902 }
4903 if ( !(p->dev_timer_active & (0x01 << MAX_TARGETS)) )
4904 {
4905 p->dev_timer.expires = p->dev_expires[tindex];
4906 p->dev_timer_active |= (0x01 << MAX_TARGETS);
4907 add_timer(&p->dev_timer);
4908 }
4909 else if ( time_after_eq(p->dev_timer.expires,
4910 p->dev_expires[tindex]) )
4911 mod_timer(&p->dev_timer, p->dev_expires[tindex]);
4912 }
4913 #ifdef AIC7XXX_VERBOSE_DEBUGGING
4914 if( (aic7xxx_verbose & VERBOSE_MINOR_ERROR) ||
4915 (aic7xxx_verbose > 0xffff) )
4916 {
4917 if (queue_flag)
4918 printk(INFO_LEAD "Queue full received; queue depth %d, "
4919 "active %d\n", p->host_no, CTL_OF_SCB(scb),
4920 p->dev_max_queue_depth[tindex],
4921 p->dev_active_cmds[tindex]);
4922 else
4923 printk(INFO_LEAD "Target busy\n", p->host_no, CTL_OF_SCB(scb));
4924
4925 }
4926 #endif
4927 if (queue_flag)
4928 {
4929 if ( p->dev_last_queue_full[tindex] !=
4930 p->dev_active_cmds[tindex] )
4931 {
4932 p->dev_last_queue_full[tindex] =
4933 p->dev_active_cmds[tindex];
4934 p->dev_last_queue_full_count[tindex] = 0;
4935 }
4936 else
4937 {
4938 p->dev_last_queue_full_count[tindex]++;
4939 }
4940 if ( (p->dev_last_queue_full_count[tindex] > 14) &&
4941 (p->dev_active_cmds[tindex] > 4) )
4942 {
4943 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
4944 printk(INFO_LEAD "Queue depth reduced to %d\n", p->host_no,
4945 CTL_OF_SCB(scb), p->dev_active_cmds[tindex]);
4946 p->dev_max_queue_depth[tindex] =
4947 p->dev_active_cmds[tindex];
4948 p->dev_last_queue_full[tindex] = 0;
4949 p->dev_last_queue_full_count[tindex] = 0;
4950 p->dev_temp_queue_depth[tindex] =
4951 p->dev_active_cmds[tindex];
4952 }
4953 else if (p->dev_active_cmds[tindex] == 0)
4954 {
4955 if (aic7xxx_verbose & VERBOSE_NEGOTIATION)
4956 {
4957 printk(INFO_LEAD "QUEUE_FULL status received with 0 "
4958 "commands active.\n", p->host_no, CTL_OF_SCB(scb));
4959 printk(INFO_LEAD "Tagged Command Queueing disabled\n",
4960 p->host_no, CTL_OF_SCB(scb));
4961 }
4962 p->dev_max_queue_depth[tindex] = 1;
4963 p->dev_temp_queue_depth[tindex] = 1;
4964 scb->tag_action = 0;
4965 scb->hscb->control &= ~(MSG_ORDERED_Q_TAG|MSG_SIMPLE_Q_TAG);
4966 }
4967 else
4968 {
4969 p->dev_flags[tindex] |= DEVICE_WAS_BUSY;
4970 p->dev_temp_queue_depth[tindex] =
4971 p->dev_active_cmds[tindex];
4972 }
4973 }
4974 break;
4975 }
4976
4977 default:
4978 if (aic7xxx_verbose & VERBOSE_SEQINT)
4979 printk(INFO_LEAD "Unexpected target status 0x%x.\n", p->host_no,
4980 CTL_OF_SCB(scb), scb->hscb->target_status);
4981 if (!aic7xxx_error(cmd))
4982 {
4983 aic7xxx_error(cmd) = DID_RETRY_COMMAND;
4984 }
4985 break;
4986 } /* end switch */
4987 } /* end else of */
4988 }
4989 break;
4990
4991 case AWAITING_MSG:
4992 {
4993 unsigned char scb_index, msg_out;
4994
4995 scb_index = aic_inb(p, SCB_TAG);
4996 msg_out = aic_inb(p, MSG_OUT);
4997 scb = p->scb_data->scb_array[scb_index];
4998 p->msg_index = p->msg_len = 0;
4999 /*
5000 * This SCB had a MK_MESSAGE set in its control byte informing
5001 * the sequencer that we wanted to send a special message to
5002 * this target.
5003 */
5004
5005 if ( !(scb->flags & SCB_DEVICE_RESET) &&
5006 (msg_out == MSG_IDENTIFYFLAG) &&
5007 (scb->hscb->control & TAG_ENB) )
5008 {
5009 p->msg_buf[p->msg_index++] = scb->tag_action;
5010 p->msg_buf[p->msg_index++] = scb->hscb->tag;
5011 p->msg_len += 2;
5012 }
5013
5014 if (scb->flags & SCB_DEVICE_RESET)
5015 {
5016 p->msg_buf[p->msg_index++] = MSG_BUS_DEV_RESET;
5017 p->msg_len++;
5018 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
5019 printk(INFO_LEAD "Bus device reset mailed.\n",
5020 p->host_no, CTL_OF_SCB(scb));
5021 }
5022 else if (scb->flags & SCB_ABORT)
5023 {
5024 if (scb->tag_action)
5025 {
5026 p->msg_buf[p->msg_index++] = MSG_ABORT_TAG;
5027 }
5028 else
5029 {
5030 p->msg_buf[p->msg_index++] = MSG_ABORT;
5031 }
5032 p->msg_len++;
5033 if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS)
5034 printk(INFO_LEAD "Abort message mailed.\n", p->host_no,
5035 CTL_OF_SCB(scb));
5036 }
5037 else if (scb->flags & SCB_MSGOUT_PPR)
5038 {
5039 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
5040 {
5041 printk(INFO_LEAD "Sending PPR (%d/%d/%d/%d) message.\n",
5042 p->host_no, CTL_OF_SCB(scb),
5043 p->transinfo[tindex].goal_period,
5044 p->transinfo[tindex].goal_offset,
5045 p->transinfo[tindex].goal_width,
5046 p->transinfo[tindex].goal_options);
5047 }
5048 aic7xxx_construct_ppr(p, scb);
5049 }
5050 else if (scb->flags & SCB_MSGOUT_WDTR)
5051 {
5052 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
5053 {
5054 printk(INFO_LEAD "Sending WDTR message.\n", p->host_no,
5055 CTL_OF_SCB(scb));
5056 }
5057 aic7xxx_construct_wdtr(p, p->transinfo[tindex].goal_width);
5058 }
5059 else if (scb->flags & SCB_MSGOUT_SDTR)
5060 {
5061 unsigned int max_sync, period;
5062 unsigned char options = 0;
5063 /*
5064 * Now that the device is selected, use the bits in SBLKCTL and
5065 * SSTAT2 to determine the max sync rate for this device.
5066 */
5067 if (p->features & AHC_ULTRA2)
5068 {
5069 if ( (aic_inb(p, SBLKCTL) & ENAB40) &&
5070 !(aic_inb(p, SSTAT2) & EXP_ACTIVE) )
5071 {
5072 max_sync = AHC_SYNCRATE_ULTRA2;
5073 }
5074 else
5075 {
5076 max_sync = AHC_SYNCRATE_ULTRA;
5077 }
5078 }
5079 else if (p->features & AHC_ULTRA)
5080 {
5081 max_sync = AHC_SYNCRATE_ULTRA;
5082 }
5083 else
5084 {
5085 max_sync = AHC_SYNCRATE_FAST;
5086 }
5087 period = p->transinfo[tindex].goal_period;
5088 aic7xxx_find_syncrate(p, &period, max_sync, &options);
5089 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
5090 {
5091 printk(INFO_LEAD "Sending SDTR %d/%d message.\n", p->host_no,
5092 CTL_OF_SCB(scb), period,
5093 p->transinfo[tindex].goal_offset);
5094 }
5095 aic7xxx_construct_sdtr(p, period,
5096 p->transinfo[tindex].goal_offset);
5097 }
5098 else
5099 {
5100 sti();
5101 panic("aic7xxx: AWAITING_MSG for an SCB that does "
5102 "not have a waiting message.\n");
5103 }
5104 /*
5105 * We've set everything up to send our message, now to actually do
5106 * so we need to enable reqinit interrupts and let the interrupt
5107 * handler do the rest. We don't want to unpause the sequencer yet
5108 * though so we'll return early. We also have to make sure that
5109 * we clear the SEQINT *BEFORE* we set the REQINIT handler active
5110 * or else it's possible on VLB cards to loose the first REQINIT
5111 * interrupt. Edge triggered EISA cards could also loose this
5112 * interrupt, although PCI and level triggered cards should not
5113 * have this problem since they continually interrupt the kernel
5114 * until we take care of the situation.
5115 */
5116 scb->flags |= SCB_MSGOUT_SENT;
5117 p->msg_index = 0;
5118 p->msg_type = MSG_TYPE_INITIATOR_MSGOUT;
5119 p->flags |= AHC_HANDLING_REQINITS;
5120 aic_outb(p, aic_inb(p, SIMODE1) | ENREQINIT, SIMODE1);
5121 return;
5122 }
5123 break;
5124
5125 case DATA_OVERRUN:
5126 {
5127 unsigned char scb_index = aic_inb(p, SCB_TAG);
5128 unsigned char lastphase = aic_inb(p, LASTPHASE);
5129 unsigned int i;
5130
5131 scb = (p->scb_data->scb_array[scb_index]);
5132 /*
5133 * XXX - What do we really want to do on an overrun? The
5134 * mid-level SCSI code should handle this, but for now,
5135 * we'll just indicate that the command should retried.
5136 * If we retrieved sense info on this target, then the
5137 * base SENSE info should have been saved prior to the
5138 * overrun error. In that case, we return DID_OK and let
5139 * the mid level code pick up on the sense info. Otherwise
5140 * we return DID_ERROR so the command will get retried.
5141 */
5142 if ( !(scb->flags & SCB_SENSE) )
5143 {
5144 printk(WARN_LEAD "Data overrun detected in %s phase, tag %d;\n",
5145 p->host_no, CTL_OF_SCB(scb),
5146 (lastphase == P_DATAIN) ? "Data-In" : "Data-Out", scb->hscb->tag);
5147 printk(KERN_WARNING " %s seen Data Phase. Length=%d, NumSGs=%d.\n",
5148 (aic_inb(p, SEQ_FLAGS) & DPHASE) ? "Have" : "Haven't",
5149 scb->sg_length, scb->sg_count);
5150 printk(KERN_WARNING " Raw SCSI Command: 0x");
5151 for (i = 0; i < scb->hscb->SCSI_cmd_length; i++)
5152 {
5153 printk("%02x ", scb->cmd->cmnd[i]);
5154 }
5155 printk("\n");
5156 if(aic7xxx_verbose > 0xffff)
5157 {
5158 for (i = 0; i < scb->sg_count; i++)
5159 {
5160 printk(KERN_WARNING " sg[%d] - Addr 0x%x : Length %d\n",
5161 i,
5162 le32_to_cpu(scb->sg_list[i].address),
5163 le32_to_cpu(scb->sg_list[i].length) );
5164 }
5165 }
5166 aic7xxx_error(scb->cmd) = DID_ERROR;
5167 }
5168 else
5169 printk(INFO_LEAD "Data Overrun during SEND_SENSE operation.\n",
5170 p->host_no, CTL_OF_SCB(scb));
5171 }
5172 break;
5173
5174 case WIDE_RESIDUE:
5175 {
5176 unsigned char resid_sgcnt, index;
5177 unsigned char scb_index = aic_inb(p, SCB_TAG);
5178 unsigned int cur_addr, resid_dcnt;
5179 unsigned int native_addr, native_length, sg_addr;
5180 int i;
5181
5182 if(scb_index > p->scb_data->numscbs)
5183 {
5184 printk(WARN_LEAD "invalid scb_index during WIDE_RESIDUE.\n",
5185 p->host_no, -1, -1, -1);
5186 /*
5187 * XXX: Add error handling here
5188 */
5189 break;
5190 }
5191 scb = p->scb_data->scb_array[scb_index];
5192 if(!(scb->flags & SCB_ACTIVE) || (scb->cmd == NULL))
5193 {
5194 printk(WARN_LEAD "invalid scb during WIDE_RESIDUE flags:0x%x "
5195 "scb->cmd:0x%lx\n", p->host_no, CTL_OF_SCB(scb),
5196 scb->flags, (unsigned long)scb->cmd);
5197 break;
5198 }
5199 if(aic7xxx_verbose & VERBOSE_MINOR_ERROR)
5200 printk(INFO_LEAD "Got WIDE_RESIDUE message, patching up data "
5201 "pointer.\n", p->host_no, CTL_OF_SCB(scb));
5202
5203 /*
5204 * We have a valid scb to use on this WIDE_RESIDUE message, so
5205 * we need to walk the sg list looking for this particular sg
5206 * segment, then see if we happen to be at the very beginning of
5207 * the segment. If we are, then we have to back things up to
5208 * the previous segment. If not, then we simply need to remove
5209 * one byte from this segments address and add one to the byte
5210 * count.
5211 */
5212 cur_addr = aic_inb(p, SHADDR) | (aic_inb(p, SHADDR + 1) << 8) |
5213 (aic_inb(p, SHADDR + 2) << 16) | (aic_inb(p, SHADDR + 3) << 24);
5214 sg_addr = aic_inb(p, SG_COUNT + 1) | (aic_inb(p, SG_COUNT + 2) << 8) |
5215 (aic_inb(p, SG_COUNT + 3) << 16) | (aic_inb(p, SG_COUNT + 4) << 24);
5216 resid_sgcnt = aic_inb(p, SCB_RESID_SGCNT);
5217 resid_dcnt = aic_inb(p, SCB_RESID_DCNT) |
5218 (aic_inb(p, SCB_RESID_DCNT + 1) << 8) |
5219 (aic_inb(p, SCB_RESID_DCNT + 2) << 16);
5220 index = scb->sg_count - ((resid_sgcnt) ? resid_sgcnt : 1);
5221 native_addr = le32_to_cpu(scb->sg_list[index].address);
5222 native_length = le32_to_cpu(scb->sg_list[index].length);
5223 /*
5224 * If resid_dcnt == native_length, then we just loaded this SG
5225 * segment and we need to back it up one...
5226 */
5227 if(resid_dcnt == native_length)
5228 {
5229 if(index == 0)
5230 {
5231 /*
5232 * Oops, this isn't right, we can't back up to before the
5233 * beginning. This must be a bogus message, ignore it.
5234 */
5235 break;
5236 }
5237 resid_dcnt = 1;
5238 resid_sgcnt += 1;
5239 native_addr = le32_to_cpu(scb->sg_list[index - 1].address);
5240 native_length = le32_to_cpu(scb->sg_list[index - 1].length);
5241 cur_addr = native_addr + (native_length - 1);
5242 sg_addr -= sizeof(struct hw_scatterlist);
5243 }
5244 else
5245 {
5246 /*
5247 * resid_dcnt != native_length, so we are in the middle of a SG
5248 * element. Back it up one byte and leave the rest alone.
5249 */
5250 resid_dcnt += 1;
5251 cur_addr -= 1;
5252 }
5253
5254 /*
5255 * Output the new addresses and counts to the right places on the
5256 * card.
5257 */
5258 aic_outb(p, resid_sgcnt, SG_COUNT);
5259 aic_outb(p, resid_sgcnt, SCB_RESID_SGCNT);
5260 aic_outb(p, sg_addr & 0xff, SG_COUNT + 1);
5261 aic_outb(p, (sg_addr >> 8) & 0xff, SG_COUNT + 2);
5262 aic_outb(p, (sg_addr >> 16) & 0xff, SG_COUNT + 3);
5263 aic_outb(p, (sg_addr >> 24) & 0xff, SG_COUNT + 4);
5264 aic_outb(p, resid_dcnt & 0xff, SCB_RESID_DCNT);
5265 aic_outb(p, (resid_dcnt >> 8) & 0xff, SCB_RESID_DCNT + 1);
5266 aic_outb(p, (resid_dcnt >> 16) & 0xff, SCB_RESID_DCNT + 2);
5267
5268 /*
5269 * The sequencer actually wants to find the new address
5270 * in the SHADDR register set. On the Ultra2 and later controllers
5271 * this register set is readonly. In order to get the right number
5272 * into the register, you actually have to enter it in HADDR and then
5273 * use the PRELOADEN bit of DFCNTRL to drop it through from the
5274 * HADDR register to the SHADDR register. On non-Ultra2 controllers,
5275 * we simply write it direct.
5276 */
5277 if(p->features & AHC_ULTRA2)
5278 {
5279 /*
5280 * We might as well be accurate and drop both the resid_dcnt and
5281 * cur_addr into HCNT and HADDR and have both of them drop
5282 * through to the shadow layer together.
5283 */
5284 aic_outb(p, resid_dcnt & 0xff, HCNT);
5285 aic_outb(p, (resid_dcnt >> 8) & 0xff, HCNT + 1);
5286 aic_outb(p, (resid_dcnt >> 16) & 0xff, HCNT + 2);
5287 aic_outb(p, cur_addr & 0xff, HADDR);
5288 aic_outb(p, (cur_addr >> 8) & 0xff, HADDR + 1);
5289 aic_outb(p, (cur_addr >> 16) & 0xff, HADDR + 2);
5290 aic_outb(p, (cur_addr >> 24) & 0xff, HADDR + 3);
5291 aic_outb(p, aic_inb(p, DMAPARAMS) | PRELOADEN, DFCNTRL);
5292 udelay(1);
5293 aic_outb(p, aic_inb(p, DMAPARAMS) & ~(SCSIEN|HDMAEN), DFCNTRL);
5294 i=0;
5295 while(((aic_inb(p, DFCNTRL) & (SCSIEN|HDMAEN)) != 0) && (i++ < 1000))
5296 {
5297 udelay(1);
5298 }
5299 }
5300 else
5301 {
5302 aic_outb(p, cur_addr & 0xff, SHADDR);
5303 aic_outb(p, (cur_addr >> 8) & 0xff, SHADDR + 1);
5304 aic_outb(p, (cur_addr >> 16) & 0xff, SHADDR + 2);
5305 aic_outb(p, (cur_addr >> 24) & 0xff, SHADDR + 3);
5306 }
5307 }
5308 break;
5309
5310 case SEQ_SG_FIXUP:
5311 {
5312 unsigned char scb_index, tmp;
5313 int sg_addr, sg_length;
5314
5315 scb_index = aic_inb(p, SCB_TAG);
5316
5317 if(scb_index > p->scb_data->numscbs)
5318 {
5319 printk(WARN_LEAD "invalid scb_index during SEQ_SG_FIXUP.\n",
5320 p->host_no, -1, -1, -1);
5321 printk(INFO_LEAD "SCSISIGI 0x%x, SEQADDR 0x%x, SSTAT0 0x%x, SSTAT1 "
5322 "0x%x\n", p->host_no, -1, -1, -1,
5323 aic_inb(p, SCSISIGI),
5324 aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8),
5325 aic_inb(p, SSTAT0), aic_inb(p, SSTAT1));
5326 printk(INFO_LEAD "SG_CACHEPTR 0x%x, SSTAT2 0x%x, STCNT 0x%x\n",
5327 p->host_no, -1, -1, -1, aic_inb(p, SG_CACHEPTR),
5328 aic_inb(p, SSTAT2), aic_inb(p, STCNT + 2) << 16 |
5329 aic_inb(p, STCNT + 1) << 8 | aic_inb(p, STCNT));
5330 /*
5331 * XXX: Add error handling here
5332 */
5333 break;
5334 }
5335 scb = p->scb_data->scb_array[scb_index];
5336 if(!(scb->flags & SCB_ACTIVE) || (scb->cmd == NULL))
5337 {
5338 printk(WARN_LEAD "invalid scb during SEQ_SG_FIXUP flags:0x%x "
5339 "scb->cmd:0x%p\n", p->host_no, CTL_OF_SCB(scb),
5340 scb->flags, scb->cmd);
5341 printk(INFO_LEAD "SCSISIGI 0x%x, SEQADDR 0x%x, SSTAT0 0x%x, SSTAT1 "
5342 "0x%x\n", p->host_no, CTL_OF_SCB(scb),
5343 aic_inb(p, SCSISIGI),
5344 aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8),
5345 aic_inb(p, SSTAT0), aic_inb(p, SSTAT1));
5346 printk(INFO_LEAD "SG_CACHEPTR 0x%x, SSTAT2 0x%x, STCNT 0x%x\n",
5347 p->host_no, CTL_OF_SCB(scb), aic_inb(p, SG_CACHEPTR),
5348 aic_inb(p, SSTAT2), aic_inb(p, STCNT + 2) << 16 |
5349 aic_inb(p, STCNT + 1) << 8 | aic_inb(p, STCNT));
5350 break;
5351 }
5352 if(aic7xxx_verbose & VERBOSE_MINOR_ERROR)
5353 printk(INFO_LEAD "Fixing up SG address for sequencer.\n", p->host_no,
5354 CTL_OF_SCB(scb));
5355 /*
5356 * Advance the SG pointer to the next element in the list
5357 */
5358 tmp = aic_inb(p, SG_NEXT);
5359 tmp += SG_SIZEOF;
5360 aic_outb(p, tmp, SG_NEXT);
5361 if( tmp < SG_SIZEOF )
5362 aic_outb(p, aic_inb(p, SG_NEXT + 1) + 1, SG_NEXT + 1);
5363 tmp = aic_inb(p, SG_COUNT) - 1;
5364 aic_outb(p, tmp, SG_COUNT);
5365 sg_addr = le32_to_cpu(scb->sg_list[scb->sg_count - tmp].address);
5366 sg_length = le32_to_cpu(scb->sg_list[scb->sg_count - tmp].length);
5367 /*
5368 * Now stuff the element we just advanced past down onto the
5369 * card so it can be stored in the residual area.
5370 */
5371 aic_outb(p, sg_addr & 0xff, HADDR);
5372 aic_outb(p, (sg_addr >> 8) & 0xff, HADDR + 1);
5373 aic_outb(p, (sg_addr >> 16) & 0xff, HADDR + 2);
5374 aic_outb(p, (sg_addr >> 24) & 0xff, HADDR + 3);
5375 aic_outb(p, sg_length & 0xff, HCNT);
5376 aic_outb(p, (sg_length >> 8) & 0xff, HCNT + 1);
5377 aic_outb(p, (sg_length >> 16) & 0xff, HCNT + 2);
5378 aic_outb(p, (tmp << 2) | ((tmp == 1) ? LAST_SEG : 0), SG_CACHEPTR);
5379 aic_outb(p, aic_inb(p, DMAPARAMS), DFCNTRL);
5380 while(aic_inb(p, SSTAT0) & SDONE) udelay(1);
5381 while(aic_inb(p, DFCNTRL) & (HDMAEN|SCSIEN)) aic_outb(p, 0, DFCNTRL);
5382 }
5383 break;
5384
5385 #if AIC7XXX_NOT_YET
5386 case TRACEPOINT2:
5387 {
5388 printk(INFO_LEAD "Tracepoint #2 reached.\n", p->host_no,
5389 channel, target, lun);
5390 }
5391 break;
5392
5393 /* XXX Fill these in later */
5394 case MSG_BUFFER_BUSY:
5395 printk("aic7xxx: Message buffer busy.\n");
5396 break;
5397 case MSGIN_PHASEMIS:
5398 printk("aic7xxx: Message-in phasemis.\n");
5399 break;
5400 #endif
5401
5402 default: /* unknown */
5403 printk(WARN_LEAD "Unknown SEQINT, INTSTAT 0x%x, SCSISIGI 0x%x.\n",
5404 p->host_no, channel, target, lun, intstat,
5405 aic_inb(p, SCSISIGI));
5406 break;
5407 }
5408
5409 /*
5410 * Clear the sequencer interrupt and unpause the sequencer.
5411 */
5412 unpause_sequencer(p, /* unpause always */ TRUE);
5413 }
5414
5415 /*+F*************************************************************************
5416 * Function:
5417 * aic7xxx_parse_msg
5418 *
5419 * Description:
5420 * Parses incoming messages into actions on behalf of
5421 * aic7xxx_handle_reqinit
5422 *_F*************************************************************************/
5423 static int
5424 aic7xxx_parse_msg(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
5425 {
5426 int reject, reply, done;
5427 unsigned char target_scsirate, tindex;
5428 unsigned short target_mask;
5429 unsigned char target, channel, lun;
5430 unsigned char bus_width, new_bus_width;
5431 unsigned char trans_options, new_trans_options;
5432 unsigned int period, new_period, offset, new_offset, maxsync;
5433 struct aic7xxx_syncrate *syncrate;
5434
5435 target = scb->cmd->target;
5436 channel = scb->cmd->channel;
5437 lun = scb->cmd->lun;
5438 reply = reject = done = FALSE;
5439 tindex = TARGET_INDEX(scb->cmd);
5440 target_scsirate = aic_inb(p, TARG_SCSIRATE + tindex);
5441 target_mask = (0x01 << tindex);
5442
5443 /*
5444 * Parse as much of the message as is availible,
5445 * rejecting it if we don't support it. When
5446 * the entire message is availible and has been
5447 * handled, return TRUE indicating that we have
5448 * parsed an entire message.
5449 */
5450
5451 if (p->msg_buf[0] != MSG_EXTENDED)
5452 {
5453 reject = TRUE;
5454 }
5455
5456 /*
5457 * Even if we are an Ultra3 card, don't allow Ultra3 sync rates when
5458 * using the SDTR messages. We need the PPR messages to enable the
5459 * higher speeds that include things like Dual Edge clocking.
5460 */
5461 if (p->features & AHC_ULTRA2)
5462 {
5463 if ( (aic_inb(p, SBLKCTL) & ENAB40) &&
5464 !(aic_inb(p, SSTAT2) & EXP_ACTIVE) )
5465 {
5466 if (p->features & AHC_ULTRA3)
5467 maxsync = AHC_SYNCRATE_ULTRA3;
5468 else
5469 maxsync = AHC_SYNCRATE_ULTRA2;
5470 }
5471 else
5472 {
5473 maxsync = AHC_SYNCRATE_ULTRA;
5474 }
5475 }
5476 else if (p->features & AHC_ULTRA)
5477 {
5478 maxsync = AHC_SYNCRATE_ULTRA;
5479 }
5480 else
5481 {
5482 maxsync = AHC_SYNCRATE_FAST;
5483 }
5484
5485 /*
5486 * Just accept the length byte outright and perform
5487 * more checking once we know the message type.
5488 */
5489
5490 if ( !reject && (p->msg_len > 2) )
5491 {
5492 switch(p->msg_buf[2])
5493 {
5494 case MSG_EXT_SDTR:
5495 {
5496
5497 if (p->msg_buf[1] != MSG_EXT_SDTR_LEN)
5498 {
5499 reject = TRUE;
5500 break;
5501 }
5502
5503 if (p->msg_len < (MSG_EXT_SDTR_LEN + 2))
5504 {
5505 break;
5506 }
5507
5508 period = new_period = p->msg_buf[3];
5509 offset = new_offset = p->msg_buf[4];
5510 trans_options = new_trans_options = 0;
5511 bus_width = new_bus_width = target_scsirate & WIDEXFER;
5512
5513 /*
5514 * If our current max syncrate is in the Ultra3 range, bump it back
5515 * down to Ultra2 since we can't negotiate DT transfers using SDTR
5516 */
5517 if(maxsync == AHC_SYNCRATE_ULTRA3)
5518 maxsync = AHC_SYNCRATE_ULTRA2;
5519
5520 /*
5521 * We might have a device that is starting negotiation with us
5522 * before we can start up negotiation with it....be prepared to
5523 * have a device ask for a higher speed then we want to give it
5524 * in that case
5525 */
5526 if ( (scb->flags & (SCB_MSGOUT_SENT|SCB_MSGOUT_SDTR)) !=
5527 (SCB_MSGOUT_SENT|SCB_MSGOUT_SDTR) )
5528 {
5529 if (!(p->dev_flags[tindex] & DEVICE_DTR_SCANNED))
5530 {
5531 /*
5532 * We shouldn't get here unless this is a narrow drive, wide
5533 * devices should trigger this same section of code in the WDTR
5534 * handler first instead.
5535 */
5536 p->transinfo[tindex].goal_width = MSG_EXT_WDTR_BUS_8_BIT;
5537 p->transinfo[tindex].goal_options = 0;
5538 if(p->transinfo[tindex].user_offset)
5539 {
5540 p->needsdtr_copy |= target_mask;
5541 p->transinfo[tindex].goal_period =
5542 MAX(10,p->transinfo[tindex].user_period);
5543 if(p->features & AHC_ULTRA2)
5544 {
5545 p->transinfo[tindex].goal_offset = MAX_OFFSET_ULTRA2;
5546 }
5547 else
5548 {
5549 p->transinfo[tindex].goal_offset = MAX_OFFSET_8BIT;
5550 }
5551 }
5552 else
5553 {
5554 p->needsdtr_copy &= ~target_mask;
5555 p->transinfo[tindex].goal_period = 255;
5556 p->transinfo[tindex].goal_offset = 0;
5557 }
5558 p->dev_flags[tindex] |= DEVICE_DTR_SCANNED | DEVICE_PRINT_DTR;
5559 }
5560 else if ((p->needsdtr_copy & target_mask) == 0)
5561 {
5562 /*
5563 * This is a preemptive message from the target, we've already
5564 * scanned this target and set our options for it, and we
5565 * don't need a WDTR with this target (for whatever reason),
5566 * so reject this incoming WDTR
5567 */
5568 reject = TRUE;
5569 break;
5570 }
5571
5572 /* The device is sending this message first and we have to reply */
5573 reply = TRUE;
5574
5575 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
5576 {
5577 printk(INFO_LEAD "Received pre-emptive SDTR message from "
5578 "target.\n", p->host_no, CTL_OF_SCB(scb));
5579 }
5580 /*
5581 * Validate the values the device passed to us against our SEEPROM
5582 * settings. We don't have to do this if we aren't replying since
5583 * the device isn't allowed to send values greater than the ones
5584 * we first sent to it.
5585 */
5586 new_period = MAX(period, p->transinfo[tindex].goal_period);
5587 new_offset = MIN(offset, p->transinfo[tindex].goal_offset);
5588 }
5589
5590 /*
5591 * Use our new_period, new_offset, bus_width, and card options
5592 * to determine the actual syncrate settings
5593 */
5594 syncrate = aic7xxx_find_syncrate(p, &new_period, maxsync,
5595 &trans_options);
5596 aic7xxx_validate_offset(p, syncrate, &new_offset, bus_width);
5597
5598 /*
5599 * Did we drop to async? If so, send a reply regardless of whether
5600 * or not we initiated this negotiation.
5601 */
5602 if ((new_offset == 0) && (new_offset != offset))
5603 {
5604 p->needsdtr_copy &= ~target_mask;
5605 reply = TRUE;
5606 }
5607
5608 /*
5609 * Did we start this, if not, or if we went too low and had to
5610 * go async, then send an SDTR back to the target
5611 */
5612 if(reply)
5613 {
5614 /* when sending a reply, make sure that the goal settings are
5615 * updated along with current and active since the code that
5616 * will actually build the message for the sequencer uses the
5617 * goal settings as its guidelines.
5618 */
5619 aic7xxx_set_syncrate(p, syncrate, target, channel, new_period,
5620 new_offset, trans_options,
5621 AHC_TRANS_GOAL|AHC_TRANS_ACTIVE|AHC_TRANS_CUR);
5622 scb->flags &= ~SCB_MSGOUT_BITS;
5623 scb->flags |= SCB_MSGOUT_SDTR;
5624 aic_outb(p, HOST_MSG, MSG_OUT);
5625 aic_outb(p, aic_inb(p, SCSISIGO) | ATNO, SCSISIGO);
5626 }
5627 else
5628 {
5629 aic7xxx_set_syncrate(p, syncrate, target, channel, new_period,
5630 new_offset, trans_options,
5631 AHC_TRANS_ACTIVE|AHC_TRANS_CUR);
5632 p->needsdtr &= ~target_mask;
5633 }
5634 done = TRUE;
5635 break;
5636 }
5637 case MSG_EXT_WDTR:
5638 {
5639
5640 if (p->msg_buf[1] != MSG_EXT_WDTR_LEN)
5641 {
5642 reject = TRUE;
5643 break;
5644 }
5645
5646 if (p->msg_len < (MSG_EXT_WDTR_LEN + 2))
5647 {
5648 break;
5649 }
5650
5651 bus_width = new_bus_width = p->msg_buf[3];
5652
5653 if ( (scb->flags & (SCB_MSGOUT_SENT|SCB_MSGOUT_WDTR)) ==
5654 (SCB_MSGOUT_SENT|SCB_MSGOUT_WDTR) )
5655 {
5656 switch(bus_width)
5657 {
5658 default:
5659 {
5660 reject = TRUE;
5661 if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) &&
5662 ((p->dev_flags[tindex] & DEVICE_PRINT_DTR) ||
5663 (aic7xxx_verbose > 0xffff)) )
5664 {
5665 printk(INFO_LEAD "Requesting %d bit transfers, rejecting.\n",
5666 p->host_no, CTL_OF_SCB(scb), 8 * (0x01 << bus_width));
5667 }
5668 } /* We fall through on purpose */
5669 case MSG_EXT_WDTR_BUS_8_BIT:
5670 {
5671 p->transinfo[tindex].goal_width = MSG_EXT_WDTR_BUS_8_BIT;
5672 p->needwdtr_copy &= ~target_mask;
5673 break;
5674 }
5675 case MSG_EXT_WDTR_BUS_16_BIT:
5676 {
5677 break;
5678 }
5679 }
5680 p->needwdtr &= ~target_mask;
5681 aic7xxx_set_width(p, target, channel, lun, new_bus_width,
5682 AHC_TRANS_ACTIVE|AHC_TRANS_CUR);
5683 }
5684 else
5685 {
5686 if ( !(p->dev_flags[tindex] & DEVICE_DTR_SCANNED) )
5687 {
5688 /*
5689 * Well, we now know the WDTR and SYNC caps of this device since
5690 * it contacted us first, mark it as such and copy the user stuff
5691 * over to the goal stuff.
5692 */
5693 if( (p->features & AHC_WIDE) && p->transinfo[tindex].user_width )
5694 {
5695 p->transinfo[tindex].goal_width = MSG_EXT_WDTR_BUS_16_BIT;
5696 p->needwdtr_copy |= target_mask;
5697 }
5698
5699 /*
5700 * Devices that support DT transfers don't start WDTR requests
5701 */
5702 p->transinfo[tindex].goal_options = 0;
5703
5704 if(p->transinfo[tindex].user_offset)
5705 {
5706 p->needsdtr_copy |= target_mask;
5707 p->transinfo[tindex].goal_period =
5708 MAX(10,p->transinfo[tindex].user_period);
5709 if(p->features & AHC_ULTRA2)
5710 {
5711 p->transinfo[tindex].goal_offset = MAX_OFFSET_ULTRA2;
5712 }
5713 else if( p->transinfo[tindex].goal_width )
5714 {
5715 p->transinfo[tindex].goal_offset = MAX_OFFSET_16BIT;
5716 }
5717 else
5718 {
5719 p->transinfo[tindex].goal_offset = MAX_OFFSET_8BIT;
5720 }
5721 } else {
5722 p->needsdtr_copy &= ~target_mask;
5723 p->transinfo[tindex].goal_period = 255;
5724 p->transinfo[tindex].goal_offset = 0;
5725 }
5726
5727 p->dev_flags[tindex] |= DEVICE_DTR_SCANNED | DEVICE_PRINT_DTR;
5728 }
5729 else if ((p->needwdtr_copy & target_mask) == 0)
5730 {
5731 /*
5732 * This is a preemptive message from the target, we've already
5733 * scanned this target and set our options for it, and we
5734 * don't need a WDTR with this target (for whatever reason),
5735 * so reject this incoming WDTR
5736 */
5737 reject = TRUE;
5738 break;
5739 }
5740
5741 /* The device is sending this message first and we have to reply */
5742 reply = TRUE;
5743
5744 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
5745 {
5746 printk(INFO_LEAD "Received pre-emptive WDTR message from "
5747 "target.\n", p->host_no, CTL_OF_SCB(scb));
5748 }
5749 switch(bus_width)
5750 {
5751 case MSG_EXT_WDTR_BUS_16_BIT:
5752 {
5753 if ( (p->features & AHC_WIDE) &&
5754 (p->transinfo[tindex].goal_width ==
5755 MSG_EXT_WDTR_BUS_16_BIT) )
5756 {
5757 new_bus_width = MSG_EXT_WDTR_BUS_16_BIT;
5758 break;
5759 }
5760 } /* Fall through if we aren't a wide card */
5761 default:
5762 case MSG_EXT_WDTR_BUS_8_BIT:
5763 {
5764 p->needwdtr_copy &= ~target_mask;
5765 new_bus_width = MSG_EXT_WDTR_BUS_8_BIT;
5766 break;
5767 }
5768 }
5769 scb->flags &= ~SCB_MSGOUT_BITS;
5770 scb->flags |= SCB_MSGOUT_WDTR;
5771 p->needwdtr &= ~target_mask;
5772 if((p->dtr_pending & target_mask) == 0)
5773 {
5774 /* there is no other command with SCB_DTR_SCB already set that will
5775 * trigger the release of the dtr_pending bit. Both set the bit
5776 * and set scb->flags |= SCB_DTR_SCB
5777 */
5778 p->dtr_pending |= target_mask;
5779 scb->flags |= SCB_DTR_SCB;
5780 }
5781 aic_outb(p, HOST_MSG, MSG_OUT);
5782 aic_outb(p, aic_inb(p, SCSISIGO) | ATNO, SCSISIGO);
5783 /* when sending a reply, make sure that the goal settings are
5784 * updated along with current and active since the code that
5785 * will actually build the message for the sequencer uses the
5786 * goal settings as its guidelines.
5787 */
5788 aic7xxx_set_width(p, target, channel, lun, new_bus_width,
5789 AHC_TRANS_GOAL|AHC_TRANS_ACTIVE|AHC_TRANS_CUR);
5790 }
5791
5792 /*
5793 * By virtue of the SCSI spec, a WDTR message negates any existing
5794 * SDTR negotiations. So, even if needsdtr isn't marked for this
5795 * device, we still have to do a new SDTR message if the device
5796 * supports SDTR at all. Therefore, we check needsdtr_copy instead
5797 * of needstr.
5798 */
5799 aic7xxx_set_syncrate(p, NULL, target, channel, 0, 0, 0,
5800 AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE);
5801 p->needsdtr |= (p->needsdtr_copy & target_mask);
5802 done = TRUE;
5803 break;
5804 }
5805 case MSG_EXT_PPR:
5806 {
5807
5808 if (p->msg_buf[1] != MSG_EXT_PPR_LEN)
5809 {
5810 reject = TRUE;
5811 break;
5812 }
5813
5814 if (p->msg_len < (MSG_EXT_PPR_LEN + 2))
5815 {
5816 break;
5817 }
5818
5819 period = new_period = p->msg_buf[3];
5820 offset = new_offset = p->msg_buf[5];
5821 bus_width = new_bus_width = p->msg_buf[6];
5822 trans_options = new_trans_options = p->msg_buf[7] & 0xf;
5823
5824 if(aic7xxx_verbose & VERBOSE_NEGOTIATION2)
5825 {
5826 printk(INFO_LEAD "Parsing PPR message (%d/%d/%d/%d)\n",
5827 p->host_no, CTL_OF_SCB(scb), period, offset, bus_width,
5828 trans_options);
5829 }
5830
5831 /*
5832 * We might have a device that is starting negotiation with us
5833 * before we can start up negotiation with it....be prepared to
5834 * have a device ask for a higher speed then we want to give it
5835 * in that case
5836 */
5837 if ( (scb->flags & (SCB_MSGOUT_SENT|SCB_MSGOUT_PPR)) !=
5838 (SCB_MSGOUT_SENT|SCB_MSGOUT_PPR) )
5839 {
5840 /* Have we scanned the device yet? */
5841 if (!(p->dev_flags[tindex] & DEVICE_DTR_SCANNED))
5842 {
5843 /* The device is electing to use PPR messages, so we will too until
5844 * we know better */
5845 p->needppr |= target_mask;
5846 p->needppr_copy |= target_mask;
5847 p->needsdtr &= ~target_mask;
5848 p->needsdtr_copy &= ~target_mask;
5849 p->needwdtr &= ~target_mask;
5850 p->needwdtr_copy &= ~target_mask;
5851
5852 /* We know the device is SCSI-3 compliant due to PPR */
5853 p->dev_flags[tindex] |= DEVICE_SCSI_3;
5854
5855 /*
5856 * Not only is the device starting this up, but it also hasn't
5857 * been scanned yet, so this would likely be our TUR or our
5858 * INQUIRY command at scan time, so we need to use the
5859 * settings from the SEEPROM if they existed. Of course, even
5860 * if we didn't find a SEEPROM, we stuffed default values into
5861 * the user settings anyway, so use those in all cases.
5862 */
5863 p->transinfo[tindex].goal_width =
5864 p->transinfo[tindex].user_width;
5865 if(p->transinfo[tindex].user_offset)
5866 {
5867 p->transinfo[tindex].goal_period =
5868 p->transinfo[tindex].user_period;
5869 p->transinfo[tindex].goal_options =
5870 p->transinfo[tindex].user_options;
5871 if(p->features & AHC_ULTRA2)
5872 {
5873 p->transinfo[tindex].goal_offset = MAX_OFFSET_ULTRA2;
5874 }
5875 else if( p->transinfo[tindex].goal_width &&
5876 (bus_width == MSG_EXT_WDTR_BUS_16_BIT) &&
5877 p->features & AHC_WIDE )
5878 {
5879 p->transinfo[tindex].goal_offset = MAX_OFFSET_16BIT;
5880 }
5881 else
5882 {
5883 p->transinfo[tindex].goal_offset = MAX_OFFSET_8BIT;
5884 }
5885 }
5886 else
5887 {
5888 p->transinfo[tindex].goal_period = 255;
5889 p->transinfo[tindex].goal_offset = 0;
5890 p->transinfo[tindex].goal_options = 0;
5891 }
5892 p->dev_flags[tindex] |= DEVICE_DTR_SCANNED | DEVICE_PRINT_DTR;
5893 }
5894 else if ((p->needppr_copy & target_mask) == 0)
5895 {
5896 /*
5897 * This is a preemptive message from the target, we've already
5898 * scanned this target and set our options for it, and we
5899 * don't need a PPR with this target (for whatever reason),
5900 * so reject this incoming PPR
5901 */
5902 reject = TRUE;
5903 break;
5904 }
5905
5906 /* The device is sending this message first and we have to reply */
5907 reply = TRUE;
5908
5909 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
5910 {
5911 printk(INFO_LEAD "Received pre-emptive PPR message from "
5912 "target.\n", p->host_no, CTL_OF_SCB(scb));
5913 }
5914
5915 }
5916
5917 switch(bus_width)
5918 {
5919 case MSG_EXT_WDTR_BUS_16_BIT:
5920 {
5921 if ( (p->transinfo[tindex].goal_width ==
5922 MSG_EXT_WDTR_BUS_16_BIT) && p->features & AHC_WIDE)
5923 {
5924 break;
5925 }
5926 }
5927 default:
5928 {
5929 if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) &&
5930 ((p->dev_flags[tindex] & DEVICE_PRINT_DTR) ||
5931 (aic7xxx_verbose > 0xffff)) )
5932 {
5933 reply = TRUE;
5934 printk(INFO_LEAD "Requesting %d bit transfers, rejecting.\n",
5935 p->host_no, CTL_OF_SCB(scb), 8 * (0x01 << bus_width));
5936 }
5937 } /* We fall through on purpose */
5938 case MSG_EXT_WDTR_BUS_8_BIT:
5939 {
5940 /*
5941 * According to the spec, if we aren't wide, we also can't be
5942 * Dual Edge so clear the options byte
5943 */
5944 new_trans_options = 0;
5945 new_bus_width = MSG_EXT_WDTR_BUS_8_BIT;
5946 break;
5947 }
5948 }
5949
5950 if(reply)
5951 {
5952 /* when sending a reply, make sure that the goal settings are
5953 * updated along with current and active since the code that
5954 * will actually build the message for the sequencer uses the
5955 * goal settings as its guidelines.
5956 */
5957 aic7xxx_set_width(p, target, channel, lun, new_bus_width,
5958 AHC_TRANS_GOAL|AHC_TRANS_ACTIVE|AHC_TRANS_CUR);
5959 syncrate = aic7xxx_find_syncrate(p, &new_period, maxsync,
5960 &new_trans_options);
5961 aic7xxx_validate_offset(p, syncrate, &new_offset, new_bus_width);
5962 aic7xxx_set_syncrate(p, syncrate, target, channel, new_period,
5963 new_offset, new_trans_options,
5964 AHC_TRANS_GOAL|AHC_TRANS_ACTIVE|AHC_TRANS_CUR);
5965 }
5966 else
5967 {
5968 aic7xxx_set_width(p, target, channel, lun, new_bus_width,
5969 AHC_TRANS_ACTIVE|AHC_TRANS_CUR);
5970 syncrate = aic7xxx_find_syncrate(p, &new_period, maxsync,
5971 &new_trans_options);
5972 aic7xxx_validate_offset(p, syncrate, &new_offset, new_bus_width);
5973 aic7xxx_set_syncrate(p, syncrate, target, channel, new_period,
5974 new_offset, new_trans_options,
5975 AHC_TRANS_ACTIVE|AHC_TRANS_CUR);
5976 }
5977
5978 /*
5979 * As it turns out, if we don't *have* to have PPR messages, then
5980 * configure ourselves not to use them since that makes some
5981 * external drive chassis work (those chassis can't parse PPR
5982 * messages and they mangle the SCSI bus until you send a WDTR
5983 * and SDTR that they can understand).
5984 */
5985 if(new_trans_options == 0)
5986 {
5987 p->needppr &= ~target_mask;
5988 p->needppr_copy &= ~target_mask;
5989 if(new_offset)
5990 {
5991 p->needsdtr |= target_mask;
5992 p->needsdtr_copy |= target_mask;
5993 }
5994 if (new_bus_width)
5995 {
5996 p->needwdtr |= target_mask;
5997 p->needwdtr_copy |= target_mask;
5998 }
5999 }
6000
6001 if((new_offset == 0) && (offset != 0))
6002 {
6003 /*
6004 * Oops, the syncrate went to low for this card and we fell off
6005 * to async (should never happen with a device that uses PPR
6006 * messages, but have to be complete)
6007 */
6008 reply = TRUE;
6009 }
6010
6011 if(reply)
6012 {
6013 scb->flags &= ~SCB_MSGOUT_BITS;
6014 scb->flags |= SCB_MSGOUT_PPR;
6015 aic_outb(p, HOST_MSG, MSG_OUT);
6016 aic_outb(p, aic_inb(p, SCSISIGO) | ATNO, SCSISIGO);
6017 }
6018 else
6019 {
6020 p->needppr &= ~target_mask;
6021 }
6022 done = TRUE;
6023 break;
6024 }
6025 default:
6026 {
6027 reject = TRUE;
6028 break;
6029 }
6030 } /* end of switch(p->msg_type) */
6031 } /* end of if (!reject && (p->msg_len > 2)) */
6032
6033 if (!reply && reject)
6034 {
6035 aic_outb(p, MSG_MESSAGE_REJECT, MSG_OUT);
6036 aic_outb(p, aic_inb(p, SCSISIGO) | ATNO, SCSISIGO);
6037 done = TRUE;
6038 }
6039 return(done);
6040 }
6041
6042
6043 /*+F*************************************************************************
6044 * Function:
6045 * aic7xxx_handle_reqinit
6046 *
6047 * Description:
6048 * Interrupt handler for REQINIT interrupts (used to transfer messages to
6049 * and from devices).
6050 *_F*************************************************************************/
6051 static void
6052 aic7xxx_handle_reqinit(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
6053 {
6054 unsigned char lastbyte;
6055 unsigned char phasemis;
6056 int done = FALSE;
6057
6058 switch(p->msg_type)
6059 {
6060 case MSG_TYPE_INITIATOR_MSGOUT:
6061 {
6062 if (p->msg_len == 0)
6063 panic("aic7xxx: REQINIT with no active message!\n");
6064
6065 lastbyte = (p->msg_index == (p->msg_len - 1));
6066 phasemis = ( aic_inb(p, SCSISIGI) & PHASE_MASK) != P_MESGOUT;
6067
6068 if (lastbyte || phasemis)
6069 {
6070 /* Time to end the message */
6071 p->msg_len = 0;
6072 p->msg_type = MSG_TYPE_NONE;
6073 /*
6074 * NOTE-TO-MYSELF: If you clear the REQINIT after you
6075 * disable REQINITs, then cases of REJECT_MSG stop working
6076 * and hang the bus
6077 */
6078 aic_outb(p, aic_inb(p, SIMODE1) & ~ENREQINIT, SIMODE1);
6079 aic_outb(p, CLRSCSIINT, CLRINT);
6080 p->flags &= ~AHC_HANDLING_REQINITS;
6081
6082 if (phasemis == 0)
6083 {
6084 aic_outb(p, p->msg_buf[p->msg_index], SINDEX);
6085 aic_outb(p, 0, RETURN_1);
6086 #ifdef AIC7XXX_VERBOSE_DEBUGGING
6087 if (aic7xxx_verbose > 0xffff)
6088 printk(INFO_LEAD "Completed sending of REQINIT message.\n",
6089 p->host_no, CTL_OF_SCB(scb));
6090 #endif
6091 }
6092 else
6093 {
6094 aic_outb(p, MSGOUT_PHASEMIS, RETURN_1);
6095 #ifdef AIC7XXX_VERBOSE_DEBUGGING
6096 if (aic7xxx_verbose > 0xffff)
6097 printk(INFO_LEAD "PHASEMIS while sending REQINIT message.\n",
6098 p->host_no, CTL_OF_SCB(scb));
6099 #endif
6100 }
6101 unpause_sequencer(p, TRUE);
6102 }
6103 else
6104 {
6105 /*
6106 * Present the byte on the bus (clearing REQINIT) but don't
6107 * unpause the sequencer.
6108 */
6109 aic_outb(p, CLRREQINIT, CLRSINT1);
6110 aic_outb(p, CLRSCSIINT, CLRINT);
6111 aic_outb(p, p->msg_buf[p->msg_index++], SCSIDATL);
6112 }
6113 break;
6114 }
6115 case MSG_TYPE_INITIATOR_MSGIN:
6116 {
6117 phasemis = ( aic_inb(p, SCSISIGI) & PHASE_MASK ) != P_MESGIN;
6118
6119 if (phasemis == 0)
6120 {
6121 p->msg_len++;
6122 /* Pull the byte in without acking it */
6123 p->msg_buf[p->msg_index] = aic_inb(p, SCSIBUSL);
6124 done = aic7xxx_parse_msg(p, scb);
6125 /* Ack the byte */
6126 aic_outb(p, CLRREQINIT, CLRSINT1);
6127 aic_outb(p, CLRSCSIINT, CLRINT);
6128 aic_inb(p, SCSIDATL);
6129 p->msg_index++;
6130 }
6131 if (phasemis || done)
6132 {
6133 #ifdef AIC7XXX_VERBOSE_DEBUGGING
6134 if (aic7xxx_verbose > 0xffff)
6135 {
6136 if (phasemis)
6137 printk(INFO_LEAD "PHASEMIS while receiving REQINIT message.\n",
6138 p->host_no, CTL_OF_SCB(scb));
6139 else
6140 printk(INFO_LEAD "Completed receipt of REQINIT message.\n",
6141 p->host_no, CTL_OF_SCB(scb));
6142 }
6143 #endif
6144 /* Time to end our message session */
6145 p->msg_len = 0;
6146 p->msg_type = MSG_TYPE_NONE;
6147 aic_outb(p, aic_inb(p, SIMODE1) & ~ENREQINIT, SIMODE1);
6148 aic_outb(p, CLRSCSIINT, CLRINT);
6149 p->flags &= ~AHC_HANDLING_REQINITS;
6150 unpause_sequencer(p, TRUE);
6151 }
6152 break;
6153 }
6154 default:
6155 {
6156 panic("aic7xxx: Unknown REQINIT message type.\n");
6157 break;
6158 }
6159 } /* End of switch(p->msg_type) */
6160 }
6161
6162 /*+F*************************************************************************
6163 * Function:
6164 * aic7xxx_handle_scsiint
6165 *
6166 * Description:
6167 * Interrupt handler for SCSI interrupts (SCSIINT).
6168 *-F*************************************************************************/
6169 static void
6170 aic7xxx_handle_scsiint(struct aic7xxx_host *p, unsigned char intstat)
6171 {
6172 unsigned char scb_index;
6173 unsigned char status;
6174 struct aic7xxx_scb *scb;
6175
6176 scb_index = aic_inb(p, SCB_TAG);
6177 status = aic_inb(p, SSTAT1);
6178
6179 if (scb_index < p->scb_data->numscbs)
6180 {
6181 scb = p->scb_data->scb_array[scb_index];
6182 if ((scb->flags & SCB_ACTIVE) == 0)
6183 {
6184 scb = NULL;
6185 }
6186 }
6187 else
6188 {
6189 scb = NULL;
6190 }
6191
6192
6193 if ((status & SCSIRSTI) != 0)
6194 {
6195 int channel;
6196
6197 if ( (p->chip & AHC_CHIPID_MASK) == AHC_AIC7770 )
6198 channel = (aic_inb(p, SBLKCTL) & SELBUSB) >> 3;
6199 else
6200 channel = 0;
6201
6202 if (aic7xxx_verbose & VERBOSE_RESET)
6203 printk(WARN_LEAD "Someone else reset the channel!!\n",
6204 p->host_no, channel, -1, -1);
6205 if (aic7xxx_panic_on_abort)
6206 aic7xxx_panic_abort(p, NULL);
6207 /*
6208 * Go through and abort all commands for the channel, but do not
6209 * reset the channel again.
6210 */
6211 aic7xxx_reset_channel(p, channel, /* Initiate Reset */ FALSE);
6212 aic7xxx_run_done_queue(p, TRUE);
6213 scb = NULL;
6214 }
6215 else if ( ((status & BUSFREE) != 0) && ((status & SELTO) == 0) )
6216 {
6217 /*
6218 * First look at what phase we were last in. If it's message-out,
6219 * chances are pretty good that the bus free was in response to
6220 * one of our abort requests.
6221 */
6222 unsigned char lastphase = aic_inb(p, LASTPHASE);
6223 unsigned char saved_tcl = aic_inb(p, SAVED_TCL);
6224 unsigned char target = (saved_tcl >> 4) & 0x0F;
6225 int channel;
6226 int printerror = TRUE;
6227
6228 if ( (p->chip & AHC_CHIPID_MASK) == AHC_AIC7770 )
6229 channel = (aic_inb(p, SBLKCTL) & SELBUSB) >> 3;
6230 else
6231 channel = 0;
6232
6233 aic_outb(p, aic_inb(p, SCSISEQ) & (ENSELI|ENRSELI|ENAUTOATNP),
6234 SCSISEQ);
6235 if (lastphase == P_MESGOUT)
6236 {
6237 unsigned char message;
6238
6239 message = aic_inb(p, SINDEX);
6240
6241 if ((message == MSG_ABORT) || (message == MSG_ABORT_TAG))
6242 {
6243 if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS)
6244 printk(INFO_LEAD "SCB %d abort delivered.\n", p->host_no,
6245 CTL_OF_SCB(scb), scb->hscb->tag);
6246 aic7xxx_reset_device(p, target, channel, ALL_LUNS,
6247 (message == MSG_ABORT) ? SCB_LIST_NULL : scb->hscb->tag );
6248 aic7xxx_run_done_queue(p, TRUE);
6249 scb = NULL;
6250 printerror = 0;
6251 }
6252 else if (message == MSG_BUS_DEV_RESET)
6253 {
6254 aic7xxx_handle_device_reset(p, target, channel);
6255 scb = NULL;
6256 printerror = 0;
6257 }
6258 }
6259 if ( (scb != NULL) && (scb->flags & SCB_DTR_SCB) )
6260 {
6261 /*
6262 * Hmmm...error during a negotiation command. Either we have a
6263 * borken bus, or the device doesn't like our negotiation message.
6264 * Since we check the INQUIRY data of a device before sending it
6265 * negotiation messages, assume the bus is borken for whatever
6266 * reason. Complete the command.
6267 */
6268 printerror = 0;
6269 aic7xxx_reset_device(p, target, channel, ALL_LUNS, scb->hscb->tag);
6270 aic7xxx_run_done_queue(p, TRUE);
6271 scb = NULL;
6272 }
6273 if (printerror != 0)
6274 {
6275 if (scb != NULL)
6276 {
6277 unsigned char tag;
6278
6279 if ((scb->hscb->control & TAG_ENB) != 0)
6280 {
6281 tag = scb->hscb->tag;
6282 }
6283 else
6284 {
6285 tag = SCB_LIST_NULL;
6286 }
6287 aic7xxx_reset_device(p, target, channel, ALL_LUNS, tag);
6288 aic7xxx_run_done_queue(p, TRUE);
6289 }
6290 else
6291 {
6292 aic7xxx_reset_device(p, target, channel, ALL_LUNS, SCB_LIST_NULL);
6293 aic7xxx_run_done_queue(p, TRUE);
6294 }
6295 printk(INFO_LEAD "Unexpected busfree, LASTPHASE = 0x%x, "
6296 "SEQADDR = 0x%x\n", p->host_no, channel, target, -1, lastphase,
6297 (aic_inb(p, SEQADDR1) << 8) | aic_inb(p, SEQADDR0));
6298 scb = NULL;
6299 }
6300 aic_outb(p, MSG_NOOP, MSG_OUT);
6301 aic_outb(p, aic_inb(p, SIMODE1) & ~(ENBUSFREE|ENREQINIT),
6302 SIMODE1);
6303 p->flags &= ~AHC_HANDLING_REQINITS;
6304 aic_outb(p, CLRBUSFREE, CLRSINT1);
6305 aic_outb(p, CLRSCSIINT, CLRINT);
6306 restart_sequencer(p);
6307 unpause_sequencer(p, TRUE);
6308 }
6309 else if ((status & SELTO) != 0)
6310 {
6311 unsigned char scbptr;
6312 unsigned char nextscb;
6313 Scsi_Cmnd *cmd;
6314
6315 scbptr = aic_inb(p, WAITING_SCBH);
6316 if (scbptr > p->scb_data->maxhscbs)
6317 {
6318 /*
6319 * I'm still trying to track down exactly how this happens, but until
6320 * I find it, this code will make sure we aren't passing bogus values
6321 * into the SCBPTR register, even if that register will just wrap
6322 * things around, we still don't like having out of range variables.
6323 *
6324 * NOTE: Don't check the aic7xxx_verbose variable, I want this message
6325 * to always be displayed.
6326 */
6327 printk(INFO_LEAD "Invalid WAITING_SCBH value %d, improvising.\n",
6328 p->host_no, -1, -1, -1, scbptr);
6329 if (p->scb_data->maxhscbs > 4)
6330 scbptr &= (p->scb_data->maxhscbs - 1);
6331 else
6332 scbptr &= 0x03;
6333 }
6334 aic_outb(p, scbptr, SCBPTR);
6335 scb_index = aic_inb(p, SCB_TAG);
6336
6337 scb = NULL;
6338 if (scb_index < p->scb_data->numscbs)
6339 {
6340 scb = p->scb_data->scb_array[scb_index];
6341 if ((scb->flags & SCB_ACTIVE) == 0)
6342 {
6343 scb = NULL;
6344 }
6345 }
6346 if (scb == NULL)
6347 {
6348 printk(WARN_LEAD "Referenced SCB %d not valid during SELTO.\n",
6349 p->host_no, -1, -1, -1, scb_index);
6350 printk(KERN_WARNING " SCSISEQ = 0x%x SEQADDR = 0x%x SSTAT0 = 0x%x "
6351 "SSTAT1 = 0x%x\n", aic_inb(p, SCSISEQ),
6352 aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8),
6353 aic_inb(p, SSTAT0), aic_inb(p, SSTAT1));
6354 if (aic7xxx_panic_on_abort)
6355 aic7xxx_panic_abort(p, NULL);
6356 }
6357 else
6358 {
6359 cmd = scb->cmd;
6360 cmd->result = (DID_TIME_OUT << 16);
6361
6362 /*
6363 * Clear out this hardware SCB
6364 */
6365 aic_outb(p, 0, SCB_CONTROL);
6366
6367 /*
6368 * Clear out a few values in the card that are in an undetermined
6369 * state.
6370 */
6371 aic_outb(p, MSG_NOOP, MSG_OUT);
6372
6373 /*
6374 * Shift the waiting for selection queue forward
6375 */
6376 nextscb = aic_inb(p, SCB_NEXT);
6377 aic_outb(p, nextscb, WAITING_SCBH);
6378
6379 /*
6380 * Put this SCB back on the free list.
6381 */
6382 aic7xxx_add_curscb_to_free_list(p);
6383 #ifdef AIC7XXX_VERBOSE_DEBUGGING
6384 if (aic7xxx_verbose > 0xffff)
6385 printk(INFO_LEAD "Selection Timeout.\n", p->host_no, CTL_OF_SCB(scb));
6386 #endif
6387 if (scb->flags & SCB_QUEUED_ABORT)
6388 {
6389 /*
6390 * We know that this particular SCB had to be the queued abort since
6391 * the disconnected SCB would have gotten a reconnect instead.
6392 * What we need to do then is to let the command timeout again so
6393 * we get a reset since this abort just failed.
6394 */
6395 cmd->result = 0;
6396 scb = NULL;
6397 }
6398 }
6399 /*
6400 * Keep the sequencer from trying to restart any selections
6401 */
6402 aic_outb(p, aic_inb(p, SCSISEQ) & ~ENSELO, SCSISEQ);
6403 /*
6404 * Make sure the data bits on the bus are released
6405 * Don't do this on 7770 chipsets, it makes them give us
6406 * a BRKADDRINT and kills the card.
6407 */
6408 if( (p->chip & ~AHC_CHIPID_MASK) == AHC_PCI )
6409 aic_outb(p, 0, SCSIBUSL);
6410
6411 /*
6412 * Delay for the selection timeout delay period then stop the selection
6413 */
6414 udelay(301);
6415 aic_outb(p, CLRSELINGO, CLRSINT0);
6416 /*
6417 * Clear out all the interrupt status bits
6418 */
6419 aic_outb(p, aic_inb(p, SIMODE1) & ~(ENREQINIT|ENBUSFREE), SIMODE1);
6420 p->flags &= ~AHC_HANDLING_REQINITS;
6421 aic_outb(p, CLRSELTIMEO | CLRBUSFREE, CLRSINT1);
6422 aic_outb(p, CLRSCSIINT, CLRINT);
6423 /*
6424 * Restarting the sequencer will stop the selection and make sure devices
6425 * are allowed to reselect in.
6426 */
6427 restart_sequencer(p);
6428 unpause_sequencer(p, TRUE);
6429 }
6430 else if (scb == NULL)
6431 {
6432 printk(WARN_LEAD "aic7xxx_isr - referenced scb not valid "
6433 "during scsiint 0x%x scb(%d)\n"
6434 " SIMODE0 0x%x, SIMODE1 0x%x, SSTAT0 0x%x, SEQADDR 0x%x\n",
6435 p->host_no, -1, -1, -1, status, scb_index, aic_inb(p, SIMODE0),
6436 aic_inb(p, SIMODE1), aic_inb(p, SSTAT0),
6437 (aic_inb(p, SEQADDR1) << 8) | aic_inb(p, SEQADDR0));
6438 /*
6439 * Turn off the interrupt and set status to zero, so that it
6440 * falls through the rest of the SCSIINT code.
6441 */
6442 aic_outb(p, status, CLRSINT1);
6443 aic_outb(p, CLRSCSIINT, CLRINT);
6444 unpause_sequencer(p, /* unpause always */ TRUE);
6445 scb = NULL;
6446 }
6447 else if (status & SCSIPERR)
6448 {
6449 /*
6450 * Determine the bus phase and queue an appropriate message.
6451 */
6452 char *phase;
6453 Scsi_Cmnd *cmd;
6454 unsigned char mesg_out = MSG_NOOP;
6455 unsigned char lastphase = aic_inb(p, LASTPHASE);
6456 unsigned char sstat2 = aic_inb(p, SSTAT2);
6457 unsigned char tindex = TARGET_INDEX(scb->cmd);
6458
6459 cmd = scb->cmd;
6460 switch (lastphase)
6461 {
6462 case P_DATAOUT:
6463 phase = "Data-Out";
6464 break;
6465 case P_DATAIN:
6466 phase = "Data-In";
6467 mesg_out = MSG_INITIATOR_DET_ERR;
6468 break;
6469 case P_COMMAND:
6470 phase = "Command";
6471 break;
6472 case P_MESGOUT:
6473 phase = "Message-Out";
6474 break;
6475 case P_STATUS:
6476 phase = "Status";
6477 mesg_out = MSG_INITIATOR_DET_ERR;
6478 break;
6479 case P_MESGIN:
6480 phase = "Message-In";
6481 mesg_out = MSG_PARITY_ERROR;
6482 break;
6483 default:
6484 phase = "unknown";
6485 break;
6486 }
6487
6488 /*
6489 * A parity error has occurred during a data
6490 * transfer phase. Flag it and continue.
6491 */
6492 if( (p->features & AHC_ULTRA3) &&
6493 (aic_inb(p, SCSIRATE) & AHC_SYNCRATE_CRC) &&
6494 (lastphase == P_DATAIN) )
6495 {
6496 printk(WARN_LEAD "CRC error during %s phase.\n",
6497 p->host_no, CTL_OF_SCB(scb), phase);
6498 if(sstat2 & CRCVALERR)
6499 {
6500 printk(WARN_LEAD " CRC error in intermediate CRC packet.\n",
6501 p->host_no, CTL_OF_SCB(scb));
6502 }
6503 if(sstat2 & CRCENDERR)
6504 {
6505 printk(WARN_LEAD " CRC error in ending CRC packet.\n",
6506 p->host_no, CTL_OF_SCB(scb));
6507 }
6508 if(sstat2 & CRCREQERR)
6509 {
6510 printk(WARN_LEAD " Target incorrectly requested a CRC packet.\n",
6511 p->host_no, CTL_OF_SCB(scb));
6512 }
6513 if(sstat2 & DUAL_EDGE_ERROR)
6514 {
6515 printk(WARN_LEAD " Dual Edge transmission error.\n",
6516 p->host_no, CTL_OF_SCB(scb));
6517 }
6518 }
6519 else if( (lastphase == P_MESGOUT) &&
6520 (scb->flags & SCB_MSGOUT_PPR) )
6521 {
6522 /*
6523 * As per the draft specs, any device capable of supporting any of
6524 * the option values other than 0 are not allowed to reject the
6525 * PPR message. Instead, they must negotiate out what they do
6526 * support instead of rejecting our offering or else they cause
6527 * a parity error during msg_out phase to signal that they don't
6528 * like our settings.
6529 */
6530 p->needppr &= ~(1 << tindex);
6531 p->needppr_copy &= ~(1 << tindex);
6532 aic7xxx_set_width(p, scb->cmd->target, scb->cmd->channel, scb->cmd->lun,
6533 MSG_EXT_WDTR_BUS_8_BIT,
6534 (AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE));
6535 aic7xxx_set_syncrate(p, NULL, scb->cmd->target, scb->cmd->channel, 0, 0,
6536 0, AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE);
6537 p->transinfo[tindex].goal_options = 0;
6538 scb->flags &= ~SCB_MSGOUT_BITS;
6539 if(aic7xxx_verbose & VERBOSE_NEGOTIATION2)
6540 {
6541 printk(INFO_LEAD "parity error during PPR message, reverting "
6542 "to WDTR/SDTR\n", p->host_no, CTL_OF_SCB(scb));
6543 }
6544 if ( p->transinfo[tindex].goal_width )
6545 {
6546 p->needwdtr |= (1 << tindex);
6547 p->needwdtr_copy |= (1 << tindex);
6548 }
6549 if ( p->transinfo[tindex].goal_offset )
6550 {
6551 if( p->transinfo[tindex].goal_period <= 9 )
6552 {
6553 p->transinfo[tindex].goal_period = 10;
6554 }
6555 p->needsdtr |= (1 << tindex);
6556 p->needsdtr_copy |= (1 << tindex);
6557 }
6558 scb = NULL;
6559 }
6560
6561 /*
6562 * We've set the hardware to assert ATN if we get a parity
6563 * error on "in" phases, so all we need to do is stuff the
6564 * message buffer with the appropriate message. "In" phases
6565 * have set mesg_out to something other than MSG_NOP.
6566 */
6567 if (mesg_out != MSG_NOOP)
6568 {
6569 aic_outb(p, mesg_out, MSG_OUT);
6570 aic_outb(p, aic_inb(p, SCSISIGI) | ATNO, SCSISIGO);
6571 scb = NULL;
6572 }
6573 aic_outb(p, CLRSCSIPERR, CLRSINT1);
6574 aic_outb(p, CLRSCSIINT, CLRINT);
6575 unpause_sequencer(p, /* unpause_always */ TRUE);
6576 }
6577 else if ( (status & REQINIT) &&
6578 (p->flags & AHC_HANDLING_REQINITS) )
6579 {
6580 #ifdef AIC7XXX_VERBOSE_DEBUGGING
6581 if (aic7xxx_verbose > 0xffff)
6582 printk(INFO_LEAD "Handling REQINIT, SSTAT1=0x%x.\n", p->host_no,
6583 CTL_OF_SCB(scb), aic_inb(p, SSTAT1));
6584 #endif
6585 aic7xxx_handle_reqinit(p, scb);
6586 return;
6587 }
6588 else
6589 {
6590 /*
6591 * We don't know what's going on. Turn off the
6592 * interrupt source and try to continue.
6593 */
6594 if (aic7xxx_verbose & VERBOSE_SCSIINT)
6595 printk(INFO_LEAD "Unknown SCSIINT status, SSTAT1(0x%x).\n",
6596 p->host_no, -1, -1, -1, status);
6597 aic_outb(p, status, CLRSINT1);
6598 aic_outb(p, CLRSCSIINT, CLRINT);
6599 unpause_sequencer(p, /* unpause always */ TRUE);
6600 scb = NULL;
6601 }
6602 if (scb != NULL)
6603 {
6604 aic7xxx_done(p, scb);
6605 }
6606 }
6607
6608 #ifdef AIC7XXX_VERBOSE_DEBUGGING
6609 static void
6610 aic7xxx_check_scbs(struct aic7xxx_host *p, char *buffer)
6611 {
6612 unsigned char saved_scbptr, free_scbh, dis_scbh, wait_scbh, temp;
6613 int i, bogus, lost;
6614 static unsigned char scb_status[AIC7XXX_MAXSCB];
6615
6616 #define SCB_NO_LIST 0
6617 #define SCB_FREE_LIST 1
6618 #define SCB_WAITING_LIST 2
6619 #define SCB_DISCONNECTED_LIST 4
6620 #define SCB_CURRENTLY_ACTIVE 8
6621
6622 /*
6623 * Note, these checks will fail on a regular basis once the machine moves
6624 * beyond the bus scan phase. The problem is race conditions concerning
6625 * the scbs and where they are linked in. When you have 30 or so commands
6626 * outstanding on the bus, and run this twice with every interrupt, the
6627 * chances get pretty good that you'll catch the sequencer with an SCB
6628 * only partially linked in. Therefore, once we pass the scan phase
6629 * of the bus, we really should disable this function.
6630 */
6631 bogus = FALSE;
6632 memset(&scb_status[0], 0, sizeof(scb_status));
6633 pause_sequencer(p);
6634 saved_scbptr = aic_inb(p, SCBPTR);
6635 if (saved_scbptr >= p->scb_data->maxhscbs)
6636 {
6637 printk("Bogus SCBPTR %d\n", saved_scbptr);
6638 bogus = TRUE;
6639 }
6640 scb_status[saved_scbptr] = SCB_CURRENTLY_ACTIVE;
6641 free_scbh = aic_inb(p, FREE_SCBH);
6642 if ( (free_scbh != SCB_LIST_NULL) &&
6643 (free_scbh >= p->scb_data->maxhscbs) )
6644 {
6645 printk("Bogus FREE_SCBH %d\n", free_scbh);
6646 bogus = TRUE;
6647 }
6648 else
6649 {
6650 temp = free_scbh;
6651 while( (temp != SCB_LIST_NULL) && (temp < p->scb_data->maxhscbs) )
6652 {
6653 if(scb_status[temp] & 0x07)
6654 {
6655 printk("HSCB %d on multiple lists, status 0x%02x", temp,
6656 scb_status[temp] | SCB_FREE_LIST);
6657 bogus = TRUE;
6658 }
6659 scb_status[temp] |= SCB_FREE_LIST;
6660 aic_outb(p, temp, SCBPTR);
6661 temp = aic_inb(p, SCB_NEXT);
6662 }
6663 }
6664
6665 dis_scbh = aic_inb(p, DISCONNECTED_SCBH);
6666 if ( (dis_scbh != SCB_LIST_NULL) &&
6667 (dis_scbh >= p->scb_data->maxhscbs) )
6668 {
6669 printk("Bogus DISCONNECTED_SCBH %d\n", dis_scbh);
6670 bogus = TRUE;
6671 }
6672 else
6673 {
6674 temp = dis_scbh;
6675 while( (temp != SCB_LIST_NULL) && (temp < p->scb_data->maxhscbs) )
6676 {
6677 if(scb_status[temp] & 0x07)
6678 {
6679 printk("HSCB %d on multiple lists, status 0x%02x", temp,
6680 scb_status[temp] | SCB_DISCONNECTED_LIST);
6681 bogus = TRUE;
6682 }
6683 scb_status[temp] |= SCB_DISCONNECTED_LIST;
6684 aic_outb(p, temp, SCBPTR);
6685 temp = aic_inb(p, SCB_NEXT);
6686 }
6687 }
6688
6689 wait_scbh = aic_inb(p, WAITING_SCBH);
6690 if ( (wait_scbh != SCB_LIST_NULL) &&
6691 (wait_scbh >= p->scb_data->maxhscbs) )
6692 {
6693 printk("Bogus WAITING_SCBH %d\n", wait_scbh);
6694 bogus = TRUE;
6695 }
6696 else
6697 {
6698 temp = wait_scbh;
6699 while( (temp != SCB_LIST_NULL) && (temp < p->scb_data->maxhscbs) )
6700 {
6701 if(scb_status[temp] & 0x07)
6702 {
6703 printk("HSCB %d on multiple lists, status 0x%02x", temp,
6704 scb_status[temp] | SCB_WAITING_LIST);
6705 bogus = TRUE;
6706 }
6707 scb_status[temp] |= SCB_WAITING_LIST;
6708 aic_outb(p, temp, SCBPTR);
6709 temp = aic_inb(p, SCB_NEXT);
6710 }
6711 }
6712
6713 lost=0;
6714 for(i=0; i < p->scb_data->maxhscbs; i++)
6715 {
6716 aic_outb(p, i, SCBPTR);
6717 temp = aic_inb(p, SCB_NEXT);
6718 if ( ((temp != SCB_LIST_NULL) &&
6719 (temp >= p->scb_data->maxhscbs)) )
6720 {
6721 printk("HSCB %d bad, SCB_NEXT invalid(%d).\n", i, temp);
6722 bogus = TRUE;
6723 }
6724 if ( temp == i )
6725 {
6726 printk("HSCB %d bad, SCB_NEXT points to self.\n", i);
6727 bogus = TRUE;
6728 }
6729 if (scb_status[i] == 0)
6730 lost++;
6731 if (lost > 1)
6732 {
6733 printk("Too many lost scbs.\n");
6734 bogus=TRUE;
6735 }
6736 }
6737 aic_outb(p, saved_scbptr, SCBPTR);
6738 unpause_sequencer(p, FALSE);
6739 if (bogus)
6740 {
6741 printk("Bogus parameters found in card SCB array structures.\n");
6742 printk("%s\n", buffer);
6743 aic7xxx_panic_abort(p, NULL);
6744 }
6745 return;
6746 }
6747 #endif
6748
6749
6750 /*+F*************************************************************************
6751 * Function:
6752 * aic7xxx_handle_command_completion_intr
6753 *
6754 * Description:
6755 * SCSI command completion interrupt handler.
6756 *-F*************************************************************************/
6757 static void
6758 aic7xxx_handle_command_completion_intr(struct aic7xxx_host *p)
6759 {
6760 struct aic7xxx_scb *scb = NULL;
6761 Scsi_Cmnd *cmd;
6762 unsigned char scb_index, tindex;
6763
6764 #ifdef AIC7XXX_VERBOSE_DEBUGGING
6765 if( (p->isr_count < 16) && (aic7xxx_verbose > 0xffff) )
6766 printk(INFO_LEAD "Command Complete Int.\n", p->host_no, -1, -1, -1);
6767 #endif
6768
6769 /*
6770 * Read the INTSTAT location after clearing the CMDINT bit. This forces
6771 * any posted PCI writes to flush to memory. Gerard Roudier suggested
6772 * this fix to the possible race of clearing the CMDINT bit but not
6773 * having all command bytes flushed onto the qoutfifo.
6774 */
6775 aic_outb(p, CLRCMDINT, CLRINT);
6776 aic_inb(p, INTSTAT);
6777 /*
6778 * The sequencer will continue running when it
6779 * issues this interrupt. There may be >1 commands
6780 * finished, so loop until we've processed them all.
6781 */
6782
6783 while (p->qoutfifo[p->qoutfifonext] != SCB_LIST_NULL)
6784 {
6785 scb_index = p->qoutfifo[p->qoutfifonext];
6786 p->qoutfifo[p->qoutfifonext++] = SCB_LIST_NULL;
6787 if ( scb_index >= p->scb_data->numscbs )
6788 {
6789 printk(WARN_LEAD "CMDCMPLT with invalid SCB index %d\n", p->host_no,
6790 -1, -1, -1, scb_index);
6791 continue;
6792 }
6793 scb = p->scb_data->scb_array[scb_index];
6794 if (!(scb->flags & SCB_ACTIVE) || (scb->cmd == NULL))
6795 {
6796 printk(WARN_LEAD "CMDCMPLT without command for SCB %d, SCB flags "
6797 "0x%x, cmd 0x%lx\n", p->host_no, -1, -1, -1, scb_index, scb->flags,
6798 (unsigned long) scb->cmd);
6799 continue;
6800 }
6801 tindex = TARGET_INDEX(scb->cmd);
6802 if (scb->flags & SCB_QUEUED_ABORT)
6803 {
6804 pause_sequencer(p);
6805 if ( ((aic_inb(p, LASTPHASE) & PHASE_MASK) != P_BUSFREE) &&
6806 (aic_inb(p, SCB_TAG) == scb->hscb->tag) )
6807 {
6808 unpause_sequencer(p, FALSE);
6809 continue;
6810 }
6811 aic7xxx_reset_device(p, scb->cmd->target, scb->cmd->channel,
6812 scb->cmd->lun, scb->hscb->tag);
6813 scb->flags &= ~(SCB_QUEUED_FOR_DONE | SCB_RESET | SCB_ABORT |
6814 SCB_QUEUED_ABORT);
6815 unpause_sequencer(p, FALSE);
6816 }
6817 else if (scb->flags & SCB_ABORT)
6818 {
6819 /*
6820 * We started to abort this, but it completed on us, let it
6821 * through as successful
6822 */
6823 scb->flags &= ~(SCB_ABORT|SCB_RESET);
6824 }
6825 else if (scb->flags & SCB_SENSE)
6826 {
6827 char *buffer = &scb->cmd->sense_buffer[0];
6828
6829 if (buffer[12] == 0x47 || buffer[12] == 0x54)
6830 {
6831 /*
6832 * Signal that we need to re-negotiate things.
6833 */
6834 p->needppr |= (p->needppr_copy & (1<<tindex));
6835 p->needsdtr |= (p->needsdtr_copy & (1<<tindex));
6836 p->needwdtr |= (p->needwdtr_copy & (1<<tindex));
6837 }
6838 }
6839 switch (status_byte(scb->hscb->target_status))
6840 {
6841 case QUEUE_FULL:
6842 case BUSY:
6843 scb->hscb->target_status = 0;
6844 scb->cmd->result = 0;
6845 scb->hscb->residual_SG_segment_count = 0;
6846 scb->hscb->residual_data_count[0] = 0;
6847 scb->hscb->residual_data_count[1] = 0;
6848 scb->hscb->residual_data_count[2] = 0;
6849 aic7xxx_error(scb->cmd) = DID_OK;
6850 aic7xxx_status(scb->cmd) = 0;
6851 /*
6852 * The QUEUE_FULL/BUSY handler in aic7xxx_seqint takes care of putting
6853 * this command on a timer and allowing us to retry it. Here, we
6854 * just 0 out a few values so that they don't carry through to when
6855 * the command finally does complete.
6856 */
6857 break;
6858 default:
6859 cmd = scb->cmd;
6860 if (scb->hscb->residual_SG_segment_count != 0)
6861 {
6862 aic7xxx_calculate_residual(p, scb);
6863 }
6864 cmd->result |= (aic7xxx_error(cmd) << 16);
6865 aic7xxx_done(p, scb);
6866 break;
6867 }
6868 }
6869 }
6870
6871 /*+F*************************************************************************
6872 * Function:
6873 * aic7xxx_isr
6874 *
6875 * Description:
6876 * SCSI controller interrupt handler.
6877 *-F*************************************************************************/
6878 static void
6879 aic7xxx_isr(int irq, void *dev_id, struct pt_regs *regs)
6880 {
6881 struct aic7xxx_host *p;
6882 unsigned char intstat;
6883
6884 p = (struct aic7xxx_host *)dev_id;
6885
6886 /*
6887 * Just a few sanity checks. Make sure that we have an int pending.
6888 * Also, if PCI, then we are going to check for a PCI bus error status
6889 * should we get too many spurious interrupts.
6890 */
6891 if (!((intstat = aic_inb(p, INTSTAT)) & INT_PEND))
6892 {
6893 #ifdef CONFIG_PCI
6894 if ( (p->chip & AHC_PCI) && (p->spurious_int > 500) &&
6895 !(p->flags & AHC_HANDLING_REQINITS) )
6896 {
6897 if ( aic_inb(p, ERROR) & PCIERRSTAT )
6898 {
6899 aic7xxx_pci_intr(p);
6900 }
6901 p->spurious_int = 0;
6902 }
6903 else if ( !(p->flags & AHC_HANDLING_REQINITS) )
6904 {
6905 p->spurious_int++;
6906 }
6907 #endif
6908 return;
6909 }
6910
6911 p->spurious_int = 0;
6912
6913 /*
6914 * Keep track of interrupts for /proc/scsi
6915 */
6916 p->isr_count++;
6917
6918 #ifdef AIC7XXX_VERBOSE_DEBUGGING
6919 if ( (p->isr_count < 16) && (aic7xxx_verbose > 0xffff) &&
6920 (aic7xxx_panic_on_abort) && (p->flags & AHC_PAGESCBS) )
6921 aic7xxx_check_scbs(p, "Bogus settings at start of interrupt.");
6922 #endif
6923
6924 /*
6925 * Handle all the interrupt sources - especially for SCSI
6926 * interrupts, we won't get a second chance at them.
6927 */
6928 if (intstat & CMDCMPLT)
6929 {
6930 aic7xxx_handle_command_completion_intr(p);
6931 }
6932
6933 if (intstat & BRKADRINT)
6934 {
6935 int i;
6936 unsigned char errno = aic_inb(p, ERROR);
6937
6938 printk(KERN_ERR "(scsi%d) BRKADRINT error(0x%x):\n", p->host_no, errno);
6939 for (i = 0; i < NUMBER(hard_error); i++)
6940 {
6941 if (errno & hard_error[i].errno)
6942 {
6943 printk(KERN_ERR " %s\n", hard_error[i].errmesg);
6944 }
6945 }
6946 printk(KERN_ERR "(scsi%d) SEQADDR=0x%x\n", p->host_no,
6947 (((aic_inb(p, SEQADDR1) << 8) & 0x100) | aic_inb(p, SEQADDR0)));
6948 if (aic7xxx_panic_on_abort)
6949 aic7xxx_panic_abort(p, NULL);
6950 #ifdef CONFIG_PCI
6951 if (errno & PCIERRSTAT)
6952 aic7xxx_pci_intr(p);
6953 #endif
6954 if (errno & (SQPARERR | ILLOPCODE | ILLSADDR))
6955 {
6956 sti();
6957 panic("aic7xxx: unrecoverable BRKADRINT.\n");
6958 }
6959 if (errno & ILLHADDR)
6960 {
6961 printk(KERN_ERR "(scsi%d) BUG! Driver accessed chip without first "
6962 "pausing controller!\n", p->host_no);
6963 }
6964 #ifdef AIC7XXX_VERBOSE_DEBUGGING
6965 if (errno & DPARERR)
6966 {
6967 if (aic_inb(p, DMAPARAMS) & DIRECTION)
6968 printk("(scsi%d) while DMAing SCB from host to card.\n", p->host_no);
6969 else
6970 printk("(scsi%d) while DMAing SCB from card to host.\n", p->host_no);
6971 }
6972 #endif
6973 aic_outb(p, CLRPARERR | CLRBRKADRINT, CLRINT);
6974 unpause_sequencer(p, FALSE);
6975 }
6976
6977 if (intstat & SEQINT)
6978 {
6979 /*
6980 * Read the CCSCBCTL register to work around a bug in the Ultra2 cards
6981 */
6982 if(p->features & AHC_ULTRA2)
6983 {
6984 aic_inb(p, CCSCBCTL);
6985 }
6986 aic7xxx_handle_seqint(p, intstat);
6987 }
6988
6989 if (intstat & SCSIINT)
6990 {
6991 aic7xxx_handle_scsiint(p, intstat);
6992 }
6993
6994 #ifdef AIC7XXX_VERBOSE_DEBUGGING
6995 if ( (p->isr_count < 16) && (aic7xxx_verbose > 0xffff) &&
6996 (aic7xxx_panic_on_abort) && (p->flags & AHC_PAGESCBS) )
6997 aic7xxx_check_scbs(p, "Bogus settings at end of interrupt.");
6998 #endif
6999
7000 }
7001
7002 /*+F*************************************************************************
7003 * Function:
7004 * do_aic7xxx_isr
7005 *
7006 * Description:
7007 * This is a gross hack to solve a problem in linux kernels 2.1.85 and
7008 * above. Please, children, do not try this at home, and if you ever see
7009 * anything like it, please inform the Gross Hack Police immediately
7010 *-F*************************************************************************/
7011 static void
7012 do_aic7xxx_isr(int irq, void *dev_id, struct pt_regs *regs)
7013 {
7014 unsigned long cpu_flags;
7015 struct aic7xxx_host *p;
7016
7017 p = (struct aic7xxx_host *)dev_id;
7018 if(!p)
7019 return;
7020 spin_lock_irqsave(&io_request_lock, cpu_flags);
7021 p->flags |= AHC_IN_ISR;
7022 do
7023 {
7024 aic7xxx_isr(irq, dev_id, regs);
7025 } while ( (aic_inb(p, INTSTAT) & INT_PEND) );
7026 aic7xxx_done_cmds_complete(p);
7027 aic7xxx_run_waiting_queues(p);
7028 p->flags &= ~AHC_IN_ISR;
7029 spin_unlock_irqrestore(&io_request_lock, cpu_flags);
7030 }
7031
7032 /*+F*************************************************************************
7033 * Function:
7034 * aic7xxx_device_queue_depth
7035 *
7036 * Description:
7037 * Determines the queue depth for a given device. There are two ways
7038 * a queue depth can be obtained for a tagged queueing device. One
7039 * way is the default queue depth which is determined by whether
7040 * AIC7XXX_CMDS_PER_DEVICE is defined. If it is defined, then it is used
7041 * as the default queue depth. Otherwise, we use either 4 or 8 as the
7042 * default queue depth (dependent on the number of hardware SCBs).
7043 * The other way we determine queue depth is through the use of the
7044 * aic7xxx_tag_info array which is enabled by defining
7045 * AIC7XXX_TAGGED_QUEUEING_BY_DEVICE. This array can be initialized
7046 * with queue depths for individual devices. It also allows tagged
7047 * queueing to be [en|dis]abled for a specific adapter.
7048 *-F*************************************************************************/
7049 static int
7050 aic7xxx_device_queue_depth(struct aic7xxx_host *p, Scsi_Device *device)
7051 {
7052 int default_depth = 3;
7053 unsigned char tindex;
7054 unsigned short target_mask;
7055
7056 tindex = device->id | (device->channel << 3);
7057 target_mask = (1 << tindex);
7058
7059 if (p->dev_max_queue_depth[tindex] > 1)
7060 {
7061 /*
7062 * We've already scanned this device, leave it alone
7063 */
7064 return(p->dev_max_queue_depth[tindex]);
7065 }
7066
7067 device->queue_depth = default_depth;
7068 p->dev_temp_queue_depth[tindex] = 1;
7069 p->dev_max_queue_depth[tindex] = 1;
7070 p->tagenable &= ~target_mask;
7071
7072 if (device->tagged_supported)
7073 {
7074 int tag_enabled = TRUE;
7075
7076 default_depth = AIC7XXX_CMDS_PER_DEVICE;
7077
7078 if (!(p->discenable & target_mask))
7079 {
7080 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
7081 printk(INFO_LEAD "Disconnection disabled, unable to "
7082 "enable tagged queueing.\n",
7083 p->host_no, device->channel, device->id, device->lun);
7084 }
7085 else
7086 {
7087 if (p->instance >= NUMBER(aic7xxx_tag_info))
7088 {
7089 static int print_warning = TRUE;
7090 if(print_warning)
7091 {
7092 printk(KERN_INFO "aic7xxx: WARNING, insufficient tag_info instances for"
7093 " installed controllers.\n");
7094 printk(KERN_INFO "aic7xxx: Please update the aic7xxx_tag_info array in"
7095 " the aic7xxx.c source file.\n");
7096 print_warning = FALSE;
7097 }
7098 device->queue_depth = default_depth;
7099 }
7100 else
7101 {
7102
7103 if (aic7xxx_tag_info[p->instance].tag_commands[tindex] == 255)
7104 {
7105 tag_enabled = FALSE;
7106 device->queue_depth = 3; /* Tagged queueing is disabled. */
7107 }
7108 else if (aic7xxx_tag_info[p->instance].tag_commands[tindex] == 0)
7109 {
7110 device->queue_depth = default_depth;
7111 }
7112 else
7113 {
7114 device->queue_depth =
7115 aic7xxx_tag_info[p->instance].tag_commands[tindex];
7116 }
7117 }
7118 if ((device->tagged_queue == 0) && tag_enabled)
7119 {
7120 if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
7121 {
7122 printk(INFO_LEAD "Enabled tagged queuing, queue depth %d.\n",
7123 p->host_no, device->channel, device->id,
7124 device->lun, device->queue_depth);
7125 }
7126 p->dev_max_queue_depth[tindex] = device->queue_depth;
7127 p->dev_temp_queue_depth[tindex] = device->queue_depth;
7128 p->tagenable |= target_mask;
7129 p->orderedtag |= target_mask;
7130 device->tagged_queue = 1;
7131 device->current_tag = SCB_LIST_NULL;
7132 }
7133 }
7134 }
7135 return(p->dev_max_queue_depth[tindex]);
7136 }
7137
7138 /*+F*************************************************************************
7139 * Function:
7140 * aic7xxx_select_queue_depth
7141 *
7142 * Description:
7143 * Sets the queue depth for each SCSI device hanging off the input
7144 * host adapter. We use a queue depth of 2 for devices that do not
7145 * support tagged queueing. If AIC7XXX_CMDS_PER_LUN is defined, we
7146 * use that for tagged queueing devices; otherwise we use our own
7147 * algorithm for determining the queue depth based on the maximum
7148 * SCBs for the controller.
7149 *-F*************************************************************************/
7150 static void
7151 aic7xxx_select_queue_depth(struct Scsi_Host *host,
7152 Scsi_Device *scsi_devs)
7153 {
7154 Scsi_Device *device;
7155 struct aic7xxx_host *p = (struct aic7xxx_host *) host->hostdata;
7156 int scbnum;
7157
7158 scbnum = 0;
7159 for (device = scsi_devs; device != NULL; device = device->next)
7160 {
7161 if (device->host == host)
7162 {
7163 scbnum += aic7xxx_device_queue_depth(p, device);
7164 }
7165 }
7166 while (scbnum > p->scb_data->numscbs)
7167 {
7168 /*
7169 * Pre-allocate the needed SCBs to get around the possibility of having
7170 * to allocate some when memory is more or less exhausted and we need
7171 * the SCB in order to perform a swap operation (possible deadlock)
7172 */
7173 if ( aic7xxx_allocate_scb(p) == 0 )
7174 return;
7175 }
7176 }
7177
7178 /*+F*************************************************************************
7179 * Function:
7180 * aic7xxx_probe
7181 *
7182 * Description:
7183 * Probing for EISA boards: it looks like the first two bytes
7184 * are a manufacturer code - three characters, five bits each:
7185 *
7186 * BYTE 0 BYTE 1 BYTE 2 BYTE 3
7187 * ?1111122 22233333 PPPPPPPP RRRRRRRR
7188 *
7189 * The characters are baselined off ASCII '@', so add that value
7190 * to each to get the real ASCII code for it. The next two bytes
7191 * appear to be a product and revision number, probably vendor-
7192 * specific. This is what is being searched for at each port,
7193 * and what should probably correspond to the ID= field in the
7194 * ECU's .cfg file for the card - if your card is not detected,
7195 * make sure your signature is listed in the array.
7196 *
7197 * The fourth byte's lowest bit seems to be an enabled/disabled
7198 * flag (rest of the bits are reserved?).
7199 *
7200 * NOTE: This function is only needed on Intel and Alpha platforms,
7201 * the other platforms we support don't have EISA/VLB busses. So,
7202 * we #ifdef this entire function to avoid compiler warnings about
7203 * an unused function.
7204 *-F*************************************************************************/
7205 #if defined(__i386__) || defined(__alpha__)
7206 static int
7207 aic7xxx_probe(int slot, int base, ahc_flag_type *flags)
7208 {
7209 int i;
7210 unsigned char buf[4];
7211
7212 static struct {
7213 int n;
7214 unsigned char signature[sizeof(buf)];
7215 ahc_chip type;
7216 int bios_disabled;
7217 } AIC7xxx[] = {
7218 { 4, { 0x04, 0x90, 0x77, 0x70 },
7219 AHC_AIC7770|AHC_EISA, FALSE }, /* mb 7770 */
7220 { 4, { 0x04, 0x90, 0x77, 0x71 },
7221 AHC_AIC7770|AHC_EISA, FALSE }, /* host adapter 274x */
7222 { 4, { 0x04, 0x90, 0x77, 0x56 },
7223 AHC_AIC7770|AHC_VL, FALSE }, /* 284x BIOS enabled */
7224 { 4, { 0x04, 0x90, 0x77, 0x57 },
7225 AHC_AIC7770|AHC_VL, TRUE } /* 284x BIOS disabled */
7226 };
7227
7228 /*
7229 * The VL-bus cards need to be primed by
7230 * writing before a signature check.
7231 */
7232 for (i = 0; i < sizeof(buf); i++)
7233 {
7234 outb(0x80 + i, base);
7235 buf[i] = inb(base + i);
7236 }
7237
7238 for (i = 0; i < NUMBER(AIC7xxx); i++)
7239 {
7240 /*
7241 * Signature match on enabled card?
7242 */
7243 if (!memcmp(buf, AIC7xxx[i].signature, AIC7xxx[i].n))
7244 {
7245 if (inb(base + 4) & 1)
7246 {
7247 if (AIC7xxx[i].bios_disabled)
7248 {
7249 *flags |= AHC_USEDEFAULTS;
7250 }
7251 else
7252 {
7253 *flags |= AHC_BIOS_ENABLED;
7254 }
7255 return (i);
7256 }
7257
7258 printk("aic7xxx: <Adaptec 7770 SCSI Host Adapter> "
7259 "disabled at slot %d, ignored.\n", slot);
7260 }
7261 }
7262
7263 return (-1);
7264 }
7265 #endif /* (__i386__) || (__alpha__) */
7266
7267
7268 /*+F*************************************************************************
7269 * Function:
7270 * read_2840_seeprom
7271 *
7272 * Description:
7273 * Reads the 2840 serial EEPROM and returns 1 if successful and 0 if
7274 * not successful.
7275 *
7276 * See read_seeprom (for the 2940) for the instruction set of the 93C46
7277 * chip.
7278 *
7279 * The 2840 interface to the 93C46 serial EEPROM is through the
7280 * STATUS_2840 and SEECTL_2840 registers. The CS_2840, CK_2840, and
7281 * DO_2840 bits of the SEECTL_2840 register are connected to the chip
7282 * select, clock, and data out lines respectively of the serial EEPROM.
7283 * The DI_2840 bit of the STATUS_2840 is connected to the data in line
7284 * of the serial EEPROM. The EEPROM_TF bit of STATUS_2840 register is
7285 * useful in that it gives us an 800 nsec timer. After a read from the
7286 * SEECTL_2840 register the timing flag is cleared and goes high 800 nsec
7287 * later.
7288 *-F*************************************************************************/
7289 static int
7290 read_284x_seeprom(struct aic7xxx_host *p, struct seeprom_config *sc)
7291 {
7292 int i = 0, k = 0;
7293 unsigned char temp;
7294 unsigned short checksum = 0;
7295 unsigned short *seeprom = (unsigned short *) sc;
7296 struct seeprom_cmd {
7297 unsigned char len;
7298 unsigned char bits[3];
7299 };
7300 struct seeprom_cmd seeprom_read = {3, {1, 1, 0}};
7301
7302 #define CLOCK_PULSE(p) \
7303 while ((aic_inb(p, STATUS_2840) & EEPROM_TF) == 0) \
7304 { \
7305 ; /* Do nothing */ \
7306 } \
7307 (void) aic_inb(p, SEECTL_2840);
7308
7309 /*
7310 * Read the first 32 registers of the seeprom. For the 2840,
7311 * the 93C46 SEEPROM is a 1024-bit device with 64 16-bit registers
7312 * but only the first 32 are used by Adaptec BIOS. The loop
7313 * will range from 0 to 31.
7314 */
7315 for (k = 0; k < (sizeof(*sc) / 2); k++)
7316 {
7317 /*
7318 * Send chip select for one clock cycle.
7319 */
7320 aic_outb(p, CK_2840 | CS_2840, SEECTL_2840);
7321 CLOCK_PULSE(p);
7322
7323 /*
7324 * Now we're ready to send the read command followed by the
7325 * address of the 16-bit register we want to read.
7326 */
7327 for (i = 0; i < seeprom_read.len; i++)
7328 {
7329 temp = CS_2840 | seeprom_read.bits[i];
7330 aic_outb(p, temp, SEECTL_2840);
7331 CLOCK_PULSE(p);
7332 temp = temp ^ CK_2840;
7333 aic_outb(p, temp, SEECTL_2840);
7334 CLOCK_PULSE(p);
7335 }
7336 /*
7337 * Send the 6 bit address (MSB first, LSB last).
7338 */
7339 for (i = 5; i >= 0; i--)
7340 {
7341 temp = k;
7342 temp = (temp >> i) & 1; /* Mask out all but lower bit. */
7343 temp = CS_2840 | temp;
7344 aic_outb(p, temp, SEECTL_2840);
7345 CLOCK_PULSE(p);
7346 temp = temp ^ CK_2840;
7347 aic_outb(p, temp, SEECTL_2840);
7348 CLOCK_PULSE(p);
7349 }
7350
7351 /*
7352 * Now read the 16 bit register. An initial 0 precedes the
7353 * register contents which begins with bit 15 (MSB) and ends
7354 * with bit 0 (LSB). The initial 0 will be shifted off the
7355 * top of our word as we let the loop run from 0 to 16.
7356 */
7357 for (i = 0; i <= 16; i++)
7358 {
7359 temp = CS_2840;
7360 aic_outb(p, temp, SEECTL_2840);
7361 CLOCK_PULSE(p);
7362 temp = temp ^ CK_2840;
7363 seeprom[k] = (seeprom[k] << 1) | (aic_inb(p, STATUS_2840) & DI_2840);
7364 aic_outb(p, temp, SEECTL_2840);
7365 CLOCK_PULSE(p);
7366 }
7367 /*
7368 * The serial EEPROM has a checksum in the last word. Keep a
7369 * running checksum for all words read except for the last
7370 * word. We'll verify the checksum after all words have been
7371 * read.
7372 */
7373 if (k < (sizeof(*sc) / 2) - 1)
7374 {
7375 checksum = checksum + seeprom[k];
7376 }
7377
7378 /*
7379 * Reset the chip select for the next command cycle.
7380 */
7381 aic_outb(p, 0, SEECTL_2840);
7382 CLOCK_PULSE(p);
7383 aic_outb(p, CK_2840, SEECTL_2840);
7384 CLOCK_PULSE(p);
7385 aic_outb(p, 0, SEECTL_2840);
7386 CLOCK_PULSE(p);
7387 }
7388
7389 #if 0
7390 printk("Computed checksum 0x%x, checksum read 0x%x\n", checksum, sc->checksum);
7391 printk("Serial EEPROM:");
7392 for (k = 0; k < (sizeof(*sc) / 2); k++)
7393 {
7394 if (((k % 8) == 0) && (k != 0))
7395 {
7396 printk("\n ");
7397 }
7398 printk(" 0x%x", seeprom[k]);
7399 }
7400 printk("\n");
7401 #endif
7402
7403 if (checksum != sc->checksum)
7404 {
7405 printk("aic7xxx: SEEPROM checksum error, ignoring SEEPROM settings.\n");
7406 return (0);
7407 }
7408
7409 return (1);
7410 #undef CLOCK_PULSE
7411 }
7412
7413 #define CLOCK_PULSE(p) \
7414 do { \
7415 int limit = 0; \
7416 do { \
7417 mb(); \
7418 pause_sequencer(p); /* This is just to generate some PCI */ \
7419 /* traffic so the PCI read is flushed */ \
7420 /* it shouldn't be needed, but some */ \
7421 /* chipsets do indeed appear to need */ \
7422 /* something to force PCI reads to get */ \
7423 /* flushed */ \
7424 udelay(1); /* Do nothing */ \
7425 } while (((aic_inb(p, SEECTL) & SEERDY) == 0) && (++limit < 1000)); \
7426 } while(0)
7427
7428 /*+F*************************************************************************
7429 * Function:
7430 * acquire_seeprom
7431 *
7432 * Description:
7433 * Acquires access to the memory port on PCI controllers.
7434 *-F*************************************************************************/
7435 static int
7436 acquire_seeprom(struct aic7xxx_host *p)
7437 {
7438
7439 /*
7440 * Request access of the memory port. When access is
7441 * granted, SEERDY will go high. We use a 1 second
7442 * timeout which should be near 1 second more than
7443 * is needed. Reason: after the 7870 chip reset, there
7444 * should be no contention.
7445 */
7446 aic_outb(p, SEEMS, SEECTL);
7447 CLOCK_PULSE(p);
7448 if ((aic_inb(p, SEECTL) & SEERDY) == 0)
7449 {
7450 aic_outb(p, 0, SEECTL);
7451 return (0);
7452 }
7453 return (1);
7454 }
7455
7456 /*+F*************************************************************************
7457 * Function:
7458 * release_seeprom
7459 *
7460 * Description:
7461 * Releases access to the memory port on PCI controllers.
7462 *-F*************************************************************************/
7463 static void
7464 release_seeprom(struct aic7xxx_host *p)
7465 {
7466 /*
7467 * Make sure the SEEPROM is ready before we release it.
7468 */
7469 CLOCK_PULSE(p);
7470 aic_outb(p, 0, SEECTL);
7471 }
7472
7473 /*+F*************************************************************************
7474 * Function:
7475 * read_seeprom
7476 *
7477 * Description:
7478 * Reads the serial EEPROM and returns 1 if successful and 0 if
7479 * not successful.
7480 *
7481 * The instruction set of the 93C46/56/66 chips is as follows:
7482 *
7483 * Start OP
7484 * Function Bit Code Address Data Description
7485 * -------------------------------------------------------------------
7486 * READ 1 10 A5 - A0 Reads data stored in memory,
7487 * starting at specified address
7488 * EWEN 1 00 11XXXX Write enable must precede
7489 * all programming modes
7490 * ERASE 1 11 A5 - A0 Erase register A5A4A3A2A1A0
7491 * WRITE 1 01 A5 - A0 D15 - D0 Writes register
7492 * ERAL 1 00 10XXXX Erase all registers
7493 * WRAL 1 00 01XXXX D15 - D0 Writes to all registers
7494 * EWDS 1 00 00XXXX Disables all programming
7495 * instructions
7496 * *Note: A value of X for address is a don't care condition.
7497 * *Note: The 93C56 and 93C66 have 8 address bits.
7498 *
7499 *
7500 * The 93C46 has a four wire interface: clock, chip select, data in, and
7501 * data out. In order to perform one of the above functions, you need
7502 * to enable the chip select for a clock period (typically a minimum of
7503 * 1 usec, with the clock high and low a minimum of 750 and 250 nsec
7504 * respectively. While the chip select remains high, you can clock in
7505 * the instructions (above) starting with the start bit, followed by the
7506 * OP code, Address, and Data (if needed). For the READ instruction, the
7507 * requested 16-bit register contents is read from the data out line but
7508 * is preceded by an initial zero (leading 0, followed by 16-bits, MSB
7509 * first). The clock cycling from low to high initiates the next data
7510 * bit to be sent from the chip.
7511 *
7512 * The 78xx interface to the 93C46 serial EEPROM is through the SEECTL
7513 * register. After successful arbitration for the memory port, the
7514 * SEECS bit of the SEECTL register is connected to the chip select.
7515 * The SEECK, SEEDO, and SEEDI are connected to the clock, data out,
7516 * and data in lines respectively. The SEERDY bit of SEECTL is useful
7517 * in that it gives us an 800 nsec timer. After a write to the SEECTL
7518 * register, the SEERDY goes high 800 nsec later. The one exception
7519 * to this is when we first request access to the memory port. The
7520 * SEERDY goes high to signify that access has been granted and, for
7521 * this case, has no implied timing.
7522 *-F*************************************************************************/
7523 static int
7524 read_seeprom(struct aic7xxx_host *p, int offset,
7525 unsigned short *scarray, unsigned int len, seeprom_chip_type chip)
7526 {
7527 int i = 0, k;
7528 unsigned char temp;
7529 unsigned short checksum = 0;
7530 struct seeprom_cmd {
7531 unsigned char len;
7532 unsigned char bits[3];
7533 };
7534 struct seeprom_cmd seeprom_read = {3, {1, 1, 0}};
7535
7536 /*
7537 * Request access of the memory port.
7538 */
7539 if (acquire_seeprom(p) == 0)
7540 {
7541 return (0);
7542 }
7543
7544 /*
7545 * Read 'len' registers of the seeprom. For the 7870, the 93C46
7546 * SEEPROM is a 1024-bit device with 64 16-bit registers but only
7547 * the first 32 are used by Adaptec BIOS. Some adapters use the
7548 * 93C56 SEEPROM which is a 2048-bit device. The loop will range
7549 * from 0 to 'len' - 1.
7550 */
7551 for (k = 0; k < len; k++)
7552 {
7553 /*
7554 * Send chip select for one clock cycle.
7555 */
7556 aic_outb(p, SEEMS | SEECK | SEECS, SEECTL);
7557 CLOCK_PULSE(p);
7558
7559 /*
7560 * Now we're ready to send the read command followed by the
7561 * address of the 16-bit register we want to read.
7562 */
7563 for (i = 0; i < seeprom_read.len; i++)
7564 {
7565 temp = SEEMS | SEECS | (seeprom_read.bits[i] << 1);
7566 aic_outb(p, temp, SEECTL);
7567 CLOCK_PULSE(p);
7568 temp = temp ^ SEECK;
7569 aic_outb(p, temp, SEECTL);
7570 CLOCK_PULSE(p);
7571 }
7572 /*
7573 * Send the 6 or 8 bit address (MSB first, LSB last).
7574 */
7575 for (i = ((int) chip - 1); i >= 0; i--)
7576 {
7577 temp = k + offset;
7578 temp = (temp >> i) & 1; /* Mask out all but lower bit. */
7579 temp = SEEMS | SEECS | (temp << 1);
7580 aic_outb(p, temp, SEECTL);
7581 CLOCK_PULSE(p);
7582 temp = temp ^ SEECK;
7583 aic_outb(p, temp, SEECTL);
7584 CLOCK_PULSE(p);
7585 }
7586
7587 /*
7588 * Now read the 16 bit register. An initial 0 precedes the
7589 * register contents which begins with bit 15 (MSB) and ends
7590 * with bit 0 (LSB). The initial 0 will be shifted off the
7591 * top of our word as we let the loop run from 0 to 16.
7592 */
7593 for (i = 0; i <= 16; i++)
7594 {
7595 temp = SEEMS | SEECS;
7596 aic_outb(p, temp, SEECTL);
7597 CLOCK_PULSE(p);
7598 temp = temp ^ SEECK;
7599 scarray[k] = (scarray[k] << 1) | (aic_inb(p, SEECTL) & SEEDI);
7600 aic_outb(p, temp, SEECTL);
7601 CLOCK_PULSE(p);
7602 }
7603
7604 /*
7605 * The serial EEPROM should have a checksum in the last word.
7606 * Keep a running checksum for all words read except for the
7607 * last word. We'll verify the checksum after all words have
7608 * been read.
7609 */
7610 if (k < (len - 1))
7611 {
7612 checksum = checksum + scarray[k];
7613 }
7614
7615 /*
7616 * Reset the chip select for the next command cycle.
7617 */
7618 aic_outb(p, SEEMS, SEECTL);
7619 CLOCK_PULSE(p);
7620 aic_outb(p, SEEMS | SEECK, SEECTL);
7621 CLOCK_PULSE(p);
7622 aic_outb(p, SEEMS, SEECTL);
7623 CLOCK_PULSE(p);
7624 }
7625
7626 /*
7627 * Release access to the memory port and the serial EEPROM.
7628 */
7629 release_seeprom(p);
7630
7631 #if 0
7632 printk("Computed checksum 0x%x, checksum read 0x%x\n",
7633 checksum, scarray[len - 1]);
7634 printk("Serial EEPROM:");
7635 for (k = 0; k < len; k++)
7636 {
7637 if (((k % 8) == 0) && (k != 0))
7638 {
7639 printk("\n ");
7640 }
7641 printk(" 0x%x", scarray[k]);
7642 }
7643 printk("\n");
7644 #endif
7645 if ( (checksum != scarray[len - 1]) || (checksum == 0) )
7646 {
7647 return (0);
7648 }
7649
7650 return (1);
7651 }
7652
7653 /*+F*************************************************************************
7654 * Function:
7655 * read_brdctl
7656 *
7657 * Description:
7658 * Reads the BRDCTL register.
7659 *-F*************************************************************************/
7660 static unsigned char
7661 read_brdctl(struct aic7xxx_host *p)
7662 {
7663 unsigned char brdctl, value;
7664
7665 /*
7666 * Make sure the SEEPROM is ready before we access it
7667 */
7668 CLOCK_PULSE(p);
7669 if (p->features & AHC_ULTRA2)
7670 {
7671 brdctl = BRDRW_ULTRA2;
7672 aic_outb(p, brdctl, BRDCTL);
7673 CLOCK_PULSE(p);
7674 value = aic_inb(p, BRDCTL);
7675 CLOCK_PULSE(p);
7676 return(value);
7677 }
7678 brdctl = BRDRW;
7679 if ( !((p->chip & AHC_CHIPID_MASK) == AHC_AIC7895) ||
7680 (p->flags & AHC_CHNLB) )
7681 {
7682 brdctl |= BRDCS;
7683 }
7684 aic_outb(p, brdctl, BRDCTL);
7685 CLOCK_PULSE(p);
7686 value = aic_inb(p, BRDCTL);
7687 CLOCK_PULSE(p);
7688 aic_outb(p, 0, BRDCTL);
7689 CLOCK_PULSE(p);
7690 return (value);
7691 }
7692
7693 /*+F*************************************************************************
7694 * Function:
7695 * write_brdctl
7696 *
7697 * Description:
7698 * Writes a value to the BRDCTL register.
7699 *-F*************************************************************************/
7700 static void
7701 write_brdctl(struct aic7xxx_host *p, unsigned char value)
7702 {
7703 unsigned char brdctl;
7704
7705 /*
7706 * Make sure the SEEPROM is ready before we access it
7707 */
7708 CLOCK_PULSE(p);
7709 if (p->features & AHC_ULTRA2)
7710 {
7711 brdctl = value;
7712 aic_outb(p, brdctl, BRDCTL);
7713 CLOCK_PULSE(p);
7714 brdctl |= BRDSTB_ULTRA2;
7715 aic_outb(p, brdctl, BRDCTL);
7716 CLOCK_PULSE(p);
7717 brdctl &= ~BRDSTB_ULTRA2;
7718 aic_outb(p, brdctl, BRDCTL);
7719 CLOCK_PULSE(p);
7720 read_brdctl(p);
7721 CLOCK_PULSE(p);
7722 }
7723 else
7724 {
7725 brdctl = BRDSTB;
7726 if ( !((p->chip & AHC_CHIPID_MASK) == AHC_AIC7895) ||
7727 (p->flags & AHC_CHNLB) )
7728 {
7729 brdctl |= BRDCS;
7730 }
7731 brdctl = BRDSTB | BRDCS;
7732 aic_outb(p, brdctl, BRDCTL);
7733 CLOCK_PULSE(p);
7734 brdctl |= value;
7735 aic_outb(p, brdctl, BRDCTL);
7736 CLOCK_PULSE(p);
7737 brdctl &= ~BRDSTB;
7738 aic_outb(p, brdctl, BRDCTL);
7739 CLOCK_PULSE(p);
7740 brdctl &= ~BRDCS;
7741 aic_outb(p, brdctl, BRDCTL);
7742 CLOCK_PULSE(p);
7743 }
7744 }
7745
7746 /*+F*************************************************************************
7747 * Function:
7748 * aic785x_cable_detect
7749 *
7750 * Description:
7751 * Detect the cables that are present on aic785x class controller chips
7752 *-F*************************************************************************/
7753 static void
7754 aic785x_cable_detect(struct aic7xxx_host *p, int *int_50,
7755 int *ext_present, int *eeprom)
7756 {
7757 unsigned char brdctl;
7758
7759 aic_outb(p, BRDRW | BRDCS, BRDCTL);
7760 CLOCK_PULSE(p);
7761 aic_outb(p, 0, BRDCTL);
7762 CLOCK_PULSE(p);
7763 brdctl = aic_inb(p, BRDCTL);
7764 CLOCK_PULSE(p);
7765 *int_50 = !(brdctl & BRDDAT5);
7766 *ext_present = !(brdctl & BRDDAT6);
7767 *eeprom = (aic_inb(p, SPIOCAP) & EEPROM);
7768 }
7769
7770 #undef CLOCK_PULSE
7771
7772 /*+F*************************************************************************
7773 * Function:
7774 * aic2940_uwpro_cable_detect
7775 *
7776 * Description:
7777 * Detect the cables that are present on the 2940-UWPro cards
7778 *
7779 * NOTE: This function assumes the SEEPROM will have already been acquired
7780 * prior to invocation of this function.
7781 *-F*************************************************************************/
7782 static void
7783 aic2940_uwpro_wide_cable_detect(struct aic7xxx_host *p, int *int_68,
7784 int *ext_68, int *eeprom)
7785 {
7786 unsigned char brdctl;
7787
7788 /*
7789 * First read the status of our cables. Set the rom bank to
7790 * 0 since the bank setting serves as a multiplexor for the
7791 * cable detection logic. BRDDAT5 controls the bank switch.
7792 */
7793 write_brdctl(p, 0);
7794
7795 /*
7796 * Now we read the state of the internal 68 connector. BRDDAT6
7797 * is don't care, BRDDAT7 is internal 68. The cable is
7798 * present if the bit is 0
7799 */
7800 brdctl = read_brdctl(p);
7801 *int_68 = !(brdctl & BRDDAT7);
7802
7803 /*
7804 * Set the bank bit in brdctl and then read the external cable state
7805 * and the EEPROM status
7806 */
7807 write_brdctl(p, BRDDAT5);
7808 brdctl = read_brdctl(p);
7809
7810 *ext_68 = !(brdctl & BRDDAT6);
7811 *eeprom = !(brdctl & BRDDAT7);
7812
7813 /*
7814 * We're done, the calling function will release the SEEPROM for us
7815 */
7816 }
7817
7818 /*+F*************************************************************************
7819 * Function:
7820 * aic787x_cable_detect
7821 *
7822 * Description:
7823 * Detect the cables that are present on aic787x class controller chips
7824 *
7825 * NOTE: This function assumes the SEEPROM will have already been acquired
7826 * prior to invocation of this function.
7827 *-F*************************************************************************/
7828 static void
7829 aic787x_cable_detect(struct aic7xxx_host *p, int *int_50, int *int_68,
7830 int *ext_present, int *eeprom)
7831 {
7832 unsigned char brdctl;
7833
7834 /*
7835 * First read the status of our cables. Set the rom bank to
7836 * 0 since the bank setting serves as a multiplexor for the
7837 * cable detection logic. BRDDAT5 controls the bank switch.
7838 */
7839 write_brdctl(p, 0);
7840
7841 /*
7842 * Now we read the state of the two internal connectors. BRDDAT6
7843 * is internal 50, BRDDAT7 is internal 68. For each, the cable is
7844 * present if the bit is 0
7845 */
7846 brdctl = read_brdctl(p);
7847 *int_50 = !(brdctl & BRDDAT6);
7848 *int_68 = !(brdctl & BRDDAT7);
7849
7850 /*
7851 * Set the bank bit in brdctl and then read the external cable state
7852 * and the EEPROM status
7853 */
7854 write_brdctl(p, BRDDAT5);
7855 brdctl = read_brdctl(p);
7856
7857 *ext_present = !(brdctl & BRDDAT6);
7858 *eeprom = !(brdctl & BRDDAT7);
7859
7860 /*
7861 * We're done, the calling function will release the SEEPROM for us
7862 */
7863 }
7864
7865 /*+F*************************************************************************
7866 * Function:
7867 * aic787x_ultra2_term_detect
7868 *
7869 * Description:
7870 * Detect the termination settings present on ultra2 class controllers
7871 *
7872 * NOTE: This function assumes the SEEPROM will have already been acquired
7873 * prior to invocation of this function.
7874 *-F*************************************************************************/
7875 static void
7876 aic7xxx_ultra2_term_detect(struct aic7xxx_host *p, int *enableSE_low,
7877 int *enableSE_high, int *enableLVD_low,
7878 int *enableLVD_high, int *eprom_present)
7879 {
7880 unsigned char brdctl;
7881
7882 brdctl = read_brdctl(p);
7883
7884 *eprom_present = (brdctl & BRDDAT7);
7885 *enableSE_high = (brdctl & BRDDAT6);
7886 *enableSE_low = (brdctl & BRDDAT5);
7887 *enableLVD_high = (brdctl & BRDDAT4);
7888 *enableLVD_low = (brdctl & BRDDAT3);
7889 }
7890
7891 /*+F*************************************************************************
7892 * Function:
7893 * configure_termination
7894 *
7895 * Description:
7896 * Configures the termination settings on PCI adapters that have
7897 * SEEPROMs available.
7898 *-F*************************************************************************/
7899 static void
7900 configure_termination(struct aic7xxx_host *p)
7901 {
7902 int internal50_present = 0;
7903 int internal68_present = 0;
7904 int external_present = 0;
7905 int eprom_present = 0;
7906 int enableSE_low = 0;
7907 int enableSE_high = 0;
7908 int enableLVD_low = 0;
7909 int enableLVD_high = 0;
7910 unsigned char brddat = 0;
7911 unsigned char max_target = 0;
7912 unsigned char sxfrctl1 = aic_inb(p, SXFRCTL1);
7913
7914 if (acquire_seeprom(p))
7915 {
7916 if (p->features & (AHC_WIDE|AHC_TWIN))
7917 max_target = 16;
7918 else
7919 max_target = 8;
7920 aic_outb(p, SEEMS | SEECS, SEECTL);
7921 sxfrctl1 &= ~STPWEN;
7922 /*
7923 * The termination/cable detection logic is split into three distinct
7924 * groups. Ultra2 and later controllers, 2940UW-Pro controllers, and
7925 * older 7850, 7860, 7870, 7880, and 7895 controllers. Each has its
7926 * own unique way of detecting their cables and writing the results
7927 * back to the card.
7928 */
7929 if (p->features & AHC_ULTRA2)
7930 {
7931 /*
7932 * As long as user hasn't overridden term settings, always check the
7933 * cable detection logic
7934 */
7935 if (aic7xxx_override_term == -1)
7936 {
7937 aic7xxx_ultra2_term_detect(p, &enableSE_low, &enableSE_high,
7938 &enableLVD_low, &enableLVD_high,
7939 &eprom_present);
7940 }
7941
7942 /*
7943 * If the user is overriding settings, then they have been preserved
7944 * to here as fake adapter_control entries. Parse them and allow
7945 * them to override the detected settings (if we even did detection).
7946 */
7947 if (!(p->adapter_control & CFSEAUTOTERM))
7948 {
7949 enableSE_low = (p->adapter_control & CFSTERM);
7950 enableSE_high = (p->adapter_control & CFWSTERM);
7951 }
7952 if (!(p->adapter_control & CFAUTOTERM))
7953 {
7954 enableLVD_low = enableLVD_high = (p->adapter_control & CFLVDSTERM);
7955 }
7956
7957 /*
7958 * Now take those settings that we have and translate them into the
7959 * values that must be written into the registers.
7960 *
7961 * Flash Enable = BRDDAT7
7962 * Secondary High Term Enable = BRDDAT6
7963 * Secondary Low Term Enable = BRDDAT5
7964 * LVD/Primary High Term Enable = BRDDAT4
7965 * LVD/Primary Low Term Enable = STPWEN bit in SXFRCTL1
7966 */
7967 if (enableLVD_low != 0)
7968 {
7969 sxfrctl1 |= STPWEN;
7970 p->flags |= AHC_TERM_ENB_LVD;
7971 if (aic7xxx_verbose & VERBOSE_PROBE2)
7972 printk(KERN_INFO "(scsi%d) LVD/Primary Low byte termination "
7973 "Enabled\n", p->host_no);
7974 }
7975
7976 if (enableLVD_high != 0)
7977 {
7978 brddat |= BRDDAT4;
7979 if (aic7xxx_verbose & VERBOSE_PROBE2)
7980 printk(KERN_INFO "(scsi%d) LVD/Primary High byte termination "
7981 "Enabled\n", p->host_no);
7982 }
7983
7984 if (enableSE_low != 0)
7985 {
7986 brddat |= BRDDAT5;
7987 if (aic7xxx_verbose & VERBOSE_PROBE2)
7988 printk(KERN_INFO "(scsi%d) Secondary Low byte termination "
7989 "Enabled\n", p->host_no);
7990 }
7991
7992 if (enableSE_high != 0)
7993 {
7994 brddat |= BRDDAT6;
7995 if (aic7xxx_verbose & VERBOSE_PROBE2)
7996 printk(KERN_INFO "(scsi%d) Secondary High byte termination "
7997 "Enabled\n", p->host_no);
7998 }
7999 }
8000 else if (p->features & AHC_NEW_AUTOTERM)
8001 {
8002 /*
8003 * The 50 pin connector termination is controlled by STPWEN in the
8004 * SXFRCTL1 register. Since the Adaptec docs typically say the
8005 * controller is not allowed to be in the middle of a cable and
8006 * this is the only connection on that stub of the bus, there is
8007 * no need to even check for narrow termination, it's simply
8008 * always on.
8009 */
8010 sxfrctl1 |= STPWEN;
8011 if (aic7xxx_verbose & VERBOSE_PROBE2)
8012 printk(KERN_INFO "(scsi%d) Narrow channel termination Enabled\n",
8013 p->host_no);
8014
8015 if (p->adapter_control & CFAUTOTERM)
8016 {
8017 aic2940_uwpro_wide_cable_detect(p, &internal68_present,
8018 &external_present,
8019 &eprom_present);
8020 printk(KERN_INFO "(scsi%d) Cables present (Int-50 %s, Int-68 %s, "
8021 "Ext-68 %s)\n", p->host_no,
8022 "Don't Care",
8023 internal68_present ? "YES" : "NO",
8024 external_present ? "YES" : "NO");
8025 if (aic7xxx_verbose & VERBOSE_PROBE2)
8026 printk(KERN_INFO "(scsi%d) EEPROM %s present.\n", p->host_no,
8027 eprom_present ? "is" : "is not");
8028 if (internal68_present && external_present)
8029 {
8030 brddat = 0;
8031 p->flags &= ~AHC_TERM_ENB_SE_HIGH;
8032 if (aic7xxx_verbose & VERBOSE_PROBE2)
8033 printk(KERN_INFO "(scsi%d) Wide channel termination Disabled\n",
8034 p->host_no);
8035 }
8036 else
8037 {
8038 brddat = BRDDAT6;
8039 p->flags |= AHC_TERM_ENB_SE_HIGH;
8040 if (aic7xxx_verbose & VERBOSE_PROBE2)
8041 printk(KERN_INFO "(scsi%d) Wide channel termination Enabled\n",
8042 p->host_no);
8043 }
8044 }
8045 else
8046 {
8047 /*
8048 * The termination of the Wide channel is done more like normal
8049 * though, and the setting of this termination is done by writing
8050 * either a 0 or 1 to BRDDAT6 of the BRDDAT register
8051 */
8052 if (p->adapter_control & CFWSTERM)
8053 {
8054 brddat = BRDDAT6;
8055 p->flags |= AHC_TERM_ENB_SE_HIGH;
8056 if (aic7xxx_verbose & VERBOSE_PROBE2)
8057 printk(KERN_INFO "(scsi%d) Wide channel termination Enabled\n",
8058 p->host_no);
8059 }
8060 else
8061 {
8062 brddat = 0;
8063 }
8064 }
8065 }
8066 else
8067 {
8068 if (p->adapter_control & CFAUTOTERM)
8069 {
8070 if (p->flags & AHC_MOTHERBOARD)
8071 {
8072 printk(KERN_INFO "(scsi%d) Warning - detected auto-termination\n",
8073 p->host_no);
8074 printk(KERN_INFO "(scsi%d) Please verify driver detected settings "
8075 "are correct.\n", p->host_no);
8076 printk(KERN_INFO "(scsi%d) If not, then please properly set the "
8077 "device termination\n", p->host_no);
8078 printk(KERN_INFO "(scsi%d) in the Adaptec SCSI BIOS by hitting "
8079 "CTRL-A when prompted\n", p->host_no);
8080 printk(KERN_INFO "(scsi%d) during machine bootup.\n", p->host_no);
8081 }
8082 /* Configure auto termination. */
8083
8084 if ( (p->chip & AHC_CHIPID_MASK) >= AHC_AIC7870 )
8085 {
8086 aic787x_cable_detect(p, &internal50_present, &internal68_present,
8087 &external_present, &eprom_present);
8088 }
8089 else
8090 {
8091 aic785x_cable_detect(p, &internal50_present, &external_present,
8092 &eprom_present);
8093 }
8094
8095 if (max_target <= 8)
8096 internal68_present = 0;
8097
8098 if (max_target > 8)
8099 {
8100 printk(KERN_INFO "(scsi%d) Cables present (Int-50 %s, Int-68 %s, "
8101 "Ext-68 %s)\n", p->host_no,
8102 internal50_present ? "YES" : "NO",
8103 internal68_present ? "YES" : "NO",
8104 external_present ? "YES" : "NO");
8105 }
8106 else
8107 {
8108 printk(KERN_INFO "(scsi%d) Cables present (Int-50 %s, Ext-50 %s)\n",
8109 p->host_no,
8110 internal50_present ? "YES" : "NO",
8111 external_present ? "YES" : "NO");
8112 }
8113 if (aic7xxx_verbose & VERBOSE_PROBE2)
8114 printk(KERN_INFO "(scsi%d) EEPROM %s present.\n", p->host_no,
8115 eprom_present ? "is" : "is not");
8116
8117 /*
8118 * Now set the termination based on what we found. BRDDAT6
8119 * controls wide termination enable.
8120 * Flash Enable = BRDDAT7
8121 * SE High Term Enable = BRDDAT6
8122 */
8123 if (internal50_present && internal68_present && external_present)
8124 {
8125 printk(KERN_INFO "(scsi%d) Illegal cable configuration!! Only two\n",
8126 p->host_no);
8127 printk(KERN_INFO "(scsi%d) connectors on the SCSI controller may be "
8128 "in use at a time!\n", p->host_no);
8129 /*
8130 * Force termination (low and high byte) on. This is safer than
8131 * leaving it completely off, especially since this message comes
8132 * most often from motherboard controllers that don't even have 3
8133 * connectors, but instead are failing the cable detection.
8134 */
8135 internal50_present = external_present = 0;
8136 enableSE_high = enableSE_low = 1;
8137 }
8138
8139 if ((max_target > 8) &&
8140 ((external_present == 0) || (internal68_present == 0)) )
8141 {
8142 brddat |= BRDDAT6;
8143 p->flags |= AHC_TERM_ENB_SE_HIGH;
8144 if (aic7xxx_verbose & VERBOSE_PROBE2)
8145 printk(KERN_INFO "(scsi%d) SE High byte termination Enabled\n",
8146 p->host_no);
8147 }
8148
8149 if ( ((internal50_present ? 1 : 0) +
8150 (internal68_present ? 1 : 0) +
8151 (external_present ? 1 : 0)) <= 1 )
8152 {
8153 sxfrctl1 |= STPWEN;
8154 p->flags |= AHC_TERM_ENB_SE_LOW;
8155 if (aic7xxx_verbose & VERBOSE_PROBE2)
8156 printk(KERN_INFO "(scsi%d) SE Low byte termination Enabled\n",
8157 p->host_no);
8158 }
8159 }
8160 else /* p->adapter_control & CFAUTOTERM */
8161 {
8162 if (p->adapter_control & CFSTERM)
8163 {
8164 sxfrctl1 |= STPWEN;
8165 if (aic7xxx_verbose & VERBOSE_PROBE2)
8166 printk(KERN_INFO "(scsi%d) SE Low byte termination Enabled\n",
8167 p->host_no);
8168 }
8169
8170 if (p->adapter_control & CFWSTERM)
8171 {
8172 brddat |= BRDDAT6;
8173 if (aic7xxx_verbose & VERBOSE_PROBE2)
8174 printk(KERN_INFO "(scsi%d) SE High byte termination Enabled\n",
8175 p->host_no);
8176 }
8177 }
8178 }
8179
8180 aic_outb(p, sxfrctl1, SXFRCTL1);
8181 write_brdctl(p, brddat);
8182 release_seeprom(p);
8183 }
8184 }
8185
8186 /*+F*************************************************************************
8187 * Function:
8188 * detect_maxscb
8189 *
8190 * Description:
8191 * Detects the maximum number of SCBs for the controller and returns
8192 * the count and a mask in p (p->maxscbs, p->qcntmask).
8193 *-F*************************************************************************/
8194 static void
8195 detect_maxscb(struct aic7xxx_host *p)
8196 {
8197 int i;
8198
8199 /*
8200 * It's possible that we've already done this for multichannel
8201 * adapters.
8202 */
8203 if (p->scb_data->maxhscbs == 0)
8204 {
8205 /*
8206 * We haven't initialized the SCB settings yet. Walk the SCBs to
8207 * determince how many there are.
8208 */
8209 aic_outb(p, 0, FREE_SCBH);
8210
8211 for (i = 0; i < AIC7XXX_MAXSCB; i++)
8212 {
8213 aic_outb(p, i, SCBPTR);
8214 aic_outb(p, i, SCB_CONTROL);
8215 if (aic_inb(p, SCB_CONTROL) != i)
8216 break;
8217 aic_outb(p, 0, SCBPTR);
8218 if (aic_inb(p, SCB_CONTROL) != 0)
8219 break;
8220
8221 aic_outb(p, i, SCBPTR);
8222 aic_outb(p, 0, SCB_CONTROL); /* Clear the control byte. */
8223 aic_outb(p, i + 1, SCB_NEXT); /* Set the next pointer. */
8224 aic_outb(p, SCB_LIST_NULL, SCB_TAG); /* Make the tag invalid. */
8225 aic_outb(p, SCB_LIST_NULL, SCB_BUSYTARGETS); /* no busy untagged */
8226 aic_outb(p, SCB_LIST_NULL, SCB_BUSYTARGETS+1);/* targets active yet */
8227 aic_outb(p, SCB_LIST_NULL, SCB_BUSYTARGETS+2);
8228 aic_outb(p, SCB_LIST_NULL, SCB_BUSYTARGETS+3);
8229 }
8230
8231 /* Make sure the last SCB terminates the free list. */
8232 aic_outb(p, i - 1, SCBPTR);
8233 aic_outb(p, SCB_LIST_NULL, SCB_NEXT);
8234
8235 /* Ensure we clear the first (0) SCBs control byte. */
8236 aic_outb(p, 0, SCBPTR);
8237 aic_outb(p, 0, SCB_CONTROL);
8238
8239 p->scb_data->maxhscbs = i;
8240 /*
8241 * Use direct indexing instead for speed
8242 */
8243 if ( i == AIC7XXX_MAXSCB )
8244 p->flags &= ~AHC_PAGESCBS;
8245 }
8246
8247 }
8248
8249 /*+F*************************************************************************
8250 * Function:
8251 * aic7xxx_register
8252 *
8253 * Description:
8254 * Register a Adaptec aic7xxx chip SCSI controller with the kernel.
8255 *-F*************************************************************************/
8256 static int
8257 aic7xxx_register(Scsi_Host_Template *template, struct aic7xxx_host *p,
8258 int reset_delay)
8259 {
8260 int i, result;
8261 int max_targets;
8262 int found = 1;
8263 unsigned char term, scsi_conf;
8264 struct Scsi_Host *host;
8265
8266 host = p->host;
8267
8268 p->scb_data->maxscbs = AIC7XXX_MAXSCB;
8269 host->can_queue = AIC7XXX_MAXSCB;
8270 host->cmd_per_lun = 3;
8271 host->sg_tablesize = AIC7XXX_MAX_SG;
8272 host->select_queue_depths = aic7xxx_select_queue_depth;
8273 host->this_id = p->scsi_id;
8274 host->io_port = p->base;
8275 host->n_io_port = 0xFF;
8276 host->base = p->mbase;
8277 host->irq = p->irq;
8278 if (p->features & AHC_WIDE)
8279 {
8280 host->max_id = 16;
8281 }
8282 if (p->features & AHC_TWIN)
8283 {
8284 host->max_channel = 1;
8285 }
8286
8287 p->host = host;
8288 p->host_no = host->host_no;
8289 host->unique_id = p->instance;
8290 p->isr_count = 0;
8291 p->next = NULL;
8292 p->completeq.head = NULL;
8293 p->completeq.tail = NULL;
8294 scbq_init(&p->scb_data->free_scbs);
8295 scbq_init(&p->waiting_scbs);
8296 init_timer(&p->dev_timer);
8297 p->dev_timer.data = (unsigned long)p;
8298 p->dev_timer.function = (void *)aic7xxx_timer;
8299 p->dev_timer_active = 0;
8300
8301 /*
8302 * We currently have no commands of any type
8303 */
8304 p->qinfifonext = 0;
8305 p->qoutfifonext = 0;
8306
8307 for (i = 0; i < MAX_TARGETS; i++)
8308 {
8309 p->dev_commands_sent[i] = 0;
8310 p->dev_flags[i] = 0;
8311 p->dev_active_cmds[i] = 0;
8312 p->dev_last_queue_full[i] = 0;
8313 p->dev_last_queue_full_count[i] = 0;
8314 p->dev_max_queue_depth[i] = 1;
8315 p->dev_temp_queue_depth[i] = 1;
8316 p->dev_expires[i] = 0;
8317 scbq_init(&p->delayed_scbs[i]);
8318 }
8319
8320 printk(KERN_INFO "(scsi%d) <%s> found at ", p->host_no,
8321 board_names[p->board_name_index]);
8322 switch(p->chip)
8323 {
8324 case (AHC_AIC7770|AHC_EISA):
8325 printk("EISA slot %d\n", p->pci_device_fn);
8326 break;
8327 case (AHC_AIC7770|AHC_VL):
8328 printk("VLB slot %d\n", p->pci_device_fn);
8329 break;
8330 default:
8331 printk("PCI %d/%d/%d\n", p->pci_bus, PCI_SLOT(p->pci_device_fn),
8332 PCI_FUNC(p->pci_device_fn));
8333 break;
8334 }
8335 if (p->features & AHC_TWIN)
8336 {
8337 printk(KERN_INFO "(scsi%d) Twin Channel, A SCSI ID %d, B SCSI ID %d, ",
8338 p->host_no, p->scsi_id, p->scsi_id_b);
8339 }
8340 else
8341 {
8342 char *channel;
8343
8344 channel = "";
8345
8346 if ((p->flags & AHC_MULTI_CHANNEL) != 0)
8347 {
8348 channel = " A";
8349
8350 if ( (p->flags & (AHC_CHNLB|AHC_CHNLC)) != 0 )
8351 {
8352 channel = (p->flags & AHC_CHNLB) ? " B" : " C";
8353 }
8354 }
8355 if (p->features & AHC_WIDE)
8356 {
8357 printk(KERN_INFO "(scsi%d) Wide ", p->host_no);
8358 }
8359 else
8360 {
8361 printk(KERN_INFO "(scsi%d) Narrow ", p->host_no);
8362 }
8363 printk("Channel%s, SCSI ID=%d, ", channel, p->scsi_id);
8364 }
8365 aic_outb(p, 0, SEQ_FLAGS);
8366
8367 detect_maxscb(p);
8368
8369 printk("%d/%d SCBs\n", p->scb_data->maxhscbs, p->scb_data->maxscbs);
8370 if (aic7xxx_verbose & VERBOSE_PROBE2)
8371 {
8372 printk(KERN_INFO "(scsi%d) BIOS %sabled, IO Port 0x%lx, IRQ %d\n",
8373 p->host_no, (p->flags & AHC_BIOS_ENABLED) ? "en" : "dis",
8374 p->base, p->irq);
8375 printk(KERN_INFO "(scsi%d) IO Memory at 0x%lx, MMAP Memory at 0x%lx\n",
8376 p->host_no, p->mbase, (unsigned long)p->maddr);
8377 }
8378
8379 #ifdef CONFIG_PCI
8380 /*
8381 * Now that we know our instance number, we can set the flags we need to
8382 * force termination if need be.
8383 */
8384 if (aic7xxx_stpwlev != -1)
8385 {
8386 /*
8387 * This option only applies to PCI controllers.
8388 */
8389 if ( (p->chip & ~AHC_CHIPID_MASK) == AHC_PCI)
8390 {
8391 unsigned char devconfig;
8392
8393 pci_read_config_byte(p->pdev, DEVCONFIG, &devconfig);
8394 if ( (aic7xxx_stpwlev >> p->instance) & 0x01 )
8395 {
8396 devconfig |= STPWLEVEL;
8397 if (aic7xxx_verbose & VERBOSE_PROBE2)
8398 printk("(scsi%d) Force setting STPWLEVEL bit\n", p->host_no);
8399 }
8400 else
8401 {
8402 devconfig &= ~STPWLEVEL;
8403 if (aic7xxx_verbose & VERBOSE_PROBE2)
8404 printk("(scsi%d) Force clearing STPWLEVEL bit\n", p->host_no);
8405 }
8406 pci_write_config_byte(p->pdev, DEVCONFIG, devconfig);
8407 }
8408 }
8409 #endif
8410
8411 /*
8412 * That took care of devconfig and stpwlev, now for the actual termination
8413 * settings.
8414 */
8415 if (aic7xxx_override_term != -1)
8416 {
8417 /*
8418 * Again, this only applies to PCI controllers. We don't have problems
8419 * with the termination on 274x controllers to the best of my knowledge.
8420 */
8421 if ( (p->chip & ~AHC_CHIPID_MASK) == AHC_PCI)
8422 {
8423 unsigned char term_override;
8424
8425 term_override = ( (aic7xxx_override_term >> (p->instance * 4)) & 0x0f);
8426 p->adapter_control &=
8427 ~(CFSTERM|CFWSTERM|CFLVDSTERM|CFAUTOTERM|CFSEAUTOTERM);
8428 if ( (p->features & AHC_ULTRA2) && (term_override & 0x0c) )
8429 {
8430 p->adapter_control |= CFLVDSTERM;
8431 }
8432 if (term_override & 0x02)
8433 {
8434 p->adapter_control |= CFWSTERM;
8435 }
8436 if (term_override & 0x01)
8437 {
8438 p->adapter_control |= CFSTERM;
8439 }
8440 }
8441 }
8442
8443 if ( (p->flags & AHC_SEEPROM_FOUND) || (aic7xxx_override_term != -1) )
8444 {
8445 if (p->features & AHC_SPIOCAP)
8446 {
8447 if ( aic_inb(p, SPIOCAP) & SSPIOCPS )
8448 /*
8449 * Update the settings in sxfrctl1 to match the termination
8450 * settings.
8451 */
8452 configure_termination(p);
8453 }
8454 else if ((p->chip & AHC_CHIPID_MASK) >= AHC_AIC7870)
8455 {
8456 configure_termination(p);
8457 }
8458 }
8459
8460 /*
8461 * Set the SCSI Id, SXFRCTL0, SXFRCTL1, and SIMODE1, for both channels
8462 */
8463 if (p->features & AHC_TWIN)
8464 {
8465 /* Select channel B */
8466 aic_outb(p, aic_inb(p, SBLKCTL) | SELBUSB, SBLKCTL);
8467
8468 if ((p->flags & AHC_SEEPROM_FOUND) || (aic7xxx_override_term != -1))
8469 term = (aic_inb(p, SXFRCTL1) & STPWEN);
8470 else
8471 term = ((p->flags & AHC_TERM_ENB_B) ? STPWEN : 0);
8472
8473 aic_outb(p, p->scsi_id_b, SCSIID);
8474 scsi_conf = aic_inb(p, SCSICONF + 1);
8475 aic_outb(p, DFON | SPIOEN, SXFRCTL0);
8476 aic_outb(p, (scsi_conf & ENSPCHK) | aic7xxx_seltime | term |
8477 ENSTIMER | ACTNEGEN, SXFRCTL1);
8478 aic_outb(p, 0, SIMODE0);
8479 aic_outb(p, ENSELTIMO | ENSCSIRST | ENSCSIPERR, SIMODE1);
8480 aic_outb(p, 0, SCSIRATE);
8481
8482 /* Select channel A */
8483 aic_outb(p, aic_inb(p, SBLKCTL) & ~SELBUSB, SBLKCTL);
8484 }
8485
8486 if (p->features & AHC_ULTRA2)
8487 {
8488 aic_outb(p, p->scsi_id, SCSIID_ULTRA2);
8489 }
8490 else
8491 {
8492 aic_outb(p, p->scsi_id, SCSIID);
8493 }
8494 if ((p->flags & AHC_SEEPROM_FOUND) || (aic7xxx_override_term != -1))
8495 term = (aic_inb(p, SXFRCTL1) & STPWEN);
8496 else
8497 term = ((p->flags & (AHC_TERM_ENB_A|AHC_TERM_ENB_LVD)) ? STPWEN : 0);
8498 scsi_conf = aic_inb(p, SCSICONF);
8499 aic_outb(p, DFON | SPIOEN, SXFRCTL0);
8500 aic_outb(p, (scsi_conf & ENSPCHK) | aic7xxx_seltime | term |
8501 ENSTIMER | ACTNEGEN, SXFRCTL1);
8502 aic_outb(p, 0, SIMODE0);
8503 /*
8504 * If we are a cardbus adapter then don't enable SCSI reset detection.
8505 * We shouldn't likely be sharing SCSI busses with someone else, and
8506 * if we don't have a cable currently plugged into the controller then
8507 * we won't have a power source for the SCSI termination, which means
8508 * we'll see infinite incoming bus resets.
8509 */
8510 if(p->flags & AHC_NO_STPWEN)
8511 aic_outb(p, ENSELTIMO | ENSCSIPERR, SIMODE1);
8512 else
8513 aic_outb(p, ENSELTIMO | ENSCSIRST | ENSCSIPERR, SIMODE1);
8514 aic_outb(p, 0, SCSIRATE);
8515 if ( p->features & AHC_ULTRA2)
8516 aic_outb(p, 0, SCSIOFFSET);
8517
8518 /*
8519 * Look at the information that board initialization or the board
8520 * BIOS has left us. In the lower four bits of each target's
8521 * scratch space any value other than 0 indicates that we should
8522 * initiate synchronous transfers. If it's zero, the user or the
8523 * BIOS has decided to disable synchronous negotiation to that
8524 * target so we don't activate the needsdtr flag.
8525 */
8526 if ((p->features & (AHC_TWIN|AHC_WIDE)) == 0)
8527 {
8528 max_targets = 8;
8529 }
8530 else
8531 {
8532 max_targets = 16;
8533 }
8534
8535 if (!(aic7xxx_no_reset))
8536 {
8537 /*
8538 * If we reset the bus, then clear the transfer settings, else leave
8539 * them be
8540 */
8541 for (i = 0; i < max_targets; i++)
8542 {
8543 aic_outb(p, 0, TARG_SCSIRATE + i);
8544 if (p->features & AHC_ULTRA2)
8545 {
8546 aic_outb(p, 0, TARG_OFFSET + i);
8547 }
8548 p->transinfo[i].cur_offset = 0;
8549 p->transinfo[i].cur_period = 0;
8550 p->transinfo[i].cur_width = MSG_EXT_WDTR_BUS_8_BIT;
8551 }
8552
8553 /*
8554 * If we reset the bus, then clear the transfer settings, else leave
8555 * them be.
8556 */
8557 aic_outb(p, 0, ULTRA_ENB);
8558 aic_outb(p, 0, ULTRA_ENB + 1);
8559 p->ultraenb = 0;
8560 }
8561
8562 /*
8563 * Allocate enough hardware scbs to handle the maximum number of
8564 * concurrent transactions we can have. We have to make sure that
8565 * the allocated memory is contiguous memory. The Linux kmalloc
8566 * routine should only allocate contiguous memory, but note that
8567 * this could be a problem if kmalloc() is changed.
8568 */
8569 {
8570 size_t array_size;
8571 unsigned int hscb_physaddr;
8572
8573 array_size = p->scb_data->maxscbs * sizeof(struct aic7xxx_hwscb);
8574 if (p->scb_data->hscbs == NULL)
8575 {
8576 /* pci_alloc_consistent enforces the alignment already and
8577 * clears the area as well.
8578 */
8579 p->scb_data->hscbs = pci_alloc_consistent(p->pdev, array_size,
8580 &p->scb_data->hscbs_dma);
8581 /* We have to use pci_free_consistent, not kfree */
8582 p->scb_data->hscb_kmalloc_ptr = NULL;
8583 p->scb_data->hscbs_dma_len = array_size;
8584 }
8585 if (p->scb_data->hscbs == NULL)
8586 {
8587 printk("(scsi%d) Unable to allocate hardware SCB array; "
8588 "failing detection.\n", p->host_no);
8589 aic_outb(p, 0, SIMODE1);
8590 p->irq = 0;
8591 return(0);
8592 }
8593
8594 hscb_physaddr = p->scb_data->hscbs_dma;
8595 aic_outb(p, hscb_physaddr & 0xFF, HSCB_ADDR);
8596 aic_outb(p, (hscb_physaddr >> 8) & 0xFF, HSCB_ADDR + 1);
8597 aic_outb(p, (hscb_physaddr >> 16) & 0xFF, HSCB_ADDR + 2);
8598 aic_outb(p, (hscb_physaddr >> 24) & 0xFF, HSCB_ADDR + 3);
8599
8600 /* Set up the fifo areas at the same time */
8601 p->untagged_scbs = pci_alloc_consistent(p->pdev, 3*256, &p->fifo_dma);
8602 if (p->untagged_scbs == NULL)
8603 {
8604 printk("(scsi%d) Unable to allocate hardware FIFO arrays; "
8605 "failing detection.\n", p->host_no);
8606 p->irq = 0;
8607 return(0);
8608 }
8609
8610 p->qoutfifo = p->untagged_scbs + 256;
8611 p->qinfifo = p->qoutfifo + 256;
8612 for (i = 0; i < 256; i++)
8613 {
8614 p->untagged_scbs[i] = SCB_LIST_NULL;
8615 p->qinfifo[i] = SCB_LIST_NULL;
8616 p->qoutfifo[i] = SCB_LIST_NULL;
8617 }
8618
8619 hscb_physaddr = p->fifo_dma;
8620 aic_outb(p, hscb_physaddr & 0xFF, SCBID_ADDR);
8621 aic_outb(p, (hscb_physaddr >> 8) & 0xFF, SCBID_ADDR + 1);
8622 aic_outb(p, (hscb_physaddr >> 16) & 0xFF, SCBID_ADDR + 2);
8623 aic_outb(p, (hscb_physaddr >> 24) & 0xFF, SCBID_ADDR + 3);
8624 }
8625
8626 /* The Q-FIFOs we just set up are all empty */
8627 aic_outb(p, 0, QINPOS);
8628 aic_outb(p, 0, KERNEL_QINPOS);
8629 aic_outb(p, 0, QOUTPOS);
8630
8631 if(p->features & AHC_QUEUE_REGS)
8632 {
8633 aic_outb(p, SCB_QSIZE_256, QOFF_CTLSTA);
8634 aic_outb(p, 0, SDSCB_QOFF);
8635 aic_outb(p, 0, SNSCB_QOFF);
8636 aic_outb(p, 0, HNSCB_QOFF);
8637 }
8638
8639 /*
8640 * We don't have any waiting selections or disconnected SCBs.
8641 */
8642 aic_outb(p, SCB_LIST_NULL, WAITING_SCBH);
8643 aic_outb(p, SCB_LIST_NULL, DISCONNECTED_SCBH);
8644
8645 /*
8646 * Message out buffer starts empty
8647 */
8648 aic_outb(p, MSG_NOOP, MSG_OUT);
8649 aic_outb(p, MSG_NOOP, LAST_MSG);
8650
8651 /*
8652 * Set all the other asundry items that haven't been set yet.
8653 * This includes just dumping init values to a lot of registers simply
8654 * to make sure they've been touched and are ready for use parity wise
8655 * speaking.
8656 */
8657 aic_outb(p, 0, TMODE_CMDADDR);
8658 aic_outb(p, 0, TMODE_CMDADDR + 1);
8659 aic_outb(p, 0, TMODE_CMDADDR + 2);
8660 aic_outb(p, 0, TMODE_CMDADDR + 3);
8661 aic_outb(p, 0, TMODE_CMDADDR_NEXT);
8662
8663 /*
8664 * Link us into the list of valid hosts
8665 */
8666 p->next = first_aic7xxx;
8667 first_aic7xxx = p;
8668
8669 /*
8670 * Allocate the first set of scbs for this controller. This is to stream-
8671 * line code elsewhere in the driver. If we have to check for the existence
8672 * of scbs in certain code sections, it slows things down. However, as
8673 * soon as we register the IRQ for this card, we could get an interrupt that
8674 * includes possibly the SCSI_RSTI interrupt. If we catch that interrupt
8675 * then we are likely to segfault if we don't have at least one chunk of
8676 * SCBs allocated or add checks all through the reset code to make sure
8677 * that the SCBs have been allocated which is an invalid running condition
8678 * and therefore I think it's preferable to simply pre-allocate the first
8679 * chunk of SCBs.
8680 */
8681 aic7xxx_allocate_scb(p);
8682
8683 /*
8684 * Load the sequencer program, then re-enable the board -
8685 * resetting the AIC-7770 disables it, leaving the lights
8686 * on with nobody home.
8687 */
8688 aic7xxx_loadseq(p);
8689
8690 /*
8691 * Make sure the AUTOFLUSHDIS bit is *not* set in the SBLKCTL register
8692 */
8693 aic_outb(p, aic_inb(p, SBLKCTL) & ~AUTOFLUSHDIS, SBLKCTL);
8694
8695 if ( (p->chip & AHC_CHIPID_MASK) == AHC_AIC7770 )
8696 {
8697 aic_outb(p, ENABLE, BCTL); /* Enable the boards BUS drivers. */
8698 }
8699
8700 if ( !(aic7xxx_no_reset) )
8701 {
8702 if (p->features & AHC_TWIN)
8703 {
8704 if (aic7xxx_verbose & VERBOSE_PROBE2)
8705 printk(KERN_INFO "(scsi%d) Resetting channel B\n", p->host_no);
8706 aic_outb(p, aic_inb(p, SBLKCTL) | SELBUSB, SBLKCTL);
8707 aic7xxx_reset_current_bus(p);
8708 aic_outb(p, aic_inb(p, SBLKCTL) & ~SELBUSB, SBLKCTL);
8709 }
8710 /* Reset SCSI bus A. */
8711 if (aic7xxx_verbose & VERBOSE_PROBE2)
8712 { /* In case we are a 3940, 3985, or 7895, print the right channel */
8713 char *channel = "";
8714 if (p->flags & AHC_MULTI_CHANNEL)
8715 {
8716 channel = " A";
8717 if (p->flags & (AHC_CHNLB|AHC_CHNLC))
8718 channel = (p->flags & AHC_CHNLB) ? " B" : " C";
8719 }
8720 printk(KERN_INFO "(scsi%d) Resetting channel%s\n", p->host_no, channel);
8721 }
8722
8723 aic7xxx_reset_current_bus(p);
8724
8725 /*
8726 * Delay for the reset delay by setting the timer, this will delay
8727 * future commands sent to any devices.
8728 */
8729 p->flags |= AHC_RESET_DELAY;
8730 for(i=0; i<MAX_TARGETS; i++)
8731 {
8732 p->dev_expires[i] = jiffies + (4 * HZ);
8733 p->dev_timer_active |= (0x01 << i);
8734 }
8735 p->dev_timer.expires = p->dev_expires[p->scsi_id];
8736 add_timer(&p->dev_timer);
8737 p->dev_timer_active |= (0x01 << MAX_TARGETS);
8738 }
8739 else
8740 {
8741 if (!reset_delay)
8742 {
8743 printk(KERN_INFO "(scsi%d) Not resetting SCSI bus. Note: Don't use "
8744 "the no_reset\n", p->host_no);
8745 printk(KERN_INFO "(scsi%d) option unless you have a verifiable need "
8746 "for it.\n", p->host_no);
8747 }
8748 }
8749
8750 /*
8751 * Register IRQ with the kernel. Only allow sharing IRQs with
8752 * PCI devices.
8753 */
8754 if (!(p->chip & AHC_PCI))
8755 {
8756 result = (request_irq(p->irq, do_aic7xxx_isr, 0, "aic7xxx", p));
8757 }
8758 else
8759 {
8760 result = (request_irq(p->irq, do_aic7xxx_isr, SA_SHIRQ,
8761 "aic7xxx", p));
8762 if (result < 0)
8763 {
8764 result = (request_irq(p->irq, do_aic7xxx_isr, SA_INTERRUPT | SA_SHIRQ,
8765 "aic7xxx", p));
8766 }
8767 }
8768 if (result < 0)
8769 {
8770 printk(KERN_WARNING "(scsi%d) Couldn't register IRQ %d, ignoring "
8771 "controller.\n", p->host_no, p->irq);
8772 aic_outb(p, 0, SIMODE1);
8773 p->irq = 0;
8774 return (0);
8775 }
8776
8777 if(aic_inb(p, INTSTAT) & INT_PEND)
8778 printk(INFO_LEAD "spurious interrupt during configuration, cleared.\n",
8779 p->host_no, -1, -1 , -1);
8780 aic7xxx_clear_intstat(p);
8781
8782 unpause_sequencer(p, /* unpause_always */ TRUE);
8783
8784 return (found);
8785 }
8786
8787 /*+F*************************************************************************
8788 * Function:
8789 * aic7xxx_chip_reset
8790 *
8791 * Description:
8792 * Perform a chip reset on the aic7xxx SCSI controller. The controller
8793 * is paused upon return.
8794 *-F*************************************************************************/
8795 int
8796 aic7xxx_chip_reset(struct aic7xxx_host *p)
8797 {
8798 unsigned char sblkctl;
8799 int wait;
8800
8801 /*
8802 * For some 274x boards, we must clear the CHIPRST bit and pause
8803 * the sequencer. For some reason, this makes the driver work.
8804 */
8805 aic_outb(p, PAUSE | CHIPRST, HCNTRL);
8806
8807 /*
8808 * In the future, we may call this function as a last resort for
8809 * error handling. Let's be nice and not do any unnecessary delays.
8810 */
8811 wait = 1000; /* 1 msec (1000 * 1 msec) */
8812 while (--wait && !(aic_inb(p, HCNTRL) & CHIPRSTACK))
8813 {
8814 udelay(1); /* 1 usec */
8815 }
8816
8817 pause_sequencer(p);
8818
8819 sblkctl = aic_inb(p, SBLKCTL) & (SELBUSB|SELWIDE);
8820 if (p->chip & AHC_PCI)
8821 sblkctl &= ~SELBUSB;
8822 switch( sblkctl )
8823 {
8824 case 0: /* normal narrow card */
8825 break;
8826 case 2: /* Wide card */
8827 p->features |= AHC_WIDE;
8828 break;
8829 case 8: /* Twin card */
8830 p->features |= AHC_TWIN;
8831 p->flags |= AHC_MULTI_CHANNEL;
8832 break;
8833 default: /* hmmm...we don't know what this is */
8834 printk(KERN_WARNING "aic7xxx: Unsupported adapter type %d, ignoring.\n",
8835 aic_inb(p, SBLKCTL) & 0x0a);
8836 return(-1);
8837 }
8838 return(0);
8839 }
8840
8841 /*+F*************************************************************************
8842 * Function:
8843 * aic7xxx_alloc
8844 *
8845 * Description:
8846 * Allocate and initialize a host structure. Returns NULL upon error
8847 * and a pointer to a aic7xxx_host struct upon success.
8848 *-F*************************************************************************/
8849 static struct aic7xxx_host *
8850 aic7xxx_alloc(Scsi_Host_Template *sht, struct aic7xxx_host *temp)
8851 {
8852 struct aic7xxx_host *p = NULL;
8853 struct Scsi_Host *host;
8854 int i;
8855
8856 /*
8857 * Allocate a storage area by registering us with the mid-level
8858 * SCSI layer.
8859 */
8860 host = scsi_register(sht, sizeof(struct aic7xxx_host));
8861
8862 if (host != NULL)
8863 {
8864 p = (struct aic7xxx_host *) host->hostdata;
8865 memset(p, 0, sizeof(struct aic7xxx_host));
8866 *p = *temp;
8867 p->host = host;
8868 host->max_sectors = 512;
8869
8870 p->scb_data = kmalloc(sizeof(scb_data_type), GFP_ATOMIC);
8871 if (p->scb_data != NULL)
8872 {
8873 memset(p->scb_data, 0, sizeof(scb_data_type));
8874 scbq_init (&p->scb_data->free_scbs);
8875 }
8876 else
8877 {
8878 /*
8879 * For some reason we don't have enough memory. Free the
8880 * allocated memory for the aic7xxx_host struct, and return NULL.
8881 */
8882 release_region(p->base, MAXREG - MINREG);
8883 scsi_unregister(host);
8884 return(NULL);
8885 }
8886 p->host_no = host->host_no;
8887 p->tagenable = 0;
8888 p->orderedtag = 0;
8889 for (i=0; i<MAX_TARGETS; i++)
8890 {
8891 p->transinfo[i].goal_period = 255;
8892 p->transinfo[i].goal_offset = 0;
8893 p->transinfo[i].goal_options = 0;
8894 p->transinfo[i].goal_width = MSG_EXT_WDTR_BUS_8_BIT;
8895 }
8896 DRIVER_LOCK_INIT
8897 }
8898 scsi_set_pci_device(host, p->pdev);
8899 return (p);
8900 }
8901
8902 /*+F*************************************************************************
8903 * Function:
8904 * aic7xxx_free
8905 *
8906 * Description:
8907 * Frees and releases all resources associated with an instance of
8908 * the driver (struct aic7xxx_host *).
8909 *-F*************************************************************************/
8910 static void
8911 aic7xxx_free(struct aic7xxx_host *p)
8912 {
8913 int i;
8914
8915 /*
8916 * Free the allocated hardware SCB space.
8917 */
8918 if (p->scb_data != NULL)
8919 {
8920 struct aic7xxx_scb_dma *scb_dma = NULL;
8921 if (p->scb_data->hscbs != NULL)
8922 {
8923 pci_free_consistent(p->pdev, p->scb_data->hscbs_dma_len,
8924 p->scb_data->hscbs, p->scb_data->hscbs_dma);
8925 p->scb_data->hscbs = p->scb_data->hscb_kmalloc_ptr = NULL;
8926 }
8927 /*
8928 * Free the driver SCBs. These were allocated on an as-need
8929 * basis. We allocated these in groups depending on how many
8930 * we could fit into a given amount of RAM. The tail SCB for
8931 * these allocations has a pointer to the alloced area.
8932 */
8933 for (i = 0; i < p->scb_data->numscbs; i++)
8934 {
8935 if (p->scb_data->scb_array[i]->scb_dma != scb_dma)
8936 {
8937 scb_dma = p->scb_data->scb_array[i]->scb_dma;
8938 pci_free_consistent(p->pdev, scb_dma->dma_len,
8939 (void *)((unsigned long)scb_dma->dma_address
8940 - scb_dma->dma_offset),
8941 scb_dma->dma_address);
8942 }
8943 if (p->scb_data->scb_array[i]->kmalloc_ptr != NULL)
8944 kfree(p->scb_data->scb_array[i]->kmalloc_ptr);
8945 p->scb_data->scb_array[i] = NULL;
8946 }
8947
8948 /*
8949 * Free the SCB data area.
8950 */
8951 kfree(p->scb_data);
8952 }
8953
8954 pci_free_consistent(p->pdev, 3*256, (void *)p->untagged_scbs, p->fifo_dma);
8955 }
8956
8957 /*+F*************************************************************************
8958 * Function:
8959 * aic7xxx_load_seeprom
8960 *
8961 * Description:
8962 * Load the seeprom and configure adapter and target settings.
8963 * Returns 1 if the load was successful and 0 otherwise.
8964 *-F*************************************************************************/
8965 static void
8966 aic7xxx_load_seeprom(struct aic7xxx_host *p, unsigned char *sxfrctl1)
8967 {
8968 int have_seeprom = 0;
8969 int i, max_targets, mask;
8970 unsigned char scsirate, scsi_conf;
8971 unsigned short scarray[128];
8972 struct seeprom_config *sc = (struct seeprom_config *) scarray;
8973
8974 if (aic7xxx_verbose & VERBOSE_PROBE2)
8975 {
8976 printk(KERN_INFO "aic7xxx: Loading serial EEPROM...");
8977 }
8978 switch (p->chip)
8979 {
8980 case (AHC_AIC7770|AHC_EISA): /* None of these adapters have seeproms. */
8981 if (aic_inb(p, SCSICONF) & TERM_ENB)
8982 p->flags |= AHC_TERM_ENB_A;
8983 if ( (p->features & AHC_TWIN) && (aic_inb(p, SCSICONF + 1) & TERM_ENB) )
8984 p->flags |= AHC_TERM_ENB_B;
8985 break;
8986
8987 case (AHC_AIC7770|AHC_VL):
8988 have_seeprom = read_284x_seeprom(p, (struct seeprom_config *) scarray);
8989 break;
8990
8991 default:
8992 have_seeprom = read_seeprom(p, (p->flags & (AHC_CHNLB|AHC_CHNLC)),
8993 scarray, p->sc_size, p->sc_type);
8994 if (!have_seeprom)
8995 {
8996 if(p->sc_type == C46)
8997 have_seeprom = read_seeprom(p, (p->flags & (AHC_CHNLB|AHC_CHNLC)),
8998 scarray, p->sc_size, C56_66);
8999 else
9000 have_seeprom = read_seeprom(p, (p->flags & (AHC_CHNLB|AHC_CHNLC)),
9001 scarray, p->sc_size, C46);
9002 }
9003 if (!have_seeprom)
9004 {
9005 p->sc_size = 128;
9006 have_seeprom = read_seeprom(p, 4*(p->flags & (AHC_CHNLB|AHC_CHNLC)),
9007 scarray, p->sc_size, p->sc_type);
9008 if (!have_seeprom)
9009 {
9010 if(p->sc_type == C46)
9011 have_seeprom = read_seeprom(p, 4*(p->flags & (AHC_CHNLB|AHC_CHNLC)),
9012 scarray, p->sc_size, C56_66);
9013 else
9014 have_seeprom = read_seeprom(p, 4*(p->flags & (AHC_CHNLB|AHC_CHNLC)),
9015 scarray, p->sc_size, C46);
9016 }
9017 }
9018 break;
9019 }
9020
9021 if (!have_seeprom)
9022 {
9023 if (aic7xxx_verbose & VERBOSE_PROBE2)
9024 {
9025 printk("\naic7xxx: No SEEPROM available.\n");
9026 }
9027 p->flags |= AHC_NEWEEPROM_FMT;
9028 if (aic_inb(p, SCSISEQ) == 0)
9029 {
9030 p->flags |= AHC_USEDEFAULTS;
9031 p->flags &= ~AHC_BIOS_ENABLED;
9032 p->scsi_id = p->scsi_id_b = 7;
9033 *sxfrctl1 |= STPWEN;
9034 if (aic7xxx_verbose & VERBOSE_PROBE2)
9035 {
9036 printk("aic7xxx: Using default values.\n");
9037 }
9038 }
9039 else if (aic7xxx_verbose & VERBOSE_PROBE2)
9040 {
9041 printk("aic7xxx: Using leftover BIOS values.\n");
9042 }
9043 if ( ((p->chip & ~AHC_CHIPID_MASK) == AHC_PCI) && (*sxfrctl1 & STPWEN) )
9044 {
9045 p->flags |= AHC_TERM_ENB_SE_LOW | AHC_TERM_ENB_SE_HIGH;
9046 sc->adapter_control &= ~CFAUTOTERM;
9047 sc->adapter_control |= CFSTERM | CFWSTERM | CFLVDSTERM;
9048 }
9049 if (aic7xxx_extended)
9050 p->flags |= (AHC_EXTEND_TRANS_A | AHC_EXTEND_TRANS_B);
9051 else
9052 p->flags &= ~(AHC_EXTEND_TRANS_A | AHC_EXTEND_TRANS_B);
9053 }
9054 else
9055 {
9056 if (aic7xxx_verbose & VERBOSE_PROBE2)
9057 {
9058 printk("done\n");
9059 }
9060
9061 /*
9062 * Note things in our flags
9063 */
9064 p->flags |= AHC_SEEPROM_FOUND;
9065
9066 /*
9067 * Update the settings in sxfrctl1 to match the termination settings.
9068 */
9069 *sxfrctl1 = 0;
9070
9071 /*
9072 * Get our SCSI ID from the SEEPROM setting...
9073 */
9074 p->scsi_id = (sc->brtime_id & CFSCSIID);
9075
9076 /*
9077 * First process the settings that are different between the VLB
9078 * and PCI adapter seeproms.
9079 */
9080 if ((p->chip & AHC_CHIPID_MASK) == AHC_AIC7770)
9081 {
9082 /* VLB adapter seeproms */
9083 if (sc->bios_control & CF284XEXTEND)
9084 p->flags |= AHC_EXTEND_TRANS_A;
9085
9086 if (sc->adapter_control & CF284XSTERM)
9087 {
9088 *sxfrctl1 |= STPWEN;
9089 p->flags |= AHC_TERM_ENB_SE_LOW | AHC_TERM_ENB_SE_HIGH;
9090 }
9091 }
9092 else
9093 {
9094 /* PCI adapter seeproms */
9095 if (sc->bios_control & CFEXTEND)
9096 p->flags |= AHC_EXTEND_TRANS_A;
9097 if (sc->bios_control & CFBIOSEN)
9098 p->flags |= AHC_BIOS_ENABLED;
9099 else
9100 p->flags &= ~AHC_BIOS_ENABLED;
9101
9102 if (sc->adapter_control & CFSTERM)
9103 {
9104 *sxfrctl1 |= STPWEN;
9105 p->flags |= AHC_TERM_ENB_SE_LOW | AHC_TERM_ENB_SE_HIGH;
9106 }
9107 }
9108 memcpy(&p->sc, sc, sizeof(struct seeprom_config));
9109 }
9110
9111 p->discenable = 0;
9112
9113 /*
9114 * Limit to 16 targets just in case. The 2842 for one is known to
9115 * blow the max_targets setting, future cards might also.
9116 */
9117 max_targets = ((p->features & (AHC_TWIN | AHC_WIDE)) ? 16 : 8);
9118
9119 if (have_seeprom)
9120 {
9121 for (i = 0; i < max_targets; i++)
9122 {
9123 if( ((p->features & AHC_ULTRA) &&
9124 !(sc->adapter_control & CFULTRAEN) &&
9125 (sc->device_flags[i] & CFSYNCHISULTRA)) ||
9126 (sc->device_flags[i] & CFNEWULTRAFORMAT) )
9127 {
9128 p->flags |= AHC_NEWEEPROM_FMT;
9129 break;
9130 }
9131 }
9132 }
9133
9134 for (i = 0; i < max_targets; i++)
9135 {
9136 mask = (0x01 << i);
9137 if (!have_seeprom)
9138 {
9139 if (aic_inb(p, SCSISEQ) != 0)
9140 {
9141 /*
9142 * OK...the BIOS set things up and left behind the settings we need.
9143 * Just make our sc->device_flags[i] entry match what the card has
9144 * set for this device.
9145 */
9146 p->discenable =
9147 ~(aic_inb(p, DISC_DSB) | (aic_inb(p, DISC_DSB + 1) << 8) );
9148 p->ultraenb =
9149 (aic_inb(p, ULTRA_ENB) | (aic_inb(p, ULTRA_ENB + 1) << 8) );
9150 sc->device_flags[i] = (p->discenable & mask) ? CFDISC : 0;
9151 if (aic_inb(p, TARG_SCSIRATE + i) & WIDEXFER)
9152 sc->device_flags[i] |= CFWIDEB;
9153 if (p->features & AHC_ULTRA2)
9154 {
9155 if (aic_inb(p, TARG_OFFSET + i))
9156 {
9157 sc->device_flags[i] |= CFSYNCH;
9158 sc->device_flags[i] |= (aic_inb(p, TARG_SCSIRATE + i) & 0x07);
9159 if ( (aic_inb(p, TARG_SCSIRATE + i) & 0x18) == 0x18 )
9160 sc->device_flags[i] |= CFSYNCHISULTRA;
9161 }
9162 }
9163 else
9164 {
9165 if (aic_inb(p, TARG_SCSIRATE + i) & ~WIDEXFER)
9166 {
9167 sc->device_flags[i] |= CFSYNCH;
9168 if (p->features & AHC_ULTRA)
9169 sc->device_flags[i] |= ((p->ultraenb & mask) ?
9170 CFSYNCHISULTRA : 0);
9171 }
9172 }
9173 }
9174 else
9175 {
9176 /*
9177 * Assume the BIOS has NOT been run on this card and nothing between
9178 * the card and the devices is configured yet.
9179 */
9180 sc->device_flags[i] = CFDISC;
9181 if (p->features & AHC_WIDE)
9182 sc->device_flags[i] |= CFWIDEB;
9183 if (p->features & AHC_ULTRA3)
9184 sc->device_flags[i] |= 2;
9185 else if (p->features & AHC_ULTRA2)
9186 sc->device_flags[i] |= 3;
9187 else if (p->features & AHC_ULTRA)
9188 sc->device_flags[i] |= CFSYNCHISULTRA;
9189 sc->device_flags[i] |= CFSYNCH;
9190 aic_outb(p, 0, TARG_SCSIRATE + i);
9191 if (p->features & AHC_ULTRA2)
9192 aic_outb(p, 0, TARG_OFFSET + i);
9193 }
9194 }
9195 if (sc->device_flags[i] & CFDISC)
9196 {
9197 p->discenable |= mask;
9198 }
9199 if (p->flags & AHC_NEWEEPROM_FMT)
9200 {
9201 if ( !(p->features & AHC_ULTRA2) )
9202 {
9203 /*
9204 * I know of two different Ultra BIOSes that do this differently.
9205 * One on the Gigabyte 6BXU mb that wants flags[i] & CFXFER to
9206 * be == to 0x03 and SYNCHISULTRA to be true to mean 40MByte/s
9207 * while on the IBM Netfinity 5000 they want the same thing
9208 * to be something else, while flags[i] & CFXFER == 0x03 and
9209 * SYNCHISULTRA false should be 40MByte/s. So, we set both to
9210 * 40MByte/s and the lower speeds be damned. People will have
9211 * to select around the conversely mapped lower speeds in order
9212 * to select lower speeds on these boards.
9213 */
9214 if ( (sc->device_flags[i] & CFNEWULTRAFORMAT) &&
9215 ((sc->device_flags[i] & CFXFER) == 0x03) )
9216 {
9217 sc->device_flags[i] &= ~CFXFER;
9218 sc->device_flags[i] |= CFSYNCHISULTRA;
9219 }
9220 if (sc->device_flags[i] & CFSYNCHISULTRA)
9221 {
9222 p->ultraenb |= mask;
9223 }
9224 }
9225 else if ( !(sc->device_flags[i] & CFNEWULTRAFORMAT) &&
9226 (p->features & AHC_ULTRA2) &&
9227 (sc->device_flags[i] & CFSYNCHISULTRA) )
9228 {
9229 p->ultraenb |= mask;
9230 }
9231 }
9232 else if (sc->adapter_control & CFULTRAEN)
9233 {
9234 p->ultraenb |= mask;
9235 }
9236 if ( (sc->device_flags[i] & CFSYNCH) == 0)
9237 {
9238 sc->device_flags[i] &= ~CFXFER;
9239 p->ultraenb &= ~mask;
9240 p->transinfo[i].user_offset = 0;
9241 p->transinfo[i].user_period = 0;
9242 p->transinfo[i].user_options = 0;
9243 p->transinfo[i].cur_offset = 0;
9244 p->transinfo[i].cur_period = 0;
9245 p->transinfo[i].cur_options = 0;
9246 p->needsdtr_copy &= ~mask;
9247 }
9248 else
9249 {
9250 if (p->features & AHC_ULTRA3)
9251 {
9252 p->transinfo[i].user_offset = MAX_OFFSET_ULTRA2;
9253 p->transinfo[i].cur_offset = aic_inb(p, TARG_OFFSET + i);
9254 if( (sc->device_flags[i] & CFXFER) < 0x03 )
9255 {
9256 scsirate = (sc->device_flags[i] & CFXFER);
9257 p->transinfo[i].user_options = MSG_EXT_PPR_OPTION_DT_CRC;
9258 if( (aic_inb(p, TARG_SCSIRATE + i) & CFXFER) < 0x03 )
9259 {
9260 p->transinfo[i].cur_options =
9261 ((aic_inb(p, TARG_SCSIRATE + i) & 0x40) ?
9262 MSG_EXT_PPR_OPTION_DT_CRC : MSG_EXT_PPR_OPTION_DT_UNITS);
9263 }
9264 else
9265 {
9266 p->transinfo[i].cur_options = 0;
9267 }
9268 }
9269 else
9270 {
9271 scsirate = (sc->device_flags[i] & CFXFER) |
9272 ((p->ultraenb & mask) ? 0x18 : 0x10);
9273 p->transinfo[i].user_options = 0;
9274 p->transinfo[i].cur_options = 0;
9275 }
9276 p->transinfo[i].user_period = aic7xxx_find_period(p, scsirate,
9277 AHC_SYNCRATE_ULTRA3);
9278 p->transinfo[i].cur_period = aic7xxx_find_period(p,
9279 aic_inb(p, TARG_SCSIRATE + i),
9280 AHC_SYNCRATE_ULTRA3);
9281 }
9282 else if (p->features & AHC_ULTRA2)
9283 {
9284 p->transinfo[i].user_offset = MAX_OFFSET_ULTRA2;
9285 p->transinfo[i].cur_offset = aic_inb(p, TARG_OFFSET + i);
9286 scsirate = (sc->device_flags[i] & CFXFER) |
9287 ((p->ultraenb & mask) ? 0x18 : 0x10);
9288 p->transinfo[i].user_options = 0;
9289 p->transinfo[i].cur_options = 0;
9290 p->transinfo[i].user_period = aic7xxx_find_period(p, scsirate,
9291 AHC_SYNCRATE_ULTRA2);
9292 p->transinfo[i].cur_period = aic7xxx_find_period(p,
9293 aic_inb(p, TARG_SCSIRATE + i),
9294 AHC_SYNCRATE_ULTRA2);
9295 }
9296 else
9297 {
9298 scsirate = (sc->device_flags[i] & CFXFER) << 4;
9299 p->transinfo[i].user_options = 0;
9300 p->transinfo[i].cur_options = 0;
9301 p->transinfo[i].user_offset = MAX_OFFSET_8BIT;
9302 if (p->features & AHC_ULTRA)
9303 {
9304 short ultraenb;
9305 ultraenb = aic_inb(p, ULTRA_ENB) |
9306 (aic_inb(p, ULTRA_ENB + 1) << 8);
9307 p->transinfo[i].user_period = aic7xxx_find_period(p,
9308 scsirate,
9309 (p->ultraenb & mask) ?
9310 AHC_SYNCRATE_ULTRA :
9311 AHC_SYNCRATE_FAST);
9312 p->transinfo[i].cur_period = aic7xxx_find_period(p,
9313 aic_inb(p, TARG_SCSIRATE + i),
9314 (ultraenb & mask) ?
9315 AHC_SYNCRATE_ULTRA :
9316 AHC_SYNCRATE_FAST);
9317 }
9318 else
9319 p->transinfo[i].user_period = aic7xxx_find_period(p,
9320 scsirate, AHC_SYNCRATE_FAST);
9321 }
9322 p->needsdtr_copy |= mask;
9323 }
9324 if ( (sc->device_flags[i] & CFWIDEB) && (p->features & AHC_WIDE) )
9325 {
9326 p->transinfo[i].user_width = MSG_EXT_WDTR_BUS_16_BIT;
9327 p->needwdtr_copy |= mask;
9328 }
9329 else
9330 {
9331 p->transinfo[i].user_width = MSG_EXT_WDTR_BUS_8_BIT;
9332 p->needwdtr_copy &= ~mask;
9333 }
9334 p->transinfo[i].cur_width =
9335 (aic_inb(p, TARG_SCSIRATE + i) & WIDEXFER) ?
9336 MSG_EXT_WDTR_BUS_16_BIT : MSG_EXT_WDTR_BUS_8_BIT;
9337 }
9338 aic_outb(p, ~(p->discenable & 0xFF), DISC_DSB);
9339 aic_outb(p, ~((p->discenable >> 8) & 0xFF), DISC_DSB + 1);
9340 p->needppr = p->needppr_copy = 0;
9341 p->needwdtr = p->needwdtr_copy;
9342 p->needsdtr = p->needsdtr_copy;
9343 p->dtr_pending = 0;
9344
9345 /*
9346 * We set the p->ultraenb from the SEEPROM to begin with, but now we make
9347 * it match what is already down in the card. If we are doing a reset
9348 * on the card then this will get put back to a default state anyway.
9349 * This allows us to not have to pre-emptively negotiate when using the
9350 * no_reset option.
9351 */
9352 if (p->features & AHC_ULTRA)
9353 p->ultraenb = aic_inb(p, ULTRA_ENB) | (aic_inb(p, ULTRA_ENB + 1) << 8);
9354
9355
9356 scsi_conf = (p->scsi_id & HSCSIID);
9357
9358 if(have_seeprom)
9359 {
9360 p->adapter_control = sc->adapter_control;
9361 p->bios_control = sc->bios_control;
9362
9363 switch (p->chip & AHC_CHIPID_MASK)
9364 {
9365 case AHC_AIC7895:
9366 case AHC_AIC7896:
9367 case AHC_AIC7899:
9368 if (p->adapter_control & CFBPRIMARY)
9369 p->flags |= AHC_CHANNEL_B_PRIMARY;
9370 default:
9371 break;
9372 }
9373
9374 if (sc->adapter_control & CFSPARITY)
9375 scsi_conf |= ENSPCHK;
9376 }
9377 else
9378 {
9379 scsi_conf |= ENSPCHK | RESET_SCSI;
9380 }
9381
9382 /*
9383 * Only set the SCSICONF and SCSICONF + 1 registers if we are a PCI card.
9384 * The 2842 and 2742 cards already have these registers set and we don't
9385 * want to muck with them since we don't set all the bits they do.
9386 */
9387 if ( (p->chip & ~AHC_CHIPID_MASK) == AHC_PCI )
9388 {
9389 /* Set the host ID */
9390 aic_outb(p, scsi_conf, SCSICONF);
9391 /* In case we are a wide card */
9392 aic_outb(p, p->scsi_id, SCSICONF + 1);
9393 }
9394 }
9395
9396 /*+F*************************************************************************
9397 * Function:
9398 * aic7xxx_configure_bugs
9399 *
9400 * Description:
9401 * Take the card passed in and set the appropriate bug flags based upon
9402 * the card model. Also make any changes needed to device registers or
9403 * PCI registers while we are here.
9404 *-F*************************************************************************/
9405 static void
9406 aic7xxx_configure_bugs(struct aic7xxx_host *p)
9407 {
9408 unsigned short tmp_word;
9409
9410 switch(p->chip & AHC_CHIPID_MASK)
9411 {
9412 case AHC_AIC7860:
9413 p->bugs |= AHC_BUG_PCI_2_1_RETRY;
9414 /* fall through */
9415 case AHC_AIC7850:
9416 case AHC_AIC7870:
9417 p->bugs |= AHC_BUG_TMODE_WIDEODD | AHC_BUG_CACHETHEN | AHC_BUG_PCI_MWI;
9418 break;
9419 case AHC_AIC7880:
9420 p->bugs |= AHC_BUG_TMODE_WIDEODD | AHC_BUG_PCI_2_1_RETRY |
9421 AHC_BUG_CACHETHEN | AHC_BUG_PCI_MWI;
9422 break;
9423 case AHC_AIC7890:
9424 p->bugs |= AHC_BUG_AUTOFLUSH | AHC_BUG_CACHETHEN;
9425 break;
9426 case AHC_AIC7892:
9427 p->bugs |= AHC_BUG_SCBCHAN_UPLOAD;
9428 break;
9429 case AHC_AIC7895:
9430 p->bugs |= AHC_BUG_TMODE_WIDEODD | AHC_BUG_PCI_2_1_RETRY |
9431 AHC_BUG_CACHETHEN | AHC_BUG_PCI_MWI;
9432 break;
9433 case AHC_AIC7896:
9434 p->bugs |= AHC_BUG_CACHETHEN_DIS;
9435 break;
9436 case AHC_AIC7899:
9437 p->bugs |= AHC_BUG_SCBCHAN_UPLOAD;
9438 break;
9439 default:
9440 /* Nothing to do */
9441 break;
9442 }
9443
9444 /*
9445 * Now handle the bugs that require PCI register or card register tweaks
9446 */
9447 pci_read_config_word(p->pdev, PCI_COMMAND, &tmp_word);
9448 if(p->bugs & AHC_BUG_PCI_MWI)
9449 {
9450 tmp_word &= ~PCI_COMMAND_INVALIDATE;
9451 }
9452 else
9453 {
9454 tmp_word |= PCI_COMMAND_INVALIDATE;
9455 }
9456 pci_write_config_word(p->pdev, PCI_COMMAND, tmp_word);
9457
9458 if(p->bugs & AHC_BUG_CACHETHEN)
9459 {
9460 aic_outb(p, aic_inb(p, DSCOMMAND0) & ~CACHETHEN, DSCOMMAND0);
9461 }
9462 else if (p->bugs & AHC_BUG_CACHETHEN_DIS)
9463 {
9464 aic_outb(p, aic_inb(p, DSCOMMAND0) | CACHETHEN, DSCOMMAND0);
9465 }
9466
9467 return;
9468 }
9469
9470
9471 /*+F*************************************************************************
9472 * Function:
9473 * aic7xxx_detect
9474 *
9475 * Description:
9476 * Try to detect and register an Adaptec 7770 or 7870 SCSI controller.
9477 *
9478 * XXX - This should really be called aic7xxx_probe(). A sequence of
9479 * probe(), attach()/detach(), and init() makes more sense than
9480 * one do-it-all function. This may be useful when (and if) the
9481 * mid-level SCSI code is overhauled.
9482 *-F*************************************************************************/
9483 int
9484 aic7xxx_detect(Scsi_Host_Template *template)
9485 {
9486 struct aic7xxx_host *temp_p = NULL;
9487 struct aic7xxx_host *current_p = NULL;
9488 struct aic7xxx_host *list_p = NULL;
9489 int found = 0;
9490 #if defined(__i386__) || defined(__alpha__)
9491 ahc_flag_type flags = 0;
9492 int type;
9493 #endif
9494 unsigned char sxfrctl1;
9495 #if defined(__i386__) || defined(__alpha__)
9496 unsigned char hcntrl, hostconf;
9497 unsigned int slot, base;
9498 #endif
9499
9500 #ifdef MODULE
9501 /*
9502 * If we are called as a module, the aic7xxx pointer may not be null
9503 * and it would point to our bootup string, just like on the lilo
9504 * command line. IF not NULL, then process this config string with
9505 * aic7xxx_setup
9506 */
9507 if(aic7xxx)
9508 aic7xxx_setup(aic7xxx);
9509 if(dummy_buffer[0] != 'P')
9510 printk(KERN_WARNING "aic7xxx: Please read the file /usr/src/linux/drivers"
9511 "/scsi/README.aic7xxx\n"
9512 "aic7xxx: to see the proper way to specify options to the aic7xxx "
9513 "module\n"
9514 "aic7xxx: Specifically, don't use any commas when passing arguments to\n"
9515 "aic7xxx: insmod or else it might trash certain memory areas.\n");
9516 #endif
9517
9518 template->proc_name = "aic7xxx";
9519 template->sg_tablesize = AIC7XXX_MAX_SG;
9520
9521
9522 #ifdef CONFIG_PCI
9523 /*
9524 * PCI-bus probe.
9525 */
9526 if (pci_present())
9527 {
9528 struct
9529 {
9530 unsigned short vendor_id;
9531 unsigned short device_id;
9532 ahc_chip chip;
9533 ahc_flag_type flags;
9534 ahc_feature features;
9535 int board_name_index;
9536 unsigned short seeprom_size;
9537 unsigned short seeprom_type;
9538 } const aic_pdevs[] = {
9539 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7810, AHC_NONE,
9540 AHC_FNONE, AHC_FENONE, 1,
9541 32, C46 },
9542 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7850, AHC_AIC7850,
9543 AHC_PAGESCBS, AHC_AIC7850_FE, 5,
9544 32, C46 },
9545 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7855, AHC_AIC7850,
9546 AHC_PAGESCBS, AHC_AIC7850_FE, 6,
9547 32, C46 },
9548 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7821, AHC_AIC7860,
9549 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9550 AHC_AIC7860_FE, 7,
9551 32, C46 },
9552 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_3860, AHC_AIC7860,
9553 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9554 AHC_AIC7860_FE, 7,
9555 32, C46 },
9556 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_38602, AHC_AIC7860,
9557 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9558 AHC_AIC7860_FE, 7,
9559 32, C46 },
9560 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_38602, AHC_AIC7860,
9561 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9562 AHC_AIC7860_FE, 7,
9563 32, C46 },
9564 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7860, AHC_AIC7860,
9565 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MOTHERBOARD,
9566 AHC_AIC7860_FE, 7,
9567 32, C46 },
9568 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7861, AHC_AIC7860,
9569 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9570 AHC_AIC7860_FE, 8,
9571 32, C46 },
9572 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7870, AHC_AIC7870,
9573 AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MOTHERBOARD,
9574 AHC_AIC7870_FE, 9,
9575 32, C46 },
9576 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7871, AHC_AIC7870,
9577 AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7870_FE, 10,
9578 32, C46 },
9579 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7872, AHC_AIC7870,
9580 AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9581 AHC_AIC7870_FE, 11,
9582 32, C56_66 },
9583 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7873, AHC_AIC7870,
9584 AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9585 AHC_AIC7870_FE, 12,
9586 32, C56_66 },
9587 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7874, AHC_AIC7870,
9588 AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7870_FE, 13,
9589 32, C46 },
9590 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7880, AHC_AIC7880,
9591 AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MOTHERBOARD,
9592 AHC_AIC7880_FE, 14,
9593 32, C46 },
9594 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7881, AHC_AIC7880,
9595 AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE, 15,
9596 32, C46 },
9597 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7882, AHC_AIC7880,
9598 AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9599 AHC_AIC7880_FE, 16,
9600 32, C56_66 },
9601 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7883, AHC_AIC7880,
9602 AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9603 AHC_AIC7880_FE, 17,
9604 32, C56_66 },
9605 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7884, AHC_AIC7880,
9606 AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE, 18,
9607 32, C46 },
9608 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7885, AHC_AIC7880,
9609 AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE, 18,
9610 32, C46 },
9611 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7886, AHC_AIC7880,
9612 AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE, 18,
9613 32, C46 },
9614 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7887, AHC_AIC7880,
9615 AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE | AHC_NEW_AUTOTERM, 19,
9616 32, C46 },
9617 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7888, AHC_AIC7880,
9618 AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE, 18,
9619 32, C46 },
9620 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7895, AHC_AIC7895,
9621 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9622 AHC_AIC7895_FE, 20,
9623 32, C56_66 },
9624 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7890, AHC_AIC7890,
9625 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9626 AHC_AIC7890_FE, 21,
9627 32, C46 },
9628 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7890B, AHC_AIC7890,
9629 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9630 AHC_AIC7890_FE, 21,
9631 32, C46 },
9632 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_2930U2, AHC_AIC7890,
9633 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9634 AHC_AIC7890_FE, 22,
9635 32, C46 },
9636 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_2940U2, AHC_AIC7890,
9637 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9638 AHC_AIC7890_FE, 23,
9639 32, C46 },
9640 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7896, AHC_AIC7896,
9641 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9642 AHC_AIC7896_FE, 24,
9643 32, C56_66 },
9644 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_3940U2, AHC_AIC7896,
9645 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9646 AHC_AIC7896_FE, 25,
9647 32, C56_66 },
9648 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_3950U2D, AHC_AIC7896,
9649 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9650 AHC_AIC7896_FE, 26,
9651 32, C56_66 },
9652 {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_1480A, AHC_AIC7860,
9653 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_NO_STPWEN,
9654 AHC_AIC7860_FE, 27,
9655 32, C46 },
9656 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7892A, AHC_AIC7892,
9657 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9658 AHC_AIC7892_FE, 28,
9659 32, C46 },
9660 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7892B, AHC_AIC7892,
9661 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9662 AHC_AIC7892_FE, 28,
9663 32, C46 },
9664 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7892D, AHC_AIC7892,
9665 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9666 AHC_AIC7892_FE, 28,
9667 32, C46 },
9668 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7892P, AHC_AIC7892,
9669 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9670 AHC_AIC7892_FE, 28,
9671 32, C46 },
9672 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7899A, AHC_AIC7899,
9673 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9674 AHC_AIC7899_FE, 29,
9675 32, C56_66 },
9676 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7899B, AHC_AIC7899,
9677 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9678 AHC_AIC7899_FE, 29,
9679 32, C56_66 },
9680 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7899D, AHC_AIC7899,
9681 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9682 AHC_AIC7899_FE, 29,
9683 32, C56_66 },
9684 {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7899P, AHC_AIC7899,
9685 AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9686 AHC_AIC7899_FE, 29,
9687 32, C56_66 },
9688 };
9689
9690 unsigned short command;
9691 unsigned int devconfig, i, oldverbose;
9692 struct pci_dev *pdev = NULL;
9693
9694 for (i = 0; i < NUMBER(aic_pdevs); i++)
9695 {
9696 pdev = NULL;
9697 while ((pdev = pci_find_device(aic_pdevs[i].vendor_id,
9698 aic_pdevs[i].device_id,
9699 pdev))) {
9700 if (pci_enable_device(pdev))
9701 continue;
9702 if ( i == 0 ) /* We found one, but it's the 7810 RAID cont. */
9703 {
9704 if (aic7xxx_verbose & (VERBOSE_PROBE|VERBOSE_PROBE2))
9705 {
9706 printk(KERN_INFO "aic7xxx: The 7810 RAID controller is not "
9707 "supported by\n");
9708 printk(KERN_INFO " this driver, we are ignoring it.\n");
9709 }
9710 }
9711 else if ( (temp_p = kmalloc(sizeof(struct aic7xxx_host),
9712 GFP_ATOMIC)) != NULL )
9713 {
9714 memset(temp_p, 0, sizeof(struct aic7xxx_host));
9715 temp_p->chip = aic_pdevs[i].chip | AHC_PCI;
9716 temp_p->flags = aic_pdevs[i].flags;
9717 temp_p->features = aic_pdevs[i].features;
9718 temp_p->board_name_index = aic_pdevs[i].board_name_index;
9719 temp_p->sc_size = aic_pdevs[i].seeprom_size;
9720 temp_p->sc_type = aic_pdevs[i].seeprom_type;
9721
9722 /*
9723 * Read sundry information from PCI BIOS.
9724 */
9725 temp_p->irq = pdev->irq;
9726 temp_p->pdev = pdev;
9727 temp_p->pci_bus = pdev->bus->number;
9728 temp_p->pci_device_fn = pdev->devfn;
9729 temp_p->base = pci_resource_start(pdev, 0);
9730 temp_p->mbase = pci_resource_start(pdev, 1);
9731 current_p = list_p;
9732 while(current_p && temp_p)
9733 {
9734 if ( ((current_p->pci_bus == temp_p->pci_bus) &&
9735 (current_p->pci_device_fn == temp_p->pci_device_fn)) ||
9736 (temp_p->base && (current_p->base == temp_p->base)) ||
9737 (temp_p->mbase && (current_p->mbase == temp_p->mbase)) )
9738 {
9739 /* duplicate PCI entry, skip it */
9740 kfree(temp_p);
9741 temp_p = NULL;
9742 }
9743 current_p = current_p->next;
9744 }
9745 if ( temp_p == NULL )
9746 continue;
9747 if (aic7xxx_verbose & VERBOSE_PROBE2)
9748 printk("aic7xxx: <%s> at PCI %d/%d\n",
9749 board_names[aic_pdevs[i].board_name_index],
9750 PCI_SLOT(pdev->devfn),
9751 PCI_FUNC(pdev->devfn));
9752 pci_read_config_word(pdev, PCI_COMMAND, &command);
9753 if (aic7xxx_verbose & VERBOSE_PROBE2)
9754 {
9755 printk("aic7xxx: Initial PCI_COMMAND value was 0x%x\n",
9756 (int)command);
9757 }
9758 #ifdef AIC7XXX_STRICT_PCI_SETUP
9759 command |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY |
9760 PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO;
9761 #else
9762 command |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO;
9763 #endif
9764 command &= ~PCI_COMMAND_INVALIDATE;
9765 if (aic7xxx_pci_parity == 0)
9766 command &= ~(PCI_COMMAND_SERR | PCI_COMMAND_PARITY);
9767 pci_write_config_word(pdev, PCI_COMMAND, command);
9768 #ifdef AIC7XXX_STRICT_PCI_SETUP
9769 pci_read_config_dword(pdev, DEVCONFIG, &devconfig);
9770 if (aic7xxx_verbose & VERBOSE_PROBE2)
9771 {
9772 printk("aic7xxx: Initial DEVCONFIG value was 0x%x\n", devconfig);
9773 }
9774 devconfig |= 0x80000040;
9775 pci_write_config_dword(pdev, DEVCONFIG, devconfig);
9776 #endif /* AIC7XXX_STRICT_PCI_SETUP */
9777
9778 if(temp_p->base && check_region(temp_p->base, MAXREG - MINREG))
9779 {
9780 printk("aic7xxx: <%s> at PCI %d/%d/%d\n",
9781 board_names[aic_pdevs[i].board_name_index],
9782 temp_p->pci_bus,
9783 PCI_SLOT(temp_p->pci_device_fn),
9784 PCI_FUNC(temp_p->pci_device_fn));
9785 printk("aic7xxx: I/O ports already in use, ignoring.\n");
9786 kfree(temp_p);
9787 temp_p = NULL;
9788 continue;
9789 }
9790
9791 temp_p->unpause = INTEN;
9792 temp_p->pause = temp_p->unpause | PAUSE;
9793 if ( ((temp_p->base == 0) &&
9794 (temp_p->mbase == 0)) ||
9795 (temp_p->irq == 0) )
9796 {
9797 printk("aic7xxx: <%s> at PCI %d/%d/%d\n",
9798 board_names[aic_pdevs[i].board_name_index],
9799 temp_p->pci_bus,
9800 PCI_SLOT(temp_p->pci_device_fn),
9801 PCI_FUNC(temp_p->pci_device_fn));
9802 printk("aic7xxx: Controller disabled by BIOS, ignoring.\n");
9803 kfree(temp_p);
9804 temp_p = NULL;
9805 continue;
9806 }
9807
9808 #ifdef MMAPIO
9809 if ( !(temp_p->base) || !(temp_p->flags & AHC_MULTI_CHANNEL) ||
9810 ((temp_p->chip != (AHC_AIC7870 | AHC_PCI)) &&
9811 (temp_p->chip != (AHC_AIC7880 | AHC_PCI))) )
9812 {
9813 unsigned long page_offset, base;
9814
9815 base = temp_p->mbase & PAGE_MASK;
9816 page_offset = temp_p->mbase - base;
9817 temp_p->maddr = ioremap_nocache(base, page_offset + 256);
9818 if(temp_p->maddr)
9819 {
9820 temp_p->maddr += page_offset;
9821 /*
9822 * We need to check the I/O with the MMAPed address. Some machines
9823 * simply fail to work with MMAPed I/O and certain controllers.
9824 */
9825 if(aic_inb(temp_p, HCNTRL) == 0xff)
9826 {
9827 /*
9828 * OK.....we failed our test....go back to programmed I/O
9829 */
9830 printk(KERN_INFO "aic7xxx: <%s> at PCI %d/%d/%d\n",
9831 board_names[aic_pdevs[i].board_name_index],
9832 temp_p->pci_bus,
9833 PCI_SLOT(temp_p->pci_device_fn),
9834 PCI_FUNC(temp_p->pci_device_fn));
9835 printk(KERN_INFO "aic7xxx: MMAPed I/O failed, reverting to "
9836 "Programmed I/O.\n");
9837 iounmap((void *) (((unsigned long) temp_p->maddr) & PAGE_MASK));
9838 temp_p->maddr = 0;
9839 if(temp_p->base == 0)
9840 {
9841 printk("aic7xxx: <%s> at PCI %d/%d/%d\n",
9842 board_names[aic_pdevs[i].board_name_index],
9843 temp_p->pci_bus,
9844 PCI_SLOT(temp_p->pci_device_fn),
9845 PCI_FUNC(temp_p->pci_device_fn));
9846 printk("aic7xxx: Controller disabled by BIOS, ignoring.\n");
9847 kfree(temp_p);
9848 temp_p = NULL;
9849 continue;
9850 }
9851 }
9852 }
9853 }
9854 #endif
9855
9856 /*
9857 * Lock out other contenders for our i/o space.
9858 */
9859 if(temp_p->base)
9860 request_region(temp_p->base, MAXREG - MINREG, "aic7xxx");
9861
9862 /*
9863 * We HAVE to make sure the first pause_sequencer() and all other
9864 * subsequent I/O that isn't PCI config space I/O takes place
9865 * after the MMAPed I/O region is configured and tested. The
9866 * problem is the PowerPC architecture that doesn't support
9867 * programmed I/O at all, so we have to have the MMAP I/O set up
9868 * for this pause to even work on those machines.
9869 */
9870 pause_sequencer(temp_p);
9871
9872 /*
9873 * Clear out any pending PCI error status messages. Also set
9874 * verbose to 0 so that we don't emit strange PCI error messages
9875 * while cleaning out the current status bits.
9876 */
9877 oldverbose = aic7xxx_verbose;
9878 aic7xxx_verbose = 0;
9879 aic7xxx_pci_intr(temp_p);
9880 aic7xxx_verbose = oldverbose;
9881
9882 temp_p->bios_address = 0;
9883
9884 /*
9885 * Remember how the card was setup in case there is no seeprom.
9886 */
9887 if (temp_p->features & AHC_ULTRA2)
9888 temp_p->scsi_id = aic_inb(temp_p, SCSIID_ULTRA2) & OID;
9889 else
9890 temp_p->scsi_id = aic_inb(temp_p, SCSIID) & OID;
9891 /*
9892 * Get current termination setting
9893 */
9894 sxfrctl1 = aic_inb(temp_p, SXFRCTL1);
9895
9896 if (aic7xxx_chip_reset(temp_p) == -1)
9897 {
9898 release_region(temp_p->base, MAXREG - MINREG);
9899 kfree(temp_p);
9900 temp_p = NULL;
9901 continue;
9902 }
9903 /*
9904 * Very quickly put the term setting back into the register since
9905 * the chip reset may cause odd things to happen. This is to keep
9906 * LVD busses with lots of drives from draining the power out of
9907 * the diffsense line before we get around to running the
9908 * configure_termination() function. Also restore the STPWLEVEL
9909 * bit of DEVCONFIG
9910 */
9911 aic_outb(temp_p, sxfrctl1, SXFRCTL1);
9912 pci_write_config_dword(temp_p->pdev, DEVCONFIG, devconfig);
9913 sxfrctl1 &= STPWEN;
9914
9915 /*
9916 * We need to set the CHNL? assignments before loading the SEEPROM
9917 * The 3940 and 3985 cards (original stuff, not any of the later
9918 * stuff) are 7870 and 7880 class chips. The Ultra2 stuff falls
9919 * under 7896 and 7897. The 7895 is in a class by itself :)
9920 */
9921 switch (temp_p->chip & AHC_CHIPID_MASK)
9922 {
9923 case AHC_AIC7870: /* 3840 / 3985 */
9924 case AHC_AIC7880: /* 3840 UW / 3985 UW */
9925 if(temp_p->flags & AHC_MULTI_CHANNEL)
9926 {
9927 switch(PCI_SLOT(temp_p->pci_device_fn))
9928 {
9929 case 5:
9930 temp_p->flags |= AHC_CHNLB;
9931 break;
9932 case 8:
9933 temp_p->flags |= AHC_CHNLB;
9934 break;
9935 case 12:
9936 temp_p->flags |= AHC_CHNLC;
9937 break;
9938 default:
9939 break;
9940 }
9941 }
9942 break;
9943
9944 case AHC_AIC7895: /* 7895 */
9945 case AHC_AIC7896: /* 7896/7 */
9946 case AHC_AIC7899: /* 7899 */
9947 if (PCI_FUNC(pdev->devfn) != 0)
9948 {
9949 temp_p->flags |= AHC_CHNLB;
9950 }
9951 /*
9952 * The 7895 is the only chipset that sets the SCBSIZE32 param
9953 * in the DEVCONFIG register. The Ultra2 chipsets use
9954 * the DSCOMMAND0 register instead.
9955 */
9956 if ((temp_p->chip & AHC_CHIPID_MASK) == AHC_AIC7895)
9957 {
9958 pci_read_config_dword(pdev, DEVCONFIG, &devconfig);
9959 devconfig |= SCBSIZE32;
9960 pci_write_config_dword(pdev, DEVCONFIG, devconfig);
9961 }
9962 break;
9963 default:
9964 break;
9965 }
9966
9967 /*
9968 * Loading of the SEEPROM needs to come after we've set the flags
9969 * to indicate possible CHNLB and CHNLC assigments. Otherwise,
9970 * on 394x and 398x cards we'll end up reading the wrong settings
9971 * for channels B and C
9972 */
9973 switch (temp_p->chip & AHC_CHIPID_MASK)
9974 {
9975 case AHC_AIC7892:
9976 case AHC_AIC7899:
9977 aic_outb(temp_p, 0, SCAMCTL);
9978 /*
9979 * Switch to the alt mode of the chip...
9980 */
9981 aic_outb(temp_p, aic_inb(temp_p, SFUNCT) | ALT_MODE, SFUNCT);
9982 /*
9983 * Set our options...the last two items set our CRC after x byte
9984 * count in target mode...
9985 */
9986 aic_outb(temp_p, AUTO_MSGOUT_DE | DIS_MSGIN_DUALEDGE, OPTIONMODE);
9987 aic_outb(temp_p, 0x00, 0x0b);
9988 aic_outb(temp_p, 0x10, 0x0a);
9989 /*
9990 * switch back to normal mode...
9991 */
9992 aic_outb(temp_p, aic_inb(temp_p, SFUNCT) & ~ALT_MODE, SFUNCT);
9993 aic_outb(temp_p, CRCVALCHKEN | CRCENDCHKEN | CRCREQCHKEN |
9994 TARGCRCENDEN | TARGCRCCNTEN,
9995 CRCCONTROL1);
9996 aic_outb(temp_p, ((aic_inb(temp_p, DSCOMMAND0) | USCBSIZE32 |
9997 MPARCKEN | CIOPARCKEN | CACHETHEN) &
9998 ~DPARCKEN), DSCOMMAND0);
9999 aic7xxx_load_seeprom(temp_p, &sxfrctl1);
10000 break;
10001 case AHC_AIC7890:
10002 case AHC_AIC7896:
10003 aic_outb(temp_p, 0, SCAMCTL);
10004 aic_outb(temp_p, (aic_inb(temp_p, DSCOMMAND0) |
10005 CACHETHEN | MPARCKEN | USCBSIZE32 |
10006 CIOPARCKEN) & ~DPARCKEN, DSCOMMAND0);
10007 aic7xxx_load_seeprom(temp_p, &sxfrctl1);
10008 break;
10009 case AHC_AIC7850:
10010 case AHC_AIC7860:
10011 /*
10012 * Set the DSCOMMAND0 register on these cards different from
10013 * on the 789x cards. Also, read the SEEPROM as well.
10014 */
10015 aic_outb(temp_p, (aic_inb(temp_p, DSCOMMAND0) |
10016 CACHETHEN | MPARCKEN) & ~DPARCKEN,
10017 DSCOMMAND0);
10018 /* FALLTHROUGH */
10019 default:
10020 aic7xxx_load_seeprom(temp_p, &sxfrctl1);
10021 break;
10022 case AHC_AIC7880:
10023 /*
10024 * Check the rev of the chipset before we change DSCOMMAND0
10025 */
10026 pci_read_config_dword(pdev, DEVCONFIG, &devconfig);
10027 if ((devconfig & 0xff) >= 1)
10028 {
10029 aic_outb(temp_p, (aic_inb(temp_p, DSCOMMAND0) |
10030 CACHETHEN | MPARCKEN) & ~DPARCKEN,
10031 DSCOMMAND0);
10032 }
10033 aic7xxx_load_seeprom(temp_p, &sxfrctl1);
10034 break;
10035 }
10036
10037
10038 /*
10039 * and then we need another switch based on the type in order to
10040 * make sure the channel B primary flag is set properly on 7895
10041 * controllers....Arrrgggghhh!!! We also have to catch the fact
10042 * that when you disable the BIOS on the 7895 on the Intel DK440LX
10043 * motherboard, and possibly others, it only sets the BIOS disabled
10044 * bit on the A channel...I think I'm starting to lean towards
10045 * going postal....
10046 */
10047 switch(temp_p->chip & AHC_CHIPID_MASK)
10048 {
10049 case AHC_AIC7895:
10050 case AHC_AIC7896:
10051 case AHC_AIC7899:
10052 current_p = list_p;
10053 while(current_p != NULL)
10054 {
10055 if ( (current_p->pci_bus == temp_p->pci_bus) &&
10056 (PCI_SLOT(current_p->pci_device_fn) ==
10057 PCI_SLOT(temp_p->pci_device_fn)) )
10058 {
10059 if ( PCI_FUNC(current_p->pci_device_fn) == 0 )
10060 {
10061 temp_p->flags |=
10062 (current_p->flags & AHC_CHANNEL_B_PRIMARY);
10063 temp_p->flags &= ~(AHC_BIOS_ENABLED|AHC_USEDEFAULTS);
10064 temp_p->flags |=
10065 (current_p->flags & (AHC_BIOS_ENABLED|AHC_USEDEFAULTS));
10066 }
10067 else
10068 {
10069 current_p->flags |=
10070 (temp_p->flags & AHC_CHANNEL_B_PRIMARY);
10071 current_p->flags &= ~(AHC_BIOS_ENABLED|AHC_USEDEFAULTS);
10072 current_p->flags |=
10073 (temp_p->flags & (AHC_BIOS_ENABLED|AHC_USEDEFAULTS));
10074 }
10075 }
10076 current_p = current_p->next;
10077 }
10078 break;
10079 default:
10080 break;
10081 }
10082
10083 /*
10084 * We only support external SCB RAM on the 7895/6/7 chipsets.
10085 * We could support it on the 7890/1 easy enough, but I don't
10086 * know of any 7890/1 based cards that have it. I do know
10087 * of 7895/6/7 cards that have it and they work properly.
10088 */
10089 switch(temp_p->chip & AHC_CHIPID_MASK)
10090 {
10091 default:
10092 break;
10093 case AHC_AIC7895:
10094 case AHC_AIC7896:
10095 case AHC_AIC7899:
10096 pci_read_config_dword(pdev, DEVCONFIG, &devconfig);
10097 if (temp_p->features & AHC_ULTRA2)
10098 {
10099 if ( (aic_inb(temp_p, DSCOMMAND0) & RAMPSM_ULTRA2) &&
10100 (aic7xxx_scbram) )
10101 {
10102 aic_outb(temp_p,
10103 aic_inb(temp_p, DSCOMMAND0) & ~SCBRAMSEL_ULTRA2,
10104 DSCOMMAND0);
10105 temp_p->flags |= AHC_EXTERNAL_SRAM;
10106 devconfig |= EXTSCBPEN;
10107 }
10108 else if (aic_inb(temp_p, DSCOMMAND0) & RAMPSM_ULTRA2)
10109 {
10110 printk(KERN_INFO "aic7xxx: <%s> at PCI %d/%d/%d\n",
10111 board_names[aic_pdevs[i].board_name_index],
10112 temp_p->pci_bus,
10113 PCI_SLOT(temp_p->pci_device_fn),
10114 PCI_FUNC(temp_p->pci_device_fn));
10115 printk("aic7xxx: external SCB RAM detected, "
10116 "but not enabled\n");
10117 }
10118 }
10119 else
10120 {
10121 if ((devconfig & RAMPSM) && (aic7xxx_scbram))
10122 {
10123 devconfig &= ~SCBRAMSEL;
10124 devconfig |= EXTSCBPEN;
10125 temp_p->flags |= AHC_EXTERNAL_SRAM;
10126 }
10127 else if (devconfig & RAMPSM)
10128 {
10129 printk(KERN_INFO "aic7xxx: <%s> at PCI %d/%d/%d\n",
10130 board_names[aic_pdevs[i].board_name_index],
10131 temp_p->pci_bus,
10132 PCI_SLOT(temp_p->pci_device_fn),
10133 PCI_FUNC(temp_p->pci_device_fn));
10134 printk("aic7xxx: external SCB RAM detected, "
10135 "but not enabled\n");
10136 }
10137 }
10138 pci_write_config_dword(pdev, DEVCONFIG, devconfig);
10139 if ( (temp_p->flags & AHC_EXTERNAL_SRAM) &&
10140 (temp_p->flags & AHC_CHNLB) )
10141 aic_outb(temp_p, 1, CCSCBBADDR);
10142 break;
10143 }
10144
10145 /*
10146 * Take the LED out of diagnostic mode
10147 */
10148 aic_outb(temp_p,
10149 (aic_inb(temp_p, SBLKCTL) & ~(DIAGLEDEN | DIAGLEDON)),
10150 SBLKCTL);
10151
10152 /*
10153 * We don't know where this is set in the SEEPROM or by the
10154 * BIOS, so we default to 100%. On Ultra2 controllers, use 75%
10155 * instead.
10156 */
10157 if (temp_p->features & AHC_ULTRA2)
10158 {
10159 aic_outb(temp_p, RD_DFTHRSH_MAX | WR_DFTHRSH_MAX, DFF_THRSH);
10160 }
10161 else
10162 {
10163 aic_outb(temp_p, DFTHRSH_100, DSPCISTATUS);
10164 }
10165
10166 /*
10167 * Call our function to fixup any bugs that exist on this chipset.
10168 * This may muck with PCI settings and other device settings, so
10169 * make sure it's after all the other PCI and device register
10170 * tweaks so it can back out bad settings on specific broken cards.
10171 */
10172 aic7xxx_configure_bugs(temp_p);
10173
10174 if ( list_p == NULL )
10175 {
10176 list_p = current_p = temp_p;
10177 }
10178 else
10179 {
10180 current_p = list_p;
10181 while(current_p->next != NULL)
10182 current_p = current_p->next;
10183 current_p->next = temp_p;
10184 }
10185 temp_p->next = NULL;
10186 found++;
10187 } /* Found an Adaptec PCI device. */
10188 else /* Well, we found one, but we couldn't get any memory */
10189 {
10190 printk("aic7xxx: Found <%s>\n",
10191 board_names[aic_pdevs[i].board_name_index]);
10192 printk(KERN_INFO "aic7xxx: Unable to allocate device memory, "
10193 "skipping.\n");
10194 }
10195 } /* while(pdev=....) */
10196 } /* for PCI_DEVICES */
10197 } /* PCI BIOS present */
10198 #endif /* CONFIG_PCI */
10199
10200 #if defined(__i386__) || defined(__alpha__)
10201 /*
10202 * EISA/VL-bus card signature probe.
10203 */
10204 slot = MINSLOT;
10205 while ( (slot <= MAXSLOT) &&
10206 !(aic7xxx_no_probe) )
10207 {
10208 base = SLOTBASE(slot) + MINREG;
10209
10210 if (check_region(base, MAXREG - MINREG))
10211 {
10212 /*
10213 * Some other driver has staked a
10214 * claim to this i/o region already.
10215 */
10216 slot++;
10217 continue; /* back to the beginning of the for loop */
10218 }
10219 flags = 0;
10220 type = aic7xxx_probe(slot, base + AHC_HID0, &flags);
10221 if (type == -1)
10222 {
10223 slot++;
10224 continue;
10225 }
10226 temp_p = kmalloc(sizeof(struct aic7xxx_host), GFP_ATOMIC);
10227 if (temp_p == NULL)
10228 {
10229 printk(KERN_WARNING "aic7xxx: Unable to allocate device space.\n");
10230 slot++;
10231 continue; /* back to the beginning of the while loop */
10232 }
10233 /*
10234 * Lock out other contenders for our i/o space.
10235 */
10236 request_region(base, MAXREG - MINREG, "aic7xxx");
10237
10238 /*
10239 * Pause the card preserving the IRQ type. Allow the operator
10240 * to override the IRQ trigger.
10241 */
10242 if (aic7xxx_irq_trigger == 1)
10243 hcntrl = IRQMS; /* Level */
10244 else if (aic7xxx_irq_trigger == 0)
10245 hcntrl = 0; /* Edge */
10246 else
10247 hcntrl = inb(base + HCNTRL) & IRQMS; /* Default */
10248 memset(temp_p, 0, sizeof(struct aic7xxx_host));
10249 temp_p->unpause = hcntrl | INTEN;
10250 temp_p->pause = hcntrl | PAUSE | INTEN;
10251 temp_p->base = base;
10252 temp_p->mbase = 0;
10253 temp_p->maddr = 0;
10254 temp_p->pci_bus = 0;
10255 temp_p->pci_device_fn = slot;
10256 aic_outb(temp_p, hcntrl | PAUSE, HCNTRL);
10257 while( (aic_inb(temp_p, HCNTRL) & PAUSE) == 0 ) ;
10258 if (aic7xxx_chip_reset(temp_p) == -1)
10259 temp_p->irq = 0;
10260 else
10261 temp_p->irq = aic_inb(temp_p, INTDEF) & 0x0F;
10262 temp_p->flags |= AHC_PAGESCBS;
10263
10264 switch (temp_p->irq)
10265 {
10266 case 9:
10267 case 10:
10268 case 11:
10269 case 12:
10270 case 14:
10271 case 15:
10272 break;
10273
10274 default:
10275 printk(KERN_WARNING "aic7xxx: Host adapter uses unsupported IRQ "
10276 "level %d, ignoring.\n", temp_p->irq);
10277 kfree(temp_p);
10278 release_region(base, MAXREG - MINREG);
10279 slot++;
10280 continue; /* back to the beginning of the while loop */
10281 }
10282
10283 /*
10284 * We are commited now, everything has been checked and this card
10285 * has been found, now we just set it up
10286 */
10287
10288 /*
10289 * Insert our new struct into the list at the end
10290 */
10291 if (list_p == NULL)
10292 {
10293 list_p = current_p = temp_p;
10294 }
10295 else
10296 {
10297 current_p = list_p;
10298 while (current_p->next != NULL)
10299 current_p = current_p->next;
10300 current_p->next = temp_p;
10301 }
10302
10303 switch (type)
10304 {
10305 case 0:
10306 temp_p->board_name_index = 2;
10307 if (aic7xxx_verbose & VERBOSE_PROBE2)
10308 printk("aic7xxx: <%s> at EISA %d\n",
10309 board_names[2], slot);
10310 /* FALLTHROUGH */
10311 case 1:
10312 {
10313 temp_p->chip = AHC_AIC7770 | AHC_EISA;
10314 temp_p->features |= AHC_AIC7770_FE;
10315 temp_p->bios_control = aic_inb(temp_p, HA_274_BIOSCTRL);
10316
10317 /*
10318 * Get the primary channel information. Right now we don't
10319 * do anything with this, but someday we will be able to inform
10320 * the mid-level SCSI code which channel is primary.
10321 */
10322 if (temp_p->board_name_index == 0)
10323 {
10324 temp_p->board_name_index = 3;
10325 if (aic7xxx_verbose & VERBOSE_PROBE2)
10326 printk("aic7xxx: <%s> at EISA %d\n",
10327 board_names[3], slot);
10328 }
10329 if (temp_p->bios_control & CHANNEL_B_PRIMARY)
10330 {
10331 temp_p->flags |= AHC_CHANNEL_B_PRIMARY;
10332 }
10333
10334 if ((temp_p->bios_control & BIOSMODE) == BIOSDISABLED)
10335 {
10336 temp_p->flags &= ~AHC_BIOS_ENABLED;
10337 }
10338 else
10339 {
10340 temp_p->flags &= ~AHC_USEDEFAULTS;
10341 temp_p->flags |= AHC_BIOS_ENABLED;
10342 if ( (temp_p->bios_control & 0x20) == 0 )
10343 {
10344 temp_p->bios_address = 0xcc000;
10345 temp_p->bios_address += (0x4000 * (temp_p->bios_control & 0x07));
10346 }
10347 else
10348 {
10349 temp_p->bios_address = 0xd0000;
10350 temp_p->bios_address += (0x8000 * (temp_p->bios_control & 0x06));
10351 }
10352 }
10353 temp_p->adapter_control = aic_inb(temp_p, SCSICONF) << 8;
10354 temp_p->adapter_control |= aic_inb(temp_p, SCSICONF + 1);
10355 if (temp_p->features & AHC_WIDE)
10356 {
10357 temp_p->scsi_id = temp_p->adapter_control & HWSCSIID;
10358 temp_p->scsi_id_b = temp_p->scsi_id;
10359 }
10360 else
10361 {
10362 temp_p->scsi_id = (temp_p->adapter_control >> 8) & HSCSIID;
10363 temp_p->scsi_id_b = temp_p->adapter_control & HSCSIID;
10364 }
10365 aic7xxx_load_seeprom(temp_p, &sxfrctl1);
10366 break;
10367 }
10368
10369 case 2:
10370 case 3:
10371 temp_p->chip = AHC_AIC7770 | AHC_VL;
10372 temp_p->features |= AHC_AIC7770_FE;
10373 if (type == 2)
10374 temp_p->flags |= AHC_BIOS_ENABLED;
10375 else
10376 temp_p->flags &= ~AHC_BIOS_ENABLED;
10377 if (aic_inb(temp_p, SCSICONF) & TERM_ENB)
10378 sxfrctl1 = STPWEN;
10379 aic7xxx_load_seeprom(temp_p, &sxfrctl1);
10380 temp_p->board_name_index = 4;
10381 if (aic7xxx_verbose & VERBOSE_PROBE2)
10382 printk("aic7xxx: <%s> at VLB %d\n",
10383 board_names[2], slot);
10384 switch( aic_inb(temp_p, STATUS_2840) & BIOS_SEL )
10385 {
10386 case 0x00:
10387 temp_p->bios_address = 0xe0000;
10388 break;
10389 case 0x20:
10390 temp_p->bios_address = 0xc8000;
10391 break;
10392 case 0x40:
10393 temp_p->bios_address = 0xd0000;
10394 break;
10395 case 0x60:
10396 temp_p->bios_address = 0xd8000;
10397 break;
10398 default:
10399 break; /* can't get here */
10400 }
10401 break;
10402
10403 default: /* Won't get here. */
10404 break;
10405 }
10406 if (aic7xxx_verbose & VERBOSE_PROBE2)
10407 {
10408 printk(KERN_INFO "aic7xxx: BIOS %sabled, IO Port 0x%lx, IRQ %d (%s)\n",
10409 (temp_p->flags & AHC_USEDEFAULTS) ? "dis" : "en", temp_p->base,
10410 temp_p->irq,
10411 (temp_p->pause & IRQMS) ? "level sensitive" : "edge triggered");
10412 printk(KERN_INFO "aic7xxx: Extended translation %sabled.\n",
10413 (temp_p->flags & AHC_EXTEND_TRANS_A) ? "en" : "dis");
10414 }
10415
10416 /*
10417 * All the 7770 based chipsets have this bug
10418 */
10419 temp_p->bugs |= AHC_BUG_TMODE_WIDEODD;
10420
10421 /*
10422 * Set the FIFO threshold and the bus off time.
10423 */
10424 hostconf = aic_inb(temp_p, HOSTCONF);
10425 aic_outb(temp_p, hostconf & DFTHRSH, BUSSPD);
10426 aic_outb(temp_p, (hostconf << 2) & BOFF, BUSTIME);
10427 slot++;
10428 found++;
10429 }
10430
10431 #endif /* defined(__i386__) || defined(__alpha__) */
10432
10433 /*
10434 * Now, we re-order the probed devices by BIOS address and BUS class.
10435 * In general, we follow this algorithm to make the adapters show up
10436 * in the same order under linux that the computer finds them.
10437 * 1: All VLB/EISA cards with BIOS_ENABLED first, according to BIOS
10438 * address, going from lowest to highest.
10439 * 2: All PCI controllers with BIOS_ENABLED next, according to BIOS
10440 * address, going from lowest to highest.
10441 * 3: Remaining VLB/EISA controllers going in slot order.
10442 * 4: Remaining PCI controllers, going in PCI device order (reversable)
10443 */
10444
10445 {
10446 struct aic7xxx_host *sort_list[4] = { NULL, NULL, NULL, NULL };
10447 struct aic7xxx_host *vlb, *pci;
10448 struct aic7xxx_host *prev_p;
10449 struct aic7xxx_host *p;
10450 unsigned char left;
10451
10452 prev_p = vlb = pci = NULL;
10453
10454 temp_p = list_p;
10455 while (temp_p != NULL)
10456 {
10457 switch(temp_p->chip & ~AHC_CHIPID_MASK)
10458 {
10459 case AHC_EISA:
10460 case AHC_VL:
10461 {
10462 p = temp_p;
10463 if (p->flags & AHC_BIOS_ENABLED)
10464 vlb = sort_list[0];
10465 else
10466 vlb = sort_list[2];
10467
10468 if (vlb == NULL)
10469 {
10470 vlb = temp_p;
10471 temp_p = temp_p->next;
10472 vlb->next = NULL;
10473 }
10474 else
10475 {
10476 current_p = vlb;
10477 prev_p = NULL;
10478 while ( (current_p != NULL) &&
10479 (current_p->bios_address < temp_p->bios_address))
10480 {
10481 prev_p = current_p;
10482 current_p = current_p->next;
10483 }
10484 if (prev_p != NULL)
10485 {
10486 prev_p->next = temp_p;
10487 temp_p = temp_p->next;
10488 prev_p->next->next = current_p;
10489 }
10490 else
10491 {
10492 vlb = temp_p;
10493 temp_p = temp_p->next;
10494 vlb->next = current_p;
10495 }
10496 }
10497
10498 if (p->flags & AHC_BIOS_ENABLED)
10499 sort_list[0] = vlb;
10500 else
10501 sort_list[2] = vlb;
10502
10503 break;
10504 }
10505 default: /* All PCI controllers fall through to default */
10506 {
10507
10508 p = temp_p;
10509 if (p->flags & AHC_BIOS_ENABLED)
10510 pci = sort_list[1];
10511 else
10512 pci = sort_list[3];
10513
10514 if (pci == NULL)
10515 {
10516 pci = temp_p;
10517 temp_p = temp_p->next;
10518 pci->next = NULL;
10519 }
10520 else
10521 {
10522 current_p = pci;
10523 prev_p = NULL;
10524 if (!aic7xxx_reverse_scan)
10525 {
10526 while ( (current_p != NULL) &&
10527 ( (PCI_SLOT(current_p->pci_device_fn) |
10528 (current_p->pci_bus << 8)) <
10529 (PCI_SLOT(temp_p->pci_device_fn) |
10530 (temp_p->pci_bus << 8)) ) )
10531 {
10532 prev_p = current_p;
10533 current_p = current_p->next;
10534 }
10535 }
10536 else
10537 {
10538 while ( (current_p != NULL) &&
10539 ( (PCI_SLOT(current_p->pci_device_fn) |
10540 (current_p->pci_bus << 8)) >
10541 (PCI_SLOT(temp_p->pci_device_fn) |
10542 (temp_p->pci_bus << 8)) ) )
10543 {
10544 prev_p = current_p;
10545 current_p = current_p->next;
10546 }
10547 }
10548 /*
10549 * Are we dealing with a 7895/6/7/9 where we need to sort the
10550 * channels as well, if so, the bios_address values should
10551 * be the same
10552 */
10553 if ( (current_p) && (temp_p->flags & AHC_MULTI_CHANNEL) &&
10554 (temp_p->pci_bus == current_p->pci_bus) &&
10555 (PCI_SLOT(temp_p->pci_device_fn) ==
10556 PCI_SLOT(current_p->pci_device_fn)) )
10557 {
10558 if (temp_p->flags & AHC_CHNLB)
10559 {
10560 if ( !(temp_p->flags & AHC_CHANNEL_B_PRIMARY) )
10561 {
10562 prev_p = current_p;
10563 current_p = current_p->next;
10564 }
10565 }
10566 else
10567 {
10568 if (temp_p->flags & AHC_CHANNEL_B_PRIMARY)
10569 {
10570 prev_p = current_p;
10571 current_p = current_p->next;
10572 }
10573 }
10574 }
10575 if (prev_p != NULL)
10576 {
10577 prev_p->next = temp_p;
10578 temp_p = temp_p->next;
10579 prev_p->next->next = current_p;
10580 }
10581 else
10582 {
10583 pci = temp_p;
10584 temp_p = temp_p->next;
10585 pci->next = current_p;
10586 }
10587 }
10588
10589 if (p->flags & AHC_BIOS_ENABLED)
10590 sort_list[1] = pci;
10591 else
10592 sort_list[3] = pci;
10593
10594 break;
10595 }
10596 } /* End of switch(temp_p->type) */
10597 } /* End of while (temp_p != NULL) */
10598 /*
10599 * At this point, the cards have been broken into 4 sorted lists, now
10600 * we run through the lists in order and register each controller
10601 */
10602 {
10603 int i;
10604
10605 left = found;
10606 for (i=0; i<NUMBER(sort_list); i++)
10607 {
10608 temp_p = sort_list[i];
10609 while(temp_p != NULL)
10610 {
10611 template->name = board_names[temp_p->board_name_index];
10612 p = aic7xxx_alloc(template, temp_p);
10613 if (p != NULL)
10614 {
10615 p->instance = found - left;
10616 if (aic7xxx_register(template, p, (--left)) == 0)
10617 {
10618 found--;
10619 aic7xxx_release(p->host);
10620 scsi_unregister(p->host);
10621 }
10622 else if (aic7xxx_dump_card)
10623 {
10624 pause_sequencer(p);
10625 aic7xxx_print_card(p);
10626 aic7xxx_print_scratch_ram(p);
10627 unpause_sequencer(p, TRUE);
10628 }
10629 }
10630 current_p = temp_p;
10631 temp_p = (struct aic7xxx_host *)temp_p->next;
10632 kfree(current_p);
10633 }
10634 }
10635 }
10636 }
10637 return (found);
10638 }
10639
10640 #ifdef AIC7XXX_VERBOSE_DEBUGGING
10641 /*+F*************************************************************************
10642 * Function:
10643 * aic7xxx_print_scb
10644 *
10645 * Description:
10646 * Dump the byte codes for an about to be sent SCB.
10647 *-F*************************************************************************/
10648 static void
10649 aic7xxx_print_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
10650 {
10651 int i;
10652 unsigned char *x;
10653
10654 x = (unsigned char *)&scb->hscb->control;
10655
10656 for(i=0; i<32; i++)
10657 {
10658 printk("%02x ", x[i]);
10659 }
10660 printk("\n");
10661 }
10662 #endif
10663
10664 /*+F*************************************************************************
10665 * Function:
10666 * aic7xxx_buildscb
10667 *
10668 * Description:
10669 * Build a SCB.
10670 *-F*************************************************************************/
10671 static void
10672 aic7xxx_buildscb(struct aic7xxx_host *p, Scsi_Cmnd *cmd,
10673 struct aic7xxx_scb *scb)
10674 {
10675 unsigned short mask;
10676 struct aic7xxx_hwscb *hscb;
10677 unsigned char tindex = TARGET_INDEX(cmd);
10678
10679 mask = (0x01 << tindex);
10680 hscb = scb->hscb;
10681
10682 /*
10683 * Setup the control byte if we need negotiation and have not
10684 * already requested it.
10685 */
10686 hscb->control = 0;
10687 scb->tag_action = 0;
10688
10689 if (p->discenable & mask)
10690 {
10691 hscb->control |= DISCENB;
10692 if ( (p->tagenable & mask) &&
10693 (cmd->cmnd[0] != TEST_UNIT_READY) )
10694 {
10695 p->dev_commands_sent[tindex]++;
10696 if (p->dev_commands_sent[tindex] < 200)
10697 {
10698 hscb->control |= MSG_SIMPLE_Q_TAG;
10699 scb->tag_action = MSG_SIMPLE_Q_TAG;
10700 }
10701 else
10702 {
10703 if (p->orderedtag & mask)
10704 {
10705 hscb->control |= MSG_ORDERED_Q_TAG;
10706 scb->tag_action = MSG_ORDERED_Q_TAG;
10707 }
10708 else
10709 {
10710 hscb->control |= MSG_SIMPLE_Q_TAG;
10711 scb->tag_action = MSG_SIMPLE_Q_TAG;
10712 }
10713 p->dev_commands_sent[tindex] = 0;
10714 }
10715 }
10716 }
10717 if ( !(p->dtr_pending & mask) &&
10718 ( (p->needppr & mask) ||
10719 (p->needwdtr & mask) ||
10720 (p->needsdtr & mask) ) &&
10721 (p->dev_flags[tindex] & DEVICE_DTR_SCANNED) )
10722 {
10723 p->dtr_pending |= mask;
10724 scb->tag_action = 0;
10725 hscb->control &= DISCENB;
10726 hscb->control |= MK_MESSAGE;
10727 if(p->needppr & mask)
10728 {
10729 scb->flags |= SCB_MSGOUT_PPR;
10730 }
10731 else if(p->needwdtr & mask)
10732 {
10733 scb->flags |= SCB_MSGOUT_WDTR;
10734 }
10735 else if(p->needsdtr & mask)
10736 {
10737 scb->flags |= SCB_MSGOUT_SDTR;
10738 }
10739 scb->flags |= SCB_DTR_SCB;
10740 }
10741 hscb->target_channel_lun = ((cmd->target << 4) & 0xF0) |
10742 ((cmd->channel & 0x01) << 3) | (cmd->lun & 0x07);
10743
10744 /*
10745 * The interpretation of request_buffer and request_bufflen
10746 * changes depending on whether or not use_sg is zero; a
10747 * non-zero use_sg indicates the number of elements in the
10748 * scatter-gather array.
10749 */
10750
10751 /*
10752 * XXX - this relies on the host data being stored in a
10753 * little-endian format.
10754 */
10755 hscb->SCSI_cmd_length = cmd->cmd_len;
10756 memcpy(scb->cmnd, cmd->cmnd, cmd->cmd_len);
10757 hscb->SCSI_cmd_pointer = cpu_to_le32(SCB_DMA_ADDR(scb, scb->cmnd));
10758
10759 if (cmd->use_sg)
10760 {
10761 struct scatterlist *sg; /* Must be mid-level SCSI code scatterlist */
10762
10763 /*
10764 * We must build an SG list in adapter format, as the kernel's SG list
10765 * cannot be used directly because of data field size (__alpha__)
10766 * differences and the kernel SG list uses virtual addresses where
10767 * we need physical addresses.
10768 */
10769 int i, use_sg;
10770
10771 sg = (struct scatterlist *)cmd->request_buffer;
10772 scb->sg_length = 0;
10773 use_sg = pci_map_sg(p->pdev, sg, cmd->use_sg, scsi_to_pci_dma_dir(cmd->sc_data_direction));
10774 /*
10775 * Copy the segments into the SG array. NOTE!!! - We used to
10776 * have the first entry both in the data_pointer area and the first
10777 * SG element. That has changed somewhat. We still have the first
10778 * entry in both places, but now we download the address of
10779 * scb->sg_list[1] instead of 0 to the sg pointer in the hscb.
10780 */
10781 for (i = 0; i < use_sg; i++)
10782 {
10783 unsigned int len = sg_dma_len(sg+i);
10784 scb->sg_list[i].address = cpu_to_le32(sg_dma_address(sg+i));
10785 scb->sg_list[i].length = cpu_to_le32(len);
10786 scb->sg_length += len;
10787 }
10788 /* Copy the first SG into the data pointer area. */
10789 hscb->data_pointer = scb->sg_list[0].address;
10790 hscb->data_count = scb->sg_list[0].length;
10791 scb->sg_count = i;
10792 hscb->SG_segment_count = i;
10793 hscb->SG_list_pointer = cpu_to_le32(SCB_DMA_ADDR(scb, &scb->sg_list[1]));
10794 }
10795 else
10796 {
10797 if (cmd->request_bufflen)
10798 {
10799 unsigned int address = pci_map_single(p->pdev, cmd->request_buffer,
10800 cmd->request_bufflen,
10801 scsi_to_pci_dma_dir(cmd->sc_data_direction));
10802 aic7xxx_mapping(cmd) = address;
10803 scb->sg_list[0].address = cpu_to_le32(address);
10804 scb->sg_list[0].length = cpu_to_le32(cmd->request_bufflen);
10805 scb->sg_count = 1;
10806 scb->sg_length = cmd->request_bufflen;
10807 hscb->SG_segment_count = 1;
10808 hscb->SG_list_pointer = cpu_to_le32(SCB_DMA_ADDR(scb, &scb->sg_list[0]));
10809 hscb->data_count = scb->sg_list[0].length;
10810 hscb->data_pointer = scb->sg_list[0].address;
10811 }
10812 else
10813 {
10814 scb->sg_count = 0;
10815 scb->sg_length = 0;
10816 hscb->SG_segment_count = 0;
10817 hscb->SG_list_pointer = 0;
10818 hscb->data_count = 0;
10819 hscb->data_pointer = 0;
10820 }
10821 }
10822 }
10823
10824 /*+F*************************************************************************
10825 * Function:
10826 * aic7xxx_queue
10827 *
10828 * Description:
10829 * Queue a SCB to the controller.
10830 *-F*************************************************************************/
10831 int
10832 aic7xxx_queue(Scsi_Cmnd *cmd, void (*fn)(Scsi_Cmnd *))
10833 {
10834 struct aic7xxx_host *p;
10835 struct aic7xxx_scb *scb;
10836 #ifdef AIC7XXX_VERBOSE_DEBUGGING
10837 int tindex = TARGET_INDEX(cmd);
10838 #endif
10839 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95)
10840 unsigned long cpu_flags = 0;
10841 #endif
10842
10843 p = (struct aic7xxx_host *) cmd->host->hostdata;
10844 /*
10845 * Check to see if channel was scanned.
10846 */
10847
10848 #ifdef AIC7XXX_VERBOSE_DEBUGGING
10849 if (!(p->flags & AHC_A_SCANNED) && (cmd->channel == 0))
10850 {
10851 if (aic7xxx_verbose & VERBOSE_PROBE2)
10852 printk(INFO_LEAD "Scanning channel for devices.\n",
10853 p->host_no, 0, -1, -1);
10854 p->flags |= AHC_A_SCANNED;
10855 }
10856 else
10857 {
10858 if (!(p->flags & AHC_B_SCANNED) && (cmd->channel == 1))
10859 {
10860 if (aic7xxx_verbose & VERBOSE_PROBE2)
10861 printk(INFO_LEAD "Scanning channel for devices.\n",
10862 p->host_no, 1, -1, -1);
10863 p->flags |= AHC_B_SCANNED;
10864 }
10865 }
10866
10867 if (p->dev_active_cmds[tindex] > (cmd->device->queue_depth + 1))
10868 {
10869 printk(WARN_LEAD "Commands queued exceeds queue "
10870 "depth, active=%d\n",
10871 p->host_no, CTL_OF_CMD(cmd),
10872 p->dev_active_cmds[tindex]);
10873 if ( p->dev_active_cmds[tindex] > 220 )
10874 p->dev_active_cmds[tindex] = 0;
10875 }
10876 #endif
10877
10878 scb = scbq_remove_head(&p->scb_data->free_scbs);
10879 if (scb == NULL)
10880 {
10881 DRIVER_LOCK
10882 aic7xxx_allocate_scb(p);
10883 DRIVER_UNLOCK
10884 scb = scbq_remove_head(&p->scb_data->free_scbs);
10885 if(scb == NULL)
10886 printk(WARN_LEAD "Couldn't get a free SCB.\n", p->host_no,
10887 CTL_OF_CMD(cmd));
10888 }
10889 while (scb == NULL)
10890 {
10891 /*
10892 * Well, all SCBs are currently active on the bus. So, we spin here
10893 * running the interrupt handler until one completes and becomes free.
10894 * We can do this safely because we either A) hold the driver lock (in
10895 * 2.0 kernels) or we have the io_request_lock held (in 2.2 and later
10896 * kernels) and so either way, we won't take any other interrupts and
10897 * the queue path will block until we release it. Also, we would worry
10898 * about running the completion queues, but obviously there are plenty
10899 * of commands outstanding to trigger a later interrupt that will do
10900 * that for us, so skip it here.
10901 */
10902 DRIVER_LOCK
10903 aic7xxx_isr(p->irq, p, NULL);
10904 DRIVER_UNLOCK
10905 scb = scbq_remove_head(&p->scb_data->free_scbs);
10906 }
10907 scb->cmd = cmd;
10908 aic7xxx_position(cmd) = scb->hscb->tag;
10909
10910 /*
10911 * Make sure the Scsi_Cmnd pointer is saved, the struct it points to
10912 * is set up properly, and the parity error flag is reset, then send
10913 * the SCB to the sequencer and watch the fun begin.
10914 */
10915 cmd->scsi_done = fn;
10916 cmd->result = DID_OK;
10917 memset(cmd->sense_buffer, 0, sizeof(cmd->sense_buffer));
10918 aic7xxx_error(cmd) = DID_OK;
10919 aic7xxx_status(cmd) = 0;
10920 cmd->host_scribble = NULL;
10921
10922 /*
10923 * Construct the SCB beforehand, so the sequencer is
10924 * paused a minimal amount of time.
10925 */
10926 aic7xxx_buildscb(p, cmd, scb);
10927
10928 scb->flags |= SCB_ACTIVE | SCB_WAITINGQ;
10929
10930 DRIVER_LOCK
10931 scbq_insert_tail(&p->waiting_scbs, scb);
10932 if ( (p->flags & (AHC_IN_ISR | AHC_IN_ABORT | AHC_IN_RESET)) == 0)
10933 {
10934 aic7xxx_run_waiting_queues(p);
10935 }
10936 DRIVER_UNLOCK
10937 return (0);
10938 }
10939
10940 /*+F*************************************************************************
10941 * Function:
10942 * aic7xxx_bus_device_reset
10943 *
10944 * Description:
10945 * Abort or reset the current SCSI command(s). If the scb has not
10946 * previously been aborted, then we attempt to send a BUS_DEVICE_RESET
10947 * message to the target. If the scb has previously been unsuccessfully
10948 * aborted, then we will reset the channel and have all devices renegotiate.
10949 * Returns an enumerated type that indicates the status of the operation.
10950 *-F*************************************************************************/
10951 static int
10952 aic7xxx_bus_device_reset(struct aic7xxx_host *p, Scsi_Cmnd *cmd)
10953 {
10954 struct aic7xxx_scb *scb;
10955 struct aic7xxx_hwscb *hscb;
10956 int result = -1;
10957 int channel;
10958 unsigned char saved_scbptr, lastphase;
10959 unsigned char hscb_index;
10960 int disconnected;
10961
10962 scb = (p->scb_data->scb_array[aic7xxx_position(cmd)]);
10963 hscb = scb->hscb;
10964
10965 lastphase = aic_inb(p, LASTPHASE);
10966 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
10967 {
10968 printk(INFO_LEAD "Bus Device reset, scb flags 0x%x, ",
10969 p->host_no, CTL_OF_SCB(scb), scb->flags);
10970 switch (lastphase)
10971 {
10972 case P_DATAOUT:
10973 printk("Data-Out phase\n");
10974 break;
10975 case P_DATAIN:
10976 printk("Data-In phase\n");
10977 break;
10978 case P_COMMAND:
10979 printk("Command phase\n");
10980 break;
10981 case P_MESGOUT:
10982 printk("Message-Out phase\n");
10983 break;
10984 case P_STATUS:
10985 printk("Status phase\n");
10986 break;
10987 case P_MESGIN:
10988 printk("Message-In phase\n");
10989 break;
10990 default:
10991 /*
10992 * We're not in a valid phase, so assume we're idle.
10993 */
10994 printk("while idle, LASTPHASE = 0x%x\n", lastphase);
10995 break;
10996 }
10997 printk(INFO_LEAD "SCSISIGI 0x%x, SEQADDR 0x%x, SSTAT0 0x%x, SSTAT1 "
10998 "0x%x\n", p->host_no, CTL_OF_SCB(scb),
10999 aic_inb(p, SCSISIGI),
11000 aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8),
11001 aic_inb(p, SSTAT0), aic_inb(p, SSTAT1));
11002 printk(INFO_LEAD "SG_CACHEPTR 0x%x, SSTAT2 0x%x, STCNT 0x%x\n", p->host_no,
11003 CTL_OF_SCB(scb),
11004 (p->features & AHC_ULTRA2) ? aic_inb(p, SG_CACHEPTR) : 0,
11005 aic_inb(p, SSTAT2),
11006 aic_inb(p, STCNT + 2) << 16 | aic_inb(p, STCNT + 1) << 8 |
11007 aic_inb(p, STCNT));
11008 }
11009
11010 channel = cmd->channel;
11011
11012 /*
11013 * Send a Device Reset Message:
11014 * The target that is holding up the bus may not be the same as
11015 * the one that triggered this timeout (different commands have
11016 * different timeout lengths). Our strategy here is to queue an
11017 * abort message to the timed out target if it is disconnected.
11018 * Otherwise, if we have an active target we stuff the message buffer
11019 * with an abort message and assert ATN in the hopes that the target
11020 * will let go of the bus and go to the mesgout phase. If this
11021 * fails, we'll get another timeout a few seconds later which will
11022 * attempt a bus reset.
11023 */
11024 saved_scbptr = aic_inb(p, SCBPTR);
11025 disconnected = FALSE;
11026
11027 if (lastphase != P_BUSFREE)
11028 {
11029 if (aic_inb(p, SCB_TAG) >= p->scb_data->numscbs)
11030 {
11031 printk(WARN_LEAD "Invalid SCB ID %d is active, "
11032 "SCB flags = 0x%x.\n", p->host_no,
11033 CTL_OF_CMD(cmd), scb->hscb->tag, scb->flags);
11034 return(SCSI_RESET_ERROR);
11035 }
11036 if (scb->hscb->tag == aic_inb(p, SCB_TAG))
11037 {
11038 if ( (lastphase != P_MESGOUT) && (lastphase != P_MESGIN) )
11039 {
11040 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
11041 printk(INFO_LEAD "Device reset message in "
11042 "message buffer\n", p->host_no, CTL_OF_SCB(scb));
11043 scb->flags |= SCB_RESET | SCB_DEVICE_RESET;
11044 aic7xxx_error(scb->cmd) = DID_RESET;
11045 p->dev_flags[TARGET_INDEX(scb->cmd)] |=
11046 BUS_DEVICE_RESET_PENDING;
11047 /* Send the abort message to the active SCB. */
11048 aic_outb(p, HOST_MSG, MSG_OUT);
11049 aic_outb(p, lastphase | ATNO, SCSISIGO);
11050 return(SCSI_RESET_PENDING);
11051 }
11052 else
11053 {
11054 /* We want to send out the message, but it could screw an already */
11055 /* in place and being used message. Instead, we return an error */
11056 /* to try and start the bus reset phase since this command is */
11057 /* probably hung (aborts failed, and now reset is failing). We */
11058 /* also make sure to set BUS_DEVICE_RESET_PENDING so we won't try */
11059 /* any more on this device, but instead will escalate to a bus or */
11060 /* host reset (additionally, we won't try to abort any more). */
11061 printk(WARN_LEAD "Device reset, Message buffer "
11062 "in use\n", p->host_no, CTL_OF_SCB(scb));
11063 scb->flags |= SCB_RESET | SCB_DEVICE_RESET;
11064 aic7xxx_error(scb->cmd) = DID_RESET;
11065 p->dev_flags[TARGET_INDEX(scb->cmd)] |=
11066 BUS_DEVICE_RESET_PENDING;
11067 return(SCSI_RESET_ERROR);
11068 }
11069 }
11070 } /* if (last_phase != P_BUSFREE).....indicates we are idle and can work */
11071 hscb_index = aic7xxx_find_scb(p, scb);
11072 if (hscb_index == SCB_LIST_NULL)
11073 {
11074 disconnected = (aic7xxx_scb_on_qoutfifo(p, scb)) ? FALSE : TRUE;
11075 }
11076 else
11077 {
11078 aic_outb(p, hscb_index, SCBPTR);
11079 if (aic_inb(p, SCB_CONTROL) & DISCONNECTED)
11080 {
11081 disconnected = TRUE;
11082 }
11083 }
11084 if (disconnected)
11085 {
11086 /*
11087 * Simply set the MK_MESSAGE flag and the SEQINT handler will do
11088 * the rest on a reconnect.
11089 */
11090 scb->hscb->control |= MK_MESSAGE;
11091 scb->flags |= SCB_RESET | SCB_DEVICE_RESET;
11092 p->dev_flags[TARGET_INDEX(scb->cmd)] |=
11093 BUS_DEVICE_RESET_PENDING;
11094 if (hscb_index != SCB_LIST_NULL)
11095 {
11096 unsigned char scb_control;
11097
11098 aic_outb(p, hscb_index, SCBPTR);
11099 scb_control = aic_inb(p, SCB_CONTROL);
11100 aic_outb(p, scb_control | MK_MESSAGE, SCB_CONTROL);
11101 }
11102 /*
11103 * Actually requeue this SCB in case we can select the
11104 * device before it reconnects. If the transaction we
11105 * want to abort is not tagged, then this will be the only
11106 * outstanding command and we can simply shove it on the
11107 * qoutfifo and be done. If it is tagged, then it goes right
11108 * in with all the others, no problem :) We need to add it
11109 * to the qinfifo and let the sequencer know it is there.
11110 * Now, the only problem left to deal with is, *IF* this
11111 * command completes, in spite of the MK_MESSAGE bit in the
11112 * control byte, then we need to pick that up in the interrupt
11113 * routine and clean things up. This *shouldn't* ever happen.
11114 */
11115 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
11116 printk(INFO_LEAD "Queueing device reset "
11117 "command.\n", p->host_no, CTL_OF_SCB(scb));
11118 p->qinfifo[p->qinfifonext++] = scb->hscb->tag;
11119 if (p->features & AHC_QUEUE_REGS)
11120 aic_outb(p, p->qinfifonext, HNSCB_QOFF);
11121 else
11122 aic_outb(p, p->qinfifonext, KERNEL_QINPOS);
11123 scb->flags |= SCB_QUEUED_ABORT;
11124 result = SCSI_RESET_PENDING;
11125 }
11126 else if (result == -1)
11127 {
11128 result = SCSI_RESET_ERROR;
11129 }
11130 aic_outb(p, saved_scbptr, SCBPTR);
11131 return (result);
11132 }
11133
11134
11135 /*+F*************************************************************************
11136 * Function:
11137 * aic7xxx_panic_abort
11138 *
11139 * Description:
11140 * Abort the current SCSI command(s).
11141 *-F*************************************************************************/
11142 void
11143 aic7xxx_panic_abort(struct aic7xxx_host *p, Scsi_Cmnd *cmd)
11144 {
11145
11146 printk("aic7xxx driver version %s/%s\n", AIC7XXX_C_VERSION,
11147 UTS_RELEASE);
11148 printk("Controller type:\n %s\n", board_names[p->board_name_index]);
11149 printk("p->flags=0x%lx, p->chip=0x%x, p->features=0x%x, "
11150 "sequencer %s paused\n",
11151 p->flags, p->chip, p->features,
11152 (aic_inb(p, HCNTRL) & PAUSE) ? "is" : "isn't" );
11153 pause_sequencer(p);
11154 disable_irq(p->irq);
11155 aic7xxx_print_card(p);
11156 aic7xxx_print_scratch_ram(p);
11157 spin_unlock_irq(&io_request_lock);
11158 for(;;) barrier();
11159 }
11160
11161 /*+F*************************************************************************
11162 * Function:
11163 * aic7xxx_abort
11164 *
11165 * Description:
11166 * Abort the current SCSI command(s).
11167 *-F*************************************************************************/
11168 int
11169 aic7xxx_abort(Scsi_Cmnd *cmd)
11170 {
11171 struct aic7xxx_scb *scb = NULL;
11172 struct aic7xxx_host *p;
11173 int result, found=0;
11174 unsigned char tmp_char, saved_hscbptr, next_hscbptr, prev_hscbptr;
11175 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95)
11176 unsigned long cpu_flags = 0;
11177 #endif
11178
11179 p = (struct aic7xxx_host *) cmd->host->hostdata;
11180 scb = (p->scb_data->scb_array[aic7xxx_position(cmd)]);
11181
11182 /*
11183 * I added a new config option to the driver: "panic_on_abort" that will
11184 * cause the driver to panic and the machine to stop on the first abort
11185 * or reset call into the driver. At that point, it prints out a lot of
11186 * useful information for me which I can then use to try and debug the
11187 * problem. Simply enable the boot time prompt in order to activate this
11188 * code.
11189 */
11190 if (aic7xxx_panic_on_abort)
11191 aic7xxx_panic_abort(p, cmd);
11192
11193 DRIVER_LOCK
11194
11195 /*
11196 * Run the isr to grab any command in the QOUTFIFO and any other misc.
11197 * assundry tasks. This should also set up the bh handler if there is
11198 * anything to be done, but it won't run until we are done here since
11199 * we are following a straight code path without entering the scheduler
11200 * code.
11201 */
11202 pause_sequencer(p);
11203 while ( (aic_inb(p, INTSTAT) & INT_PEND) && !(p->flags & AHC_IN_ISR))
11204 {
11205 aic7xxx_isr(p->irq, p, (void *)NULL);
11206 pause_sequencer(p);
11207 }
11208 aic7xxx_done_cmds_complete(p);
11209
11210 if (scb == NULL)
11211 {
11212 if (aic7xxx_verbose & VERBOSE_ABORT_MID)
11213 printk(INFO_LEAD "Abort called with bogus Scsi_Cmnd "
11214 "pointer.\n", p->host_no, CTL_OF_CMD(cmd));
11215 unpause_sequencer(p, FALSE);
11216 DRIVER_UNLOCK
11217 return(SCSI_ABORT_NOT_RUNNING);
11218 }
11219 if (scb->cmd != cmd) /* Hmmm...either this SCB is currently free with a */
11220 { /* NULL cmd pointer (NULLed out when freed) or it */
11221 /* has already been recycled for another command */
11222 /* Either way, this SCB has nothing to do with this*/
11223 /* command and we need to deal with cmd without */
11224 /* touching the SCB. */
11225 /* The theory here is to return a value that will */
11226 /* make the queued for complete command actually */
11227 /* finish successfully, or to indicate that we */
11228 /* don't have this cmd any more and the mid level */
11229 /* code needs to find it. */
11230 if (aic7xxx_verbose & VERBOSE_ABORT_MID)
11231 printk(INFO_LEAD "Abort called for already completed"
11232 " command.\n", p->host_no, CTL_OF_CMD(cmd));
11233 unpause_sequencer(p, FALSE);
11234 DRIVER_UNLOCK
11235 return(SCSI_ABORT_NOT_RUNNING);
11236 }
11237
11238 /* At this point we know the following:
11239 * the SCB pointer is valid
11240 * the command pointer passed in to us and the scb->cmd pointer match
11241 * this then means that the command we need to abort is the same as the
11242 * command held by the scb pointer and is a valid abort request.
11243 * Now, we just have to figure out what to do from here. Current plan is:
11244 * if we have already been here on this command, escalate to a reset
11245 * if scb is on waiting list or QINFIFO, send it back as aborted, but
11246 * we also need to be aware of the possibility that we could be using
11247 * a faked negotiation command that is holding this command up, if
11248 * so we need to take care of that command instead, which means we
11249 * would then treat this one like it was sitting around disconnected
11250 * instead.
11251 * if scb is on WAITING_SCB list in sequencer, free scb and send back
11252 * if scb is disconnected and not completed, abort with abort message
11253 * if scb is currently running, then it may be causing the bus to hang
11254 * so we want a return value that indicates a reset would be appropriate
11255 * if the command does not finish shortly
11256 * if scb is already complete but not on completeq, we're screwed because
11257 * this can't happen (except if the command is in the QOUTFIFO, in which
11258 * case we would like it to complete successfully instead of having to
11259 * to be re-done)
11260 * All other scenarios already dealt with by previous code.
11261 */
11262
11263 if ( scb->flags & (SCB_ABORT | SCB_RESET | SCB_QUEUED_ABORT) )
11264 {
11265 if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS)
11266 printk(INFO_LEAD "SCB aborted once already, "
11267 "escalating.\n", p->host_no, CTL_OF_SCB(scb));
11268 unpause_sequencer(p, FALSE);
11269 DRIVER_UNLOCK
11270 return(SCSI_ABORT_SNOOZE);
11271 }
11272 if ( (p->flags & (AHC_RESET_PENDING | AHC_ABORT_PENDING)) ||
11273 (p->dev_flags[TARGET_INDEX(scb->cmd)] &
11274 BUS_DEVICE_RESET_PENDING) )
11275 {
11276 if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS)
11277 printk(INFO_LEAD "Reset/Abort pending for this "
11278 "device, not wasting our time.\n", p->host_no, CTL_OF_SCB(scb));
11279 unpause_sequencer(p, FALSE);
11280 DRIVER_UNLOCK
11281 return(SCSI_ABORT_PENDING);
11282 }
11283
11284 found = 0;
11285 p->flags |= AHC_IN_ABORT;
11286 if (aic7xxx_verbose & VERBOSE_ABORT)
11287 {
11288 printk(INFO_LEAD "Aborting scb %d, flags 0x%x, SEQADDR 0x%x, LASTPHASE "
11289 "0x%x\n",
11290 p->host_no, CTL_OF_SCB(scb), scb->hscb->tag, scb->flags,
11291 aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8),
11292 aic_inb(p, LASTPHASE));
11293 printk(INFO_LEAD "SG_CACHEPTR 0x%x, SG_COUNT %d, SCSISIGI 0x%x\n",
11294 p->host_no, CTL_OF_SCB(scb), (p->features & AHC_ULTRA2) ?
11295 aic_inb(p, SG_CACHEPTR) : 0, aic_inb(p, SG_COUNT),
11296 aic_inb(p, SCSISIGI));
11297 printk(INFO_LEAD "SSTAT0 0x%x, SSTAT1 0x%x, SSTAT2 0x%x\n",
11298 p->host_no, CTL_OF_SCB(scb), aic_inb(p, SSTAT0),
11299 aic_inb(p, SSTAT1), aic_inb(p, SSTAT2));
11300 }
11301
11302 /*
11303 * First, let's check to see if the currently running command is our target
11304 * since if it is, the return is fairly easy and quick since we don't want
11305 * to touch the command in case it might complete, but we do want a timeout
11306 * in case it's actually hung, so we really do nothing, but tell the mid
11307 * level code to reset the timeout.
11308 */
11309
11310 if ( scb->hscb->tag == aic_inb(p, SCB_TAG) )
11311 {
11312 /*
11313 * Check to see if the sequencer is just sitting on this command, or
11314 * if it's actively being run.
11315 */
11316 result = aic_inb(p, LASTPHASE);
11317 switch (result)
11318 {
11319 case P_DATAOUT: /* For any of these cases, we can assume we are */
11320 case P_DATAIN: /* an active command and act according. For */
11321 case P_COMMAND: /* anything else we are going to fall on through*/
11322 case P_STATUS: /* The SCSI_ABORT_SNOOZE will give us two abort */
11323 case P_MESGOUT: /* chances to finish and then escalate to a */
11324 case P_MESGIN: /* reset call */
11325 if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS)
11326 printk(INFO_LEAD "SCB is currently active. "
11327 "Waiting on completion.\n", p->host_no, CTL_OF_SCB(scb));
11328 printk(INFO_LEAD "SCSISIGI 0x%x, SEQADDR 0x%x, SSTAT0 0x%x, SSTAT1 "
11329 "0x%x\n", p->host_no, CTL_OF_SCB(scb),
11330 aic_inb(p, SCSISIGI),
11331 aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8),
11332 aic_inb(p, SSTAT0), aic_inb(p, SSTAT1));
11333 printk(INFO_LEAD "SG_CACHEPTR 0x%x, SSTAT2 0x%x, STCNT 0x%x\n",
11334 p->host_no, CTL_OF_SCB(scb),
11335 (p->features & AHC_ULTRA2) ? aic_inb(p, SG_CACHEPTR) : 0,
11336 aic_inb(p, SSTAT2), aic_inb(p, STCNT + 2) << 16 |
11337 aic_inb(p, STCNT + 1) << 8 | aic_inb(p, STCNT));
11338 unpause_sequencer(p, FALSE);
11339 p->flags &= ~AHC_IN_ABORT;
11340 scb->flags |= SCB_RECOVERY_SCB; /* Note the fact that we've been */
11341 p->flags |= AHC_ABORT_PENDING; /* here so we will know not to */
11342 DRIVER_UNLOCK /* muck with other SCBs if this */
11343 return(SCSI_ABORT_PENDING); /* one doesn't complete and clear */
11344 break; /* out. */
11345 default:
11346 break;
11347 }
11348 }
11349
11350 if ((found == 0) && (scb->flags & SCB_WAITINGQ))
11351 {
11352 int tindex = TARGET_INDEX(cmd);
11353
11354 if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS)
11355 printk(INFO_LEAD "SCB found on waiting list and "
11356 "aborted.\n", p->host_no, CTL_OF_SCB(scb));
11357 scbq_remove(&p->waiting_scbs, scb);
11358 scbq_remove(&p->delayed_scbs[tindex], scb);
11359 p->dev_active_cmds[tindex]++;
11360 p->activescbs++;
11361 scb->flags &= ~(SCB_WAITINGQ | SCB_ACTIVE);
11362 scb->flags |= SCB_ABORT | SCB_QUEUED_FOR_DONE;
11363 found = 1;
11364 }
11365
11366 /*
11367 * We just checked the waiting_q, now for the QINFIFO
11368 */
11369 if ( found == 0 )
11370 {
11371 if ( ((found = aic7xxx_search_qinfifo(p, cmd->target,
11372 cmd->channel,
11373 cmd->lun, scb->hscb->tag, SCB_ABORT | SCB_QUEUED_FOR_DONE,
11374 FALSE, NULL)) != 0) &&
11375 (aic7xxx_verbose & VERBOSE_ABORT_PROCESS))
11376 printk(INFO_LEAD "SCB found in QINFIFO and "
11377 "aborted.\n", p->host_no, CTL_OF_SCB(scb));
11378 }
11379
11380 /*
11381 * QINFIFO, waitingq, completeq done. Next, check WAITING_SCB list in card
11382 */
11383
11384 if ( found == 0 )
11385 {
11386 unsigned char scb_next_ptr;
11387 prev_hscbptr = SCB_LIST_NULL;
11388 saved_hscbptr = aic_inb(p, SCBPTR);
11389 next_hscbptr = aic_inb(p, WAITING_SCBH);
11390 while ( next_hscbptr != SCB_LIST_NULL )
11391 {
11392 aic_outb(p, next_hscbptr, SCBPTR );
11393 if ( scb->hscb->tag == aic_inb(p, SCB_TAG) )
11394 {
11395 found = 1;
11396 if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS)
11397 printk(INFO_LEAD "SCB found on hardware waiting"
11398 " list and aborted.\n", p->host_no, CTL_OF_SCB(scb));
11399 if ( prev_hscbptr == SCB_LIST_NULL )
11400 {
11401 aic_outb(p, aic_inb(p, SCB_NEXT), WAITING_SCBH);
11402 /* stop the selection since we just
11403 * grabbed the scb out from under the
11404 * card
11405 */
11406 aic_outb(p, aic_inb(p, SCSISEQ) & ~ENSELO, SCSISEQ);
11407 aic_outb(p, CLRSELTIMEO, CLRSINT1);
11408 }
11409 else
11410 {
11411 scb_next_ptr = aic_inb(p, SCB_NEXT);
11412 aic_outb(p, prev_hscbptr, SCBPTR);
11413 aic_outb(p, scb_next_ptr, SCB_NEXT);
11414 aic_outb(p, next_hscbptr, SCBPTR);
11415 }
11416 aic_outb(p, SCB_LIST_NULL, SCB_TAG);
11417 aic_outb(p, 0, SCB_CONTROL);
11418 aic7xxx_add_curscb_to_free_list(p);
11419 scb->flags = SCB_ABORT | SCB_QUEUED_FOR_DONE;
11420 break;
11421 }
11422 prev_hscbptr = next_hscbptr;
11423 next_hscbptr = aic_inb(p, SCB_NEXT);
11424 }
11425 aic_outb(p, saved_hscbptr, SCBPTR );
11426 }
11427
11428 /*
11429 * Hmmm...completeq, QOUTFIFO, QINFIFO, WAITING_SCBH, waitingq all checked.
11430 * OK...the sequencer's paused, interrupts are off, and we haven't found the
11431 * command anyplace where it could be easily aborted. Time for the hard
11432 * work. We also know the command is valid. This essentially means the
11433 * command is disconnected, or connected but not into any phases yet, which
11434 * we know due to the tests we ran earlier on the current active scb phase.
11435 * At this point we can queue the abort tag and go on with life.
11436 */
11437
11438 if ( found == 0 )
11439 {
11440 p->flags |= AHC_ABORT_PENDING;
11441 scb->flags |= SCB_QUEUED_ABORT | SCB_ABORT | SCB_RECOVERY_SCB;
11442 scb->hscb->control |= MK_MESSAGE;
11443 result=aic7xxx_find_scb(p, scb);
11444 if ( result != SCB_LIST_NULL )
11445 {
11446 saved_hscbptr = aic_inb(p, SCBPTR);
11447 aic_outb(p, result, SCBPTR);
11448 tmp_char = aic_inb(p, SCB_CONTROL);
11449 aic_outb(p, tmp_char | MK_MESSAGE, SCB_CONTROL);
11450 aic_outb(p, saved_hscbptr, SCBPTR);
11451 }
11452 if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS)
11453 printk(INFO_LEAD "SCB disconnected. Queueing Abort"
11454 " SCB.\n", p->host_no, CTL_OF_SCB(scb));
11455 p->qinfifo[p->qinfifonext++] = scb->hscb->tag;
11456 if (p->features & AHC_QUEUE_REGS)
11457 aic_outb(p, p->qinfifonext, HNSCB_QOFF);
11458 else
11459 aic_outb(p, p->qinfifonext, KERNEL_QINPOS);
11460 }
11461 if (found)
11462 {
11463 aic7xxx_run_done_queue(p, TRUE);
11464 aic7xxx_run_waiting_queues(p);
11465 }
11466 p->flags &= ~AHC_IN_ABORT;
11467 unpause_sequencer(p, FALSE);
11468 DRIVER_UNLOCK
11469
11470 /*
11471 * On the return value. If we found the command and aborted it, then we know
11472 * it's already sent back and there is no reason for a further timeout, so
11473 * we use SCSI_ABORT_SUCCESS. On the queued abort side, we aren't so certain
11474 * there hasn't been a bus hang or something that might keep the abort from
11475 * from completing. Therefore, we use SCSI_ABORT_PENDING. The first time this
11476 * is passed back, the timeout on the command gets extended, the second time
11477 * we pass this back, the mid level SCSI code calls our reset function, which
11478 * would shake loose a hung bus.
11479 */
11480 if ( found != 0 )
11481 return(SCSI_ABORT_SUCCESS);
11482 else
11483 return(SCSI_ABORT_PENDING);
11484 }
11485
11486
11487 /*+F*************************************************************************
11488 * Function:
11489 * aic7xxx_reset
11490 *
11491 * Description:
11492 * Resetting the bus always succeeds - is has to, otherwise the
11493 * kernel will panic! Try a surgical technique - sending a BUS
11494 * DEVICE RESET message - on the offending target before pulling
11495 * the SCSI bus reset line.
11496 *-F*************************************************************************/
11497 int
11498 aic7xxx_reset(Scsi_Cmnd *cmd, unsigned int flags)
11499 {
11500 struct aic7xxx_scb *scb = NULL;
11501 struct aic7xxx_host *p;
11502 int tindex;
11503 int result = -1;
11504 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95)
11505 unsigned long cpu_flags = 0;
11506 #endif
11507 #define DEVICE_RESET 0x01
11508 #define BUS_RESET 0x02
11509 #define HOST_RESET 0x04
11510 #define RESET_DELAY 0x08
11511 int action;
11512
11513
11514 if ( cmd == NULL )
11515 {
11516 printk(KERN_WARNING "(scsi?:?:?:?) Reset called with NULL Scsi_Cmnd "
11517 "pointer, failing.\n");
11518 return(SCSI_RESET_SNOOZE);
11519 }
11520
11521 p = (struct aic7xxx_host *) cmd->host->hostdata;
11522 scb = (p->scb_data->scb_array[aic7xxx_position(cmd)]);
11523 tindex = TARGET_INDEX(cmd);
11524
11525 /*
11526 * I added a new config option to the driver: "panic_on_abort" that will
11527 * cause the driver to panic and the machine to stop on the first abort
11528 * or reset call into the driver. At that point, it prints out a lot of
11529 * useful information for me which I can then use to try and debug the
11530 * problem. Simply enable the boot time prompt in order to activate this
11531 * code.
11532 */
11533 if (aic7xxx_panic_on_abort)
11534 aic7xxx_panic_abort(p, cmd);
11535
11536 DRIVER_LOCK
11537
11538 pause_sequencer(p);
11539
11540 if(flags & SCSI_RESET_SYNCHRONOUS)
11541 {
11542 if (aic7xxx_verbose & VERBOSE_RESET_MID)
11543 printk(INFO_LEAD "Reset called for a SYNCHRONOUS reset, flags 0x%x, "
11544 "cmd->result 0x%x.\n", p->host_no, CTL_OF_CMD(cmd), flags,
11545 cmd->result);
11546 scb = NULL;
11547 action = HOST_RESET;
11548 }
11549 else if ((scb == NULL) || (scb->cmd != cmd))
11550 {
11551 if (aic7xxx_verbose & VERBOSE_RESET_MID)
11552 printk(INFO_LEAD "Reset called with bogus Scsi_Cmnd"
11553 "->SCB mapping, failing.\n", p->host_no, CTL_OF_CMD(cmd));
11554 aic7xxx_done_cmds_complete(p);
11555 aic7xxx_run_waiting_queues(p);
11556 unpause_sequencer(p, FALSE);
11557 DRIVER_UNLOCK
11558 return(SCSI_RESET_NOT_RUNNING);
11559 }
11560 else
11561 {
11562 if (aic7xxx_verbose & VERBOSE_RESET_MID)
11563 printk(INFO_LEAD "Reset called, scb %d, flags "
11564 "0x%x\n", p->host_no, CTL_OF_SCB(scb), scb->hscb->tag, scb->flags);
11565 if ( flags & SCSI_RESET_SUGGEST_HOST_RESET )
11566 {
11567 action = HOST_RESET;
11568 }
11569 else if ( flags & SCSI_RESET_SUGGEST_BUS_RESET )
11570 {
11571 action = BUS_RESET;
11572 }
11573 else
11574 {
11575 action = DEVICE_RESET;
11576 }
11577 }
11578
11579 while((aic_inb(p, INTSTAT) & INT_PEND) && !(p->flags & AHC_IN_ISR))
11580 {
11581 aic7xxx_isr(p->irq, p, (void *)NULL );
11582 pause_sequencer(p);
11583 }
11584 aic7xxx_done_cmds_complete(p);
11585
11586 if(scb && (scb->cmd == NULL))
11587 {
11588 /*
11589 * We just completed the command when we ran the isr stuff, so we no
11590 * longer have it.
11591 */
11592 aic7xxx_run_waiting_queues(p);
11593 unpause_sequencer(p, FALSE);
11594 DRIVER_UNLOCK
11595 return(SCSI_RESET_SUCCESS);
11596 }
11597
11598 if ( (action & DEVICE_RESET) &&
11599 (p->dev_flags[tindex] & BUS_DEVICE_RESET_PENDING) )
11600 {
11601 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
11602 printk(INFO_LEAD "Bus device reset already sent to "
11603 "device, escalating.\n", p->host_no, CTL_OF_CMD(cmd));
11604 action = BUS_RESET;
11605 }
11606 if ( (action & DEVICE_RESET) &&
11607 (scb->flags & SCB_QUEUED_ABORT) )
11608 {
11609 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
11610 {
11611 printk(INFO_LEAD "Have already attempted to reach "
11612 "device with queued\n", p->host_no, CTL_OF_CMD(cmd));
11613 printk(INFO_LEAD "message, will escalate to bus "
11614 "reset.\n", p->host_no, CTL_OF_CMD(cmd));
11615 }
11616 action = BUS_RESET;
11617 }
11618 if ( (action & DEVICE_RESET) &&
11619 (p->flags & (AHC_RESET_PENDING | AHC_ABORT_PENDING)) )
11620 {
11621 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
11622 printk(INFO_LEAD "Bus device reset stupid when "
11623 "other action has failed.\n", p->host_no, CTL_OF_CMD(cmd));
11624 action = BUS_RESET;
11625 }
11626 if ( (action & BUS_RESET) && !(p->features & AHC_TWIN) )
11627 {
11628 action = HOST_RESET;
11629 }
11630 if ( (p->dev_flags[tindex] & DEVICE_RESET_DELAY) &&
11631 !(action & (HOST_RESET | BUS_RESET)))
11632 {
11633 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
11634 {
11635 printk(INFO_LEAD "Reset called too soon after last "
11636 "reset without requesting\n", p->host_no, CTL_OF_CMD(cmd));
11637 printk(INFO_LEAD "bus or host reset, escalating.\n", p->host_no,
11638 CTL_OF_CMD(cmd));
11639 }
11640 action = BUS_RESET;
11641 }
11642 if ( (p->flags & AHC_RESET_DELAY) &&
11643 (action & (HOST_RESET | BUS_RESET)) )
11644 {
11645 if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
11646 printk(INFO_LEAD "Reset called too soon after "
11647 "last bus reset, delaying.\n", p->host_no, CTL_OF_CMD(cmd));
11648 action = RESET_DELAY;
11649 }
11650 /*
11651 * By this point, we want to already know what we are going to do and
11652 * only have the following code implement our course of action.
11653 */
11654 switch (action)
11655 {
11656 case RESET_DELAY:
11657 aic7xxx_run_waiting_queues(p);
11658 unpause_sequencer(p, FALSE);
11659 DRIVER_UNLOCK
11660 if(scb == NULL)
11661 return(SCSI_RESET_PUNT);
11662 else
11663 return(SCSI_RESET_PENDING);
11664 break;
11665 case DEVICE_RESET:
11666 p->flags |= AHC_IN_RESET;
11667 result = aic7xxx_bus_device_reset(p, cmd);
11668 aic7xxx_run_done_queue(p, TRUE);
11669 /* We can't rely on run_waiting_queues to unpause the sequencer for
11670 * PCI based controllers since we use AAP */
11671 aic7xxx_run_waiting_queues(p);
11672 unpause_sequencer(p, FALSE);
11673 p->flags &= ~AHC_IN_RESET;
11674 DRIVER_UNLOCK
11675 return(result);
11676 break;
11677 case BUS_RESET:
11678 case HOST_RESET:
11679 default:
11680 p->flags |= AHC_IN_RESET | AHC_RESET_DELAY;
11681 p->dev_expires[p->scsi_id] = jiffies + (1 * HZ);
11682 p->dev_timer_active |= (0x01 << p->scsi_id);
11683 if ( !(p->dev_timer_active & (0x01 << MAX_TARGETS)) ||
11684 time_after_eq(p->dev_timer.expires, p->dev_expires[p->scsi_id]) )
11685 {
11686 mod_timer(&p->dev_timer, p->dev_expires[p->scsi_id]);
11687 p->dev_timer_active |= (0x01 << MAX_TARGETS);
11688 }
11689 aic7xxx_reset_channel(p, cmd->channel, TRUE);
11690 if ( (p->features & AHC_TWIN) && (action & HOST_RESET) )
11691 {
11692 aic7xxx_reset_channel(p, cmd->channel ^ 0x01, TRUE);
11693 restart_sequencer(p);
11694 }
11695 if (action != HOST_RESET)
11696 result = SCSI_RESET_SUCCESS | SCSI_RESET_BUS_RESET;
11697 else
11698 {
11699 result = SCSI_RESET_SUCCESS | SCSI_RESET_HOST_RESET;
11700 aic_outb(p, aic_inb(p, SIMODE1) & ~(ENREQINIT|ENBUSFREE),
11701 SIMODE1);
11702 aic7xxx_clear_intstat(p);
11703 p->flags &= ~AHC_HANDLING_REQINITS;
11704 p->msg_type = MSG_TYPE_NONE;
11705 p->msg_index = 0;
11706 p->msg_len = 0;
11707 }
11708 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95)
11709 if(flags & SCSI_RESET_SYNCHRONOUS)
11710 {
11711 cmd->result = DID_RESET << 16;
11712 cmd->done(cmd);
11713 }
11714 #endif
11715 aic7xxx_run_done_queue(p, TRUE);
11716 p->flags &= ~AHC_IN_RESET;
11717 /*
11718 * We can't rely on run_waiting_queues to unpause the sequencer for
11719 * PCI based controllers since we use AAP. NOTE: this also sets
11720 * the timer for the one command we might have queued in the case
11721 * of a synch reset.
11722 */
11723 aic7xxx_run_waiting_queues(p);
11724 unpause_sequencer(p, FALSE);
11725 DRIVER_UNLOCK
11726 if(scb == NULL)
11727 return(SCSI_RESET_SUCCESS|SCSI_RESET_HOST_RESET);
11728 else
11729 return(result);
11730 break;
11731 }
11732 }
11733
11734 /*+F*************************************************************************
11735 * Function:
11736 * aic7xxx_biosparam
11737 *
11738 * Description:
11739 * Return the disk geometry for the given SCSI device.
11740 *-F*************************************************************************/
11741 int
11742 aic7xxx_biosparam(Disk *disk, kdev_t dev, int geom[])
11743 {
11744 int heads, sectors, cylinders, ret;
11745 struct aic7xxx_host *p;
11746 struct buffer_head *bh;
11747
11748 p = (struct aic7xxx_host *) disk->device->host->hostdata;
11749 bh = bread(MKDEV(MAJOR(dev), MINOR(dev)&~0xf), 0, 1024);
11750
11751 if ( bh )
11752 {
11753 ret = scsi_partsize(bh, disk->capacity, &geom[2], &geom[0], &geom[1]);
11754 brelse(bh);
11755 if ( ret != -1 )
11756 return(ret);
11757 }
11758
11759 heads = 64;
11760 sectors = 32;
11761 cylinders = disk->capacity / (heads * sectors);
11762
11763 if ((p->flags & AHC_EXTEND_TRANS_A) && (cylinders > 1024))
11764 {
11765 heads = 255;
11766 sectors = 63;
11767 cylinders = disk->capacity / (heads * sectors);
11768 }
11769
11770 geom[0] = heads;
11771 geom[1] = sectors;
11772 geom[2] = cylinders;
11773
11774 return (0);
11775 }
11776
11777 /*+F*************************************************************************
11778 * Function:
11779 * aic7xxx_release
11780 *
11781 * Description:
11782 * Free the passed in Scsi_Host memory structures prior to unloading the
11783 * module.
11784 *-F*************************************************************************/
11785 int
11786 aic7xxx_release(struct Scsi_Host *host)
11787 {
11788 struct aic7xxx_host *p = (struct aic7xxx_host *) host->hostdata;
11789 struct aic7xxx_host *next, *prev;
11790
11791 if(p->irq)
11792 free_irq(p->irq, p);
11793 if(p->base)
11794 release_region(p->base, MAXREG - MINREG);
11795 #ifdef MMAPIO
11796 if(p->maddr)
11797 {
11798 iounmap((void *) (((unsigned long) p->maddr) & PAGE_MASK));
11799 }
11800 #endif /* MMAPIO */
11801 prev = NULL;
11802 next = first_aic7xxx;
11803 while(next != NULL)
11804 {
11805 if(next == p)
11806 {
11807 if(prev == NULL)
11808 first_aic7xxx = next->next;
11809 else
11810 prev->next = next->next;
11811 }
11812 else
11813 {
11814 prev = next;
11815 }
11816 next = next->next;
11817 }
11818 aic7xxx_free(p);
11819 return(0);
11820 }
11821
11822 /*+F*************************************************************************
11823 * Function:
11824 * aic7xxx_print_card
11825 *
11826 * Description:
11827 * Print out all of the control registers on the card
11828 *
11829 * NOTE: This function is not yet safe for use on the VLB and EISA
11830 * controllers, so it isn't used on those controllers at all.
11831 *-F*************************************************************************/
11832 static void
11833 aic7xxx_print_card(struct aic7xxx_host *p)
11834 {
11835 int i, j, k, chip;
11836 static struct register_ranges {
11837 int num_ranges;
11838 int range_val[32];
11839 } cards_ds[] = {
11840 { 0, {0,} }, /* none */
11841 {10, {0x00, 0x05, 0x08, 0x11, 0x18, 0x19, 0x1f, 0x1f, 0x60, 0x60, /*7771*/
11842 0x62, 0x66, 0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9b, 0x9f} },
11843 { 9, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7850*/
11844 0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9f} },
11845 { 9, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7860*/
11846 0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9f} },
11847 {10, {0x00, 0x05, 0x08, 0x11, 0x18, 0x19, 0x1c, 0x1f, 0x60, 0x60, /*7870*/
11848 0x62, 0x66, 0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9f} },
11849 {10, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1a, 0x1c, 0x1f, 0x60, 0x60, /*7880*/
11850 0x62, 0x66, 0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9f} },
11851 {16, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7890*/
11852 0x84, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9a, 0x9f, 0x9f,
11853 0xe0, 0xf1, 0xf4, 0xf4, 0xf6, 0xf6, 0xf8, 0xf8, 0xfa, 0xfc,
11854 0xfe, 0xff} },
11855 {12, {0x00, 0x05, 0x08, 0x11, 0x18, 0x19, 0x1b, 0x1f, 0x60, 0x60, /*7895*/
11856 0x62, 0x66, 0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9a,
11857 0x9f, 0x9f, 0xe0, 0xf1} },
11858 {16, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7896*/
11859 0x84, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9a, 0x9f, 0x9f,
11860 0xe0, 0xf1, 0xf4, 0xf4, 0xf6, 0xf6, 0xf8, 0xf8, 0xfa, 0xfc,
11861 0xfe, 0xff} },
11862 {12, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7892*/
11863 0x84, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9a, 0x9c, 0x9f,
11864 0xe0, 0xf1, 0xf4, 0xfc} },
11865 {12, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7899*/
11866 0x84, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9a, 0x9c, 0x9f,
11867 0xe0, 0xf1, 0xf4, 0xfc} },
11868 };
11869 chip = p->chip & AHC_CHIPID_MASK;
11870 printk("%s at ",
11871 board_names[p->board_name_index]);
11872 switch(p->chip & ~AHC_CHIPID_MASK)
11873 {
11874 case AHC_VL:
11875 printk("VLB Slot %d.\n", p->pci_device_fn);
11876 break;
11877 case AHC_EISA:
11878 printk("EISA Slot %d.\n", p->pci_device_fn);
11879 break;
11880 case AHC_PCI:
11881 default:
11882 printk("PCI %d/%d/%d.\n", p->pci_bus, PCI_SLOT(p->pci_device_fn),
11883 PCI_FUNC(p->pci_device_fn));
11884 break;
11885 }
11886
11887 /*
11888 * the registers on the card....
11889 */
11890 printk("Card Dump:\n");
11891 k = 0;
11892 for(i=0; i<cards_ds[chip].num_ranges; i++)
11893 {
11894 for(j = cards_ds[chip].range_val[ i * 2 ];
11895 j <= cards_ds[chip].range_val[ i * 2 + 1 ] ;
11896 j++)
11897 {
11898 printk("%02x:%02x ", j, aic_inb(p, j));
11899 if(++k == 13)
11900 {
11901 printk("\n");
11902 k=0;
11903 }
11904 }
11905 }
11906 if(k != 0)
11907 printk("\n");
11908
11909 /*
11910 * If this was an Ultra2 controller, then we just hosed the card in terms
11911 * of the QUEUE REGS. This function is only called at init time or by
11912 * the panic_abort function, so it's safe to assume a generic init time
11913 * setting here
11914 */
11915
11916 if(p->features & AHC_QUEUE_REGS)
11917 {
11918 aic_outb(p, 0, SDSCB_QOFF);
11919 aic_outb(p, 0, SNSCB_QOFF);
11920 aic_outb(p, 0, HNSCB_QOFF);
11921 }
11922
11923 }
11924
11925 /*+F*************************************************************************
11926 * Function:
11927 * aic7xxx_print_scratch_ram
11928 *
11929 * Description:
11930 * Print out the scratch RAM values on the card.
11931 *-F*************************************************************************/
11932 static void
11933 aic7xxx_print_scratch_ram(struct aic7xxx_host *p)
11934 {
11935 int i, k;
11936
11937 k = 0;
11938 printk("Scratch RAM:\n");
11939 for(i = SRAM_BASE; i < SEQCTL; i++)
11940 {
11941 printk("%02x:%02x ", i, aic_inb(p, i));
11942 if(++k == 13)
11943 {
11944 printk("\n");
11945 k=0;
11946 }
11947 }
11948 if (p->features & AHC_MORE_SRAM)
11949 {
11950 for(i = TARG_OFFSET; i < 0x80; i++)
11951 {
11952 printk("%02x:%02x ", i, aic_inb(p, i));
11953 if(++k == 13)
11954 {
11955 printk("\n");
11956 k=0;
11957 }
11958 }
11959 }
11960 printk("\n");
11961 }
11962
11963
11964 #include "aic7xxx_old/aic7xxx_proc.c"
11965
11966 /* Eventually this will go into an include file, but this will be later */
11967 static Scsi_Host_Template driver_template = AIC7XXX;
11968
11969 #include "scsi_module.c"
11970
11971 /*
11972 * Overrides for Emacs so that we almost follow Linus's tabbing style.
11973 * Emacs will notice this stuff at the end of the file and automatically
11974 * adjust the settings for this buffer only. This must remain at the end
11975 * of the file.
11976 * ---------------------------------------------------------------------------
11977 * Local variables:
11978 * c-indent-level: 2
11979 * c-brace-imaginary-offset: 0
11980 * c-brace-offset: -2
11981 * c-argdecl-indent: 2
11982 * c-label-offset: -2
11983 * c-continued-statement-offset: 2
11984 * c-continued-brace-offset: 0
11985 * indent-tabs-mode: nil
11986 * tab-width: 8
11987 * End:
11988 */
11989