File: /usr/src/linux/drivers/scsi/cpqfcTSstructs.h

1     /* Copyright(c) 2000, Compaq Computer Corporation
2      * Fibre Channel Host Bus Adapter 64-bit, 66MHz PCI 
3      * Originally developed and tested on:
4      * (front): [chip] Tachyon TS HPFC-5166A/1.2  L2C1090 ...
5      *          SP# P225CXCBFIEL6T, Rev XC
6      *          SP# 161290-001, Rev XD
7      * (back): Board No. 010008-001 A/W Rev X5, FAB REV X5
8      *  
9      * This program is free software; you can redistribute it and/or modify it
10      * under the terms of the GNU General Public License as published by the
11      * Free Software Foundation; either version 2, or (at your option) any
12      * later version.
13      *
14      * This program is distributed in the hope that it will be useful, but
15      * WITHOUT ANY WARRANTY; without even the implied warranty of
16      * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
17      * General Public License for more details.
18      * Written by Don Zimmerman
19     */
20     #ifndef CPQFCTSSTRUCTS_H
21     #define CPQFCTSSTRUCTS_H
22     
23     #include <linux/timer.h>  // timer declaration in our host data
24     #include <linux/tqueue.h> // task queue sched
25     #include <asm/atomic.h>
26     #include "cpqfcTSioctl.h"
27     
28     #define DbgDelay(secs) { int wait_time; printk( " DbgDelay %ds ", secs); \
29                              for( wait_time=jiffies + (secs*HZ); \
30     		         wait_time > jiffies ;) ; }
31     #define CPQFCTS_DRIVER_VER(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
32     #define VER_MAJOR 2
33     #define VER_MINOR 0
34     #define VER_SUBMINOR 5
35     
36     // Macros for kernel (esp. SMP) tracing using a PCI analyzer
37     // (e.g. x86).
38     //#define PCI_KERNEL_TRACE
39     #ifdef PCI_KERNEL_TRACE
40     #define PCI_TRACE(x) inl( fcChip->Registers.IOBaseL +x);
41     #define PCI_TRACEO(x,y) outl( x, (fcChip->Registers.IOBaseL +y));
42     #else
43     
44     #define PCI_TRACE(x) 
45     #define PCI_TRACEO(x,y)
46     #endif
47     
48     			 
49     //#define DEBUG_CMND 1   // debug output for Linux Scsi CDBs
50     //#define DUMMYCMND_DBG 1
51     
52     //#define DEBUG_CPQFCTS 1
53     //#undef DEBUG_CPQFCTS 
54     #ifdef DEBUG_CPQFCTS
55     #define ENTER(x)	printk("cpqfcts : entering %s()\n", x);
56     #define LEAVE(x)	printk("cpqfcts : leaving %s()\n", x);
57     #define DEBUG(x)	x
58     #else
59     #define ENTER(x)
60     #define LEAVE(x)
61     #define DEBUG(x)
62     #endif				/* DEBUG_CPQFCTS */
63     
64     //#define DEBUG_CPQFCTS_PCI 1
65     //#undef DEBUG_CPQFCTS_PCI
66     #if DEBUG_CPQFCTS_PCI
67     #define DEBUG_PCI(x)	x
68     #else
69     #define DEBUG_PCI(x)
70     #endif				/* DEBUG_CPQFCTS_PCI */
71     
72     #define STACHLITE66_TS12  "Compaq FibreChannel HBA Tachyon TS HPFC-5166A/1.2"
73     #define STACHLITE66_TS13  "Compaq FibreChannel HBA Tachyon TS HPFC-5166A/1.3"
74     #define STACHLITE_UNKNOWN "Compaq FibreChannel HBA Tachyon Chip/Board Ver??"
75     #define SAGILENT_XL2_21   "Agilent FC HBA, Tachyon XL2 HPFC-5200B/2.1"
76     
77     // PDA is Peripheral Device Address, VSA is Volume Set Addressing
78     // Linux SCSI parameters
79     #define CPQFCTS_MAX_TARGET_ID 64
80     
81     // Note, changing CPQFCTS_MAX_LUN to less than 32 (e.g, 8) will result in
82     // strange behavior if a box with more than, e.g. 8, is on the loop.
83     #define CPQFCTS_MAX_LUN 32    // The RA-4x00 supports 32 (Linux SCSI supports 8)
84     #define CPQFCTS_MAX_CHANNEL 0 // One FC port on cpqfcTS HBA
85     
86     #define CPQFCTS_CMD_PER_LUN 15 // power of 2 -1, must be >0 
87     #define CPQFCTS_REQ_QUEUE_LEN (TACH_SEST_LEN/2) // must be < TACH_SEST_LEN
88     
89     #define LinuxVersionCode(v, p, s) (((v)<<16)+((p)<<8)+(s))
90     #ifndef DECLARE_MUTEX_LOCKED
91     #define DECLARE_MUTEX_LOCKED(sem) struct semaphore sem = MUTEX_LOCKED
92     #endif
93     
94     #define DEV_NAME "cpqfcTS"
95     
96     #define CPQ_DEVICE_ID     0xA0FC
97     #define AGILENT_XL2_ID    0x1029
98     
99     typedef struct
100     {
101       __u16 vendor_id;
102       __u16 device_id;
103     } SupportedPCIcards;
104     			 
105     // nn:nn denotes bit field
106                                 // TachyonHeader struct def.
107                                 // the fields shared with ODB
108                                 // need to have same value
109     
110     
111     
112     
113     #ifndef BYTE
114     //typedef UCHAR BYTE;
115     typedef __u8 BYTE;
116     #endif
117     #ifndef UCHAR
118     typedef __u8 UCHAR;
119     #endif
120     #ifndef LONG
121     typedef __s32 LONG;
122     #endif
123     #ifndef ULONG
124     typedef __u32 ULONG;
125     #endif
126     #ifndef PVOID
127     typedef void * PVOID;
128     #endif
129     #ifndef USHORT
130     typedef __u16 USHORT;
131     #endif
132     #ifndef BOOLEAN
133     typedef __u8 BOOLEAN;
134     #endif
135     
136     
137     // macro for FC-PH reject codes
138     // payload format for LS_RJT (FC payloads are big endian):
139     //     byte  0         1         2         3  (MSB)
140     // DWORD 0   01        00        00        00
141     // DWORD 1   resvd     code      expl.     vendor
142     
143     #define LS_RJT_REASON( code, expl) (( code<<8) | (expl <<16))
144     
145     
146     #define TachLiteSTATUS 0x12
147     
148     // Fibre Channel EXCHANGE status codes for Tachyon chips/ driver software
149     // 32-bit ERROR word defines
150     #define INVALID_ARGS 0x1
151     #define LNKDWN_OSLS  0x2
152     #define LNKDWN_LASER 0x4
153     #define OUTQUE_FULL  0x8
154     #define DRIVERQ_FULL 0x10
155     #define SEST_FULL    0x20
156     #define BAD_ALPA     0x40
157     #define OVERFLOW     0x80  // inbound CM
158     #define COUNT_ERROR     0x100  // inbound CM
159     #define LINKFAIL_RX     0x200  // inbound CM
160     #define ABORTSEQ_NOTIFY 0x400  // outbound CM
161     #define LINKFAIL_TX     0x800  // outbound CM
162     #define HOSTPROG_ERR     0x1000  // outbound CM
163     #define FRAME_TO         0x2000  // outbound CM
164     #define INV_ENTRY        0x4000  // outbound CM
165     #define SESTPROG_ERR     0x8000  // outbound CM
166     #define OUTBOUND_TIMEOUT 0x10000L // timeout waiting for Tachyon outbound CM
167     #define INITIATOR_ABORT  0x20000L // initiator exchange timeout or O/S ABORT
168     #define MEMPOOL_FAIL     0x40000L // O/S memory pool allocation failed
169     #define FC2_TIMEOUT      0x80000L // driver timeout for lost frames
170     #define TARGET_ABORT     0x100000L // ABTS received from FC port
171     #define EXCHANGE_QUEUED  0x200000L // e.g. Link State was LDn on fcStart
172     #define PORTID_CHANGED   0x400000L // fc Port address changed
173     #define DEVICE_REMOVED   0x800000L // fc Port address changed
174     // Several error scenarios result in SEST Exchange frames 
175     // unexpectedly arriving in the SFQ
176     #define SFQ_FRAME        0x1000000L // SFQ frames from open Exchange
177     
178     // Maximum number of Host Bus Adapters (HBA) / controllers supported
179     // only important for mem allocation dimensions - increase as necessary
180     
181     #define MAX_ADAPTERS 8
182     #define MAX_RX_PAYLOAD 1024  // hardware dependent max frame payload
183     // Tach header struc defines
184     #define SOFi3 0x7
185     #define SOFf  0x8
186     #define SOFn3 0xB
187     #define EOFn  0x5
188     #define EOFt  0x6
189     
190     // FCP R_CTL defines
191     #define FCP_CMND 0x6
192     #define FCP_XFER_RDY 0x5
193     #define FCP_RSP 0x7
194     #define FCP_RESPONSE 0x777 // (arbitrary #)
195     #define NEED_FCP_RSP 0x77  // (arbitrary #)
196     #define FCP_DATA 0x1
197     
198     #define RESET_TACH 0x100 // Reset Tachyon/TachLite
199     #define SCSI_IWE 0x2000  // initiator write entry (for SEST)
200     #define SCSI_IRE 0x3000  // initiator read entry (for SEST)
201     #define SCSI_TRE 0x400  // target read entry (for SEST)
202     #define SCSI_TWE 0x500  // target write entry (for SEST)
203     #define TOGGLE_LASER 0x800
204     #define LIP 0x900
205     #define CLEAR_FCPORTS 99 // (arbitrary #) free mem for Logged in ports
206     #define FMINIT 0x707     // (arbitrary) for Frame Manager Init command
207     
208     // BLS == Basic Link Service
209     // ELS == Extended Link Service
210     #define BLS_NOP 4
211     #define BLS_ABTS 0x10   // FC-PH Basic Link Service Abort Sequence
212     #define BLS_ABTS_ACC 0x100  // FC-PH Basic Link Service Abort Sequence Accept
213     #define BLS_ABTS_RJT 0x101  // FC-PH Basic Link Service Abort Sequence Reject
214     #define ELS_PLOGI 0x03  // FC-PH Port Login (arbitrary assign)
215     #define ELS_SCR   0x70  // (arb assign) State Change Registration (Fabric)
216     #define FCS_NSR   0x72  // (arb assign) Name Service Request (Fabric)
217     #define ELS_FLOGI 0x44  // (arb assign) Fabric Login
218     #define ELS_FDISC 0x41  // (arb assign) Fabric Discovery (Login)
219     #define ELS_PDISC 0x50  // FC-PH2 Port Discovery
220     #define ELS_ABTX  0x06  // FC-PH Abort Exchange 
221     #define ELS_LOGO 0x05   // FC-PH Port Logout
222     #define ELS_PRLI 0x20   // FCP-SCSI Process Login
223     #define ELS_PRLO 0x21   // FCP-SCSI Process Logout
224     #define ELS_LOGO_ACC 0x07   // {FC-PH} Port Logout Accept
225     #define ELS_PLOGI_ACC 0x08  // {FC-PH} Port Login Accept
226     #define ELS_ACC 0x18        // {FC-PH} (generic) ACCept
227     #define ELS_PRLI_ACC 0x22  // {FCP-SCSI} Process Login Accept
228     #define ELS_RJT 0x1000000
229     #define SCSI_REPORT_LUNS 0x0A0
230     #define REPORT_LUNS 0xA0 // SCSI-3 command op-code
231     #define FCP_TARGET_RESET 0x200
232     
233     #define ELS_LILP_FRAME 0x00000711 // 1st payload word of LILP frame
234     
235     #define SFQ_UNASSISTED_FCP  1  // ICM, DWord3, "Type" unassisted FCP
236     #define SFQ_UNKNOWN         0x31 // (arbitrary) ICM, DWord3, "Type" unknown
237     
238     // these "LINK" bits refer to loop or non-loop
239     #define LINKACTIVE 0x2    // fcLinkQ type - LINK UP Tachyon FM 'Lup' bit set
240     #define LINKDOWN 0xf2     // fcLinkQ type - LINK DOWN Tachyon FM 'Ldn' bit set
241     
242     //#define VOLUME_SET_ADDRESSING 1 // "channel" or "bus" 1
243     
244     typedef struct      // 32 bytes hdr ONLY (e.g. FCP_DATA buffer for SEST)
245     {
246       ULONG reserved;   // dword 0 (don't use)
247       ULONG sof_eof;
248       ULONG d_id;       // dword 2 - 31:24 R_CTL, 23:0 D_ID
249       ULONG s_id;       // dword 3 - 31:24 CS_CTL, 23:0 S_ID
250       ULONG f_ctl;      // dword 4 - 31:24 Type,  23:0 F_CTL
251       ULONG seq_cnt;    // dword 5 - 31:24 SEQ_ID, 23:16 DF_CTL, 15:0 SEQ_CNT
252       ULONG ox_rx_id;   // dword 6 - 31:16 OX_ID,  15:0 RX_ID
253       ULONG ro;         // dword 7 - relative offset
254     } TachFCHDR;
255     
256                         // NOTE!! the following struct MUST be 64 bytes.
257     typedef struct      // 32 bytes hdr + 32 bytes payload
258     {
259       ULONG reserved;   // dword 0 (don't use - must clear to 0)
260       ULONG sof_eof;    // dword 1 - 31:24 SOF:EOF, UAM,CLS, LCr, TFV, TimeStamp
261       ULONG d_id;       // dword 2 - 31:24 R_CTL, 23:0 D_ID
262       ULONG s_id;       // dword 3 - 31:24 CS_CTL, 23:0 S_ID
263       ULONG f_ctl;      // dword 4 - 31:24 Type,  23:0 F_CTL
264       ULONG seq_cnt;    // dword 5 - 31:24 SEQ_ID, 23:16 DF_CTL, 15:0 SEQ_CNT
265       ULONG ox_rx_id;   // dword 6 - 31:16 OX_ID,  15:0 RX_ID
266       ULONG ro;  // dword 7 - relative offset
267     //---------
268       __u32 pl[8];              // dwords 8-15 frame data payload
269     } TachFCHDR_CMND;
270     
271     
272     typedef struct      // 32 bytes hdr + 120 bytes payload
273     {
274       ULONG reserved;   // dword 0 (don't use - must clear to 0)
275       ULONG sof_eof;    // dword 1 - 31:24 SOF:EOF, UAM,CLS, LCr, TFV, TimeStamp
276       ULONG d_id;       // dword 2 - 31:24 R_CTL, 23:0 D_ID
277       ULONG s_id;       // dword 3 - 31:24 CS_CTL, 23:0 S_ID
278       ULONG f_ctl;      // dword 4 - 31:24 Type,  23:0 F_CTL
279       ULONG seq_cnt;    // dword 5 - 31:24 SEQ_ID, 23:16 DF_CTL, 15:0 SEQ_CNT
280       ULONG ox_rx_id;   // dword 6 - 31:16 OX_ID,  15:0 RX_ID
281       ULONG ro;  // dword 7 - relative offset
282     //---------
283       __u32 pl[30];              // largest necessary payload (for LOGIN cmnds)
284     } TachFCHDR_GCMND;
285     
286     typedef struct      // 32 bytes hdr + 64 bytes payload
287     {
288       ULONG reserved;   // dword 0 (don't use)
289       ULONG sof_eof;
290       ULONG d_id;       // dword 2 - 31:24 R_CTL, 23:0 D_ID
291       ULONG s_id;       // dword 3 - 31:24 CS_CTL, 23:0 S_ID
292       ULONG f_ctl;      // dword 4 - 31:24 Type,  23:0 F_CTL
293       ULONG seq_cnt;    // dword 5 - 31:24 SEQ_ID, 23:16 DF_CTL, 15:0 SEQ_CNT
294       ULONG ox_rx_id;   // dword 6 - 31:16 OX_ID,  15:0 RX_ID
295       ULONG ro;  // dword 7 - relative offset
296     //---------
297       __u32 pl[18]; // payload for FCP-RSP (response buffer) RA-4x00 is 72bytes
298     } TachFCHDR_RSP;
299     
300     
301     
302     
303     
304     
305     // Inbound Message Queue structures...
306     typedef struct              // each entry 8 words (32 bytes)
307     {
308       ULONG type;               // IMQ completion message types
309       ULONG word[7];            // remainder of structure
310                                 // interpreted by IMQ type
311     } TachyonIMQE;
312     
313     
314     // Queues for TachLite not in original Tachyon
315     // ERQ       - Exchange Request Queue (for outbound commands)
316     // SFQ       - Single Frame Queue (for incoming frames)
317     
318                                 // Define Tachyon Outbound Command Que
319                                 // (Since many Tachyon registers are Read
320                                 // only, maintain copies for debugging)
321                                 // most Tach ques need power-of-2 sizes,
322                                 // where registers are loaded with po2 -1
323     #define TACH_SEST_LEN 512   // TachLite SEST
324     
325     #define ELS_EXCHANGES 64    // e.g. PLOGI, RSCN, ...
326     // define the total number of outstanding (simultaneous) exchanges
327     #define TACH_MAX_XID (TACH_SEST_LEN + ELS_EXCHANGES)  // ELS exchanges
328     
329     #define ERQ_LEN 128         // power of 2, max 4096
330     
331     // Inbound Message Queue structures...
332     #define IMQ_LEN 512              // minimum 4 entries [(power of 2) - 1]
333     typedef struct                   // 8 words - 32 bytes
334     {
335       TachyonIMQE QEntry[IMQ_LEN];
336       ULONG producerIndex;   // IMQ Producer Index register
337                                      // @32 byte align
338       ULONG consumerIndex;   // Consumer Index register (in Tachyon)
339       ULONG length;          // Length register
340       ULONG base;
341     } TachyonIMQ;                    // @ 32 * IMQ_LEN align
342     
343     
344     
345     typedef struct           // inbound completion message
346     {
347       ULONG Type;
348       ULONG Index;
349       ULONG TransferLength;
350     } TachyonInbCM;
351     
352     
353     
354     // arbitrary numeric tags for TL structures
355     #define TL_FCHS 1  // TachLite Fibre Channel Header Structure
356     #define TL_IWE 2  // initiator write entry (for SEST)
357     #define TL_TWE 3  // target write entry (for SEST)
358     #define TL_IRE 4  // initiator read entry (for SEST)
359     #define TL_TRE 5  // target read entry (for SEST)
360     #define TL_IRB 6  // I/O request block
361     
362                                     // for INCOMING frames
363     #define SFQ_LEN 32              // minimum 32 entries, max 4096
364     
365     typedef struct                  // Single Frame Que
366     {
367       TachFCHDR_CMND QEntry[SFQ_LEN]; // must be 64 bytes!!
368       ULONG producerIndex;   // IMQ Producer Index register
369                                      // @32 byte align
370       ULONG consumerIndex;   // Consumer Index register (in Tachyon)
371       ULONG length;          // Length register
372       ULONG base;
373     } TachLiteSFQ;
374     
375     
376     typedef struct                 // I/O Request Block flags
377     {
378       UCHAR  BRD : 1;
379       UCHAR      : 1; // reserved
380       UCHAR  SFA : 1;
381       UCHAR  DNC : 1;
382       UCHAR  DIN : 1;
383       UCHAR  DCM : 1;
384       UCHAR  CTS : 1;
385       UCHAR  SBV : 1;  // IRB entry valid - IRB'B' only
386     } IRBflags;
387     
388     typedef struct                  // I/O Request Block
389     {                          // Request 'A'
390       ULONG Req_A_SFS_Len;     // total frame len (hdr + payload), min 32
391       ULONG Req_A_SFS_Addr;    // 32-bit pointer to FCHS struct (to be sent)
392       ULONG Req_A_SFS_D_ID;    // 24-bit FC destination (i.e. 8 bit al_pa)
393       ULONG Req_A_Trans_ID;    // X_ID (OX_ID or RX_ID) and/or Index in SEST
394                                // Request 'B'
395       ULONG Req_B_SFS_Len;     // total frame len (hdr + payload), min 32
396       ULONG Req_B_SFS_Addr;    // 32-bit pointer to FCHS struct (to be sent)
397       ULONG Req_B_SFS_D_ID;    // 24-bit FC destination (i.e. 8 bit al_pa)
398       ULONG Req_B_Trans_ID;    // X_ID (OX_ID or RX_ID) and/or Index in SEST
399     } TachLiteIRB;
400     
401     
402     typedef struct           // TachLite placeholder for IRBs
403     {                        // aligned @sizeof(ERQ) for TachLite
404                              // MAX commands is sum of SEST len and ERQ
405                              // we know that each SEST entry requires an
406                              // IRB (ERQ) entry; in addition, we provide
407                              // ERQ_LEN
408       TachLiteIRB QEntry[ERQ_LEN]; // Base register; entries 32 bytes ea.
409       ULONG consumerIndex;   // Consumer Index register
410       ULONG producerIndex;   // ERQ Producer Index register
411       ULONG length;          // Length register
412       ULONG base;            // copy of base ptr for debug
413                              // struct is sized for largest expected cmnd (LOGIN)
414     } TachLiteERQ;
415     
416     
417     #define TL_MAX_SGPAGES 4  // arbitrary limit to # of TL Ext. S/G pages
418                               // stores array of allocated page blocks used
419                               // in extended S/G lists.  Affects amount of static
420                               // memory consumed by driver.
421     #define TL_EXT_SG_PAGE_COUNT 256  // Number of Extended Scatter/Gather a/l PAIRS
422                                       // Tachyon register (IOBaseU 0x68)
423                                       // power-of-2 value ONLY!  4 min, 256 max
424     
425                               // byte len is #Pairs * 2 ULONG/Pair * 4 bytes/ULONG
426     #define TL_EXT_SG_PAGE_BYTELEN (TL_EXT_SG_PAGE_COUNT *2 *4)
427     
428     
429     
430     // SEST entry types: IWE, IRE, TWE, TRE
431     typedef struct 
432     {
433       ULONG Hdr_Len;
434       ULONG Hdr_Addr;
435       ULONG RSP_Len;
436       ULONG RSP_Addr;
437       ULONG Buff_Off;
438       ULONG Link;
439       ULONG RX_ID;
440       ULONG Data_Len;
441       ULONG Exp_RO;
442       ULONG Exp_Byte_Cnt;
443        // --- extended/local Gather Len/Address pairs
444       ULONG GLen1;
445       ULONG GAddr1;
446       ULONG GLen2;
447       ULONG GAddr2;
448       ULONG GLen3;
449       ULONG GAddr3;
450     } TachLiteIWE;
451     
452     
453     typedef struct 
454     {
455       ULONG Seq_Accum;
456       ULONG reserved;       // must clear to 0
457       ULONG RSP_Len;
458       ULONG RSP_Addr;
459       ULONG Buff_Off;
460       ULONG Buff_Index;           // ULONG 5
461       ULONG Exp_RO;
462       ULONG Byte_Count;
463       ULONG reserved_;      // ULONG 8
464       ULONG Exp_Byte_Cnt;
465        // --- extended/local Scatter Len/Address pairs
466       ULONG SLen1;
467       ULONG SAddr1;
468       ULONG SLen2;
469       ULONG SAddr2;
470       ULONG SLen3;
471       ULONG SAddr3;
472     } TachLiteIRE;
473     
474     
475     typedef struct          // Target Write Entry
476     {
477       ULONG Seq_Accum;      // dword 0
478       ULONG reserved;       // dword 1  must clear to 0
479       ULONG Remote_Node_ID;
480       ULONG reserved1;      // dword 3  must clear to 0
481       ULONG Buff_Off;
482       ULONG Buff_Index;     // ULONG 5
483       ULONG Exp_RO;
484       ULONG Byte_Count;
485       ULONG reserved_;      // ULONG 8
486       ULONG Exp_Byte_Cnt;
487        // --- extended/local Scatter Len/Address pairs
488       ULONG SLen1;
489       ULONG SAddr1;
490       ULONG SLen2;
491       ULONG SAddr2;
492       ULONG SLen3;
493       ULONG SAddr3;
494     } TachLiteTWE;
495     
496     typedef struct      
497     {
498       ULONG Hdr_Len;
499       ULONG Hdr_Addr;
500       ULONG RSP_Len;        // DWord 2
501       ULONG RSP_Addr;
502       ULONG Buff_Off;
503       ULONG Buff_Index;     // DWord 5
504       ULONG reserved;
505       ULONG Data_Len;
506       ULONG reserved_;
507       ULONG reserved__;
508        // --- extended/local Gather Len/Address pairs
509       ULONG GLen1;          // DWord A
510       ULONG GAddr1;
511       ULONG GLen2;
512       ULONG GAddr2;
513       ULONG GLen3;
514       ULONG GAddr3;
515     } TachLiteTRE;
516     
517     typedef struct
518     {
519       void *PoolPage[TL_MAX_SGPAGES];
520     } SGPAGES, *PSGPAGES; // linked list of S/G pairs, by Exchange
521     
522     
523     
524     typedef struct                  // SCSI Exchange State Table
525     {
526       union                         // Entry can be IWE, IRE, TWE, TRE
527       {                             // 64 bytes per entry
528         TachLiteIWE IWE;
529         TachLiteIRE IRE;
530         TachLiteTWE TWE;
531         TachLiteTRE TRE;
532       } u[TACH_SEST_LEN];
533     
534       TachFCHDR DataHDR[TACH_SEST_LEN]; // for SEST FCP_DATA frame hdr (no pl)
535       TachFCHDR_RSP RspHDR[TACH_SEST_LEN]; // space for SEST FCP_RSP frame
536       SGPAGES sgPages[TACH_SEST_LEN]; // array of Pool-allocations
537       ULONG length;          // Length register
538       ULONG base;            // copy of base ptr for debug
539     } TachSEST;
540     
541     
542     
543     typedef struct                  // each register has it's own address
544                                     // and value (used for write-only regs)
545     {
546       void* address;
547       volatile ULONG value;
548     } FCREGISTER;
549     
550     typedef struct         // Host copy - TachLite Registers
551     {
552       ULONG IOBaseL, IOBaseU;  // I/O port lower and upper TL register addresses
553       ULONG MemBase;           // memory mapped register addresses
554       void* ReMapMemBase;      // O/S VM reference for MemBase
555       ULONG wwn_hi;            // WWN is set once at startup
556       ULONG wwn_lo;
557       ULONG my_al_pa;          // al_pa received after LIP()
558       ULONG ROMCTR;            // flags for on-board RAM/ROM
559       ULONG RAMBase;           // on-board RAM (i.e. some Tachlites)
560       ULONG SROMBase;          // on-board EEPROM (some Tachlites)
561       ULONG PCIMCTR;           // PCI Master Control Reg (has bus width)
562     
563       FCREGISTER INTEN;        // copy of interrupt enable mask
564       FCREGISTER INTPEND;      // interrupt pending
565       FCREGISTER INTSTAT;      // interrupt status
566       FCREGISTER SFQconsumerIndex; 
567       FCREGISTER ERQproducerIndex; 
568       FCREGISTER TYconfig;   // TachYon (chip level)
569       FCREGISTER TYcontrol;
570       FCREGISTER TYstatus;
571       FCREGISTER FMconfig;   // Frame Manager (FC loop level)
572       FCREGISTER FMcontrol;
573       FCREGISTER FMstatus;
574       FCREGISTER FMLinkStatus1;
575       FCREGISTER FMLinkStatus2;
576       FCREGISTER FMBB_CreditZero;
577       FCREGISTER status;
578       FCREGISTER ed_tov;     // error detect time-out value
579       FCREGISTER rcv_al_pa;  // received arb. loop physical address
580       FCREGISTER primitive;  // e.g. LIP(), OPN(), ...
581     } TL_REGISTERS;
582     
583     
584     
585     typedef struct 
586     {
587       ULONG ok;
588       ULONG invalidArgs;
589       ULONG linkDown;
590       ULONG linkUp;
591       ULONG outQueFull;
592       ULONG SESTFull;
593       ULONG hpe;    // host programming err (from Tach)
594       ULONG FC4aborted; // aborts from Application or upper driver layer
595       ULONG FC2aborted; // aborts from our driver's timeouts
596       ULONG timeouts;   // our driver timeout (on individual exchanges)
597       ULONG logouts;    // explicit - sent LOGO; implicit - device removed
598       ULONG retries;
599       ULONG linkFailTX;
600       ULONG linkFailRX;
601       ULONG CntErrors;  // byte count expected != count received (typ. SEST)
602       ULONG e_stores;   // elastic store errs
603       ULONG resets;     // hard or soft controller resets
604       ULONG FMinits;    // TACH Frame Manager Init (e.g. LIPs)
605       ULONG lnkQueFull;  // too many LOGIN, loop commands
606       ULONG ScsiQueFull; // too many FCP-SCSI inbound frames
607       ULONG LossofSignal;   // FM link status 1 regs
608       ULONG BadRXChar;   // FM link status 1 regs
609       ULONG LossofSync;   // FM link status 1 regs
610       ULONG Rx_EOFa;   // FM link status 2 regs (received EOFa)
611       ULONG Dis_Frm;   // FM link status 2 regs (discarded frames)
612       ULONG Bad_CRC;   // FM link status 2 regs
613       ULONG BB0_Timer; //  FM BB_Credit Zero Timer Reg
614       ULONG loopBreaks; // infinite loop exits
615       ULONG lastBB0timer;  // static accum. buffer needed by Tachlite
616     } FCSTATS;
617     
618     
619     typedef struct               // Config Options
620     {                            // LS Bit first
621       USHORT        : 1;           // bit0:
622       USHORT  flogi : 1;           // bit1: We sent FLOGI - wait for Fabric logins
623       USHORT  fabric: 1;           // bit2: Tachyon detected Fabric (FM stat LG)
624       USHORT  LILPin: 1;           // bit3: We can use an FC-AL LILP frame
625       USHORT  target: 1;           // bit4: this Port has SCSI target capability
626       USHORT  initiator:    1;     // bit5: this Port has SCSI initiator capability
627       USHORT  extLoopback:  1;     // bit6: loopback at GBIC
628       USHORT  intLoopback:  1;     // bit7: loopback in HP silicon
629       USHORT        : 1;           // bit8:
630       USHORT        : 1;           // bit9:
631       USHORT        : 1;           // bit10:
632       USHORT        : 1;           // bit11:
633       USHORT        : 1;           // bit12:
634       USHORT        : 1;           // bit13:
635       USHORT        : 1;           // bit14:
636       USHORT        : 1;           // bit15:
637     } FC_OPTIONS;
638     
639     
640     
641     typedef struct dyn_mem_pair
642     {
643       void *BaseAllocated;  // address as allocated from O/S;
644       unsigned long AlignedAddress; // aligned address (used by Tachyon DMA)
645     } ALIGNED_MEM;
646     
647     
648     
649     
650     // these structs contain only CRUCIAL (stuff we actually use) parameters
651     // from FC-PH(n) logins.  (Don't save entire LOGIN payload to save mem.)
652     
653     // Implicit logout happens when the loop goes down - we require PDISC
654     // to restore.  Explicit logout is when WE decide never to talk to someone,
655     // or when a target refuses to talk to us, i.e. sends us a LOGO frame or
656     // LS_RJT reject in response to our PLOGI request.
657     
658     #define IMPLICIT_LOGOUT 1
659     #define EXPLICIT_LOGOUT 2
660     
661     typedef struct 
662     {
663       UCHAR channel; // SCSI "bus"
664       UCHAR target;
665       UCHAR InqDeviceType;  // byte 0 from SCSI Inquiry response
666       UCHAR VolumeSetAddressing;  // FCP-SCSI LUN coding (40h for VSA)
667       UCHAR LunMasking;     // True if selective presentation supported
668       UCHAR lun[CPQFCTS_MAX_LUN];
669     } SCSI_NEXUS;
670     
671     
672     typedef struct        
673     {
674       union 
675       {
676         UCHAR ucWWN[8];  // a FC 64-bit World Wide Name/ PortID of target
677                          // addressing of single target on single loop...
678         u64 liWWN;
679       } u;
680     
681       ULONG port_id;     // a FC 24-bit address of port (lower 8 bits = al_pa)
682     
683       Scsi_Cmnd ScsiCmnd;   // command buffer for Report Luns
684     #define REPORT_LUNS_PL 256  
685       UCHAR ReportLunsPayload[REPORT_LUNS_PL];
686       
687       SCSI_NEXUS ScsiNexus; // LUNs per FC device
688     
689       ULONG LOGO_counter; // might try several times before logging out for good
690       ULONG LOGO_timer;   // after LIP, ports expecting PDISC must time-out and
691                           // LOGOut if successful PDISC not completed in 2 secs
692     
693       ULONG concurrent_seq;  // must be 1 or greater
694       ULONG rx_data_size;    // e.g. 128, 256, 1024, 2048 per FC-PH spec
695       ULONG BB_credit;
696       ULONG EE_credit;
697     
698       ULONG fcp_info;        // from PRLI (i.e. INITIATOR/ TARGET flags)
699                              // flags for login process
700       BOOLEAN Originator;    // Login sequence Originated (if false, we
701                              // responded to another port's login sequence)
702       BOOLEAN plogi;         // PLOGI frame ACCepted (originated or responded)
703       BOOLEAN pdisc;         // PDISC frame was ORIGINATED (self-login logic)
704       BOOLEAN prli;          // PRLI frame ACCepted (originated or responded)
705       BOOLEAN flogi;         // FLOGI frame ACCepted (originated or responded)
706       BOOLEAN logo;          // port permanently logged out (invalid login param)
707       BOOLEAN flogiReq;      // Fabric login required (set in LIP process)
708       UCHAR highest_ver;
709       UCHAR lowest_ver;
710     
711       
712       // when the "target" (actually FC Port) is waiting for login
713       // (e.g. after Link reset), set the device_blocked bit;
714       // after Port completes login, un-block target.
715       UCHAR device_blocked; // see Scsi_Device struct
716     
717                         // define singly-linked list of logged-in ports
718                         // once a port_id is identified, it is remembered,
719                         // even if the port is removed indefinitely
720       PVOID pNextPort;  // actually, type PFC_LOGGEDIN_PORT; void for Compiler
721     
722     } FC_LOGGEDIN_PORT, *PFC_LOGGEDIN_PORT;
723     
724     
725     
726     // This serves as the ESB (Exchange Status Block),
727     // and has timeout counter; used for ABORTs
728     typedef struct                
729     {                                  // FC-1 X_IDs
730       ULONG type;            // ELS_PLOGI, SCSI_IWE, ... (0 if free)
731       PFC_LOGGEDIN_PORT pLoggedInPort; // FC device on other end of Exchange
732       Scsi_Cmnd *Cmnd;       // Linux SCSI command packet includes S/G list
733       ULONG timeOut;         // units of ??, DEC by driver, Abort when 0
734       ULONG reTries;         // need one or more retries?
735       ULONG status;          // flags indicating errors (0 if none)
736       TachLiteIRB IRB;       // I/O Request Block, gets copied to ERQ
737       TachFCHDR_GCMND fchs;  // location of IRB's Req_A_SFS_Addr
738     } FC_EXCHANGE, *PFC_EXCHANGE;
739     
740     // Unfortunately, Linux limits our kmalloc() allocations to 128k.
741     // Because of this and the fact that our ScsiRegister allocation
742     // is also constrained, we move this large structure out for
743     // allocation after Scsi Register.
744     // (In other words, this cumbersome indirection is necessary
745     // because of kernel memory allocation constraints!)
746     
747     typedef struct // we will allocate this dynamically
748     {
749       FC_EXCHANGE fcExchange[ TACH_MAX_XID ];
750     } FC_EXCHANGES;
751     
752     
753     
754     
755     
756     
757     
758     
759     
760     
761     
762     typedef struct
763     {
764       char Name[64]; // name of controller ("HP Tachlite TL Rev2.0, 33MHz, 64bit bus")
765       //PVOID  pAdapterDevExt; // back pointer to device object/extension
766       ULONG ChipType;        // local numeric key for Tachyon Type / Rev.
767       ULONG status;              // our Driver - logical status
768       
769       TL_REGISTERS Registers;    // reg addresses & host memory copies
770                                  // FC-4 mapping of 'transaction' to X_IDs
771       UCHAR LILPmap[32*4];       // Loop Position Map of ALPAs (late FC-AL only)
772       FC_OPTIONS Options;        // e.g. Target, Initiator, loopback...
773       UCHAR highest_FCPH_ver;    // FC-PH version limits
774       UCHAR lowest_FCPH_ver;     // FC-PH version limits
775     
776       FC_EXCHANGES *Exchanges;  
777       ULONG fcLsExchangeLRU;       // Least Recently Used counter (Link Service)
778       ULONG fcSestExchangeLRU;       // Least Recently Used counter (FCP-SCSI)
779       FC_LOGGEDIN_PORT fcPorts;  // linked list of every FC port ever seen
780       FCSTATS fcStats;           // FC comm err counters
781     
782                                  // Host memory QUEUE pointers
783       TachLiteERQ *ERQ;          // Exchange Request Que 
784       TachyonIMQ *IMQ;           // Inbound Message Que 
785       TachLiteSFQ *SFQ;          // Single Frame Queue
786       TachSEST *SEST;            // SCSI Exchange State Table
787     
788       // these function pointers are for "generic" functions, which are
789       // replaced with Host Bus Adapter types at
790       // runtime.
791       int (*CreateTachyonQues)( void* , int);
792       int (*DestroyTachyonQues)( void* , int);
793       int (*LaserControl)(void*, int );   // e.g. On/Off
794       int (*ResetTachyon)(void*, int );
795       void (*FreezeTachyon)(void*, int );
796       void (*UnFreezeTachyon)(void*, int );
797       int (*InitializeTachyon)(void*, int, int );
798       int (*InitializeFrameManager)(void*, int );
799       int (*ProcessIMQEntry)(void*);
800       int (*ReadWriteWWN)(void*, int ReadWrite);
801       int (*ReadWriteNVRAM)(void*, void*, int ReadWrite);
802     
803     } TACHYON, *PTACHYON;
804     
805     
806     void cpqfcTSClearLinkStatusCounters(TACHYON * fcChip);
807     
808     int CpqTsCreateTachLiteQues( void* pHBA, int opcode);
809     int CpqTsDestroyTachLiteQues( void* , int);
810     int CpqTsInitializeTachLite( void *pHBA, int opcode1, int opcode2);
811     
812     int CpqTsProcessIMQEntry(void* pHBA);
813     int CpqTsResetTachLite(void *pHBA, int type);
814     void CpqTsFreezeTachlite(void *pHBA, int type);
815     void CpqTsUnFreezeTachlite(void *pHBA, int type);
816     int CpqTsInitializeFrameManager(void *pHBA, int);
817     int CpqTsLaserControl( void* addrBase, int opcode );
818     int CpqTsReadWriteWWN(void*, int ReadWrite);
819     int CpqTsReadWriteNVRAM(void*, void* data, int ReadWrite);
820     
821     void cpqfcTS_WorkTask( struct Scsi_Host *HostAdapter);
822     void cpqfcTSWorkerThread( void *host);
823     
824     int cpqfcTS_GetNVRAM_data( UCHAR *wwnbuf, UCHAR *buf );
825     ULONG cpqfcTS_ReadNVRAM( void* GPIOin, void* GPIOout , USHORT count,
826     	UCHAR *buf );
827     
828     BOOLEAN tl_write_i2c_nvram( void* GPIOin, void* GPIOout,
829       USHORT startOffset,  // e.g. 0x2f for WWN start
830       USHORT count,
831       UCHAR *buf );
832     
833     
834     // define misc functions 
835     int cpqfcTSGetLPSM( PTACHYON fcChip, char cErrorString[]);
836     int cpqfcTSDecodeGBICtype( PTACHYON fcChip, char cErrorString[]);
837     void* fcMemManager( ALIGNED_MEM *dyn_mem_pair, ULONG n_alloc, ULONG ab,
838                        ULONG ulAlignedAddress);
839     
840     void BigEndianSwap(  UCHAR *source, UCHAR *dest,  USHORT cnt);
841     
842     //ULONG virt_to_phys( PVOID virtaddr );
843                       
844     
845     // Linux interrupt handler
846     void cpqfcTS_intr_handler( int irq,void *dev_id,struct pt_regs *regs);
847     void cpqfcTSheartbeat( unsigned long ptr );
848     
849     
850     
851     // The biggest Q element we deal with is Aborts - we
852     // need 4 bytes for x_ID, and a Scsi_Cmnd (~284 bytes)
853     //#define LINKQ_ITEM_SIZE ((4+sizeof(Scsi_Cmnd)+3)/4)
854     #define LINKQ_ITEM_SIZE (3*16)
855     typedef struct
856     {
857       ULONG Type;              // e.g. LINKUP, SFQENTRY, PDISC, BLS_ABTS, ...
858       ULONG ulBuff[ LINKQ_ITEM_SIZE ];
859     } LINKQ_ITEM;
860     
861     #define FC_LINKQ_DEPTH TACH_MAX_XID
862     typedef struct
863     {
864       ULONG producer;
865       ULONG consumer;  // when producer equals consumer, Q empty
866     
867       LINKQ_ITEM Qitem[ FC_LINKQ_DEPTH ];
868     
869     } FC_LINK_QUE, *PFC_LINK_QUE;
870     
871     
872          // DPC routines post to here on Inbound SCSI frames
873          // User thread processes
874     #define FC_SCSIQ_DEPTH 32
875     
876     typedef struct
877     {
878       int Type;              // e.g. SCSI
879       ULONG ulBuff[ 3*16 ];
880     } SCSIQ_ITEM;
881     
882     typedef struct
883     {
884       ULONG producer;
885       ULONG consumer;  // when producer equals consumer, Q empty
886     
887       SCSIQ_ITEM Qitem[ FC_SCSIQ_DEPTH ];
888     
889     } FC_SCSI_QUE, *PFC_SCSI_QUE;
890     
891     
892     
893     
894     
895     #define DYNAMIC_ALLOCATIONS 4  // Tachyon aligned allocations: ERQ,IMQ,SFQ,SEST
896     
897     // Linux space allocated per HBA (chip state, etc.)
898     typedef struct 
899     {
900       struct Scsi_Host *HostAdapter; // back pointer to Linux Scsi struct
901     
902       TACHYON fcChip;    // All Tachyon registers, Queues, functions
903       ALIGNED_MEM dynamic_mem[DYNAMIC_ALLOCATIONS];
904     
905       struct pci_dev *PciDev;
906     
907       Scsi_Cmnd *LinkDnCmnd[CPQFCTS_REQ_QUEUE_LEN]; // collects Cmnds during LDn
908                                                     // (for Acceptable targets)
909       Scsi_Cmnd *BoardLockCmnd[CPQFCTS_REQ_QUEUE_LEN]; // SEST was full
910       
911       Scsi_Cmnd *BadTargetCmnd[CPQFCTS_MAX_TARGET_ID]; // missing targets
912     
913       u_char HBAnum;     // 0-based host number
914     
915     
916       struct timer_list cpqfcTStimer; // FC utility timer for implicit
917                                       // logouts, FC protocol timeouts, etc.
918       int fcStatsTime;  // Statistics delta reporting time
919     
920       struct task_struct *worker_thread; // our kernel thread
921       int PortDiscDone;    // set by SendLogins(), cleared by LDn
922       
923       struct semaphore *TachFrozen;
924       struct semaphore *TYOBcomplete;    // handshake for Tach outbound frames
925       struct semaphore *fcQueReady;      // FibreChannel work for our kernel thread
926       struct semaphore *notify_wt;       // synchronizes kernel thread kill
927       struct semaphore *BoardLock;
928       
929       PFC_LINK_QUE fcLQ;             // the WorkerThread operates on this
930     
931       spinlock_t hba_spinlock;           // held/released by WorkerThread
932     
933     } CPQFCHBA;
934     
935     #define	CPQ_SPINLOCK_HBA( x )   spin_lock(&x->hba_spinlock);
936     #define CPQ_SPINUNLOCK_HBA(x)   spin_unlock(&x->hba_spinlock);
937     
938     
939     
940     void cpqfcTSImplicitLogout( CPQFCHBA* cpqfcHBAdata,
941     		PFC_LOGGEDIN_PORT pFcPort);
942     
943     
944     void cpqfcTSTerminateExchange( CPQFCHBA*, SCSI_NEXUS *target, int );
945     
946     PFC_LOGGEDIN_PORT fcPortLoggedIn( 
947        CPQFCHBA *cpqfcHBAdata, 
948        TachFCHDR_GCMND* fchs, 
949        BOOLEAN, 
950        BOOLEAN);
951     void fcProcessLoggedIn( 
952        CPQFCHBA *cpqfcHBAdata, TachFCHDR_GCMND* fchs);
953     
954     
955     ULONG cpqfcTSBuildExchange( 
956       CPQFCHBA *cpqfcHBAdata,
957       ULONG type, // e.g. PLOGI
958       TachFCHDR_GCMND* InFCHS,  // incoming FCHS
959       void *Data,               // the CDB, scatter/gather, etc.  
960       LONG *ExchangeID );       // allocated exchange ID
961     
962     ULONG cpqfcTSStartExchange( 
963       CPQFCHBA *cpqfcHBAdata,
964       LONG ExchangeID );
965     
966     void cpqfcTSCompleteExchange( 
967            PTACHYON fcChip, 
968            ULONG exchange_ID);
969     
970     
971     PFC_LOGGEDIN_PORT  fcFindLoggedInPort( 
972       PTACHYON fcChip, 
973       Scsi_Cmnd *Cmnd,  // (We want the channel/target/lun Nexus from Cmnd)
974       ULONG port_id,  // search linked list for al_pa, or
975       UCHAR wwn[8],    // search linked list for WWN, or...
976       PFC_LOGGEDIN_PORT *pLastLoggedInPort
977     );
978     
979     void cpqfcTSPutLinkQue( 
980       CPQFCHBA *cpqfcHBAdata, 
981       int Type, 
982       void *QueContent);
983     
984     void fcPutScsiQue( 
985       CPQFCHBA *cpqfcHBAdata, 
986       int Type, 
987       void *QueContent);
988     
989     void fcLinkQReset(
990        CPQFCHBA *);
991     void fcScsiQReset(
992        CPQFCHBA *);
993     void fcSestReset(
994        CPQFCHBA *);
995     
996     
997     
998     
999     
1000     extern const UCHAR valid_al_pa[];
1001     extern const int number_of_al_pa;
1002     
1003     #define FCP_RESID_UNDER   0x80000
1004     #define FCP_RESID_OVER    0x40000
1005     #define FCP_SNS_LEN_VALID 0x20000
1006     #define FCP_RSP_LEN_VALID 0x10000
1007     
1008     // RSP_CODE definitions (dpANS Fibre Channel Protocol for SCSI, pg 34)
1009     #define FCP_DATA_LEN_NOT_BURST_LEN 0x1000000
1010     #define FCP_CMND_FIELD_INVALID     0x2000000
1011     #define FCP_DATA_RO_NOT_XRDY_RO    0x3000000
1012     #define FCP_TASKFUNCTION_NS        0x4000000
1013     #define FCP_TASKFUNCTION_FAIL      0x5000000
1014     
1015     // FCP-SCSI response status struct
1016     typedef struct  // see "TachFCHDR_RSP" definition - 64 bytes
1017     {
1018       __u32 reserved;
1019       __u32 reserved1;
1020       __u32 fcp_status;    // field validity and SCSI status
1021       __u32 fcp_resid;
1022       __u32 fcp_sns_len;   // length of FCP_SNS_INFO field
1023       __u32 fcp_rsp_len;   // length of FCP_RSP_INFO field (expect 8)
1024       __u32 fcp_rsp_info;  // 4 bytes of FCP protocol response information
1025       __u32 fcp_rsp_info2; // (4 more bytes, since most implementations use 8)
1026       __u8  fcp_sns_info[36]; // bytes for SCSI sense (ASC, ASCQ)
1027     
1028     } FCP_STATUS_RESPONSE, *PFCP_STATUS_RESPONSE;
1029     
1030     
1031     // Fabric State Change Registration
1032     typedef struct scrpl
1033     {
1034       __u32 command;
1035       __u32 function;
1036     } SCR_PL;
1037     
1038     // Fabric Name Service Request
1039     typedef struct nsrpl
1040     {
1041       __u32 CT_Rev;  // (& IN_ID)   WORD 0
1042       __u32 FCS_Type;            // WORD 1
1043       __u32 Command_code;        // WORD 2
1044       __u32 reason_code;         // WORD 3
1045       __u32 FCP;                 // WORD 4 (lower byte)
1046       
1047     } NSR_PL;
1048     
1049     
1050     
1051     // "FC.H"
1052     #define MAX_RX_SIZE		0x800	// Max Receive Buffer Size is 2048
1053     #define MIN_RX_SIZE		0x100	// Min Size is 256, per FC-PLDA Spec
1054     #define	MAX_TARGET_RXIDS	SEST_DEPTH
1055     #define TARGET_RX_SIZE		SEST_BUFFER_LENGTH
1056     
1057     #define CLASS_1			0x01
1058     #define CLASS_2			0x02
1059     #define CLASS_3			0x03
1060     
1061     #define FC_PH42			0x08
1062     #define FC_PH43			0x09
1063     #define FC_PH3			0x20
1064     
1065     #define RR_TOV			2	// Minimum Time for target to wait for
1066     					// PDISC after a LIP.
1067     #define E_D_TOV			2	// Minimum Time to wait for Sequence
1068     					// Completion.
1069     #define R_A_TOV			0	// Minimum Time for Target to wait 
1070     					// before reclaiming resources.
1071     //
1072     //	R_CTL Field
1073     //
1074     //	Routing Bits (31-28)
1075     //
1076     #define FC4_DEVICE_DATA		0x00000000
1077     #define EXT_LINK_DATA		0x20000000
1078     #define FC4_LINK_DATA		0x30000000
1079     #define VIDEO_DATA		0x40000000
1080     #define BASIC_LINK_DATA		0x80000000
1081     #define LINK_CONTROL		0xC0000000
1082     #define ROUTING_MASK		0xF0000000
1083     
1084     //
1085     //	Information Bits (27-24)
1086     //
1087     #define UNCAT_INFORMATION	0x00000000
1088     #define SOLICITED_DATA		0x01000000
1089     #define UNSOLICITED_CONTROL	0x02000000
1090     #define SOLICITED_CONTROL	0x03000000
1091     #define UNSOLICITED_DATA	0x04000000
1092     #define DATA_DESCRIPTOR		0x05000000
1093     #define UNSOLICITED_COMMAND	0x06000000
1094     #define COMMAND_STATUS		0x07000000
1095     #define INFO_MASK		0x0F000000
1096     //
1097     //	(Link Control Codes)
1098     //
1099     #define ACK_1			0x00000000
1100     #define ACK_0_OR_N		0x01000000
1101     #define P_RJT			0x02000000 
1102     #define F_RJT			0x03000000 
1103     #define P_BSY			0x04000000
1104     #define FABRIC_BUSY_TO_DF	0x05000000	// Fabric Busy to Data Frame
1105     #define FABRIC_BUSY_TO_LC	0x06000000	// Fabric Busy to Link Ctl Frame
1106     #define LINK_CREDIT_RESET	0x07000000
1107     //
1108     //	(Link Service Command Codes)
1109     //
1110     //#define LS_RJT			0x01000000	// LS Reject
1111     
1112     #define LS_ACC			0x02000000	// LS Accept
1113     #define LS_PLOGI		0x03000000	// N_PORT Login
1114     #define LS_FLOGI		0x04000000	// F_PORT Login
1115     #define LS_LOGO			0x05000000	// Logout
1116     #define LS_ABTX			0x06000000	// Abort Exchange
1117     #define LS_RCS			0x07000000	// Read Connection Status
1118     #define LS_RES			0x08000000	// Read Exchange Status
1119     #define LS_RSS			0x09000000	// Read Sequence Status
1120     #define LS_RSI			0x0A000000	// Request Seq Initiative
1121     #define LS_ESTS			0x0B000000	// Establish Steaming
1122     #define LS_ESTC			0x0C000000	// Estimate Credit
1123     #define LS_ADVC			0x0D000000	// Advice Credit
1124     #define LS_RTV			0x0E000000	// Read Timeout Value
1125     #define LS_RLS			0x0F000000	// Read Link Status
1126     #define LS_ECHO			0x10000000	// Echo
1127     #define LS_TEST			0x11000000	// Test
1128     #define LS_RRQ			0x12000000	// Reinstate Rec. Qual.
1129     #define LS_PRLI			0x20000000	// Process Login
1130     #define LS_PRLO			0x21000000	// Process Logout
1131     #define LS_TPRLO		0x24000000	// 3rd Party Process Logout
1132     #define LS_PDISC		0x50000000	// Process Discovery
1133     #define LS_FDISC		0x51000000	// Fabric Discovery
1134     #define LS_ADISC		0x52000000	// Discover Address
1135     #define LS_RNC			0x53000000	// Report Node Capability
1136     #define LS_SCR                  0x62000000      // State Change Registration
1137     #define LS_MASK			0xFF000000	
1138     
1139     //
1140     // 	TYPE Bit Masks
1141     //
1142     #define BASIC_LINK_SERVICE	0x00000000
1143     #define EXT_LINK_SERVICE	0x01000000
1144     
1145     #define LLC			0x04000000
1146     #define LLC_SNAP		0x05000000
1147     #define SCSI_FCP		0x08000000
1148     #define SCSI_GPP		0x09000000
1149     #define IPI3_MASTER		0x11000000
1150     #define IPI3_SLAVE		0x12000000
1151     #define IPI3_PEER		0x13000000
1152     #define CP_IPI3_MASTER		0x15000000
1153     #define CP_IPI3_SLAVE		0x16000000
1154     #define CP_IPI3_PEER		0x17000000
1155     #define SBCCS_CHANNEL		0x19000000
1156     #define SBCCS_CONTROL		0x1A000000
1157     #define FIBRE_SERVICES		0x20000000
1158     #define FC_FG			0x21000000
1159     #define FC_XS			0x22000000
1160     #define FC_AL			0x23000000
1161     #define SNMP			0x24000000
1162     #define HIPPI_FP		0x40000000
1163     #define TYPE_MASK		0xFF000000
1164     
1165     typedef struct {
1166     	UCHAR seq_id_valid;
1167     	UCHAR seq_id;
1168     	USHORT reserved;  // 2 bytes reserved
1169     	ULONG ox_rx_id;
1170     	USHORT low_seq_cnt;
1171     	USHORT high_seq_cnt;
1172     } BA_ACC_PAYLOAD;
1173     
1174     typedef struct {
1175     	UCHAR reserved;
1176     	UCHAR reason_code;
1177     	UCHAR reason_explain;
1178     	UCHAR vendor_unique;
1179     } BA_RJT_PAYLOAD;
1180     
1181     
1182     typedef struct {
1183     	ULONG 	command_code;
1184     	ULONG 	sid;
1185     	USHORT	ox_id;
1186     	USHORT	rx_id;
1187     } RRQ_MESSAGE;
1188     
1189     typedef struct {
1190     	ULONG command_code;
1191     	UCHAR vendor;
1192     	UCHAR explain;
1193     	UCHAR reason;
1194     	UCHAR reserved;
1195     } REJECT_MESSAGE;
1196     
1197     
1198     #define	N_OR_F_PORT		0x1000
1199     #define RANDOM_RELATIVE_OFFSET	0x4000
1200     #define CONTINUOSLY_INCREASING	0x8000
1201     
1202     #define CLASS_VALID		0x8000
1203     #define INTERMIX_MODE		0x4000
1204     #define TRANSPARENT_STACKED	0x2000
1205     #define LOCKDOWN_STACKED	0x1000
1206     #define SEQ_DELIVERY		0x800
1207     
1208     #define XID_NOT_SUPPORTED	0x00
1209     #define XID_SUPPORTED		0x4000
1210     #define XID_REQUIRED		0xC000
1211     
1212     #define ASSOCIATOR_NOT_SUPPORTED	0x00
1213     #define ASSOCIATOR_SUPPORTED	0x1000
1214     #define ASSOCIATOR_REQUIRED	0x3000
1215     
1216     #define	INIT_ACK0_SUPPORT	0x800
1217     #define INIT_ACKN_SUPPORT	0x400
1218     
1219     #define	RECIP_ACK0_SUPPORT	0x8000
1220     #define RECIP_ACKN_SUPPORT	0x4000
1221     
1222     #define X_ID_INTERLOCK		0x2000
1223     
1224     #define ERROR_POLICY		0x1800		// Error Policy Supported
1225     #define ERROR_DISCARD		0x00		// Only Discard Supported
1226     #define ERROR_DISC_PROCESS	0x02		// Discard and process supported
1227     
1228     #define NODE_ID			0x01
1229     #define IEEE_EXT		0x20
1230     
1231     //
1232     // Categories Supported Per Sequence
1233     //
1234     #define	CATEGORIES_PER_SEQUENCE	0x300
1235     #define ONE_CATEGORY_SEQUENCE	0x00		// 1 Category per Sequence
1236     #define TWO_CATEGORY_SEQUENCE	0x01		// 2 Categories per Sequence
1237     #define MANY_CATEGORY_SEQUENCE	0x03		// > 2 Categories/Sequence
1238     
1239     typedef struct {
1240     
1241     	USHORT initiator_control;
1242     	USHORT service_options;
1243     
1244     	USHORT rx_data_size;
1245     	USHORT recipient_control;
1246     
1247     	USHORT ee_credit;
1248     	USHORT concurrent_sequences;
1249     
1250     	USHORT reserved;
1251     	USHORT open_sequences;
1252     
1253     } CLASS_PARAMETERS;
1254     
1255     typedef struct {
1256     	ULONG	login_cmd;
1257     	//
1258     	// Common Service Parameters
1259     	//
1260     	struct {
1261     
1262     		USHORT bb_credit;
1263     		UCHAR lowest_ver;
1264     		UCHAR highest_ver;
1265     
1266     		USHORT bb_rx_size;
1267     		USHORT common_features;
1268     
1269     		USHORT rel_offset;
1270     		USHORT concurrent_seq;
1271     
1272     
1273     		ULONG e_d_tov;
1274     	} cmn_services;
1275     
1276     	//
1277     	// Port Name
1278     	//
1279     	UCHAR port_name[8];
1280     
1281     	//
1282     	// Node/Fabric Name
1283     	//
1284     	UCHAR node_name[8];
1285     
1286     	//
1287     	// Class 1, 2 and 3 Service Parameters
1288     	//
1289     	CLASS_PARAMETERS	class1;
1290     	CLASS_PARAMETERS	class2;
1291     	CLASS_PARAMETERS	class3;
1292     
1293     	ULONG reserved[4];
1294     
1295     	//
1296     	// Vendor Version Level
1297     	//
1298     	UCHAR		vendor_id[2];
1299     	UCHAR		vendor_version[6];
1300     	ULONG		buffer_size;
1301     	USHORT		rxid_start;
1302     	USHORT		total_rxids;
1303     } LOGIN_PAYLOAD;
1304     
1305     
1306     typedef struct
1307     {
1308       ULONG cmd;  // 4 bytes
1309       UCHAR n_port_identifier[3];
1310       UCHAR reserved;
1311       UCHAR port_name[8];
1312     } LOGOUT_PAYLOAD;
1313     
1314     
1315     //
1316     //	PRLI Request Service Parameter Defines
1317     //
1318     #define PRLI_ACC			0x01
1319     #define PRLI_REQ			0x02
1320     #define ORIG_PROCESS_ASSOC_VALID	0x8000
1321     #define RESP_PROCESS_ASSOC_VALID	0x4000
1322     #define ESTABLISH_PAIR			0x2000
1323     #define DATA_OVERLAY_ALLOWED		0x40
1324     #define	INITIATOR_FUNCTION		0x20
1325     #define	TARGET_FUNCTION			0x10
1326     #define CMD_DATA_MIXED			0x08
1327     #define DATA_RESP_MIXED			0x04
1328     #define READ_XFER_RDY			0x02
1329     #define WRITE_XFER_RDY			0x01
1330     
1331     #define RESPONSE_CODE_MASK	0xF00
1332     #define REQUEST_EXECUTED	0x100
1333     #define NO_RESOURCES		0x200
1334     #define INIT_NOT_COMPLETE	0x300
1335     #define IMAGE_DOES_NOT_EXIST	0x400
1336     #define BAD_PREDEFINED_COND	0x500
1337     #define REQ_EXEC_COND		0x600
1338     #define NO_MULTI_PAGE		0x700
1339     
1340     typedef struct {
1341     	USHORT	payload_length;
1342     	UCHAR	page_length;
1343     	UCHAR	cmd;
1344     
1345     
1346     	ULONG	valid;
1347     
1348     	ULONG	orig_process_associator;
1349     
1350     	ULONG	resp_process_associator;
1351     	
1352     	ULONG	fcp_info;
1353     } PRLI_REQUEST;
1354     
1355     typedef struct {
1356     
1357     	USHORT	payload_length;
1358     	UCHAR	page_length;
1359     	UCHAR	cmd;
1360     
1361     	ULONG	valid;
1362     	ULONG	orig_process_associator;
1363     
1364     	ULONG	resp_process_associator;
1365     	ULONG	reserved;
1366     } PRLO_REQUEST;
1367     
1368     typedef struct {
1369     	ULONG	cmd;
1370     
1371     	ULONG	hard_address;
1372     	
1373     	UCHAR	port_name[8];
1374     
1375     	UCHAR	node_name[8];
1376     
1377     	ULONG	s_id;
1378     } ADISC_PAYLOAD;
1379     
1380     // J. McCarty's LINK.H
1381     //
1382     //	LS_RJT Reason Codes
1383     //
1384     
1385     #define INVALID_COMMAND_CODE	0x01
1386     #define LOGICAL_ERROR		0x03
1387     #define LOGICAL_BUSY		0x05
1388     #define PROTOCOL_ERROR		0x07
1389     #define UNABLE_TO_PERFORM	0x09
1390     #define COMMAND_NOT_SUPPORTED	0x0B
1391     #define LS_VENDOR_UNIQUE	0xFF
1392     
1393     //
1394     // 	LS_RJT Reason Codes Explanations
1395     //
1396     #define NO_REASON		0x00
1397     #define OPTIONS_ERROR		0x01
1398     #define INITIATOR_CTL_ERROR	0x03
1399     #define RECIPIENT_CTL_ERROR	0x05
1400     #define DATA_FIELD_SIZE_ERROR	0x07
1401     #define CONCURRENT_SEQ_ERROR	0x09
1402     #define CREDIT_ERROR		0x0B
1403     #define INVALID_PORT_NAME	0x0D
1404     #define INVALID_NODE_NAME	0x0E
1405     #define INVALID_CSP		0x0F	// Invalid Service Parameters
1406     #define INVALID_ASSOC_HDR	0x11	// Invalid Association Header
1407     #define ASSOC_HDR_REQUIRED	0x13	// Association Header Required
1408     #define LS_INVALID_S_ID		0x15
1409     #define INVALID_OX_RX_ID	0x17	// Invalid OX_ID RX_ID Combination
1410     #define CMD_IN_PROCESS		0x19
1411     #define INVALID_IDENTIFIER	0x1F	// Invalid N_PORT Identifier
1412     #define INVALID_SEQ_ID		0x21
1413     #define ABT_INVALID_XCHNG	0x23 	// Attempt to Abort an invalid Exchange
1414     #define ABT_INACTIVE_XCHNG	0x25 	// Attempt to Abort an inactive Exchange
1415     #define NEED_REC_QUAL		0x27	// Recovery Qualifier required
1416     #define NO_LOGIN_RESOURCES	0x29	// No resources to support login
1417     #define NO_DATA			0x2A	// Unable to supply requested data
1418     #define	REQUEST_NOT_SUPPORTED	0x2C	// Request Not Supported
1419     
1420     //
1421     //	Link Control Codes
1422     //
1423     
1424     //
1425     //	P_BSY Action Codes
1426     //
1427     #define SEQUENCE_TERMINATED	0x01000000
1428     #define SEQUENCE_ACTIVE		0x02000000
1429     
1430     //
1431     //	P_BSY Reason Codes
1432     //
1433     #define PHYS_NPORT_BUSY		0x010000
1434     #define NPORT_RESOURCE_BUSY	0x020000
1435     
1436     //
1437     // 	P_RJT, F_RJT Action Codes
1438     //
1439     
1440     #define RETRYABLE_ERROR		0x01000000
1441     #define NON_RETRYABLE_ERROR	0x02000000
1442     
1443     //
1444     // 	P_RJT, F_RJT Reason Codes
1445     //
1446     #define INVALID_D_ID		0x010000
1447     #define INVALID_S_ID		0x020000
1448     #define NPORT_NOT_AVAIL_TMP	0x030000
1449     #define NPORT_NOT_AVAIL_PERM	0x040000
1450     #define CLASS_NOT_SUPPORTED	0x050000
1451     #define USAGE_ERROR		0x060000
1452     #define TYPE_NOT_SUPPORTED	0x070000
1453     #define INVAL_LINK_CONTROL	0x080000
1454     #define INVAL_R_CTL		0x090000
1455     #define INVAL_F_CTL		0x0A0000
1456     #define INVAL_OX_ID		0x0B0000
1457     #define INVAL_RX_ID		0x0C0000
1458     #define INVAL_SEQ_ID		0x0D0000
1459     #define INVAL_DF_CTL		0x0E0000
1460     #define INVAL_SEQ_CNT		0x0F0000
1461     #define INVAL_PARAMS		0x100000
1462     #define EXCHANGE_ERROR		0x110000
1463     #define LS_PROTOCOL_ERROR	0x120000
1464     #define INCORRECT_LENGTH	0x130000
1465     #define UNEXPECTED_ACK		0x140000
1466     #define LOGIN_REQ		0x160000
1467     #define EXCESSIVE_SEQ		0x170000
1468     #define NO_EXCHANGE		0x180000
1469     #define SEC_HDR_NOT_SUPPORTED	0x190000
1470     #define NO_FABRIC		0x1A0000
1471     #define P_VENDOR_UNIQUE		0xFF0000
1472     
1473     //
1474     // 	BA_RJT Reason Codes
1475     //
1476     #define BA_INVALID_COMMAND	0x00010000
1477     #define BA_LOGICAL_ERROR	0x00030000
1478     #define BA_LOGICAL_BUSY		0x00050000
1479     #define BA_PROTOCOL_ERROR	0x00070000
1480     #define BA_UNABLE_TO_PERFORM	0x00090000
1481     
1482     //
1483     // 	BA_RJT Reason Explanation Codes
1484     //
1485     #define BA_NO_REASON		0x00000000
1486     #define BA_INVALID_OX_RX	0x00000300
1487     #define BA_SEQUENCE_ABORTED	0x00000500
1488     
1489     
1490     
1491     #endif /* CPQFCTSSTRUCTS_H	*/
1492     
1493