File: /usr/src/linux/drivers/scsi/cyberstormII.c

1     /* cyberstormII.c: Driver for CyberStorm SCSI Mk II
2      *
3      * Copyright (C) 1996 Jesper Skov (jskov@cygnus.co.uk)
4      *
5      * This driver is based on cyberstorm.c
6      */
7     
8     /* TODO:
9      *
10      * 1) Figure out how to make a cleaner merge with the sparc driver with regard
11      *    to the caches and the Sparc MMU mapping.
12      * 2) Make as few routines required outside the generic driver. A lot of the
13      *    routines in this file used to be inline!
14      */
15     
16     #include <linux/module.h>
17     
18     #include <linux/init.h>
19     #include <linux/kernel.h>
20     #include <linux/delay.h>
21     #include <linux/types.h>
22     #include <linux/string.h>
23     #include <linux/slab.h>
24     #include <linux/blk.h>
25     #include <linux/proc_fs.h>
26     #include <linux/stat.h>
27     
28     #include "scsi.h"
29     #include "hosts.h"
30     #include "NCR53C9x.h"
31     #include "cyberstormII.h"
32     
33     #include <linux/zorro.h>
34     #include <asm/irq.h>
35     #include <asm/amigaints.h>
36     #include <asm/amigahw.h>
37     
38     #include <asm/pgtable.h>
39     
40     static int  dma_bytes_sent(struct NCR_ESP *esp, int fifo_count);
41     static int  dma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd *sp);
42     static void dma_dump_state(struct NCR_ESP *esp);
43     static void dma_init_read(struct NCR_ESP *esp, __u32 addr, int length);
44     static void dma_init_write(struct NCR_ESP *esp, __u32 addr, int length);
45     static void dma_ints_off(struct NCR_ESP *esp);
46     static void dma_ints_on(struct NCR_ESP *esp);
47     static int  dma_irq_p(struct NCR_ESP *esp);
48     static void dma_led_off(struct NCR_ESP *esp);
49     static void dma_led_on(struct NCR_ESP *esp);
50     static int  dma_ports_p(struct NCR_ESP *esp);
51     static void dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write);
52     
53     volatile unsigned char cmd_buffer[16];
54     				/* This is where all commands are put
55     				 * before they are transferred to the ESP chip
56     				 * via PIO.
57     				 */
58     
59     /***************************************************************** Detection */
60     int __init cyberII_esp_detect(Scsi_Host_Template *tpnt)
61     {
62     	struct NCR_ESP *esp;
63     	struct zorro_dev *z = NULL;
64     	unsigned long address;
65     	struct ESP_regs *eregs;
66     
67     	if ((z = zorro_find_device(ZORRO_PROD_PHASE5_CYBERSTORM_MK_II, z))) {
68     	    unsigned long board = z->resource.start;
69     	    if (request_mem_region(board+CYBERII_ESP_ADDR,
70     				   sizeof(struct ESP_regs), "NCR53C9x")) {
71     		/* Do some magic to figure out if the CyberStorm Mk II
72     		 * is equipped with a SCSI controller
73     		 */
74     		address = (unsigned long)ZTWO_VADDR(board);
75     		eregs = (struct ESP_regs *)(address + CYBERII_ESP_ADDR);
76     
77     		esp = esp_allocate(tpnt, (void *)board+CYBERII_ESP_ADDR);
78     
79     		esp_write(eregs->esp_cfg1, (ESP_CONFIG1_PENABLE | 7));
80     		udelay(5);
81     		if(esp_read(eregs->esp_cfg1) != (ESP_CONFIG1_PENABLE | 7)) {
82     			esp_deallocate(esp);
83     			scsi_unregister(esp->ehost);
84     			release_mem_region(board+CYBERII_ESP_ADDR,
85     					   sizeof(struct ESP_regs));
86     			return 0; /* Bail out if address did not hold data */
87     		}
88     
89     		/* Do command transfer with programmed I/O */
90     		esp->do_pio_cmds = 1;
91     
92     		/* Required functions */
93     		esp->dma_bytes_sent = &dma_bytes_sent;
94     		esp->dma_can_transfer = &dma_can_transfer;
95     		esp->dma_dump_state = &dma_dump_state;
96     		esp->dma_init_read = &dma_init_read;
97     		esp->dma_init_write = &dma_init_write;
98     		esp->dma_ints_off = &dma_ints_off;
99     		esp->dma_ints_on = &dma_ints_on;
100     		esp->dma_irq_p = &dma_irq_p;
101     		esp->dma_ports_p = &dma_ports_p;
102     		esp->dma_setup = &dma_setup;
103     
104     		/* Optional functions */
105     		esp->dma_barrier = 0;
106     		esp->dma_drain = 0;
107     		esp->dma_invalidate = 0;
108     		esp->dma_irq_entry = 0;
109     		esp->dma_irq_exit = 0;
110     		esp->dma_led_on = &dma_led_on;
111     		esp->dma_led_off = &dma_led_off;
112     		esp->dma_poll = 0;
113     		esp->dma_reset = 0;
114     
115     		/* SCSI chip speed */
116     		esp->cfreq = 40000000;
117     
118     		/* The DMA registers on the CyberStorm are mapped
119     		 * relative to the device (i.e. in the same Zorro
120     		 * I/O block).
121     		 */
122     		esp->dregs = (void *)(address + CYBERII_DMA_ADDR);
123     
124     		/* ESP register base */
125     		esp->eregs = eregs;
126     		
127     		/* Set the command buffer */
128     		esp->esp_command = (volatile unsigned char*) cmd_buffer;
129     		esp->esp_command_dvma = virt_to_bus(cmd_buffer);
130     
131     		esp->irq = IRQ_AMIGA_PORTS;
132     		request_irq(IRQ_AMIGA_PORTS, esp_intr, SA_SHIRQ,
133     			    "CyberStorm SCSI Mk II", esp_intr);
134     
135     		/* Figure out our scsi ID on the bus */
136     		esp->scsi_id = 7;
137     		
138     		/* We don't have a differential SCSI-bus. */
139     		esp->diff = 0;
140     
141     		esp_initialize(esp);
142     
143     		printk("ESP: Total of %d ESP hosts found, %d actually in use.\n", nesps, esps_in_use);
144     		esps_running = esps_in_use;
145     		return esps_in_use;
146     	    }
147     	}
148     	return 0;
149     }
150     
151     /************************************************************* DMA Functions */
152     static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count)
153     {
154     	/* Since the CyberStorm DMA is fully dedicated to the ESP chip,
155     	 * the number of bytes sent (to the ESP chip) equals the number
156     	 * of bytes in the FIFO - there is no buffering in the DMA controller.
157     	 * XXXX Do I read this right? It is from host to ESP, right?
158     	 */
159     	return fifo_count;
160     }
161     
162     static int dma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd *sp)
163     {
164     	/* I don't think there's any limit on the CyberDMA. So we use what
165     	 * the ESP chip can handle (24 bit).
166     	 */
167     	unsigned long sz = sp->SCp.this_residual;
168     	if(sz > 0x1000000)
169     		sz = 0x1000000;
170     	return sz;
171     }
172     
173     static void dma_dump_state(struct NCR_ESP *esp)
174     {
175     	ESPLOG(("esp%d: dma -- cond_reg<%02x>\n",
176     		esp->esp_id, ((struct cyberII_dma_registers *)
177     			      (esp->dregs))->cond_reg));
178     	ESPLOG(("intreq:<%04x>, intena:<%04x>\n",
179     		custom.intreqr, custom.intenar));
180     }
181     
182     static void dma_init_read(struct NCR_ESP *esp, __u32 addr, int length)
183     {
184     	struct cyberII_dma_registers *dregs = 
185     		(struct cyberII_dma_registers *) esp->dregs;
186     
187     	cache_clear(addr, length);
188     
189     	addr &= ~(1);
190     	dregs->dma_addr0 = (addr >> 24) & 0xff;
191     	dregs->dma_addr1 = (addr >> 16) & 0xff;
192     	dregs->dma_addr2 = (addr >>  8) & 0xff;
193     	dregs->dma_addr3 = (addr      ) & 0xff;
194     }
195     
196     static void dma_init_write(struct NCR_ESP *esp, __u32 addr, int length)
197     {
198     	struct cyberII_dma_registers *dregs = 
199     		(struct cyberII_dma_registers *) esp->dregs;
200     
201     	cache_push(addr, length);
202     
203     	addr |= 1;
204     	dregs->dma_addr0 = (addr >> 24) & 0xff;
205     	dregs->dma_addr1 = (addr >> 16) & 0xff;
206     	dregs->dma_addr2 = (addr >>  8) & 0xff;
207     	dregs->dma_addr3 = (addr      ) & 0xff;
208     }
209     
210     static void dma_ints_off(struct NCR_ESP *esp)
211     {
212     	disable_irq(esp->irq);
213     }
214     
215     static void dma_ints_on(struct NCR_ESP *esp)
216     {
217     	enable_irq(esp->irq);
218     }
219     
220     static int dma_irq_p(struct NCR_ESP *esp)
221     {
222     	/* It's important to check the DMA IRQ bit in the correct way! */
223     	return (esp_read(esp->eregs->esp_status) & ESP_STAT_INTR);
224     }
225     
226     static void dma_led_off(struct NCR_ESP *esp)
227     {
228     	((struct cyberII_dma_registers *)(esp->dregs))->ctrl_reg &= ~CYBERII_DMA_LED;
229     }
230     
231     static void dma_led_on(struct NCR_ESP *esp)
232     {
233     	((struct cyberII_dma_registers *)(esp->dregs))->ctrl_reg |= CYBERII_DMA_LED;
234     }
235     
236     static int dma_ports_p(struct NCR_ESP *esp)
237     {
238     	return ((custom.intenar) & IF_PORTS);
239     }
240     
241     static void dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write)
242     {
243     	/* On the Sparc, DMA_ST_WRITE means "move data from device to memory"
244     	 * so when (write) is true, it actually means READ!
245     	 */
246     	if(write){
247     		dma_init_read(esp, addr, count);
248     	} else {
249     		dma_init_write(esp, addr, count);
250     	}
251     }
252     
253     #define HOSTS_C
254     
255     #include "cyberstormII.h"
256     
257     static Scsi_Host_Template driver_template = SCSI_CYBERSTORMII;
258     
259     #include "scsi_module.c"
260     
261     
262     int cyberII_esp_release(struct Scsi_Host *instance)
263     {
264     #ifdef MODULE
265     	unsigned long address = (unsigned long)((struct NCR_ESP *)instance->hostdata)->edev;
266     
267     	esp_deallocate((struct NCR_ESP *)instance->hostdata); 
268     	esp_release();
269     	release_mem_region(address, sizeof(struct ESP_regs));
270     	free_irq(IRQ_AMIGA_PORTS, esp_intr);
271     #endif
272     	return 1;
273     }
274