File: /usr/src/linux/drivers/scsi/dec_esp.c
1 /*
2 * dec_esp.c: Driver for SCSI chips on IOASIC based TURBOchannel DECstations
3 * and TURBOchannel PMAZ-A cards
4 *
5 * TURBOchannel changes by Harald Koerfgen
6 * PMAZ-A support by David Airlie
7 *
8 * based on jazz_esp.c:
9 * Copyright (C) 1997 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
10 *
11 * jazz_esp is based on David S. Miller's ESP driver and cyber_esp
12 *
13 * 20000819 - Small PMAZ-AA fixes by Florian Lohoff <flo@rfc822.org>
14 * Be warned the PMAZ-AA works currently as a single card.
15 * Dont try to put multiple cards in one machine - They are
16 * both detected but it may crash under high load garbling your
17 * data.
18 * 20001005 - Initialization fixes for 2.4.0-test9
19 * Florian Lohoff <flo@rfc822.org>
20 */
21
22 #include <linux/kernel.h>
23 #include <linux/delay.h>
24 #include <linux/types.h>
25 #include <linux/string.h>
26 #include <linux/slab.h>
27 #include <linux/blk.h>
28 #include <linux/proc_fs.h>
29 #include <linux/stat.h>
30
31 #include "scsi.h"
32 #include "hosts.h"
33 #include "NCR53C9x.h"
34 #include "dec_esp.h"
35
36 #include <asm/irq.h>
37 #include <asm/jazz.h>
38 #include <asm/jazzdma.h>
39 #include <asm/dma.h>
40
41 #include <asm/pgtable.h>
42
43 #include <asm/dec/tc.h>
44 #include <asm/dec/interrupts.h>
45 #include <asm/dec/ioasic_addrs.h>
46 #include <asm/dec/ioasic_ints.h>
47 #include <asm/dec/machtype.h>
48
49 /*
50 * Once upon a time the pmaz code used to be working but
51 * it hasn't been maintained for quite some time.
52 * It isn't working anymore but I'll leave here as a
53 * starting point. #define this an be prepared for tons
54 * of warnings and errors :)
55 */
56 static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count);
57 static void dma_drain(struct NCR_ESP *esp);
58 static int dma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd * sp);
59 static void dma_dump_state(struct NCR_ESP *esp);
60 static void dma_init_read(struct NCR_ESP *esp, __u32 vaddress, int length);
61 static void dma_init_write(struct NCR_ESP *esp, __u32 vaddress, int length);
62 static void dma_ints_off(struct NCR_ESP *esp);
63 static void dma_ints_on(struct NCR_ESP *esp);
64 static int dma_irq_p(struct NCR_ESP *esp);
65 static int dma_ports_p(struct NCR_ESP *esp);
66 static void dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write);
67 static void dma_mmu_get_scsi_one(struct NCR_ESP *esp, Scsi_Cmnd * sp);
68 static void dma_mmu_get_scsi_sgl(struct NCR_ESP *esp, Scsi_Cmnd * sp);
69 static void dma_advance_sg(Scsi_Cmnd * sp);
70
71 static void pmaz_dma_drain(struct NCR_ESP *esp);
72 static void pmaz_dma_init_read(struct NCR_ESP *esp, __u32 vaddress, int length);
73 static void pmaz_dma_init_write(struct NCR_ESP *esp, __u32 vaddress, int length);
74 static void pmaz_dma_ints_off(struct NCR_ESP *esp);
75 static void pmaz_dma_ints_on(struct NCR_ESP *esp);
76 static void pmaz_dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write);
77 static void pmaz_dma_mmu_get_scsi_one(struct NCR_ESP *esp, Scsi_Cmnd * sp);
78
79 #define TC_ESP_RAM_SIZE 0x20000
80 #define ESP_TGT_DMA_SIZE ((TC_ESP_RAM_SIZE/7) & ~(sizeof(int)-1))
81 #define ESP_NCMD 7
82
83 #define TC_ESP_DMAR_MASK 0x1ffff
84 #define TC_ESP_DMAR_WRITE 0x80000000
85 #define TC_ESP_DMA_ADDR(x) ((unsigned)(x) & TC_ESP_DMAR_MASK)
86
87 __u32 esp_virt_buffer;
88 int scsi_current_length;
89
90 volatile unsigned char cmd_buffer[16];
91 volatile unsigned char pmaz_cmd_buffer[16];
92 /* This is where all commands are put
93 * before they are trasfered to the ESP chip
94 * via PIO.
95 */
96
97 volatile unsigned long *scsi_dma_ptr;
98 volatile unsigned long *scsi_next_ptr;
99 volatile unsigned long *scsi_scr;
100 volatile unsigned long *ioasic_ssr;
101 volatile unsigned long *scsi_sdr0;
102 volatile unsigned long *scsi_sdr1;
103
104 static void scsi_dma_int(int, void *, struct pt_regs *);
105
106 static Scsi_Host_Template driver_template = SCSI_DEC_ESP;
107
108 #include "scsi_module.c"
109
110 /***************************************************************** Detection */
111 int dec_esp_detect(Scsi_Host_Template * tpnt)
112 {
113 struct NCR_ESP *esp;
114 struct ConfigDev *esp_dev;
115 int slot;
116 unsigned long mem_start;
117
118 if (IOASIC) {
119 esp_dev = 0;
120 esp = esp_allocate(tpnt, (void *) esp_dev);
121
122 scsi_dma_ptr = (unsigned long *) (system_base + IOCTL + SCSI_DMA_P);
123 scsi_next_ptr = (unsigned long *) (system_base + IOCTL + SCSI_DMA_BP);
124 scsi_scr = (unsigned long *) (system_base + IOCTL + SCSI_SCR);
125 ioasic_ssr = (unsigned long *) (system_base + IOCTL + SSR);
126 scsi_sdr0 = (unsigned long *) (system_base + IOCTL + SCSI_SDR0);
127 scsi_sdr1 = (unsigned long *) (system_base + IOCTL + SCSI_SDR1);
128
129 /* Do command transfer with programmed I/O */
130 esp->do_pio_cmds = 1;
131
132 /* Required functions */
133 esp->dma_bytes_sent = &dma_bytes_sent;
134 esp->dma_can_transfer = &dma_can_transfer;
135 esp->dma_dump_state = &dma_dump_state;
136 esp->dma_init_read = &dma_init_read;
137 esp->dma_init_write = &dma_init_write;
138 esp->dma_ints_off = &dma_ints_off;
139 esp->dma_ints_on = &dma_ints_on;
140 esp->dma_irq_p = &dma_irq_p;
141 esp->dma_ports_p = &dma_ports_p;
142 esp->dma_setup = &dma_setup;
143
144 /* Optional functions */
145 esp->dma_barrier = 0;
146 esp->dma_drain = &dma_drain;
147 esp->dma_invalidate = 0;
148 esp->dma_irq_entry = 0;
149 esp->dma_irq_exit = 0;
150 esp->dma_poll = 0;
151 esp->dma_reset = 0;
152 esp->dma_led_off = 0;
153 esp->dma_led_on = 0;
154
155 /* virtual DMA functions */
156 esp->dma_mmu_get_scsi_one = &dma_mmu_get_scsi_one;
157 esp->dma_mmu_get_scsi_sgl = &dma_mmu_get_scsi_sgl;
158 esp->dma_mmu_release_scsi_one = 0;
159 esp->dma_mmu_release_scsi_sgl = 0;
160 esp->dma_advance_sg = &dma_advance_sg;
161
162
163 /* SCSI chip speed */
164 esp->cfreq = 25000000;
165
166 /*
167 * we don't give the address of DMA channel, but the number
168 * of DMA channel, so we can use the jazz DMA functions
169 *
170 */
171 esp->dregs = JAZZ_SCSI_DMA;
172
173 /* ESP register base */
174 esp->eregs = (struct ESP_regs *) (system_base + SCSI);
175
176 /* Set the command buffer */
177 esp->esp_command = (volatile unsigned char *) cmd_buffer;
178
179 /* get virtual dma address for command buffer */
180 esp->esp_command_dvma = (__u32) KSEG1ADDR((volatile unsigned char *) cmd_buffer);
181
182 esp->irq = SCSI_INT;
183
184 esp->scsi_id = 7;
185
186 /* Check for differential SCSI-bus */
187 esp->diff = 0;
188
189 esp_initialize(esp);
190
191 if (request_irq(esp->irq, esp_intr, SA_INTERRUPT,
192 "NCR 53C94 SCSI", NULL))
193 goto err_dealloc;
194 if (request_irq(SCSI_DMA_INT, scsi_dma_int, SA_INTERRUPT,
195 "JUNKIO SCSI DMA", NULL))
196 goto err_free_irq;
197
198 }
199
200 if (TURBOCHANNEL) {
201 while ((slot = search_tc_card("PMAZ-AA")) >= 0) {
202 claim_tc_card(slot);
203
204 esp_dev = 0;
205 esp = esp_allocate(tpnt, (void *) esp_dev);
206
207 mem_start = get_tc_base_addr(slot);
208
209 /* Store base addr into esp struct */
210 esp->slot = mem_start;
211
212 esp->dregs = 0;
213 esp->eregs = (struct ESP_regs *) (mem_start + DEC_SCSI_SREG);
214 esp->do_pio_cmds = 1;
215
216 /* Set the command buffer */
217 esp->esp_command = (volatile unsigned char *) pmaz_cmd_buffer;
218
219 /* get virtual dma address for command buffer */
220 esp->esp_command_dvma = (__u32) KSEG0ADDR((volatile unsigned char *) pmaz_cmd_buffer);
221
222 esp->cfreq = get_tc_speed();
223
224 esp->irq = get_tc_irq_nr(slot);
225
226 /* Required functions */
227 esp->dma_bytes_sent = &dma_bytes_sent;
228 esp->dma_can_transfer = &dma_can_transfer;
229 esp->dma_dump_state = &dma_dump_state;
230 esp->dma_init_read = &pmaz_dma_init_read;
231 esp->dma_init_write = &pmaz_dma_init_write;
232 esp->dma_ints_off = &pmaz_dma_ints_off;
233 esp->dma_ints_on = &pmaz_dma_ints_on;
234 esp->dma_irq_p = &dma_irq_p;
235 esp->dma_ports_p = &dma_ports_p;
236 esp->dma_setup = &pmaz_dma_setup;
237
238 /* Optional functions */
239 esp->dma_barrier = 0;
240 esp->dma_drain = &pmaz_dma_drain;
241 esp->dma_invalidate = 0;
242 esp->dma_irq_entry = 0;
243 esp->dma_irq_exit = 0;
244 esp->dma_poll = 0;
245 esp->dma_reset = 0;
246 esp->dma_led_off = 0;
247 esp->dma_led_on = 0;
248
249 esp->dma_mmu_get_scsi_one = pmaz_dma_mmu_get_scsi_one;
250 esp->dma_mmu_get_scsi_sgl = 0;
251 esp->dma_mmu_release_scsi_one = 0;
252 esp->dma_mmu_release_scsi_sgl = 0;
253 esp->dma_advance_sg = 0;
254
255 if (request_irq(esp->irq, esp_intr, SA_INTERRUPT,
256 "PMAZ_AA", NULL)) {
257 esp_deallocate(esp);
258 release_tc_card(slot);
259 continue;
260 }
261 esp->scsi_id = 7;
262 esp->diff = 0;
263 esp_initialize(esp);
264 }
265 }
266
267 if(nesps) {
268 printk("ESP: Total of %d ESP hosts found, %d actually in use.\n", nesps, esps_in_use);
269 esps_running = esps_in_use;
270 return esps_in_use;
271 }
272 return 0;
273
274 err_free_irq:
275 free_irq(esp->irq, esp_intr);
276 err_dealloc:
277 esp_deallocate(esp);
278 return 0;
279 }
280
281 /************************************************************* DMA Functions */
282 static void scsi_dma_int(int irq, void *dev_id, struct pt_regs *regs)
283 {
284 extern volatile unsigned int *isr;
285 unsigned int dummy;
286
287 if (*isr & SCSI_PTR_LOADED) {
288 /* next page */
289 *scsi_next_ptr = ((*scsi_dma_ptr + PAGE_SIZE) & PAGE_MASK) << 3;
290 *isr &= ~SCSI_PTR_LOADED;
291 } else {
292 if (*isr & SCSI_PAGOVRRUN)
293 *isr &= ~SCSI_PAGOVRRUN;
294 if (*isr & SCSI_DMA_MEMRDERR) {
295 printk("Got unexpected SCSI DMA Interrupt! < ");
296 printk("SCSI_DMA_MEMRDERR ");
297 printk(">\n");
298 *isr &= ~SCSI_DMA_MEMRDERR;
299 }
300 }
301
302 /*
303 * This routine will only work on IOASIC machines
304 * so we can avoid an indirect function call here
305 * and flush the writeback buffer the fast way
306 */
307 dummy = *isr;
308 dummy = *isr;
309 }
310
311 static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count)
312 {
313 return fifo_count;
314 }
315
316 static void dma_drain(struct NCR_ESP *esp)
317 {
318 unsigned long nw = *scsi_scr;
319 unsigned short *p = KSEG1ADDR((unsigned short *) ((*scsi_dma_ptr) >> 3));
320
321 /*
322 * Is there something in the dma buffers left?
323 */
324 if (nw) {
325 switch (nw) {
326 case 1:
327 *p = (unsigned short) *scsi_sdr0;
328 break;
329 case 2:
330 *p++ = (unsigned short) (*scsi_sdr0);
331 *p = (unsigned short) ((*scsi_sdr0) >> 16);
332 break;
333 case 3:
334 *p++ = (unsigned short) (*scsi_sdr0);
335 *p++ = (unsigned short) ((*scsi_sdr0) >> 16);
336 *p = (unsigned short) (*scsi_sdr1);
337 break;
338 default:
339 printk("Strange: %d words in dma buffer left\n", (int) nw);
340 break;
341 }
342 }
343 }
344
345 static int dma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd * sp)
346 {
347 return sp->SCp.this_residual;;
348 }
349
350 static void dma_dump_state(struct NCR_ESP *esp)
351 {
352 /*
353 ESPLOG(("esp%d: dma -- enable <%08x> residue <%08x\n",
354 esp->esp_id, vdma_get_enable((int)esp->dregs), vdma_get_resdiue((int)esp->dregs)));
355 */
356 }
357
358 static void dma_init_read(struct NCR_ESP *esp, __u32 vaddress, int length)
359 {
360 extern volatile unsigned int *isr;
361 unsigned int dummy;
362
363 if (vaddress & 3)
364 panic("dec_efs.c: unable to handle partial word transfers, yet...");
365
366 dma_cache_wback_inv((unsigned long) phys_to_virt(vaddress), length);
367
368 *ioasic_ssr &= ~SCSI_DMA_EN;
369 *scsi_scr = 0;
370 *scsi_dma_ptr = vaddress << 3;
371
372 /* prepare for next page */
373 *scsi_next_ptr = ((vaddress + PAGE_SIZE) & PAGE_MASK) << 3;
374 *ioasic_ssr |= (SCSI_DMA_DIR | SCSI_DMA_EN);
375
376 /*
377 * see above
378 */
379 dummy = *isr;
380 dummy = *isr;
381 }
382
383 static void dma_init_write(struct NCR_ESP *esp, __u32 vaddress, int length)
384 {
385 extern volatile unsigned int *isr;
386 unsigned int dummy;
387
388 if (vaddress & 3)
389 panic("dec_efs.c: unable to handle partial word transfers, yet...");
390
391 dma_cache_wback_inv((unsigned long) phys_to_virt(vaddress), length);
392
393 *ioasic_ssr &= ~(SCSI_DMA_DIR | SCSI_DMA_EN);
394 *scsi_scr = 0;
395 *scsi_dma_ptr = vaddress << 3;
396
397 /* prepare for next page */
398 *scsi_next_ptr = ((vaddress + PAGE_SIZE) & PAGE_MASK) << 3;
399 *ioasic_ssr |= SCSI_DMA_EN;
400
401 /*
402 * see above
403 */
404 dummy = *isr;
405 dummy = *isr;
406 }
407
408 static void dma_ints_off(struct NCR_ESP *esp)
409 {
410 disable_irq(SCSI_DMA_INT);
411 }
412
413 static void dma_ints_on(struct NCR_ESP *esp)
414 {
415 enable_irq(SCSI_DMA_INT);
416 }
417
418 static int dma_irq_p(struct NCR_ESP *esp)
419 {
420 return (esp->eregs->esp_status & ESP_STAT_INTR);
421 }
422
423 static int dma_ports_p(struct NCR_ESP *esp)
424 {
425 /*
426 * FIXME: what's this good for?
427 */
428 return 1;
429 }
430
431 static void dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write)
432 {
433 /*
434 * On the Sparc, DMA_ST_WRITE means "move data from device to memory"
435 * so when (write) is true, it actually means READ!
436 */
437 if (write) {
438 dma_init_read(esp, addr, count);
439 } else {
440 dma_init_write(esp, addr, count);
441 }
442 }
443
444 /*
445 * These aren't used yet
446 */
447 static void dma_mmu_get_scsi_one(struct NCR_ESP *esp, Scsi_Cmnd * sp)
448 {
449 sp->SCp.have_data_in = PHYSADDR(sp->SCp.buffer);
450 sp->SCp.ptr = (char *) ((unsigned long) sp->SCp.have_data_in);
451 }
452
453 static void dma_mmu_get_scsi_sgl(struct NCR_ESP *esp, Scsi_Cmnd * sp)
454 {
455 int sz = sp->SCp.buffers_residual;
456 struct mmu_sglist *sg = (struct mmu_sglist *) sp->SCp.buffer;
457
458 while (sz >= 0) {
459 sg[sz].dvma_addr = PHYSADDR(sg[sz].addr);
460 sz--;
461 }
462 sp->SCp.ptr = (char *) ((unsigned long) sp->SCp.buffer->dvma_address);
463 }
464
465 static void dma_advance_sg(Scsi_Cmnd * sp)
466 {
467 sp->SCp.ptr = (char *) ((unsigned long) sp->SCp.buffer->dvma_address);
468 }
469
470 static void pmaz_dma_drain(struct NCR_ESP *esp)
471 {
472 memcpy((void *) (KSEG0ADDR(esp_virt_buffer)),
473 (void *) ( esp->slot + DEC_SCSI_SRAM + ESP_TGT_DMA_SIZE),
474 scsi_current_length);
475 }
476
477 static void pmaz_dma_init_read(struct NCR_ESP *esp, __u32 vaddress, int length)
478 {
479 volatile int *dmareg = (volatile int *) (esp->slot + DEC_SCSI_DMAREG);
480
481 if (length > ESP_TGT_DMA_SIZE)
482 length = ESP_TGT_DMA_SIZE;
483
484 *dmareg = TC_ESP_DMA_ADDR(esp->slot + DEC_SCSI_SRAM + ESP_TGT_DMA_SIZE);
485
486 esp_virt_buffer = vaddress;
487 scsi_current_length = length;
488 }
489
490 static void pmaz_dma_init_write(struct NCR_ESP *esp, __u32 vaddress, int length)
491 {
492 volatile int *dmareg = (volatile int *) ( esp->slot + DEC_SCSI_DMAREG );
493
494 memcpy((void *) (esp->slot + DEC_SCSI_SRAM + ESP_TGT_DMA_SIZE),
495 KSEG0ADDR((void *) vaddress), length);
496
497 *dmareg = TC_ESP_DMAR_WRITE |
498 TC_ESP_DMA_ADDR(esp->slot + DEC_SCSI_SRAM + ESP_TGT_DMA_SIZE);
499
500 }
501
502 static void pmaz_dma_ints_off(struct NCR_ESP *esp)
503 {
504 }
505
506 static void pmaz_dma_ints_on(struct NCR_ESP *esp)
507 {
508 }
509
510 static void pmaz_dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write)
511 {
512 /*
513 * On the Sparc, DMA_ST_WRITE means "move data from device to memory"
514 * so when (write) is true, it actually means READ!
515 */
516 if (write) {
517 pmaz_dma_init_read(esp, addr, count);
518 } else {
519 pmaz_dma_init_write(esp, addr, count);
520 }
521 }
522
523 static void pmaz_dma_mmu_get_scsi_one(struct NCR_ESP *esp, Scsi_Cmnd * sp)
524 {
525 sp->SCp.have_data_in = (int) sp->SCp.ptr =
526 (char *) KSEG0ADDR((sp->request_buffer));
527 }
528
529