File: /usr/src/linux/drivers/scsi/gdth.c
1 /************************************************************************
2 * Linux driver for *
3 * ICP vortex GmbH: GDT ISA/EISA/PCI Disk Array Controllers *
4 * Intel Corporation: Storage RAID Controllers *
5 * *
6 * gdth.c *
7 * Copyright (C) 1995-01 ICP vortex, an Intel company, Achim Leubner *
8 * *
9 * <achim@vortex.de> *
10 * *
11 * This program is free software; you can redistribute it and/or modify *
12 * it under the terms of the GNU General Public License as published *
13 * by the Free Software Foundation; either version 2 of the License, *
14 * or (at your option) any later version. *
15 * *
16 * This program is distributed in the hope that it will be useful, *
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
19 * GNU General Public License for more details. *
20 * *
21 * You should have received a copy of the GNU General Public License *
22 * along with this kernel; if not, write to the Free Software *
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. *
24 * *
25 * Tested with Linux 1.2.13, ..., 2.2.19, ..., 2.4.7 *
26 * *
27 * $Log: gdth.c,v $
28 * Revision 1.57 2001/08/21 11:16:35 achim
29 * Bugfix free_irq()
30 *
31 * Revision 1.56 2001/08/09 11:19:39 achim
32 * Scsi_Host_Template changes
33 *
34 * Revision 1.55 2001/08/09 10:11:28 achim
35 * Command HOST_UNFREEZE_IO before cache service init.
36 *
37 * Revision 1.54 2001/07/20 13:48:12 achim
38 * Expand: gdth_analyse_hdrive() removed
39 *
40 * Revision 1.53 2001/07/17 09:52:49 achim
41 * Small OEM related change
42 *
43 * Revision 1.52 2001/06/19 15:06:20 achim
44 * New host command GDT_UNFREEZE_IO added
45 *
46 * Revision 1.51 2001/05/22 06:42:37 achim
47 * PCI: Subdevice ID added
48 *
49 * Revision 1.50 2001/05/17 13:42:16 achim
50 * Support for Intel Storage RAID Controllers added
51 *
52 * Revision 1.50 2001/05/17 12:12:34 achim
53 * Support for Intel Storage RAID Controllers added
54 *
55 * Revision 1.49 2001/03/15 15:07:17 achim
56 * New __setup interface for boot command line options added
57 *
58 * Revision 1.48 2001/02/06 12:36:28 achim
59 * Bugfix Cluster protocol
60 *
61 * Revision 1.47 2001/01/10 14:42:06 achim
62 * New switch shared_access added
63 *
64 * Revision 1.46 2001/01/09 08:11:35 achim
65 * gdth_command() removed
66 * meaning of Scsi_Pointer members changed
67 *
68 * Revision 1.45 2000/11/16 12:02:24 achim
69 * Changes for kernel 2.4
70 *
71 * Revision 1.44 2000/10/11 08:44:10 achim
72 * Clustering changes: New flag media_changed added
73 *
74 * Revision 1.43 2000/09/20 12:59:01 achim
75 * DPMEM remap functions for all PCI controller types implemented
76 * Small changes for ia64 platform
77 *
78 * Revision 1.42 2000/07/20 09:04:50 achim
79 * Small changes for kernel 2.4
80 *
81 * Revision 1.41 2000/07/04 14:11:11 achim
82 * gdth_analyse_hdrive() added to rescan drives after online expansion
83 *
84 * Revision 1.40 2000/06/27 11:24:16 achim
85 * Changes Clustering, Screenservice
86 *
87 * Revision 1.39 2000/06/15 13:09:04 achim
88 * Changes for gdth_do_cmd()
89 *
90 * Revision 1.38 2000/06/15 12:08:43 achim
91 * Bugfix gdth_sync_event(), service SCREENSERVICE
92 * Data direction for command 0xc2 changed to DOU
93 *
94 * Revision 1.37 2000/05/25 13:50:10 achim
95 * New driver parameter virt_ctr added
96 *
97 * Revision 1.36 2000/05/04 08:50:46 achim
98 * Event buffer now in gdth_ha_str
99 *
100 * Revision 1.35 2000/03/03 10:44:08 achim
101 * New event_string only valid for the RP controller family
102 *
103 * Revision 1.34 2000/03/02 14:55:29 achim
104 * New mechanism for async. event handling implemented
105 *
106 * Revision 1.33 2000/02/21 15:37:37 achim
107 * Bugfix Alpha platform + DPMEM above 4GB
108 *
109 * Revision 1.32 2000/02/14 16:17:37 achim
110 * Bugfix sense_buffer[] + raw devices
111 *
112 * Revision 1.31 2000/02/10 10:29:00 achim
113 * Delete sense_buffer[0], if command OK
114 *
115 * Revision 1.30 1999/11/02 13:42:39 achim
116 * ARRAY_DRV_LIST2 implemented
117 * Now 255 log. and 100 host drives supported
118 *
119 * Revision 1.29 1999/10/05 13:28:47 achim
120 * GDT_CLUST_RESET added
121 *
122 * Revision 1.28 1999/08/12 13:44:54 achim
123 * MOUNTALL removed
124 * Cluster drives -> removeable drives
125 *
126 * Revision 1.27 1999/06/22 07:22:38 achim
127 * Small changes
128 *
129 * Revision 1.26 1999/06/10 16:09:12 achim
130 * Cluster Host Drive support: Bugfixes
131 *
132 * Revision 1.25 1999/06/01 16:03:56 achim
133 * gdth_init_pci(): Manipulate config. space to start RP controller
134 *
135 * Revision 1.24 1999/05/26 11:53:06 achim
136 * Cluster Host Drive support added
137 *
138 * Revision 1.23 1999/03/26 09:12:31 achim
139 * Default value for hdr_channel set to 0
140 *
141 * Revision 1.22 1999/03/22 16:27:16 achim
142 * Bugfix: gdth_store_event() must not be locked with GDTH_LOCK_HA()
143 *
144 * Revision 1.21 1999/03/16 13:40:34 achim
145 * Problems with reserved drives solved
146 * gdth_eh_bus_reset() implemented
147 *
148 * Revision 1.20 1999/03/10 09:08:13 achim
149 * Bugfix: Corrections in gdth_direction_tab[] made
150 * Bugfix: Increase command timeout (gdth_update_timeout()) NOT in gdth_putq()
151 *
152 * Revision 1.19 1999/03/05 14:38:16 achim
153 * Bugfix: Heads/Sectors mapping for reserved devices possibly wrong
154 * -> gdth_eval_mapping() implemented, changes in gdth_bios_param()
155 * INIT_RETRIES set to 100s to avoid DEINIT-Timeout for controllers
156 * with BIOS disabled and memory test set to Intensive
157 * Enhanced /proc support
158 *
159 * Revision 1.18 1999/02/24 09:54:33 achim
160 * Command line parameter hdr_channel implemented
161 * Bugfix for EISA controllers + Linux 2.2.x
162 *
163 * Revision 1.17 1998/12/17 15:58:11 achim
164 * Command line parameters implemented
165 * Changes for Alpha platforms
166 * PCI controller scan changed
167 * SMP support improved (spin_lock_irqsave(),...)
168 * New async. events, new scan/reserve commands included
169 *
170 * Revision 1.16 1998/09/28 16:08:46 achim
171 * GDT_PCIMPR: DPMEM remapping, if required
172 * mdelay() added
173 *
174 * Revision 1.15 1998/06/03 14:54:06 achim
175 * gdth_delay(), gdth_flush() implemented
176 * Bugfix: gdth_release() changed
177 *
178 * Revision 1.14 1998/05/22 10:01:17 achim
179 * mj: pcibios_strerror() removed
180 * Improved SMP support (if version >= 2.1.95)
181 * gdth_halt(): halt_called flag added (if version < 2.1)
182 *
183 * Revision 1.13 1998/04/16 09:14:57 achim
184 * Reserve drives (for raw service) implemented
185 * New error handling code enabled
186 * Get controller name from board_info() IOCTL
187 * Final round of PCI device driver patches by Martin Mares
188 *
189 * Revision 1.12 1998/03/03 09:32:37 achim
190 * Fibre channel controller support added
191 *
192 * Revision 1.11 1998/01/27 16:19:14 achim
193 * SA_SHIRQ added
194 * add_timer()/del_timer() instead of GDTH_TIMER
195 * scsi_add_timer()/scsi_del_timer() instead of SCSI_TIMER
196 * New error handling included
197 *
198 * Revision 1.10 1997/10/31 12:29:57 achim
199 * Read heads/sectors from host drive
200 *
201 * Revision 1.9 1997/09/04 10:07:25 achim
202 * IO-mapping with virt_to_bus(), gdth_readb(), gdth_writeb(), ...
203 * register_reboot_notifier() to get a notify on shutdown used
204 *
205 * Revision 1.8 1997/04/02 12:14:30 achim
206 * Version 1.00 (see gdth.h), tested with kernel 2.0.29
207 *
208 * Revision 1.7 1997/03/12 13:33:37 achim
209 * gdth_reset() changed, new async. events
210 *
211 * Revision 1.6 1997/03/04 14:01:11 achim
212 * Shutdown routine gdth_halt() implemented
213 *
214 * Revision 1.5 1997/02/21 09:08:36 achim
215 * New controller included (RP, RP1, RP2 series)
216 * IOCTL interface implemented
217 *
218 * Revision 1.4 1996/07/05 12:48:55 achim
219 * Function gdth_bios_param() implemented
220 * New constant GDTH_MAXC_P_L inserted
221 * GDT_WRITE_THR, GDT_EXT_INFO implemented
222 * Function gdth_reset() changed
223 *
224 * Revision 1.3 1996/05/10 09:04:41 achim
225 * Small changes for Linux 1.2.13
226 *
227 * Revision 1.2 1996/05/09 12:45:27 achim
228 * Loadable module support implemented
229 * /proc support corrections made
230 *
231 * Revision 1.1 1996/04/11 07:35:57 achim
232 * Initial revision
233 *
234 ************************************************************************/
235 #ident "$Id: gdth.c,v 1.57 2001/08/21 11:16:35 achim Exp $"
236
237 /* All GDT Disk Array Controllers are fully supported by this driver.
238 * This includes the PCI/EISA/ISA SCSI Disk Array Controllers and the
239 * PCI Fibre Channel Disk Array Controllers. See gdth.h for a complete
240 * list of all controller types.
241 *
242 * If you have one or more GDT3000/3020 EISA controllers with
243 * controller BIOS disabled, you have to set the IRQ values with the
244 * command line option "gdth=irq1,irq2,...", where the irq1,irq2,... are
245 * the IRQ values for the EISA controllers.
246 *
247 * After the optional list of IRQ values, other possible
248 * command line options are:
249 * disable:Y disable driver
250 * disable:N enable driver
251 * reserve_mode:0 reserve no drives for the raw service
252 * reserve_mode:1 reserve all not init., removable drives
253 * reserve_mode:2 reserve all not init. drives
254 * reserve_list:h,b,t,l,h,b,t,l,... reserve particular drive(s) with
255 * h- controller no., b- channel no.,
256 * t- target ID, l- LUN
257 * reverse_scan:Y reverse scan order for PCI controllers
258 * reverse_scan:N scan PCI controllers like BIOS
259 * max_ids:x x - target ID count per channel (1..MAXID)
260 * rescan:Y rescan all channels/IDs
261 * rescan:N use all devices found until now
262 * virt_ctr:Y map every channel to a virtual controller
263 * virt_ctr:N use multi channel support
264 * hdr_channel:x x - number of virtual bus for host drives
265 * shared_access:Y disable driver reserve/release protocol to
266 * access a shared resource from several nodes,
267 * appropiate controller firmware required
268 * shared_access:N enable driver reserve/release protocol
269 *
270 * The default values are: "gdth=disable:N,reserve_mode:1,reverse_scan:N,
271 * max_ids:127,rescan:N,virt_ctr:N,hdr_channel:0,
272 * shared_access:N".
273 * Here is another example: "gdth=reserve_list:0,1,2,0,0,1,3,0,rescan:Y".
274 *
275 * When loading the gdth driver as a module, the same options are available.
276 * You can set the IRQs with "IRQ=...". However, the syntax to specify the
277 * options changes slightly. You must replace all ',' between options
278 * with ' ' and all ':' with '=' and you must use
279 * '1' in place of 'Y' and '0' in place of 'N'.
280 *
281 * Default: "modprobe gdth disable=0 reserve_mode=1 reverse_scan=0
282 * max_ids=127 rescan=0 virt_ctr=0 hdr_channel=0 shared_access=0"
283 * The other example: "modprobe gdth reserve_list=0,1,2,0,0,1,3,0 rescan=1".
284 */
285
286 /* The meaning of the Scsi_Pointer members in this driver is as follows:
287 * ptr: Chaining
288 * this_residual: Command priority
289 * buffer: Unused
290 * buffers_residual: Timeout value
291 * Status: Command status (gdth_do_cmd())
292 * Message: Additional info (gdth_do_cmd())
293 * have_data_in: Flag for gdth_wait_completion()
294 * sent_command: Opcode special command
295 * phase: Service/parameter/return code special command
296 */
297
298 #ifdef MODULE
299 #include <linux/module.h>
300 #endif
301
302 #include <linux/version.h>
303 #include <linux/kernel.h>
304 #include <linux/types.h>
305 #include <linux/pci.h>
306 #include <linux/string.h>
307 #include <linux/ctype.h>
308 #include <linux/ioport.h>
309 #include <linux/delay.h>
310 #include <linux/sched.h>
311 #include <linux/in.h>
312 #include <linux/proc_fs.h>
313 #include <linux/time.h>
314 #include <linux/timer.h>
315 #ifdef GDTH_RTC
316 #include <linux/mc146818rtc.h>
317 #endif
318 #if LINUX_VERSION_CODE >= 0x020100
319 #include <linux/reboot.h>
320 #else
321 #include <linux/bios32.h>
322 #endif
323
324 #include <asm/dma.h>
325 #include <asm/system.h>
326 #include <asm/io.h>
327 #if LINUX_VERSION_CODE >= 0x020322
328 #include <linux/spinlock.h>
329 #elif LINUX_VERSION_CODE >= 0x02015F
330 #include <asm/spinlock.h>
331 #endif
332
333 #if LINUX_VERSION_CODE >= 0x010300
334 #include <linux/blk.h>
335 #else
336 #include "../block/blk.h"
337 #endif
338 #include "scsi.h"
339 #include "hosts.h"
340 #include "sd.h"
341
342 #include "gdth.h"
343
344 static void gdth_delay(int milliseconds);
345 static void gdth_eval_mapping(ulong32 size, int *cyls, int *heads, int *secs);
346 #if LINUX_VERSION_CODE >= 0x010346
347 static void gdth_interrupt(int irq,void *dev_id,struct pt_regs *regs);
348 #else
349 static void gdth_interrupt(int irq,struct pt_regs *regs);
350 #endif
351 static int gdth_sync_event(int hanum,int service,unchar index,Scsi_Cmnd *scp);
352 static int gdth_async_event(int hanum);
353 static void gdth_log_event(gdth_evt_data *dvr, char *buffer);
354
355 static void gdth_putq(int hanum,Scsi_Cmnd *scp,unchar priority);
356 static void gdth_next(int hanum);
357 static int gdth_fill_raw_cmd(int hanum,Scsi_Cmnd *scp,unchar b);
358 static int gdth_special_cmd(int hanum,Scsi_Cmnd *scp);
359 static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, ushort source,
360 ushort idx, gdth_evt_data *evt);
361 static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr);
362 static void gdth_readapp_event(gdth_ha_str *ha, unchar application,
363 gdth_evt_str *estr);
364 static void gdth_clear_events(void);
365
366 static void gdth_copy_internal_data(Scsi_Cmnd *scp,char *buffer,ushort count);
367 static int gdth_internal_cache_cmd(int hanum,Scsi_Cmnd *scp);
368 static int gdth_fill_cache_cmd(int hanum,Scsi_Cmnd *scp,ushort hdrive);
369
370 static int gdth_search_eisa(ushort eisa_adr);
371 static int gdth_search_isa(ulong32 bios_adr);
372 static int gdth_search_pci(gdth_pci_str *pcistr);
373 static void gdth_search_dev(gdth_pci_str *pcistr, ushort *cnt,
374 ushort vendor, ushort dev);
375 static void gdth_sort_pci(gdth_pci_str *pcistr, int cnt);
376 static int gdth_init_eisa(ushort eisa_adr,gdth_ha_str *ha);
377 static int gdth_init_isa(ulong32 bios_adr,gdth_ha_str *ha);
378 static int gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha);
379
380 static void gdth_enable_int(int hanum);
381 static int gdth_get_status(unchar *pIStatus,int irq);
382 static int gdth_test_busy(int hanum);
383 static int gdth_get_cmd_index(int hanum);
384 static void gdth_release_event(int hanum);
385 static int gdth_wait(int hanum,int index,ulong32 time);
386 static int gdth_internal_cmd(int hanum,unchar service,ushort opcode,ulong32 p1,
387 ulong32 p2,ulong32 p3);
388 static int gdth_search_drives(int hanum);
389 static int gdth_analyse_hdrive(int hanum, ushort hdrive);
390
391 static void *gdth_mmap(ulong paddr, ulong size);
392 static void gdth_munmap(void *addr);
393
394 static const char *gdth_ctr_name(int hanum);
395
396 #if LINUX_VERSION_CODE >= 0x010300
397 static void gdth_flush(int hanum);
398 #if LINUX_VERSION_CODE >= 0x020100
399 static int gdth_halt(struct notifier_block *nb, ulong event, void *buf);
400 #else
401 static int halt_called = FALSE;
402 void gdth_halt(void);
403 #endif
404 #endif
405
406 #ifdef DEBUG_GDTH
407 static unchar DebugState = DEBUG_GDTH;
408
409 #ifdef __SERIAL__
410 #define MAX_SERBUF 160
411 static void ser_init(void);
412 static void ser_puts(char *str);
413 static void ser_putc(char c);
414 static int ser_printk(const char *fmt, ...);
415 static char strbuf[MAX_SERBUF+1];
416 #ifdef __COM2__
417 #define COM_BASE 0x2f8
418 #else
419 #define COM_BASE 0x3f8
420 #endif
421 static void ser_init()
422 {
423 unsigned port=COM_BASE;
424
425 outb(0x80,port+3);
426 outb(0,port+1);
427 /* 19200 Baud, if 9600: outb(12,port) */
428 outb(6, port);
429 outb(3,port+3);
430 outb(0,port+1);
431 /*
432 ser_putc('I');
433 ser_putc(' ');
434 */
435 }
436
437 static void ser_puts(char *str)
438 {
439 char *ptr;
440
441 ser_init();
442 for (ptr=str;*ptr;++ptr)
443 ser_putc(*ptr);
444 }
445
446 static void ser_putc(char c)
447 {
448 unsigned port=COM_BASE;
449
450 while ((inb(port+5) & 0x20)==0);
451 outb(c,port);
452 if (c==0x0a)
453 {
454 while ((inb(port+5) & 0x20)==0);
455 outb(0x0d,port);
456 }
457 }
458
459 static int ser_printk(const char *fmt, ...)
460 {
461 va_list args;
462 int i;
463
464 va_start(args,fmt);
465 i = vsprintf(strbuf,fmt,args);
466 ser_puts(strbuf);
467 va_end(args);
468 return i;
469 }
470
471 #define TRACE(a) {if (DebugState==1) {ser_printk a;}}
472 #define TRACE2(a) {if (DebugState==1 || DebugState==2) {ser_printk a;}}
473 #define TRACE3(a) {if (DebugState!=0) {ser_printk a;}}
474
475 #else /* !__SERIAL__ */
476 #define TRACE(a) {if (DebugState==1) {printk a;}}
477 #define TRACE2(a) {if (DebugState==1 || DebugState==2) {printk a;}}
478 #define TRACE3(a) {if (DebugState!=0) {printk a;}}
479 #endif
480
481 #else /* !DEBUG */
482 #define TRACE(a)
483 #define TRACE2(a)
484 #define TRACE3(a)
485 #endif
486
487 #ifdef GDTH_STATISTICS
488 static ulong32 max_rq=0, max_index=0, max_sg=0;
489 static ulong32 act_ints=0, act_ios=0, act_stats=0, act_rq=0;
490 static struct timer_list gdth_timer;
491 #endif
492
493 #define PTR2USHORT(a) (ushort)(ulong)(a)
494 #define GDTOFFSOF(a,b) (size_t)&(((a*)0)->b)
495 #define INDEX_OK(i,t) ((i)<sizeof(t)/sizeof((t)[0]))
496
497 #define NUMDATA(a) ( (gdth_num_str *)((a)->hostdata))
498 #define HADATA(a) (&((gdth_ext_str *)((a)->hostdata))->haext)
499 #define CMDDATA(a) (&((gdth_ext_str *)((a)->hostdata))->cmdext)
500
501 #define BUS_L2P(a,b) ((b)>(a)->virt_bus ? (b-1):(b))
502
503 #if LINUX_VERSION_CODE < 0x010300
504 static void *gdth_mmap(ulong paddr, ulong size)
505 {
506 if (paddr >= high_memory)
507 return NULL;
508 else
509 return (void *)paddr;
510 }
511 static void gdth_munmap(void *addr)
512 {
513 }
514 inline ulong32 virt_to_phys(volatile void *addr)
515 {
516 return (ulong32)addr;
517 }
518 inline void *phys_to_virt(ulong32 addr)
519 {
520 return (void *)addr;
521 }
522 #define virt_to_bus virt_to_phys
523 #define bus_to_virt phys_to_virt
524 #define gdth_readb(addr) (*(volatile unchar *)(addr))
525 #define gdth_readw(addr) (*(volatile ushort *)(addr))
526 #define gdth_readl(addr) (*(volatile ulong32 *)(addr))
527 #define gdth_writeb(b,addr) (*(volatile unchar *)(addr) = (b))
528 #define gdth_writew(b,addr) (*(volatile ushort *)(addr) = (b))
529 #define gdth_writel(b,addr) (*(volatile ulong32 *)(addr) = (b))
530 #define memset_io(a,b,c) memset((void *)(a),(b),(c))
531 #define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
532 #define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
533
534 #define PCI_SLOT(devfn) ((devfn >> 3) & 0x1f)
535
536 #elif LINUX_VERSION_CODE < 0x020100
537 static int remapped = FALSE;
538 static void *gdth_mmap(ulong paddr, ulong size)
539 {
540 if ( paddr >= high_memory) {
541 remapped = TRUE;
542 return vremap(paddr, size);
543 } else {
544 return (void *)paddr;
545 }
546 }
547 static void gdth_munmap(void *addr)
548 {
549 if (remapped)
550 vfree(addr);
551 remapped = FALSE;
552 }
553 #define gdth_readb(addr) readb((ulong)(addr))
554 #define gdth_readw(addr) readw((ulong)(addr))
555 #define gdth_readl(addr) (ulong32)readl((ulong)(addr))
556 #define gdth_writeb(b,addr) writeb((b),(ulong)(addr))
557 #define gdth_writew(b,addr) writew((b),(ulong)(addr))
558 #define gdth_writel(b,addr) writel((ulong32)(b),(ulong)(addr))
559
560 #else
561 static void *gdth_mmap(ulong paddr, ulong size)
562 {
563 return ioremap(paddr, size);
564 }
565 static void gdth_munmap(void *addr)
566 {
567 return iounmap(addr);
568 }
569 #define gdth_readb(addr) readb((ulong)(addr))
570 #define gdth_readw(addr) readw((ulong)(addr))
571 #define gdth_readl(addr) (ulong32)readl((ulong)(addr))
572 #define gdth_writeb(b,addr) writeb((b),(ulong)(addr))
573 #define gdth_writew(b,addr) writew((b),(ulong)(addr))
574 #define gdth_writel(b,addr) writel((ulong32)(b),(ulong)(addr))
575 #endif
576
577
578 static unchar gdth_drq_tab[4] = {5,6,7,7}; /* DRQ table */
579 static unchar gdth_irq_tab[6] = {0,10,11,12,14,0}; /* IRQ table */
580 static unchar gdth_polling; /* polling if TRUE */
581 static unchar gdth_from_wait = FALSE; /* gdth_wait() */
582 static int wait_index,wait_hanum; /* gdth_wait() */
583 static int gdth_ctr_count = 0; /* controller count */
584 static int gdth_ctr_vcount = 0; /* virt. ctr. count */
585 static int gdth_ctr_released = 0; /* gdth_release() */
586 static struct Scsi_Host *gdth_ctr_tab[MAXHA]; /* controller table */
587 static struct Scsi_Host *gdth_ctr_vtab[MAXHA*MAXBUS]; /* virt. ctr. table */
588 static unchar gdth_write_through = FALSE; /* write through */
589 static gdth_evt_str ebuffer[MAX_EVENTS]; /* event buffer */
590 static int elastidx;
591 static int eoldidx;
592
593 #define DIN 1 /* IN data direction */
594 #define DOU 2 /* OUT data direction */
595 #define DNO DIN /* no data transfer */
596 #define DUN DIN /* unknown data direction */
597 static unchar gdth_direction_tab[0x100] = {
598 DNO,DNO,DIN,DIN,DOU,DIN,DIN,DOU,DIN,DUN,DOU,DOU,DUN,DUN,DUN,DIN,
599 DNO,DIN,DIN,DOU,DIN,DOU,DNO,DNO,DOU,DNO,DIN,DNO,DIN,DOU,DNO,DUN,
600 DIN,DUN,DIN,DUN,DOU,DIN,DUN,DUN,DIN,DIN,DOU,DNO,DUN,DIN,DOU,DOU,
601 DOU,DOU,DOU,DNO,DIN,DNO,DNO,DIN,DOU,DOU,DOU,DOU,DIN,DOU,DIN,DOU,
602 DOU,DOU,DIN,DIN,DIN,DNO,DUN,DNO,DNO,DNO,DUN,DNO,DOU,DIN,DUN,DUN,
603 DUN,DUN,DUN,DUN,DUN,DOU,DUN,DUN,DUN,DUN,DIN,DUN,DUN,DUN,DUN,DUN,
604 DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
605 DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
606 DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
607 DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
608 DUN,DUN,DUN,DUN,DUN,DNO,DNO,DUN,DIN,DNO,DOU,DUN,DNO,DUN,DOU,DOU,
609 DOU,DOU,DOU,DNO,DUN,DIN,DOU,DIN,DIN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
610 DUN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
611 DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
612 DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,
613 DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN
614 };
615
616 /* __initfunc, __initdata macros */
617 #if LINUX_VERSION_CODE >= 0x020322
618 #define GDTH_INITFUNC(type, func) type __init func
619 #include <linux/init.h>
620 #elif LINUX_VERSION_CODE >= 0x020126
621 #define GDTH_INITFUNC(type, func) __initfunc(type func)
622 #include <linux/init.h>
623 #else
624 #define GDTH_INITFUNC(type, func) type func
625 #define __initdata
626 #define __init
627 #endif
628
629 #if LINUX_VERSION_CODE >= 0x02015F
630 #define GDTH_INIT_LOCK_HA(ha) spin_lock_init(&(ha)->smp_lock)
631 #define GDTH_LOCK_HA(ha,flags) spin_lock_irqsave(&(ha)->smp_lock,flags)
632 #define GDTH_UNLOCK_HA(ha,flags) spin_unlock_irqrestore(&(ha)->smp_lock,flags)
633
634 #define GDTH_LOCK_SCSI_DONE(flags) spin_lock_irqsave(&io_request_lock,flags)
635 #define GDTH_UNLOCK_SCSI_DONE(flags) spin_unlock_irqrestore(&io_request_lock,flags)
636 #define GDTH_LOCK_SCSI_DOCMD() spin_lock_irq(&io_request_lock)
637 #define GDTH_UNLOCK_SCSI_DOCMD() spin_unlock_irq(&io_request_lock)
638 #else
639 #define GDTH_INIT_LOCK_HA(ha) do {} while (0)
640 #define GDTH_LOCK_HA(ha,flags) do {save_flags(flags); cli();} while (0)
641 #define GDTH_UNLOCK_HA(ha,flags) do {restore_flags(flags);} while (0)
642
643 #define GDTH_LOCK_SCSI_DONE(flags) do {} while (0)
644 #define GDTH_UNLOCK_SCSI_DONE(flags) do {} while (0)
645 #define GDTH_LOCK_SCSI_DOCMD() do {} while (0)
646 #define GDTH_UNLOCK_SCSI_DOCMD() do {} while (0)
647 #endif
648
649 /* LILO and modprobe/insmod parameters */
650 /* IRQ list for GDT3000/3020 EISA controllers */
651 static int irq[MAXHA] __initdata =
652 {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
653 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
654 /* disable driver flag */
655 static int disable __initdata = 0;
656 /* reserve flag */
657 static int reserve_mode = 1;
658 /* reserve list */
659 static int reserve_list[MAX_RES_ARGS] =
660 {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
661 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
662 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
663 /* scan order for PCI controllers */
664 static int reverse_scan = 0;
665 /* virtual channel for the host drives */
666 static int hdr_channel = 0;
667 /* max. IDs per channel */
668 static int max_ids = MAXID;
669 /* rescan all IDs */
670 static int rescan = 0;
671 /* map channels to virtual controllers */
672 static int virt_ctr = 0;
673 /* shared access */
674 static int shared_access = 0;
675
676 #ifdef MODULE
677 #if LINUX_VERSION_CODE >= 0x02011A
678 /* parameters for modprobe/insmod */
679 MODULE_PARM(irq, "i");
680 MODULE_PARM(disable, "i");
681 MODULE_PARM(reserve_mode, "i");
682 MODULE_PARM(reserve_list, "4-" __MODULE_STRING(MAX_RES_ARGS) "i");
683 MODULE_PARM(reverse_scan, "i");
684 MODULE_PARM(hdr_channel, "i");
685 MODULE_PARM(max_ids, "i");
686 MODULE_PARM(rescan, "i");
687 MODULE_PARM(virt_ctr, "i");
688 MODULE_PARM(shared_access, "i");
689 MODULE_AUTHOR("Achim Leubner");
690 #endif
691 #endif
692
693 /* /proc support */
694 #if LINUX_VERSION_CODE >= 0x010300
695 #include <linux/stat.h>
696 #if LINUX_VERSION_CODE < 0x020322
697 struct proc_dir_entry proc_scsi_gdth = {
698 PROC_SCSI_GDTH, 4, "gdth",
699 S_IFDIR | S_IRUGO | S_IXUGO, 2
700 };
701 #endif
702 #include "gdth_proc.h"
703 #include "gdth_proc.c"
704 #endif
705
706 #if LINUX_VERSION_CODE >= 0x020100
707 /* notifier block to get a notify on system shutdown/halt/reboot */
708 static struct notifier_block gdth_notifier = {
709 gdth_halt, NULL, 0
710 };
711 #endif
712
713
714 static void gdth_delay(int milliseconds)
715 {
716 if (milliseconds == 0) {
717 udelay(1);
718 } else {
719 #if LINUX_VERSION_CODE >= 0x020168
720 mdelay(milliseconds);
721 #else
722 int i;
723 for (i = 0; i < milliseconds; ++i)
724 udelay(1000);
725 #endif
726 }
727 }
728
729 static void gdth_eval_mapping(ulong32 size, int *cyls, int *heads, int *secs)
730 {
731 *cyls = size /HEADS/SECS;
732 if (*cyls <= MAXCYLS) {
733 *heads = HEADS;
734 *secs = SECS;
735 } else { /* too high for 64*32 */
736 *cyls = size /MEDHEADS/MEDSECS;
737 if (*cyls <= MAXCYLS) {
738 *heads = MEDHEADS;
739 *secs = MEDSECS;
740 } else { /* too high for 127*63 */
741 *cyls = size /BIGHEADS/BIGSECS;
742 *heads = BIGHEADS;
743 *secs = BIGSECS;
744 }
745 }
746 }
747
748 /* controller search and initialization functions */
749
750 GDTH_INITFUNC(static int, gdth_search_eisa(ushort eisa_adr))
751 {
752 ulong32 id;
753
754 TRACE(("gdth_search_eisa() adr. %x\n",eisa_adr));
755 id = inl(eisa_adr+ID0REG);
756 if (id == GDT3A_ID || id == GDT3B_ID) { /* GDT3000A or GDT3000B */
757 if ((inb(eisa_adr+EISAREG) & 8) == 0)
758 return 0; /* not EISA configured */
759 return 1;
760 }
761 if (id == GDT3_ID) /* GDT3000 */
762 return 1;
763
764 return 0;
765 }
766
767
768 GDTH_INITFUNC(static int, gdth_search_isa(ulong32 bios_adr))
769 {
770 void *addr;
771 ulong32 id;
772
773 TRACE(("gdth_search_isa() bios adr. %x\n",bios_adr));
774 if ((addr = gdth_mmap(bios_adr+BIOS_ID_OFFS, sizeof(ulong32))) != NULL) {
775 id = gdth_readl(addr);
776 gdth_munmap(addr);
777 if (id == GDT2_ID) /* GDT2000 */
778 return 1;
779 }
780 return 0;
781 }
782
783
784 GDTH_INITFUNC(static int, gdth_search_pci(gdth_pci_str *pcistr))
785 {
786 ushort device, cnt;
787
788 TRACE(("gdth_search_pci()\n"));
789
790 cnt = 0;
791 for (device = 0; device <= PCI_DEVICE_ID_VORTEX_GDT6555; ++device)
792 gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX, device);
793 for (device = PCI_DEVICE_ID_VORTEX_GDT6x17RP;
794 device <= PCI_DEVICE_ID_VORTEX_GDTMAXRP; ++device)
795 gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX, device);
796 gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX,
797 PCI_DEVICE_ID_VORTEX_GDTNEWRX);
798 gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_INTEL,
799 PCI_DEVICE_ID_INTEL_SRC);
800 return cnt;
801 }
802
803
804 GDTH_INITFUNC(static void, gdth_search_dev(gdth_pci_str *pcistr, ushort *cnt,
805 ushort vendor, ushort device))
806 {
807 ulong base0, base1, base2;
808 #if LINUX_VERSION_CODE >= 0x2015C
809 struct pci_dev *pdev;
810 #else
811 int error;
812 ushort idx;
813 #endif
814
815 TRACE(("gdth_search_dev() cnt %d vendor %x device %x\n",
816 *cnt, vendor, device));
817
818 #if LINUX_VERSION_CODE >= 0x20363
819 pdev = NULL;
820 while ((pdev = pci_find_device(vendor, device, pdev))
821 != NULL) {
822 if (pci_enable_device(pdev))
823 continue;
824 if (*cnt >= MAXHA)
825 return;
826 /* GDT PCI controller found, resources are already in pdev */
827 pcistr[*cnt].pdev = pdev;
828 pcistr[*cnt].vendor_id = vendor;
829 pcistr[*cnt].device_id = device;
830 pcistr[*cnt].subdevice_id = pdev->subsystem_device;
831 pcistr[*cnt].bus = pdev->bus->number;
832 pcistr[*cnt].device_fn = pdev->devfn;
833 pcistr[*cnt].irq = pdev->irq;
834 base0 = pci_resource_flags(pdev, 0);
835 base1 = pci_resource_flags(pdev, 1);
836 base2 = pci_resource_flags(pdev, 2);
837 if (device <= PCI_DEVICE_ID_VORTEX_GDT6000B || /* GDT6000/B */
838 device >= PCI_DEVICE_ID_VORTEX_GDT6x17RP) { /* MPR */
839 if (!(base0 & IORESOURCE_MEM))
840 continue;
841 pcistr[*cnt].dpmem = pci_resource_start(pdev, 0);
842 } else { /* GDT6110, GDT6120, .. */
843 if (!(base0 & IORESOURCE_MEM) ||
844 !(base2 & IORESOURCE_MEM) ||
845 !(base1 & IORESOURCE_IO))
846 continue;
847 pcistr[*cnt].dpmem = pci_resource_start(pdev, 2);
848 pcistr[*cnt].io_mm = pci_resource_start(pdev, 0);
849 pcistr[*cnt].io = pci_resource_start(pdev, 1);
850 }
851 TRACE2(("Controller found at %d/%d, irq %d, dpmem 0x%lx\n",
852 pcistr[*cnt].bus, PCI_SLOT(pcistr[*cnt].device_fn),
853 pcistr[*cnt].irq, pcistr[*cnt].dpmem));
854 (*cnt)++;
855 }
856 #elif LINUX_VERSION_CODE >= 0x2015C
857 pdev = NULL;
858 while ((pdev = pci_find_device(vendor, device, pdev))
859 != NULL) {
860 if (*cnt >= MAXHA)
861 return;
862 /* GDT PCI controller found, resources are already in pdev */
863 pcistr[*cnt].pdev = pdev;
864 pcistr[*cnt].vendor_id = vendor;
865 pcistr[*cnt].device_id = device;
866 pcistr[*cnt].bus = pdev->bus->number;
867 pcistr[*cnt].device_fn = pdev->devfn;
868 pcibios_read_config_word(pcistr[*cnt].bus, pcistr[*cnt].device_fn,
869 PCI_SUBSYSTEM_ID, &pcistr[*cnt].subdevice_id);
870 pcistr[*cnt].irq = pdev->irq;
871 base0 = pdev->base_address[0];
872 base1 = pdev->base_address[1];
873 base2 = pdev->base_address[2];
874 if (device <= PCI_DEVICE_ID_VORTEX_GDT6000B || /* GDT6000/B */
875 device >= PCI_DEVICE_ID_VORTEX_GDT6x17RP) { /* MPR */
876 if ((base0 & PCI_BASE_ADDRESS_SPACE) !=
877 PCI_BASE_ADDRESS_SPACE_MEMORY)
878 continue;
879 pcistr[*cnt].dpmem = base0 & PCI_BASE_ADDRESS_MEM_MASK;
880 } else { /* GDT6110, GDT6120, .. */
881 if ((base0 & PCI_BASE_ADDRESS_SPACE) !=
882 PCI_BASE_ADDRESS_SPACE_MEMORY ||
883 (base2 & PCI_BASE_ADDRESS_SPACE) !=
884 PCI_BASE_ADDRESS_SPACE_MEMORY ||
885 (base1 & PCI_BASE_ADDRESS_SPACE) !=
886 PCI_BASE_ADDRESS_SPACE_IO)
887 continue;
888 pcistr[*cnt].dpmem = base2 & PCI_BASE_ADDRESS_MEM_MASK;
889 pcistr[*cnt].io_mm = base0 & PCI_BASE_ADDRESS_MEM_MASK;
890 pcistr[*cnt].io = base1 & PCI_BASE_ADDRESS_IO_MASK;
891 }
892 TRACE2(("Controller found at %d/%d, irq %d, dpmem 0x%lx\n",
893 pcistr[*cnt].bus, PCI_SLOT(pcistr[*cnt].device_fn),
894 pcistr[*cnt].irq, pcistr[*cnt].dpmem));
895 (*cnt)++;
896 }
897 #else
898 idx = 0;
899 while (!pcibios_find_device(vendor, device, idx++,
900 &pcistr[*cnt].bus,&pcistr[*cnt].device_fn)) {
901 if (*cnt >= MAXHA)
902 return;
903 /* GDT PCI ctr. found, now read resources from config space */
904 #if LINUX_VERSION_CODE >= 0x010300
905 #define GDTH_BASEP (int *)
906 #else
907 #define GDTH_BASEP
908 #endif
909 if ((error = pcibios_read_config_dword(pcistr[*cnt].bus,
910 pcistr[*cnt].device_fn,
911 PCI_BASE_ADDRESS_0,
912 GDTH_BASEP&base0)) ||
913 (error = pcibios_read_config_dword(pcistr[*cnt].bus,
914 pcistr[*cnt].device_fn,
915 PCI_BASE_ADDRESS_1,
916 GDTH_BASEP&base1)) ||
917 (error = pcibios_read_config_dword(pcistr[*cnt].bus,
918 pcistr[*cnt].device_fn,
919 PCI_BASE_ADDRESS_2,
920 GDTH_BASEP&base2)) ||
921 (error = pcibios_read_config_word(pcistr[*cnt].bus,
922 pcistr[*cnt].device_fn,
923 PCI_SUBSYSTEM_ID,
924 &pcistr[*cnt].subdevice_id)) ||
925 (error = pcibios_read_config_byte(pcistr[*cnt].bus,
926 pcistr[*cnt].device_fn,
927 PCI_INTERRUPT_LINE,
928 &pcistr[*cnt].irq))) {
929 printk("GDT-PCI: error %d reading configuration space", error);
930 continue;
931 }
932 pcistr[*cnt].vendor_id = vendor;
933 pcistr[*cnt].device_id = device;
934 if (device <= PCI_DEVICE_ID_VORTEX_GDT6000B || /* GDT6000/B */
935 device >= PCI_DEVICE_ID_VORTEX_GDT6x17RP) { /* MPR */
936 if ((base0 & PCI_BASE_ADDRESS_SPACE) !=
937 PCI_BASE_ADDRESS_SPACE_MEMORY)
938 continue;
939 pcistr[*cnt].dpmem = base0 & PCI_BASE_ADDRESS_MEM_MASK;
940 } else { /* GDT6110, GDT6120, .. */
941 if ((base0 & PCI_BASE_ADDRESS_SPACE) !=
942 PCI_BASE_ADDRESS_SPACE_MEMORY ||
943 (base2 & PCI_BASE_ADDRESS_SPACE) !=
944 PCI_BASE_ADDRESS_SPACE_MEMORY ||
945 (base1 & PCI_BASE_ADDRESS_SPACE) !=
946 PCI_BASE_ADDRESS_SPACE_IO)
947 continue;
948 pcistr[*cnt].dpmem = base2 & PCI_BASE_ADDRESS_MEM_MASK;
949 pcistr[*cnt].io_mm = base0 & PCI_BASE_ADDRESS_MEM_MASK;
950 pcistr[*cnt].io = base1 & PCI_BASE_ADDRESS_IO_MASK;
951 }
952 TRACE2(("Controller found at %d/%d, irq %d, dpmem 0x%lx\n",
953 pcistr[*cnt].bus, PCI_SLOT(pcistr[*cnt].device_fn),
954 pcistr[*cnt].irq, pcistr[*cnt].dpmem));
955 (*cnt)++;
956 }
957 #endif
958 }
959
960
961 GDTH_INITFUNC(static void, gdth_sort_pci(gdth_pci_str *pcistr, int cnt))
962 {
963 gdth_pci_str temp;
964 int i, changed;
965
966 TRACE(("gdth_sort_pci() cnt %d\n",cnt));
967 if (cnt == 0)
968 return;
969
970 do {
971 changed = FALSE;
972 for (i = 0; i < cnt-1; ++i) {
973 if (!reverse_scan) {
974 if ((pcistr[i].bus > pcistr[i+1].bus) ||
975 (pcistr[i].bus == pcistr[i+1].bus &&
976 PCI_SLOT(pcistr[i].device_fn) >
977 PCI_SLOT(pcistr[i+1].device_fn))) {
978 temp = pcistr[i];
979 pcistr[i] = pcistr[i+1];
980 pcistr[i+1] = temp;
981 changed = TRUE;
982 }
983 } else {
984 if ((pcistr[i].bus < pcistr[i+1].bus) ||
985 (pcistr[i].bus == pcistr[i+1].bus &&
986 PCI_SLOT(pcistr[i].device_fn) <
987 PCI_SLOT(pcistr[i+1].device_fn))) {
988 temp = pcistr[i];
989 pcistr[i] = pcistr[i+1];
990 pcistr[i+1] = temp;
991 changed = TRUE;
992 }
993 }
994 }
995 } while (changed);
996 }
997
998
999 GDTH_INITFUNC(static int, gdth_init_eisa(ushort eisa_adr,gdth_ha_str *ha))
1000 {
1001 ulong32 retries,id;
1002 unchar prot_ver,eisacf,i,irq_found;
1003
1004 TRACE(("gdth_init_eisa() adr. %x\n",eisa_adr));
1005
1006 /* disable board interrupts, deinitialize services */
1007 outb(0xff,eisa_adr+EDOORREG);
1008 outb(0x00,eisa_adr+EDENABREG);
1009 outb(0x00,eisa_adr+EINTENABREG);
1010
1011 outb(0xff,eisa_adr+LDOORREG);
1012 retries = INIT_RETRIES;
1013 gdth_delay(20);
1014 while (inb(eisa_adr+EDOORREG) != 0xff) {
1015 if (--retries == 0) {
1016 printk("GDT-EISA: Initialization error (DEINIT failed)\n");
1017 return 0;
1018 }
1019 gdth_delay(1);
1020 TRACE2(("wait for DEINIT: retries=%d\n",retries));
1021 }
1022 prot_ver = inb(eisa_adr+MAILBOXREG);
1023 outb(0xff,eisa_adr+EDOORREG);
1024 if (prot_ver != PROTOCOL_VERSION) {
1025 printk("GDT-EISA: Illegal protocol version\n");
1026 return 0;
1027 }
1028 ha->bmic = eisa_adr;
1029 ha->brd_phys = (ulong32)eisa_adr >> 12;
1030
1031 outl(0,eisa_adr+MAILBOXREG);
1032 outl(0,eisa_adr+MAILBOXREG+4);
1033 outl(0,eisa_adr+MAILBOXREG+8);
1034 outl(0,eisa_adr+MAILBOXREG+12);
1035
1036 /* detect IRQ */
1037 if ((id = inl(eisa_adr+ID0REG)) == GDT3_ID) {
1038 ha->oem_id = OEM_ID_ICP;
1039 ha->type = GDT_EISA;
1040 ha->stype = id;
1041 outl(1,eisa_adr+MAILBOXREG+8);
1042 outb(0xfe,eisa_adr+LDOORREG);
1043 retries = INIT_RETRIES;
1044 gdth_delay(20);
1045 while (inb(eisa_adr+EDOORREG) != 0xfe) {
1046 if (--retries == 0) {
1047 printk("GDT-EISA: Initialization error (get IRQ failed)\n");
1048 return 0;
1049 }
1050 gdth_delay(1);
1051 }
1052 ha->irq = inb(eisa_adr+MAILBOXREG);
1053 outb(0xff,eisa_adr+EDOORREG);
1054 TRACE2(("GDT3000/3020: IRQ=%d\n",ha->irq));
1055 /* check the result */
1056 if (ha->irq == 0) {
1057 TRACE2(("Unknown IRQ, use IRQ table from cmd line !\n"));
1058 for (i = 0, irq_found = FALSE;
1059 i < MAXHA && irq[i] != 0xff; ++i) {
1060 if (irq[i]==10 || irq[i]==11 || irq[i]==12 || irq[i]==14) {
1061 irq_found = TRUE;
1062 break;
1063 }
1064 }
1065 if (irq_found) {
1066 ha->irq = irq[i];
1067 irq[i] = 0;
1068 printk("GDT-EISA: Can not detect controller IRQ,\n");
1069 printk("Use IRQ setting from command line (IRQ = %d)\n",
1070 ha->irq);
1071 } else {
1072 printk("GDT-EISA: Initialization error (unknown IRQ), Enable\n");
1073 printk("the controller BIOS or use command line parameters\n");
1074 return 0;
1075 }
1076 }
1077 } else {
1078 eisacf = inb(eisa_adr+EISAREG) & 7;
1079 if (eisacf > 4) /* level triggered */
1080 eisacf -= 4;
1081 ha->irq = gdth_irq_tab[eisacf];
1082 ha->oem_id = OEM_ID_ICP;
1083 ha->type = GDT_EISA;
1084 ha->stype = id;
1085 }
1086 return 1;
1087 }
1088
1089
1090 GDTH_INITFUNC(static int, gdth_init_isa(ulong32 bios_adr,gdth_ha_str *ha))
1091 {
1092 register gdt2_dpram_str *dp2_ptr;
1093 int i;
1094 unchar irq_drq,prot_ver;
1095 ulong32 retries;
1096
1097 TRACE(("gdth_init_isa() bios adr. %x\n",bios_adr));
1098
1099 ha->brd = gdth_mmap(bios_adr, sizeof(gdt2_dpram_str));
1100 if (ha->brd == NULL) {
1101 printk("GDT-ISA: Initialization error (DPMEM remap error)\n");
1102 return 0;
1103 }
1104 dp2_ptr = (gdt2_dpram_str *)ha->brd;
1105 gdth_writeb(1, &dp2_ptr->io.memlock); /* switch off write protection */
1106 /* reset interface area */
1107 memset_io((char *)&dp2_ptr->u,0,sizeof(dp2_ptr->u));
1108 if (gdth_readl(&dp2_ptr->u) != 0) {
1109 printk("GDT-PCI: Initialization error (DPMEM write error)\n");
1110 gdth_munmap(ha->brd);
1111 return 0;
1112 }
1113
1114 /* disable board interrupts, read DRQ and IRQ */
1115 gdth_writeb(0xff, &dp2_ptr->io.irqdel);
1116 gdth_writeb(0x00, &dp2_ptr->io.irqen);
1117 gdth_writeb(0x00, &dp2_ptr->u.ic.S_Status);
1118 gdth_writeb(0x00, &dp2_ptr->u.ic.Cmd_Index);
1119
1120 irq_drq = gdth_readb(&dp2_ptr->io.rq);
1121 for (i=0; i<3; ++i) {
1122 if ((irq_drq & 1)==0)
1123 break;
1124 irq_drq >>= 1;
1125 }
1126 ha->drq = gdth_drq_tab[i];
1127
1128 irq_drq = gdth_readb(&dp2_ptr->io.rq) >> 3;
1129 for (i=1; i<5; ++i) {
1130 if ((irq_drq & 1)==0)
1131 break;
1132 irq_drq >>= 1;
1133 }
1134 ha->irq = gdth_irq_tab[i];
1135
1136 /* deinitialize services */
1137 gdth_writel(bios_adr, &dp2_ptr->u.ic.S_Info[0]);
1138 gdth_writeb(0xff, &dp2_ptr->u.ic.S_Cmd_Indx);
1139 gdth_writeb(0, &dp2_ptr->io.event);
1140 retries = INIT_RETRIES;
1141 gdth_delay(20);
1142 while (gdth_readb(&dp2_ptr->u.ic.S_Status) != 0xff) {
1143 if (--retries == 0) {
1144 printk("GDT-ISA: Initialization error (DEINIT failed)\n");
1145 gdth_munmap(ha->brd);
1146 return 0;
1147 }
1148 gdth_delay(1);
1149 }
1150 prot_ver = (unchar)gdth_readl(&dp2_ptr->u.ic.S_Info[0]);
1151 gdth_writeb(0, &dp2_ptr->u.ic.Status);
1152 gdth_writeb(0xff, &dp2_ptr->io.irqdel);
1153 if (prot_ver != PROTOCOL_VERSION) {
1154 printk("GDT-ISA: Illegal protocol version\n");
1155 gdth_munmap(ha->brd);
1156 return 0;
1157 }
1158
1159 ha->oem_id = OEM_ID_ICP;
1160 ha->type = GDT_ISA;
1161 ha->ic_all_size = sizeof(dp2_ptr->u);
1162 ha->stype= GDT2_ID;
1163 ha->brd_phys = bios_adr >> 4;
1164
1165 /* special request to controller BIOS */
1166 gdth_writel(0x00, &dp2_ptr->u.ic.S_Info[0]);
1167 gdth_writel(0x00, &dp2_ptr->u.ic.S_Info[1]);
1168 gdth_writel(0x01, &dp2_ptr->u.ic.S_Info[2]);
1169 gdth_writel(0x00, &dp2_ptr->u.ic.S_Info[3]);
1170 gdth_writeb(0xfe, &dp2_ptr->u.ic.S_Cmd_Indx);
1171 gdth_writeb(0, &dp2_ptr->io.event);
1172 retries = INIT_RETRIES;
1173 gdth_delay(20);
1174 while (gdth_readb(&dp2_ptr->u.ic.S_Status) != 0xfe) {
1175 if (--retries == 0) {
1176 printk("GDT-ISA: Initialization error\n");
1177 gdth_munmap(ha->brd);
1178 return 0;
1179 }
1180 gdth_delay(1);
1181 }
1182 gdth_writeb(0, &dp2_ptr->u.ic.Status);
1183 gdth_writeb(0xff, &dp2_ptr->io.irqdel);
1184 return 1;
1185 }
1186
1187
1188 GDTH_INITFUNC(static int, gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha))
1189 {
1190 register gdt6_dpram_str *dp6_ptr;
1191 register gdt6c_dpram_str *dp6c_ptr;
1192 register gdt6m_dpram_str *dp6m_ptr;
1193 ulong32 retries;
1194 unchar prot_ver;
1195 ushort command;
1196 int i, found = FALSE;
1197 #if LINUX_VERSION_CODE < 0x2015C
1198 int rom_addr;
1199 #endif
1200
1201 TRACE(("gdth_init_pci()\n"));
1202
1203 if (pcistr->vendor_id == PCI_VENDOR_ID_INTEL)
1204 ha->oem_id = OEM_ID_INTEL;
1205 else
1206 ha->oem_id = OEM_ID_ICP;
1207 ha->brd_phys = (pcistr->bus << 8) | (pcistr->device_fn & 0xf8);
1208 ha->stype = (ulong32)pcistr->device_id;
1209 ha->subdevice_id = pcistr->subdevice_id;
1210 ha->irq = pcistr->irq;
1211
1212 if (ha->stype <= PCI_DEVICE_ID_VORTEX_GDT6000B) { /* GDT6000/B */
1213 TRACE2(("init_pci() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq));
1214 ha->brd = gdth_mmap(pcistr->dpmem, sizeof(gdt6_dpram_str));
1215 if (ha->brd == NULL) {
1216 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1217 return 0;
1218 }
1219 /* check and reset interface area */
1220 dp6_ptr = (gdt6_dpram_str *)ha->brd;
1221 gdth_writel(DPMEM_MAGIC, &dp6_ptr->u);
1222 if (gdth_readl(&dp6_ptr->u) != DPMEM_MAGIC) {
1223 printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
1224 pcistr->dpmem);
1225 found = FALSE;
1226 for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
1227 gdth_munmap(ha->brd);
1228 ha->brd = gdth_mmap(i, sizeof(ushort));
1229 if (ha->brd == NULL) {
1230 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1231 return 0;
1232 }
1233 if (gdth_readw(ha->brd) != 0xffff) {
1234 TRACE2(("init_pci_old() address 0x%x busy\n", i));
1235 continue;
1236 }
1237 gdth_munmap(ha->brd);
1238 #if LINUX_VERSION_CODE >= 0x2015C
1239 pci_write_config_dword(pcistr->pdev,
1240 PCI_BASE_ADDRESS_0, i);
1241 #else
1242 pcibios_write_config_dword(pcistr->bus, pcistr->device_fn,
1243 PCI_BASE_ADDRESS_0, i);
1244 #endif
1245 ha->brd = gdth_mmap(i, sizeof(gdt6_dpram_str));
1246 if (ha->brd == NULL) {
1247 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1248 return 0;
1249 }
1250 dp6_ptr = (gdt6_dpram_str *)ha->brd;
1251 gdth_writel(DPMEM_MAGIC, &dp6_ptr->u);
1252 if (gdth_readl(&dp6_ptr->u) == DPMEM_MAGIC) {
1253 printk("GDT-PCI: Use free address at 0x%x\n", i);
1254 found = TRUE;
1255 break;
1256 }
1257 }
1258 if (!found) {
1259 printk("GDT-PCI: No free address found!\n");
1260 gdth_munmap(ha->brd);
1261 return 0;
1262 }
1263 }
1264 memset_io((char *)&dp6_ptr->u,0,sizeof(dp6_ptr->u));
1265 if (gdth_readl(&dp6_ptr->u) != 0) {
1266 printk("GDT-PCI: Initialization error (DPMEM write error)\n");
1267 gdth_munmap(ha->brd);
1268 return 0;
1269 }
1270
1271 /* disable board interrupts, deinit services */
1272 gdth_writeb(0xff, &dp6_ptr->io.irqdel);
1273 gdth_writeb(0x00, &dp6_ptr->io.irqen);;
1274 gdth_writeb(0x00, &dp6_ptr->u.ic.S_Status);
1275 gdth_writeb(0x00, &dp6_ptr->u.ic.Cmd_Index);
1276
1277 gdth_writel(pcistr->dpmem, &dp6_ptr->u.ic.S_Info[0]);
1278 gdth_writeb(0xff, &dp6_ptr->u.ic.S_Cmd_Indx);
1279 gdth_writeb(0, &dp6_ptr->io.event);
1280 retries = INIT_RETRIES;
1281 gdth_delay(20);
1282 while (gdth_readb(&dp6_ptr->u.ic.S_Status) != 0xff) {
1283 if (--retries == 0) {
1284 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1285 gdth_munmap(ha->brd);
1286 return 0;
1287 }
1288 gdth_delay(1);
1289 }
1290 prot_ver = (unchar)gdth_readl(&dp6_ptr->u.ic.S_Info[0]);
1291 gdth_writeb(0, &dp6_ptr->u.ic.S_Status);
1292 gdth_writeb(0xff, &dp6_ptr->io.irqdel);
1293 if (prot_ver != PROTOCOL_VERSION) {
1294 printk("GDT-PCI: Illegal protocol version\n");
1295 gdth_munmap(ha->brd);
1296 return 0;
1297 }
1298
1299 ha->type = GDT_PCI;
1300 ha->ic_all_size = sizeof(dp6_ptr->u);
1301
1302 /* special command to controller BIOS */
1303 gdth_writel(0x00, &dp6_ptr->u.ic.S_Info[0]);
1304 gdth_writel(0x00, &dp6_ptr->u.ic.S_Info[1]);
1305 gdth_writel(0x01, &dp6_ptr->u.ic.S_Info[2]);
1306 gdth_writel(0x00, &dp6_ptr->u.ic.S_Info[3]);
1307 gdth_writeb(0xfe, &dp6_ptr->u.ic.S_Cmd_Indx);
1308 gdth_writeb(0, &dp6_ptr->io.event);
1309 retries = INIT_RETRIES;
1310 gdth_delay(20);
1311 while (gdth_readb(&dp6_ptr->u.ic.S_Status) != 0xfe) {
1312 if (--retries == 0) {
1313 printk("GDT-PCI: Initialization error\n");
1314 gdth_munmap(ha->brd);
1315 return 0;
1316 }
1317 gdth_delay(1);
1318 }
1319 gdth_writeb(0, &dp6_ptr->u.ic.S_Status);
1320 gdth_writeb(0xff, &dp6_ptr->io.irqdel);
1321
1322 } else if (ha->stype <= PCI_DEVICE_ID_VORTEX_GDT6555) { /* GDT6110, ... */
1323 ha->plx = (gdt6c_plx_regs *)pcistr->io;
1324 TRACE2(("init_pci_new() dpmem %lx irq %d\n",
1325 pcistr->dpmem,ha->irq));
1326 ha->brd = gdth_mmap(pcistr->dpmem, sizeof(gdt6c_dpram_str));
1327 if (ha->brd == NULL) {
1328 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1329 gdth_munmap(ha->brd);
1330 return 0;
1331 }
1332 /* check and reset interface area */
1333 dp6c_ptr = (gdt6c_dpram_str *)ha->brd;
1334 gdth_writel(DPMEM_MAGIC, &dp6c_ptr->u);
1335 if (gdth_readl(&dp6c_ptr->u) != DPMEM_MAGIC) {
1336 printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
1337 pcistr->dpmem);
1338 found = FALSE;
1339 for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
1340 gdth_munmap(ha->brd);
1341 ha->brd = gdth_mmap(i, sizeof(ushort));
1342 if (ha->brd == NULL) {
1343 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1344 return 0;
1345 }
1346 if (gdth_readw(ha->brd) != 0xffff) {
1347 TRACE2(("init_pci_plx() address 0x%x busy\n", i));
1348 continue;
1349 }
1350 gdth_munmap(ha->brd);
1351 #if LINUX_VERSION_CODE >= 0x2015C
1352 pci_write_config_dword(pcistr->pdev,
1353 PCI_BASE_ADDRESS_2, i);
1354 #else
1355 pcibios_write_config_dword(pcistr->bus, pcistr->device_fn,
1356 PCI_BASE_ADDRESS_2, i);
1357 #endif
1358 ha->brd = gdth_mmap(i, sizeof(gdt6c_dpram_str));
1359 if (ha->brd == NULL) {
1360 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1361 return 0;
1362 }
1363 dp6c_ptr = (gdt6c_dpram_str *)ha->brd;
1364 gdth_writel(DPMEM_MAGIC, &dp6c_ptr->u);
1365 if (gdth_readl(&dp6c_ptr->u) == DPMEM_MAGIC) {
1366 printk("GDT-PCI: Use free address at 0x%x\n", i);
1367 found = TRUE;
1368 break;
1369 }
1370 }
1371 if (!found) {
1372 printk("GDT-PCI: No free address found!\n");
1373 gdth_munmap(ha->brd);
1374 return 0;
1375 }
1376 }
1377 memset_io((char *)&dp6c_ptr->u,0,sizeof(dp6c_ptr->u));
1378 if (gdth_readl(&dp6c_ptr->u) != 0) {
1379 printk("GDT-PCI: Initialization error (DPMEM write error)\n");
1380 gdth_munmap(ha->brd);
1381 return 0;
1382 }
1383
1384 /* disable board interrupts, deinit services */
1385 outb(0x00,PTR2USHORT(&ha->plx->control1));
1386 outb(0xff,PTR2USHORT(&ha->plx->edoor_reg));
1387
1388 gdth_writeb(0x00, &dp6c_ptr->u.ic.S_Status);
1389 gdth_writeb(0x00, &dp6c_ptr->u.ic.Cmd_Index);
1390
1391 gdth_writel(pcistr->dpmem, &dp6c_ptr->u.ic.S_Info[0]);
1392 gdth_writeb(0xff, &dp6c_ptr->u.ic.S_Cmd_Indx);
1393
1394 outb(1,PTR2USHORT(&ha->plx->ldoor_reg));
1395
1396 retries = INIT_RETRIES;
1397 gdth_delay(20);
1398 while (gdth_readb(&dp6c_ptr->u.ic.S_Status) != 0xff) {
1399 if (--retries == 0) {
1400 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1401 gdth_munmap(ha->brd);
1402 return 0;
1403 }
1404 gdth_delay(1);
1405 }
1406 prot_ver = (unchar)gdth_readl(&dp6c_ptr->u.ic.S_Info[0]);
1407 gdth_writeb(0, &dp6c_ptr->u.ic.Status);
1408 if (prot_ver != PROTOCOL_VERSION) {
1409 printk("GDT-PCI: Illegal protocol version\n");
1410 gdth_munmap(ha->brd);
1411 return 0;
1412 }
1413
1414 ha->type = GDT_PCINEW;
1415 ha->ic_all_size = sizeof(dp6c_ptr->u);
1416
1417 /* special command to controller BIOS */
1418 gdth_writel(0x00, &dp6c_ptr->u.ic.S_Info[0]);
1419 gdth_writel(0x00, &dp6c_ptr->u.ic.S_Info[1]);
1420 gdth_writel(0x01, &dp6c_ptr->u.ic.S_Info[2]);
1421 gdth_writel(0x00, &dp6c_ptr->u.ic.S_Info[3]);
1422 gdth_writeb(0xfe, &dp6c_ptr->u.ic.S_Cmd_Indx);
1423
1424 outb(1,PTR2USHORT(&ha->plx->ldoor_reg));
1425
1426 retries = INIT_RETRIES;
1427 gdth_delay(20);
1428 while (gdth_readb(&dp6c_ptr->u.ic.S_Status) != 0xfe) {
1429 if (--retries == 0) {
1430 printk("GDT-PCI: Initialization error\n");
1431 gdth_munmap(ha->brd);
1432 return 0;
1433 }
1434 gdth_delay(1);
1435 }
1436 gdth_writeb(0, &dp6c_ptr->u.ic.S_Status);
1437
1438 } else { /* MPR */
1439 TRACE2(("init_pci_mpr() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq));
1440 ha->brd = gdth_mmap(pcistr->dpmem, sizeof(gdt6m_dpram_str));
1441 if (ha->brd == NULL) {
1442 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1443 return 0;
1444 }
1445
1446 /* manipulate config. space to enable DPMEM, start RP controller */
1447 #if LINUX_VERSION_CODE >= 0x20363
1448 pci_read_config_word(pcistr->pdev, PCI_COMMAND, &command);
1449 command |= 6;
1450 pci_write_config_word(pcistr->pdev, PCI_COMMAND, command);
1451 if (pci_resource_start(pcistr->pdev, 8) == 1UL)
1452 pci_resource_start(pcistr->pdev, 8) = 0UL;
1453 i = 0xFEFF0001UL;
1454 pci_write_config_dword(pcistr->pdev, PCI_ROM_ADDRESS, i);
1455 gdth_delay(1);
1456 pci_write_config_dword(pcistr->pdev, PCI_ROM_ADDRESS,
1457 pci_resource_start(pcistr->pdev, 8));
1458 #elif LINUX_VERSION_CODE >= 0x2015C
1459 pci_read_config_word(pcistr->pdev, PCI_COMMAND, &command);
1460 command |= 6;
1461 pci_write_config_word(pcistr->pdev, PCI_COMMAND, command);
1462 if (pcistr->pdev->rom_address == 1UL)
1463 pcistr->pdev->rom_address = 0UL;
1464 i = 0xFEFF0001UL;
1465 pci_write_config_dword(pcistr->pdev, PCI_ROM_ADDRESS, i);
1466 gdth_delay(1);
1467 pci_write_config_dword(pcistr->pdev, PCI_ROM_ADDRESS,
1468 pcistr->pdev->rom_address);
1469 #else
1470 pcibios_read_config_word(pcistr->bus, pcistr->device_fn,
1471 PCI_COMMAND, &command);
1472 command |= 6;
1473 pcibios_write_config_word(pcistr->bus, pcistr->device_fn,
1474 PCI_COMMAND, command);
1475 pcibios_read_config_dword(pcistr->bus, pcistr->device_fn,
1476 PCI_ROM_ADDRESS, &rom_addr);
1477 if (rom_addr == 1UL)
1478 rom_addr = 0UL;
1479 i = 0xFEFF0001UL;
1480 pcibios_write_config_dword(pcistr->bus, pcistr->device_fn,
1481 PCI_ROM_ADDRESS, i);
1482 gdth_delay(1);
1483 pcibios_write_config_dword(pcistr->bus, pcistr->device_fn,
1484 PCI_ROM_ADDRESS, rom_addr);
1485 #endif
1486
1487 /* check and reset interface area */
1488 dp6m_ptr = (gdt6m_dpram_str *)ha->brd;
1489 gdth_writel(DPMEM_MAGIC, &dp6m_ptr->u);
1490 if (gdth_readl(&dp6m_ptr->u) != DPMEM_MAGIC) {
1491 printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
1492 pcistr->dpmem);
1493 found = FALSE;
1494 for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
1495 gdth_munmap(ha->brd);
1496 ha->brd = gdth_mmap(i, sizeof(ushort));
1497 if (ha->brd == NULL) {
1498 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1499 return 0;
1500 }
1501 if (gdth_readw(ha->brd) != 0xffff) {
1502 TRACE2(("init_pci_mpr() address 0x%x busy\n", i));
1503 continue;
1504 }
1505 gdth_munmap(ha->brd);
1506 #if LINUX_VERSION_CODE >= 0x2015C
1507 pci_write_config_dword(pcistr->pdev,
1508 PCI_BASE_ADDRESS_0, i);
1509 #else
1510 pcibios_write_config_dword(pcistr->bus, pcistr->device_fn,
1511 PCI_BASE_ADDRESS_0, i);
1512 #endif
1513 ha->brd = gdth_mmap(i, sizeof(gdt6m_dpram_str));
1514 if (ha->brd == NULL) {
1515 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1516 return 0;
1517 }
1518 dp6m_ptr = (gdt6m_dpram_str *)ha->brd;
1519 gdth_writel(DPMEM_MAGIC, &dp6m_ptr->u);
1520 if (gdth_readl(&dp6m_ptr->u) == DPMEM_MAGIC) {
1521 printk("GDT-PCI: Use free address at 0x%x\n", i);
1522 found = TRUE;
1523 break;
1524 }
1525 }
1526 if (!found) {
1527 printk("GDT-PCI: No free address found!\n");
1528 gdth_munmap(ha->brd);
1529 return 0;
1530 }
1531 }
1532 memset_io((char *)&dp6m_ptr->u,0,sizeof(dp6m_ptr->u));
1533
1534 /* disable board interrupts, deinit services */
1535 gdth_writeb(gdth_readb(&dp6m_ptr->i960r.edoor_en_reg) | 4,
1536 &dp6m_ptr->i960r.edoor_en_reg);
1537 gdth_writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
1538 gdth_writeb(0x00, &dp6m_ptr->u.ic.S_Status);
1539 gdth_writeb(0x00, &dp6m_ptr->u.ic.Cmd_Index);
1540
1541 gdth_writel(pcistr->dpmem, &dp6m_ptr->u.ic.S_Info[0]);
1542 gdth_writeb(0xff, &dp6m_ptr->u.ic.S_Cmd_Indx);
1543 gdth_writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1544 retries = INIT_RETRIES;
1545 gdth_delay(20);
1546 while (gdth_readb(&dp6m_ptr->u.ic.S_Status) != 0xff) {
1547 if (--retries == 0) {
1548 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1549 gdth_munmap(ha->brd);
1550 return 0;
1551 }
1552 gdth_delay(1);
1553 }
1554 prot_ver = (unchar)gdth_readl(&dp6m_ptr->u.ic.S_Info[0]);
1555 gdth_writeb(0, &dp6m_ptr->u.ic.S_Status);
1556 if (prot_ver != PROTOCOL_VERSION) {
1557 printk("GDT-PCI: Illegal protocol version\n");
1558 gdth_munmap(ha->brd);
1559 return 0;
1560 }
1561
1562 ha->type = GDT_PCIMPR;
1563 ha->ic_all_size = sizeof(dp6m_ptr->u);
1564
1565 /* special command to controller BIOS */
1566 gdth_writel(0x00, &dp6m_ptr->u.ic.S_Info[0]);
1567 gdth_writel(0x00, &dp6m_ptr->u.ic.S_Info[1]);
1568 gdth_writel(0x01, &dp6m_ptr->u.ic.S_Info[2]);
1569 gdth_writel(0x00, &dp6m_ptr->u.ic.S_Info[3]);
1570 gdth_writeb(0xfe, &dp6m_ptr->u.ic.S_Cmd_Indx);
1571 gdth_writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1572 retries = INIT_RETRIES;
1573 gdth_delay(20);
1574 while (gdth_readb(&dp6m_ptr->u.ic.S_Status) != 0xfe) {
1575 if (--retries == 0) {
1576 printk("GDT-PCI: Initialization error\n");
1577 gdth_munmap(ha->brd);
1578 return 0;
1579 }
1580 gdth_delay(1);
1581 }
1582 gdth_writeb(0, &dp6m_ptr->u.ic.S_Status);
1583 }
1584
1585 return 1;
1586 }
1587
1588
1589 /* controller protocol functions */
1590
1591 GDTH_INITFUNC(static void, gdth_enable_int(int hanum))
1592 {
1593 gdth_ha_str *ha;
1594 ulong flags;
1595 gdt2_dpram_str *dp2_ptr;
1596 gdt6_dpram_str *dp6_ptr;
1597 gdt6m_dpram_str *dp6m_ptr;
1598
1599 TRACE(("gdth_enable_int() hanum %d\n",hanum));
1600 ha = HADATA(gdth_ctr_tab[hanum]);
1601 GDTH_LOCK_HA(ha, flags);
1602
1603 if (ha->type == GDT_EISA) {
1604 outb(0xff, ha->bmic + EDOORREG);
1605 outb(0xff, ha->bmic + EDENABREG);
1606 outb(0x01, ha->bmic + EINTENABREG);
1607 } else if (ha->type == GDT_ISA) {
1608 dp2_ptr = (gdt2_dpram_str *)ha->brd;
1609 gdth_writeb(1, &dp2_ptr->io.irqdel);
1610 gdth_writeb(0, &dp2_ptr->u.ic.Cmd_Index);
1611 gdth_writeb(1, &dp2_ptr->io.irqen);
1612 } else if (ha->type == GDT_PCI) {
1613 dp6_ptr = (gdt6_dpram_str *)ha->brd;
1614 gdth_writeb(1, &dp6_ptr->io.irqdel);
1615 gdth_writeb(0, &dp6_ptr->u.ic.Cmd_Index);
1616 gdth_writeb(1, &dp6_ptr->io.irqen);
1617 } else if (ha->type == GDT_PCINEW) {
1618 outb(0xff, PTR2USHORT(&ha->plx->edoor_reg));
1619 outb(0x03, PTR2USHORT(&ha->plx->control1));
1620 } else if (ha->type == GDT_PCIMPR) {
1621 dp6m_ptr = (gdt6m_dpram_str *)ha->brd;
1622 gdth_writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
1623 gdth_writeb(gdth_readb(&dp6m_ptr->i960r.edoor_en_reg) & ~4,
1624 &dp6m_ptr->i960r.edoor_en_reg);
1625 }
1626 GDTH_UNLOCK_HA(ha, flags);
1627 }
1628
1629
1630 static int gdth_get_status(unchar *pIStatus,int irq)
1631 {
1632 register gdth_ha_str *ha;
1633 int i;
1634
1635 TRACE(("gdth_get_status() irq %d ctr_count %d\n",
1636 irq,gdth_ctr_count));
1637
1638 *pIStatus = 0;
1639 for (i=0; i<gdth_ctr_count; ++i) {
1640 ha = HADATA(gdth_ctr_tab[i]);
1641 if (ha->irq != (unchar)irq) /* check IRQ */
1642 continue;
1643 if (ha->type == GDT_EISA)
1644 *pIStatus = inb((ushort)ha->bmic + EDOORREG);
1645 else if (ha->type == GDT_ISA)
1646 *pIStatus =
1647 gdth_readb(&((gdt2_dpram_str *)ha->brd)->u.ic.Cmd_Index);
1648 else if (ha->type == GDT_PCI)
1649 *pIStatus =
1650 gdth_readb(&((gdt6_dpram_str *)ha->brd)->u.ic.Cmd_Index);
1651 else if (ha->type == GDT_PCINEW)
1652 *pIStatus = inb(PTR2USHORT(&ha->plx->edoor_reg));
1653 else if (ha->type == GDT_PCIMPR)
1654 *pIStatus =
1655 gdth_readb(&((gdt6m_dpram_str *)ha->brd)->i960r.edoor_reg);
1656
1657 if (*pIStatus)
1658 return i; /* board found */
1659 }
1660 return -1;
1661 }
1662
1663
1664 static int gdth_test_busy(int hanum)
1665 {
1666 register gdth_ha_str *ha;
1667 register int gdtsema0 = 0;
1668
1669 TRACE(("gdth_test_busy() hanum %d\n",hanum));
1670
1671 ha = HADATA(gdth_ctr_tab[hanum]);
1672 if (ha->type == GDT_EISA)
1673 gdtsema0 = (int)inb(ha->bmic + SEMA0REG);
1674 else if (ha->type == GDT_ISA)
1675 gdtsema0 = (int)gdth_readb(&((gdt2_dpram_str *)ha->brd)->u.ic.Sema0);
1676 else if (ha->type == GDT_PCI)
1677 gdtsema0 = (int)gdth_readb(&((gdt6_dpram_str *)ha->brd)->u.ic.Sema0);
1678 else if (ha->type == GDT_PCINEW)
1679 gdtsema0 = (int)inb(PTR2USHORT(&ha->plx->sema0_reg));
1680 else if (ha->type == GDT_PCIMPR)
1681 gdtsema0 =
1682 (int)gdth_readb(&((gdt6m_dpram_str *)ha->brd)->i960r.sema0_reg);
1683
1684 return (gdtsema0 & 1);
1685 }
1686
1687
1688 static int gdth_get_cmd_index(int hanum)
1689 {
1690 register gdth_ha_str *ha;
1691 int i;
1692
1693 TRACE(("gdth_get_cmd_index() hanum %d\n",hanum));
1694
1695 ha = HADATA(gdth_ctr_tab[hanum]);
1696 for (i=0; i<GDTH_MAXCMDS; ++i) {
1697 if (ha->cmd_tab[i].cmnd == UNUSED_CMND) {
1698 ha->cmd_tab[i].cmnd = ha->pccb->RequestBuffer;
1699 ha->cmd_tab[i].service = ha->pccb->Service;
1700 ha->pccb->CommandIndex = (ulong32)i+2;
1701 return (i+2);
1702 }
1703 }
1704 return 0;
1705 }
1706
1707
1708 static void gdth_set_sema0(int hanum)
1709 {
1710 register gdth_ha_str *ha;
1711
1712 TRACE(("gdth_set_sema0() hanum %d\n",hanum));
1713
1714 ha = HADATA(gdth_ctr_tab[hanum]);
1715 if (ha->type == GDT_EISA) {
1716 outb(1, ha->bmic + SEMA0REG);
1717 } else if (ha->type == GDT_ISA) {
1718 gdth_writeb(1, &((gdt2_dpram_str *)ha->brd)->u.ic.Sema0);
1719 } else if (ha->type == GDT_PCI) {
1720 gdth_writeb(1, &((gdt6_dpram_str *)ha->brd)->u.ic.Sema0);
1721 } else if (ha->type == GDT_PCINEW) {
1722 outb(1, PTR2USHORT(&ha->plx->sema0_reg));
1723 } else if (ha->type == GDT_PCIMPR) {
1724 gdth_writeb(1, &((gdt6m_dpram_str *)ha->brd)->i960r.sema0_reg);
1725 }
1726 }
1727
1728
1729 static void gdth_copy_command(int hanum)
1730 {
1731 register gdth_ha_str *ha;
1732 register gdth_cmd_str *cmd_ptr;
1733 register gdt6m_dpram_str *dp6m_ptr;
1734 register gdt6c_dpram_str *dp6c_ptr;
1735 gdt6_dpram_str *dp6_ptr;
1736 gdt2_dpram_str *dp2_ptr;
1737 ushort cp_count,dp_offset,cmd_no;
1738
1739 TRACE(("gdth_copy_command() hanum %d\n",hanum));
1740
1741 ha = HADATA(gdth_ctr_tab[hanum]);
1742 cp_count = ha->cmd_len;
1743 dp_offset= ha->cmd_offs_dpmem;
1744 cmd_no = ha->cmd_cnt;
1745 cmd_ptr = ha->pccb;
1746
1747 ++ha->cmd_cnt;
1748 if (ha->type == GDT_EISA)
1749 return; /* no DPMEM, no copy */
1750
1751 /* set cpcount dword aligned */
1752 if (cp_count & 3)
1753 cp_count += (4 - (cp_count & 3));
1754
1755 ha->cmd_offs_dpmem += cp_count;
1756
1757 /* set offset and service, copy command to DPMEM */
1758 if (ha->type == GDT_ISA) {
1759 dp2_ptr = (gdt2_dpram_str *)ha->brd;
1760 gdth_writew(dp_offset + DPMEM_COMMAND_OFFSET,
1761 &dp2_ptr->u.ic.comm_queue[cmd_no].offset);
1762 gdth_writew((ushort)cmd_ptr->Service,
1763 &dp2_ptr->u.ic.comm_queue[cmd_no].serv_id);
1764 memcpy_toio(&dp2_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1765 } else if (ha->type == GDT_PCI) {
1766 dp6_ptr = (gdt6_dpram_str *)ha->brd;
1767 gdth_writew(dp_offset + DPMEM_COMMAND_OFFSET,
1768 &dp6_ptr->u.ic.comm_queue[cmd_no].offset);
1769 gdth_writew((ushort)cmd_ptr->Service,
1770 &dp6_ptr->u.ic.comm_queue[cmd_no].serv_id);
1771 memcpy_toio(&dp6_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1772 } else if (ha->type == GDT_PCINEW) {
1773 dp6c_ptr = (gdt6c_dpram_str *)ha->brd;
1774 gdth_writew(dp_offset + DPMEM_COMMAND_OFFSET,
1775 &dp6c_ptr->u.ic.comm_queue[cmd_no].offset);
1776 gdth_writew((ushort)cmd_ptr->Service,
1777 &dp6c_ptr->u.ic.comm_queue[cmd_no].serv_id);
1778 memcpy_toio(&dp6c_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1779 } else if (ha->type == GDT_PCIMPR) {
1780 dp6m_ptr = (gdt6m_dpram_str *)ha->brd;
1781 gdth_writew(dp_offset + DPMEM_COMMAND_OFFSET,
1782 &dp6m_ptr->u.ic.comm_queue[cmd_no].offset);
1783 gdth_writew((ushort)cmd_ptr->Service,
1784 &dp6m_ptr->u.ic.comm_queue[cmd_no].serv_id);
1785 memcpy_toio(&dp6m_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1786 }
1787 }
1788
1789
1790 static void gdth_release_event(int hanum)
1791 {
1792 register gdth_ha_str *ha;
1793
1794 TRACE(("gdth_release_event() hanum %d\n",hanum));
1795 ha = HADATA(gdth_ctr_tab[hanum]);
1796
1797 #ifdef GDTH_STATISTICS
1798 {
1799 ulong32 i,j;
1800 for (i=0,j=0; j<GDTH_MAXCMDS; ++j) {
1801 if (ha->cmd_tab[j].cmnd != UNUSED_CMND)
1802 ++i;
1803 }
1804 if (max_index < i) {
1805 max_index = i;
1806 TRACE3(("GDT: max_index = %d\n",(ushort)i));
1807 }
1808 }
1809 #endif
1810
1811 if (ha->pccb->OpCode == GDT_INIT)
1812 ha->pccb->Service |= 0x80;
1813
1814 if (ha->type == GDT_EISA) {
1815 if (ha->pccb->OpCode == GDT_INIT) /* store DMA buffer */
1816 outl(virt_to_bus(ha->pccb), ha->bmic + MAILBOXREG);
1817 outb(ha->pccb->Service, ha->bmic + LDOORREG);
1818 } else if (ha->type == GDT_ISA) {
1819 gdth_writeb(0, &((gdt2_dpram_str *)ha->brd)->io.event);
1820 } else if (ha->type == GDT_PCI) {
1821 gdth_writeb(0, &((gdt6_dpram_str *)ha->brd)->io.event);
1822 } else if (ha->type == GDT_PCINEW) {
1823 outb(1, PTR2USHORT(&ha->plx->ldoor_reg));
1824 } else if (ha->type == GDT_PCIMPR) {
1825 gdth_writeb(1, &((gdt6m_dpram_str *)ha->brd)->i960r.ldoor_reg);
1826 }
1827 }
1828
1829
1830 static int gdth_wait(int hanum,int index,ulong32 time)
1831 {
1832 gdth_ha_str *ha;
1833 int answer_found = FALSE;
1834
1835 TRACE(("gdth_wait() hanum %d index %d time %d\n",hanum,index,time));
1836
1837 ha = HADATA(gdth_ctr_tab[hanum]);
1838 if (index == 0)
1839 return 1; /* no wait required */
1840
1841 gdth_from_wait = TRUE;
1842 do {
1843 #if LINUX_VERSION_CODE >= 0x010346
1844 gdth_interrupt((int)ha->irq,ha,NULL);
1845 #else
1846 gdth_interrupt((int)ha->irq,NULL);
1847 #endif
1848 if (wait_hanum==hanum && wait_index==index) {
1849 answer_found = TRUE;
1850 break;
1851 }
1852 gdth_delay(1);
1853 } while (--time);
1854 gdth_from_wait = FALSE;
1855
1856 while (gdth_test_busy(hanum))
1857 gdth_delay(0);
1858
1859 return (answer_found);
1860 }
1861
1862
1863 static int gdth_internal_cmd(int hanum,unchar service,ushort opcode,ulong32 p1,
1864 ulong32 p2,ulong32 p3)
1865 {
1866 register gdth_ha_str *ha;
1867 register gdth_cmd_str *cmd_ptr;
1868 int retries,index;
1869
1870 TRACE2(("gdth_internal_cmd() service %d opcode %d\n",service,opcode));
1871
1872 ha = HADATA(gdth_ctr_tab[hanum]);
1873 cmd_ptr = ha->pccb;
1874 memset((char*)cmd_ptr,0,sizeof(gdth_cmd_str));
1875
1876 /* make command */
1877 for (retries = INIT_RETRIES;;) {
1878 cmd_ptr->Service = service;
1879 cmd_ptr->RequestBuffer = INTERNAL_CMND;
1880 if (!(index=gdth_get_cmd_index(hanum))) {
1881 TRACE(("GDT: No free command index found\n"));
1882 return 0;
1883 }
1884 gdth_set_sema0(hanum);
1885 cmd_ptr->OpCode = opcode;
1886 cmd_ptr->BoardNode = LOCALBOARD;
1887 if (service == CACHESERVICE) {
1888 if (opcode == GDT_IOCTL) {
1889 cmd_ptr->u.ioctl.subfunc = p1;
1890 cmd_ptr->u.ioctl.channel = p2;
1891 cmd_ptr->u.ioctl.param_size = (ushort)p3;
1892 cmd_ptr->u.ioctl.p_param = virt_to_bus(ha->pscratch);
1893 } else {
1894 cmd_ptr->u.cache.DeviceNo = (ushort)p1;
1895 cmd_ptr->u.cache.BlockNo = p2;
1896 }
1897 } else if (service == SCSIRAWSERVICE) {
1898 cmd_ptr->u.raw.direction = p1;
1899 cmd_ptr->u.raw.bus = (unchar)p2;
1900 cmd_ptr->u.raw.target = (unchar)p3;
1901 cmd_ptr->u.raw.lun = (unchar)(p3 >> 8);
1902 } else if (service == SCREENSERVICE) {
1903 if (opcode == GDT_REALTIME) {
1904 *(ulong32 *)&cmd_ptr->u.screen.su.data[0] = p1;
1905 *(ulong32 *)&cmd_ptr->u.screen.su.data[4] = p2;
1906 *(ulong32 *)&cmd_ptr->u.screen.su.data[8] = p3;
1907 }
1908 }
1909 ha->cmd_len = sizeof(gdth_cmd_str);
1910 ha->cmd_offs_dpmem = 0;
1911 ha->cmd_cnt = 0;
1912 gdth_copy_command(hanum);
1913 gdth_release_event(hanum);
1914 gdth_delay(20);
1915 if (!gdth_wait(hanum,index,INIT_TIMEOUT)) {
1916 printk("GDT: Initialization error (timeout service %d)\n",service);
1917 return 0;
1918 }
1919 if (ha->status != S_BSY || --retries == 0)
1920 break;
1921 gdth_delay(1);
1922 }
1923
1924 return (ha->status != S_OK ? 0:1);
1925 }
1926
1927
1928 /* search for devices */
1929
1930 GDTH_INITFUNC(static int, gdth_search_drives(int hanum))
1931 {
1932 register gdth_ha_str *ha;
1933 ushort cdev_cnt, i;
1934 ulong32 bus_no, drv_cnt, drv_no, j;
1935 gdth_getch_str *chn;
1936 gdth_drlist_str *drl;
1937 gdth_iochan_str *ioc;
1938 gdth_raw_iochan_str *iocr;
1939 gdth_arcdl_str *alst;
1940 gdth_alist_str *alst2;
1941 #ifdef GDTH_RTC
1942 unchar rtc[12];
1943 ulong flags;
1944 #endif
1945
1946 TRACE(("gdth_search_drives() hanum %d\n",hanum));
1947 ha = HADATA(gdth_ctr_tab[hanum]);
1948
1949 /* initialize controller services, at first: screen service */
1950 if (!gdth_internal_cmd(hanum,SCREENSERVICE,GDT_INIT,0,0,0)) {
1951 printk("GDT: Initialization error screen service (code %d)\n",
1952 ha->status);
1953 return 0;
1954 }
1955 TRACE2(("gdth_search_drives(): SCREENSERVICE initialized\n"));
1956
1957 #ifdef GDTH_RTC
1958 /* read realtime clock info, send to controller */
1959 /* 1. wait for the falling edge of update flag */
1960 spin_lock_irqsave(&rtc_lock, flags);
1961 for (j = 0; j < 1000000; ++j)
1962 if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)
1963 break;
1964 for (j = 0; j < 1000000; ++j)
1965 if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
1966 break;
1967 /* 2. read info */
1968 do {
1969 for (j = 0; j < 12; ++j)
1970 rtc[j] = CMOS_READ(j);
1971 } while (rtc[0] != CMOS_READ(0));
1972 spin_lock_irqrestore(&rtc_lock, flags);
1973 TRACE2(("gdth_search_drives(): RTC: %x/%x/%x\n",*(ulong32 *)&rtc[0],
1974 *(ulong32 *)&rtc[4], *(ulong32 *)&rtc[8]));
1975 /* 3. send to controller firmware */
1976 gdth_internal_cmd(hanum,SCREENSERVICE,GDT_REALTIME, *(ulong32 *)&rtc[0],
1977 *(ulong32 *)&rtc[4], *(ulong32 *)&rtc[8]);
1978 #endif
1979
1980 /* unfreeze all IOs */
1981 gdth_internal_cmd(hanum,CACHESERVICE,GDT_UNFREEZE_IO,0,0,0);
1982
1983 /* initialize cache service */
1984 if (!gdth_internal_cmd(hanum,CACHESERVICE,GDT_INIT,LINUX_OS,0,0)) {
1985 printk("GDT: Initialization error cache service (code %d)\n",
1986 ha->status);
1987 return 0;
1988 }
1989 TRACE2(("gdth_search_drives(): CACHESERVICE initialized\n"));
1990 cdev_cnt = (ushort)ha->info;
1991 ha->fw_vers = ha->service;
1992
1993 /* detect number of buses - try new IOCTL */
1994 iocr = (gdth_raw_iochan_str *)ha->pscratch;
1995 iocr->hdr.version = 0xffffffff;
1996 iocr->hdr.list_entries = MAXBUS;
1997 iocr->hdr.first_chan = 0;
1998 iocr->hdr.last_chan = MAXBUS-1;
1999 iocr->hdr.list_offset = GDTOFFSOF(gdth_raw_iochan_str, list[0]);
2000 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,IOCHAN_RAW_DESC,
2001 INVALID_CHANNEL,sizeof(gdth_raw_iochan_str))) {
2002 TRACE2(("IOCHAN_RAW_DESC supported!\n"));
2003 ha->bus_cnt = iocr->hdr.chan_count;
2004 for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
2005 if (iocr->list[bus_no].proc_id < MAXID)
2006 ha->bus_id[bus_no] = iocr->list[bus_no].proc_id;
2007 else
2008 ha->bus_id[bus_no] = 0xff;
2009 }
2010 } else {
2011 /* old method */
2012 chn = (gdth_getch_str *)ha->pscratch;
2013 for (bus_no = 0; bus_no < MAXBUS; ++bus_no) {
2014 chn->channel_no = bus_no;
2015 if (!gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
2016 SCSI_CHAN_CNT | L_CTRL_PATTERN,
2017 IO_CHANNEL | INVALID_CHANNEL,
2018 sizeof(gdth_getch_str))) {
2019 if (bus_no == 0) {
2020 printk("GDT: Error detecting channel count (0x%x)\n",
2021 ha->status);
2022 return 0;
2023 }
2024 break;
2025 }
2026 if (chn->siop_id < MAXID)
2027 ha->bus_id[bus_no] = chn->siop_id;
2028 else
2029 ha->bus_id[bus_no] = 0xff;
2030 }
2031 ha->bus_cnt = (unchar)bus_no;
2032 }
2033 TRACE2(("gdth_search_drives() %d channels\n",ha->bus_cnt));
2034
2035 /* read cache configuration */
2036 if (!gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,CACHE_INFO,
2037 INVALID_CHANNEL,sizeof(gdth_cinfo_str))) {
2038 printk("GDT: Initialization error cache service (code %d)\n",
2039 ha->status);
2040 return 0;
2041 }
2042 ha->cpar = ((gdth_cinfo_str *)ha->pscratch)->cpar;
2043 TRACE2(("gdth_search_drives() cinfo: vs %x sta %d str %d dw %d b %d\n",
2044 ha->cpar.version,ha->cpar.state,ha->cpar.strategy,
2045 ha->cpar.write_back,ha->cpar.block_size));
2046
2047 /* read board info and features */
2048 ha->more_proc = FALSE;
2049 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,BOARD_INFO,
2050 INVALID_CHANNEL,sizeof(gdth_binfo_str))) {
2051 memcpy(&ha->binfo, (gdth_binfo_str *)ha->pscratch,
2052 sizeof(gdth_binfo_str));
2053 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,BOARD_FEATURES,
2054 INVALID_CHANNEL,sizeof(gdth_bfeat_str))) {
2055 TRACE2(("BOARD_INFO/BOARD_FEATURES supported\n"));
2056 ha->bfeat = *(gdth_bfeat_str *)ha->pscratch;
2057 ha->more_proc = TRUE;
2058 }
2059 } else {
2060 TRACE2(("BOARD_INFO requires firmware >= 1.10/2.08\n"));
2061 strcpy(ha->binfo.type_string, gdth_ctr_name(hanum));
2062 }
2063 TRACE2(("Controller name: %s\n",ha->binfo.type_string));
2064
2065 /* read more informations */
2066 if (ha->more_proc) {
2067 /* physical drives, channel addresses */
2068 ioc = (gdth_iochan_str *)ha->pscratch;
2069 ioc->hdr.version = 0xffffffff;
2070 ioc->hdr.list_entries = MAXBUS;
2071 ioc->hdr.first_chan = 0;
2072 ioc->hdr.last_chan = MAXBUS-1;
2073 ioc->hdr.list_offset = GDTOFFSOF(gdth_iochan_str, list[0]);
2074 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,IOCHAN_DESC,
2075 INVALID_CHANNEL,sizeof(gdth_iochan_str))) {
2076 for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
2077 ha->raw[bus_no].address = ioc->list[bus_no].address;
2078 ha->raw[bus_no].local_no = ioc->list[bus_no].local_no;
2079 }
2080 } else {
2081 for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
2082 ha->raw[bus_no].address = IO_CHANNEL;
2083 ha->raw[bus_no].local_no = bus_no;
2084 }
2085 }
2086 for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
2087 chn = (gdth_getch_str *)ha->pscratch;
2088 chn->channel_no = ha->raw[bus_no].local_no;
2089 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
2090 SCSI_CHAN_CNT | L_CTRL_PATTERN,
2091 ha->raw[bus_no].address | INVALID_CHANNEL,
2092 sizeof(gdth_getch_str))) {
2093 ha->raw[bus_no].pdev_cnt = chn->drive_cnt;
2094 TRACE2(("Channel %d: %d phys. drives\n",
2095 bus_no,chn->drive_cnt));
2096 }
2097 if (ha->raw[bus_no].pdev_cnt > 0) {
2098 drl = (gdth_drlist_str *)ha->pscratch;
2099 drl->sc_no = ha->raw[bus_no].local_no;
2100 drl->sc_cnt = ha->raw[bus_no].pdev_cnt;
2101 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
2102 SCSI_DR_LIST | L_CTRL_PATTERN,
2103 ha->raw[bus_no].address | INVALID_CHANNEL,
2104 sizeof(gdth_drlist_str))) {
2105 for (j = 0; j < ha->raw[bus_no].pdev_cnt; ++j)
2106 ha->raw[bus_no].id_list[j] = drl->sc_list[j];
2107 } else {
2108 ha->raw[bus_no].pdev_cnt = 0;
2109 }
2110 }
2111 }
2112
2113 /* logical drives */
2114 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,CACHE_DRV_CNT,
2115 INVALID_CHANNEL,sizeof(ulong32))) {
2116 drv_cnt = *(ulong32 *)ha->pscratch;
2117 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,CACHE_DRV_LIST,
2118 INVALID_CHANNEL,drv_cnt * sizeof(ulong32))) {
2119 for (j = 0; j < drv_cnt; ++j) {
2120 drv_no = ((ulong32 *)ha->pscratch)[j];
2121 if (drv_no < MAX_LDRIVES) {
2122 ha->hdr[drv_no].is_logdrv = TRUE;
2123 TRACE2(("Drive %d is log. drive\n",drv_no));
2124 }
2125 }
2126 }
2127 alst = (gdth_arcdl_str *)ha->pscratch;
2128 alst->entries_avail = MAX_LDRIVES;
2129 alst->first_entry = 0;
2130 alst->list_offset = GDTOFFSOF(gdth_arcdl_str, list[0]);
2131 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
2132 ARRAY_DRV_LIST2 | LA_CTRL_PATTERN,
2133 INVALID_CHANNEL, sizeof(gdth_arcdl_str) +
2134 (alst->entries_avail-1) * sizeof(gdth_alist_str))) {
2135 for (j = 0; j < alst->entries_init; ++j) {
2136 ha->hdr[j].is_arraydrv = alst->list[j].is_arrayd;
2137 ha->hdr[j].is_master = alst->list[j].is_master;
2138 ha->hdr[j].is_parity = alst->list[j].is_parity;
2139 ha->hdr[j].is_hotfix = alst->list[j].is_hotfix;
2140 ha->hdr[j].master_no = alst->list[j].cd_handle;
2141 }
2142 } else if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
2143 ARRAY_DRV_LIST | LA_CTRL_PATTERN,
2144 0, 35 * sizeof(gdth_alist_str))) {
2145 for (j = 0; j < 35; ++j) {
2146 alst2 = &((gdth_alist_str *)ha->pscratch)[j];
2147 ha->hdr[j].is_arraydrv = alst2->is_arrayd;
2148 ha->hdr[j].is_master = alst2->is_master;
2149 ha->hdr[j].is_parity = alst2->is_parity;
2150 ha->hdr[j].is_hotfix = alst2->is_hotfix;
2151 ha->hdr[j].master_no = alst2->cd_handle;
2152 }
2153 }
2154 }
2155 }
2156
2157 /* initialize raw service */
2158 if (!gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_INIT,0,0,0)) {
2159 printk("GDT: Initialization error raw service (code %d)\n",
2160 ha->status);
2161 return 0;
2162 }
2163 TRACE2(("gdth_search_drives(): RAWSERVICE initialized\n"));
2164
2165 /* set/get features raw service (scatter/gather) */
2166 if (gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_SET_FEAT,SCATTER_GATHER,
2167 0,0)) {
2168 TRACE2(("gdth_search_drives(): set features RAWSERVICE OK\n"));
2169 if (gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_GET_FEAT,0,0,0)) {
2170 TRACE2(("gdth_search_dr(): get feat RAWSERVICE %d\n",
2171 ha->info));
2172 ha->raw_feat = (ushort)ha->info;
2173 }
2174 }
2175
2176 /* set/get features cache service (equal to raw service) */
2177 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_SET_FEAT,0,
2178 SCATTER_GATHER,0)) {
2179 TRACE2(("gdth_search_drives(): set features CACHESERVICE OK\n"));
2180 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_GET_FEAT,0,0,0)) {
2181 TRACE2(("gdth_search_dr(): get feat CACHESERV. %d\n",
2182 ha->info));
2183 ha->cache_feat = (ushort)ha->info;
2184 }
2185 }
2186
2187 /* reserve drives for raw service */
2188 if (reserve_mode != 0) {
2189 gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_RESERVE_ALL,
2190 reserve_mode == 1 ? 1 : 3, 0, 0);
2191 TRACE2(("gdth_search_drives(): RESERVE_ALL code %d\n",
2192 ha->status));
2193 }
2194 for (i = 0; i < MAX_RES_ARGS; i += 4) {
2195 if (reserve_list[i] == hanum && reserve_list[i+1] < ha->bus_cnt &&
2196 reserve_list[i+2] < ha->tid_cnt && reserve_list[i+3] < MAXLUN) {
2197 TRACE2(("gdth_search_drives(): reserve ha %d bus %d id %d lun %d\n",
2198 reserve_list[i], reserve_list[i+1],
2199 reserve_list[i+2], reserve_list[i+3]));
2200 if (!gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_RESERVE,0,
2201 reserve_list[i+1], reserve_list[i+2] |
2202 (reserve_list[i+3] << 8))) {
2203 printk("GDT: Error raw service (RESERVE, code %d)\n",
2204 ha->status);
2205 }
2206 }
2207 }
2208
2209 /* scanning for host drives */
2210 for (i = 0; i < cdev_cnt; ++i)
2211 gdth_analyse_hdrive(hanum,i);
2212
2213 TRACE(("gdth_search_drives() OK\n"));
2214 return 1;
2215 }
2216
2217 static int gdth_analyse_hdrive(int hanum,ushort hdrive)
2218 {
2219 register gdth_ha_str *ha;
2220 int drv_cyls, drv_hds, drv_secs;
2221
2222 TRACE(("gdth_analyse_hdrive() hanum %d drive %d\n",hanum,hdrive));
2223 if (hdrive >= MAX_HDRIVES)
2224 return 0;
2225 ha = HADATA(gdth_ctr_tab[hanum]);
2226
2227 if (!gdth_internal_cmd(hanum,CACHESERVICE,GDT_INFO,hdrive,0,0))
2228 return 0;
2229 ha->hdr[hdrive].present = TRUE;
2230 ha->hdr[hdrive].size = ha->info;
2231
2232 /* evaluate mapping (sectors per head, heads per cylinder) */
2233 ha->hdr[hdrive].size &= ~SECS32;
2234 if (ha->info2 == 0) {
2235 gdth_eval_mapping(ha->hdr[hdrive].size,&drv_cyls,&drv_hds,&drv_secs);
2236 } else {
2237 drv_hds = ha->info2 & 0xff;
2238 drv_secs = (ha->info2 >> 8) & 0xff;
2239 drv_cyls = ha->hdr[hdrive].size /drv_hds/drv_secs;
2240 }
2241 ha->hdr[hdrive].heads = (unchar)drv_hds;
2242 ha->hdr[hdrive].secs = (unchar)drv_secs;
2243 /* round size */
2244 ha->hdr[hdrive].size = drv_cyls * drv_hds * drv_secs;
2245 TRACE2(("gdth_search_dr() cdr. %d size %d hds %d scs %d\n",
2246 hdrive,ha->hdr[hdrive].size,drv_hds,drv_secs));
2247
2248 /* get informations about device */
2249 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_DEVTYPE,hdrive,0,0)) {
2250 TRACE2(("gdth_search_dr() cache drive %d devtype %d\n",
2251 hdrive,ha->info));
2252 ha->hdr[hdrive].devtype = (ushort)ha->info;
2253 }
2254
2255 /* cluster info */
2256 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_CLUST_INFO,hdrive,0,0)) {
2257 TRACE2(("gdth_search_dr() cache drive %d cluster info %d\n",
2258 hdrive,ha->info));
2259 if (!shared_access)
2260 ha->hdr[hdrive].cluster_type = (unchar)ha->info;
2261 }
2262
2263 /* R/W attributes */
2264 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_RW_ATTRIBS,hdrive,0,0)) {
2265 TRACE2(("gdth_search_dr() cache drive %d r/w attrib. %d\n",
2266 hdrive,ha->info));
2267 ha->hdr[hdrive].rw_attribs = (unchar)ha->info;
2268 }
2269
2270 return 1;
2271 }
2272
2273
2274 /* command queueing/sending functions */
2275
2276 static void gdth_putq(int hanum,Scsi_Cmnd *scp,unchar priority)
2277 {
2278 register gdth_ha_str *ha;
2279 register Scsi_Cmnd *pscp;
2280 register Scsi_Cmnd *nscp;
2281 ulong flags;
2282 unchar b, t;
2283
2284 TRACE(("gdth_putq() priority %d\n",priority));
2285 ha = HADATA(gdth_ctr_tab[hanum]);
2286 GDTH_LOCK_HA(ha, flags);
2287
2288 scp->SCp.this_residual = (int)priority;
2289 b = virt_ctr ? NUMDATA(scp->host)->busnum : scp->channel;
2290 t = scp->target;
2291 #if LINUX_VERSION_CODE >= 0x010300
2292 if (priority >= DEFAULT_PRI) {
2293 if ((b != ha->virt_bus && ha->raw[BUS_L2P(ha,b)].lock) ||
2294 (b == ha->virt_bus && t < MAX_HDRIVES && ha->hdr[t].lock)) {
2295 TRACE2(("gdth_putq(): locked IO -> update_timeout()\n"));
2296 scp->SCp.buffers_residual = gdth_update_timeout(hanum, scp, 0);
2297 }
2298 }
2299 #endif
2300
2301 if (ha->req_first==NULL) {
2302 ha->req_first = scp; /* queue was empty */
2303 scp->SCp.ptr = NULL;
2304 } else { /* queue not empty */
2305 pscp = ha->req_first;
2306 nscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2307 /* priority: 0-highest,..,0xff-lowest */
2308 while (nscp && (unchar)nscp->SCp.this_residual <= priority) {
2309 pscp = nscp;
2310 nscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2311 }
2312 pscp->SCp.ptr = (char *)scp;
2313 scp->SCp.ptr = (char *)nscp;
2314 }
2315 GDTH_UNLOCK_HA(ha, flags);
2316
2317 #ifdef GDTH_STATISTICS
2318 flags = 0;
2319 for (nscp=ha->req_first; nscp; nscp=(Scsi_Cmnd*)nscp->SCp.ptr)
2320 ++flags;
2321 if (max_rq < flags) {
2322 max_rq = flags;
2323 TRACE3(("GDT: max_rq = %d\n",(ushort)max_rq));
2324 }
2325 #endif
2326 }
2327
2328 static void gdth_next(int hanum)
2329 {
2330 register gdth_ha_str *ha;
2331 register Scsi_Cmnd *pscp;
2332 register Scsi_Cmnd *nscp;
2333 unchar b, t, firsttime;
2334 unchar this_cmd, next_cmd;
2335 ulong flags;
2336 int cmd_index;
2337
2338 TRACE(("gdth_next() hanum %d\n",hanum));
2339 ha = HADATA(gdth_ctr_tab[hanum]);
2340 GDTH_LOCK_HA(ha, flags);
2341
2342 ha->cmd_cnt = ha->cmd_offs_dpmem = 0;
2343 this_cmd = firsttime = TRUE;
2344 next_cmd = gdth_polling ? FALSE:TRUE;
2345 cmd_index = 0;
2346
2347 for (nscp = pscp = ha->req_first; nscp; nscp = (Scsi_Cmnd *)nscp->SCp.ptr) {
2348 if (nscp != pscp && nscp != (Scsi_Cmnd *)pscp->SCp.ptr)
2349 pscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2350 b = virt_ctr ? NUMDATA(nscp->host)->busnum : nscp->channel;
2351 t = nscp->target;
2352 if (nscp->SCp.this_residual >= DEFAULT_PRI) {
2353 if ((b != ha->virt_bus && ha->raw[BUS_L2P(ha,b)].lock) ||
2354 (b == ha->virt_bus && t < MAX_HDRIVES && ha->hdr[t].lock))
2355 continue;
2356 }
2357
2358 if (firsttime) {
2359 if (gdth_test_busy(hanum)) { /* controller busy ? */
2360 TRACE(("gdth_next() controller %d busy !\n",hanum));
2361 if (!gdth_polling) {
2362 GDTH_UNLOCK_HA(ha, flags);
2363 return;
2364 }
2365 while (gdth_test_busy(hanum))
2366 gdth_delay(1);
2367 }
2368 firsttime = FALSE;
2369 }
2370
2371 #if LINUX_VERSION_CODE >= 0x010300
2372 if (nscp->done != gdth_scsi_done || nscp->cmnd[0] != 0xff)
2373 #endif
2374 {
2375 if (nscp->SCp.phase == -1) {
2376 nscp->SCp.phase = CACHESERVICE; /* default: cache svc. */
2377 if (nscp->cmnd[0] == TEST_UNIT_READY) {
2378 TRACE2(("TEST_UNIT_READY Bus %d Id %d LUN %d\n",
2379 b, t, nscp->lun));
2380 /* TEST_UNIT_READY -> set scan mode */
2381 if ((ha->scan_mode & 0x0f) == 0) {
2382 if (b == 0 && t == 0 && nscp->lun == 0) {
2383 ha->scan_mode |= 1;
2384 TRACE2(("Scan mode: 0x%x\n", ha->scan_mode));
2385 }
2386 } else if ((ha->scan_mode & 0x0f) == 1) {
2387 if (b == 0 && ((t == 0 && nscp->lun == 1) ||
2388 (t == 1 && nscp->lun == 0))) {
2389 nscp->SCp.sent_command = GDT_SCAN_START;
2390 nscp->SCp.phase = ((ha->scan_mode & 0x10 ? 1:0) << 8)
2391 | SCSIRAWSERVICE;
2392 ha->scan_mode = 0x12;
2393 TRACE2(("Scan mode: 0x%x (SCAN_START)\n",
2394 ha->scan_mode));
2395 } else {
2396 ha->scan_mode &= 0x10;
2397 TRACE2(("Scan mode: 0x%x\n", ha->scan_mode));
2398 }
2399 } else if (ha->scan_mode == 0x12) {
2400 if (b == ha->bus_cnt && t == ha->tid_cnt-1) {
2401 nscp->SCp.phase = SCSIRAWSERVICE;
2402 nscp->SCp.sent_command = GDT_SCAN_END;
2403 ha->scan_mode &= 0x10;
2404 TRACE2(("Scan mode: 0x%x (SCAN_END)\n",
2405 ha->scan_mode));
2406 }
2407 }
2408 }
2409 if (b == ha->virt_bus && nscp->cmnd[0] != INQUIRY &&
2410 nscp->cmnd[0] != READ_CAPACITY && nscp->cmnd[0] != MODE_SENSE &&
2411 (ha->hdr[t].cluster_type & CLUSTER_DRIVE)) {
2412 /* always GDT_CLUST_INFO! */
2413 nscp->SCp.sent_command = GDT_CLUST_INFO;
2414 }
2415 }
2416 }
2417
2418 if (nscp->SCp.sent_command != -1) {
2419 if ((nscp->SCp.phase & 0xff) == CACHESERVICE) {
2420 if (!(cmd_index=gdth_fill_cache_cmd(hanum,nscp,t)))
2421 this_cmd = FALSE;
2422 next_cmd = FALSE;
2423 } else if ((nscp->SCp.phase & 0xff) == SCSIRAWSERVICE) {
2424 if (!(cmd_index=gdth_fill_raw_cmd(hanum,nscp,BUS_L2P(ha,b))))
2425 this_cmd = FALSE;
2426 next_cmd = FALSE;
2427 } else {
2428 memset((char*)nscp->sense_buffer,0,16);
2429 nscp->sense_buffer[0] = 0x70;
2430 nscp->sense_buffer[2] = NOT_READY;
2431 nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2432 if (!nscp->SCp.have_data_in)
2433 nscp->SCp.have_data_in++;
2434 else {
2435 GDTH_UNLOCK_HA(ha,flags);
2436 /* io_request_lock already active ! */
2437 nscp->scsi_done(nscp);
2438 GDTH_LOCK_HA(ha,flags);
2439 }
2440 }
2441 } else
2442
2443 #if LINUX_VERSION_CODE >= 0x010300
2444 if (nscp->done == gdth_scsi_done && nscp->cmnd[0] == 0xff) {
2445 if (!(cmd_index=gdth_special_cmd(hanum,nscp)))
2446 this_cmd = FALSE;
2447 next_cmd = FALSE;
2448 } else
2449 #endif
2450 if (b != ha->virt_bus) {
2451 if (ha->raw[BUS_L2P(ha,b)].io_cnt[t] >= GDTH_MAX_RAW ||
2452 !(cmd_index=gdth_fill_raw_cmd(hanum,nscp,BUS_L2P(ha,b))))
2453 this_cmd = FALSE;
2454 else
2455 ha->raw[BUS_L2P(ha,b)].io_cnt[t]++;
2456 } else if (t >= MAX_HDRIVES || !ha->hdr[t].present || nscp->lun != 0) {
2457 TRACE2(("Command 0x%x to bus %d id %d lun %d -> IGNORE\n",
2458 nscp->cmnd[0], b, t, nscp->lun));
2459 nscp->result = DID_BAD_TARGET << 16;
2460 if (!nscp->SCp.have_data_in)
2461 nscp->SCp.have_data_in++;
2462 else {
2463 GDTH_UNLOCK_HA(ha,flags);
2464 /* io_request_lock already active ! */
2465 nscp->scsi_done(nscp);
2466 GDTH_LOCK_HA(ha,flags);
2467 }
2468 } else {
2469 switch (nscp->cmnd[0]) {
2470 case TEST_UNIT_READY:
2471 case INQUIRY:
2472 case REQUEST_SENSE:
2473 case READ_CAPACITY:
2474 case VERIFY:
2475 case START_STOP:
2476 case MODE_SENSE:
2477 TRACE(("cache cmd %x/%x/%x/%x/%x/%x\n",nscp->cmnd[0],
2478 nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2479 nscp->cmnd[4],nscp->cmnd[5]));
2480 if (ha->hdr[t].media_changed && nscp->cmnd[0] != INQUIRY) {
2481 /* return UNIT_ATTENTION */
2482 TRACE2(("cmd 0x%x target %d: UNIT_ATTENTION\n",
2483 nscp->cmnd[0], t));
2484 ha->hdr[t].media_changed = FALSE;
2485 memset((char*)nscp->sense_buffer,0,16);
2486 nscp->sense_buffer[0] = 0x70;
2487 nscp->sense_buffer[2] = UNIT_ATTENTION;
2488 nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2489 if (!nscp->SCp.have_data_in)
2490 nscp->SCp.have_data_in++;
2491 else {
2492 GDTH_UNLOCK_HA(ha,flags);
2493 /* io_request_lock already active ! */
2494 nscp->scsi_done(nscp);
2495 GDTH_LOCK_HA(ha,flags);
2496 }
2497 } else if (gdth_internal_cache_cmd(hanum,nscp)) {
2498 GDTH_UNLOCK_HA(ha,flags);
2499 /* io_request_lock already active ! */
2500 nscp->scsi_done(nscp);
2501 GDTH_LOCK_HA(ha,flags);
2502 }
2503 break;
2504
2505 case ALLOW_MEDIUM_REMOVAL:
2506 TRACE(("cache cmd %x/%x/%x/%x/%x/%x\n",nscp->cmnd[0],
2507 nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2508 nscp->cmnd[4],nscp->cmnd[5]));
2509 if ( (nscp->cmnd[4]&1) && !(ha->hdr[t].devtype&1) ) {
2510 TRACE(("Prevent r. nonremov. drive->do nothing\n"));
2511 nscp->result = DID_OK << 16;
2512 nscp->sense_buffer[0] = 0;
2513 if (!nscp->SCp.have_data_in)
2514 nscp->SCp.have_data_in++;
2515 else {
2516 GDTH_UNLOCK_HA(ha,flags);
2517 /* io_request_lock already active ! */
2518 nscp->scsi_done(nscp);
2519 GDTH_LOCK_HA(ha,flags);
2520 }
2521 } else {
2522 nscp->cmnd[3] = (ha->hdr[t].devtype&1) ? 1:0;
2523 TRACE(("Prevent/allow r. %d rem. drive %d\n",
2524 nscp->cmnd[4],nscp->cmnd[3]));
2525 if (!(cmd_index=gdth_fill_cache_cmd(hanum,nscp,t)))
2526 this_cmd = FALSE;
2527 }
2528 break;
2529
2530 case RESERVE:
2531 case RELEASE:
2532 TRACE2(("cache cmd %s\n",nscp->cmnd[0] == RESERVE ?
2533 "RESERVE" : "RELEASE"));
2534 if (!(cmd_index=gdth_fill_cache_cmd(hanum,nscp,t)))
2535 this_cmd = FALSE;
2536 break;
2537
2538 case READ_6:
2539 case WRITE_6:
2540 case READ_10:
2541 case WRITE_10:
2542 if (ha->hdr[t].media_changed) {
2543 /* return UNIT_ATTENTION */
2544 TRACE2(("cmd 0x%x target %d: UNIT_ATTENTION\n",
2545 nscp->cmnd[0], t));
2546 ha->hdr[t].media_changed = FALSE;
2547 memset((char*)nscp->sense_buffer,0,16);
2548 nscp->sense_buffer[0] = 0x70;
2549 nscp->sense_buffer[2] = UNIT_ATTENTION;
2550 nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2551 if (!nscp->SCp.have_data_in)
2552 nscp->SCp.have_data_in++;
2553 else {
2554 GDTH_UNLOCK_HA(ha,flags);
2555 /* io_request_lock already active ! */
2556 nscp->scsi_done(nscp);
2557 GDTH_LOCK_HA(ha,flags);
2558 }
2559 } else if (!(cmd_index=gdth_fill_cache_cmd(hanum,nscp,t)))
2560 this_cmd = FALSE;
2561 break;
2562
2563 default:
2564 TRACE2(("cache cmd %x/%x/%x/%x/%x/%x unknown\n",nscp->cmnd[0],
2565 nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2566 nscp->cmnd[4],nscp->cmnd[5]));
2567 printk("GDT: Unknown SCSI command 0x%x to cache service !\n",
2568 nscp->cmnd[0]);
2569 nscp->result = DID_ABORT << 16;
2570 if (!nscp->SCp.have_data_in)
2571 nscp->SCp.have_data_in++;
2572 else {
2573 GDTH_UNLOCK_HA(ha,flags);
2574 /* io_request_lock already active ! */
2575 nscp->scsi_done(nscp);
2576 GDTH_LOCK_HA(ha,flags);
2577 }
2578 break;
2579 }
2580 }
2581
2582 if (!this_cmd)
2583 break;
2584 if (nscp == ha->req_first)
2585 ha->req_first = pscp = (Scsi_Cmnd *)nscp->SCp.ptr;
2586 else
2587 pscp->SCp.ptr = nscp->SCp.ptr;
2588 if (!next_cmd)
2589 break;
2590 }
2591
2592 if (ha->cmd_cnt > 0) {
2593 gdth_release_event(hanum);
2594 }
2595
2596 GDTH_UNLOCK_HA(ha, flags);
2597
2598 if (gdth_polling && ha->cmd_cnt > 0) {
2599 if (!gdth_wait(hanum,cmd_index,POLL_TIMEOUT))
2600 printk("GDT: Controller %d: Command %d timed out !\n",
2601 hanum,cmd_index);
2602 }
2603 }
2604
2605 static void gdth_copy_internal_data(Scsi_Cmnd *scp,char *buffer,ushort count)
2606 {
2607 ushort cpcount,i;
2608 ushort cpsum,cpnow;
2609 struct scatterlist *sl;
2610
2611 cpcount = count<=(ushort)scp->bufflen ? count:(ushort)scp->bufflen;
2612 if (scp->use_sg) {
2613 sl = (struct scatterlist *)scp->request_buffer;
2614 for (i=0,cpsum=0; i<scp->use_sg; ++i,++sl) {
2615 cpnow = (ushort)sl->length;
2616 TRACE(("copy_internal() now %d sum %d count %d %d\n",
2617 cpnow,cpsum,cpcount,(ushort)scp->bufflen));
2618 if (cpsum+cpnow > cpcount)
2619 cpnow = cpcount - cpsum;
2620 cpsum += cpnow;
2621 memcpy((char*)sl->address,buffer,cpnow);
2622 if (cpsum == cpcount)
2623 break;
2624 buffer += cpnow;
2625 }
2626 } else {
2627 TRACE(("copy_internal() count %d\n",cpcount));
2628 memcpy((char*)scp->request_buffer,buffer,cpcount);
2629 }
2630 }
2631
2632 static int gdth_internal_cache_cmd(int hanum,Scsi_Cmnd *scp)
2633 {
2634 register gdth_ha_str *ha;
2635 unchar t;
2636 gdth_inq_data inq;
2637 gdth_rdcap_data rdc;
2638 gdth_sense_data sd;
2639 gdth_modep_data mpd;
2640
2641 ha = HADATA(gdth_ctr_tab[hanum]);
2642 t = scp->target;
2643 TRACE(("gdth_internal_cache_cmd() cmd 0x%x hdrive %d\n",
2644 scp->cmnd[0],t));
2645
2646 switch (scp->cmnd[0]) {
2647 case TEST_UNIT_READY:
2648 case VERIFY:
2649 case START_STOP:
2650 TRACE2(("Test/Verify/Start hdrive %d\n",t));
2651 break;
2652
2653 case INQUIRY:
2654 TRACE2(("Inquiry hdrive %d devtype %d\n",
2655 t,ha->hdr[t].devtype));
2656 inq.type_qual = (ha->hdr[t].devtype&4) ? TYPE_ROM:TYPE_DISK;
2657 /* you can here set all disks to removable, if you want to do
2658 a flush using the ALLOW_MEDIUM_REMOVAL command */
2659 inq.modif_rmb = 0x00;
2660 if ((ha->hdr[t].devtype & 1) ||
2661 (ha->hdr[t].cluster_type & CLUSTER_DRIVE))
2662 inq.modif_rmb = 0x80;
2663 inq.version = 2;
2664 inq.resp_aenc = 2;
2665 inq.add_length= 32;
2666 if (ha->oem_id == OEM_ID_INTEL)
2667 strcpy(inq.vendor,"Intel ");
2668 else
2669 strcpy(inq.vendor,"ICP ");
2670 sprintf(inq.product,"Host Drive #%02d",t);
2671 strcpy(inq.revision," ");
2672 gdth_copy_internal_data(scp,(char*)&inq,sizeof(gdth_inq_data));
2673 break;
2674
2675 case REQUEST_SENSE:
2676 TRACE2(("Request sense hdrive %d\n",t));
2677 sd.errorcode = 0x70;
2678 sd.segno = 0x00;
2679 sd.key = NO_SENSE;
2680 sd.info = 0;
2681 sd.add_length= 0;
2682 gdth_copy_internal_data(scp,(char*)&sd,sizeof(gdth_sense_data));
2683 break;
2684
2685 case MODE_SENSE:
2686 TRACE2(("Mode sense hdrive %d\n",t));
2687 memset((char*)&mpd,0,sizeof(gdth_modep_data));
2688 mpd.hd.data_length = sizeof(gdth_modep_data);
2689 mpd.hd.dev_par = (ha->hdr[t].devtype&2) ? 0x80:0;
2690 mpd.hd.bd_length = sizeof(mpd.bd);
2691 mpd.bd.block_length[0] = (SECTOR_SIZE & 0x00ff0000) >> 16;
2692 mpd.bd.block_length[1] = (SECTOR_SIZE & 0x0000ff00) >> 8;
2693 mpd.bd.block_length[2] = (SECTOR_SIZE & 0x000000ff);
2694 gdth_copy_internal_data(scp,(char*)&mpd,sizeof(gdth_modep_data));
2695 break;
2696
2697 case READ_CAPACITY:
2698 TRACE2(("Read capacity hdrive %d\n",t));
2699 rdc.last_block_no = ntohl(ha->hdr[t].size-1);
2700 rdc.block_length = ntohl(SECTOR_SIZE);
2701 gdth_copy_internal_data(scp,(char*)&rdc,sizeof(gdth_rdcap_data));
2702 break;
2703
2704 default:
2705 TRACE2(("Internal cache cmd 0x%x unknown\n",scp->cmnd[0]));
2706 break;
2707 }
2708
2709 scp->result = DID_OK << 16;
2710 scp->sense_buffer[0] = 0;
2711
2712 if (!scp->SCp.have_data_in)
2713 scp->SCp.have_data_in++;
2714 else
2715 return 1;
2716
2717 return 0;
2718 }
2719
2720 static int gdth_fill_cache_cmd(int hanum,Scsi_Cmnd *scp,ushort hdrive)
2721 {
2722 register gdth_ha_str *ha;
2723 register gdth_cmd_str *cmdp;
2724 struct scatterlist *sl;
2725 ushort i, cnt;
2726 ulong32 no;
2727 int cmd_index, read_write;
2728
2729 ha = HADATA(gdth_ctr_tab[hanum]);
2730 cmdp = ha->pccb;
2731 TRACE(("gdth_fill_cache_cmd() cmd 0x%x cmdsize %d hdrive %d\n",
2732 scp->cmnd[0],scp->cmd_len,hdrive));
2733
2734 if (ha->type==GDT_EISA && ha->cmd_cnt>0)
2735 return 0;
2736
2737 cmdp->Service = CACHESERVICE;
2738 cmdp->RequestBuffer = scp;
2739 /* search free command index */
2740 if (!(cmd_index=gdth_get_cmd_index(hanum))) {
2741 TRACE(("GDT: No free command index found\n"));
2742 return 0;
2743 }
2744 /* if it's the first command, set command semaphore */
2745 if (ha->cmd_cnt == 0)
2746 gdth_set_sema0(hanum);
2747
2748 /* fill command */
2749 read_write = FALSE;
2750 if (scp->SCp.sent_command != -1)
2751 cmdp->OpCode = scp->SCp.sent_command; /* special cache cmd. */
2752 else if (scp->cmnd[0] == RESERVE)
2753 cmdp->OpCode = GDT_RESERVE_DRV;
2754 else if (scp->cmnd[0] == RELEASE)
2755 cmdp->OpCode = GDT_RELEASE_DRV;
2756 else if (scp->cmnd[0] == ALLOW_MEDIUM_REMOVAL) {
2757 if (scp->cmnd[4] & 1) /* prevent ? */
2758 cmdp->OpCode = GDT_MOUNT;
2759 else if (scp->cmnd[3] & 1) /* removable drive ? */
2760 cmdp->OpCode = GDT_UNMOUNT;
2761 else
2762 cmdp->OpCode = GDT_FLUSH;
2763 } else if (scp->cmnd[0] == WRITE_6 || scp->cmnd[0] == WRITE_10) {
2764 read_write = TRUE;
2765 if (gdth_write_through || ((ha->hdr[hdrive].rw_attribs & 1) &&
2766 (ha->cache_feat & GDT_WR_THROUGH)))
2767 cmdp->OpCode = GDT_WRITE_THR;
2768 else
2769 cmdp->OpCode = GDT_WRITE;
2770 } else {
2771 read_write = TRUE;
2772 cmdp->OpCode = GDT_READ;
2773 }
2774
2775 cmdp->BoardNode = LOCALBOARD;
2776 cmdp->u.cache.DeviceNo = hdrive;
2777 cmdp->u.cache.BlockNo = 1;
2778 cmdp->u.cache.sg_canz = 0;
2779
2780 if (read_write) {
2781 if (scp->cmd_len != 6) {
2782 memcpy(&no, &scp->cmnd[2], sizeof(ulong32));
2783 cmdp->u.cache.BlockNo = ntohl(no);
2784 memcpy(&cnt, &scp->cmnd[7], sizeof(ushort));
2785 cmdp->u.cache.BlockCnt = (ulong32)ntohs(cnt);
2786 } else {
2787 memcpy(&no, &scp->cmnd[0], sizeof(ulong32));
2788 cmdp->u.cache.BlockNo = ntohl(no) & 0x001fffffUL;
2789 cmdp->u.cache.BlockCnt= scp->cmnd[4]==0 ? 0x100 : scp->cmnd[4];
2790 }
2791
2792 if (scp->use_sg) {
2793 cmdp->u.cache.DestAddr= 0xffffffff;
2794 sl = (struct scatterlist *)scp->request_buffer;
2795 for (i=0; i<scp->use_sg; ++i,++sl) {
2796 cmdp->u.cache.sg_lst[i].sg_ptr = virt_to_bus(sl->address);
2797 cmdp->u.cache.sg_lst[i].sg_len = (ulong32)sl->length;
2798 }
2799 cmdp->u.cache.sg_canz = (ulong32)i;
2800
2801 #ifdef GDTH_STATISTICS
2802 if (max_sg < (ulong32)i) {
2803 max_sg = (ulong32)i;
2804 TRACE3(("GDT: max_sg = %d\n",i));
2805 }
2806 #endif
2807 if (i<GDTH_MAXSG)
2808 cmdp->u.cache.sg_lst[i].sg_len = 0;
2809 } else {
2810 if (ha->cache_feat & SCATTER_GATHER) {
2811 cmdp->u.cache.DestAddr = 0xffffffff;
2812 cmdp->u.cache.sg_canz = 1;
2813 cmdp->u.cache.sg_lst[0].sg_ptr =
2814 virt_to_bus(scp->request_buffer);
2815 cmdp->u.cache.sg_lst[0].sg_len = scp->request_bufflen;
2816 cmdp->u.cache.sg_lst[1].sg_len = 0;
2817 } else {
2818 cmdp->u.cache.DestAddr = virt_to_bus(scp->request_buffer);
2819 cmdp->u.cache.sg_canz= 0;
2820 }
2821 }
2822 }
2823 TRACE(("cache cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2824 cmdp->u.cache.DestAddr,cmdp->u.cache.sg_canz,
2825 cmdp->u.cache.sg_lst[0].sg_ptr,
2826 cmdp->u.cache.sg_lst[0].sg_len));
2827 TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n",
2828 cmdp->OpCode,cmdp->u.cache.BlockNo,cmdp->u.cache.BlockCnt));
2829
2830 /* evaluate command size, check space */
2831 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache.sg_lst) +
2832 (ushort)cmdp->u.cache.sg_canz * sizeof(gdth_sg_str);
2833 if (ha->cmd_len & 3)
2834 ha->cmd_len += (4 - (ha->cmd_len & 3));
2835
2836 if (ha->cmd_cnt > 0) {
2837 if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
2838 ha->ic_all_size) {
2839 TRACE2(("gdth_fill_cache() DPMEM overflow\n"));
2840 ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
2841 return 0;
2842 }
2843 }
2844
2845 /* copy command */
2846 gdth_copy_command(hanum);
2847 return cmd_index;
2848 }
2849
2850 static int gdth_fill_raw_cmd(int hanum,Scsi_Cmnd *scp,unchar b)
2851 {
2852 register gdth_ha_str *ha;
2853 register gdth_cmd_str *cmdp;
2854 struct scatterlist *sl;
2855 ushort i;
2856 int cmd_index;
2857 unchar t,l;
2858
2859 ha = HADATA(gdth_ctr_tab[hanum]);
2860 t = scp->target;
2861 l = scp->lun;
2862 cmdp = ha->pccb;
2863 TRACE(("gdth_fill_raw_cmd() cmd 0x%x bus %d ID %d LUN %d\n",
2864 scp->cmnd[0],b,t,l));
2865
2866 if (ha->type==GDT_EISA && ha->cmd_cnt>0)
2867 return 0;
2868
2869 cmdp->Service = SCSIRAWSERVICE;
2870 cmdp->RequestBuffer = scp;
2871 /* search free command index */
2872 if (!(cmd_index=gdth_get_cmd_index(hanum))) {
2873 TRACE(("GDT: No free command index found\n"));
2874 return 0;
2875 }
2876 /* if it's the first command, set command semaphore */
2877 if (ha->cmd_cnt == 0)
2878 gdth_set_sema0(hanum);
2879
2880 /* fill command */
2881 if (scp->SCp.sent_command != -1) {
2882 cmdp->OpCode = scp->SCp.sent_command; /* special raw cmd. */
2883 cmdp->BoardNode = LOCALBOARD;
2884 cmdp->u.raw.direction = (scp->SCp.phase >> 8);
2885 TRACE2(("special raw cmd 0x%x param 0x%x\n",
2886 cmdp->OpCode, cmdp->u.raw.direction));
2887
2888 /* evaluate command size */
2889 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst);
2890 } else {
2891 cmdp->OpCode = GDT_WRITE; /* always */
2892 cmdp->BoardNode = LOCALBOARD;
2893 cmdp->u.raw.reserved = 0;
2894 cmdp->u.raw.mdisc_time = 0;
2895 cmdp->u.raw.mcon_time = 0;
2896 cmdp->u.raw.clen = scp->cmd_len;
2897 cmdp->u.raw.target = t;
2898 cmdp->u.raw.lun = l;
2899 cmdp->u.raw.bus = b;
2900 cmdp->u.raw.priority = 0;
2901 cmdp->u.raw.link_p = 0;
2902 cmdp->u.raw.sdlen = scp->request_bufflen;
2903 cmdp->u.raw.sense_len = 16;
2904 cmdp->u.raw.sense_data = virt_to_bus(scp->sense_buffer);
2905 cmdp->u.raw.direction =
2906 gdth_direction_tab[scp->cmnd[0]]==DOU ? GDTH_DATA_OUT:GDTH_DATA_IN;
2907 memcpy(cmdp->u.raw.cmd,scp->cmnd,12);
2908
2909 if (scp->use_sg) {
2910 cmdp->u.raw.sdata = 0xffffffff;
2911 sl = (struct scatterlist *)scp->request_buffer;
2912 for (i=0; i<scp->use_sg; ++i,++sl) {
2913 cmdp->u.raw.sg_lst[i].sg_ptr = virt_to_bus(sl->address);
2914 cmdp->u.raw.sg_lst[i].sg_len = (ulong32)sl->length;
2915 }
2916 cmdp->u.raw.sg_ranz = (ulong32)i;
2917
2918 #ifdef GDTH_STATISTICS
2919 if (max_sg < (ulong32)i) {
2920 max_sg = (ulong32)i;
2921 TRACE3(("GDT: max_sg = %d\n",i));
2922 }
2923 #endif
2924 if (i<GDTH_MAXSG)
2925 cmdp->u.raw.sg_lst[i].sg_len = 0;
2926 } else {
2927 if (ha->raw_feat & SCATTER_GATHER) {
2928 cmdp->u.raw.sdata = 0xffffffff;
2929 cmdp->u.raw.sg_ranz= 1;
2930 cmdp->u.raw.sg_lst[0].sg_ptr = virt_to_bus(scp->request_buffer);
2931 cmdp->u.raw.sg_lst[0].sg_len = scp->request_bufflen;
2932 cmdp->u.raw.sg_lst[1].sg_len = 0;
2933 } else {
2934 cmdp->u.raw.sdata = virt_to_bus(scp->request_buffer);
2935 cmdp->u.raw.sg_ranz= 0;
2936 }
2937 }
2938 TRACE(("raw cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2939 cmdp->u.raw.sdata,cmdp->u.raw.sg_ranz,
2940 cmdp->u.raw.sg_lst[0].sg_ptr,
2941 cmdp->u.raw.sg_lst[0].sg_len));
2942
2943 /* evaluate command size */
2944 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst) +
2945 (ushort)cmdp->u.raw.sg_ranz * sizeof(gdth_sg_str);
2946 }
2947 /* check space */
2948 if (ha->cmd_len & 3)
2949 ha->cmd_len += (4 - (ha->cmd_len & 3));
2950
2951 if (ha->cmd_cnt > 0) {
2952 if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
2953 ha->ic_all_size) {
2954 TRACE2(("gdth_fill_raw() DPMEM overflow\n"));
2955 ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
2956 return 0;
2957 }
2958 }
2959
2960 /* copy command */
2961 gdth_copy_command(hanum);
2962 return cmd_index;
2963 }
2964
2965 static int gdth_special_cmd(int hanum,Scsi_Cmnd *scp)
2966 {
2967 register gdth_ha_str *ha;
2968 register gdth_cmd_str *cmdp;
2969 int cmd_index;
2970
2971 ha = HADATA(gdth_ctr_tab[hanum]);
2972 cmdp= ha->pccb;
2973 TRACE2(("gdth_special_cmd(): "));
2974
2975 if (ha->type==GDT_EISA && ha->cmd_cnt>0)
2976 return 0;
2977
2978 memcpy( cmdp, scp->request_buffer, sizeof(gdth_cmd_str));
2979 cmdp->RequestBuffer = scp;
2980
2981 /* search free command index */
2982 if (!(cmd_index=gdth_get_cmd_index(hanum))) {
2983 TRACE(("GDT: No free command index found\n"));
2984 return 0;
2985 }
2986
2987 /* if it's the first command, set command semaphore */
2988 if (ha->cmd_cnt == 0)
2989 gdth_set_sema0(hanum);
2990
2991 /* evaluate command size, check space */
2992 if (cmdp->OpCode == GDT_IOCTL) {
2993 TRACE2(("IOCTL\n"));
2994 ha->cmd_len =
2995 GDTOFFSOF(gdth_cmd_str,u.ioctl.p_param) + sizeof(ulong32);
2996 } else if (cmdp->Service == CACHESERVICE) {
2997 TRACE2(("cache command %d\n",cmdp->OpCode));
2998 ha->cmd_len =
2999 GDTOFFSOF(gdth_cmd_str,u.cache.sg_lst) + sizeof(gdth_sg_str);
3000 } else if (cmdp->Service == SCSIRAWSERVICE) {
3001 TRACE2(("raw command %d/%d\n",cmdp->OpCode,cmdp->u.raw.cmd[0]));
3002 ha->cmd_len =
3003 GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst) + sizeof(gdth_sg_str);
3004 }
3005
3006 if (ha->cmd_len & 3)
3007 ha->cmd_len += (4 - (ha->cmd_len & 3));
3008
3009 if (ha->cmd_cnt > 0) {
3010 if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
3011 ha->ic_all_size) {
3012 TRACE2(("gdth_special_cmd() DPMEM overflow\n"));
3013 ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
3014 return 0;
3015 }
3016 }
3017
3018 /* copy command */
3019 gdth_copy_command(hanum);
3020 return cmd_index;
3021 }
3022
3023
3024 /* Controller event handling functions */
3025 static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, ushort source,
3026 ushort idx, gdth_evt_data *evt)
3027 {
3028 gdth_evt_str *e;
3029 struct timeval tv;
3030
3031 /* no GDTH_LOCK_HA() ! */
3032 TRACE2(("gdth_store_event() source %d idx %d\n", source, idx));
3033 if (source == 0) /* no source -> no event */
3034 return 0;
3035
3036 if (ebuffer[elastidx].event_source == source &&
3037 ebuffer[elastidx].event_idx == idx &&
3038 ((evt->size != 0 && ebuffer[elastidx].event_data.size != 0 &&
3039 !memcmp((char *)&ebuffer[elastidx].event_data.eu,
3040 (char *)&evt->eu, evt->size)) ||
3041 (evt->size == 0 && ebuffer[elastidx].event_data.size == 0 &&
3042 !strcmp((char *)&ebuffer[elastidx].event_data.event_string,
3043 (char *)&evt->event_string)))) {
3044 e = &ebuffer[elastidx];
3045 do_gettimeofday(&tv);
3046 e->last_stamp = tv.tv_sec;
3047 ++e->same_count;
3048 } else {
3049 if (ebuffer[elastidx].event_source != 0) { /* entry not free ? */
3050 ++elastidx;
3051 if (elastidx == MAX_EVENTS)
3052 elastidx = 0;
3053 if (elastidx == eoldidx) { /* reached mark ? */
3054 ++eoldidx;
3055 if (eoldidx == MAX_EVENTS)
3056 eoldidx = 0;
3057 }
3058 }
3059 e = &ebuffer[elastidx];
3060 e->event_source = source;
3061 e->event_idx = idx;
3062 do_gettimeofday(&tv);
3063 e->first_stamp = e->last_stamp = tv.tv_sec;
3064 e->same_count = 1;
3065 e->event_data = *evt;
3066 e->application = 0;
3067 }
3068 return e;
3069 }
3070
3071 static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr)
3072 {
3073 gdth_evt_str *e;
3074 int eindex;
3075 ulong flags;
3076
3077 TRACE2(("gdth_read_event() handle %d\n", handle));
3078 GDTH_LOCK_HA(ha, flags);
3079 if (handle == -1)
3080 eindex = eoldidx;
3081 else
3082 eindex = handle;
3083 estr->event_source = 0;
3084
3085 if (eindex >= MAX_EVENTS) {
3086 GDTH_UNLOCK_HA(ha, flags);
3087 return eindex;
3088 }
3089 e = &ebuffer[eindex];
3090 if (e->event_source != 0) {
3091 if (eindex != elastidx) {
3092 if (++eindex == MAX_EVENTS)
3093 eindex = 0;
3094 } else {
3095 eindex = -1;
3096 }
3097 memcpy(estr, e, sizeof(gdth_evt_str));
3098 }
3099 GDTH_UNLOCK_HA(ha, flags);
3100 return eindex;
3101 }
3102
3103 static void gdth_readapp_event(gdth_ha_str *ha,
3104 unchar application, gdth_evt_str *estr)
3105 {
3106 gdth_evt_str *e;
3107 int eindex;
3108 ulong flags;
3109 unchar found = FALSE;
3110
3111 TRACE2(("gdth_readapp_event() app. %d\n", application));
3112 GDTH_LOCK_HA(ha, flags);
3113 eindex = eoldidx;
3114 for (;;) {
3115 e = &ebuffer[eindex];
3116 if (e->event_source == 0)
3117 break;
3118 if ((e->application & application) == 0) {
3119 e->application |= application;
3120 found = TRUE;
3121 break;
3122 }
3123 if (eindex == elastidx)
3124 break;
3125 if (++eindex == MAX_EVENTS)
3126 eindex = 0;
3127 }
3128 if (found)
3129 memcpy(estr, e, sizeof(gdth_evt_str));
3130 else
3131 estr->event_source = 0;
3132 GDTH_UNLOCK_HA(ha, flags);
3133 }
3134
3135 static void gdth_clear_events()
3136 {
3137 TRACE(("gdth_clear_events()"));
3138
3139 eoldidx = elastidx = 0;
3140 ebuffer[0].event_source = 0;
3141 }
3142
3143
3144 /* SCSI interface functions */
3145
3146 #if LINUX_VERSION_CODE >= 0x010346
3147 static void gdth_interrupt(int irq,void *dev_id,struct pt_regs *regs)
3148 #else
3149 static void gdth_interrupt(int irq,struct pt_regs *regs)
3150 #endif
3151 {
3152 register gdth_ha_str *ha;
3153 gdt6m_dpram_str *dp6m_ptr;
3154 gdt6_dpram_str *dp6_ptr;
3155 gdt2_dpram_str *dp2_ptr;
3156 Scsi_Cmnd *scp;
3157 int hanum, rval, i;
3158 unchar IStatus;
3159 ushort Service;
3160 ulong flags = 0;
3161
3162 TRACE(("gdth_interrupt() IRQ %d\n",irq));
3163
3164 /* if polling and not from gdth_wait() -> return */
3165 if (gdth_polling) {
3166 if (!gdth_from_wait) {
3167 return;
3168 }
3169 }
3170
3171 if (!gdth_polling)
3172 GDTH_LOCK_HA((gdth_ha_str *)dev_id,flags);
3173 wait_index = 0;
3174
3175 /* search controller */
3176 if ((hanum = gdth_get_status(&IStatus,irq)) == -1) {
3177 /* spurious interrupt */
3178 if (!gdth_polling)
3179 GDTH_UNLOCK_HA((gdth_ha_str *)dev_id,flags);
3180 return;
3181 }
3182
3183 #ifdef GDTH_STATISTICS
3184 ++act_ints;
3185 #endif
3186
3187 ha = HADATA(gdth_ctr_tab[hanum]);
3188 if (ha->type == GDT_EISA) {
3189 if (IStatus & 0x80) { /* error flag */
3190 IStatus &= ~0x80;
3191 ha->status = inw(ha->bmic + MAILBOXREG+8);
3192 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3193 } else /* no error */
3194 ha->status = S_OK;
3195 ha->info = inl(ha->bmic + MAILBOXREG+12);
3196 ha->service = inw(ha->bmic + MAILBOXREG+10);
3197 ha->info2 = inl(ha->bmic + MAILBOXREG+4);
3198
3199 outb(0xff, ha->bmic + EDOORREG); /* acknowledge interrupt */
3200 outb(0x00, ha->bmic + SEMA1REG); /* reset status semaphore */
3201 } else if (ha->type == GDT_ISA) {
3202 dp2_ptr = (gdt2_dpram_str *)ha->brd;
3203 if (IStatus & 0x80) { /* error flag */
3204 IStatus &= ~0x80;
3205 ha->status = gdth_readw(&dp2_ptr->u.ic.Status);
3206 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3207 } else /* no error */
3208 ha->status = S_OK;
3209 ha->info = gdth_readl(&dp2_ptr->u.ic.Info[0]);
3210 ha->service = gdth_readw(&dp2_ptr->u.ic.Service);
3211 ha->info2 = gdth_readl(&dp2_ptr->u.ic.Info[1]);
3212
3213 gdth_writeb(0xff, &dp2_ptr->io.irqdel); /* acknowledge interrupt */
3214 gdth_writeb(0, &dp2_ptr->u.ic.Cmd_Index); /* reset command index */
3215 gdth_writeb(0, &dp2_ptr->io.Sema1); /* reset status semaphore */
3216 } else if (ha->type == GDT_PCI) {
3217 dp6_ptr = (gdt6_dpram_str *)ha->brd;
3218 if (IStatus & 0x80) { /* error flag */
3219 IStatus &= ~0x80;
3220 ha->status = gdth_readw(&dp6_ptr->u.ic.Status);
3221 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3222 } else /* no error */
3223 ha->status = S_OK;
3224 ha->info = gdth_readl(&dp6_ptr->u.ic.Info[0]);
3225 ha->service = gdth_readw(&dp6_ptr->u.ic.Service);
3226 ha->info2 = gdth_readl(&dp6_ptr->u.ic.Info[1]);
3227
3228 gdth_writeb(0xff, &dp6_ptr->io.irqdel); /* acknowledge interrupt */
3229 gdth_writeb(0, &dp6_ptr->u.ic.Cmd_Index); /* reset command index */
3230 gdth_writeb(0, &dp6_ptr->io.Sema1); /* reset status semaphore */
3231 } else if (ha->type == GDT_PCINEW) {
3232 if (IStatus & 0x80) { /* error flag */
3233 IStatus &= ~0x80;
3234 ha->status = inw(PTR2USHORT(&ha->plx->status));
3235 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3236 } else
3237 ha->status = S_OK;
3238 ha->info = inl(PTR2USHORT(&ha->plx->info[0]));
3239 ha->service = inw(PTR2USHORT(&ha->plx->service));
3240 ha->info2 = inl(PTR2USHORT(&ha->plx->info[1]));
3241
3242 outb(0xff, PTR2USHORT(&ha->plx->edoor_reg));
3243 outb(0x00, PTR2USHORT(&ha->plx->sema1_reg));
3244 } else if (ha->type == GDT_PCIMPR) {
3245 dp6m_ptr = (gdt6m_dpram_str *)ha->brd;
3246 if (IStatus & 0x80) { /* error flag */
3247 IStatus &= ~0x80;
3248 ha->status = gdth_readw(&dp6m_ptr->i960r.status);
3249 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3250 } else /* no error */
3251 ha->status = S_OK;
3252 ha->info = gdth_readl(&dp6m_ptr->i960r.info[0]);
3253 ha->service = gdth_readw(&dp6m_ptr->i960r.service);
3254 ha->info2 = gdth_readl(&dp6m_ptr->i960r.info[1]);
3255
3256 /* event string */
3257 if (IStatus == ASYNCINDEX) {
3258 if (ha->service != SCREENSERVICE &&
3259 (ha->fw_vers & 0xff) >= 0x1a) {
3260 ha->dvr.severity =
3261 gdth_readb(&((gdt6m_dpram_str *)ha->brd)->i960r.severity);
3262 for (i = 0; i < 256; ++i) {
3263 ha->dvr.event_string[i] = gdth_readb
3264 (&((gdt6m_dpram_str *)ha->brd)->i960r.evt_str[i]);
3265 if (ha->dvr.event_string[i] == 0)
3266 break;
3267 }
3268 }
3269 }
3270 gdth_writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
3271 gdth_writeb(0, &dp6m_ptr->i960r.sema1_reg);
3272 } else {
3273 TRACE2(("gdth_interrupt() unknown controller type\n"));
3274 if (!gdth_polling)
3275 GDTH_UNLOCK_HA((gdth_ha_str *)dev_id,flags);
3276 return;
3277 }
3278
3279 TRACE(("gdth_interrupt() index %d stat %d info %d\n",
3280 IStatus,ha->status,ha->info));
3281
3282 if (gdth_from_wait) {
3283 wait_hanum = hanum;
3284 wait_index = (int)IStatus;
3285 }
3286
3287 if (IStatus == ASYNCINDEX) {
3288 TRACE2(("gdth_interrupt() async. event\n"));
3289 gdth_async_event(hanum);
3290 if (!gdth_polling)
3291 GDTH_UNLOCK_HA((gdth_ha_str *)dev_id,flags);
3292 gdth_next(hanum);
3293 return;
3294 }
3295
3296 if (IStatus == SPEZINDEX) {
3297 TRACE2(("Service unknown or not initialized !\n"));
3298 ha->dvr.size = sizeof(ha->dvr.eu.driver);
3299 ha->dvr.eu.driver.ionode = hanum;
3300 gdth_store_event(ha, ES_DRIVER, 4, &ha->dvr);
3301 if (!gdth_polling)
3302 GDTH_UNLOCK_HA((gdth_ha_str *)dev_id,flags);
3303 return;
3304 }
3305 scp = ha->cmd_tab[IStatus-2].cmnd;
3306 Service = ha->cmd_tab[IStatus-2].service;
3307 ha->cmd_tab[IStatus-2].cmnd = UNUSED_CMND;
3308 if (scp == UNUSED_CMND) {
3309 TRACE2(("gdth_interrupt() index to unused command (%d)\n",IStatus));
3310 ha->dvr.size = sizeof(ha->dvr.eu.driver);
3311 ha->dvr.eu.driver.ionode = hanum;
3312 ha->dvr.eu.driver.index = IStatus;
3313 gdth_store_event(ha, ES_DRIVER, 1, &ha->dvr);
3314 if (!gdth_polling)
3315 GDTH_UNLOCK_HA((gdth_ha_str *)dev_id,flags);
3316 return;
3317 }
3318 if (scp == INTERNAL_CMND) {
3319 TRACE(("gdth_interrupt() answer to internal command\n"));
3320 if (!gdth_polling)
3321 GDTH_UNLOCK_HA((gdth_ha_str *)dev_id,flags);
3322 return;
3323 }
3324
3325 TRACE(("gdth_interrupt() sync. status\n"));
3326 rval = gdth_sync_event(hanum,Service,IStatus,scp);
3327 if (!gdth_polling)
3328 GDTH_UNLOCK_HA((gdth_ha_str *)dev_id,flags);
3329 if (rval == 2) {
3330 gdth_putq(hanum,scp,scp->SCp.this_residual);
3331 } else if (rval == 1) {
3332 GDTH_LOCK_SCSI_DONE(flags);
3333 scp->scsi_done(scp);
3334 GDTH_UNLOCK_SCSI_DONE(flags);
3335 }
3336 gdth_next(hanum);
3337 }
3338
3339 static int gdth_sync_event(int hanum,int service,unchar index,Scsi_Cmnd *scp)
3340 {
3341 register gdth_ha_str *ha;
3342 gdth_msg_str *msg;
3343 gdth_cmd_str *cmdp;
3344 unchar b;
3345
3346 ha = HADATA(gdth_ctr_tab[hanum]);
3347 cmdp = ha->pccb;
3348 TRACE(("gdth_sync_event() serv %d status %d\n",
3349 service,ha->status));
3350
3351 if (service == SCREENSERVICE) {
3352 msg = (gdth_msg_str *)ha->pscratch;
3353 ha->scratch_busy = FALSE;
3354 TRACE(("len: %d, answer: %d, ext: %d, alen: %d\n",
3355 msg->msg_len,msg->msg_answer,msg->msg_ext,msg->msg_alen));
3356 if (msg->msg_len)
3357 if (!(msg->msg_answer && msg->msg_ext)) {
3358 msg->msg_text[msg->msg_len] = '\0';
3359 printk("%s",msg->msg_text);
3360 }
3361
3362 if (msg->msg_ext && !msg->msg_answer) {
3363 while (gdth_test_busy(hanum))
3364 gdth_delay(0);
3365 cmdp->Service = SCREENSERVICE;
3366 cmdp->RequestBuffer = SCREEN_CMND;
3367 gdth_get_cmd_index(hanum);
3368 gdth_set_sema0(hanum);
3369 cmdp->OpCode = GDT_READ;
3370 cmdp->BoardNode = LOCALBOARD;
3371 cmdp->u.screen.reserved = 0;
3372 cmdp->u.screen.su.msg.msg_handle= msg->msg_handle;
3373 cmdp->u.screen.su.msg.msg_addr = virt_to_bus(msg);
3374 ha->scratch_busy = TRUE;
3375 ha->cmd_offs_dpmem = 0;
3376 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3377 + sizeof(ulong32);
3378 ha->cmd_cnt = 0;
3379 gdth_copy_command(hanum);
3380 gdth_release_event(hanum);
3381 return 0;
3382 }
3383
3384 if (msg->msg_answer && msg->msg_alen) {
3385 /* default answers (getchar() not possible) */
3386 if (msg->msg_alen == 1) {
3387 msg->msg_alen = 0;
3388 msg->msg_len = 1;
3389 msg->msg_text[0] = 0;
3390 } else {
3391 msg->msg_alen -= 2;
3392 msg->msg_len = 2;
3393 msg->msg_text[0] = 1;
3394 msg->msg_text[1] = 0;
3395 }
3396 msg->msg_ext = 0;
3397 msg->msg_answer = 0;
3398 while (gdth_test_busy(hanum))
3399 gdth_delay(0);
3400 cmdp->Service = SCREENSERVICE;
3401 cmdp->RequestBuffer = SCREEN_CMND;
3402 gdth_get_cmd_index(hanum);
3403 gdth_set_sema0(hanum);
3404 cmdp->OpCode = GDT_WRITE;
3405 cmdp->BoardNode = LOCALBOARD;
3406 cmdp->u.screen.reserved = 0;
3407 cmdp->u.screen.su.msg.msg_handle= msg->msg_handle;
3408 cmdp->u.screen.su.msg.msg_addr = virt_to_bus(msg);
3409 ha->scratch_busy = TRUE;
3410 ha->cmd_offs_dpmem = 0;
3411 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3412 + sizeof(ulong32);
3413 ha->cmd_cnt = 0;
3414 gdth_copy_command(hanum);
3415 gdth_release_event(hanum);
3416 return 0;
3417 }
3418 printk("\n");
3419
3420 } else {
3421 b = virt_ctr ? NUMDATA(scp->host)->busnum : scp->channel;
3422 if (scp->SCp.sent_command == -1 && b != ha->virt_bus) {
3423 ha->raw[BUS_L2P(ha,b)].io_cnt[scp->target]--;
3424 }
3425 /* cache or raw service */
3426 if (ha->status == S_OK) {
3427 scp->SCp.Status = S_OK;
3428 scp->SCp.Message = ha->info;
3429 if (scp->SCp.sent_command != -1) {
3430 TRACE2(("gdth_sync_event(): special cmd 0x%x OK\n",
3431 scp->SCp.sent_command));
3432 /* special commands GDT_CLUST_INFO/GDT_MOUNT ? */
3433 if (scp->SCp.sent_command == GDT_CLUST_INFO) {
3434 ha->hdr[scp->target].cluster_type = (unchar)ha->info;
3435 if (!(ha->hdr[scp->target].cluster_type &
3436 CLUSTER_MOUNTED)) {
3437 /* NOT MOUNTED -> MOUNT */
3438 scp->SCp.sent_command = GDT_MOUNT;
3439 if (ha->hdr[scp->target].cluster_type &
3440 CLUSTER_RESERVED) {
3441 /* cluster drive RESERVED (on the other node) */
3442 scp->SCp.phase = -2; /* reservation conflict */
3443 }
3444 } else {
3445 scp->SCp.sent_command = -1;
3446 }
3447 } else {
3448 if (scp->SCp.sent_command == GDT_MOUNT) {
3449 ha->hdr[scp->target].cluster_type |= CLUSTER_MOUNTED;
3450 ha->hdr[scp->target].media_changed = TRUE;
3451 } else if (scp->SCp.sent_command == GDT_UNMOUNT) {
3452 ha->hdr[scp->target].cluster_type &= ~CLUSTER_MOUNTED;
3453 ha->hdr[scp->target].media_changed = TRUE;
3454 }
3455 scp->SCp.sent_command = -1;
3456 }
3457 /* retry */
3458 scp->SCp.this_residual = HIGH_PRI;
3459 return 2;
3460 } else {
3461 /* RESERVE/RELEASE ? */
3462 if (scp->cmnd[0] == RESERVE) {
3463 ha->hdr[scp->target].cluster_type |= CLUSTER_RESERVED;
3464 } else if (scp->cmnd[0] == RELEASE) {
3465 ha->hdr[scp->target].cluster_type &= ~CLUSTER_RESERVED;
3466 }
3467 scp->result = DID_OK << 16;
3468 scp->sense_buffer[0] = 0;
3469 }
3470 } else if (ha->status == S_BSY) {
3471 TRACE2(("Controller busy -> retry !\n"));
3472 scp->SCp.Status = S_BSY;
3473 scp->SCp.Message = ha->info;
3474 if (scp->SCp.sent_command == GDT_MOUNT)
3475 scp->SCp.sent_command = GDT_CLUST_INFO;
3476 /* retry */
3477 return 2;
3478 } else {
3479 scp->SCp.Status = ha->status;
3480 scp->SCp.Message = ha->info;
3481
3482 if (scp->SCp.sent_command != -1) {
3483 TRACE2(("gdth_sync_event(): special cmd 0x%x error 0x%x\n",
3484 scp->SCp.sent_command, ha->status));
3485 if (scp->SCp.sent_command == GDT_SCAN_START ||
3486 scp->SCp.sent_command == GDT_SCAN_END) {
3487 scp->SCp.sent_command = -1;
3488 /* retry */
3489 scp->SCp.this_residual = HIGH_PRI;
3490 return 2;
3491 }
3492 memset((char*)scp->sense_buffer,0,16);
3493 scp->sense_buffer[0] = 0x70;
3494 scp->sense_buffer[2] = NOT_READY;
3495 scp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
3496 } else if (service == CACHESERVICE) {
3497 if (ha->status == S_CACHE_UNKNOWN &&
3498 (ha->hdr[scp->target].cluster_type &
3499 CLUSTER_RESERVE_STATE) == CLUSTER_RESERVE_STATE) {
3500 /* bus reset -> force GDT_CLUST_INFO */
3501 ha->hdr[scp->target].cluster_type &= ~CLUSTER_RESERVED;
3502 }
3503 memset((char*)scp->sense_buffer,0,16);
3504 scp->sense_buffer[0] = 0x70;
3505 scp->sense_buffer[2] = NOT_READY;
3506 scp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
3507 #if LINUX_VERSION_CODE >= 0x010300
3508 if (scp->done != gdth_scsi_done)
3509 #endif
3510 {
3511 ha->dvr.size = sizeof(ha->dvr.eu.sync);
3512 ha->dvr.eu.sync.ionode = hanum;
3513 ha->dvr.eu.sync.service = service;
3514 ha->dvr.eu.sync.status = ha->status;
3515 ha->dvr.eu.sync.info = ha->info;
3516 ha->dvr.eu.sync.hostdrive = scp->target;
3517 if (ha->status >= 0x8000)
3518 gdth_store_event(ha, ES_SYNC, 0, &ha->dvr);
3519 else
3520 gdth_store_event(ha, ES_SYNC, service, &ha->dvr);
3521 }
3522 } else {
3523 /* sense buffer filled from controller firmware (DMA) */
3524 if (ha->status != S_RAW_SCSI || ha->info >= 0x100) {
3525 scp->result = DID_BAD_TARGET << 16;
3526 } else {
3527 scp->result = (DID_OK << 16) | ha->info;
3528 }
3529 }
3530 }
3531 if (!scp->SCp.have_data_in)
3532 scp->SCp.have_data_in++;
3533 else
3534 return 1;
3535 }
3536
3537 return 0;
3538 }
3539
3540 static char *async_cache_tab[] = {
3541 /* 0*/ "\011\000\002\002\002\004\002\006\004"
3542 "GDT HA %u, service %u, async. status %u/%lu unknown",
3543 /* 1*/ "\011\000\002\002\002\004\002\006\004"
3544 "GDT HA %u, service %u, async. status %u/%lu unknown",
3545 /* 2*/ "\005\000\002\006\004"
3546 "GDT HA %u, Host Drive %lu not ready",
3547 /* 3*/ "\005\000\002\006\004"
3548 "GDT HA %u, Host Drive %lu: REASSIGN not successful and/or data error on reassigned blocks. Drive may crash in the future and should be replaced",
3549 /* 4*/ "\005\000\002\006\004"
3550 "GDT HA %u, mirror update on Host Drive %lu failed",
3551 /* 5*/ "\005\000\002\006\004"
3552 "GDT HA %u, Mirror Drive %lu failed",
3553 /* 6*/ "\005\000\002\006\004"
3554 "GDT HA %u, Mirror Drive %lu: REASSIGN not successful and/or data error on reassigned blocks. Drive may crash in the future and should be replaced",
3555 /* 7*/ "\005\000\002\006\004"
3556 "GDT HA %u, Host Drive %lu write protected",
3557 /* 8*/ "\005\000\002\006\004"
3558 "GDT HA %u, media changed in Host Drive %lu",
3559 /* 9*/ "\005\000\002\006\004"
3560 "GDT HA %u, Host Drive %lu is offline",
3561 /*10*/ "\005\000\002\006\004"
3562 "GDT HA %u, media change of Mirror Drive %lu",
3563 /*11*/ "\005\000\002\006\004"
3564 "GDT HA %u, Mirror Drive %lu is write protected",
3565 /*12*/ "\005\000\002\006\004"
3566 "GDT HA %u, general error on Host Drive %lu. Please check the devices of this drive!",
3567 /*13*/ "\007\000\002\006\002\010\002"
3568 "GDT HA %u, Array Drive %u: Cache Drive %u failed",
3569 /*14*/ "\005\000\002\006\002"
3570 "GDT HA %u, Array Drive %u: FAIL state entered",
3571 /*15*/ "\005\000\002\006\002"
3572 "GDT HA %u, Array Drive %u: error",
3573 /*16*/ "\007\000\002\006\002\010\002"
3574 "GDT HA %u, Array Drive %u: failed drive replaced by Cache Drive %u",
3575 /*17*/ "\005\000\002\006\002"
3576 "GDT HA %u, Array Drive %u: parity build failed",
3577 /*18*/ "\005\000\002\006\002"
3578 "GDT HA %u, Array Drive %u: drive rebuild failed",
3579 /*19*/ "\005\000\002\010\002"
3580 "GDT HA %u, Test of Hot Fix %u failed",
3581 /*20*/ "\005\000\002\006\002"
3582 "GDT HA %u, Array Drive %u: drive build finished successfully",
3583 /*21*/ "\005\000\002\006\002"
3584 "GDT HA %u, Array Drive %u: drive rebuild finished successfully",
3585 /*22*/ "\007\000\002\006\002\010\002"
3586 "GDT HA %u, Array Drive %u: Hot Fix %u activated",
3587 /*23*/ "\005\000\002\006\002"
3588 "GDT HA %u, Host Drive %u: processing of i/o aborted due to serious drive error",
3589 /*24*/ "\005\000\002\010\002"
3590 "GDT HA %u, mirror update on Cache Drive %u completed",
3591 /*25*/ "\005\000\002\010\002"
3592 "GDT HA %u, mirror update on Cache Drive %lu failed",
3593 /*26*/ "\005\000\002\006\002"
3594 "GDT HA %u, Array Drive %u: drive rebuild started",
3595 /*27*/ "\005\000\002\012\001"
3596 "GDT HA %u, Fault bus %u: SHELF OK detected",
3597 /*28*/ "\005\000\002\012\001"
3598 "GDT HA %u, Fault bus %u: SHELF not OK detected",
3599 /*29*/ "\007\000\002\012\001\013\001"
3600 "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug started",
3601 /*30*/ "\007\000\002\012\001\013\001"
3602 "GDT HA %u, Fault bus %u, ID %u: new disk detected",
3603 /*31*/ "\007\000\002\012\001\013\001"
3604 "GDT HA %u, Fault bus %u, ID %u: old disk detected",
3605 /*32*/ "\007\000\002\012\001\013\001"
3606 "GDT HA %u, Fault bus %u, ID %u: plugging an active disk is illegal",
3607 /*33*/ "\007\000\002\012\001\013\001"
3608 "GDT HA %u, Fault bus %u, ID %u: illegal device detected",
3609 /*34*/ "\011\000\002\012\001\013\001\006\004"
3610 "GDT HA %u, Fault bus %u, ID %u: insufficient disk capacity (%lu MB required)",
3611 /*35*/ "\007\000\002\012\001\013\001"
3612 "GDT HA %u, Fault bus %u, ID %u: disk write protected",
3613 /*36*/ "\007\000\002\012\001\013\001"
3614 "GDT HA %u, Fault bus %u, ID %u: disk not available",
3615 /*37*/ "\007\000\002\012\001\006\004"
3616 "GDT HA %u, Fault bus %u: swap detected (%lu)",
3617 /*38*/ "\007\000\002\012\001\013\001"
3618 "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug finished successfully",
3619 /*39*/ "\007\000\002\012\001\013\001"
3620 "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug aborted due to user Hot Plug",
3621 /*40*/ "\007\000\002\012\001\013\001"
3622 "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug aborted",
3623 /*41*/ "\007\000\002\012\001\013\001"
3624 "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug for Hot Fix started",
3625 /*42*/ "\005\000\002\006\002"
3626 "GDT HA %u, Array Drive %u: drive build started",
3627 /*43*/ "\003\000\002"
3628 "GDT HA %u, DRAM parity error detected",
3629 /*44*/ "\005\000\002\006\002"
3630 "GDT HA %u, Mirror Drive %u: update started",
3631 /*45*/ "\007\000\002\006\002\010\002"
3632 "GDT HA %u, Mirror Drive %u: Hot Fix %u activated",
3633 /*46*/ "\005\000\002\006\002"
3634 "GDT HA %u, Array Drive %u: no matching Pool Hot Fix Drive available",
3635 /*47*/ "\005\000\002\006\002"
3636 "GDT HA %u, Array Drive %u: Pool Hot Fix Drive available",
3637 /*48*/ "\005\000\002\006\002"
3638 "GDT HA %u, Mirror Drive %u: no matching Pool Hot Fix Drive available",
3639 /*49*/ "\005\000\002\006\002"
3640 "GDT HA %u, Mirror Drive %u: Pool Hot Fix Drive available",
3641 /*50*/ "\007\000\002\012\001\013\001"
3642 "GDT HA %u, SCSI bus %u, ID %u: IGNORE_WIDE_RESIDUE message received",
3643 /*51*/ "\005\000\002\006\002"
3644 "GDT HA %u, Array Drive %u: expand started",
3645 /*52*/ "\005\000\002\006\002"
3646 "GDT HA %u, Array Drive %u: expand finished successfully",
3647 /*53*/ "\005\000\002\006\002"
3648 "GDT HA %u, Array Drive %u: expand failed",
3649 /*54*/ "\003\000\002"
3650 "GDT HA %u, CPU temperature critical",
3651 /*55*/ "\003\000\002"
3652 "GDT HA %u, CPU temperature OK",
3653 /*56*/ "\005\000\002\006\004"
3654 "GDT HA %u, Host drive %lu created",
3655 /*57*/ "\005\000\002\006\002"
3656 "GDT HA %u, Array Drive %u: expand restarted",
3657 /*58*/ "\005\000\002\006\002"
3658 "GDT HA %u, Array Drive %u: expand stopped",
3659 /*59*/ "\005\000\002\010\002"
3660 "GDT HA %u, Mirror Drive %u: drive build quited",
3661 /*60*/ "\005\000\002\006\002"
3662 "GDT HA %u, Array Drive %u: parity build quited",
3663 /*61*/ "\005\000\002\006\002"
3664 "GDT HA %u, Array Drive %u: drive rebuild quited",
3665 /*62*/ "\005\000\002\006\002"
3666 "GDT HA %u, Array Drive %u: parity verify started",
3667 /*63*/ "\005\000\002\006\002"
3668 "GDT HA %u, Array Drive %u: parity verify done",
3669 /*64*/ "\005\000\002\006\002"
3670 "GDT HA %u, Array Drive %u: parity verify failed",
3671 /*65*/ "\005\000\002\006\002"
3672 "GDT HA %u, Array Drive %u: parity error detected",
3673 /*66*/ "\005\000\002\006\002"
3674 "GDT HA %u, Array Drive %u: parity verify quited",
3675 /*67*/ "\005\000\002\006\002"
3676 "GDT HA %u, Host Drive %u reserved",
3677 /*68*/ "\005\000\002\006\002"
3678 "GDT HA %u, Host Drive %u mounted and released",
3679 /*69*/ "\005\000\002\006\002"
3680 "GDT HA %u, Host Drive %u released",
3681 /*70*/ "\003\000\002"
3682 "GDT HA %u, DRAM error detected and corrected with ECC",
3683 /*71*/ "\003\000\002"
3684 "GDT HA %u, Uncorrectable DRAM error detected with ECC",
3685 /*72*/ "\011\000\002\012\001\013\001\014\001"
3686 "GDT HA %u, SCSI bus %u, ID %u, LUN %u: reassigning block",
3687 /*73*/ "\005\000\002\006\002"
3688 "GDT HA %u, Host drive %u resetted locally",
3689 /*74*/ "\005\000\002\006\002"
3690 "GDT HA %u, Host drive %u resetted remotely",
3691 /*75*/ "\003\000\002"
3692 "GDT HA %u, async. status 75 unknown",
3693 };
3694
3695
3696 static int gdth_async_event(int hanum)
3697 {
3698 gdth_ha_str *ha;
3699 gdth_msg_str *msg;
3700 gdth_cmd_str *cmdp;
3701 int cmd_index;
3702
3703 ha = HADATA(gdth_ctr_tab[hanum]);
3704 cmdp= ha->pccb;
3705 msg = (gdth_msg_str *)ha->pscratch;
3706 TRACE2(("gdth_async_event() ha %d serv %d\n",
3707 hanum,ha->service));
3708
3709 if (ha->service == SCREENSERVICE) {
3710 if (ha->status == MSG_REQUEST) {
3711 while (gdth_test_busy(hanum))
3712 gdth_delay(0);
3713 cmdp->Service = SCREENSERVICE;
3714 cmdp->RequestBuffer = SCREEN_CMND;
3715 cmd_index = gdth_get_cmd_index(hanum);
3716 gdth_set_sema0(hanum);
3717 cmdp->OpCode = GDT_READ;
3718 cmdp->BoardNode = LOCALBOARD;
3719 cmdp->u.screen.reserved = 0;
3720 cmdp->u.screen.su.msg.msg_handle= MSG_INV_HANDLE;
3721 cmdp->u.screen.su.msg.msg_addr = virt_to_bus(msg);
3722 ha->scratch_busy = TRUE;
3723 ha->cmd_offs_dpmem = 0;
3724 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3725 + sizeof(ulong32);
3726 ha->cmd_cnt = 0;
3727 gdth_copy_command(hanum);
3728 if (ha->type == GDT_EISA)
3729 printk("[EISA slot %d] ",(ushort)ha->brd_phys);
3730 else if (ha->type == GDT_ISA)
3731 printk("[DPMEM 0x%4X] ",(ushort)ha->brd_phys);
3732 else
3733 printk("[PCI %d/%d] ",(ushort)(ha->brd_phys>>8),
3734 (ushort)((ha->brd_phys>>3)&0x1f));
3735 gdth_release_event(hanum);
3736 }
3737
3738 } else {
3739 if (ha->type == GDT_PCIMPR &&
3740 (ha->fw_vers & 0xff) >= 0x1a) {
3741 ha->dvr.size = 0;
3742 ha->dvr.eu.async.ionode = hanum;
3743 ha->dvr.eu.async.status = ha->status;
3744 /* severity and event_string already set! */
3745 } else {
3746 ha->dvr.size = sizeof(ha->dvr.eu.async);
3747 ha->dvr.eu.async.ionode = hanum;
3748 ha->dvr.eu.async.service = ha->service;
3749 ha->dvr.eu.async.status = ha->status;
3750 ha->dvr.eu.async.info = ha->info;
3751 *(ulong32 *)ha->dvr.eu.async.scsi_coord = ha->info2;
3752 }
3753 gdth_store_event( ha, ES_ASYNC, ha->service, &ha->dvr );
3754 gdth_log_event( &ha->dvr, NULL );
3755
3756 /* new host drive from expand? */
3757 if (ha->service == CACHESERVICE && ha->status == 56) {
3758 TRACE2(("gdth_async_event(): new host drive %d created\n",
3759 (ushort)ha->info));
3760 /* gdth_analyse_hdrive(hanum, (ushort)ha->info); */
3761 }
3762 }
3763 return 1;
3764 }
3765
3766 static void gdth_log_event(gdth_evt_data *dvr, char *buffer)
3767 {
3768 gdth_stackframe stack;
3769 char *f = NULL;
3770 int i,j;
3771
3772 TRACE2(("gdth_log_event()\n"));
3773 if (dvr->size == 0) {
3774 if (buffer == NULL) {
3775 printk("Adapter %d: %s\n",dvr->eu.async.ionode,dvr->event_string);
3776 } else {
3777 sprintf(buffer,"Adapter %d: %s\n",
3778 dvr->eu.async.ionode,dvr->event_string);
3779 }
3780 } else if (dvr->eu.async.service == CACHESERVICE &&
3781 INDEX_OK(dvr->eu.async.status, async_cache_tab)) {
3782 TRACE2(("GDT: Async. event cache service, event no.: %d\n",
3783 dvr->eu.async.status));
3784
3785 f = async_cache_tab[dvr->eu.async.status];
3786
3787 /* i: parameter to push, j: stack element to fill */
3788 for (j=0,i=1; i < f[0]; i+=2) {
3789 switch (f[i+1]) {
3790 case 4:
3791 stack.b[j++] = *(ulong32*)&dvr->eu.stream[(int)f[i]];
3792 break;
3793 case 2:
3794 stack.b[j++] = *(ushort*)&dvr->eu.stream[(int)f[i]];
3795 break;
3796 case 1:
3797 stack.b[j++] = *(unchar*)&dvr->eu.stream[(int)f[i]];
3798 break;
3799 default:
3800 break;
3801 }
3802 }
3803
3804 if (buffer == NULL) {
3805 printk(&f[(int)f[0]],stack);
3806 printk("\n");
3807 } else {
3808 sprintf(buffer,&f[(int)f[0]],stack);
3809 }
3810
3811 } else {
3812 if (buffer == NULL) {
3813 printk("GDT HA %u, Unknown async. event service %d event no. %d\n",
3814 dvr->eu.async.ionode,dvr->eu.async.service,dvr->eu.async.status);
3815 } else {
3816 sprintf(buffer,"GDT HA %u, Unknown async. event service %d event no. %d",
3817 dvr->eu.async.ionode,dvr->eu.async.service,dvr->eu.async.status);
3818 }
3819 }
3820 }
3821
3822 #ifdef GDTH_STATISTICS
3823 void gdth_timeout(ulong data)
3824 {
3825 ulong32 i;
3826 Scsi_Cmnd *nscp;
3827 gdth_ha_str *ha;
3828 ulong flags;
3829 int hanum = 0;
3830
3831 ha = HADATA(gdth_ctr_tab[hanum]);
3832 GDTH_LOCK_HA(ha, flags);
3833
3834 for (act_stats=0,i=0; i<GDTH_MAXCMDS; ++i)
3835 if (ha->cmd_tab[i].cmnd != UNUSED_CMND)
3836 ++act_stats;
3837
3838 for (act_rq=0,nscp=ha->req_first; nscp; nscp=(Scsi_Cmnd*)nscp->SCp.ptr)
3839 ++act_rq;
3840
3841 TRACE2(("gdth_to(): ints %d, ios %d, act_stats %d, act_rq %d\n",
3842 act_ints, act_ios, act_stats, act_rq));
3843 act_ints = act_ios = 0;
3844
3845 gdth_timer.expires = jiffies + 30 * HZ;
3846 add_timer(&gdth_timer);
3847 GDTH_UNLOCK_HA(ha, flags);
3848 }
3849 #endif
3850
3851 GDTH_INITFUNC(void, internal_setup(char *str,int *ints))
3852 {
3853 int i, argc;
3854 char *cur_str, *argv;
3855
3856 TRACE2(("internal_setup() str %s ints[0] %d\n",
3857 str ? str:"NULL", ints ? ints[0]:0));
3858
3859 /* read irq[] from ints[] */
3860 if (ints) {
3861 argc = ints[0];
3862 if (argc > 0) {
3863 if (argc > MAXHA)
3864 argc = MAXHA;
3865 for (i = 0; i < argc; ++i)
3866 irq[i] = ints[i+1];
3867 }
3868 }
3869
3870 /* analyse string */
3871 argv = str;
3872 while (argv && (cur_str = strchr(argv, ':'))) {
3873 int val = 0, c = *++cur_str;
3874
3875 if (c == 'n' || c == 'N')
3876 val = 0;
3877 else if (c == 'y' || c == 'Y')
3878 val = 1;
3879 else
3880 val = (int)simple_strtoul(cur_str, NULL, 0);
3881
3882 if (!strncmp(argv, "disable:", 8))
3883 disable = val;
3884 else if (!strncmp(argv, "reserve_mode:", 13))
3885 reserve_mode = val;
3886 else if (!strncmp(argv, "reverse_scan:", 13))
3887 reverse_scan = val;
3888 else if (!strncmp(argv, "hdr_channel:", 12))
3889 hdr_channel = val;
3890 else if (!strncmp(argv, "max_ids:", 8))
3891 max_ids = val;
3892 else if (!strncmp(argv, "rescan:", 7))
3893 rescan = val;
3894 else if (!strncmp(argv, "virt_ctr:", 9))
3895 virt_ctr = val;
3896 else if (!strncmp(argv, "shared_access:", 14))
3897 shared_access = val;
3898 else if (!strncmp(argv, "reserve_list:", 13)) {
3899 reserve_list[0] = val;
3900 for (i = 1; i < MAX_RES_ARGS; i++) {
3901 cur_str = strchr(cur_str, ',');
3902 if (!cur_str)
3903 break;
3904 if (!isdigit((int)*++cur_str)) {
3905 --cur_str;
3906 break;
3907 }
3908 reserve_list[i] =
3909 (int)simple_strtoul(cur_str, NULL, 0);
3910 }
3911 if (!cur_str)
3912 break;
3913 argv = ++cur_str;
3914 continue;
3915 }
3916
3917 if ((argv = strchr(argv, ',')))
3918 ++argv;
3919 }
3920 }
3921
3922 GDTH_INITFUNC(int, option_setup(char *str))
3923 {
3924 int ints[MAXHA];
3925 char *cur = str;
3926 int i = 1;
3927
3928 TRACE2(("option_setup() str %s\n", str ? str:"NULL"));
3929
3930 while (cur && isdigit(*cur) && i <= MAXHA) {
3931 ints[i++] = simple_strtoul(cur, NULL, 0);
3932 if ((cur = strchr(cur, ',')) != NULL) cur++;
3933 }
3934
3935 ints[0] = i - 1;
3936 internal_setup(cur, ints);
3937 return 1;
3938 }
3939
3940 GDTH_INITFUNC(int, gdth_detect(Scsi_Host_Template *shtp))
3941 {
3942 struct Scsi_Host *shp;
3943 gdth_ha_str *ha;
3944 ulong32 isa_bios;
3945 ushort eisa_slot;
3946 int i,hanum,cnt,ctr;
3947 unchar b;
3948
3949
3950 #ifdef DEBUG_GDTH
3951 printk("GDT: This driver contains debugging information !! Trace level = %d\n",
3952 DebugState);
3953 printk(" Destination of debugging information: ");
3954 #ifdef __SERIAL__
3955 #ifdef __COM2__
3956 printk("Serial port COM2\n");
3957 #else
3958 printk("Serial port COM1\n");
3959 #endif
3960 #else
3961 printk("Console\n");
3962 #endif
3963 gdth_delay(3000);
3964 #endif
3965
3966 TRACE(("gdth_detect()\n"));
3967
3968 if (disable) {
3969 printk("GDT: Controller driver disabled from command line !\n");
3970 return 0;
3971 }
3972
3973 /* initializations */
3974 gdth_polling = TRUE; b = 0;
3975 gdth_clear_events();
3976
3977 /* scanning for controllers, at first: ISA controller */
3978 for (isa_bios=0xc8000UL; isa_bios<=0xd8000UL; isa_bios+=0x8000UL) {
3979 if (gdth_ctr_count >= MAXHA)
3980 break;
3981 if (gdth_search_isa(isa_bios)) { /* controller found */
3982 shp = scsi_register(shtp,sizeof(gdth_ext_str));
3983 ha = HADATA(shp);
3984 if (!gdth_init_isa(isa_bios,ha)) {
3985 scsi_unregister(shp);
3986 continue;
3987 }
3988 #ifdef __ia64__
3989 break;
3990 #else
3991 /* controller found and initialized */
3992 printk("Configuring GDT-ISA HA at BIOS 0x%05X IRQ %u DRQ %u\n",
3993 isa_bios,ha->irq,ha->drq);
3994
3995 #if LINUX_VERSION_CODE >= 0x010346
3996 if (request_irq(ha->irq,gdth_interrupt,SA_INTERRUPT,"gdth",ha))
3997 #else
3998 if (request_irq(ha->irq,gdth_interrupt,SA_INTERRUPT,"gdth"))
3999 #endif
4000 {
4001 printk("GDT-ISA: Unable to allocate IRQ\n");
4002 scsi_unregister(shp);
4003 continue;
4004 }
4005 if (request_dma(ha->drq,"gdth")) {
4006 printk("GDT-ISA: Unable to allocate DMA channel\n");
4007 #if LINUX_VERSION_CODE >= 0x010346
4008 free_irq(ha->irq,ha);
4009 #else
4010 free_irq(ha->irq);
4011 #endif
4012 scsi_unregister(shp);
4013 continue;
4014 }
4015 set_dma_mode(ha->drq,DMA_MODE_CASCADE);
4016 enable_dma(ha->drq);
4017 shp->unchecked_isa_dma = 1;
4018 shp->irq = ha->irq;
4019 shp->dma_channel = ha->drq;
4020 hanum = gdth_ctr_count;
4021 gdth_ctr_tab[gdth_ctr_count++] = shp;
4022 gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
4023
4024 NUMDATA(shp)->hanum = (ushort)hanum;
4025 NUMDATA(shp)->busnum= 0;
4026
4027 ha->pccb = CMDDATA(shp);
4028 #if LINUX_VERSION_CODE >= 0x020322
4029 ha->pscratch = (void *) __get_free_pages(GFP_ATOMIC | GFP_DMA,
4030 GDTH_SCRATCH_ORD);
4031 #else
4032 ha->pscratch = scsi_init_malloc(GDTH_SCRATCH, GFP_ATOMIC | GFP_DMA);
4033 #endif
4034 ha->scratch_busy = FALSE;
4035 ha->req_first = NULL;
4036 ha->tid_cnt = MAX_HDRIVES;
4037 if (max_ids > 0 && max_ids < ha->tid_cnt)
4038 ha->tid_cnt = max_ids;
4039 for (i=0; i<GDTH_MAXCMDS; ++i)
4040 ha->cmd_tab[i].cmnd = UNUSED_CMND;
4041 ha->scan_mode = rescan ? 0x10 : 0;
4042
4043 if (ha->pscratch == NULL || !gdth_search_drives(hanum)) {
4044 printk("GDT-ISA: Error during device scan\n");
4045 --gdth_ctr_count;
4046 --gdth_ctr_vcount;
4047 if (ha->pscratch != NULL)
4048 #if LINUX_VERSION_CODE >= 0x020322
4049 free_pages((unsigned long)ha->pscratch, GDTH_SCRATCH_ORD);
4050 #else
4051 scsi_init_free((void *)ha->pscratch, GDTH_SCRATCH);
4052 #endif
4053 #if LINUX_VERSION_CODE >= 0x010346
4054 free_irq(ha->irq,ha);
4055 #else
4056 free_irq(ha->irq);
4057 #endif
4058 scsi_unregister(shp);
4059 continue;
4060 }
4061 if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
4062 hdr_channel = ha->bus_cnt;
4063 ha->virt_bus = hdr_channel;
4064
4065 #if LINUX_VERSION_CODE >= 0x020000
4066 shp->max_id = ha->tid_cnt;
4067 shp->max_lun = MAXLUN;
4068 shp->max_channel = virt_ctr ? 0 : ha->bus_cnt;
4069 if (virt_ctr)
4070 #endif
4071 {
4072 virt_ctr = 1;
4073 /* register addit. SCSI channels as virtual controllers */
4074 for (b = 1; b < ha->bus_cnt + 1; ++b) {
4075 shp = scsi_register(shtp,sizeof(gdth_num_str));
4076 shp->unchecked_isa_dma = 1;
4077 shp->irq = ha->irq;
4078 shp->dma_channel = ha->drq;
4079 gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
4080 NUMDATA(shp)->hanum = (ushort)hanum;
4081 NUMDATA(shp)->busnum = b;
4082 }
4083 }
4084
4085 GDTH_INIT_LOCK_HA(ha);
4086 gdth_enable_int(hanum);
4087 #endif /* !__ia64__ */
4088 }
4089 }
4090
4091 /* scanning for EISA controllers */
4092 for (eisa_slot=0x1000; eisa_slot<=0x8000; eisa_slot+=0x1000) {
4093 if (gdth_ctr_count >= MAXHA)
4094 break;
4095 if (gdth_search_eisa(eisa_slot)) { /* controller found */
4096 shp = scsi_register(shtp,sizeof(gdth_ext_str));
4097 ha = HADATA(shp);
4098 if (!gdth_init_eisa(eisa_slot,ha)) {
4099 scsi_unregister(shp);
4100 continue;
4101 }
4102 /* controller found and initialized */
4103 printk("Configuring GDT-EISA HA at Slot %d IRQ %u\n",
4104 eisa_slot>>12,ha->irq);
4105
4106 #if LINUX_VERSION_CODE >= 0x010346
4107 if (request_irq(ha->irq,gdth_interrupt,SA_INTERRUPT,"gdth",ha))
4108 #else
4109 if (request_irq(ha->irq,gdth_interrupt,SA_INTERRUPT,"gdth"))
4110 #endif
4111 {
4112 printk("GDT-EISA: Unable to allocate IRQ\n");
4113 scsi_unregister(shp);
4114 continue;
4115 }
4116 shp->unchecked_isa_dma = 0;
4117 shp->irq = ha->irq;
4118 shp->dma_channel = 0xff;
4119 hanum = gdth_ctr_count;
4120 gdth_ctr_tab[gdth_ctr_count++] = shp;
4121 gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
4122
4123 NUMDATA(shp)->hanum = (ushort)hanum;
4124 NUMDATA(shp)->busnum= 0;
4125 TRACE2(("EISA detect Bus 0: hanum %d\n",
4126 NUMDATA(shp)->hanum));
4127
4128 ha->pccb = CMDDATA(shp);
4129 #if LINUX_VERSION_CODE >= 0x020322
4130 ha->pscratch = (void *) __get_free_pages(GFP_ATOMIC | GFP_DMA,
4131 GDTH_SCRATCH_ORD);
4132 #else
4133 ha->pscratch = scsi_init_malloc(GDTH_SCRATCH, GFP_ATOMIC | GFP_DMA);
4134 #endif
4135 ha->scratch_busy = FALSE;
4136 ha->req_first = NULL;
4137 ha->tid_cnt = MAX_HDRIVES;
4138 if (max_ids > 0 && max_ids < ha->tid_cnt)
4139 ha->tid_cnt = max_ids;
4140 for (i=0; i<GDTH_MAXCMDS; ++i)
4141 ha->cmd_tab[i].cmnd = UNUSED_CMND;
4142 ha->scan_mode = rescan ? 0x10 : 0;
4143
4144 if (ha->pscratch == NULL || !gdth_search_drives(hanum)) {
4145 printk("GDT-EISA: Error during device scan\n");
4146 --gdth_ctr_count;
4147 --gdth_ctr_vcount;
4148 if (ha->pscratch != NULL)
4149 #if LINUX_VERSION_CODE >= 0x020322
4150 free_pages((unsigned long)ha->pscratch, GDTH_SCRATCH_ORD);
4151 #else
4152 scsi_init_free((void *)ha->pscratch, GDTH_SCRATCH);
4153 #endif
4154 #if LINUX_VERSION_CODE >= 0x010346
4155 free_irq(ha->irq,ha);
4156 #else
4157 free_irq(ha->irq);
4158 #endif
4159 scsi_unregister(shp);
4160 continue;
4161 }
4162 if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
4163 hdr_channel = ha->bus_cnt;
4164 ha->virt_bus = hdr_channel;
4165
4166 #if LINUX_VERSION_CODE >= 0x020000
4167 shp->max_id = ha->tid_cnt;
4168 shp->max_lun = MAXLUN;
4169 shp->max_channel = virt_ctr ? 0 : ha->bus_cnt;
4170 if (virt_ctr)
4171 #endif
4172 {
4173 virt_ctr = 1;
4174 /* register addit. SCSI channels as virtual controllers */
4175 for (b = 1; b < ha->bus_cnt + 1; ++b) {
4176 shp = scsi_register(shtp,sizeof(gdth_num_str));
4177 shp->unchecked_isa_dma = 0;
4178 shp->irq = ha->irq;
4179 shp->dma_channel = 0xff;
4180 gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
4181 NUMDATA(shp)->hanum = (ushort)hanum;
4182 NUMDATA(shp)->busnum = b;
4183 }
4184 }
4185
4186 GDTH_INIT_LOCK_HA(ha);
4187 gdth_enable_int(hanum);
4188 }
4189 }
4190
4191 /* scanning for PCI controllers */
4192 #if LINUX_VERSION_CODE >= 0x2015C
4193 if (pci_present())
4194 #else
4195 if (pcibios_present())
4196 #endif
4197 {
4198 gdth_pci_str pcistr[MAXHA];
4199
4200 cnt = gdth_search_pci(pcistr);
4201 gdth_sort_pci(pcistr,cnt);
4202 for (ctr = 0; ctr < cnt; ++ctr) {
4203 if (gdth_ctr_count >= MAXHA)
4204 break;
4205 shp = scsi_register(shtp,sizeof(gdth_ext_str));
4206 ha = HADATA(shp);
4207 if (!gdth_init_pci(&pcistr[ctr],ha)) {
4208 scsi_unregister(shp);
4209 continue;
4210 }
4211 /* controller found and initialized */
4212 printk("Configuring GDT-PCI HA at %d/%d IRQ %u\n",
4213 pcistr[ctr].bus,PCI_SLOT(pcistr[ctr].device_fn),ha->irq);
4214
4215 #if LINUX_VERSION_CODE >= 0x010346
4216 if (request_irq(ha->irq, gdth_interrupt,
4217 SA_INTERRUPT|SA_SHIRQ, "gdth", ha))
4218 #else
4219 if (request_irq(ha->irq, gdth_interrupt,
4220 SA_INTERRUPT|SA_SHIRQ, "gdth"))
4221 #endif
4222 {
4223 printk("GDT-PCI: Unable to allocate IRQ\n");
4224 scsi_unregister(shp);
4225 continue;
4226 }
4227 shp->unchecked_isa_dma = 0;
4228 shp->irq = ha->irq;
4229 shp->dma_channel = 0xff;
4230 hanum = gdth_ctr_count;
4231 gdth_ctr_tab[gdth_ctr_count++] = shp;
4232 gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
4233
4234 NUMDATA(shp)->hanum = (ushort)hanum;
4235 NUMDATA(shp)->busnum= 0;
4236
4237 ha->pccb = CMDDATA(shp);
4238 #if LINUX_VERSION_CODE >= 0x020322
4239 ha->pscratch = (void *) __get_free_pages(GFP_ATOMIC | GFP_DMA,
4240 GDTH_SCRATCH_ORD);
4241 #else
4242 ha->pscratch = scsi_init_malloc(GDTH_SCRATCH, GFP_ATOMIC | GFP_DMA);
4243 #endif
4244 ha->scratch_busy = FALSE;
4245 ha->req_first = NULL;
4246 ha->tid_cnt = pcistr[ctr].device_id >= 0x200 ? MAXID : MAX_HDRIVES;
4247 if (max_ids > 0 && max_ids < ha->tid_cnt)
4248 ha->tid_cnt = max_ids;
4249 for (i=0; i<GDTH_MAXCMDS; ++i)
4250 ha->cmd_tab[i].cmnd = UNUSED_CMND;
4251 ha->scan_mode = rescan ? 0x10 : 0;
4252
4253 if (ha->pscratch == NULL || !gdth_search_drives(hanum)) {
4254 printk("GDT-PCI: Error during device scan\n");
4255 --gdth_ctr_count;
4256 --gdth_ctr_vcount;
4257 if (ha->pscratch != NULL)
4258 #if LINUX_VERSION_CODE >= 0x020322
4259 free_pages((unsigned long)ha->pscratch, GDTH_SCRATCH_ORD);
4260 #else
4261 scsi_init_free((void *)ha->pscratch, GDTH_SCRATCH);
4262 #endif
4263 #if LINUX_VERSION_CODE >= 0x010346
4264 free_irq(ha->irq,ha);
4265 #else
4266 free_irq(ha->irq);
4267 #endif
4268 scsi_unregister(shp);
4269 continue;
4270 }
4271 if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
4272 hdr_channel = ha->bus_cnt;
4273 ha->virt_bus = hdr_channel;
4274
4275 #if LINUX_VERSION_CODE >= 0x020000
4276 shp->max_id = ha->tid_cnt;
4277 shp->max_lun = MAXLUN;
4278 shp->max_channel = virt_ctr ? 0 : ha->bus_cnt;
4279 if (virt_ctr)
4280 #endif
4281 {
4282 virt_ctr = 1;
4283 /* register addit. SCSI channels as virtual controllers */
4284 for (b = 1; b < ha->bus_cnt + 1; ++b) {
4285 shp = scsi_register(shtp,sizeof(gdth_num_str));
4286 shp->unchecked_isa_dma = 0;
4287 shp->irq = ha->irq;
4288 shp->dma_channel = 0xff;
4289 gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
4290 NUMDATA(shp)->hanum = (ushort)hanum;
4291 NUMDATA(shp)->busnum = b;
4292 }
4293 }
4294
4295 GDTH_INIT_LOCK_HA(ha);
4296 gdth_enable_int(hanum);
4297 }
4298 }
4299
4300 TRACE2(("gdth_detect() %d controller detected\n",gdth_ctr_count));
4301 if (gdth_ctr_count > 0) {
4302 #ifdef GDTH_STATISTICS
4303 TRACE2(("gdth_detect(): Initializing timer !\n"));
4304 init_timer(&gdth_timer);
4305 gdth_timer.expires = jiffies + HZ;
4306 gdth_timer.data = 0L;
4307 gdth_timer.function = gdth_timeout;
4308 add_timer(&gdth_timer);
4309 #endif
4310 #if LINUX_VERSION_CODE >= 0x020100
4311 register_reboot_notifier(&gdth_notifier);
4312 #endif
4313 }
4314 gdth_polling = FALSE;
4315 return gdth_ctr_vcount;
4316 }
4317
4318
4319 int gdth_release(struct Scsi_Host *shp)
4320 {
4321 int hanum;
4322 gdth_ha_str *ha;
4323
4324 TRACE2(("gdth_release()\n"));
4325 if (NUMDATA(shp)->busnum == 0) {
4326 hanum = NUMDATA(shp)->hanum;
4327 ha = HADATA(gdth_ctr_tab[hanum]);
4328 #if LINUX_VERSION_CODE >= 0x010300
4329 gdth_flush(hanum);
4330 #endif
4331
4332 if (shp->irq) {
4333 #if LINUX_VERSION_CODE >= 0x010346
4334 free_irq(shp->irq,ha);
4335 #else
4336 free_irq(shp->irq);
4337 #endif
4338 }
4339 #ifndef __ia64__
4340 if (shp->dma_channel != 0xff) {
4341 free_dma(shp->dma_channel);
4342 }
4343 #endif
4344 #if LINUX_VERSION_CODE >= 0x020322
4345 free_pages((unsigned long)ha->pscratch, GDTH_SCRATCH_ORD);
4346 #else
4347 scsi_init_free((void *)ha->pscratch, GDTH_SCRATCH);
4348 #endif
4349 gdth_ctr_released++;
4350 TRACE2(("gdth_release(): HA %d of %d\n",
4351 gdth_ctr_released, gdth_ctr_count));
4352
4353 if (gdth_ctr_released == gdth_ctr_count) {
4354 #ifdef GDTH_STATISTICS
4355 del_timer(&gdth_timer);
4356 #endif
4357 #if LINUX_VERSION_CODE >= 0x020100
4358 unregister_reboot_notifier(&gdth_notifier);
4359 #endif
4360 }
4361 }
4362
4363 scsi_unregister(shp);
4364 return 0;
4365 }
4366
4367
4368 static const char *gdth_ctr_name(int hanum)
4369 {
4370 gdth_ha_str *ha;
4371
4372 TRACE2(("gdth_ctr_name()\n"));
4373
4374 ha = HADATA(gdth_ctr_tab[hanum]);
4375
4376 if (ha->type == GDT_EISA) {
4377 switch (ha->stype) {
4378 case GDT3_ID:
4379 return("GDT3000/3020");
4380 case GDT3A_ID:
4381 return("GDT3000A/3020A/3050A");
4382 case GDT3B_ID:
4383 return("GDT3000B/3010A");
4384 }
4385 } else if (ha->type == GDT_ISA) {
4386 return("GDT2000/2020");
4387 } else if (ha->type == GDT_PCI) {
4388 switch (ha->stype) {
4389 case PCI_DEVICE_ID_VORTEX_GDT60x0:
4390 return("GDT6000/6020/6050");
4391 case PCI_DEVICE_ID_VORTEX_GDT6000B:
4392 return("GDT6000B/6010");
4393 }
4394 }
4395 /* new controllers (GDT_PCINEW, GDT_PCIMPR, ..) use board_info IOCTL! */
4396
4397 return("");
4398 }
4399
4400 const char *gdth_info(struct Scsi_Host *shp)
4401 {
4402 int hanum;
4403 gdth_ha_str *ha;
4404
4405 TRACE2(("gdth_info()\n"));
4406 hanum = NUMDATA(shp)->hanum;
4407 ha = HADATA(gdth_ctr_tab[hanum]);
4408
4409 return ((const char *)ha->binfo.type_string);
4410 }
4411
4412 /* old error handling */
4413 int gdth_abort(Scsi_Cmnd *scp)
4414 {
4415 TRACE2(("gdth_abort() reason %d\n",scp->abort_reason));
4416 return SCSI_ABORT_SNOOZE;
4417 }
4418
4419 #if LINUX_VERSION_CODE >= 0x010346
4420 int gdth_reset(Scsi_Cmnd *scp, unsigned int reset_flags)
4421 #else
4422 int gdth_reset(Scsi_Cmnd *scp)
4423 #endif
4424 {
4425 TRACE2(("gdth_reset()\n"));
4426 return SCSI_RESET_PUNT;
4427 }
4428
4429 #if LINUX_VERSION_CODE >= 0x02015F
4430 /* new error handling */
4431 int gdth_eh_abort(Scsi_Cmnd *scp)
4432 {
4433 TRACE2(("gdth_eh_abort()\n"));
4434 return FAILED;
4435 }
4436
4437 int gdth_eh_device_reset(Scsi_Cmnd *scp)
4438 {
4439 TRACE2(("gdth_eh_device_reset()\n"));
4440 return FAILED;
4441 }
4442
4443 int gdth_eh_bus_reset(Scsi_Cmnd *scp)
4444 {
4445 int i, hanum;
4446 gdth_ha_str *ha;
4447 ulong flags;
4448 Scsi_Cmnd *cmnd;
4449 unchar b;
4450
4451 TRACE2(("gdth_eh_bus_reset()\n"));
4452 hanum = NUMDATA(scp->host)->hanum;
4453 b = virt_ctr ? NUMDATA(scp->host)->busnum : scp->channel;
4454 ha = HADATA(gdth_ctr_tab[hanum]);
4455
4456 /* clear command tab */
4457 GDTH_LOCK_HA(ha, flags);
4458 for (i = 0; i < GDTH_MAXCMDS; ++i) {
4459 cmnd = ha->cmd_tab[i].cmnd;
4460 if (!SPECIAL_SCP(cmnd) && cmnd->channel == b)
4461 ha->cmd_tab[i].cmnd = UNUSED_CMND;
4462 }
4463 GDTH_UNLOCK_HA(ha, flags);
4464
4465 if (b == ha->virt_bus) {
4466 /* host drives */
4467 for (i = 0; i < MAX_HDRIVES; ++i) {
4468 if (ha->hdr[i].present) {
4469 GDTH_LOCK_HA(ha, flags);
4470 gdth_polling = TRUE;
4471 while (gdth_test_busy(hanum))
4472 gdth_delay(0);
4473 if (gdth_internal_cmd(hanum, CACHESERVICE,
4474 GDT_CLUST_RESET, i, 0, 0))
4475 ha->hdr[i].cluster_type &= ~CLUSTER_RESERVED;
4476 gdth_polling = FALSE;
4477 GDTH_UNLOCK_HA(ha, flags);
4478 }
4479 }
4480 } else {
4481 /* raw devices */
4482 GDTH_LOCK_HA(ha, flags);
4483 for (i = 0; i < MAXID; ++i)
4484 ha->raw[BUS_L2P(ha,b)].io_cnt[i] = 0;
4485 gdth_polling = TRUE;
4486 while (gdth_test_busy(hanum))
4487 gdth_delay(0);
4488 gdth_internal_cmd(hanum, SCSIRAWSERVICE, GDT_RESET_BUS,
4489 BUS_L2P(ha,b), 0, 0);
4490 gdth_polling = FALSE;
4491 GDTH_UNLOCK_HA(ha, flags);
4492 }
4493 return SUCCESS;
4494 }
4495
4496 int gdth_eh_host_reset(Scsi_Cmnd *scp)
4497 {
4498 TRACE2(("gdth_eh_host_reset()\n"));
4499 return FAILED;
4500 }
4501 #endif
4502
4503 #if LINUX_VERSION_CODE >= 0x010300
4504 int gdth_bios_param(Disk *disk,kdev_t dev,int *ip)
4505 #else
4506 int gdth_bios_param(Disk *disk,int dev,int *ip)
4507 #endif
4508 {
4509 unchar b, t;
4510 int hanum;
4511 gdth_ha_str *ha;
4512
4513 hanum = NUMDATA(disk->device->host)->hanum;
4514 b = virt_ctr ? NUMDATA(disk->device->host)->busnum : disk->device->channel;
4515 t = disk->device->id;
4516 TRACE2(("gdth_bios_param() ha %d bus %d target %d\n", hanum, b, t));
4517 ha = HADATA(gdth_ctr_tab[hanum]);
4518
4519 if (b != ha->virt_bus || ha->hdr[t].heads == 0) {
4520 /* raw device or host drive without mapping information */
4521 TRACE2(("Evaluate mapping\n"));
4522 gdth_eval_mapping(disk->capacity,&ip[2],&ip[0],&ip[1]);
4523 } else {
4524 ip[0] = ha->hdr[t].heads;
4525 ip[1] = ha->hdr[t].secs;
4526 ip[2] = disk->capacity / ip[0] / ip[1];
4527 }
4528
4529 TRACE2(("gdth_bios_param(): %d heads, %d secs, %d cyls\n",
4530 ip[0],ip[1],ip[2]));
4531 return 0;
4532 }
4533
4534
4535 int gdth_queuecommand(Scsi_Cmnd *scp,void (*done)(Scsi_Cmnd *))
4536 {
4537 int hanum;
4538 int priority;
4539
4540 TRACE(("gdth_queuecommand() cmd 0x%x id %d lun %d\n",
4541 scp->cmnd[0],scp->target,scp->lun));
4542
4543 scp->scsi_done = (void *)done;
4544 scp->SCp.have_data_in = 1;
4545 scp->SCp.phase = -1;
4546 scp->SCp.sent_command = -1;
4547 hanum = NUMDATA(scp->host)->hanum;
4548 #ifdef GDTH_STATISTICS
4549 ++act_ios;
4550 #endif
4551
4552 priority = DEFAULT_PRI;
4553 #if LINUX_VERSION_CODE >= 0x010300
4554 if (scp->done == gdth_scsi_done)
4555 priority = scp->SCp.this_residual;
4556 #endif
4557 gdth_update_timeout(hanum, scp, scp->timeout_per_command * 6);
4558 gdth_putq( hanum, scp, priority );
4559 gdth_next( hanum );
4560 return 0;
4561 }
4562
4563 #if LINUX_VERSION_CODE >= 0x010300
4564 /* flush routine */
4565 static void gdth_flush(int hanum)
4566 {
4567 int i;
4568 gdth_ha_str *ha;
4569 gdth_cmd_str gdtcmd;
4570 #if LINUX_VERSION_CODE >= 0x020322
4571 Scsi_Cmnd *scp;
4572 Scsi_Device *sdev;
4573 #else
4574 Scsi_Cmnd scp;
4575 Scsi_Device sdev;
4576 #endif
4577 char cmnd[MAX_COMMAND_SIZE];
4578 memset(cmnd, 0xff, 12);
4579
4580 TRACE2(("gdth_flush() hanum %d\n",hanum));
4581 ha = HADATA(gdth_ctr_tab[hanum]);
4582
4583 #if LINUX_VERSION_CODE >= 0x020322
4584 sdev = scsi_get_host_dev(gdth_ctr_tab[hanum]);
4585 scp = scsi_allocate_device(sdev, 1, FALSE);
4586 scp->cmd_len = 12;
4587 scp->use_sg = 0;
4588 #else
4589 memset(&sdev,0,sizeof(Scsi_Device));
4590 memset(&scp, 0,sizeof(Scsi_Cmnd));
4591 sdev.host = scp.host = gdth_ctr_tab[hanum];
4592 sdev.id = scp.target = sdev.host->this_id;
4593 scp.device = &sdev;
4594 #endif
4595
4596 for (i = 0; i < MAX_HDRIVES; ++i) {
4597 if (ha->hdr[i].present) {
4598 gdtcmd.BoardNode = LOCALBOARD;
4599 gdtcmd.Service = CACHESERVICE;
4600 gdtcmd.OpCode = GDT_FLUSH;
4601 gdtcmd.u.cache.DeviceNo = i;
4602 gdtcmd.u.cache.BlockNo = 1;
4603 gdtcmd.u.cache.sg_canz = 0;
4604 TRACE2(("gdth_flush(): flush ha %d drive %d\n", hanum, i));
4605 #if LINUX_VERSION_CODE >= 0x020322
4606 gdth_do_cmd(scp, &gdtcmd, cmnd, 30);
4607 #else
4608 gdth_do_cmd(&scp, &gdtcmd, cmnd, 30);
4609 #endif
4610 }
4611 }
4612 #if LINUX_VERSION_CODE >= 0x020322
4613 scsi_release_command(scp);
4614 scsi_free_host_dev(sdev);
4615 #endif
4616 }
4617
4618 /* shutdown routine */
4619 #if LINUX_VERSION_CODE >= 0x020100
4620 static int gdth_halt(struct notifier_block *nb, ulong event, void *buf)
4621 #else
4622 void gdth_halt(void)
4623 #endif
4624 {
4625 int hanum;
4626 #ifndef __alpha__
4627 gdth_cmd_str gdtcmd;
4628 #if LINUX_VERSION_CODE >= 0x020322
4629 Scsi_Cmnd *scp;
4630 Scsi_Device *sdev;
4631 #else
4632 Scsi_Cmnd scp;
4633 Scsi_Device sdev;
4634 #endif
4635 char cmnd[MAX_COMMAND_SIZE];
4636 #endif
4637
4638 #if LINUX_VERSION_CODE >= 0x020100
4639 TRACE2(("gdth_halt() event %d\n",(int)event));
4640 if (event != SYS_RESTART && event != SYS_HALT && event != SYS_POWER_OFF)
4641 return NOTIFY_DONE;
4642 #else
4643 TRACE2(("gdth_halt()\n"));
4644 if (halt_called) {
4645 TRACE2(("already called\n"));
4646 return;
4647 }
4648 halt_called = TRUE;
4649 #endif
4650 printk("GDT: Flushing all host drives .. ");
4651 for (hanum = 0; hanum < gdth_ctr_count; ++hanum) {
4652 gdth_flush(hanum);
4653
4654 #ifndef __alpha__
4655 /* controller reset */
4656 memset(cmnd, 0xff, 12);
4657 #if LINUX_VERSION_CODE >= 0x020322
4658 sdev = scsi_get_host_dev(gdth_ctr_tab[hanum]);
4659 scp = scsi_allocate_device(sdev, 1, FALSE);
4660 scp->cmd_len = 12;
4661 scp->use_sg = 0;
4662 #else
4663 memset(&sdev,0,sizeof(Scsi_Device));
4664 memset(&scp, 0,sizeof(Scsi_Cmnd));
4665 sdev.host = scp.host = gdth_ctr_tab[hanum];
4666 sdev.id = scp.target = sdev.host->this_id;
4667 scp.device = &sdev;
4668 #endif
4669
4670 gdtcmd.BoardNode = LOCALBOARD;
4671 gdtcmd.Service = CACHESERVICE;
4672 gdtcmd.OpCode = GDT_RESET;
4673 TRACE2(("gdth_halt(): reset controller %d\n", hanum));
4674 #if LINUX_VERSION_CODE >= 0x020322
4675 gdth_do_cmd(scp, &gdtcmd, cmnd, 10);
4676 scsi_release_command(scp);
4677 scsi_free_host_dev(sdev);
4678 #else
4679 gdth_do_cmd(&scp, &gdtcmd, cmnd, 10);
4680 #endif
4681 #endif
4682 }
4683 printk("Done.\n");
4684
4685 #ifdef GDTH_STATISTICS
4686 del_timer(&gdth_timer);
4687 #endif
4688 #if LINUX_VERSION_CODE >= 0x020100
4689 #if LINUX_VERSION_CODE < 0x020322
4690 unregister_reboot_notifier(&gdth_notifier);
4691 #endif
4692 return NOTIFY_OK;
4693 #endif
4694 }
4695 #endif
4696
4697
4698 #if LINUX_VERSION_CODE < 0x020400 && !defined(MODULE)
4699
4700 GDTH_INITFUNC(void, gdth_setup(char *str,int *ints))
4701 {
4702 TRACE2(("gdth_setup() str %s ints[0] %d\n",
4703 str ? str:"NULL", ints ? ints[0]:0));
4704 internal_setup(str, ints);
4705 }
4706
4707 #else
4708
4709 static Scsi_Host_Template driver_template = GDTH;
4710 #include "scsi_module.c"
4711 #ifndef MODULE
4712 __setup("gdth=", option_setup);
4713 #endif
4714
4715 #endif
4716