File: /usr/src/linux/drivers/scsi/sym53c8xx.c
1 /******************************************************************************
2 ** High Performance device driver for the Symbios 53C896 controller.
3 **
4 ** Copyright (C) 1998-2000 Gerard Roudier <groudier@club-internet.fr>
5 **
6 ** This driver also supports all the Symbios 53C8XX controller family,
7 ** except 53C810 revisions < 16, 53C825 revisions < 16 and all
8 ** revisions of 53C815 controllers.
9 **
10 ** This driver is based on the Linux port of the FreeBSD ncr driver.
11 **
12 ** Copyright (C) 1994 Wolfgang Stanglmeier
13 **
14 **-----------------------------------------------------------------------------
15 **
16 ** This program is free software; you can redistribute it and/or modify
17 ** it under the terms of the GNU General Public License as published by
18 ** the Free Software Foundation; either version 2 of the License, or
19 ** (at your option) any later version.
20 **
21 ** This program is distributed in the hope that it will be useful,
22 ** but WITHOUT ANY WARRANTY; without even the implied warranty of
23 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 ** GNU General Public License for more details.
25 **
26 ** You should have received a copy of the GNU General Public License
27 ** along with this program; if not, write to the Free Software
28 ** Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
29 **
30 **-----------------------------------------------------------------------------
31 **
32 ** The Linux port of the FreeBSD ncr driver has been achieved in
33 ** november 1995 by:
34 **
35 ** Gerard Roudier <groudier@club-internet.fr>
36 **
37 ** Being given that this driver originates from the FreeBSD version, and
38 ** in order to keep synergy on both, any suggested enhancements and corrections
39 ** received on Linux are automatically a potential candidate for the FreeBSD
40 ** version.
41 **
42 ** The original driver has been written for 386bsd and FreeBSD by
43 ** Wolfgang Stanglmeier <wolf@cologne.de>
44 ** Stefan Esser <se@mi.Uni-Koeln.de>
45 **
46 **-----------------------------------------------------------------------------
47 **
48 ** Major contributions:
49 ** --------------------
50 **
51 ** NVRAM detection and reading.
52 ** Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
53 **
54 *******************************************************************************
55 */
56
57 /*
58 ** Supported SCSI features:
59 ** Synchronous data transfers
60 ** Wide16 SCSI BUS
61 ** Disconnection/Reselection
62 ** Tagged command queuing
63 ** SCSI Parity checking
64 **
65 ** Supported NCR/SYMBIOS chips:
66 ** 53C810A (8 bits, Fast 10, no rom BIOS)
67 ** 53C825A (Wide, Fast 10, on-board rom BIOS)
68 ** 53C860 (8 bits, Fast 20, no rom BIOS)
69 ** 53C875 (Wide, Fast 20, on-board rom BIOS)
70 ** 53C876 (Wide, Fast 20 Dual, on-board rom BIOS)
71 ** 53C895 (Wide, Fast 40, on-board rom BIOS)
72 ** 53C895A (Wide, Fast 40, on-board rom BIOS)
73 ** 53C896 (Wide, Fast 40 Dual, on-board rom BIOS)
74 ** 53C897 (Wide, Fast 40 Dual, on-board rom BIOS)
75 ** 53C1510D (Wide, Fast 40 Dual, on-board rom BIOS)
76 ** 53C1010 (Wide, Fast 80 Dual, on-board rom BIOS)
77 ** 53C1010_66(Wide, Fast 80 Dual, on-board rom BIOS, 33/66MHz PCI)
78 **
79 ** Other features:
80 ** Memory mapped IO
81 ** Module
82 ** Shared IRQ
83 */
84
85 /*
86 ** Name and version of the driver
87 */
88 #define SCSI_NCR_DRIVER_NAME "sym53c8xx-1.7.3c-20010512"
89
90 #define SCSI_NCR_DEBUG_FLAGS (0)
91
92 #define NAME53C "sym53c"
93 #define NAME53C8XX "sym53c8xx"
94
95 /*==========================================================
96 **
97 ** Include files
98 **
99 **==========================================================
100 */
101
102 #define LinuxVersionCode(v, p, s) (((v)<<16)+((p)<<8)+(s))
103
104 #ifdef MODULE
105 #include <linux/module.h>
106 #endif
107
108 #include <asm/dma.h>
109 #include <asm/io.h>
110 #include <asm/system.h>
111 #if LINUX_VERSION_CODE >= LinuxVersionCode(2,3,17)
112 #include <linux/spinlock.h>
113 #elif LINUX_VERSION_CODE >= LinuxVersionCode(2,1,93)
114 #include <asm/spinlock.h>
115 #endif
116 #include <linux/delay.h>
117 #include <linux/signal.h>
118 #include <linux/sched.h>
119 #include <linux/errno.h>
120 #include <linux/pci.h>
121 #include <linux/string.h>
122 #include <linux/mm.h>
123 #include <linux/ioport.h>
124 #include <linux/time.h>
125 #include <linux/timer.h>
126 #include <linux/stat.h>
127
128 #include <linux/version.h>
129 #include <linux/blk.h>
130
131 #if LINUX_VERSION_CODE >= LinuxVersionCode(2,1,35)
132 #include <linux/init.h>
133 #endif
134
135 #ifndef __init
136 #define __init
137 #endif
138 #ifndef __initdata
139 #define __initdata
140 #endif
141
142 #if LINUX_VERSION_CODE <= LinuxVersionCode(2,1,92)
143 #include <linux/bios32.h>
144 #endif
145
146 #include "scsi.h"
147 #include "hosts.h"
148 #include "constants.h"
149 #include "sd.h"
150
151 #include <linux/types.h>
152
153 /*
154 ** Define BITS_PER_LONG for earlier linux versions.
155 */
156 #ifndef BITS_PER_LONG
157 #if (~0UL) == 0xffffffffUL
158 #define BITS_PER_LONG 32
159 #else
160 #define BITS_PER_LONG 64
161 #endif
162 #endif
163
164 /*
165 ** Define the BSD style u_int32 and u_int64 type.
166 ** Are in fact u_int32_t and u_int64_t :-)
167 */
168 typedef u32 u_int32;
169 typedef u64 u_int64;
170
171 #include "sym53c8xx.h"
172
173 /*
174 ** Donnot compile integrity checking code for Linux-2.3.0
175 ** and above since SCSI data structures are not ready yet.
176 */
177 /* #if LINUX_VERSION_CODE < LinuxVersionCode(2,3,0) */
178 #if 0
179 #define SCSI_NCR_INTEGRITY_CHECKING
180 #endif
181
182 #define MIN(a,b) (((a) < (b)) ? (a) : (b))
183 #define MAX(a,b) (((a) > (b)) ? (a) : (b))
184
185 /*
186 ** Hmmm... What complex some PCI-HOST bridges actually are,
187 ** despite the fact that the PCI specifications are looking
188 ** so smart and simple! ;-)
189 */
190 #if LINUX_VERSION_CODE >= LinuxVersionCode(2,3,47)
191 #define SCSI_NCR_DYNAMIC_DMA_MAPPING
192 #endif
193
194 /*==========================================================
195 **
196 ** A la VMS/CAM-3 queue management.
197 ** Implemented from linux list management.
198 **
199 **==========================================================
200 */
201
202 typedef struct xpt_quehead {
203 struct xpt_quehead *flink; /* Forward pointer */
204 struct xpt_quehead *blink; /* Backward pointer */
205 } XPT_QUEHEAD;
206
207 #define xpt_que_init(ptr) do { \
208 (ptr)->flink = (ptr); (ptr)->blink = (ptr); \
209 } while (0)
210
211 static inline void __xpt_que_add(struct xpt_quehead * new,
212 struct xpt_quehead * blink,
213 struct xpt_quehead * flink)
214 {
215 flink->blink = new;
216 new->flink = flink;
217 new->blink = blink;
218 blink->flink = new;
219 }
220
221 static inline void __xpt_que_del(struct xpt_quehead * blink,
222 struct xpt_quehead * flink)
223 {
224 flink->blink = blink;
225 blink->flink = flink;
226 }
227
228 static inline int xpt_que_empty(struct xpt_quehead *head)
229 {
230 return head->flink == head;
231 }
232
233 static inline void xpt_que_splice(struct xpt_quehead *list,
234 struct xpt_quehead *head)
235 {
236 struct xpt_quehead *first = list->flink;
237
238 if (first != list) {
239 struct xpt_quehead *last = list->blink;
240 struct xpt_quehead *at = head->flink;
241
242 first->blink = head;
243 head->flink = first;
244
245 last->flink = at;
246 at->blink = last;
247 }
248 }
249
250 #define xpt_que_entry(ptr, type, member) \
251 ((type *)((char *)(ptr)-(unsigned long)(&((type *)0)->member)))
252
253
254 #define xpt_insque(new, pos) __xpt_que_add(new, pos, (pos)->flink)
255
256 #define xpt_remque(el) __xpt_que_del((el)->blink, (el)->flink)
257
258 #define xpt_insque_head(new, head) __xpt_que_add(new, head, (head)->flink)
259
260 static inline struct xpt_quehead *xpt_remque_head(struct xpt_quehead *head)
261 {
262 struct xpt_quehead *elem = head->flink;
263
264 if (elem != head)
265 __xpt_que_del(head, elem->flink);
266 else
267 elem = 0;
268 return elem;
269 }
270
271 #define xpt_insque_tail(new, head) __xpt_que_add(new, (head)->blink, head)
272
273 static inline struct xpt_quehead *xpt_remque_tail(struct xpt_quehead *head)
274 {
275 struct xpt_quehead *elem = head->blink;
276
277 if (elem != head)
278 __xpt_que_del(elem->blink, head);
279 else
280 elem = 0;
281 return elem;
282 }
283
284 /*==========================================================
285 **
286 ** Configuration and Debugging
287 **
288 **==========================================================
289 */
290
291 /*
292 ** SCSI address of this device.
293 ** The boot routines should have set it.
294 ** If not, use this.
295 */
296
297 #ifndef SCSI_NCR_MYADDR
298 #define SCSI_NCR_MYADDR (7)
299 #endif
300
301 /*
302 ** The maximum number of tags per logic unit.
303 ** Used only for devices that support tags.
304 */
305
306 #ifndef SCSI_NCR_MAX_TAGS
307 #define SCSI_NCR_MAX_TAGS (8)
308 #endif
309
310 /*
311 ** TAGS are actually unlimited (256 tags/lun).
312 ** But Linux only supports 255. :)
313 */
314 #if SCSI_NCR_MAX_TAGS > 255
315 #define MAX_TAGS 255
316 #else
317 #define MAX_TAGS SCSI_NCR_MAX_TAGS
318 #endif
319
320 /*
321 ** Since the ncr chips only have a 8 bit ALU, we try to be clever
322 ** about offset calculation in the TASK TABLE per LUN that is an
323 ** array of DWORDS = 4 bytes.
324 */
325 #if MAX_TAGS > (512/4)
326 #define MAX_TASKS (1024/4)
327 #elif MAX_TAGS > (256/4)
328 #define MAX_TASKS (512/4)
329 #else
330 #define MAX_TASKS (256/4)
331 #endif
332
333 /*
334 ** This one means 'NO TAG for this job'
335 */
336 #define NO_TAG (256)
337
338 /*
339 ** Number of targets supported by the driver.
340 ** n permits target numbers 0..n-1.
341 ** Default is 16, meaning targets #0..#15.
342 ** #7 .. is myself.
343 */
344
345 #ifdef SCSI_NCR_MAX_TARGET
346 #define MAX_TARGET (SCSI_NCR_MAX_TARGET)
347 #else
348 #define MAX_TARGET (16)
349 #endif
350
351 /*
352 ** Number of logic units supported by the driver.
353 ** n enables logic unit numbers 0..n-1.
354 ** The common SCSI devices require only
355 ** one lun, so take 1 as the default.
356 */
357
358 #ifdef SCSI_NCR_MAX_LUN
359 #define MAX_LUN 64
360 #else
361 #define MAX_LUN (1)
362 #endif
363
364 /*
365 ** Asynchronous pre-scaler (ns). Shall be 40 for
366 ** the SCSI timings to be compliant.
367 */
368
369 #ifndef SCSI_NCR_MIN_ASYNC
370 #define SCSI_NCR_MIN_ASYNC (40)
371 #endif
372
373 /*
374 ** The maximum number of jobs scheduled for starting.
375 ** We allocate 4 entries more than the value we announce
376 ** to the SCSI upper layer. Guess why ! :-)
377 */
378
379 #ifdef SCSI_NCR_CAN_QUEUE
380 #define MAX_START (SCSI_NCR_CAN_QUEUE + 4)
381 #else
382 #define MAX_START (MAX_TARGET + 7 * MAX_TAGS)
383 #endif
384
385 /*
386 ** We donnot want to allocate more than 1 PAGE for the
387 ** the start queue and the done queue. We hard-code entry
388 ** size to 8 in order to let cpp do the checking.
389 ** Allows 512-4=508 pending IOs for i386 but Linux seems for
390 ** now not able to provide the driver with this amount of IOs.
391 */
392 #if MAX_START > PAGE_SIZE/8
393 #undef MAX_START
394 #define MAX_START (PAGE_SIZE/8)
395 #endif
396
397 /*
398 ** The maximum number of segments a transfer is split into.
399 ** We support up to 127 segments for both read and write.
400 */
401
402 #define MAX_SCATTER (SCSI_NCR_MAX_SCATTER)
403 #define SCR_SG_SIZE (2)
404
405 /*
406 ** other
407 */
408
409 #define NCR_SNOOP_TIMEOUT (1000000)
410
411 /*==========================================================
412 **
413 ** Miscallaneous BSDish defines.
414 **
415 **==========================================================
416 */
417
418 #define u_char unsigned char
419 #define u_short unsigned short
420 #define u_int unsigned int
421 #define u_long unsigned long
422
423 #ifndef bcopy
424 #define bcopy(s, d, n) memcpy((d), (s), (n))
425 #endif
426
427 #ifndef bzero
428 #define bzero(d, n) memset((d), 0, (n))
429 #endif
430
431 #ifndef offsetof
432 #define offsetof(t, m) ((size_t) (&((t *)0)->m))
433 #endif
434
435 /*
436 ** Simple Wrapper to kernel PCI bus interface.
437 **
438 ** This wrapper allows to get rid of old kernel PCI interface
439 ** and still allows to preserve linux-2.0 compatibilty.
440 ** In fact, it is mostly an incomplete emulation of the new
441 ** PCI code for pre-2.2 kernels. When kernel-2.0 support
442 ** will be dropped, we will just have to remove most of this
443 ** code.
444 */
445
446 #if LINUX_VERSION_CODE >= LinuxVersionCode(2,2,0)
447
448 typedef struct pci_dev *pcidev_t;
449 #define PCIDEV_NULL (0)
450 #define PciBusNumber(d) (d)->bus->number
451 #define PciDeviceFn(d) (d)->devfn
452 #define PciVendorId(d) (d)->vendor
453 #define PciDeviceId(d) (d)->device
454 #define PciIrqLine(d) (d)->irq
455
456 static u_long __init
457 pci_get_base_cookie(struct pci_dev *pdev, int index)
458 {
459 u_long base;
460
461 #if LINUX_VERSION_CODE > LinuxVersionCode(2,3,12)
462 base = pdev->resource[index].start;
463 #else
464 base = pdev->base_address[index];
465 #if BITS_PER_LONG > 32
466 if ((base & 0x7) == 0x4)
467 *base |= (((u_long)pdev->base_address[++index]) << 32);
468 #endif
469 #endif
470 return (base & ~0x7ul);
471 }
472
473 static int __init
474 pci_get_base_address(struct pci_dev *pdev, int index, u_long *base)
475 {
476 u32 tmp;
477 #define PCI_BAR_OFFSET(index) (PCI_BASE_ADDRESS_0 + (index<<2))
478
479 pci_read_config_dword(pdev, PCI_BAR_OFFSET(index), &tmp);
480 *base = tmp;
481 ++index;
482 if ((tmp & 0x7) == 0x4) {
483 #if BITS_PER_LONG > 32
484 pci_read_config_dword(pdev, PCI_BAR_OFFSET(index), &tmp);
485 *base |= (((u_long)tmp) << 32);
486 #endif
487 ++index;
488 }
489 return index;
490 #undef PCI_BAR_OFFSET
491 }
492
493 #else /* Incomplete emulation of current PCI code for pre-2.2 kernels */
494
495 typedef unsigned int pcidev_t;
496 #define PCIDEV_NULL (~0u)
497 #define PciBusNumber(d) ((d)>>8)
498 #define PciDeviceFn(d) ((d)&0xff)
499 #define __PciDev(busn, devfn) (((busn)<<8)+(devfn))
500
501 #define pci_present pcibios_present
502
503 #define pci_read_config_byte(d, w, v) \
504 pcibios_read_config_byte(PciBusNumber(d), PciDeviceFn(d), w, v)
505 #define pci_read_config_word(d, w, v) \
506 pcibios_read_config_word(PciBusNumber(d), PciDeviceFn(d), w, v)
507 #define pci_read_config_dword(d, w, v) \
508 pcibios_read_config_dword(PciBusNumber(d), PciDeviceFn(d), w, v)
509
510 #define pci_write_config_byte(d, w, v) \
511 pcibios_write_config_byte(PciBusNumber(d), PciDeviceFn(d), w, v)
512 #define pci_write_config_word(d, w, v) \
513 pcibios_write_config_word(PciBusNumber(d), PciDeviceFn(d), w, v)
514 #define pci_write_config_dword(d, w, v) \
515 pcibios_write_config_dword(PciBusNumber(d), PciDeviceFn(d), w, v)
516
517 static pcidev_t __init
518 pci_find_device(unsigned int vendor, unsigned int device, pcidev_t prev)
519 {
520 static unsigned short pci_index;
521 int retv;
522 unsigned char bus_number, device_fn;
523
524 if (prev == PCIDEV_NULL)
525 pci_index = 0;
526 else
527 ++pci_index;
528 retv = pcibios_find_device (vendor, device, pci_index,
529 &bus_number, &device_fn);
530 return retv ? PCIDEV_NULL : __PciDev(bus_number, device_fn);
531 }
532
533 static u_short __init PciVendorId(pcidev_t dev)
534 {
535 u_short vendor_id;
536 pci_read_config_word(dev, PCI_VENDOR_ID, &vendor_id);
537 return vendor_id;
538 }
539
540 static u_short __init PciDeviceId(pcidev_t dev)
541 {
542 u_short device_id;
543 pci_read_config_word(dev, PCI_DEVICE_ID, &device_id);
544 return device_id;
545 }
546
547 static u_int __init PciIrqLine(pcidev_t dev)
548 {
549 u_char irq;
550 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
551 return irq;
552 }
553
554 static int __init
555 pci_get_base_address(pcidev_t dev, int offset, u_long *base)
556 {
557 u_int32 tmp;
558
559 pci_read_config_dword(dev, PCI_BASE_ADDRESS_0 + offset, &tmp);
560 *base = tmp;
561 offset += sizeof(u_int32);
562 if ((tmp & 0x7) == 0x4) {
563 #if BITS_PER_LONG > 32
564 pci_read_config_dword(dev, PCI_BASE_ADDRESS_0 + offset, &tmp);
565 *base |= (((u_long)tmp) << 32);
566 #endif
567 offset += sizeof(u_int32);
568 }
569 return offset;
570 }
571 static u_long __init
572 pci_get_base_cookie(struct pci_dev *pdev, int offset)
573 {
574 u_long base;
575
576 (void) pci_get_base_address(dev, offset, &base);
577
578 return base;
579 }
580
581 #endif /* LINUX_VERSION_CODE >= LinuxVersionCode(2,2,0) */
582
583 /* Does not make sense in earlier kernels */
584 #if LINUX_VERSION_CODE < LinuxVersionCode(2,4,0)
585 #define pci_enable_device(pdev) (0)
586 #endif
587 #if LINUX_VERSION_CODE < LinuxVersionCode(2,4,4)
588 #define scsi_set_pci_device(inst, pdev) (0)
589 #endif
590
591 /*==========================================================
592 **
593 ** Debugging tags
594 **
595 **==========================================================
596 */
597
598 #define DEBUG_ALLOC (0x0001)
599 #define DEBUG_PHASE (0x0002)
600 #define DEBUG_QUEUE (0x0008)
601 #define DEBUG_RESULT (0x0010)
602 #define DEBUG_POINTER (0x0020)
603 #define DEBUG_SCRIPT (0x0040)
604 #define DEBUG_TINY (0x0080)
605 #define DEBUG_TIMING (0x0100)
606 #define DEBUG_NEGO (0x0200)
607 #define DEBUG_TAGS (0x0400)
608 #define DEBUG_IC (0x0800)
609
610 /*
611 ** Enable/Disable debug messages.
612 ** Can be changed at runtime too.
613 */
614
615 #ifdef SCSI_NCR_DEBUG_INFO_SUPPORT
616 static int ncr_debug = SCSI_NCR_DEBUG_FLAGS;
617 #define DEBUG_FLAGS ncr_debug
618 #else
619 #define DEBUG_FLAGS SCSI_NCR_DEBUG_FLAGS
620 #endif
621
622 /*
623 ** SMP threading.
624 **
625 ** Assuming that SMP systems are generally high end systems and may
626 ** use several SCSI adapters, we are using one lock per controller
627 ** instead of some global one. For the moment (linux-2.1.95), driver's
628 ** entry points are called with the 'io_request_lock' lock held, so:
629 ** - We are uselessly loosing a couple of micro-seconds to lock the
630 ** controller data structure.
631 ** - But the driver is not broken by design for SMP and so can be
632 ** more resistant to bugs or bad changes in the IO sub-system code.
633 ** - A small advantage could be that the interrupt code is grained as
634 ** wished (e.g.: threaded by controller).
635 */
636
637 #if LINUX_VERSION_CODE >= LinuxVersionCode(2,1,93)
638
639 spinlock_t sym53c8xx_lock = SPIN_LOCK_UNLOCKED;
640 #define NCR_LOCK_DRIVER(flags) spin_lock_irqsave(&sym53c8xx_lock, flags)
641 #define NCR_UNLOCK_DRIVER(flags) spin_unlock_irqrestore(&sym53c8xx_lock,flags)
642
643 #define NCR_INIT_LOCK_NCB(np) spin_lock_init(&np->smp_lock);
644 #define NCR_LOCK_NCB(np, flags) spin_lock_irqsave(&np->smp_lock, flags)
645 #define NCR_UNLOCK_NCB(np, flags) spin_unlock_irqrestore(&np->smp_lock, flags)
646
647 #define NCR_LOCK_SCSI_DONE(np, flags) \
648 spin_lock_irqsave(&io_request_lock, flags)
649 #define NCR_UNLOCK_SCSI_DONE(np, flags) \
650 spin_unlock_irqrestore(&io_request_lock, flags)
651
652 #else
653
654 #define NCR_LOCK_DRIVER(flags) do { save_flags(flags); cli(); } while (0)
655 #define NCR_UNLOCK_DRIVER(flags) do { restore_flags(flags); } while (0)
656
657 #define NCR_INIT_LOCK_NCB(np) do { } while (0)
658 #define NCR_LOCK_NCB(np, flags) do { save_flags(flags); cli(); } while (0)
659 #define NCR_UNLOCK_NCB(np, flags) do { restore_flags(flags); } while (0)
660
661 #define NCR_LOCK_SCSI_DONE(np, flags) do {;} while (0)
662 #define NCR_UNLOCK_SCSI_DONE(np, flags) do {;} while (0)
663
664 #endif
665
666 /*
667 ** Memory mapped IO
668 **
669 ** Since linux-2.1, we must use ioremap() to map the io memory space.
670 ** iounmap() to unmap it. That allows portability.
671 ** Linux 1.3.X and 2.0.X allow to remap physical pages addresses greater
672 ** than the highest physical memory address to kernel virtual pages with
673 ** vremap() / vfree(). That was not portable but worked with i386
674 ** architecture.
675 */
676
677 #if LINUX_VERSION_CODE < LinuxVersionCode(2,1,0)
678 #define ioremap vremap
679 #define iounmap vfree
680 #endif
681
682 #ifdef __sparc__
683 # include <asm/irq.h>
684 # define memcpy_to_pci(a, b, c) memcpy_toio((a), (b), (c))
685 #elif defined(__alpha__)
686 # define memcpy_to_pci(a, b, c) memcpy_toio((a), (b), (c))
687 #else /* others */
688 # define memcpy_to_pci(a, b, c) memcpy_toio((a), (b), (c))
689 #endif
690
691 #ifndef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
692 static u_long __init remap_pci_mem(u_long base, u_long size)
693 {
694 u_long page_base = ((u_long) base) & PAGE_MASK;
695 u_long page_offs = ((u_long) base) - page_base;
696 u_long page_remapped = (u_long) ioremap(page_base, page_offs+size);
697
698 return page_remapped? (page_remapped + page_offs) : 0UL;
699 }
700
701 static void __init unmap_pci_mem(u_long vaddr, u_long size)
702 {
703 if (vaddr)
704 iounmap((void *) (vaddr & PAGE_MASK));
705 }
706
707 #endif /* not def SCSI_NCR_PCI_MEM_NOT_SUPPORTED */
708
709 /*
710 ** Insert a delay in micro-seconds and milli-seconds.
711 ** -------------------------------------------------
712 ** Under Linux, udelay() is restricted to delay < 1 milli-second.
713 ** In fact, it generally works for up to 1 second delay.
714 ** Since 2.1.105, the mdelay() function is provided for delays
715 ** in milli-seconds.
716 ** Under 2.0 kernels, udelay() is an inline function that is very
717 ** inaccurate on Pentium processors.
718 */
719
720 #if LINUX_VERSION_CODE >= LinuxVersionCode(2,1,105)
721 #define UDELAY udelay
722 #define MDELAY mdelay
723 #else
724 static void UDELAY(long us) { udelay(us); }
725 static void MDELAY(long ms) { while (ms--) UDELAY(1000); }
726 #endif
727
728 /*
729 ** Simple power of two buddy-like allocator
730 ** ----------------------------------------
731 ** This simple code is not intended to be fast, but to provide
732 ** power of 2 aligned memory allocations.
733 ** Since the SCRIPTS processor only supplies 8 bit arithmetic,
734 ** this allocator allows simple and fast address calculations
735 ** from the SCRIPTS code. In addition, cache line alignment
736 ** is guaranteed for power of 2 cache line size.
737 ** Enhanced in linux-2.3.44 to provide a memory pool per pcidev
738 ** to support dynamic dma mapping. (I would have preferred a
739 ** real bus astraction, btw).
740 */
741
742 #if LINUX_VERSION_CODE >= LinuxVersionCode(2,1,0)
743 #define __GetFreePages(flags, order) __get_free_pages(flags, order)
744 #else
745 #define __GetFreePages(flags, order) __get_free_pages(flags, order, 0)
746 #endif
747
748 #define MEMO_SHIFT 4 /* 16 bytes minimum memory chunk */
749 #if PAGE_SIZE >= 8192
750 #define MEMO_PAGE_ORDER 0 /* 1 PAGE maximum */
751 #else
752 #define MEMO_PAGE_ORDER 1 /* 2 PAGES maximum */
753 #endif
754 #define MEMO_FREE_UNUSED /* Free unused pages immediately */
755 #define MEMO_WARN 1
756 #define MEMO_GFP_FLAGS GFP_ATOMIC
757 #define MEMO_CLUSTER_SHIFT (PAGE_SHIFT+MEMO_PAGE_ORDER)
758 #define MEMO_CLUSTER_SIZE (1UL << MEMO_CLUSTER_SHIFT)
759 #define MEMO_CLUSTER_MASK (MEMO_CLUSTER_SIZE-1)
760
761 typedef u_long m_addr_t; /* Enough bits to bit-hack addresses */
762 typedef pcidev_t m_bush_t; /* Something that addresses DMAable */
763
764 typedef struct m_link { /* Link between free memory chunks */
765 struct m_link *next;
766 } m_link_s;
767
768 #ifdef SCSI_NCR_DYNAMIC_DMA_MAPPING
769 typedef struct m_vtob { /* Virtual to Bus address translation */
770 struct m_vtob *next;
771 m_addr_t vaddr;
772 m_addr_t baddr;
773 } m_vtob_s;
774 #define VTOB_HASH_SHIFT 5
775 #define VTOB_HASH_SIZE (1UL << VTOB_HASH_SHIFT)
776 #define VTOB_HASH_MASK (VTOB_HASH_SIZE-1)
777 #define VTOB_HASH_CODE(m) \
778 ((((m_addr_t) (m)) >> MEMO_CLUSTER_SHIFT) & VTOB_HASH_MASK)
779 #endif
780
781 typedef struct m_pool { /* Memory pool of a given kind */
782 #ifdef SCSI_NCR_DYNAMIC_DMA_MAPPING
783 m_bush_t bush;
784 m_addr_t (*getp)(struct m_pool *);
785 void (*freep)(struct m_pool *, m_addr_t);
786 #define M_GETP() mp->getp(mp)
787 #define M_FREEP(p) mp->freep(mp, p)
788 #define GetPages() __GetFreePages(MEMO_GFP_FLAGS, MEMO_PAGE_ORDER)
789 #define FreePages(p) free_pages(p, MEMO_PAGE_ORDER)
790 int nump;
791 m_vtob_s *(vtob[VTOB_HASH_SIZE]);
792 struct m_pool *next;
793 #else
794 #define M_GETP() __GetFreePages(MEMO_GFP_FLAGS, MEMO_PAGE_ORDER)
795 #define M_FREEP(p) free_pages(p, MEMO_PAGE_ORDER)
796 #endif /* SCSI_NCR_DYNAMIC_DMA_MAPPING */
797 struct m_link h[PAGE_SHIFT-MEMO_SHIFT+MEMO_PAGE_ORDER+1];
798 } m_pool_s;
799
800 static void *___m_alloc(m_pool_s *mp, int size)
801 {
802 int i = 0;
803 int s = (1 << MEMO_SHIFT);
804 int j;
805 m_addr_t a;
806 m_link_s *h = mp->h;
807
808 if (size > (PAGE_SIZE << MEMO_PAGE_ORDER))
809 return 0;
810
811 while (size > s) {
812 s <<= 1;
813 ++i;
814 }
815
816 j = i;
817 while (!h[j].next) {
818 if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) {
819 h[j].next = (m_link_s *) M_GETP();
820 if (h[j].next)
821 h[j].next->next = 0;
822 break;
823 }
824 ++j;
825 s <<= 1;
826 }
827 a = (m_addr_t) h[j].next;
828 if (a) {
829 h[j].next = h[j].next->next;
830 while (j > i) {
831 j -= 1;
832 s >>= 1;
833 h[j].next = (m_link_s *) (a+s);
834 h[j].next->next = 0;
835 }
836 }
837 #ifdef DEBUG
838 printk("___m_alloc(%d) = %p\n", size, (void *) a);
839 #endif
840 return (void *) a;
841 }
842
843 static void ___m_free(m_pool_s *mp, void *ptr, int size)
844 {
845 int i = 0;
846 int s = (1 << MEMO_SHIFT);
847 m_link_s *q;
848 m_addr_t a, b;
849 m_link_s *h = mp->h;
850
851 #ifdef DEBUG
852 printk("___m_free(%p, %d)\n", ptr, size);
853 #endif
854
855 if (size > (PAGE_SIZE << MEMO_PAGE_ORDER))
856 return;
857
858 while (size > s) {
859 s <<= 1;
860 ++i;
861 }
862
863 a = (m_addr_t) ptr;
864
865 while (1) {
866 #ifdef MEMO_FREE_UNUSED
867 if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) {
868 M_FREEP(a);
869 break;
870 }
871 #endif
872 b = a ^ s;
873 q = &h[i];
874 while (q->next && q->next != (m_link_s *) b) {
875 q = q->next;
876 }
877 if (!q->next) {
878 ((m_link_s *) a)->next = h[i].next;
879 h[i].next = (m_link_s *) a;
880 break;
881 }
882 q->next = q->next->next;
883 a = a & b;
884 s <<= 1;
885 ++i;
886 }
887 }
888
889 static void *__m_calloc2(m_pool_s *mp, int size, char *name, int uflags)
890 {
891 void *p;
892
893 p = ___m_alloc(mp, size);
894
895 if (DEBUG_FLAGS & DEBUG_ALLOC)
896 printk ("new %-10s[%4d] @%p.\n", name, size, p);
897
898 if (p)
899 bzero(p, size);
900 else if (uflags & MEMO_WARN)
901 printk (NAME53C8XX ": failed to allocate %s[%d]\n", name, size);
902
903 return p;
904 }
905
906 #define __m_calloc(mp, s, n) __m_calloc2(mp, s, n, MEMO_WARN)
907
908 static void __m_free(m_pool_s *mp, void *ptr, int size, char *name)
909 {
910 if (DEBUG_FLAGS & DEBUG_ALLOC)
911 printk ("freeing %-10s[%4d] @%p.\n", name, size, ptr);
912
913 ___m_free(mp, ptr, size);
914
915 }
916
917 /*
918 * With pci bus iommu support, we use a default pool of unmapped memory
919 * for memory we donnot need to DMA from/to and one pool per pcidev for
920 * memory accessed by the PCI chip. `mp0' is the default not DMAable pool.
921 */
922
923 #ifndef SCSI_NCR_DYNAMIC_DMA_MAPPING
924
925 static m_pool_s mp0;
926
927 #else
928
929 static m_addr_t ___mp0_getp(m_pool_s *mp)
930 {
931 m_addr_t m = GetPages();
932 if (m)
933 ++mp->nump;
934 return m;
935 }
936
937 static void ___mp0_freep(m_pool_s *mp, m_addr_t m)
938 {
939 FreePages(m);
940 --mp->nump;
941 }
942
943 static m_pool_s mp0 = {0, ___mp0_getp, ___mp0_freep};
944
945 #endif /* SCSI_NCR_DYNAMIC_DMA_MAPPING */
946
947 static void *m_calloc(int size, char *name)
948 {
949 u_long flags;
950 void *m;
951 NCR_LOCK_DRIVER(flags);
952 m = __m_calloc(&mp0, size, name);
953 NCR_UNLOCK_DRIVER(flags);
954 return m;
955 }
956
957 static void m_free(void *ptr, int size, char *name)
958 {
959 u_long flags;
960 NCR_LOCK_DRIVER(flags);
961 __m_free(&mp0, ptr, size, name);
962 NCR_UNLOCK_DRIVER(flags);
963 }
964
965 /*
966 * DMAable pools.
967 */
968
969 #ifndef SCSI_NCR_DYNAMIC_DMA_MAPPING
970
971 /* Without pci bus iommu support, all the memory is assumed DMAable */
972
973 #define __m_calloc_dma(b, s, n) m_calloc(s, n)
974 #define __m_free_dma(b, p, s, n) m_free(p, s, n)
975 #define __vtobus(b, p) virt_to_bus(p)
976
977 #else
978
979 /*
980 * With pci bus iommu support, we maintain one pool per pcidev and a
981 * hashed reverse table for virtual to bus physical address translations.
982 */
983 static m_addr_t ___dma_getp(m_pool_s *mp)
984 {
985 m_addr_t vp;
986 m_vtob_s *vbp;
987
988 vbp = __m_calloc(&mp0, sizeof(*vbp), "VTOB");
989 if (vbp) {
990 dma_addr_t daddr;
991 vp = (m_addr_t) pci_alloc_consistent(mp->bush,
992 PAGE_SIZE<<MEMO_PAGE_ORDER,
993 &daddr);
994 if (vp) {
995 int hc = VTOB_HASH_CODE(vp);
996 vbp->vaddr = vp;
997 vbp->baddr = daddr;
998 vbp->next = mp->vtob[hc];
999 mp->vtob[hc] = vbp;
1000 ++mp->nump;
1001 return vp;
1002 }
1003 else
1004 __m_free(&mp0, vbp, sizeof(*vbp), "VTOB");
1005 }
1006 return 0;
1007 }
1008
1009 static void ___dma_freep(m_pool_s *mp, m_addr_t m)
1010 {
1011 m_vtob_s **vbpp, *vbp;
1012 int hc = VTOB_HASH_CODE(m);
1013
1014 vbpp = &mp->vtob[hc];
1015 while (*vbpp && (*vbpp)->vaddr != m)
1016 vbpp = &(*vbpp)->next;
1017 if (*vbpp) {
1018 vbp = *vbpp;
1019 *vbpp = (*vbpp)->next;
1020 pci_free_consistent(mp->bush, PAGE_SIZE<<MEMO_PAGE_ORDER,
1021 (void *)vbp->vaddr, (dma_addr_t)vbp->baddr);
1022 __m_free(&mp0, vbp, sizeof(*vbp), "VTOB");
1023 --mp->nump;
1024 }
1025 }
1026
1027 static inline m_pool_s *___get_dma_pool(m_bush_t bush)
1028 {
1029 m_pool_s *mp;
1030 for (mp = mp0.next; mp && mp->bush != bush; mp = mp->next);
1031 return mp;
1032 }
1033
1034 static m_pool_s *___cre_dma_pool(m_bush_t bush)
1035 {
1036 m_pool_s *mp;
1037 mp = __m_calloc(&mp0, sizeof(*mp), "MPOOL");
1038 if (mp) {
1039 bzero(mp, sizeof(*mp));
1040 mp->bush = bush;
1041 mp->getp = ___dma_getp;
1042 mp->freep = ___dma_freep;
1043 mp->next = mp0.next;
1044 mp0.next = mp;
1045 }
1046 return mp;
1047 }
1048
1049 static void ___del_dma_pool(m_pool_s *p)
1050 {
1051 struct m_pool **pp = &mp0.next;
1052
1053 while (*pp && *pp != p)
1054 pp = &(*pp)->next;
1055 if (*pp) {
1056 *pp = (*pp)->next;
1057 __m_free(&mp0, p, sizeof(*p), "MPOOL");
1058 }
1059 }
1060
1061 static void *__m_calloc_dma(m_bush_t bush, int size, char *name)
1062 {
1063 u_long flags;
1064 struct m_pool *mp;
1065 void *m = 0;
1066
1067 NCR_LOCK_DRIVER(flags);
1068 mp = ___get_dma_pool(bush);
1069 if (!mp)
1070 mp = ___cre_dma_pool(bush);
1071 if (mp)
1072 m = __m_calloc(mp, size, name);
1073 if (mp && !mp->nump)
1074 ___del_dma_pool(mp);
1075 NCR_UNLOCK_DRIVER(flags);
1076
1077 return m;
1078 }
1079
1080 static void __m_free_dma(m_bush_t bush, void *m, int size, char *name)
1081 {
1082 u_long flags;
1083 struct m_pool *mp;
1084
1085 NCR_LOCK_DRIVER(flags);
1086 mp = ___get_dma_pool(bush);
1087 if (mp)
1088 __m_free(mp, m, size, name);
1089 if (mp && !mp->nump)
1090 ___del_dma_pool(mp);
1091 NCR_UNLOCK_DRIVER(flags);
1092 }
1093
1094 static m_addr_t __vtobus(m_bush_t bush, void *m)
1095 {
1096 u_long flags;
1097 m_pool_s *mp;
1098 int hc = VTOB_HASH_CODE(m);
1099 m_vtob_s *vp = 0;
1100 m_addr_t a = ((m_addr_t) m) & ~MEMO_CLUSTER_MASK;
1101
1102 NCR_LOCK_DRIVER(flags);
1103 mp = ___get_dma_pool(bush);
1104 if (mp) {
1105 vp = mp->vtob[hc];
1106 while (vp && (m_addr_t) vp->vaddr != a)
1107 vp = vp->next;
1108 }
1109 NCR_UNLOCK_DRIVER(flags);
1110 return vp ? vp->baddr + (((m_addr_t) m) - a) : 0;
1111 }
1112
1113 #endif /* SCSI_NCR_DYNAMIC_DMA_MAPPING */
1114
1115 #define _m_calloc_dma(np, s, n) __m_calloc_dma(np->pdev, s, n)
1116 #define _m_free_dma(np, p, s, n) __m_free_dma(np->pdev, p, s, n)
1117 #define m_calloc_dma(s, n) _m_calloc_dma(np, s, n)
1118 #define m_free_dma(p, s, n) _m_free_dma(np, p, s, n)
1119 #define _vtobus(np, p) __vtobus(np->pdev, p)
1120 #define vtobus(p) _vtobus(np, p)
1121
1122 /*
1123 * Deal with DMA mapping/unmapping.
1124 */
1125
1126 #ifndef SCSI_NCR_DYNAMIC_DMA_MAPPING
1127
1128 /* Linux versions prior to pci bus iommu kernel interface */
1129
1130 #define __unmap_scsi_data(pdev, cmd) do {; } while (0)
1131 #define __map_scsi_single_data(pdev, cmd) (__vtobus(pdev,(cmd)->request_buffer))
1132 #define __map_scsi_sg_data(pdev, cmd) ((cmd)->use_sg)
1133 #define __sync_scsi_data(pdev, cmd) do {; } while (0)
1134
1135 #define scsi_sg_dma_address(sc) vtobus((sc)->address)
1136 #define scsi_sg_dma_len(sc) ((sc)->length)
1137
1138 #else
1139
1140 /* Linux version with pci bus iommu kernel interface */
1141
1142 /* To keep track of the dma mapping (sg/single) that has been set */
1143 #define __data_mapped SCp.phase
1144 #define __data_mapping SCp.have_data_in
1145
1146 static void __unmap_scsi_data(pcidev_t pdev, Scsi_Cmnd *cmd)
1147 {
1148 int dma_dir = scsi_to_pci_dma_dir(cmd->sc_data_direction);
1149
1150 switch(cmd->__data_mapped) {
1151 case 2:
1152 pci_unmap_sg(pdev, cmd->buffer, cmd->use_sg, dma_dir);
1153 break;
1154 case 1:
1155 pci_unmap_single(pdev, cmd->__data_mapping,
1156 cmd->request_bufflen, dma_dir);
1157 break;
1158 }
1159 cmd->__data_mapped = 0;
1160 }
1161
1162 static u_long __map_scsi_single_data(pcidev_t pdev, Scsi_Cmnd *cmd)
1163 {
1164 dma_addr_t mapping;
1165 int dma_dir = scsi_to_pci_dma_dir(cmd->sc_data_direction);
1166
1167 if (cmd->request_bufflen == 0)
1168 return 0;
1169
1170 mapping = pci_map_single(pdev, cmd->request_buffer,
1171 cmd->request_bufflen, dma_dir);
1172 cmd->__data_mapped = 1;
1173 cmd->__data_mapping = mapping;
1174
1175 return mapping;
1176 }
1177
1178 static int __map_scsi_sg_data(pcidev_t pdev, Scsi_Cmnd *cmd)
1179 {
1180 int use_sg;
1181 int dma_dir = scsi_to_pci_dma_dir(cmd->sc_data_direction);
1182
1183 if (cmd->use_sg == 0)
1184 return 0;
1185
1186 use_sg = pci_map_sg(pdev, cmd->buffer, cmd->use_sg, dma_dir);
1187 cmd->__data_mapped = 2;
1188 cmd->__data_mapping = use_sg;
1189
1190 return use_sg;
1191 }
1192
1193 static void __sync_scsi_data(pcidev_t pdev, Scsi_Cmnd *cmd)
1194 {
1195 int dma_dir = scsi_to_pci_dma_dir(cmd->sc_data_direction);
1196
1197 switch(cmd->__data_mapped) {
1198 case 2:
1199 pci_dma_sync_sg(pdev, cmd->buffer, cmd->use_sg, dma_dir);
1200 break;
1201 case 1:
1202 pci_dma_sync_single(pdev, cmd->__data_mapping,
1203 cmd->request_bufflen, dma_dir);
1204 break;
1205 }
1206 }
1207
1208 #define scsi_sg_dma_address(sc) sg_dma_address(sc)
1209 #define scsi_sg_dma_len(sc) sg_dma_len(sc)
1210
1211 #endif /* SCSI_NCR_DYNAMIC_DMA_MAPPING */
1212
1213 #define unmap_scsi_data(np, cmd) __unmap_scsi_data(np->pdev, cmd)
1214 #define map_scsi_single_data(np, cmd) __map_scsi_single_data(np->pdev, cmd)
1215 #define map_scsi_sg_data(np, cmd) __map_scsi_sg_data(np->pdev, cmd)
1216 #define sync_scsi_data(np, cmd) __sync_scsi_data(np->pdev, cmd)
1217
1218
1219 /*
1220 * Print out some buffer.
1221 */
1222 static void ncr_print_hex(u_char *p, int n)
1223 {
1224 while (n-- > 0)
1225 printk (" %x", *p++);
1226 }
1227
1228 static void ncr_printl_hex(char *label, u_char *p, int n)
1229 {
1230 printk("%s", label);
1231 ncr_print_hex(p, n);
1232 printk (".\n");
1233 }
1234
1235 /*
1236 ** Transfer direction
1237 **
1238 ** Until some linux kernel version near 2.3.40, low-level scsi
1239 ** drivers were not told about data transfer direction.
1240 ** We check the existence of this feature that has been expected
1241 ** for a _long_ time by all SCSI driver developers by just
1242 ** testing against the definition of SCSI_DATA_UNKNOWN. Indeed
1243 ** this is a hack, but testing against a kernel version would
1244 ** have been a shame. ;-)
1245 */
1246 #ifdef SCSI_DATA_UNKNOWN
1247
1248 #define scsi_data_direction(cmd) (cmd->sc_data_direction)
1249
1250 #else
1251
1252 #define SCSI_DATA_UNKNOWN 0
1253 #define SCSI_DATA_WRITE 1
1254 #define SCSI_DATA_READ 2
1255 #define SCSI_DATA_NONE 3
1256
1257 static __inline__ int scsi_data_direction(Scsi_Cmnd *cmd)
1258 {
1259 int direction;
1260
1261 switch((int) cmd->cmnd[0]) {
1262 case 0x08: /* READ(6) 08 */
1263 case 0x28: /* READ(10) 28 */
1264 case 0xA8: /* READ(12) A8 */
1265 direction = SCSI_DATA_READ;
1266 break;
1267 case 0x0A: /* WRITE(6) 0A */
1268 case 0x2A: /* WRITE(10) 2A */
1269 case 0xAA: /* WRITE(12) AA */
1270 direction = SCSI_DATA_WRITE;
1271 break;
1272 default:
1273 direction = SCSI_DATA_UNKNOWN;
1274 break;
1275 }
1276
1277 return direction;
1278 }
1279
1280 #endif /* SCSI_DATA_UNKNOWN */
1281
1282 /*
1283 ** Head of list of NCR boards
1284 **
1285 ** For kernel version < 1.3.70, host is retrieved by its irq level.
1286 ** For later kernels, the internal host control block address
1287 ** (struct ncb) is used as device id parameter of the irq stuff.
1288 */
1289
1290 static struct Scsi_Host *first_host = NULL;
1291
1292
1293 /*
1294 ** /proc directory entry and proc_info function
1295 */
1296 #if LINUX_VERSION_CODE < LinuxVersionCode(2,3,27)
1297 static struct proc_dir_entry proc_scsi_sym53c8xx = {
1298 PROC_SCSI_SYM53C8XX, 9, NAME53C8XX,
1299 S_IFDIR | S_IRUGO | S_IXUGO, 2
1300 };
1301 #endif
1302 #ifdef SCSI_NCR_PROC_INFO_SUPPORT
1303 static int sym53c8xx_proc_info(char *buffer, char **start, off_t offset,
1304 int length, int hostno, int func);
1305 #endif
1306
1307 /*
1308 ** Driver setup.
1309 **
1310 ** This structure is initialized from linux config options.
1311 ** It can be overridden at boot-up by the boot command line.
1312 */
1313 static struct ncr_driver_setup
1314 driver_setup = SCSI_NCR_DRIVER_SETUP;
1315
1316 #ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT
1317 static struct ncr_driver_setup
1318 driver_safe_setup __initdata = SCSI_NCR_DRIVER_SAFE_SETUP;
1319 # ifdef MODULE
1320 char *sym53c8xx = 0; /* command line passed by insmod */
1321 # if LINUX_VERSION_CODE >= LinuxVersionCode(2,1,30)
1322 MODULE_PARM(sym53c8xx, "s");
1323 # endif
1324 # endif
1325 #endif
1326
1327 /*
1328 ** Other Linux definitions
1329 */
1330 #define SetScsiResult(cmd, h_sts, s_sts) \
1331 cmd->result = (((h_sts) << 16) + ((s_sts) & 0x7f))
1332
1333 /* We may have to remind our amnesiac SCSI layer of the reason of the abort */
1334 #if 0
1335 #define SetScsiAbortResult(cmd) \
1336 SetScsiResult( \
1337 cmd, \
1338 (cmd)->abort_reason == DID_TIME_OUT ? DID_TIME_OUT : DID_ABORT, \
1339 0xff)
1340 #else
1341 #define SetScsiAbortResult(cmd) SetScsiResult(cmd, DID_ABORT, 0xff)
1342 #endif
1343
1344 static void sym53c8xx_select_queue_depths(
1345 struct Scsi_Host *host, struct scsi_device *devlist);
1346 static void sym53c8xx_intr(int irq, void *dev_id, struct pt_regs * regs);
1347 static void sym53c8xx_timeout(unsigned long np);
1348
1349 #define initverbose (driver_setup.verbose)
1350 #define bootverbose (np->verbose)
1351
1352 #ifdef SCSI_NCR_NVRAM_SUPPORT
1353 static u_char Tekram_sync[16] __initdata =
1354 {25,31,37,43, 50,62,75,125, 12,15,18,21, 6,7,9,10};
1355 #endif /* SCSI_NCR_NVRAM_SUPPORT */
1356
1357 /*
1358 ** Structures used by sym53c8xx_detect/sym53c8xx_pci_init to
1359 ** transmit device configuration to the ncr_attach() function.
1360 */
1361 typedef struct {
1362 int bus;
1363 u_char device_fn;
1364 u_long base;
1365 u_long base_2;
1366 u_long io_port;
1367 u_long base_c;
1368 u_long base_2_c;
1369 int irq;
1370 /* port and reg fields to use INB, OUTB macros */
1371 u_long base_io;
1372 volatile struct ncr_reg *reg;
1373 } ncr_slot;
1374
1375 typedef struct {
1376 int type;
1377 #define SCSI_NCR_SYMBIOS_NVRAM (1)
1378 #define SCSI_NCR_TEKRAM_NVRAM (2)
1379 #ifdef SCSI_NCR_NVRAM_SUPPORT
1380 union {
1381 Symbios_nvram Symbios;
1382 Tekram_nvram Tekram;
1383 } data;
1384 #endif
1385 } ncr_nvram;
1386
1387 /*
1388 ** Structure used by sym53c8xx_detect/sym53c8xx_pci_init
1389 ** to save data on each detected board for ncr_attach().
1390 */
1391 typedef struct {
1392 pcidev_t pdev;
1393 ncr_slot slot;
1394 ncr_chip chip;
1395 ncr_nvram *nvram;
1396 u_char host_id;
1397 #ifdef SCSI_NCR_PQS_PDS_SUPPORT
1398 u_char pqs_pds;
1399 #endif
1400 int attach_done;
1401 } ncr_device;
1402
1403 /*==========================================================
1404 **
1405 ** assert ()
1406 **
1407 **==========================================================
1408 **
1409 ** modified copy from 386bsd:/usr/include/sys/assert.h
1410 **
1411 **----------------------------------------------------------
1412 */
1413
1414 #define assert(expression) { \
1415 if (!(expression)) { \
1416 (void)panic( \
1417 "assertion \"%s\" failed: file \"%s\", line %d\n", \
1418 #expression, \
1419 __FILE__, __LINE__); \
1420 } \
1421 }
1422
1423 /*==========================================================
1424 **
1425 ** Command control block states.
1426 **
1427 **==========================================================
1428 */
1429
1430 #define HS_IDLE (0)
1431 #define HS_BUSY (1)
1432 #define HS_NEGOTIATE (2) /* sync/wide data transfer*/
1433 #define HS_DISCONNECT (3) /* Disconnected by target */
1434
1435 #define HS_DONEMASK (0x80)
1436 #define HS_COMPLETE (4|HS_DONEMASK)
1437 #define HS_SEL_TIMEOUT (5|HS_DONEMASK) /* Selection timeout */
1438 #define HS_RESET (6|HS_DONEMASK) /* SCSI reset */
1439 #define HS_ABORTED (7|HS_DONEMASK) /* Transfer aborted */
1440 #define HS_TIMEOUT (8|HS_DONEMASK) /* Software timeout */
1441 #define HS_FAIL (9|HS_DONEMASK) /* SCSI or PCI bus errors */
1442 #define HS_UNEXPECTED (10|HS_DONEMASK)/* Unexpected disconnect */
1443
1444 #define DSA_INVALID 0xffffffff
1445
1446 /*==========================================================
1447 **
1448 ** Software Interrupt Codes
1449 **
1450 **==========================================================
1451 */
1452
1453 #define SIR_BAD_STATUS (1)
1454 #define SIR_SEL_ATN_NO_MSG_OUT (2)
1455 #define SIR_MSG_RECEIVED (3)
1456 #define SIR_MSG_WEIRD (4)
1457 #define SIR_NEGO_FAILED (5)
1458 #define SIR_NEGO_PROTO (6)
1459 #define SIR_SCRIPT_STOPPED (7)
1460 #define SIR_REJECT_TO_SEND (8)
1461 #define SIR_SWIDE_OVERRUN (9)
1462 #define SIR_SODL_UNDERRUN (10)
1463 #define SIR_RESEL_NO_MSG_IN (11)
1464 #define SIR_RESEL_NO_IDENTIFY (12)
1465 #define SIR_RESEL_BAD_LUN (13)
1466 #define SIR_TARGET_SELECTED (14)
1467 #define SIR_RESEL_BAD_I_T_L (15)
1468 #define SIR_RESEL_BAD_I_T_L_Q (16)
1469 #define SIR_ABORT_SENT (17)
1470 #define SIR_RESEL_ABORTED (18)
1471 #define SIR_MSG_OUT_DONE (19)
1472 #define SIR_AUTO_SENSE_DONE (20)
1473 #define SIR_DUMMY_INTERRUPT (21)
1474 #define SIR_DATA_OVERRUN (22)
1475 #define SIR_BAD_PHASE (23)
1476 #define SIR_MAX (23)
1477
1478 /*==========================================================
1479 **
1480 ** Extended error bits.
1481 ** xerr_status field of struct ccb.
1482 **
1483 **==========================================================
1484 */
1485
1486 #define XE_EXTRA_DATA (1) /* unexpected data phase */
1487 #define XE_BAD_PHASE (2) /* illegal phase (4/5) */
1488 #define XE_PARITY_ERR (4) /* unrecovered SCSI parity error */
1489 #define XE_SODL_UNRUN (1<<3)
1490 #define XE_SWIDE_OVRUN (1<<4)
1491
1492 /*==========================================================
1493 **
1494 ** Negotiation status.
1495 ** nego_status field of struct ccb.
1496 **
1497 **==========================================================
1498 */
1499
1500 #define NS_NOCHANGE (0)
1501 #define NS_SYNC (1)
1502 #define NS_WIDE (2)
1503 #define NS_PPR (4)
1504
1505 /*==========================================================
1506 **
1507 ** "Special features" of targets.
1508 ** quirks field of struct tcb.
1509 ** actualquirks field of struct ccb.
1510 **
1511 **==========================================================
1512 */
1513
1514 #define QUIRK_AUTOSAVE (0x01)
1515
1516 /*==========================================================
1517 **
1518 ** Capability bits in Inquire response byte 7.
1519 **
1520 **==========================================================
1521 */
1522
1523 #define INQ7_QUEUE (0x02)
1524 #define INQ7_SYNC (0x10)
1525 #define INQ7_WIDE16 (0x20)
1526
1527 /*==========================================================
1528 **
1529 ** A CCB hashed table is used to retrieve CCB address
1530 ** from DSA value.
1531 **
1532 **==========================================================
1533 */
1534
1535 #define CCB_HASH_SHIFT 8
1536 #define CCB_HASH_SIZE (1UL << CCB_HASH_SHIFT)
1537 #define CCB_HASH_MASK (CCB_HASH_SIZE-1)
1538 #define CCB_HASH_CODE(dsa) (((dsa) >> 11) & CCB_HASH_MASK)
1539
1540 /*==========================================================
1541 **
1542 ** Declaration of structs.
1543 **
1544 **==========================================================
1545 */
1546
1547 struct tcb;
1548 struct lcb;
1549 struct ccb;
1550 struct ncb;
1551 struct script;
1552
1553 typedef struct ncb * ncb_p;
1554 typedef struct tcb * tcb_p;
1555 typedef struct lcb * lcb_p;
1556 typedef struct ccb * ccb_p;
1557
1558 struct link {
1559 ncrcmd l_cmd;
1560 ncrcmd l_paddr;
1561 };
1562
1563 struct usrcmd {
1564 u_long target;
1565 u_long lun;
1566 u_long data;
1567 u_long cmd;
1568 };
1569
1570 #define UC_SETSYNC 10
1571 #define UC_SETTAGS 11
1572 #define UC_SETDEBUG 12
1573 #define UC_SETORDER 13
1574 #define UC_SETWIDE 14
1575 #define UC_SETFLAG 15
1576 #define UC_SETVERBOSE 17
1577 #define UC_RESETDEV 18
1578 #define UC_CLEARDEV 19
1579
1580 #define UF_TRACE (0x01)
1581 #define UF_NODISC (0x02)
1582 #define UF_NOSCAN (0x04)
1583
1584 /*========================================================================
1585 **
1586 ** Declaration of structs: target control block
1587 **
1588 **========================================================================
1589 */
1590 struct tcb {
1591 /*----------------------------------------------------------------
1592 ** LUN tables.
1593 ** An array of bus addresses is used on reselection by
1594 ** the SCRIPT.
1595 **----------------------------------------------------------------
1596 */
1597 u_int32 *luntbl; /* lcbs bus address table */
1598 u_int32 b_luntbl; /* bus address of this table */
1599 u_int32 b_lun0; /* bus address of lun0 */
1600 lcb_p l0p; /* lcb of LUN #0 (normal case) */
1601 #if MAX_LUN > 1
1602 lcb_p *lmp; /* Other lcb's [1..MAX_LUN] */
1603 #endif
1604 /*----------------------------------------------------------------
1605 ** Target capabilities.
1606 **----------------------------------------------------------------
1607 */
1608 u_char inq_done; /* Target capabilities received */
1609 u_char inq_byte7; /* Contains these capabilities */
1610
1611 /*----------------------------------------------------------------
1612 ** Some flags.
1613 **----------------------------------------------------------------
1614 */
1615 u_char to_reset; /* This target is to be reset */
1616
1617 /*----------------------------------------------------------------
1618 ** Pointer to the ccb used for negotiation.
1619 ** Prevent from starting a negotiation for all queued commands
1620 ** when tagged command queuing is enabled.
1621 **----------------------------------------------------------------
1622 */
1623 ccb_p nego_cp;
1624
1625 /*----------------------------------------------------------------
1626 ** negotiation of wide and synch transfer and device quirks.
1627 ** sval, wval and uval are read from SCRIPTS and so have alignment
1628 ** constraints.
1629 **----------------------------------------------------------------
1630 */
1631 /*0*/ u_char uval;
1632 /*1*/ u_char sval;
1633 /*2*/ u_char filler2;
1634 /*3*/ u_char wval;
1635 u_short period;
1636 u_char minsync;
1637 u_char maxoffs;
1638 u_char quirks;
1639 u_char widedone;
1640
1641 #ifdef SCSI_NCR_INTEGRITY_CHECKING
1642 u_char ic_min_sync;
1643 u_char ic_max_width;
1644 u_char ic_done;
1645 #endif
1646 u_char ic_maximums_set;
1647 u_char ppr_negotiation;
1648
1649 /*----------------------------------------------------------------
1650 ** User settable limits and options.
1651 ** These limits are read from the NVRAM if present.
1652 **----------------------------------------------------------------
1653 */
1654 u_char usrsync;
1655 u_char usrwide;
1656 u_short usrtags;
1657 u_char usrflag;
1658 };
1659
1660 /*========================================================================
1661 **
1662 ** Declaration of structs: lun control block
1663 **
1664 **========================================================================
1665 */
1666 struct lcb {
1667 /*----------------------------------------------------------------
1668 ** On reselection, SCRIPTS use this value as a JUMP address
1669 ** after the IDENTIFY has been successfully received.
1670 ** This field is set to 'resel_tag' if TCQ is enabled and
1671 ** to 'resel_notag' if TCQ is disabled.
1672 ** (Must be at zero due to bad lun handling on reselection)
1673 **----------------------------------------------------------------
1674 */
1675 /*0*/ u_int32 resel_task;
1676
1677 /*----------------------------------------------------------------
1678 ** Task table used by the script processor to retrieve the
1679 ** task corresponding to a reselected nexus. The TAG is used
1680 ** as offset to determine the corresponding entry.
1681 ** Each entry contains the associated CCB bus address.
1682 **----------------------------------------------------------------
1683 */
1684 u_int32 tasktbl_0; /* Used if TCQ not enabled */
1685 u_int32 *tasktbl;
1686 u_int32 b_tasktbl;
1687
1688 /*----------------------------------------------------------------
1689 ** CCB queue management.
1690 **----------------------------------------------------------------
1691 */
1692 XPT_QUEHEAD busy_ccbq; /* Queue of busy CCBs */
1693 XPT_QUEHEAD wait_ccbq; /* Queue of waiting for IO CCBs */
1694 u_short busyccbs; /* CCBs busy for this lun */
1695 u_short queuedccbs; /* CCBs queued to the controller*/
1696 u_short queuedepth; /* Queue depth for this lun */
1697 u_short scdev_depth; /* SCSI device queue depth */
1698 u_short maxnxs; /* Max possible nexuses */
1699
1700 /*----------------------------------------------------------------
1701 ** Control of tagged command queuing.
1702 ** Tags allocation is performed using a circular buffer.
1703 ** This avoids using a loop for tag allocation.
1704 **----------------------------------------------------------------
1705 */
1706 u_short ia_tag; /* Tag allocation index */
1707 u_short if_tag; /* Tag release index */
1708 u_char *cb_tags; /* Circular tags buffer */
1709 u_char inq_byte7; /* Store unit CmdQ capability */
1710 u_char usetags; /* Command queuing is active */
1711 u_char to_clear; /* User wants to clear all tasks*/
1712 u_short maxtags; /* Max NR of tags asked by user */
1713 u_short numtags; /* Current number of tags */
1714
1715 /*----------------------------------------------------------------
1716 ** QUEUE FULL and ORDERED tag control.
1717 **----------------------------------------------------------------
1718 */
1719 u_short num_good; /* Nr of GOOD since QUEUE FULL */
1720 u_short tags_sum[2]; /* Tags sum counters */
1721 u_char tags_si; /* Current index to tags sum */
1722 u_long tags_stime; /* Last time we switch tags_sum */
1723 };
1724
1725 /*========================================================================
1726 **
1727 ** Declaration of structs: actions for a task.
1728 **
1729 **========================================================================
1730 **
1731 ** It is part of the CCB and is called by the scripts processor to
1732 ** start or restart the data structure (nexus).
1733 **
1734 **------------------------------------------------------------------------
1735 */
1736 struct action {
1737 u_int32 start;
1738 u_int32 restart;
1739 };
1740
1741 /*========================================================================
1742 **
1743 ** Declaration of structs: Phase mismatch context.
1744 **
1745 **========================================================================
1746 **
1747 ** It is part of the CCB and is used as parameters for the DATA
1748 ** pointer. We need two contexts to handle correctly the SAVED
1749 ** DATA POINTER.
1750 **
1751 **------------------------------------------------------------------------
1752 */
1753 struct pm_ctx {
1754 struct scr_tblmove sg; /* Updated interrupted SG block */
1755 u_int32 ret; /* SCRIPT return address */
1756 };
1757
1758 /*========================================================================
1759 **
1760 ** Declaration of structs: global HEADER.
1761 **
1762 **========================================================================
1763 **
1764 ** In earlier driver versions, this substructure was copied from the
1765 ** ccb to a global address after selection (or reselection) and copied
1766 ** back before disconnect. Since we are now using LOAD/STORE DSA
1767 ** RELATIVE instructions, the script is able to access directly these
1768 ** fields, and so, this header is no more copied.
1769 **
1770 **------------------------------------------------------------------------
1771 */
1772
1773 struct head {
1774 /*----------------------------------------------------------------
1775 ** Start and restart SCRIPTS addresses (must be at 0).
1776 **----------------------------------------------------------------
1777 */
1778 struct action go;
1779
1780 /*----------------------------------------------------------------
1781 ** Saved data pointer.
1782 ** Points to the position in the script responsible for the
1783 ** actual transfer of data.
1784 ** It's written after reception of a SAVE_DATA_POINTER message.
1785 ** The goalpointer points after the last transfer command.
1786 **----------------------------------------------------------------
1787 */
1788 u_int32 savep;
1789 u_int32 lastp;
1790 u_int32 goalp;
1791
1792 /*----------------------------------------------------------------
1793 ** Alternate data pointer.
1794 ** They are copied back to savep/lastp/goalp by the SCRIPTS
1795 ** when the direction is unknown and the device claims data out.
1796 **----------------------------------------------------------------
1797 */
1798 u_int32 wlastp;
1799 u_int32 wgoalp;
1800
1801 /*----------------------------------------------------------------
1802 ** Status fields.
1803 **----------------------------------------------------------------
1804 */
1805 u_char status[4]; /* host status */
1806 };
1807
1808 /*
1809 ** LUN control block lookup.
1810 ** We use a direct pointer for LUN #0, and a table of pointers
1811 ** which is only allocated for devices that support LUN(s) > 0.
1812 */
1813 #if MAX_LUN <= 1
1814 #define ncr_lp(np, tp, lun) (!lun) ? (tp)->l0p : 0
1815 #else
1816 #define ncr_lp(np, tp, lun) \
1817 (!lun) ? (tp)->l0p : (tp)->lmp ? (tp)->lmp[(lun)] : 0
1818 #endif
1819
1820 /*
1821 ** The status bytes are used by the host and the script processor.
1822 **
1823 ** The four bytes (status[4]) are copied to the scratchb register
1824 ** (declared as scr0..scr3 in ncr_reg.h) just after the select/reselect,
1825 ** and copied back just after disconnecting.
1826 ** Inside the script the XX_REG are used.
1827 */
1828
1829 /*
1830 ** Last four bytes (script)
1831 */
1832 #define QU_REG scr0
1833 #define HS_REG scr1
1834 #define HS_PRT nc_scr1
1835 #define SS_REG scr2
1836 #define SS_PRT nc_scr2
1837 #define HF_REG scr3
1838 #define HF_PRT nc_scr3
1839
1840 /*
1841 ** Last four bytes (host)
1842 */
1843 #define actualquirks phys.header.status[0]
1844 #define host_status phys.header.status[1]
1845 #define scsi_status phys.header.status[2]
1846 #define host_flags phys.header.status[3]
1847
1848 /*
1849 ** Host flags
1850 */
1851 #define HF_IN_PM0 1u
1852 #define HF_IN_PM1 (1u<<1)
1853 #define HF_ACT_PM (1u<<2)
1854 #define HF_DP_SAVED (1u<<3)
1855 #define HF_AUTO_SENSE (1u<<4)
1856 #define HF_DATA_IN (1u<<5)
1857 #define HF_PM_TO_C (1u<<6)
1858 #define HF_EXT_ERR (1u<<7)
1859
1860 #ifdef SCSI_NCR_IARB_SUPPORT
1861 #define HF_HINT_IARB (1u<<7)
1862 #endif
1863
1864 /*
1865 ** This one is stolen from QU_REG.:)
1866 */
1867 #define HF_DATA_ST (1u<<7)
1868
1869 /*==========================================================
1870 **
1871 ** Declaration of structs: Data structure block
1872 **
1873 **==========================================================
1874 **
1875 ** During execution of a ccb by the script processor,
1876 ** the DSA (data structure address) register points
1877 ** to this substructure of the ccb.
1878 ** This substructure contains the header with
1879 ** the script-processor-changable data and
1880 ** data blocks for the indirect move commands.
1881 **
1882 **----------------------------------------------------------
1883 */
1884
1885 struct dsb {
1886
1887 /*
1888 ** Header.
1889 */
1890
1891 struct head header;
1892
1893 /*
1894 ** Table data for Script
1895 */
1896
1897 struct scr_tblsel select;
1898 struct scr_tblmove smsg ;
1899 struct scr_tblmove smsg_ext ;
1900 struct scr_tblmove cmd ;
1901 struct scr_tblmove sense ;
1902 struct scr_tblmove wresid;
1903 struct scr_tblmove data [MAX_SCATTER];
1904
1905 /*
1906 ** Phase mismatch contexts.
1907 ** We need two to handle correctly the
1908 ** SAVED DATA POINTER.
1909 */
1910
1911 struct pm_ctx pm0;
1912 struct pm_ctx pm1;
1913 };
1914
1915
1916 /*========================================================================
1917 **
1918 ** Declaration of structs: Command control block.
1919 **
1920 **========================================================================
1921 */
1922 struct ccb {
1923 /*----------------------------------------------------------------
1924 ** This is the data structure which is pointed by the DSA
1925 ** register when it is executed by the script processor.
1926 ** It must be the first entry.
1927 **----------------------------------------------------------------
1928 */
1929 struct dsb phys;
1930
1931 /*----------------------------------------------------------------
1932 ** The general SCSI driver provides a
1933 ** pointer to a control block.
1934 **----------------------------------------------------------------
1935 */
1936 Scsi_Cmnd *cmd; /* SCSI command */
1937 u_char cdb_buf[16]; /* Copy of CDB */
1938 u_char sense_buf[64];
1939 int data_len; /* Total data length */
1940 int segments; /* Number of SG segments */
1941
1942 /*----------------------------------------------------------------
1943 ** Message areas.
1944 ** We prepare a message to be sent after selection.
1945 ** We may use a second one if the command is rescheduled
1946 ** due to CHECK_CONDITION or QUEUE FULL status.
1947 ** Contents are IDENTIFY and SIMPLE_TAG.
1948 ** While negotiating sync or wide transfer,
1949 ** a SDTR or WDTR message is appended.
1950 **----------------------------------------------------------------
1951 */
1952 u_char scsi_smsg [12];
1953 u_char scsi_smsg2[12];
1954
1955 /*----------------------------------------------------------------
1956 ** Miscellaneous status'.
1957 **----------------------------------------------------------------
1958 */
1959 u_char nego_status; /* Negotiation status */
1960 u_char xerr_status; /* Extended error flags */
1961 u_int32 extra_bytes; /* Extraneous bytes transferred */
1962
1963 /*----------------------------------------------------------------
1964 ** Saved info for auto-sense
1965 **----------------------------------------------------------------
1966 */
1967 u_char sv_scsi_status;
1968 u_char sv_xerr_status;
1969
1970 /*----------------------------------------------------------------
1971 ** Other fields.
1972 **----------------------------------------------------------------
1973 */
1974 u_long p_ccb; /* BUS address of this CCB */
1975 u_char sensecmd[6]; /* Sense command */
1976 u_char to_abort; /* This CCB is to be aborted */
1977 u_short tag; /* Tag for this transfer */
1978 /* NO_TAG means no tag */
1979 u_char tags_si; /* Lun tags sum index (0,1) */
1980
1981 u_char target;
1982 u_char lun;
1983 u_short queued;
1984 ccb_p link_ccb; /* Host adapter CCB chain */
1985 ccb_p link_ccbh; /* Host adapter CCB hash chain */
1986 XPT_QUEHEAD link_ccbq; /* Link to unit CCB queue */
1987 u_int32 startp; /* Initial data pointer */
1988 u_int32 lastp0; /* Initial 'lastp' */
1989 int ext_sg; /* Extreme data pointer, used */
1990 int ext_ofs; /* to calculate the residual. */
1991 int resid;
1992 };
1993
1994 #define CCB_PHYS(cp,lbl) (cp->p_ccb + offsetof(struct ccb, lbl))
1995
1996
1997 /*========================================================================
1998 **
1999 ** Declaration of structs: NCR device descriptor
2000 **
2001 **========================================================================
2002 */
2003 struct ncb {
2004 /*----------------------------------------------------------------
2005 ** Idle task and invalid task actions and their bus
2006 ** addresses.
2007 **----------------------------------------------------------------
2008 */
2009 struct action idletask;
2010 struct action notask;
2011 struct action bad_i_t_l;
2012 struct action bad_i_t_l_q;
2013 u_long p_idletask;
2014 u_long p_notask;
2015 u_long p_bad_i_t_l;
2016 u_long p_bad_i_t_l_q;
2017
2018 /*----------------------------------------------------------------
2019 ** Dummy lun table to protect us against target returning bad
2020 ** lun number on reselection.
2021 **----------------------------------------------------------------
2022 */
2023 u_int32 *badluntbl; /* Table physical address */
2024 u_int32 resel_badlun; /* SCRIPT handler BUS address */
2025
2026 /*----------------------------------------------------------------
2027 ** Bit 32-63 of the on-chip RAM bus address in LE format.
2028 ** The START_RAM64 script loads the MMRS and MMWS from this
2029 ** field.
2030 **----------------------------------------------------------------
2031 */
2032 u_int32 scr_ram_seg;
2033
2034 /*----------------------------------------------------------------
2035 ** CCBs management queues.
2036 **----------------------------------------------------------------
2037 */
2038 Scsi_Cmnd *waiting_list; /* Commands waiting for a CCB */
2039 /* when lcb is not allocated. */
2040 Scsi_Cmnd *done_list; /* Commands waiting for done() */
2041 /* callback to be invoked. */
2042 #if LINUX_VERSION_CODE >= LinuxVersionCode(2,1,93)
2043 spinlock_t smp_lock; /* Lock for SMP threading */
2044 #endif
2045
2046 /*----------------------------------------------------------------
2047 ** Chip and controller indentification.
2048 **----------------------------------------------------------------
2049 */
2050 int unit; /* Unit number */
2051 char chip_name[8]; /* Chip name */
2052 char inst_name[16]; /* ncb instance name */
2053
2054 /*----------------------------------------------------------------
2055 ** Initial value of some IO register bits.
2056 ** These values are assumed to have been set by BIOS, and may
2057 ** be used for probing adapter implementation differences.
2058 **----------------------------------------------------------------
2059 */
2060 u_char sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest3, sv_ctest4,
2061 sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4, sv_stest1, sv_scntl4;
2062
2063 /*----------------------------------------------------------------
2064 ** Actual initial value of IO register bits used by the
2065 ** driver. They are loaded at initialisation according to
2066 ** features that are to be enabled.
2067 **----------------------------------------------------------------
2068 */
2069 u_char rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest3, rv_ctest4,
2070 rv_ctest5, rv_stest2, rv_ccntl0, rv_ccntl1, rv_scntl4;
2071
2072 /*----------------------------------------------------------------
2073 ** Target data.
2074 ** Target control block bus address array used by the SCRIPT
2075 ** on reselection.
2076 **----------------------------------------------------------------
2077 */
2078 struct tcb target[MAX_TARGET];
2079 u_int32 *targtbl;
2080
2081 /*----------------------------------------------------------------
2082 ** Virtual and physical bus addresses of the chip.
2083 **----------------------------------------------------------------
2084 */
2085 #ifndef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
2086 u_long base_va; /* MMIO base virtual address */
2087 u_long base2_va; /* On-chip RAM virtual address */
2088 #endif
2089 u_long base_ba; /* MMIO base bus address */
2090 u_long base_io; /* IO space base address */
2091 u_long base_ws; /* (MM)IO window size */
2092 u_long base2_ba; /* On-chip RAM bus address */
2093 u_long base2_ws; /* On-chip RAM window size */
2094 u_int irq; /* IRQ number */
2095 volatile /* Pointer to volatile for */
2096 struct ncr_reg *reg; /* memory mapped IO. */
2097
2098 /*----------------------------------------------------------------
2099 ** SCRIPTS virtual and physical bus addresses.
2100 ** 'script' is loaded in the on-chip RAM if present.
2101 ** 'scripth' stays in main memory for all chips except the
2102 ** 53C895A and 53C896 that provide 8K on-chip RAM.
2103 **----------------------------------------------------------------
2104 */
2105 struct script *script0; /* Copies of script and scripth */
2106 struct scripth *scripth0; /* relocated for this ncb. */
2107 u_long p_script; /* Actual script and scripth */
2108 u_long p_scripth; /* bus addresses. */
2109 u_long p_scripth0;
2110
2111 /*----------------------------------------------------------------
2112 ** General controller parameters and configuration.
2113 **----------------------------------------------------------------
2114 */
2115 pcidev_t pdev;
2116 u_short device_id; /* PCI device id */
2117 u_char revision_id; /* PCI device revision id */
2118 u_char bus; /* PCI BUS number */
2119 u_char device_fn; /* PCI BUS device and function */
2120 u_char myaddr; /* SCSI id of the adapter */
2121 u_char maxburst; /* log base 2 of dwords burst */
2122 u_char maxwide; /* Maximum transfer width */
2123 u_char minsync; /* Minimum sync period factor */
2124 u_char maxsync; /* Maximum sync period factor */
2125 u_char maxoffs; /* Max scsi offset */
2126 u_char maxoffs_st; /* Max scsi offset in ST mode */
2127 u_char multiplier; /* Clock multiplier (1,2,4) */
2128 u_char clock_divn; /* Number of clock divisors */
2129 u_long clock_khz; /* SCSI clock frequency in KHz */
2130 u_int features; /* Chip features map */
2131
2132 /*----------------------------------------------------------------
2133 ** Range for the PCI clock frequency measurement result
2134 ** that ensures the algorithm used by the driver can be
2135 ** trusted for the SCSI clock frequency measurement.
2136 ** (Assuming a PCI clock frequency of 33 MHz).
2137 **----------------------------------------------------------------
2138 */
2139 u_int pciclock_min;
2140 u_int pciclock_max;
2141
2142 /*----------------------------------------------------------------
2143 ** Start queue management.
2144 ** It is filled up by the host processor and accessed by the
2145 ** SCRIPTS processor in order to start SCSI commands.
2146 **----------------------------------------------------------------
2147 */
2148 u_long p_squeue; /* Start queue BUS address */
2149 u_int32 *squeue; /* Start queue virtual address */
2150 u_short squeueput; /* Next free slot of the queue */
2151 u_short actccbs; /* Number of allocated CCBs */
2152 u_short queuedepth; /* Start queue depth */
2153
2154 /*----------------------------------------------------------------
2155 ** Command completion queue.
2156 ** It is the same size as the start queue to avoid overflow.
2157 **----------------------------------------------------------------
2158 */
2159 u_short dqueueget; /* Next position to scan */
2160 u_int32 *dqueue; /* Completion (done) queue */
2161
2162 /*----------------------------------------------------------------
2163 ** Timeout handler.
2164 **----------------------------------------------------------------
2165 */
2166 struct timer_list timer; /* Timer handler link header */
2167 u_long lasttime;
2168 u_long settle_time; /* Resetting the SCSI BUS */
2169
2170 /*----------------------------------------------------------------
2171 ** Debugging and profiling.
2172 **----------------------------------------------------------------
2173 */
2174 struct ncr_reg regdump; /* Register dump */
2175 u_long regtime; /* Time it has been done */
2176
2177 /*----------------------------------------------------------------
2178 ** Miscellaneous buffers accessed by the scripts-processor.
2179 ** They shall be DWORD aligned, because they may be read or
2180 ** written with a script command.
2181 **----------------------------------------------------------------
2182 */
2183 u_char msgout[12]; /* Buffer for MESSAGE OUT */
2184 u_char msgin [12]; /* Buffer for MESSAGE IN */
2185 u_int32 lastmsg; /* Last SCSI message sent */
2186 u_char scratch; /* Scratch for SCSI receive */
2187
2188 /*----------------------------------------------------------------
2189 ** Miscellaneous configuration and status parameters.
2190 **----------------------------------------------------------------
2191 */
2192 u_char scsi_mode; /* Current SCSI BUS mode */
2193 u_char order; /* Tag order to use */
2194 u_char verbose; /* Verbosity for this controller*/
2195 u_int32 ncr_cache; /* Used for cache test at init. */
2196 u_long p_ncb; /* BUS address of this NCB */
2197
2198 /*----------------------------------------------------------------
2199 ** CCB lists and queue.
2200 **----------------------------------------------------------------
2201 */
2202 ccb_p ccbh[CCB_HASH_SIZE]; /* CCB hashed by DSA value */
2203 struct ccb *ccbc; /* CCB chain */
2204 XPT_QUEHEAD free_ccbq; /* Queue of available CCBs */
2205
2206 /*----------------------------------------------------------------
2207 ** IMMEDIATE ARBITRATION (IARB) control.
2208 ** We keep track in 'last_cp' of the last CCB that has been
2209 ** queued to the SCRIPTS processor and clear 'last_cp' when
2210 ** this CCB completes. If last_cp is not zero at the moment
2211 ** we queue a new CCB, we set a flag in 'last_cp' that is
2212 ** used by the SCRIPTS as a hint for setting IARB.
2213 ** We donnot set more than 'iarb_max' consecutive hints for
2214 ** IARB in order to leave devices a chance to reselect.
2215 ** By the way, any non zero value of 'iarb_max' is unfair. :)
2216 **----------------------------------------------------------------
2217 */
2218 #ifdef SCSI_NCR_IARB_SUPPORT
2219 struct ccb *last_cp; /* Last queud CCB used for IARB */
2220 u_short iarb_max; /* Max. # consecutive IARB hints*/
2221 u_short iarb_count; /* Actual # of these hints */
2222 #endif
2223
2224 /*----------------------------------------------------------------
2225 ** We need the LCB in order to handle disconnections and
2226 ** to count active CCBs for task management. So, we use
2227 ** a unique CCB for LUNs we donnot have the LCB yet.
2228 ** This queue normally should have at most 1 element.
2229 **----------------------------------------------------------------
2230 */
2231 XPT_QUEHEAD b0_ccbq;
2232
2233 /*----------------------------------------------------------------
2234 ** We use a different scatter function for 896 rev 1.
2235 **----------------------------------------------------------------
2236 */
2237 int (*scatter) (ncb_p, ccb_p, Scsi_Cmnd *);
2238
2239 /*----------------------------------------------------------------
2240 ** Command abort handling.
2241 ** We need to synchronize tightly with the SCRIPTS
2242 ** processor in order to handle things correctly.
2243 **----------------------------------------------------------------
2244 */
2245 u_char abrt_msg[4]; /* Message to send buffer */
2246 struct scr_tblmove abrt_tbl; /* Table for the MOV of it */
2247 struct scr_tblsel abrt_sel; /* Sync params for selection */
2248 u_char istat_sem; /* Tells the chip to stop (SEM) */
2249
2250 /*----------------------------------------------------------------
2251 ** Fields that should be removed or changed.
2252 **----------------------------------------------------------------
2253 */
2254 struct usrcmd user; /* Command from user */
2255 volatile u_char release_stage; /* Synchronisation stage on release */
2256
2257 /*----------------------------------------------------------------
2258 ** Fields that are used (primarily) for integrity check
2259 **----------------------------------------------------------------
2260 */
2261 unsigned char check_integrity; /* Enable midlayer integ. check on
2262 * bus scan. */
2263 #ifdef SCSI_NCR_INTEGRITY_CHECKING
2264 unsigned char check_integ_par; /* Set if par or Init. Det. error
2265 * used only during integ check */
2266 #endif
2267 };
2268
2269 #define NCB_PHYS(np, lbl) (np->p_ncb + offsetof(struct ncb, lbl))
2270 #define NCB_SCRIPT_PHYS(np,lbl) (np->p_script + offsetof (struct script, lbl))
2271 #define NCB_SCRIPTH_PHYS(np,lbl) (np->p_scripth + offsetof (struct scripth,lbl))
2272 #define NCB_SCRIPTH0_PHYS(np,lbl) (np->p_scripth0+offsetof (struct scripth,lbl))
2273
2274 /*==========================================================
2275 **
2276 **
2277 ** Script for NCR-Processor.
2278 **
2279 ** Use ncr_script_fill() to create the variable parts.
2280 ** Use ncr_script_copy_and_bind() to make a copy and
2281 ** bind to physical addresses.
2282 **
2283 **
2284 **==========================================================
2285 **
2286 ** We have to know the offsets of all labels before
2287 ** we reach them (for forward jumps).
2288 ** Therefore we declare a struct here.
2289 ** If you make changes inside the script,
2290 ** DONT FORGET TO CHANGE THE LENGTHS HERE!
2291 **
2292 **----------------------------------------------------------
2293 */
2294
2295 /*
2296 ** Script fragments which are loaded into the on-chip RAM
2297 ** of 825A, 875, 876, 895, 895A and 896 chips.
2298 */
2299 struct script {
2300 ncrcmd start [ 14];
2301 ncrcmd getjob_begin [ 4];
2302 ncrcmd getjob_end [ 4];
2303 ncrcmd select [ 8];
2304 ncrcmd wf_sel_done [ 2];
2305 ncrcmd send_ident [ 2];
2306 #ifdef SCSI_NCR_IARB_SUPPORT
2307 ncrcmd select2 [ 8];
2308 #else
2309 ncrcmd select2 [ 2];
2310 #endif
2311 ncrcmd command [ 2];
2312 ncrcmd dispatch [ 28];
2313 ncrcmd sel_no_cmd [ 10];
2314 ncrcmd init [ 6];
2315 ncrcmd clrack [ 4];
2316 ncrcmd disp_status [ 4];
2317 ncrcmd datai_done [ 26];
2318 ncrcmd datao_done [ 12];
2319 ncrcmd ign_i_w_r_msg [ 4];
2320 ncrcmd datai_phase [ 2];
2321 ncrcmd datao_phase [ 4];
2322 ncrcmd msg_in [ 2];
2323 ncrcmd msg_in2 [ 10];
2324 #ifdef SCSI_NCR_IARB_SUPPORT
2325 ncrcmd status [ 14];
2326 #else
2327 ncrcmd status [ 10];
2328 #endif
2329 ncrcmd complete [ 8];
2330 #ifdef SCSI_NCR_PCIQ_MAY_REORDER_WRITES
2331 ncrcmd complete2 [ 12];
2332 #else
2333 ncrcmd complete2 [ 10];
2334 #endif
2335 #ifdef SCSI_NCR_PCIQ_SYNC_ON_INTR
2336 ncrcmd done [ 18];
2337 #else
2338 ncrcmd done [ 14];
2339 #endif
2340 ncrcmd done_end [ 2];
2341 ncrcmd save_dp [ 8];
2342 ncrcmd restore_dp [ 4];
2343 ncrcmd disconnect [ 20];
2344 #ifdef SCSI_NCR_IARB_SUPPORT
2345 ncrcmd idle [ 4];
2346 #else
2347 ncrcmd idle [ 2];
2348 #endif
2349 #ifdef SCSI_NCR_IARB_SUPPORT
2350 ncrcmd ungetjob [ 6];
2351 #else
2352 ncrcmd ungetjob [ 4];
2353 #endif
2354 ncrcmd reselect [ 4];
2355 ncrcmd reselected [ 20];
2356 ncrcmd resel_scntl4 [ 30];
2357 #if MAX_TASKS*4 > 512
2358 ncrcmd resel_tag [ 18];
2359 #elif MAX_TASKS*4 > 256
2360 ncrcmd resel_tag [ 12];
2361 #else
2362 ncrcmd resel_tag [ 8];
2363 #endif
2364 ncrcmd resel_go [ 6];
2365 ncrcmd resel_notag [ 2];
2366 ncrcmd resel_dsa [ 8];
2367 ncrcmd data_in [MAX_SCATTER * SCR_SG_SIZE];
2368 ncrcmd data_in2 [ 4];
2369 ncrcmd data_out [MAX_SCATTER * SCR_SG_SIZE];
2370 ncrcmd data_out2 [ 4];
2371 ncrcmd pm0_data [ 12];
2372 ncrcmd pm0_data_out [ 6];
2373 ncrcmd pm0_data_end [ 6];
2374 ncrcmd pm1_data [ 12];
2375 ncrcmd pm1_data_out [ 6];
2376 ncrcmd pm1_data_end [ 6];
2377 };
2378
2379 /*
2380 ** Script fragments which stay in main memory for all chips
2381 ** except for the 895A and 896 that support 8K on-chip RAM.
2382 */
2383 struct scripth {
2384 ncrcmd start64 [ 2];
2385 ncrcmd no_data [ 2];
2386 ncrcmd sel_for_abort [ 18];
2387 ncrcmd sel_for_abort_1 [ 2];
2388 ncrcmd select_no_atn [ 8];
2389 ncrcmd wf_sel_done_no_atn [ 4];
2390
2391 ncrcmd msg_in_etc [ 14];
2392 ncrcmd msg_received [ 4];
2393 ncrcmd msg_weird_seen [ 4];
2394 ncrcmd msg_extended [ 20];
2395 ncrcmd msg_bad [ 6];
2396 ncrcmd msg_weird [ 4];
2397 ncrcmd msg_weird1 [ 8];
2398
2399 ncrcmd wdtr_resp [ 6];
2400 ncrcmd send_wdtr [ 4];
2401 ncrcmd sdtr_resp [ 6];
2402 ncrcmd send_sdtr [ 4];
2403 ncrcmd ppr_resp [ 6];
2404 ncrcmd send_ppr [ 4];
2405 ncrcmd nego_bad_phase [ 4];
2406 ncrcmd msg_out [ 4];
2407 ncrcmd msg_out_done [ 4];
2408 ncrcmd data_ovrun [ 2];
2409 ncrcmd data_ovrun1 [ 22];
2410 ncrcmd data_ovrun2 [ 8];
2411 ncrcmd abort_resel [ 16];
2412 ncrcmd resend_ident [ 4];
2413 ncrcmd ident_break [ 4];
2414 ncrcmd ident_break_atn [ 4];
2415 ncrcmd sdata_in [ 6];
2416 ncrcmd data_io [ 2];
2417 ncrcmd data_io_com [ 8];
2418 ncrcmd data_io_out [ 12];
2419 ncrcmd resel_bad_lun [ 4];
2420 ncrcmd bad_i_t_l [ 4];
2421 ncrcmd bad_i_t_l_q [ 4];
2422 ncrcmd bad_status [ 6];
2423 ncrcmd tweak_pmj [ 12];
2424 ncrcmd pm_handle [ 20];
2425 ncrcmd pm_handle1 [ 4];
2426 ncrcmd pm_save [ 4];
2427 ncrcmd pm0_save [ 14];
2428 ncrcmd pm1_save [ 14];
2429
2430 /* WSR handling */
2431 #ifdef SYM_DEBUG_PM_WITH_WSR
2432 ncrcmd pm_wsr_handle [ 44];
2433 #else
2434 ncrcmd pm_wsr_handle [ 42];
2435 #endif
2436 ncrcmd wsr_ma_helper [ 4];
2437
2438 /* Data area */
2439 ncrcmd zero [ 1];
2440 ncrcmd scratch [ 1];
2441 ncrcmd scratch1 [ 1];
2442 ncrcmd pm0_data_addr [ 1];
2443 ncrcmd pm1_data_addr [ 1];
2444 ncrcmd saved_dsa [ 1];
2445 ncrcmd saved_drs [ 1];
2446 ncrcmd done_pos [ 1];
2447 ncrcmd startpos [ 1];
2448 ncrcmd targtbl [ 1];
2449 /* End of data area */
2450
2451 #ifdef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
2452 ncrcmd start_ram [ 1];
2453 ncrcmd script0_ba [ 4];
2454 ncrcmd start_ram64 [ 3];
2455 ncrcmd script0_ba64 [ 3];
2456 ncrcmd scripth0_ba64 [ 6];
2457 ncrcmd ram_seg64 [ 1];
2458 #endif
2459 ncrcmd snooptest [ 6];
2460 ncrcmd snoopend [ 2];
2461 };
2462
2463 /*==========================================================
2464 **
2465 **
2466 ** Function headers.
2467 **
2468 **
2469 **==========================================================
2470 */
2471
2472 static ccb_p ncr_alloc_ccb (ncb_p np);
2473 static void ncr_complete (ncb_p np, ccb_p cp);
2474 static void ncr_exception (ncb_p np);
2475 static void ncr_free_ccb (ncb_p np, ccb_p cp);
2476 static ccb_p ncr_ccb_from_dsa(ncb_p np, u_long dsa);
2477 static void ncr_init_tcb (ncb_p np, u_char tn);
2478 static lcb_p ncr_alloc_lcb (ncb_p np, u_char tn, u_char ln);
2479 static lcb_p ncr_setup_lcb (ncb_p np, u_char tn, u_char ln,
2480 u_char *inq_data);
2481 static void ncr_getclock (ncb_p np, int mult);
2482 static u_int ncr_getpciclock (ncb_p np);
2483 static void ncr_selectclock (ncb_p np, u_char scntl3);
2484 static ccb_p ncr_get_ccb (ncb_p np, u_char tn, u_char ln);
2485 static void ncr_init (ncb_p np, int reset, char * msg, u_long code);
2486 static void ncr_int_sbmc (ncb_p np);
2487 static void ncr_int_par (ncb_p np, u_short sist);
2488 static void ncr_int_ma (ncb_p np);
2489 static void ncr_int_sir (ncb_p np);
2490 static void ncr_int_sto (ncb_p np);
2491 static void ncr_int_udc (ncb_p np);
2492 static void ncr_negotiate (ncb_p np, tcb_p tp);
2493 static int ncr_prepare_nego(ncb_p np, ccb_p cp, u_char *msgptr);
2494 #ifdef SCSI_NCR_INTEGRITY_CHECKING
2495 static int ncr_ic_nego(ncb_p np, ccb_p cp, Scsi_Cmnd *cmd, u_char *msgptr);
2496 #endif
2497 static void ncr_script_copy_and_bind
2498 (ncb_p np, ncrcmd *src, ncrcmd *dst, int len);
2499 static void ncr_script_fill (struct script * scr, struct scripth * scripth);
2500 static int ncr_scatter_896R1 (ncb_p np, ccb_p cp, Scsi_Cmnd *cmd);
2501 static int ncr_scatter (ncb_p np, ccb_p cp, Scsi_Cmnd *cmd);
2502 static void ncr_getsync (ncb_p np, u_char sfac, u_char *fakp, u_char *scntl3p);
2503 static void ncr_get_xfer_info(ncb_p np, tcb_p tp, u_char *factor, u_char *offset, u_char *width);
2504 static void ncr_setsync (ncb_p np, ccb_p cp, u_char scntl3, u_char sxfer, u_char scntl4);
2505 static void ncr_set_sync_wide_status (ncb_p np, u_char target);
2506 static void ncr_setup_tags (ncb_p np, u_char tn, u_char ln);
2507 static void ncr_setwide (ncb_p np, ccb_p cp, u_char wide, u_char ack);
2508 static void ncr_setsyncwide (ncb_p np, ccb_p cp, u_char scntl3, u_char sxfer, u_char scntl4, u_char wide);
2509 static int ncr_show_msg (u_char * msg);
2510 static void ncr_print_msg (ccb_p cp, char *label, u_char * msg);
2511 static int ncr_snooptest (ncb_p np);
2512 static void ncr_timeout (ncb_p np);
2513 static void ncr_wakeup (ncb_p np, u_long code);
2514 static int ncr_wakeup_done (ncb_p np);
2515 static void ncr_start_next_ccb (ncb_p np, lcb_p lp, int maxn);
2516 static void ncr_put_start_queue(ncb_p np, ccb_p cp);
2517 static void ncr_chip_reset (ncb_p np);
2518 static void ncr_soft_reset (ncb_p np);
2519 static void ncr_start_reset (ncb_p np);
2520 static int ncr_reset_scsi_bus (ncb_p np, int enab_int, int settle_delay);
2521 static int ncr_compute_residual (ncb_p np, ccb_p cp);
2522
2523 #ifdef SCSI_NCR_USER_COMMAND_SUPPORT
2524 static void ncr_usercmd (ncb_p np);
2525 #endif
2526
2527 static int ncr_attach (Scsi_Host_Template *tpnt, int unit, ncr_device *device);
2528 static void ncr_free_resources(ncb_p np);
2529
2530 static void insert_into_waiting_list(ncb_p np, Scsi_Cmnd *cmd);
2531 static Scsi_Cmnd *retrieve_from_waiting_list(int to_remove, ncb_p np, Scsi_Cmnd *cmd);
2532 static void process_waiting_list(ncb_p np, int sts);
2533
2534 #define remove_from_waiting_list(np, cmd) \
2535 retrieve_from_waiting_list(1, (np), (cmd))
2536 #define requeue_waiting_list(np) process_waiting_list((np), DID_OK)
2537 #define reset_waiting_list(np) process_waiting_list((np), DID_RESET)
2538
2539 #ifdef SCSI_NCR_NVRAM_SUPPORT
2540 static void ncr_get_nvram (ncr_device *devp, ncr_nvram *nvp);
2541 static int sym_read_Tekram_nvram (ncr_slot *np, u_short device_id,
2542 Tekram_nvram *nvram);
2543 static int sym_read_Symbios_nvram (ncr_slot *np, Symbios_nvram *nvram);
2544 #endif
2545
2546 /*==========================================================
2547 **
2548 **
2549 ** Global static data.
2550 **
2551 **
2552 **==========================================================
2553 */
2554
2555 static inline char *ncr_name (ncb_p np)
2556 {
2557 return np->inst_name;
2558 }
2559
2560
2561 /*==========================================================
2562 **
2563 **
2564 ** Scripts for NCR-Processor.
2565 **
2566 ** Use ncr_script_bind for binding to physical addresses.
2567 **
2568 **
2569 **==========================================================
2570 **
2571 ** NADDR generates a reference to a field of the controller data.
2572 ** PADDR generates a reference to another part of the script.
2573 ** RADDR generates a reference to a script processor register.
2574 ** FADDR generates a reference to a script processor register
2575 ** with offset.
2576 **
2577 **----------------------------------------------------------
2578 */
2579
2580 #define RELOC_SOFTC 0x40000000
2581 #define RELOC_LABEL 0x50000000
2582 #define RELOC_REGISTER 0x60000000
2583 #if 0
2584 #define RELOC_KVAR 0x70000000
2585 #endif
2586 #define RELOC_LABELH 0x80000000
2587 #define RELOC_MASK 0xf0000000
2588
2589 #define NADDR(label) (RELOC_SOFTC | offsetof(struct ncb, label))
2590 #define PADDR(label) (RELOC_LABEL | offsetof(struct script, label))
2591 #define PADDRH(label) (RELOC_LABELH | offsetof(struct scripth, label))
2592 #define RADDR(label) (RELOC_REGISTER | REG(label))
2593 #define FADDR(label,ofs)(RELOC_REGISTER | ((REG(label))+(ofs)))
2594 #define KVAR(which) (RELOC_KVAR | (which))
2595
2596 #define SCR_DATA_ZERO 0xf00ff00f
2597
2598 #ifdef RELOC_KVAR
2599 #define SCRIPT_KVAR_JIFFIES (0)
2600 #define SCRIPT_KVAR_FIRST SCRIPT_KVAR_JIFFIES
2601 #define SCRIPT_KVAR_LAST SCRIPT_KVAR_JIFFIES
2602 /*
2603 * Kernel variables referenced in the scripts.
2604 * THESE MUST ALL BE ALIGNED TO A 4-BYTE BOUNDARY.
2605 */
2606 static void *script_kvars[] __initdata =
2607 { (void *)&jiffies };
2608 #endif
2609
2610 static struct script script0 __initdata = {
2611 /*--------------------------< START >-----------------------*/ {
2612 /*
2613 ** This NOP will be patched with LED ON
2614 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe)
2615 */
2616 SCR_NO_OP,
2617 0,
2618 /*
2619 ** Clear SIGP.
2620 */
2621 SCR_FROM_REG (ctest2),
2622 0,
2623
2624 /*
2625 ** Stop here if the C code wants to perform
2626 ** some error recovery procedure manually.
2627 ** (Indicate this by setting SEM in ISTAT)
2628 */
2629 SCR_FROM_REG (istat),
2630 0,
2631 /*
2632 ** Report to the C code the next position in
2633 ** the start queue the SCRIPTS will schedule.
2634 ** The C code must not change SCRATCHA.
2635 */
2636 SCR_LOAD_ABS (scratcha, 4),
2637 PADDRH (startpos),
2638 SCR_INT ^ IFTRUE (MASK (SEM, SEM)),
2639 SIR_SCRIPT_STOPPED,
2640
2641 /*
2642 ** Start the next job.
2643 **
2644 ** @DSA = start point for this job.
2645 ** SCRATCHA = address of this job in the start queue.
2646 **
2647 ** We will restore startpos with SCRATCHA if we fails the
2648 ** arbitration or if it is the idle job.
2649 **
2650 ** The below GETJOB_BEGIN to GETJOB_END section of SCRIPTS
2651 ** is a critical path. If it is partially executed, it then
2652 ** may happen that the job address is not yet in the DSA
2653 ** and the the next queue position points to the next JOB.
2654 */
2655 SCR_LOAD_ABS (dsa, 4),
2656 PADDRH (startpos),
2657 SCR_LOAD_REL (temp, 4),
2658 4,
2659 }/*-------------------------< GETJOB_BEGIN >------------------*/,{
2660 SCR_STORE_ABS (temp, 4),
2661 PADDRH (startpos),
2662 SCR_LOAD_REL (dsa, 4),
2663 0,
2664 }/*-------------------------< GETJOB_END >--------------------*/,{
2665 SCR_LOAD_REL (temp, 4),
2666 0,
2667 SCR_RETURN,
2668 0,
2669
2670 }/*-------------------------< SELECT >----------------------*/,{
2671 /*
2672 ** DSA contains the address of a scheduled
2673 ** data structure.
2674 **
2675 ** SCRATCHA contains the address of the start queue
2676 ** entry which points to the next job.
2677 **
2678 ** Set Initiator mode.
2679 **
2680 ** (Target mode is left as an exercise for the reader)
2681 */
2682
2683 SCR_CLR (SCR_TRG),
2684 0,
2685 /*
2686 ** And try to select this target.
2687 */
2688 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select),
2689 PADDR (ungetjob),
2690 /*
2691 ** Now there are 4 possibilities:
2692 **
2693 ** (1) The ncr looses arbitration.
2694 ** This is ok, because it will try again,
2695 ** when the bus becomes idle.
2696 ** (But beware of the timeout function!)
2697 **
2698 ** (2) The ncr is reselected.
2699 ** Then the script processor takes the jump
2700 ** to the RESELECT label.
2701 **
2702 ** (3) The ncr wins arbitration.
2703 ** Then it will execute SCRIPTS instruction until
2704 ** the next instruction that checks SCSI phase.
2705 ** Then will stop and wait for selection to be
2706 ** complete or selection time-out to occur.
2707 **
2708 ** After having won arbitration, the ncr SCRIPTS
2709 ** processor is able to execute instructions while
2710 ** the SCSI core is performing SCSI selection. But
2711 ** some script instruction that is not waiting for
2712 ** a valid phase (or selection timeout) to occur
2713 ** breaks the selection procedure, by probably
2714 ** affecting timing requirements.
2715 ** So we have to wait immediately for the next phase
2716 ** or the selection to complete or time-out.
2717 */
2718
2719 /*
2720 ** load the savep (saved pointer) into
2721 ** the actual data pointer.
2722 */
2723 SCR_LOAD_REL (temp, 4),
2724 offsetof (struct ccb, phys.header.savep),
2725 /*
2726 ** Initialize the status registers
2727 */
2728 SCR_LOAD_REL (scr0, 4),
2729 offsetof (struct ccb, phys.header.status),
2730
2731 }/*-------------------------< WF_SEL_DONE >----------------------*/,{
2732 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2733 SIR_SEL_ATN_NO_MSG_OUT,
2734 }/*-------------------------< SEND_IDENT >----------------------*/,{
2735 /*
2736 ** Selection complete.
2737 ** Send the IDENTIFY and SIMPLE_TAG messages
2738 ** (and the M_X_SYNC_REQ / M_X_WIDE_REQ message)
2739 */
2740 SCR_MOVE_TBL ^ SCR_MSG_OUT,
2741 offsetof (struct dsb, smsg),
2742 }/*-------------------------< SELECT2 >----------------------*/,{
2743 #ifdef SCSI_NCR_IARB_SUPPORT
2744 /*
2745 ** Set IMMEDIATE ARBITRATION if we have been given
2746 ** a hint to do so. (Some job to do after this one).
2747 */
2748 SCR_FROM_REG (HF_REG),
2749 0,
2750 SCR_JUMPR ^ IFFALSE (MASK (HF_HINT_IARB, HF_HINT_IARB)),
2751 8,
2752 SCR_REG_REG (scntl1, SCR_OR, IARB),
2753 0,
2754 #endif
2755 /*
2756 ** Anticipate the COMMAND phase.
2757 ** This is the PHASE we expect at this point.
2758 */
2759 SCR_JUMP ^ IFFALSE (WHEN (SCR_COMMAND)),
2760 PADDR (sel_no_cmd),
2761
2762 }/*-------------------------< COMMAND >--------------------*/,{
2763 /*
2764 ** ... and send the command
2765 */
2766 SCR_MOVE_TBL ^ SCR_COMMAND,
2767 offsetof (struct dsb, cmd),
2768
2769 }/*-----------------------< DISPATCH >----------------------*/,{
2770 /*
2771 ** MSG_IN is the only phase that shall be
2772 ** entered at least once for each (re)selection.
2773 ** So we test it first.
2774 */
2775 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
2776 PADDR (msg_in),
2777 SCR_JUMP ^ IFTRUE (IF (SCR_DATA_OUT)),
2778 PADDR (datao_phase),
2779 SCR_JUMP ^ IFTRUE (IF (SCR_DATA_IN)),
2780 PADDR (datai_phase),
2781 SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)),
2782 PADDR (status),
2783 SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)),
2784 PADDR (command),
2785 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)),
2786 PADDRH (msg_out),
2787 /*
2788 * Discard as many illegal phases as
2789 * required and tell the C code about.
2790 */
2791 SCR_JUMPR ^ IFFALSE (WHEN (SCR_ILG_OUT)),
2792 16,
2793 SCR_MOVE_ABS (1) ^ SCR_ILG_OUT,
2794 NADDR (scratch),
2795 SCR_JUMPR ^ IFTRUE (WHEN (SCR_ILG_OUT)),
2796 -16,
2797 SCR_JUMPR ^ IFFALSE (WHEN (SCR_ILG_IN)),
2798 16,
2799 SCR_MOVE_ABS (1) ^ SCR_ILG_IN,
2800 NADDR (scratch),
2801 SCR_JUMPR ^ IFTRUE (WHEN (SCR_ILG_IN)),
2802 -16,
2803 SCR_INT,
2804 SIR_BAD_PHASE,
2805 SCR_JUMP,
2806 PADDR (dispatch),
2807 }/*---------------------< SEL_NO_CMD >----------------------*/,{
2808 /*
2809 ** The target does not switch to command
2810 ** phase after IDENTIFY has been sent.
2811 **
2812 ** If it stays in MSG OUT phase send it
2813 ** the IDENTIFY again.
2814 */
2815 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
2816 PADDRH (resend_ident),
2817 /*
2818 ** If target does not switch to MSG IN phase
2819 ** and we sent a negotiation, assert the
2820 ** failure immediately.
2821 */
2822 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
2823 PADDR (dispatch),
2824 SCR_FROM_REG (HS_REG),
2825 0,
2826 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
2827 SIR_NEGO_FAILED,
2828 /*
2829 ** Jump to dispatcher.
2830 */
2831 SCR_JUMP,
2832 PADDR (dispatch),
2833
2834 }/*-------------------------< INIT >------------------------*/,{
2835 /*
2836 ** Wait for the SCSI RESET signal to be
2837 ** inactive before restarting operations,
2838 ** since the chip may hang on SEL_ATN
2839 ** if SCSI RESET is active.
2840 */
2841 SCR_FROM_REG (sstat0),
2842 0,
2843 SCR_JUMPR ^ IFTRUE (MASK (IRST, IRST)),
2844 -16,
2845 SCR_JUMP,
2846 PADDR (start),
2847 }/*-------------------------< CLRACK >----------------------*/,{
2848 /*
2849 ** Terminate possible pending message phase.
2850 */
2851 SCR_CLR (SCR_ACK),
2852 0,
2853 SCR_JUMP,
2854 PADDR (dispatch),
2855
2856 }/*-------------------------< DISP_STATUS >----------------------*/,{
2857 /*
2858 ** Anticipate STATUS phase.
2859 **
2860 ** Does spare 3 SCRIPTS instructions when we have
2861 ** completed the INPUT of the data.
2862 */
2863 SCR_JUMP ^ IFTRUE (WHEN (SCR_STATUS)),
2864 PADDR (status),
2865 SCR_JUMP,
2866 PADDR (dispatch),
2867
2868 }/*-------------------------< DATAI_DONE >-------------------*/,{
2869 /*
2870 * If the device wants us to send more data,
2871 * we must count the extra bytes.
2872 */
2873 SCR_JUMP ^ IFTRUE (WHEN (SCR_DATA_IN)),
2874 PADDRH (data_ovrun),
2875 /*
2876 ** If the SWIDE is not full, jump to dispatcher.
2877 ** We anticipate a STATUS phase.
2878 ** If we get later an IGNORE WIDE RESIDUE, we
2879 ** will alias it as a MODIFY DP (-1).
2880 */
2881 SCR_FROM_REG (scntl2),
2882 0,
2883 SCR_JUMP ^ IFFALSE (MASK (WSR, WSR)),
2884 PADDR (disp_status),
2885 /*
2886 ** The SWIDE is full.
2887 ** Clear this condition.
2888 */
2889 SCR_REG_REG (scntl2, SCR_OR, WSR),
2890 0,
2891 /*
2892 * We are expecting an IGNORE RESIDUE message
2893 * from the device, otherwise we are in data
2894 * overrun condition. Check against MSG_IN phase.
2895 */
2896 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_IN)),
2897 SIR_SWIDE_OVERRUN,
2898 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2899 PADDR (disp_status),
2900 /*
2901 * We are in MSG_IN phase,
2902 * Read the first byte of the message.
2903 * If it is not an IGNORE RESIDUE message,
2904 * signal overrun and jump to message
2905 * processing.
2906 */
2907 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2908 NADDR (msgin[0]),
2909 SCR_INT ^ IFFALSE (DATA (M_IGN_RESIDUE)),
2910 SIR_SWIDE_OVERRUN,
2911 SCR_JUMP ^ IFFALSE (DATA (M_IGN_RESIDUE)),
2912 PADDR (msg_in2),
2913
2914 /*
2915 * We got the message we expected.
2916 * Read the 2nd byte, and jump to dispatcher.
2917 */
2918 SCR_CLR (SCR_ACK),
2919 0,
2920 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2921 NADDR (msgin[1]),
2922 SCR_CLR (SCR_ACK),
2923 0,
2924 SCR_JUMP,
2925 PADDR (disp_status),
2926
2927 }/*-------------------------< DATAO_DONE >-------------------*/,{
2928 /*
2929 * If the device wants us to send more data,
2930 * we must count the extra bytes.
2931 */
2932 SCR_JUMP ^ IFTRUE (WHEN (SCR_DATA_OUT)),
2933 PADDRH (data_ovrun),
2934 /*
2935 ** If the SODL is not full jump to dispatcher.
2936 ** We anticipate a MSG IN phase or a STATUS phase.
2937 */
2938 SCR_FROM_REG (scntl2),
2939 0,
2940 SCR_JUMP ^ IFFALSE (MASK (WSS, WSS)),
2941 PADDR (disp_status),
2942 /*
2943 ** The SODL is full, clear this condition.
2944 */
2945 SCR_REG_REG (scntl2, SCR_OR, WSS),
2946 0,
2947 /*
2948 ** And signal a DATA UNDERRUN condition
2949 ** to the C code.
2950 */
2951 SCR_INT,
2952 SIR_SODL_UNDERRUN,
2953 SCR_JUMP,
2954 PADDR (dispatch),
2955
2956 }/*-------------------------< IGN_I_W_R_MSG >--------------*/,{
2957 /*
2958 ** We jump here from the phase mismatch interrupt,
2959 ** When we have a SWIDE and the device has presented
2960 ** a IGNORE WIDE RESIDUE message on the BUS.
2961 ** We just have to throw away this message and then
2962 ** to jump to dispatcher.
2963 */
2964 SCR_MOVE_ABS (2) ^ SCR_MSG_IN,
2965 NADDR (scratch),
2966 /*
2967 ** Clear ACK and jump to dispatcher.
2968 */
2969 SCR_JUMP,
2970 PADDR (clrack),
2971
2972 }/*-------------------------< DATAI_PHASE >------------------*/,{
2973 SCR_RETURN,
2974 0,
2975 }/*-------------------------< DATAO_PHASE >------------------*/,{
2976 /*
2977 ** Patch for 53c1010_66 only - to allow A0 part
2978 ** to operate properly in a 33MHz PCI bus.
2979 **
2980 ** SCR_REG_REG(scntl4, SCR_OR, 0x0c),
2981 ** 0,
2982 */
2983 SCR_NO_OP,
2984 0,
2985 SCR_RETURN,
2986 0,
2987 }/*-------------------------< MSG_IN >--------------------*/,{
2988 /*
2989 ** Get the first byte of the message.
2990 **
2991 ** The script processor doesn't negate the
2992 ** ACK signal after this transfer.
2993 */
2994 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2995 NADDR (msgin[0]),
2996 }/*-------------------------< MSG_IN2 >--------------------*/,{
2997 /*
2998 ** Check first against 1 byte messages
2999 ** that we handle from SCRIPTS.
3000 */
3001 SCR_JUMP ^ IFTRUE (DATA (M_COMPLETE)),
3002 PADDR (complete),
3003 SCR_JUMP ^ IFTRUE (DATA (M_DISCONNECT)),
3004 PADDR (disconnect),
3005 SCR_JUMP ^ IFTRUE (DATA (M_SAVE_DP)),
3006 PADDR (save_dp),
3007 SCR_JUMP ^ IFTRUE (DATA (M_RESTORE_DP)),
3008 PADDR (restore_dp),
3009 /*
3010 ** We handle all other messages from the
3011 ** C code, so no need to waste on-chip RAM
3012 ** for those ones.
3013 */
3014 SCR_JUMP,
3015 PADDRH (msg_in_etc),
3016
3017 }/*-------------------------< STATUS >--------------------*/,{
3018 /*
3019 ** get the status
3020 */
3021 SCR_MOVE_ABS (1) ^ SCR_STATUS,
3022 NADDR (scratch),
3023 #ifdef SCSI_NCR_IARB_SUPPORT
3024 /*
3025 ** If STATUS is not GOOD, clear IMMEDIATE ARBITRATION,
3026 ** since we may have to tamper the start queue from
3027 ** the C code.
3028 */
3029 SCR_JUMPR ^ IFTRUE (DATA (S_GOOD)),
3030 8,
3031 SCR_REG_REG (scntl1, SCR_AND, ~IARB),
3032 0,
3033 #endif
3034 /*
3035 ** save status to scsi_status.
3036 ** mark as complete.
3037 */
3038 SCR_TO_REG (SS_REG),
3039 0,
3040 SCR_LOAD_REG (HS_REG, HS_COMPLETE),
3041 0,
3042 /*
3043 ** Anticipate the MESSAGE PHASE for
3044 ** the TASK COMPLETE message.
3045 */
3046 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
3047 PADDR (msg_in),
3048 SCR_JUMP,
3049 PADDR (dispatch),
3050
3051 }/*-------------------------< COMPLETE >-----------------*/,{
3052 /*
3053 ** Complete message.
3054 **
3055 ** Copy the data pointer to LASTP in header.
3056 */
3057 SCR_STORE_REL (temp, 4),
3058 offsetof (struct ccb, phys.header.lastp),
3059 /*
3060 ** When we terminate the cycle by clearing ACK,
3061 ** the target may disconnect immediately.
3062 **
3063 ** We don't want to be told of an
3064 ** "unexpected disconnect",
3065 ** so we disable this feature.
3066 */
3067 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
3068 0,
3069 /*
3070 ** Terminate cycle ...
3071 */
3072 SCR_CLR (SCR_ACK|SCR_ATN),
3073 0,
3074 /*
3075 ** ... and wait for the disconnect.
3076 */
3077 SCR_WAIT_DISC,
3078 0,
3079 }/*-------------------------< COMPLETE2 >-----------------*/,{
3080 /*
3081 ** Save host status to header.
3082 */
3083 SCR_STORE_REL (scr0, 4),
3084 offsetof (struct ccb, phys.header.status),
3085
3086 #ifdef SCSI_NCR_PCIQ_MAY_REORDER_WRITES
3087 /*
3088 ** Some bridges may reorder DMA writes to memory.
3089 ** We donnot want the CPU to deal with completions
3090 ** without all the posted write having been flushed
3091 ** to memory. This DUMMY READ should flush posted
3092 ** buffers prior to the CPU having to deal with
3093 ** completions.
3094 */
3095 SCR_LOAD_REL (scr0, 4), /* DUMMY READ */
3096 offsetof (struct ccb, phys.header.status),
3097 #endif
3098 /*
3099 ** If command resulted in not GOOD status,
3100 ** call the C code if needed.
3101 */
3102 SCR_FROM_REG (SS_REG),
3103 0,
3104 SCR_CALL ^ IFFALSE (DATA (S_GOOD)),
3105 PADDRH (bad_status),
3106
3107 /*
3108 ** If we performed an auto-sense, call
3109 ** the C code to synchronyze task aborts
3110 ** with UNIT ATTENTION conditions.
3111 */
3112 SCR_FROM_REG (HF_REG),
3113 0,
3114 SCR_INT ^ IFTRUE (MASK (HF_AUTO_SENSE, HF_AUTO_SENSE)),
3115 SIR_AUTO_SENSE_DONE,
3116
3117 }/*------------------------< DONE >-----------------*/,{
3118 #ifdef SCSI_NCR_PCIQ_SYNC_ON_INTR
3119 /*
3120 ** It seems that some bridges flush everything
3121 ** when the INTR line is raised. For these ones,
3122 ** we can just ensure that the INTR line will be
3123 ** raised before each completion. So, if it happens
3124 ** that we have been faster that the CPU, we just
3125 ** have to synchronize with it. A dummy programmed
3126 ** interrupt will do the trick.
3127 ** Note that we overlap at most 1 IO with the CPU
3128 ** in this situation and that the IRQ line must not
3129 ** be shared.
3130 */
3131 SCR_FROM_REG (istat),
3132 0,
3133 SCR_INT ^ IFTRUE (MASK (INTF, INTF)),
3134 SIR_DUMMY_INTERRUPT,
3135 #endif
3136 /*
3137 ** Copy the DSA to the DONE QUEUE and
3138 ** signal completion to the host.
3139 ** If we are interrupted between DONE
3140 ** and DONE_END, we must reset, otherwise
3141 ** the completed CCB will be lost.
3142 */
3143 SCR_STORE_ABS (dsa, 4),
3144 PADDRH (saved_dsa),
3145 SCR_LOAD_ABS (dsa, 4),
3146 PADDRH (done_pos),
3147 SCR_LOAD_ABS (scratcha, 4),
3148 PADDRH (saved_dsa),
3149 SCR_STORE_REL (scratcha, 4),
3150 0,
3151 /*
3152 ** The instruction below reads the DONE QUEUE next
3153 ** free position from memory.
3154 ** In addition it ensures that all PCI posted writes
3155 ** are flushed and so the DSA value of the done
3156 ** CCB is visible by the CPU before INTFLY is raised.
3157 */
3158 SCR_LOAD_REL (temp, 4),
3159 4,
3160 SCR_INT_FLY,
3161 0,
3162 SCR_STORE_ABS (temp, 4),
3163 PADDRH (done_pos),
3164 }/*------------------------< DONE_END >-----------------*/,{
3165 SCR_JUMP,
3166 PADDR (start),
3167
3168 }/*-------------------------< SAVE_DP >------------------*/,{
3169 /*
3170 ** Clear ACK immediately.
3171 ** No need to delay it.
3172 */
3173 SCR_CLR (SCR_ACK),
3174 0,
3175 /*
3176 ** Keep track we received a SAVE DP, so
3177 ** we will switch to the other PM context
3178 ** on the next PM since the DP may point
3179 ** to the current PM context.
3180 */
3181 SCR_REG_REG (HF_REG, SCR_OR, HF_DP_SAVED),
3182 0,
3183 /*
3184 ** SAVE_DP message:
3185 ** Copy the data pointer to SAVEP in header.
3186 */
3187 SCR_STORE_REL (temp, 4),
3188 offsetof (struct ccb, phys.header.savep),
3189 SCR_JUMP,
3190 PADDR (dispatch),
3191 }/*-------------------------< RESTORE_DP >---------------*/,{
3192 /*
3193 ** RESTORE_DP message:
3194 ** Copy SAVEP in header to actual data pointer.
3195 */
3196 SCR_LOAD_REL (temp, 4),
3197 offsetof (struct ccb, phys.header.savep),
3198 SCR_JUMP,
3199 PADDR (clrack),
3200
3201 }/*-------------------------< DISCONNECT >---------------*/,{
3202 /*
3203 ** DISCONNECTing ...
3204 **
3205 ** disable the "unexpected disconnect" feature,
3206 ** and remove the ACK signal.
3207 */
3208 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
3209 0,
3210 SCR_CLR (SCR_ACK|SCR_ATN),
3211 0,
3212 /*
3213 ** Wait for the disconnect.
3214 */
3215 SCR_WAIT_DISC,
3216 0,
3217 /*
3218 ** Status is: DISCONNECTED.
3219 */
3220 SCR_LOAD_REG (HS_REG, HS_DISCONNECT),
3221 0,
3222 /*
3223 ** Save host status to header.
3224 */
3225 SCR_STORE_REL (scr0, 4),
3226 offsetof (struct ccb, phys.header.status),
3227 /*
3228 ** If QUIRK_AUTOSAVE is set,
3229 ** do an "save pointer" operation.
3230 */
3231 SCR_FROM_REG (QU_REG),
3232 0,
3233 SCR_JUMP ^ IFFALSE (MASK (QUIRK_AUTOSAVE, QUIRK_AUTOSAVE)),
3234 PADDR (start),
3235 /*
3236 ** like SAVE_DP message:
3237 ** Remember we saved the data pointer.
3238 ** Copy data pointer to SAVEP in header.
3239 */
3240 SCR_REG_REG (HF_REG, SCR_OR, HF_DP_SAVED),
3241 0,
3242 SCR_STORE_REL (temp, 4),
3243 offsetof (struct ccb, phys.header.savep),
3244 SCR_JUMP,
3245 PADDR (start),
3246
3247 }/*-------------------------< IDLE >------------------------*/,{
3248 /*
3249 ** Nothing to do?
3250 ** Wait for reselect.
3251 ** This NOP will be patched with LED OFF
3252 ** SCR_REG_REG (gpreg, SCR_OR, 0x01)
3253 */
3254 SCR_NO_OP,
3255 0,
3256 #ifdef SCSI_NCR_IARB_SUPPORT
3257 SCR_JUMPR,
3258 8,
3259 #endif
3260 }/*-------------------------< UNGETJOB >-----------------*/,{
3261 #ifdef SCSI_NCR_IARB_SUPPORT
3262 /*
3263 ** Set IMMEDIATE ARBITRATION, for the next time.
3264 ** This will give us better chance to win arbitration
3265 ** for the job we just wanted to do.
3266 */
3267 SCR_REG_REG (scntl1, SCR_OR, IARB),
3268 0,
3269 #endif
3270 /*
3271 ** We are not able to restart the SCRIPTS if we are
3272 ** interrupted and these instruction haven't been
3273 ** all executed. BTW, this is very unlikely to
3274 ** happen, but we check that from the C code.
3275 */
3276 SCR_LOAD_REG (dsa, 0xff),
3277 0,
3278 SCR_STORE_ABS (scratcha, 4),
3279 PADDRH (startpos),
3280 }/*-------------------------< RESELECT >--------------------*/,{
3281 /*
3282 ** make the host status invalid.
3283 */
3284 SCR_CLR (SCR_TRG),
3285 0,
3286 /*
3287 ** Sleep waiting for a reselection.
3288 ** If SIGP is set, special treatment.
3289 **
3290 ** Zu allem bereit ..
3291 */
3292 SCR_WAIT_RESEL,
3293 PADDR(start),
3294 }/*-------------------------< RESELECTED >------------------*/,{
3295 /*
3296 ** This NOP will be patched with LED ON
3297 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe)
3298 */
3299 SCR_NO_OP,
3300 0,
3301 /*
3302 ** load the target id into the sdid
3303 */
3304 SCR_REG_SFBR (ssid, SCR_AND, 0x8F),
3305 0,
3306 SCR_TO_REG (sdid),
3307 0,
3308 /*
3309 ** load the target control block address
3310 */
3311 SCR_LOAD_ABS (dsa, 4),
3312 PADDRH (targtbl),
3313 SCR_SFBR_REG (dsa, SCR_SHL, 0),
3314 0,
3315 SCR_REG_REG (dsa, SCR_SHL, 0),
3316 0,
3317 SCR_REG_REG (dsa, SCR_AND, 0x3c),
3318 0,
3319 SCR_LOAD_REL (dsa, 4),
3320 0,
3321 /*
3322 ** Load the synchronous transfer registers.
3323 */
3324 SCR_LOAD_REL (scntl3, 1),
3325 offsetof(struct tcb, wval),
3326 SCR_LOAD_REL (sxfer, 1),
3327 offsetof(struct tcb, sval),
3328 }/*-------------------------< RESEL_SCNTL4 >------------------*/,{
3329 /*
3330 ** Write with uval value. Patch if device
3331 ** does not support Ultra3.
3332 **
3333 ** SCR_LOAD_REL (scntl4, 1),
3334 ** offsetof(struct tcb, uval),
3335 */
3336
3337 SCR_NO_OP,
3338 0,
3339 /*
3340 * We expect MESSAGE IN phase.
3341 * If not, get help from the C code.
3342 */
3343 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_IN)),
3344 SIR_RESEL_NO_MSG_IN,
3345 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3346 NADDR (msgin),
3347
3348 /*
3349 * If IDENTIFY LUN #0, use a faster path
3350 * to find the LCB structure.
3351 */
3352 SCR_JUMPR ^ IFTRUE (MASK (0x80, 0xbf)),
3353 56,
3354 /*
3355 * If message isn't an IDENTIFY,
3356 * tell the C code about.
3357 */
3358 SCR_INT ^ IFFALSE (MASK (0x80, 0x80)),
3359 SIR_RESEL_NO_IDENTIFY,
3360 /*
3361 * It is an IDENTIFY message,
3362 * Load the LUN control block address.
3363 */
3364 SCR_LOAD_REL (dsa, 4),
3365 offsetof(struct tcb, b_luntbl),
3366 SCR_SFBR_REG (dsa, SCR_SHL, 0),
3367 0,
3368 SCR_REG_REG (dsa, SCR_SHL, 0),
3369 0,
3370 SCR_REG_REG (dsa, SCR_AND, 0xfc),
3371 0,
3372 SCR_LOAD_REL (dsa, 4),
3373 0,
3374 SCR_JUMPR,
3375 8,
3376 /*
3377 ** LUN 0 special case (but usual one :))
3378 */
3379 SCR_LOAD_REL (dsa, 4),
3380 offsetof(struct tcb, b_lun0),
3381
3382 /*
3383 ** Load the reselect task action for this LUN.
3384 ** Load the tasks DSA array for this LUN.
3385 ** Call the action.
3386 */
3387 SCR_LOAD_REL (temp, 4),
3388 offsetof(struct lcb, resel_task),
3389 SCR_LOAD_REL (dsa, 4),
3390 offsetof(struct lcb, b_tasktbl),
3391 SCR_RETURN,
3392 0,
3393 }/*-------------------------< RESEL_TAG >-------------------*/,{
3394 /*
3395 ** ACK the IDENTIFY or TAG previously received
3396 */
3397
3398 SCR_CLR (SCR_ACK),
3399 0,
3400 /*
3401 ** Read IDENTIFY + SIMPLE + TAG using a single MOVE.
3402 ** Agressive optimization, is'nt it?
3403 ** No need to test the SIMPLE TAG message, since the
3404 ** driver only supports conformant devices for tags. ;-)
3405 */
3406 SCR_MOVE_ABS (2) ^ SCR_MSG_IN,
3407 NADDR (msgin),
3408 /*
3409 ** Read the TAG from the SIDL.
3410 ** Still an aggressive optimization. ;-)
3411 ** Compute the CCB indirect jump address which
3412 ** is (#TAG*2 & 0xfc) due to tag numbering using
3413 ** 1,3,5..MAXTAGS*2+1 actual values.
3414 */
3415 SCR_REG_SFBR (sidl, SCR_SHL, 0),
3416 0,
3417 #if MAX_TASKS*4 > 512
3418 SCR_JUMPR ^ IFFALSE (CARRYSET),
3419 8,
3420 SCR_REG_REG (dsa1, SCR_OR, 2),
3421 0,
3422 SCR_REG_REG (sfbr, SCR_SHL, 0),
3423 0,
3424 SCR_JUMPR ^ IFFALSE (CARRYSET),
3425 8,
3426 SCR_REG_REG (dsa1, SCR_OR, 1),
3427 0,
3428 #elif MAX_TASKS*4 > 256
3429 SCR_JUMPR ^ IFFALSE (CARRYSET),
3430 8,
3431 SCR_REG_REG (dsa1, SCR_OR, 1),
3432 0,
3433 #endif
3434 /*
3435 ** Retrieve the DSA of this task.
3436 ** JUMP indirectly to the restart point of the CCB.
3437 */
3438 SCR_SFBR_REG (dsa, SCR_AND, 0xfc),
3439 0,
3440 }/*-------------------------< RESEL_GO >-------------------*/,{
3441 SCR_LOAD_REL (dsa, 4),
3442 0,
3443 SCR_LOAD_REL (temp, 4),
3444 offsetof(struct ccb, phys.header.go.restart),
3445 SCR_RETURN,
3446 0,
3447 /* In normal situations we branch to RESEL_DSA */
3448 }/*-------------------------< RESEL_NOTAG >-------------------*/,{
3449 /*
3450 ** JUMP indirectly to the restart point of the CCB.
3451 */
3452 SCR_JUMP,
3453 PADDR (resel_go),
3454
3455 }/*-------------------------< RESEL_DSA >-------------------*/,{
3456 /*
3457 ** Ack the IDENTIFY or TAG previously received.
3458 */
3459 SCR_CLR (SCR_ACK),
3460 0,
3461 /*
3462 ** load the savep (saved pointer) into
3463 ** the actual data pointer.
3464 */
3465 SCR_LOAD_REL (temp, 4),
3466 offsetof (struct ccb, phys.header.savep),
3467 /*
3468 ** Initialize the status registers
3469 */
3470 SCR_LOAD_REL (scr0, 4),
3471 offsetof (struct ccb, phys.header.status),
3472 /*
3473 ** Jump to dispatcher.
3474 */
3475 SCR_JUMP,
3476 PADDR (dispatch),
3477
3478 }/*-------------------------< DATA_IN >--------------------*/,{
3479 /*
3480 ** Because the size depends on the
3481 ** #define MAX_SCATTER parameter,
3482 ** it is filled in at runtime.
3483 **
3484 ** ##===========< i=0; i<MAX_SCATTER >=========
3485 ** || SCR_CHMOV_TBL ^ SCR_DATA_IN,
3486 ** || offsetof (struct dsb, data[ i]),
3487 ** ##==========================================
3488 **
3489 **---------------------------------------------------------
3490 */
3491 0
3492 }/*-------------------------< DATA_IN2 >-------------------*/,{
3493 SCR_CALL,
3494 PADDR (datai_done),
3495 SCR_JUMP,
3496 PADDRH (data_ovrun),
3497 }/*-------------------------< DATA_OUT >--------------------*/,{
3498 /*
3499 ** Because the size depends on the
3500 ** #define MAX_SCATTER parameter,
3501 ** it is filled in at runtime.
3502 **
3503 ** ##===========< i=0; i<MAX_SCATTER >=========
3504 ** || SCR_CHMOV_TBL ^ SCR_DATA_OUT,
3505 ** || offsetof (struct dsb, data[ i]),
3506 ** ##==========================================
3507 **
3508 **---------------------------------------------------------
3509 */
3510 0
3511 }/*-------------------------< DATA_OUT2 >-------------------*/,{
3512 SCR_CALL,
3513 PADDR (datao_done),
3514 SCR_JUMP,
3515 PADDRH (data_ovrun),
3516
3517 }/*-------------------------< PM0_DATA >--------------------*/,{
3518 /*
3519 ** Read our host flags to SFBR, so we will be able
3520 ** to check against the data direction we expect.
3521 */
3522 SCR_FROM_REG (HF_REG),
3523 0,
3524 /*
3525 ** Check against actual DATA PHASE.
3526 */
3527 SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
3528 PADDR (pm0_data_out),
3529 /*
3530 ** Actual phase is DATA IN.
3531 ** Check against expected direction.
3532 */
3533 SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),
3534 PADDRH (data_ovrun),
3535 /*
3536 ** Keep track we are moving data from the
3537 ** PM0 DATA mini-script.
3538 */
3539 SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM0),
3540 0,
3541 /*
3542 ** Move the data to memory.
3543 */
3544 SCR_CHMOV_TBL ^ SCR_DATA_IN,
3545 offsetof (struct ccb, phys.pm0.sg),
3546 SCR_JUMP,
3547 PADDR (pm0_data_end),
3548 }/*-------------------------< PM0_DATA_OUT >----------------*/,{
3549 /*
3550 ** Actual phase is DATA OUT.
3551 ** Check against expected direction.
3552 */
3553 SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),
3554 PADDRH (data_ovrun),
3555 /*
3556 ** Keep track we are moving data from the
3557 ** PM0 DATA mini-script.
3558 */
3559 SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM0),
3560 0,
3561 /*
3562 ** Move the data from memory.
3563 */
3564 SCR_CHMOV_TBL ^ SCR_DATA_OUT,
3565 offsetof (struct ccb, phys.pm0.sg),
3566 }/*-------------------------< PM0_DATA_END >----------------*/,{
3567 /*
3568 ** Clear the flag that told we were moving
3569 ** data from the PM0 DATA mini-script.
3570 */
3571 SCR_REG_REG (HF_REG, SCR_AND, (~HF_IN_PM0)),
3572 0,
3573 /*
3574 ** Return to the previous DATA script which
3575 ** is guaranteed by design (if no bug) to be
3576 ** the main DATA script for this transfer.
3577 */
3578 SCR_LOAD_REL (temp, 4),
3579 offsetof (struct ccb, phys.pm0.ret),
3580 SCR_RETURN,
3581 0,
3582 }/*-------------------------< PM1_DATA >--------------------*/,{
3583 /*
3584 ** Read our host flags to SFBR, so we will be able
3585 ** to check against the data direction we expect.
3586 */
3587 SCR_FROM_REG (HF_REG),
3588 0,
3589 /*
3590 ** Check against actual DATA PHASE.
3591 */
3592 SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
3593 PADDR (pm1_data_out),
3594 /*
3595 ** Actual phase is DATA IN.
3596 ** Check against expected direction.
3597 */
3598 SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),
3599 PADDRH (data_ovrun),
3600 /*
3601 ** Keep track we are moving data from the
3602 ** PM1 DATA mini-script.
3603 */
3604 SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM1),
3605 0,
3606 /*
3607 ** Move the data to memory.
3608 */
3609 SCR_CHMOV_TBL ^ SCR_DATA_IN,
3610 offsetof (struct ccb, phys.pm1.sg),
3611 SCR_JUMP,
3612 PADDR (pm1_data_end),
3613 }/*-------------------------< PM1_DATA_OUT >----------------*/,{
3614 /*
3615 ** Actual phase is DATA OUT.
3616 ** Check against expected direction.
3617 */
3618 SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),
3619 PADDRH (data_ovrun),
3620 /*
3621 ** Keep track we are moving data from the
3622 ** PM1 DATA mini-script.
3623 */
3624 SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM1),
3625 0,
3626 /*
3627 ** Move the data from memory.
3628 */
3629 SCR_CHMOV_TBL ^ SCR_DATA_OUT,
3630 offsetof (struct ccb, phys.pm1.sg),
3631 }/*-------------------------< PM1_DATA_END >----------------*/,{
3632 /*
3633 ** Clear the flag that told we were moving
3634 ** data from the PM1 DATA mini-script.
3635 */
3636 SCR_REG_REG (HF_REG, SCR_AND, (~HF_IN_PM1)),
3637 0,
3638 /*
3639 ** Return to the previous DATA script which
3640 ** is guaranteed by design (if no bug) to be
3641 ** the main DATA script for this transfer.
3642 */
3643 SCR_LOAD_REL (temp, 4),
3644 offsetof (struct ccb, phys.pm1.ret),
3645 SCR_RETURN,
3646 0,
3647 }/*---------------------------------------------------------*/
3648 };
3649
3650
3651 static struct scripth scripth0 __initdata = {
3652 /*------------------------< START64 >-----------------------*/{
3653 /*
3654 ** SCRIPT entry point for the 895A and the 896.
3655 ** For now, there is no specific stuff for that
3656 ** chip at this point, but this may come.
3657 */
3658 SCR_JUMP,
3659 PADDR (init),
3660 }/*-------------------------< NO_DATA >-------------------*/,{
3661 SCR_JUMP,
3662 PADDRH (data_ovrun),
3663 }/*-----------------------< SEL_FOR_ABORT >------------------*/,{
3664 /*
3665 ** We are jumped here by the C code, if we have
3666 ** some target to reset or some disconnected
3667 ** job to abort. Since error recovery is a serious
3668 ** busyness, we will really reset the SCSI BUS, if
3669 ** case of a SCSI interrupt occuring in this path.
3670 */
3671
3672 /*
3673 ** Set initiator mode.
3674 */
3675 SCR_CLR (SCR_TRG),
3676 0,
3677 /*
3678 ** And try to select this target.
3679 */
3680 SCR_SEL_TBL_ATN ^ offsetof (struct ncb, abrt_sel),
3681 PADDR (reselect),
3682
3683 /*
3684 ** Wait for the selection to complete or
3685 ** the selection to time out.
3686 */
3687 SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_OUT)),
3688 -8,
3689 /*
3690 ** Call the C code.
3691 */
3692 SCR_INT,
3693 SIR_TARGET_SELECTED,
3694 /*
3695 ** The C code should let us continue here.
3696 ** Send the 'kiss of death' message.
3697 ** We expect an immediate disconnect once
3698 ** the target has eaten the message.
3699 */
3700 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
3701 0,
3702 SCR_MOVE_TBL ^ SCR_MSG_OUT,
3703 offsetof (struct ncb, abrt_tbl),
3704 SCR_CLR (SCR_ACK|SCR_ATN),
3705 0,
3706 SCR_WAIT_DISC,
3707 0,
3708 /*
3709 ** Tell the C code that we are done.
3710 */
3711 SCR_INT,
3712 SIR_ABORT_SENT,
3713 }/*-----------------------< SEL_FOR_ABORT_1 >--------------*/,{
3714 /*
3715 ** Jump at scheduler.
3716 */
3717 SCR_JUMP,
3718 PADDR (start),
3719
3720 }/*------------------------< SELECT_NO_ATN >-----------------*/,{
3721 /*
3722 ** Set Initiator mode.
3723 ** And try to select this target without ATN.
3724 */
3725
3726 SCR_CLR (SCR_TRG),
3727 0,
3728 SCR_SEL_TBL ^ offsetof (struct dsb, select),
3729 PADDR (ungetjob),
3730 /*
3731 ** load the savep (saved pointer) into
3732 ** the actual data pointer.
3733 */
3734 SCR_LOAD_REL (temp, 4),
3735 offsetof (struct ccb, phys.header.savep),
3736 /*
3737 ** Initialize the status registers
3738 */
3739 SCR_LOAD_REL (scr0, 4),
3740 offsetof (struct ccb, phys.header.status),
3741
3742 }/*------------------------< WF_SEL_DONE_NO_ATN >-----------------*/,{
3743 /*
3744 ** Wait immediately for the next phase or
3745 ** the selection to complete or time-out.
3746 */
3747 SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_OUT)),
3748 0,
3749 SCR_JUMP,
3750 PADDR (select2),
3751
3752 }/*-------------------------< MSG_IN_ETC >--------------------*/,{
3753 /*
3754 ** If it is an EXTENDED (variable size message)
3755 ** Handle it.
3756 */
3757 SCR_JUMP ^ IFTRUE (DATA (M_EXTENDED)),
3758 PADDRH (msg_extended),
3759 /*
3760 ** Let the C code handle any other
3761 ** 1 byte message.
3762 */
3763 SCR_JUMP ^ IFTRUE (MASK (0x00, 0xf0)),
3764 PADDRH (msg_received),
3765 SCR_JUMP ^ IFTRUE (MASK (0x10, 0xf0)),
3766 PADDRH (msg_received),
3767 /*
3768 ** We donnot handle 2 bytes messages from SCRIPTS.
3769 ** So, let the C code deal with these ones too.
3770 */
3771 SCR_JUMP ^ IFFALSE (MASK (0x20, 0xf0)),
3772 PADDRH (msg_weird_seen),
3773 SCR_CLR (SCR_ACK),
3774 0,
3775 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3776 NADDR (msgin[1]),
3777 SCR_JUMP,
3778 PADDRH (msg_received),
3779
3780 }/*-------------------------< MSG_RECEIVED >--------------------*/,{
3781 SCR_LOAD_REL (scratcha, 4), /* DUMMY READ */
3782 0,
3783 SCR_INT,
3784 SIR_MSG_RECEIVED,
3785
3786 }/*-------------------------< MSG_WEIRD_SEEN >------------------*/,{
3787 SCR_LOAD_REL (scratcha, 4), /* DUMMY READ */
3788 0,
3789 SCR_INT,
3790 SIR_MSG_WEIRD,
3791
3792 }/*-------------------------< MSG_EXTENDED >--------------------*/,{
3793 /*
3794 ** Clear ACK and get the next byte
3795 ** assumed to be the message length.
3796 */
3797 SCR_CLR (SCR_ACK),
3798 0,
3799 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3800 NADDR (msgin[1]),
3801 /*
3802 ** Try to catch some unlikely situations as 0 length
3803 ** or too large the length.
3804 */
3805 SCR_JUMP ^ IFTRUE (DATA (0)),
3806 PADDRH (msg_weird_seen),
3807 SCR_TO_REG (scratcha),
3808 0,
3809 SCR_REG_REG (sfbr, SCR_ADD, (256-8)),
3810 0,
3811 SCR_JUMP ^ IFTRUE (CARRYSET),
3812 PADDRH (msg_weird_seen),
3813 /*
3814 ** We donnot handle extended messages from SCRIPTS.
3815 ** Read the amount of data correponding to the
3816 ** message length and call the C code.
3817 */
3818 SCR_STORE_REL (scratcha, 1),
3819 offsetof (struct dsb, smsg_ext.size),
3820 SCR_CLR (SCR_ACK),
3821 0,
3822 SCR_MOVE_TBL ^ SCR_MSG_IN,
3823 offsetof (struct dsb, smsg_ext),
3824 SCR_JUMP,
3825 PADDRH (msg_received),
3826
3827 }/*-------------------------< MSG_BAD >------------------*/,{
3828 /*
3829 ** unimplemented message - reject it.
3830 */
3831 SCR_INT,
3832 SIR_REJECT_TO_SEND,
3833 SCR_SET (SCR_ATN),
3834 0,
3835 SCR_JUMP,
3836 PADDR (clrack),
3837
3838 }/*-------------------------< MSG_WEIRD >--------------------*/,{
3839 /*
3840 ** weird message received
3841 ** ignore all MSG IN phases and reject it.
3842 */
3843 SCR_INT,
3844 SIR_REJECT_TO_SEND,
3845 SCR_SET (SCR_ATN),
3846 0,
3847 }/*-------------------------< MSG_WEIRD1 >--------------------*/,{
3848 SCR_CLR (SCR_ACK),
3849 0,
3850 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
3851 PADDR (dispatch),
3852 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3853 NADDR (scratch),
3854 SCR_JUMP,
3855 PADDRH (msg_weird1),
3856 }/*-------------------------< WDTR_RESP >----------------*/,{
3857 /*
3858 ** let the target fetch our answer.
3859 */
3860 SCR_SET (SCR_ATN),
3861 0,
3862 SCR_CLR (SCR_ACK),
3863 0,
3864 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
3865 PADDRH (nego_bad_phase),
3866
3867 }/*-------------------------< SEND_WDTR >----------------*/,{
3868 /*
3869 ** Send the M_X_WIDE_REQ
3870 */
3871 SCR_MOVE_ABS (4) ^ SCR_MSG_OUT,
3872 NADDR (msgout),
3873 SCR_JUMP,
3874 PADDRH (msg_out_done),
3875
3876 }/*-------------------------< SDTR_RESP >-------------*/,{
3877 /*
3878 ** let the target fetch our answer.
3879 */
3880 SCR_SET (SCR_ATN),
3881 0,
3882 SCR_CLR (SCR_ACK),
3883 0,
3884 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
3885 PADDRH (nego_bad_phase),
3886
3887 }/*-------------------------< SEND_SDTR >-------------*/,{
3888 /*
3889 ** Send the M_X_SYNC_REQ
3890 */
3891 SCR_MOVE_ABS (5) ^ SCR_MSG_OUT,
3892 NADDR (msgout),
3893 SCR_JUMP,
3894 PADDRH (msg_out_done),
3895
3896 }/*-------------------------< PPR_RESP >-------------*/,{
3897 /*
3898 ** let the target fetch our answer.
3899 */
3900 SCR_SET (SCR_ATN),
3901 0,
3902 SCR_CLR (SCR_ACK),
3903 0,
3904 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
3905 PADDRH (nego_bad_phase),
3906
3907 }/*-------------------------< SEND_PPR >-------------*/,{
3908 /*
3909 ** Send the M_X_PPR_REQ
3910 */
3911 SCR_MOVE_ABS (8) ^ SCR_MSG_OUT,
3912 NADDR (msgout),
3913 SCR_JUMP,
3914 PADDRH (msg_out_done),
3915
3916 }/*-------------------------< NEGO_BAD_PHASE >------------*/,{
3917 SCR_INT,
3918 SIR_NEGO_PROTO,
3919 SCR_JUMP,
3920 PADDR (dispatch),
3921
3922 }/*-------------------------< MSG_OUT >-------------------*/,{
3923 /*
3924 ** The target requests a message.
3925 */
3926 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
3927 NADDR (msgout),
3928 /*
3929 ** ... wait for the next phase
3930 ** if it's a message out, send it again, ...
3931 */
3932 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
3933 PADDRH (msg_out),
3934 }/*-------------------------< MSG_OUT_DONE >--------------*/,{
3935 /*
3936 ** ... else clear the message ...
3937 */
3938 SCR_INT,
3939 SIR_MSG_OUT_DONE,
3940 /*
3941 ** ... and process the next phase
3942 */
3943 SCR_JUMP,
3944 PADDR (dispatch),
3945
3946 }/*-------------------------< DATA_OVRUN >-----------------------*/,{
3947 /*
3948 * Use scratcha to count the extra bytes.
3949 */
3950 SCR_LOAD_ABS (scratcha, 4),
3951 PADDRH (zero),
3952 }/*-------------------------< DATA_OVRUN1 >----------------------*/,{
3953 /*
3954 * The target may want to transfer too much data.
3955 *
3956 * If phase is DATA OUT write 1 byte and count it.
3957 */
3958 SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)),
3959 16,
3960 SCR_CHMOV_ABS (1) ^ SCR_DATA_OUT,
3961 NADDR (scratch),
3962 SCR_JUMP,
3963 PADDRH (data_ovrun2),
3964 /*
3965 * If WSR is set, clear this condition, and
3966 * count this byte.
3967 */
3968 SCR_FROM_REG (scntl2),
3969 0,
3970 SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),
3971 16,
3972 SCR_REG_REG (scntl2, SCR_OR, WSR),
3973 0,
3974 SCR_JUMP,
3975 PADDRH (data_ovrun2),
3976 /*
3977 * Finally check against DATA IN phase.
3978 * Signal data overrun to the C code
3979 * and jump to dispatcher if not so.
3980 * Read 1 byte otherwise and count it.
3981 */
3982 SCR_JUMPR ^ IFTRUE (WHEN (SCR_DATA_IN)),
3983 16,
3984 SCR_INT,
3985 SIR_DATA_OVERRUN,
3986 SCR_JUMP,
3987 PADDR (dispatch),
3988 SCR_CHMOV_ABS (1) ^ SCR_DATA_IN,
3989 NADDR (scratch),
3990 }/*-------------------------< DATA_OVRUN2 >----------------------*/,{
3991 /*
3992 * Count this byte.
3993 * This will allow to return a negative
3994 * residual to user.
3995 */
3996 SCR_REG_REG (scratcha, SCR_ADD, 0x01),
3997 0,
3998 SCR_REG_REG (scratcha1, SCR_ADDC, 0),
3999 0,
4000 SCR_REG_REG (scratcha2, SCR_ADDC, 0),
4001 0,
4002 /*
4003 * .. and repeat as required.
4004 */
4005 SCR_JUMP,
4006 PADDRH (data_ovrun1),
4007
4008 }/*-------------------------< ABORT_RESEL >----------------*/,{
4009 SCR_SET (SCR_ATN),
4010 0,
4011 SCR_CLR (SCR_ACK),
4012 0,
4013 /*
4014 ** send the abort/abortag/reset message
4015 ** we expect an immediate disconnect
4016 */
4017 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
4018 0,
4019 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
4020 NADDR (msgout),
4021 SCR_CLR (SCR_ACK|SCR_ATN),
4022 0,
4023 SCR_WAIT_DISC,
4024 0,
4025 SCR_INT,
4026 SIR_RESEL_ABORTED,
4027 SCR_JUMP,
4028 PADDR (start),
4029 }/*-------------------------< RESEND_IDENT >-------------------*/,{
4030 /*
4031 ** The target stays in MSG OUT phase after having acked
4032 ** Identify [+ Tag [+ Extended message ]]. Targets shall
4033 ** behave this way on parity error.
4034 ** We must send it again all the messages.
4035 */
4036 SCR_SET (SCR_ATN), /* Shall be asserted 2 deskew delays before the */
4037 0, /* 1rst ACK = 90 ns. Hope the NCR is'nt too fast */
4038 SCR_JUMP,
4039 PADDR (send_ident),
4040 }/*-------------------------< IDENT_BREAK >-------------------*/,{
4041 SCR_CLR (SCR_ATN),
4042 0,
4043 SCR_JUMP,
4044 PADDR (select2),
4045 }/*-------------------------< IDENT_BREAK_ATN >----------------*/,{
4046 SCR_SET (SCR_ATN),
4047 0,
4048 SCR_JUMP,
4049 PADDR (select2),
4050 }/*-------------------------< SDATA_IN >-------------------*/,{
4051 SCR_CHMOV_TBL ^ SCR_DATA_IN,
4052 offsetof (struct dsb, sense),
4053 SCR_CALL,
4054 PADDR (datai_done),
4055 SCR_JUMP,
4056 PADDRH (data_ovrun),
4057 }/*-------------------------< DATA_IO >--------------------*/,{
4058 /*
4059 ** We jump here if the data direction was unknown at the
4060 ** time we had to queue the command to the scripts processor.
4061 ** Pointers had been set as follow in this situation:
4062 ** savep --> DATA_IO
4063 ** lastp --> start pointer when DATA_IN
4064 ** goalp --> goal pointer when DATA_IN
4065 ** wlastp --> start pointer when DATA_OUT
4066 ** wgoalp --> goal pointer when DATA_OUT
4067 ** This script sets savep/lastp/goalp according to the
4068 ** direction chosen by the target.
4069 */
4070 SCR_JUMP ^ IFTRUE (WHEN (SCR_DATA_OUT)),
4071 PADDRH(data_io_out),
4072 }/*-------------------------< DATA_IO_COM >-----------------*/,{
4073 /*
4074 ** Direction is DATA IN.
4075 ** Warning: we jump here, even when phase is DATA OUT.
4076 */
4077 SCR_LOAD_REL (scratcha, 4),
4078 offsetof (struct ccb, phys.header.lastp),
4079 SCR_STORE_REL (scratcha, 4),
4080 offsetof (struct ccb, phys.header.savep),
4081
4082 /*
4083 ** Jump to the SCRIPTS according to actual direction.
4084 */
4085 SCR_LOAD_REL (temp, 4),
4086 offsetof (struct ccb, phys.header.savep),
4087 SCR_RETURN,
4088 0,
4089 }/*-------------------------< DATA_IO_OUT >-----------------*/,{
4090 /*
4091 ** Direction is DATA OUT.
4092 */
4093 SCR_REG_REG (HF_REG, SCR_AND, (~HF_DATA_IN)),
4094 0,
4095 SCR_LOAD_REL (scratcha, 4),
4096 offsetof (struct ccb, phys.header.wlastp),
4097 SCR_STORE_REL (scratcha, 4),
4098 offsetof (struct ccb, phys.header.lastp),
4099 SCR_LOAD_REL (scratcha, 4),
4100 offsetof (struct ccb, phys.header.wgoalp),
4101 SCR_STORE_REL (scratcha, 4),
4102 offsetof (struct ccb, phys.header.goalp),
4103 SCR_JUMP,
4104 PADDRH(data_io_com),
4105
4106 }/*-------------------------< RESEL_BAD_LUN >---------------*/,{
4107 /*
4108 ** Message is an IDENTIFY, but lun is unknown.
4109 ** Signal problem to C code for logging the event.
4110 ** Send a M_ABORT to clear all pending tasks.
4111 */
4112 SCR_INT,
4113 SIR_RESEL_BAD_LUN,
4114 SCR_JUMP,
4115 PADDRH (abort_resel),
4116 }/*-------------------------< BAD_I_T_L >------------------*/,{
4117 /*
4118 ** We donnot have a task for that I_T_L.
4119 ** Signal problem to C code for logging the event.
4120 ** Send a M_ABORT message.
4121 */
4122 SCR_INT,
4123 SIR_RESEL_BAD_I_T_L,
4124 SCR_JUMP,
4125 PADDRH (abort_resel),
4126 }/*-------------------------< BAD_I_T_L_Q >----------------*/,{
4127 /*
4128 ** We donnot have a task that matches the tag.
4129 ** Signal problem to C code for logging the event.
4130 ** Send a M_ABORTTAG message.
4131 */
4132 SCR_INT,
4133 SIR_RESEL_BAD_I_T_L_Q,
4134 SCR_JUMP,
4135 PADDRH (abort_resel),
4136 }/*-------------------------< BAD_STATUS >-----------------*/,{
4137 /*
4138 ** Anything different from INTERMEDIATE
4139 ** CONDITION MET should be a bad SCSI status,
4140 ** given that GOOD status has already been tested.
4141 ** Call the C code.
4142 */
4143 SCR_LOAD_ABS (scratcha, 4),
4144 PADDRH (startpos),
4145 SCR_INT ^ IFFALSE (DATA (S_COND_MET)),
4146 SIR_BAD_STATUS,
4147 SCR_RETURN,
4148 0,
4149
4150 }/*-------------------------< TWEAK_PMJ >------------------*/,{
4151 /*
4152 ** Disable PM handling from SCRIPTS for the data phase
4153 ** and so force PM to be handled from C code if HF_PM_TO_C
4154 ** flag is set.
4155 */
4156 SCR_FROM_REG(HF_REG),
4157 0,
4158 SCR_JUMPR ^ IFTRUE (MASK (HF_PM_TO_C, HF_PM_TO_C)),
4159 16,
4160 SCR_REG_REG (ccntl0, SCR_OR, ENPMJ),
4161 0,
4162 SCR_RETURN,
4163 0,
4164 SCR_REG_REG (ccntl0, SCR_AND, (~ENPMJ)),
4165 0,
4166 SCR_RETURN,
4167 0,
4168
4169 }/*-------------------------< PM_HANDLE >------------------*/,{
4170 /*
4171 ** Phase mismatch handling.
4172 **
4173 ** Since we have to deal with 2 SCSI data pointers
4174 ** (current and saved), we need at least 2 contexts.
4175 ** Each context (pm0 and pm1) has a saved area, a
4176 ** SAVE mini-script and a DATA phase mini-script.
4177 */
4178 /*
4179 ** Get the PM handling flags.
4180 */
4181 SCR_FROM_REG (HF_REG),
4182 0,
4183 /*
4184 ** If no flags (1rst PM for example), avoid
4185 ** all the below heavy flags testing.
4186 ** This makes the normal case a bit faster.
4187 */
4188 SCR_JUMP ^ IFTRUE (MASK (0, (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED))),
4189 PADDRH (pm_handle1),
4190 /*
4191 ** If we received a SAVE DP, switch to the
4192 ** other PM context since the savep may point
4193 ** to the current PM context.
4194 */
4195 SCR_JUMPR ^ IFFALSE (MASK (HF_DP_SAVED, HF_DP_SAVED)),
4196 8,
4197 SCR_REG_REG (sfbr, SCR_XOR, HF_ACT_PM),
4198 0,
4199 /*
4200 ** If we have been interrupt in a PM DATA mini-script,
4201 ** we take the return address from the corresponding
4202 ** saved area.
4203 ** This ensure the return address always points to the
4204 ** main DATA script for this transfer.
4205 */
4206 SCR_JUMP ^ IFTRUE (MASK (0, (HF_IN_PM0 | HF_IN_PM1))),
4207 PADDRH (pm_handle1),
4208 SCR_JUMPR ^ IFFALSE (MASK (HF_IN_PM0, HF_IN_PM0)),
4209 16,
4210 SCR_LOAD_REL (ia, 4),
4211 offsetof(struct ccb, phys.pm0.ret),
4212 SCR_JUMP,
4213 PADDRH (pm_save),
4214 SCR_LOAD_REL (ia, 4),
4215 offsetof(struct ccb, phys.pm1.ret),
4216 SCR_JUMP,
4217 PADDRH (pm_save),
4218 }/*-------------------------< PM_HANDLE1 >-----------------*/,{
4219 /*
4220 ** Normal case.
4221 ** Update the return address so that it
4222 ** will point after the interrupted MOVE.
4223 */
4224 SCR_REG_REG (ia, SCR_ADD, 8),
4225 0,
4226 SCR_REG_REG (ia1, SCR_ADDC, 0),
4227 0,
4228 }/*-------------------------< PM_SAVE >--------------------*/,{
4229 /*
4230 ** Clear all the flags that told us if we were
4231 ** interrupted in a PM DATA mini-script and/or
4232 ** we received a SAVE DP.
4233 */
4234 SCR_SFBR_REG (HF_REG, SCR_AND, (~(HF_IN_PM0|HF_IN_PM1|HF_DP_SAVED))),
4235 0,
4236 /*
4237 ** Choose the current PM context.
4238 */
4239 SCR_JUMP ^ IFTRUE (MASK (HF_ACT_PM, HF_ACT_PM)),
4240 PADDRH (pm1_save),
4241 }/*-------------------------< PM0_SAVE >-------------------*/,{
4242 SCR_STORE_REL (ia, 4),
4243 offsetof(struct ccb, phys.pm0.ret),
4244 /*
4245 ** If WSR bit is set, either UA and RBC may
4246 ** have to be changed whatever the device wants
4247 ** to ignore this residue ot not.
4248 */
4249 SCR_FROM_REG (scntl2),
4250 0,
4251 SCR_CALL ^ IFTRUE (MASK (WSR, WSR)),
4252 PADDRH (pm_wsr_handle),
4253 /*
4254 ** Save the remaining byte count, the updated
4255 ** address and the return address.
4256 */
4257 SCR_STORE_REL (rbc, 4),
4258 offsetof(struct ccb, phys.pm0.sg.size),
4259 SCR_STORE_REL (ua, 4),
4260 offsetof(struct ccb, phys.pm0.sg.addr),
4261 /*
4262 ** Set the current pointer at the PM0 DATA mini-script.
4263 */
4264 SCR_LOAD_ABS (temp, 4),
4265 PADDRH (pm0_data_addr),
4266 SCR_JUMP,
4267 PADDR (dispatch),
4268 }/*-------------------------< PM1_SAVE >-------------------*/,{
4269 SCR_STORE_REL (ia, 4),
4270 offsetof(struct ccb, phys.pm1.ret),
4271 /*
4272 ** If WSR bit is set, either UA and RBC may
4273 ** have been changed whatever the device wants
4274 ** to ignore this residue or not.
4275 */
4276 SCR_FROM_REG (scntl2),
4277 0,
4278 SCR_CALL ^ IFTRUE (MASK (WSR, WSR)),
4279 PADDRH (pm_wsr_handle),
4280 /*
4281 ** Save the remaining byte count, the updated
4282 ** address and the return address.
4283 */
4284 SCR_STORE_REL (rbc, 4),
4285 offsetof(struct ccb, phys.pm1.sg.size),
4286 SCR_STORE_REL (ua, 4),
4287 offsetof(struct ccb, phys.pm1.sg.addr),
4288 /*
4289 ** Set the current pointer at the PM1 DATA mini-script.
4290 */
4291 SCR_LOAD_ABS (temp, 4),
4292 PADDRH (pm1_data_addr),
4293 SCR_JUMP,
4294 PADDR (dispatch),
4295 }/*--------------------------< PM_WSR_HANDLE >-----------------------*/,{
4296 /*
4297 * Phase mismatch handling from SCRIPT with WSR set.
4298 * Such a condition can occur if the chip wants to
4299 * execute a CHMOV(size > 1) when the WSR bit is
4300 * set and the target changes PHASE.
4301 */
4302 #ifdef SYM_DEBUG_PM_WITH_WSR
4303 /*
4304 * Some debugging may still be needed.:)
4305 */
4306 SCR_INT,
4307 SIR_PM_WITH_WSR,
4308 #endif
4309 /*
4310 * We must move the residual byte to memory.
4311 *
4312 * UA contains bit 0..31 of the address to
4313 * move the residual byte.
4314 * Move it to the table indirect.
4315 */
4316 SCR_STORE_REL (ua, 4),
4317 offsetof (struct ccb, phys.wresid.addr),
4318 /*
4319 * Increment UA (move address to next position).
4320 */
4321 SCR_REG_REG (ua, SCR_ADD, 1),
4322 0,
4323 SCR_REG_REG (ua1, SCR_ADDC, 0),
4324 0,
4325 SCR_REG_REG (ua2, SCR_ADDC, 0),
4326 0,
4327 SCR_REG_REG (ua3, SCR_ADDC, 0),
4328 0,
4329 /*
4330 * Compute SCRATCHA as:
4331 * - size to transfer = 1 byte.
4332 * - bit 24..31 = high address bit [32...39].
4333 */
4334 SCR_LOAD_ABS (scratcha, 4),
4335 PADDRH (zero),
4336 SCR_REG_REG (scratcha, SCR_OR, 1),
4337 0,
4338 SCR_FROM_REG (rbc3),
4339 0,
4340 SCR_TO_REG (scratcha3),
4341 0,
4342 /*
4343 * Move this value to the table indirect.
4344 */
4345 SCR_STORE_REL (scratcha, 4),
4346 offsetof (struct ccb, phys.wresid.size),
4347 /*
4348 * Wait for a valid phase.
4349 * While testing with bogus QUANTUM drives, the C1010
4350 * sometimes raised a spurious phase mismatch with
4351 * WSR and the CHMOV(1) triggered another PM.
4352 * Waiting explicitely for the PHASE seemed to avoid
4353 * the nested phase mismatch. Btw, this didn't happen
4354 * using my IBM drives.
4355 */
4356 SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_IN)),
4357 0,
4358 /*
4359 * Perform the move of the residual byte.
4360 */
4361 SCR_CHMOV_TBL ^ SCR_DATA_IN,
4362 offsetof (struct ccb, phys.wresid),
4363 /*
4364 * We can now handle the phase mismatch with UA fixed.
4365 * RBC[0..23]=0 is a special case that does not require
4366 * a PM context. The C code also checks against this.
4367 */
4368 SCR_FROM_REG (rbc),
4369 0,
4370 SCR_RETURN ^ IFFALSE (DATA (0)),
4371 0,
4372 SCR_FROM_REG (rbc1),
4373 0,
4374 SCR_RETURN ^ IFFALSE (DATA (0)),
4375 0,
4376 SCR_FROM_REG (rbc2),
4377 0,
4378 SCR_RETURN ^ IFFALSE (DATA (0)),
4379 0,
4380 /*
4381 * RBC[0..23]=0.
4382 * Not only we donnot need a PM context, but this would
4383 * lead to a bogus CHMOV(0). This condition means that
4384 * the residual was the last byte to move from this CHMOV.
4385 * So, we just have to move the current data script pointer
4386 * (i.e. TEMP) to the SCRIPTS address following the
4387 * interrupted CHMOV and jump to dispatcher.
4388 */
4389 SCR_STORE_ABS (ia, 4),
4390 PADDRH (scratch),
4391 SCR_LOAD_ABS (temp, 4),
4392 PADDRH (scratch),
4393 SCR_JUMP,
4394 PADDR (dispatch),
4395 }/*--------------------------< WSR_MA_HELPER >-----------------------*/,{
4396 /*
4397 * Helper for the C code when WSR bit is set.
4398 * Perform the move of the residual byte.
4399 */
4400 SCR_CHMOV_TBL ^ SCR_DATA_IN,
4401 offsetof (struct ccb, phys.wresid),
4402 SCR_JUMP,
4403 PADDR (dispatch),
4404 }/*-------------------------< ZERO >------------------------*/,{
4405 SCR_DATA_ZERO,
4406 }/*-------------------------< SCRATCH >---------------------*/,{
4407 SCR_DATA_ZERO,
4408 }/*-------------------------< SCRATCH1 >--------------------*/,{
4409 SCR_DATA_ZERO,
4410 }/*-------------------------< PM0_DATA_ADDR >---------------*/,{
4411 SCR_DATA_ZERO,
4412 }/*-------------------------< PM1_DATA_ADDR >---------------*/,{
4413 SCR_DATA_ZERO,
4414 }/*-------------------------< SAVED_DSA >-------------------*/,{
4415 SCR_DATA_ZERO,
4416 }/*-------------------------< SAVED_DRS >-------------------*/,{
4417 SCR_DATA_ZERO,
4418 }/*-------------------------< DONE_POS >--------------------*/,{
4419 SCR_DATA_ZERO,
4420 }/*-------------------------< STARTPOS >--------------------*/,{
4421 SCR_DATA_ZERO,
4422 }/*-------------------------< TARGTBL >---------------------*/,{
4423 SCR_DATA_ZERO,
4424
4425
4426 /*
4427 ** We may use MEMORY MOVE instructions to load the on chip-RAM,
4428 ** if it happens that mapping PCI memory is not possible.
4429 ** But writing the RAM from the CPU is the preferred method,
4430 ** since PCI 2.2 seems to disallow PCI self-mastering.
4431 */
4432
4433 #ifdef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
4434
4435 }/*-------------------------< START_RAM >-------------------*/,{
4436 /*
4437 ** Load the script into on-chip RAM,
4438 ** and jump to start point.
4439 */
4440 SCR_COPY (sizeof (struct script)),
4441 }/*-------------------------< SCRIPT0_BA >--------------------*/,{
4442 0,
4443 PADDR (start),
4444 SCR_JUMP,
4445 PADDR (init),
4446
4447 }/*-------------------------< START_RAM64 >--------------------*/,{
4448 /*
4449 ** Load the RAM and start for 64 bit PCI (895A,896).
4450 ** Both scripts (script and scripth) are loaded into
4451 ** the RAM which is 8K (4K for 825A/875/895).
4452 ** We also need to load some 32-63 bit segments
4453 ** address of the SCRIPTS processor.
4454 ** LOAD/STORE ABSOLUTE always refers to on-chip RAM
4455 ** in our implementation. The main memory is
4456 ** accessed using LOAD/STORE DSA RELATIVE.
4457 */
4458 SCR_LOAD_REL (mmws, 4),
4459 offsetof (struct ncb, scr_ram_seg),
4460 SCR_COPY (sizeof(struct script)),
4461 }/*-------------------------< SCRIPT0_BA64 >--------------------*/,{
4462 0,
4463 PADDR (start),
4464 SCR_COPY (sizeof(struct scripth)),
4465 }/*-------------------------< SCRIPTH0_BA64 >--------------------*/,{
4466 0,
4467 PADDRH (start64),
4468 SCR_LOAD_REL (mmrs, 4),
4469 offsetof (struct ncb, scr_ram_seg),
4470 SCR_JUMP64,
4471 PADDRH (start64),
4472 }/*-------------------------< RAM_SEG64 >--------------------*/,{
4473 0,
4474
4475 #endif /* SCSI_NCR_PCI_MEM_NOT_SUPPORTED */
4476
4477 }/*-------------------------< SNOOPTEST >-------------------*/,{
4478 /*
4479 ** Read the variable.
4480 */
4481 SCR_LOAD_REL (scratcha, 4),
4482 offsetof(struct ncb, ncr_cache),
4483 SCR_STORE_REL (temp, 4),
4484 offsetof(struct ncb, ncr_cache),
4485 SCR_LOAD_REL (temp, 4),
4486 offsetof(struct ncb, ncr_cache),
4487 }/*-------------------------< SNOOPEND >-------------------*/,{
4488 /*
4489 ** And stop.
4490 */
4491 SCR_INT,
4492 99,
4493 }/*--------------------------------------------------------*/
4494 };
4495
4496 /*==========================================================
4497 **
4498 **
4499 ** Fill in #define dependent parts of the script
4500 **
4501 **
4502 **==========================================================
4503 */
4504
4505 void __init ncr_script_fill (struct script * scr, struct scripth * scrh)
4506 {
4507 int i;
4508 ncrcmd *p;
4509
4510 p = scr->data_in;
4511 for (i=0; i<MAX_SCATTER; i++) {
4512 *p++ =SCR_CHMOV_TBL ^ SCR_DATA_IN;
4513 *p++ =offsetof (struct dsb, data[i]);
4514 };
4515
4516 assert ((u_long)p == (u_long)&scr->data_in + sizeof (scr->data_in));
4517
4518 p = scr->data_out;
4519
4520 for (i=0; i<MAX_SCATTER; i++) {
4521 *p++ =SCR_CHMOV_TBL ^ SCR_DATA_OUT;
4522 *p++ =offsetof (struct dsb, data[i]);
4523 };
4524
4525 assert ((u_long)p == (u_long)&scr->data_out + sizeof (scr->data_out));
4526 }
4527
4528 /*==========================================================
4529 **
4530 **
4531 ** Copy and rebind a script.
4532 **
4533 **
4534 **==========================================================
4535 */
4536
4537 static void __init
4538 ncr_script_copy_and_bind (ncb_p np,ncrcmd *src,ncrcmd *dst,int len)
4539 {
4540 ncrcmd opcode, new, old, tmp1, tmp2;
4541 ncrcmd *start, *end;
4542 int relocs;
4543 int opchanged = 0;
4544
4545 start = src;
4546 end = src + len/4;
4547
4548 while (src < end) {
4549
4550 opcode = *src++;
4551 *dst++ = cpu_to_scr(opcode);
4552
4553 /*
4554 ** If we forget to change the length
4555 ** in struct script, a field will be
4556 ** padded with 0. This is an illegal
4557 ** command.
4558 */
4559
4560 if (opcode == 0) {
4561 printk (KERN_INFO "%s: ERROR0 IN SCRIPT at %d.\n",
4562 ncr_name(np), (int) (src-start-1));
4563 MDELAY (10000);
4564 continue;
4565 };
4566
4567 /*
4568 ** We use the bogus value 0xf00ff00f ;-)
4569 ** to reserve data area in SCRIPTS.
4570 */
4571 if (opcode == SCR_DATA_ZERO) {
4572 dst[-1] = 0;
4573 continue;
4574 }
4575
4576 if (DEBUG_FLAGS & DEBUG_SCRIPT)
4577 printk (KERN_INFO "%p: <%x>\n",
4578 (src-1), (unsigned)opcode);
4579
4580 /*
4581 ** We don't have to decode ALL commands
4582 */
4583 switch (opcode >> 28) {
4584
4585 case 0xf:
4586 /*
4587 ** LOAD / STORE DSA relative, don't relocate.
4588 */
4589 relocs = 0;
4590 break;
4591 case 0xe:
4592 /*
4593 ** LOAD / STORE absolute.
4594 */
4595 relocs = 1;
4596 break;
4597 case 0xc:
4598 /*
4599 ** COPY has TWO arguments.
4600 */
4601 relocs = 2;
4602 tmp1 = src[0];
4603 tmp2 = src[1];
4604 #ifdef RELOC_KVAR
4605 if ((tmp1 & RELOC_MASK) == RELOC_KVAR)
4606 tmp1 = 0;
4607 if ((tmp2 & RELOC_MASK) == RELOC_KVAR)
4608 tmp2 = 0;
4609 #endif
4610 if ((tmp1 ^ tmp2) & 3) {
4611 printk (KERN_ERR"%s: ERROR1 IN SCRIPT at %d.\n",
4612 ncr_name(np), (int) (src-start-1));
4613 MDELAY (1000);
4614 }
4615 /*
4616 ** If PREFETCH feature not enabled, remove
4617 ** the NO FLUSH bit if present.
4618 */
4619 if ((opcode & SCR_NO_FLUSH) &&
4620 !(np->features & FE_PFEN)) {
4621 dst[-1] = cpu_to_scr(opcode & ~SCR_NO_FLUSH);
4622 ++opchanged;
4623 }
4624 break;
4625
4626 case 0x0:
4627 /*
4628 ** MOVE/CHMOV (absolute address)
4629 */
4630 if (!(np->features & FE_WIDE))
4631 dst[-1] = cpu_to_scr(opcode | OPC_MOVE);
4632 relocs = 1;
4633 break;
4634
4635 case 0x1:
4636 /*
4637 ** MOVE/CHMOV (table indirect)
4638 */
4639 if (!(np->features & FE_WIDE))
4640 dst[-1] = cpu_to_scr(opcode | OPC_MOVE);
4641 relocs = 0;
4642 break;
4643
4644 case 0x8:
4645 /*
4646 ** JUMP / CALL
4647 ** dont't relocate if relative :-)
4648 */
4649 if (opcode & 0x00800000)
4650 relocs = 0;
4651 else if ((opcode & 0xf8400000) == 0x80400000)/*JUMP64*/
4652 relocs = 2;
4653 else
4654 relocs = 1;
4655 break;
4656
4657 case 0x4:
4658 case 0x5:
4659 case 0x6:
4660 case 0x7:
4661 relocs = 1;
4662 break;
4663
4664 default:
4665 relocs = 0;
4666 break;
4667 };
4668
4669 if (!relocs) {
4670 *dst++ = cpu_to_scr(*src++);
4671 continue;
4672 }
4673 while (relocs--) {
4674 old = *src++;
4675
4676 switch (old & RELOC_MASK) {
4677 case RELOC_REGISTER:
4678 new = (old & ~RELOC_MASK) + np->base_ba;
4679 break;
4680 case RELOC_LABEL:
4681 new = (old & ~RELOC_MASK) + np->p_script;
4682 break;
4683 case RELOC_LABELH:
4684 new = (old & ~RELOC_MASK) + np->p_scripth;
4685 break;
4686 case RELOC_SOFTC:
4687 new = (old & ~RELOC_MASK) + np->p_ncb;
4688 break;
4689 #ifdef RELOC_KVAR
4690 case RELOC_KVAR:
4691 new=0;
4692 if (((old & ~RELOC_MASK) < SCRIPT_KVAR_FIRST) ||
4693 ((old & ~RELOC_MASK) > SCRIPT_KVAR_LAST))
4694 panic("ncr KVAR out of range");
4695 new = vtobus(script_kvars[old & ~RELOC_MASK]);
4696 #endif
4697 break;
4698 case 0:
4699 /* Don't relocate a 0 address. */
4700 if (old == 0) {
4701 new = old;
4702 break;
4703 }
4704 /* fall through */
4705 default:
4706 new = 0; /* For 'cc' not to complain */
4707 panic("ncr_script_copy_and_bind: "
4708 "weird relocation %x\n", old);
4709 break;
4710 }
4711
4712 *dst++ = cpu_to_scr(new);
4713 }
4714 };
4715 }
4716
4717 /*==========================================================
4718 **
4719 **
4720 ** Auto configuration: attach and init a host adapter.
4721 **
4722 **
4723 **==========================================================
4724 */
4725
4726 /*
4727 ** Linux host data structure.
4728 */
4729
4730 struct host_data {
4731 struct ncb *ncb;
4732 };
4733
4734 /*
4735 ** Print something which allows to retrieve the controler type, unit,
4736 ** target, lun concerned by a kernel message.
4737 */
4738
4739 static void PRINT_TARGET(ncb_p np, int target)
4740 {
4741 printk(KERN_INFO "%s-<%d,*>: ", ncr_name(np), target);
4742 }
4743
4744 static void PRINT_LUN(ncb_p np, int target, int lun)
4745 {
4746 printk(KERN_INFO "%s-<%d,%d>: ", ncr_name(np), target, lun);
4747 }
4748
4749 static void PRINT_ADDR(Scsi_Cmnd *cmd)
4750 {
4751 struct host_data *host_data = (struct host_data *) cmd->host->hostdata;
4752 PRINT_LUN(host_data->ncb, cmd->target, cmd->lun);
4753 }
4754
4755 /*==========================================================
4756 **
4757 ** NCR chip clock divisor table.
4758 ** Divisors are multiplied by 10,000,000 in order to make
4759 ** calculations more simple.
4760 **
4761 **==========================================================
4762 */
4763
4764 #define _5M 5000000
4765 static u_long div_10M[] =
4766 {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
4767
4768
4769 /*===============================================================
4770 **
4771 ** Prepare io register values used by ncr_init() according
4772 ** to selected and supported features.
4773 **
4774 ** NCR/SYMBIOS chips allow burst lengths of 2, 4, 8, 16, 32, 64,
4775 ** 128 transfers. All chips support at least 16 transfers bursts.
4776 ** The 825A, 875 and 895 chips support bursts of up to 128
4777 ** transfers and the 895A and 896 support bursts of up to 64
4778 ** transfers. All other chips support up to 16 transfers bursts.
4779 **
4780 ** For PCI 32 bit data transfers each transfer is a DWORD (4 bytes).
4781 ** It is a QUADWORD (8 bytes) for PCI 64 bit data transfers.
4782 ** Only the 896 is able to perform 64 bit data transfers.
4783 **
4784 ** We use log base 2 (burst length) as internal code, with
4785 ** value 0 meaning "burst disabled".
4786 **
4787 **===============================================================
4788 */
4789
4790 /*
4791 * Burst length from burst code.
4792 */
4793 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
4794
4795 /*
4796 * Burst code from io register bits.
4797 */
4798 #define burst_code(dmode, ctest4, ctest5) \
4799 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
4800
4801 /*
4802 * Set initial io register bits from burst code.
4803 */
4804 static inline void ncr_init_burst(ncb_p np, u_char bc)
4805 {
4806 np->rv_ctest4 &= ~0x80;
4807 np->rv_dmode &= ~(0x3 << 6);
4808 np->rv_ctest5 &= ~0x4;
4809
4810 if (!bc) {
4811 np->rv_ctest4 |= 0x80;
4812 }
4813 else {
4814 --bc;
4815 np->rv_dmode |= ((bc & 0x3) << 6);
4816 np->rv_ctest5 |= (bc & 0x4);
4817 }
4818 }
4819
4820 #ifdef SCSI_NCR_NVRAM_SUPPORT
4821
4822 /*
4823 ** Get target set-up from Symbios format NVRAM.
4824 */
4825
4826 static void __init
4827 ncr_Symbios_setup_target(ncb_p np, int target, Symbios_nvram *nvram)
4828 {
4829 tcb_p tp = &np->target[target];
4830 Symbios_target *tn = &nvram->target[target];
4831
4832 tp->usrsync = tn->sync_period ? (tn->sync_period + 3) / 4 : 255;
4833 tp->usrwide = tn->bus_width == 0x10 ? 1 : 0;
4834 tp->usrtags =
4835 (tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? MAX_TAGS : 0;
4836
4837 if (!(tn->flags & SYMBIOS_DISCONNECT_ENABLE))
4838 tp->usrflag |= UF_NODISC;
4839 if (!(tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME))
4840 tp->usrflag |= UF_NOSCAN;
4841 }
4842
4843 /*
4844 ** Get target set-up from Tekram format NVRAM.
4845 */
4846
4847 static void __init
4848 ncr_Tekram_setup_target(ncb_p np, int target, Tekram_nvram *nvram)
4849 {
4850 tcb_p tp = &np->target[target];
4851 struct Tekram_target *tn = &nvram->target[target];
4852 int i;
4853
4854 if (tn->flags & TEKRAM_SYNC_NEGO) {
4855 i = tn->sync_index & 0xf;
4856 tp->usrsync = Tekram_sync[i];
4857 }
4858
4859 tp->usrwide = (tn->flags & TEKRAM_WIDE_NEGO) ? 1 : 0;
4860
4861 if (tn->flags & TEKRAM_TAGGED_COMMANDS) {
4862 tp->usrtags = 2 << nvram->max_tags_index;
4863 }
4864
4865 if (!(tn->flags & TEKRAM_DISCONNECT_ENABLE))
4866 tp->usrflag = UF_NODISC;
4867
4868 /* If any device does not support parity, we will not use this option */
4869 if (!(tn->flags & TEKRAM_PARITY_CHECK))
4870 np->rv_scntl0 &= ~0x0a; /* SCSI parity checking disabled */
4871 }
4872 #endif /* SCSI_NCR_NVRAM_SUPPORT */
4873
4874 /*
4875 ** Save initial settings of some IO registers.
4876 ** Assumed to have been set by BIOS.
4877 */
4878 static void __init ncr_save_initial_setting(ncb_p np)
4879 {
4880 np->sv_scntl0 = INB(nc_scntl0) & 0x0a;
4881 np->sv_dmode = INB(nc_dmode) & 0xce;
4882 np->sv_dcntl = INB(nc_dcntl) & 0xa8;
4883 np->sv_ctest3 = INB(nc_ctest3) & 0x01;
4884 np->sv_ctest4 = INB(nc_ctest4) & 0x80;
4885 np->sv_gpcntl = INB(nc_gpcntl);
4886 np->sv_stest2 = INB(nc_stest2) & 0x20;
4887 np->sv_stest4 = INB(nc_stest4);
4888 np->sv_stest1 = INB(nc_stest1);
4889
4890 np->sv_scntl3 = INB(nc_scntl3) & 0x07;
4891
4892 if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
4893 (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66) ){
4894 /*
4895 ** C1010 always uses large fifo, bit 5 rsvd
4896 ** scntl4 used ONLY with C1010
4897 */
4898 np->sv_ctest5 = INB(nc_ctest5) & 0x04 ;
4899 np->sv_scntl4 = INB(nc_scntl4);
4900 }
4901 else {
4902 np->sv_ctest5 = INB(nc_ctest5) & 0x24 ;
4903 np->sv_scntl4 = 0;
4904 }
4905 }
4906
4907 /*
4908 ** Prepare io register values used by ncr_init()
4909 ** according to selected and supported features.
4910 */
4911 static int __init ncr_prepare_setting(ncb_p np, ncr_nvram *nvram)
4912 {
4913 u_char burst_max;
4914 u_long period;
4915 int i;
4916
4917 /*
4918 ** Wide ?
4919 */
4920
4921 np->maxwide = (np->features & FE_WIDE)? 1 : 0;
4922
4923 /*
4924 * Guess the frequency of the chip's clock.
4925 */
4926 if (np->features & (FE_ULTRA3 | FE_ULTRA2))
4927 np->clock_khz = 160000;
4928 else if (np->features & FE_ULTRA)
4929 np->clock_khz = 80000;
4930 else
4931 np->clock_khz = 40000;
4932
4933 /*
4934 * Get the clock multiplier factor.
4935 */
4936 if (np->features & FE_QUAD)
4937 np->multiplier = 4;
4938 else if (np->features & FE_DBLR)
4939 np->multiplier = 2;
4940 else
4941 np->multiplier = 1;
4942
4943 /*
4944 * Measure SCSI clock frequency for chips
4945 * it may vary from assumed one.
4946 */
4947 if (np->features & FE_VARCLK)
4948 ncr_getclock(np, np->multiplier);
4949
4950 /*
4951 * Divisor to be used for async (timer pre-scaler).
4952 *
4953 * Note: For C1010 the async divisor is 2(8) if he
4954 * quadrupler is disabled (enabled).
4955 */
4956
4957 if ( (np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
4958 (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)) {
4959
4960 np->rv_scntl3 = 0;
4961 }
4962 else
4963 {
4964 i = np->clock_divn - 1;
4965 while (--i >= 0) {
4966 if (10ul * SCSI_NCR_MIN_ASYNC * np->clock_khz
4967 > div_10M[i]) {
4968 ++i;
4969 break;
4970 }
4971 }
4972 np->rv_scntl3 = i+1;
4973 }
4974
4975
4976 /*
4977 * Save the ultra3 register for the C1010/C1010_66
4978 */
4979
4980 np->rv_scntl4 = np->sv_scntl4;
4981
4982 /*
4983 * Minimum synchronous period factor supported by the chip.
4984 * Btw, 'period' is in tenths of nanoseconds.
4985 */
4986
4987 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
4988 if (period <= 250) np->minsync = 10;
4989 else if (period <= 303) np->minsync = 11;
4990 else if (period <= 500) np->minsync = 12;
4991 else np->minsync = (period + 40 - 1) / 40;
4992
4993 /*
4994 * Fix up. If sync. factor is 10 (160000Khz clock) and chip
4995 * supports ultra3, then min. sync. period 12.5ns and the factor is 9
4996 * Also keep track of the maximum offset in ST mode which may differ
4997 * from the maximum offset in DT mode. For now hardcoded to 31.
4998 */
4999
5000 if (np->features & FE_ULTRA3) {
5001 if (np->minsync == 10)
5002 np->minsync = 9;
5003 np->maxoffs_st = 31;
5004 }
5005 else
5006 np->maxoffs_st = np->maxoffs;
5007
5008 /*
5009 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
5010 *
5011 * Transfer period minimums: SCSI-1 200 (50); Fast 100 (25)
5012 * Ultra 50 (12); Ultra2 (6); Ultra3 (3)
5013 */
5014
5015 if (np->minsync < 25 && !(np->features & (FE_ULTRA|FE_ULTRA2|FE_ULTRA3)))
5016 np->minsync = 25;
5017 else if (np->minsync < 12 && (np->features & FE_ULTRA))
5018 np->minsync = 12;
5019 else if (np->minsync < 10 && (np->features & FE_ULTRA2))
5020 np->minsync = 10;
5021 else if (np->minsync < 9 && (np->features & FE_ULTRA3))
5022 np->minsync = 9;
5023
5024 /*
5025 * Maximum synchronous period factor supported by the chip.
5026 */
5027
5028 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
5029 np->maxsync = period > 2540 ? 254 : period / 10;
5030
5031 /*
5032 ** 64 bit (53C895A or 53C896) ?
5033 */
5034 if (np->features & FE_DAC)
5035 #ifdef SCSI_NCR_USE_64BIT_DAC
5036 np->rv_ccntl1 |= (XTIMOD | EXTIBMV);
5037 #else
5038 np->rv_ccntl1 |= (DDAC);
5039 #endif
5040
5041 /*
5042 ** Phase mismatch handled by SCRIPTS (53C895A, 53C896 or C1010) ?
5043 */
5044 if (np->features & FE_NOPM)
5045 np->rv_ccntl0 |= (ENPMJ);
5046
5047 /*
5048 ** Prepare initial value of other IO registers
5049 */
5050 #if defined SCSI_NCR_TRUST_BIOS_SETTING
5051 np->rv_scntl0 = np->sv_scntl0;
5052 np->rv_dmode = np->sv_dmode;
5053 np->rv_dcntl = np->sv_dcntl;
5054 np->rv_ctest3 = np->sv_ctest3;
5055 np->rv_ctest4 = np->sv_ctest4;
5056 np->rv_ctest5 = np->sv_ctest5;
5057 burst_max = burst_code(np->sv_dmode, np->sv_ctest4, np->sv_ctest5);
5058 #else
5059
5060 /*
5061 ** Select burst length (dwords)
5062 */
5063 burst_max = driver_setup.burst_max;
5064 if (burst_max == 255)
5065 burst_max = burst_code(np->sv_dmode, np->sv_ctest4, np->sv_ctest5);
5066 if (burst_max > 7)
5067 burst_max = 7;
5068 if (burst_max > np->maxburst)
5069 burst_max = np->maxburst;
5070
5071 /*
5072 ** DEL 352 - 53C810 Rev x11 - Part Number 609-0392140 - ITEM 2.
5073 ** This chip and the 860 Rev 1 may wrongly use PCI cache line
5074 ** based transactions on LOAD/STORE instructions. So we have
5075 ** to prevent these chips from using such PCI transactions in
5076 ** this driver. The generic sym53c8xx driver that does not use
5077 ** LOAD/STORE instructions does not need this work-around.
5078 */
5079 if ((np->device_id == PCI_DEVICE_ID_NCR_53C810 &&
5080 np->revision_id >= 0x10 && np->revision_id <= 0x11) ||
5081 (np->device_id == PCI_DEVICE_ID_NCR_53C860 &&
5082 np->revision_id <= 0x1))
5083 np->features &= ~(FE_WRIE|FE_ERL|FE_ERMP);
5084
5085 /*
5086 ** DEL ? - 53C1010 Rev 1 - Part Number 609-0393638
5087 ** 64-bit Slave Cycles must be disabled.
5088 */
5089 if ( ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) && (np->revision_id < 0x02) )
5090 || (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66 ) )
5091 np->rv_ccntl1 |= 0x10;
5092
5093 /*
5094 ** Select all supported special features.
5095 ** If we are using on-board RAM for scripts, prefetch (PFEN)
5096 ** does not help, but burst op fetch (BOF) does.
5097 ** Disabling PFEN makes sure BOF will be used.
5098 */
5099 if (np->features & FE_ERL)
5100 np->rv_dmode |= ERL; /* Enable Read Line */
5101 if (np->features & FE_BOF)
5102 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
5103 if (np->features & FE_ERMP)
5104 np->rv_dmode |= ERMP; /* Enable Read Multiple */
5105 #if 1
5106 if ((np->features & FE_PFEN) && !np->base2_ba)
5107 #else
5108 if (np->features & FE_PFEN)
5109 #endif
5110 np->rv_dcntl |= PFEN; /* Prefetch Enable */
5111 if (np->features & FE_CLSE)
5112 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
5113 if (np->features & FE_WRIE)
5114 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
5115
5116
5117 if ( (np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
5118 (np->device_id != PCI_DEVICE_ID_LSI_53C1010_66) &&
5119 (np->features & FE_DFS))
5120 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
5121 /* C1010/C1010_66 always large fifo */
5122
5123 /*
5124 ** Select some other
5125 */
5126 if (driver_setup.master_parity)
5127 np->rv_ctest4 |= MPEE; /* Master parity checking */
5128 if (driver_setup.scsi_parity)
5129 np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */
5130
5131 #ifdef SCSI_NCR_NVRAM_SUPPORT
5132 /*
5133 ** Get parity checking, host ID and verbose mode from NVRAM
5134 **/
5135 if (nvram) {
5136 switch(nvram->type) {
5137 case SCSI_NCR_TEKRAM_NVRAM:
5138 np->myaddr = nvram->data.Tekram.host_id & 0x0f;
5139 break;
5140 case SCSI_NCR_SYMBIOS_NVRAM:
5141 if (!(nvram->data.Symbios.flags & SYMBIOS_PARITY_ENABLE))
5142 np->rv_scntl0 &= ~0x0a;
5143 np->myaddr = nvram->data.Symbios.host_id & 0x0f;
5144 if (nvram->data.Symbios.flags & SYMBIOS_VERBOSE_MSGS)
5145 np->verbose += 1;
5146 break;
5147 }
5148 }
5149 #endif
5150 /*
5151 ** Get SCSI addr of host adapter (set by bios?).
5152 */
5153 if (np->myaddr == 255) {
5154 np->myaddr = INB(nc_scid) & 0x07;
5155 if (!np->myaddr)
5156 np->myaddr = SCSI_NCR_MYADDR;
5157 }
5158
5159 #endif /* SCSI_NCR_TRUST_BIOS_SETTING */
5160
5161 /*
5162 * Prepare initial io register bits for burst length
5163 */
5164 ncr_init_burst(np, burst_max);
5165
5166 /*
5167 ** Set SCSI BUS mode.
5168 **
5169 ** - ULTRA2 chips (895/895A/896)
5170 ** and ULTRA 3 chips (1010) report the current
5171 ** BUS mode through the STEST4 IO register.
5172 ** - For previous generation chips (825/825A/875),
5173 ** user has to tell us how to check against HVD,
5174 ** since a 100% safe algorithm is not possible.
5175 */
5176 np->scsi_mode = SMODE_SE;
5177 if (np->features & (FE_ULTRA2 | FE_ULTRA3))
5178 np->scsi_mode = (np->sv_stest4 & SMODE);
5179 else if (np->features & FE_DIFF) {
5180 switch(driver_setup.diff_support) {
5181 case 4: /* Trust previous settings if present, then GPIO3 */
5182 if (np->sv_scntl3) {
5183 if (np->sv_stest2 & 0x20)
5184 np->scsi_mode = SMODE_HVD;
5185 break;
5186 }
5187 case 3: /* SYMBIOS controllers report HVD through GPIO3 */
5188 if (nvram && nvram->type != SCSI_NCR_SYMBIOS_NVRAM)
5189 break;
5190 if (INB(nc_gpreg) & 0x08)
5191 break;
5192 case 2: /* Set HVD unconditionally */
5193 np->scsi_mode = SMODE_HVD;
5194 case 1: /* Trust previous settings for HVD */
5195 if (np->sv_stest2 & 0x20)
5196 np->scsi_mode = SMODE_HVD;
5197 break;
5198 default:/* Don't care about HVD */
5199 break;
5200 }
5201 }
5202 if (np->scsi_mode == SMODE_HVD)
5203 np->rv_stest2 |= 0x20;
5204
5205 /*
5206 ** Set LED support from SCRIPTS.
5207 ** Ignore this feature for boards known to use a
5208 ** specific GPIO wiring and for the 895A or 896
5209 ** that drive the LED directly.
5210 ** Also probe initial setting of GPIO0 as output.
5211 */
5212 if ((driver_setup.led_pin ||
5213 (nvram && nvram->type == SCSI_NCR_SYMBIOS_NVRAM)) &&
5214 !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
5215 np->features |= FE_LED0;
5216
5217 /*
5218 ** Set irq mode.
5219 */
5220 switch(driver_setup.irqm & 3) {
5221 case 2:
5222 np->rv_dcntl |= IRQM;
5223 break;
5224 case 1:
5225 np->rv_dcntl |= (np->sv_dcntl & IRQM);
5226 break;
5227 default:
5228 break;
5229 }
5230
5231 /*
5232 ** Configure targets according to driver setup.
5233 ** If NVRAM present get targets setup from NVRAM.
5234 ** Allow to override sync, wide and NOSCAN from
5235 ** boot command line.
5236 */
5237 for (i = 0 ; i < MAX_TARGET ; i++) {
5238 tcb_p tp = &np->target[i];
5239
5240 tp->usrsync = 255;
5241 #ifdef SCSI_NCR_NVRAM_SUPPORT
5242 if (nvram) {
5243 switch(nvram->type) {
5244 case SCSI_NCR_TEKRAM_NVRAM:
5245 ncr_Tekram_setup_target(np, i, &nvram->data.Tekram);
5246 break;
5247 case SCSI_NCR_SYMBIOS_NVRAM:
5248 ncr_Symbios_setup_target(np, i, &nvram->data.Symbios);
5249 break;
5250 }
5251 if (driver_setup.use_nvram & 0x2)
5252 tp->usrsync = driver_setup.default_sync;
5253 if (driver_setup.use_nvram & 0x4)
5254 tp->usrwide = driver_setup.max_wide;
5255 if (driver_setup.use_nvram & 0x8)
5256 tp->usrflag &= ~UF_NOSCAN;
5257 }
5258 else {
5259 #else
5260 if (1) {
5261 #endif
5262 tp->usrsync = driver_setup.default_sync;
5263 tp->usrwide = driver_setup.max_wide;
5264 tp->usrtags = MAX_TAGS;
5265 if (!driver_setup.disconnection)
5266 np->target[i].usrflag = UF_NODISC;
5267 }
5268 }
5269
5270 /*
5271 ** Announce all that stuff to user.
5272 */
5273
5274 i = nvram ? nvram->type : 0;
5275 printk(KERN_INFO "%s: %sID %d, Fast-%d%s%s\n", ncr_name(np),
5276 i == SCSI_NCR_SYMBIOS_NVRAM ? "Symbios format NVRAM, " :
5277 (i == SCSI_NCR_TEKRAM_NVRAM ? "Tekram format NVRAM, " : ""),
5278 np->myaddr,
5279 np->minsync < 10 ? 80 :
5280 (np->minsync < 12 ? 40 : (np->minsync < 25 ? 20 : 10) ),
5281 (np->rv_scntl0 & 0xa) ? ", Parity Checking" : ", NO Parity",
5282 (np->rv_stest2 & 0x20) ? ", Differential" : "");
5283
5284 if (bootverbose > 1) {
5285 printk (KERN_INFO "%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
5286 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
5287 ncr_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl,
5288 np->sv_ctest3, np->sv_ctest4, np->sv_ctest5);
5289
5290 printk (KERN_INFO "%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
5291 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
5292 ncr_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
5293 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
5294 }
5295
5296 if (bootverbose && np->base2_ba)
5297 printk (KERN_INFO "%s: on-chip RAM at 0x%lx\n",
5298 ncr_name(np), np->base2_ba);
5299
5300 return 0;
5301 }
5302
5303
5304 #ifdef SCSI_NCR_DEBUG_NVRAM
5305
5306 void __init ncr_display_Symbios_nvram(ncb_p np, Symbios_nvram *nvram)
5307 {
5308 int i;
5309
5310 /* display Symbios nvram host data */
5311 printk(KERN_DEBUG "%s: HOST ID=%d%s%s%s%s%s\n",
5312 ncr_name(np), nvram->host_id & 0x0f,
5313 (nvram->flags & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
5314 (nvram->flags & SYMBIOS_PARITY_ENABLE) ? " PARITY" :"",
5315 (nvram->flags & SYMBIOS_VERBOSE_MSGS) ? " VERBOSE" :"",
5316 (nvram->flags & SYMBIOS_CHS_MAPPING) ? " CHS_ALT" :"",
5317 (nvram->flags1 & SYMBIOS_SCAN_HI_LO) ? " HI_LO" :"");
5318
5319 /* display Symbios nvram drive data */
5320 for (i = 0 ; i < 15 ; i++) {
5321 struct Symbios_target *tn = &nvram->target[i];
5322 printk(KERN_DEBUG "%s-%d:%s%s%s%s WIDTH=%d SYNC=%d TMO=%d\n",
5323 ncr_name(np), i,
5324 (tn->flags & SYMBIOS_DISCONNECT_ENABLE) ? " DISC" : "",
5325 (tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME) ? " SCAN_BOOT" : "",
5326 (tn->flags & SYMBIOS_SCAN_LUNS) ? " SCAN_LUNS" : "",
5327 (tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? " TCQ" : "",
5328 tn->bus_width,
5329 tn->sync_period / 4,
5330 tn->timeout);
5331 }
5332 }
5333
5334 static u_char Tekram_boot_delay[7] __initdata = {3, 5, 10, 20, 30, 60, 120};
5335
5336 void __init ncr_display_Tekram_nvram(ncb_p np, Tekram_nvram *nvram)
5337 {
5338 int i, tags, boot_delay;
5339 char *rem;
5340
5341 /* display Tekram nvram host data */
5342 tags = 2 << nvram->max_tags_index;
5343 boot_delay = 0;
5344 if (nvram->boot_delay_index < 6)
5345 boot_delay = Tekram_boot_delay[nvram->boot_delay_index];
5346 switch((nvram->flags & TEKRAM_REMOVABLE_FLAGS) >> 6) {
5347 default:
5348 case 0: rem = ""; break;
5349 case 1: rem = " REMOVABLE=boot device"; break;
5350 case 2: rem = " REMOVABLE=all"; break;
5351 }
5352
5353 printk(KERN_DEBUG
5354 "%s: HOST ID=%d%s%s%s%s%s%s%s%s%s BOOT DELAY=%d tags=%d\n",
5355 ncr_name(np), nvram->host_id & 0x0f,
5356 (nvram->flags1 & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
5357 (nvram->flags & TEKRAM_MORE_THAN_2_DRIVES) ? " >2DRIVES" :"",
5358 (nvram->flags & TEKRAM_DRIVES_SUP_1GB) ? " >1GB" :"",
5359 (nvram->flags & TEKRAM_RESET_ON_POWER_ON) ? " RESET" :"",
5360 (nvram->flags & TEKRAM_ACTIVE_NEGATION) ? " ACT_NEG" :"",
5361 (nvram->flags & TEKRAM_IMMEDIATE_SEEK) ? " IMM_SEEK" :"",
5362 (nvram->flags & TEKRAM_SCAN_LUNS) ? " SCAN_LUNS" :"",
5363 (nvram->flags1 & TEKRAM_F2_F6_ENABLED) ? " F2_F6" :"",
5364 rem, boot_delay, tags);
5365
5366 /* display Tekram nvram drive data */
5367 for (i = 0; i <= 15; i++) {
5368 int sync, j;
5369 struct Tekram_target *tn = &nvram->target[i];
5370 j = tn->sync_index & 0xf;
5371 sync = Tekram_sync[j];
5372 printk(KERN_DEBUG "%s-%d:%s%s%s%s%s%s PERIOD=%d\n",
5373 ncr_name(np), i,
5374 (tn->flags & TEKRAM_PARITY_CHECK) ? " PARITY" : "",
5375 (tn->flags & TEKRAM_SYNC_NEGO) ? " SYNC" : "",
5376 (tn->flags & TEKRAM_DISCONNECT_ENABLE) ? " DISC" : "",
5377 (tn->flags & TEKRAM_START_CMD) ? " START" : "",
5378 (tn->flags & TEKRAM_TAGGED_COMMANDS) ? " TCQ" : "",
5379 (tn->flags & TEKRAM_WIDE_NEGO) ? " WIDE" : "",
5380 sync);
5381 }
5382 }
5383 #endif /* SCSI_NCR_DEBUG_NVRAM */
5384
5385 /*
5386 ** Host attach and initialisations.
5387 **
5388 ** Allocate host data and ncb structure.
5389 ** Request IO region and remap MMIO region.
5390 ** Do chip initialization.
5391 ** If all is OK, install interrupt handling and
5392 ** start the timer daemon.
5393 */
5394
5395 static int __init
5396 ncr_attach (Scsi_Host_Template *tpnt, int unit, ncr_device *device)
5397 {
5398 struct host_data *host_data;
5399 ncb_p np = 0;
5400 struct Scsi_Host *instance = 0;
5401 u_long flags = 0;
5402 ncr_nvram *nvram = device->nvram;
5403 int i;
5404
5405 printk(KERN_INFO NAME53C "%s-%d: rev 0x%x on pci bus %d device %d function %d "
5406 #ifdef __sparc__
5407 "irq %s\n",
5408 #else
5409 "irq %d\n",
5410 #endif
5411 device->chip.name, unit, device->chip.revision_id,
5412 device->slot.bus, (device->slot.device_fn & 0xf8) >> 3,
5413 device->slot.device_fn & 7,
5414 #ifdef __sparc__
5415 __irq_itoa(device->slot.irq));
5416 #else
5417 device->slot.irq);
5418 #endif
5419
5420 /*
5421 ** Allocate host_data structure
5422 */
5423 if (!(instance = scsi_register(tpnt, sizeof(*host_data))))
5424 goto attach_error;
5425 host_data = (struct host_data *) instance->hostdata;
5426
5427 /*
5428 ** Allocate the host control block.
5429 */
5430 np = __m_calloc_dma(device->pdev, sizeof(struct ncb), "NCB");
5431 if (!np)
5432 goto attach_error;
5433 NCR_INIT_LOCK_NCB(np);
5434 np->pdev = device->pdev;
5435 np->p_ncb = vtobus(np);
5436 host_data->ncb = np;
5437
5438 /*
5439 ** Store input informations in the host data structure.
5440 */
5441 strncpy(np->chip_name, device->chip.name, sizeof(np->chip_name) - 1);
5442 np->unit = unit;
5443 np->verbose = driver_setup.verbose;
5444 sprintf(np->inst_name, NAME53C "%s-%d", np->chip_name, np->unit);
5445 np->device_id = device->chip.device_id;
5446 np->revision_id = device->chip.revision_id;
5447 np->bus = device->slot.bus;
5448 np->device_fn = device->slot.device_fn;
5449 np->features = device->chip.features;
5450 np->clock_divn = device->chip.nr_divisor;
5451 np->maxoffs = device->chip.offset_max;
5452 np->maxburst = device->chip.burst_max;
5453 np->myaddr = device->host_id;
5454
5455 /*
5456 ** Allocate the start queue.
5457 */
5458 np->squeue = (ncrcmd *)
5459 m_calloc_dma(sizeof(ncrcmd)*(MAX_START*2), "SQUEUE");
5460 if (!np->squeue)
5461 goto attach_error;
5462 np->p_squeue = vtobus(np->squeue);
5463
5464 /*
5465 ** Allocate the done queue.
5466 */
5467 np->dqueue = (ncrcmd *)
5468 m_calloc_dma(sizeof(ncrcmd)*(MAX_START*2), "DQUEUE");
5469 if (!np->dqueue)
5470 goto attach_error;
5471
5472 /*
5473 ** Allocate the target bus address array.
5474 */
5475 np->targtbl = (u_int32 *) m_calloc_dma(256, "TARGTBL");
5476 if (!np->targtbl)
5477 goto attach_error;
5478
5479 /*
5480 ** Allocate SCRIPTS areas
5481 */
5482 np->script0 = (struct script *)
5483 m_calloc_dma(sizeof(struct script), "SCRIPT");
5484 if (!np->script0)
5485 goto attach_error;
5486 np->scripth0 = (struct scripth *)
5487 m_calloc_dma(sizeof(struct scripth), "SCRIPTH");
5488 if (!np->scripth0)
5489 goto attach_error;
5490
5491 /*
5492 ** Initialyze the CCB free queue and,
5493 ** allocate some CCB. We need at least ONE.
5494 */
5495 xpt_que_init(&np->free_ccbq);
5496 xpt_que_init(&np->b0_ccbq);
5497 if (!ncr_alloc_ccb(np))
5498 goto attach_error;
5499
5500 /*
5501 ** Initialize timer structure
5502 **
5503 */
5504 init_timer(&np->timer);
5505 np->timer.data = (unsigned long) np;
5506 np->timer.function = sym53c8xx_timeout;
5507
5508 /*
5509 ** Try to map the controller chip to
5510 ** virtual and physical memory.
5511 */
5512
5513 np->base_ba = device->slot.base;
5514 np->base_ws = (np->features & FE_IO256)? 256 : 128;
5515 np->base2_ba = (np->features & FE_RAM)? device->slot.base_2 : 0;
5516
5517 #ifndef SCSI_NCR_IOMAPPED
5518 np->base_va = remap_pci_mem(device->slot.base_c, np->base_ws);
5519 if (!np->base_va) {
5520 printk(KERN_ERR "%s: can't map PCI MMIO region\n",ncr_name(np));
5521 goto attach_error;
5522 }
5523 else if (bootverbose > 1)
5524 printk(KERN_INFO "%s: using memory mapped IO\n", ncr_name(np));
5525
5526 /*
5527 ** Make the controller's registers available.
5528 ** Now the INB INW INL OUTB OUTW OUTL macros
5529 ** can be used safely.
5530 */
5531
5532 np->reg = (struct ncr_reg *) np->base_va;
5533
5534 #endif /* !defined SCSI_NCR_IOMAPPED */
5535
5536 /*
5537 ** If on-chip RAM is used, make sure SCRIPTS isn't too large.
5538 */
5539 if (np->base2_ba && sizeof(struct script) > 4096) {
5540 printk(KERN_ERR "%s: script too large.\n", ncr_name(np));
5541 goto attach_error;
5542 }
5543
5544 /*
5545 ** Try to map the controller chip into iospace.
5546 */
5547
5548 if (device->slot.io_port) {
5549 request_region(device->slot.io_port, np->base_ws, NAME53C8XX);
5550 np->base_io = device->slot.io_port;
5551 }
5552
5553 #ifdef SCSI_NCR_NVRAM_SUPPORT
5554 if (nvram) {
5555 switch(nvram->type) {
5556 case SCSI_NCR_SYMBIOS_NVRAM:
5557 #ifdef SCSI_NCR_DEBUG_NVRAM
5558 ncr_display_Symbios_nvram(np, &nvram->data.Symbios);
5559 #endif
5560 break;
5561 case SCSI_NCR_TEKRAM_NVRAM:
5562 #ifdef SCSI_NCR_DEBUG_NVRAM
5563 ncr_display_Tekram_nvram(np, &nvram->data.Tekram);
5564 #endif
5565 break;
5566 default:
5567 nvram = 0;
5568 #ifdef SCSI_NCR_DEBUG_NVRAM
5569 printk(KERN_DEBUG "%s: NVRAM: None or invalid data.\n", ncr_name(np));
5570 #endif
5571 }
5572 }
5573 #endif
5574
5575 /*
5576 ** Save setting of some IO registers, so we will
5577 ** be able to probe specific implementations.
5578 */
5579 ncr_save_initial_setting (np);
5580
5581 /*
5582 ** Reset the chip now, since it has been reported
5583 ** that SCSI clock calibration may not work properly
5584 ** if the chip is currently active.
5585 */
5586 ncr_chip_reset (np);
5587
5588 /*
5589 ** Do chip dependent initialization.
5590 */
5591 (void) ncr_prepare_setting(np, nvram);
5592
5593 /*
5594 ** Check the PCI clock frequency if needed.
5595 **
5596 ** Must be done after ncr_prepare_setting since it destroys
5597 ** STEST1 that is used to probe for the clock multiplier.
5598 **
5599 ** The range is currently [22688 - 45375 Khz], given
5600 ** the values used by ncr_getclock().
5601 ** This calibration of the frequecy measurement
5602 ** algorithm against the PCI clock frequency is only
5603 ** performed if the driver has had to measure the SCSI
5604 ** clock due to other heuristics not having been enough
5605 ** to deduce the SCSI clock frequency.
5606 **
5607 ** When the chip has been initialized correctly by the
5608 ** SCSI BIOS, the driver deduces the presence of the
5609 ** clock multiplier and the value of the SCSI clock from
5610 ** initial values of IO registers, and therefore no
5611 ** clock measurement is performed.
5612 ** Normally the driver should never have to measure any
5613 ** clock, unless the controller may use a 80 MHz clock
5614 ** or has a clock multiplier and any of the following
5615 ** condition is met:
5616 **
5617 ** - No SCSI BIOS is present.
5618 ** - SCSI BIOS did'nt enable the multiplier for some reason.
5619 ** - User has disabled the controller from the SCSI BIOS.
5620 ** - User booted the O/S from another O/S that did'nt enable
5621 ** the multiplier for some reason.
5622 **
5623 ** As a result, the driver may only have to measure some
5624 ** frequency in very unusual situations.
5625 **
5626 ** For this reality test against the PCI clock to really
5627 ** protect against flaws in the udelay() calibration or
5628 ** driver problem that affect the clock measurement
5629 ** algorithm, the actual PCI clock frequency must be 33 MHz.
5630 */
5631 i = np->pciclock_max ? ncr_getpciclock(np) : 0;
5632 if (i && (i < np->pciclock_min || i > np->pciclock_max)) {
5633 printk(KERN_ERR "%s: PCI clock (%u KHz) is out of range "
5634 "[%u KHz - %u KHz].\n",
5635 ncr_name(np), i, np->pciclock_min, np->pciclock_max);
5636 goto attach_error;
5637 }
5638
5639 /*
5640 ** Patch script to physical addresses
5641 */
5642 ncr_script_fill (&script0, &scripth0);
5643
5644 np->p_script = vtobus(np->script0);
5645 np->p_scripth = vtobus(np->scripth0);
5646 np->p_scripth0 = np->p_scripth;
5647
5648 if (np->base2_ba) {
5649 np->p_script = np->base2_ba;
5650 if (np->features & FE_RAM8K) {
5651 np->base2_ws = 8192;
5652 np->p_scripth = np->p_script + 4096;
5653 #if BITS_PER_LONG > 32
5654 np->scr_ram_seg = cpu_to_scr(np->base2_ba >> 32);
5655 #endif
5656 }
5657 else
5658 np->base2_ws = 4096;
5659 #ifndef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
5660 np->base2_va =
5661 remap_pci_mem(device->slot.base_2_c, np->base2_ws);
5662 if (!np->base2_va) {
5663 printk(KERN_ERR "%s: can't map PCI MEMORY region\n",
5664 ncr_name(np));
5665 goto attach_error;
5666 }
5667 #endif
5668 }
5669
5670 ncr_script_copy_and_bind (np, (ncrcmd *) &script0, (ncrcmd *) np->script0, sizeof(struct script));
5671 ncr_script_copy_and_bind (np, (ncrcmd *) &scripth0, (ncrcmd *) np->scripth0, sizeof(struct scripth));
5672
5673 /*
5674 ** Patch some variables in SCRIPTS
5675 */
5676 np->scripth0->pm0_data_addr[0] =
5677 cpu_to_scr(NCB_SCRIPT_PHYS(np, pm0_data));
5678 np->scripth0->pm1_data_addr[0] =
5679 cpu_to_scr(NCB_SCRIPT_PHYS(np, pm1_data));
5680
5681 /*
5682 ** Patch if not Ultra 3 - Do not write to scntl4
5683 */
5684 if (np->features & FE_ULTRA3) {
5685 np->script0->resel_scntl4[0] = cpu_to_scr(SCR_LOAD_REL (scntl4, 1));
5686 np->script0->resel_scntl4[1] = cpu_to_scr(offsetof(struct tcb, uval));
5687 }
5688
5689
5690 #ifdef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
5691 np->scripth0->script0_ba[0] = cpu_to_scr(vtobus(np->script0));
5692 np->scripth0->script0_ba64[0] = cpu_to_scr(vtobus(np->script0));
5693 np->scripth0->scripth0_ba64[0] = cpu_to_scr(vtobus(np->scripth0));
5694 np->scripth0->ram_seg64[0] = np->scr_ram_seg;
5695 #endif
5696 /*
5697 ** Prepare the idle and invalid task actions.
5698 */
5699 np->idletask.start = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
5700 np->idletask.restart = cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_i_t_l));
5701 np->p_idletask = NCB_PHYS(np, idletask);
5702
5703 np->notask.start = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
5704 np->notask.restart = cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_i_t_l));
5705 np->p_notask = NCB_PHYS(np, notask);
5706
5707 np->bad_i_t_l.start = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
5708 np->bad_i_t_l.restart = cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_i_t_l));
5709 np->p_bad_i_t_l = NCB_PHYS(np, bad_i_t_l);
5710
5711 np->bad_i_t_l_q.start = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
5712 np->bad_i_t_l_q.restart = cpu_to_scr(NCB_SCRIPTH_PHYS (np,bad_i_t_l_q));
5713 np->p_bad_i_t_l_q = NCB_PHYS(np, bad_i_t_l_q);
5714
5715 /*
5716 ** Allocate and prepare the bad lun table.
5717 */
5718 np->badluntbl = m_calloc_dma(256, "BADLUNTBL");
5719 if (!np->badluntbl)
5720 goto attach_error;
5721
5722 assert (offsetof(struct lcb, resel_task) == 0);
5723 np->resel_badlun = cpu_to_scr(NCB_SCRIPTH_PHYS(np, resel_bad_lun));
5724
5725 for (i = 0 ; i < 64 ; i++)
5726 np->badluntbl[i] = cpu_to_scr(NCB_PHYS(np, resel_badlun));
5727
5728 /*
5729 ** Prepare the target bus address array.
5730 */
5731 np->scripth0->targtbl[0] = cpu_to_scr(vtobus(np->targtbl));
5732 for (i = 0 ; i < MAX_TARGET ; i++) {
5733 np->targtbl[i] = cpu_to_scr(NCB_PHYS(np, target[i]));
5734 np->target[i].b_luntbl = cpu_to_scr(vtobus(np->badluntbl));
5735 np->target[i].b_lun0 = cpu_to_scr(NCB_PHYS(np, resel_badlun));
5736 }
5737
5738 /*
5739 ** Patch the script for LED support.
5740 */
5741
5742 if (np->features & FE_LED0) {
5743 np->script0->idle[0] =
5744 cpu_to_scr(SCR_REG_REG(gpreg, SCR_OR, 0x01));
5745 np->script0->reselected[0] =
5746 cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe));
5747 np->script0->start[0] =
5748 cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe));
5749 }
5750
5751 /*
5752 ** Patch the script to provide an extra clock cycle on
5753 ** data out phase - 53C1010_66MHz part only.
5754 ** (Fixed in rev. 1 of the chip)
5755 */
5756 if (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66 &&
5757 np->revision_id < 1){
5758 np->script0->datao_phase[0] =
5759 cpu_to_scr(SCR_REG_REG(scntl4, SCR_OR, 0x0c));
5760 }
5761
5762 #ifdef SCSI_NCR_IARB_SUPPORT
5763 /*
5764 ** If user does not want to use IMMEDIATE ARBITRATION
5765 ** when we are reselected while attempting to arbitrate,
5766 ** patch the SCRIPTS accordingly with a SCRIPT NO_OP.
5767 */
5768 if (!(driver_setup.iarb & 1))
5769 np->script0->ungetjob[0] = cpu_to_scr(SCR_NO_OP);
5770 /*
5771 ** If user wants IARB to be set when we win arbitration
5772 ** and have other jobs, compute the max number of consecutive
5773 ** settings of IARB hint before we leave devices a chance to
5774 ** arbitrate for reselection.
5775 */
5776 np->iarb_max = (driver_setup.iarb >> 4);
5777 #endif
5778
5779 /*
5780 ** DEL 472 - 53C896 Rev 1 - Part Number 609-0393055 - ITEM 5.
5781 */
5782 if (np->device_id == PCI_DEVICE_ID_NCR_53C896 &&
5783 np->revision_id <= 0x1 && (np->features & FE_NOPM)) {
5784 np->scatter = ncr_scatter_896R1;
5785 np->script0->datai_phase[0] = cpu_to_scr(SCR_JUMP);
5786 np->script0->datai_phase[1] =
5787 cpu_to_scr(NCB_SCRIPTH_PHYS (np, tweak_pmj));
5788 np->script0->datao_phase[0] = cpu_to_scr(SCR_JUMP);
5789 np->script0->datao_phase[1] =
5790 cpu_to_scr(NCB_SCRIPTH_PHYS (np, tweak_pmj));
5791 }
5792 else
5793 #ifdef DEBUG_896R1
5794 np->scatter = ncr_scatter_896R1;
5795 #else
5796 np->scatter = ncr_scatter;
5797 #endif
5798
5799 /*
5800 ** Reset chip.
5801 ** We should use ncr_soft_reset(), but we donnot want to do
5802 ** so, since we may not be safe if ABRT interrupt occurs due
5803 ** to the BIOS or previous O/S having enable this interrupt.
5804 **
5805 ** For C1010 need to set ABRT bit prior to SRST if SCRIPTs
5806 ** are running. Not true in this case.
5807 */
5808 ncr_chip_reset(np);
5809
5810 /*
5811 ** Now check the cache handling of the pci chipset.
5812 */
5813
5814 if (ncr_snooptest (np)) {
5815 printk (KERN_ERR "CACHE INCORRECTLY CONFIGURED.\n");
5816 goto attach_error;
5817 };
5818
5819 /*
5820 ** Install the interrupt handler.
5821 ** If we synchonize the C code with SCRIPTS on interrupt,
5822 ** we donnot want to share the INTR line at all.
5823 */
5824 if (request_irq(device->slot.irq, sym53c8xx_intr,
5825 #ifdef SCSI_NCR_PCIQ_SYNC_ON_INTR
5826 ((driver_setup.irqm & 0x20) ? 0 : SA_INTERRUPT),
5827 #else
5828 ((driver_setup.irqm & 0x10) ? 0 : SA_SHIRQ) |
5829 #if LINUX_VERSION_CODE < LinuxVersionCode(2,2,0)
5830 ((driver_setup.irqm & 0x20) ? 0 : SA_INTERRUPT),
5831 #else
5832 0,
5833 #endif
5834 #endif
5835 NAME53C8XX, np)) {
5836 printk(KERN_ERR "%s: request irq %d failure\n",
5837 ncr_name(np), device->slot.irq);
5838 goto attach_error;
5839 }
5840 np->irq = device->slot.irq;
5841
5842 /*
5843 ** After SCSI devices have been opened, we cannot
5844 ** reset the bus safely, so we do it here.
5845 ** Interrupt handler does the real work.
5846 ** Process the reset exception,
5847 ** if interrupts are not enabled yet.
5848 ** Then enable disconnects.
5849 */
5850 NCR_LOCK_NCB(np, flags);
5851 if (ncr_reset_scsi_bus(np, 0, driver_setup.settle_delay) != 0) {
5852 printk(KERN_ERR "%s: FATAL ERROR: CHECK SCSI BUS - CABLES, TERMINATION, DEVICE POWER etc.!\n", ncr_name(np));
5853
5854 NCR_UNLOCK_NCB(np, flags);
5855 goto attach_error;
5856 }
5857 ncr_exception (np);
5858
5859 /*
5860 ** The middle-level SCSI driver does not
5861 ** wait for devices to settle.
5862 ** Wait synchronously if more than 2 seconds.
5863 */
5864 if (driver_setup.settle_delay > 2) {
5865 printk(KERN_INFO "%s: waiting %d seconds for scsi devices to settle...\n",
5866 ncr_name(np), driver_setup.settle_delay);
5867 MDELAY (1000 * driver_setup.settle_delay);
5868 }
5869
5870 /*
5871 ** start the timeout daemon
5872 */
5873 np->lasttime=0;
5874 ncr_timeout (np);
5875
5876 /*
5877 ** use SIMPLE TAG messages by default
5878 */
5879 #ifdef SCSI_NCR_ALWAYS_SIMPLE_TAG
5880 np->order = M_SIMPLE_TAG;
5881 #endif
5882
5883 /*
5884 ** Done.
5885 */
5886 if (!first_host)
5887 first_host = instance;
5888
5889 /*
5890 ** Fill Linux host instance structure
5891 ** and return success.
5892 */
5893 instance->max_channel = 0;
5894 instance->this_id = np->myaddr;
5895 instance->max_id = np->maxwide ? 16 : 8;
5896 instance->max_lun = MAX_LUN;
5897 #ifndef SCSI_NCR_IOMAPPED
5898 #if LINUX_VERSION_CODE >= LinuxVersionCode(2,3,29)
5899 instance->base = (unsigned long) np->reg;
5900 #else
5901 instance->base = (char *) np->reg;
5902 #endif
5903 #endif
5904 instance->irq = np->irq;
5905 instance->unique_id = np->base_io;
5906 instance->io_port = np->base_io;
5907 instance->n_io_port = np->base_ws;
5908 instance->dma_channel = 0;
5909 instance->cmd_per_lun = MAX_TAGS;
5910 instance->can_queue = (MAX_START-4);
5911 scsi_set_pci_device(instance, device->pdev);
5912
5913 np->check_integrity = 0;
5914
5915 #ifdef SCSI_NCR_INTEGRITY_CHECKING
5916 instance->check_integrity = 0;
5917
5918 #ifdef SCSI_NCR_ENABLE_INTEGRITY_CHECK
5919 if ( !(driver_setup.bus_check & 0x04) ) {
5920 np->check_integrity = 1;
5921 instance->check_integrity = 1;
5922 }
5923 #endif
5924 #endif
5925
5926 instance->select_queue_depths = sym53c8xx_select_queue_depths;
5927
5928 NCR_UNLOCK_NCB(np, flags);
5929
5930 /*
5931 ** Now let the generic SCSI driver
5932 ** look for the SCSI devices on the bus ..
5933 */
5934 return 0;
5935
5936 attach_error:
5937 if (!instance) return -1;
5938 printk(KERN_INFO "%s: giving up ...\n", ncr_name(np));
5939 if (np)
5940 ncr_free_resources(np);
5941 scsi_unregister(instance);
5942
5943 return -1;
5944 }
5945
5946
5947 /*
5948 ** Free controller resources.
5949 */
5950 static void ncr_free_resources(ncb_p np)
5951 {
5952 ccb_p cp;
5953 tcb_p tp;
5954 lcb_p lp;
5955 int target, lun;
5956
5957 if (np->irq)
5958 free_irq(np->irq, np);
5959 if (np->base_io)
5960 release_region(np->base_io, np->base_ws);
5961 #ifndef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
5962 if (np->base_va)
5963 unmap_pci_mem(np->base_va, np->base_ws);
5964 if (np->base2_va)
5965 unmap_pci_mem(np->base2_va, np->base2_ws);
5966 #endif
5967 if (np->scripth0)
5968 m_free_dma(np->scripth0, sizeof(struct scripth), "SCRIPTH");
5969 if (np->script0)
5970 m_free_dma(np->script0, sizeof(struct script), "SCRIPT");
5971 if (np->squeue)
5972 m_free_dma(np->squeue, sizeof(ncrcmd)*(MAX_START*2), "SQUEUE");
5973 if (np->dqueue)
5974 m_free_dma(np->dqueue, sizeof(ncrcmd)*(MAX_START*2),"DQUEUE");
5975
5976 while ((cp = np->ccbc) != NULL) {
5977 np->ccbc = cp->link_ccb;
5978 m_free_dma(cp, sizeof(*cp), "CCB");
5979 }
5980
5981 if (np->badluntbl)
5982 m_free_dma(np->badluntbl, 256,"BADLUNTBL");
5983
5984 for (target = 0; target < MAX_TARGET ; target++) {
5985 tp = &np->target[target];
5986 for (lun = 0 ; lun < MAX_LUN ; lun++) {
5987 lp = ncr_lp(np, tp, lun);
5988 if (!lp)
5989 continue;
5990 if (lp->tasktbl != &lp->tasktbl_0)
5991 m_free_dma(lp->tasktbl, MAX_TASKS*4, "TASKTBL");
5992 if (lp->cb_tags)
5993 m_free(lp->cb_tags, MAX_TAGS, "CB_TAGS");
5994 m_free_dma(lp, sizeof(*lp), "LCB");
5995 }
5996 #if MAX_LUN > 1
5997 if (tp->lmp)
5998 m_free(tp->lmp, MAX_LUN * sizeof(lcb_p), "LMP");
5999 if (tp->luntbl)
6000 m_free_dma(tp->luntbl, 256, "LUNTBL");
6001 #endif
6002 }
6003
6004 if (np->targtbl)
6005 m_free_dma(np->targtbl, 256, "TARGTBL");
6006
6007 m_free_dma(np, sizeof(*np), "NCB");
6008 }
6009
6010
6011 /*==========================================================
6012 **
6013 **
6014 ** Done SCSI commands list management.
6015 **
6016 ** We donnot enter the scsi_done() callback immediately
6017 ** after a command has been seen as completed but we
6018 ** insert it into a list which is flushed outside any kind
6019 ** of driver critical section.
6020 ** This allows to do minimal stuff under interrupt and
6021 ** inside critical sections and to also avoid locking up
6022 ** on recursive calls to driver entry points under SMP.
6023 ** In fact, the only kernel point which is entered by the
6024 ** driver with a driver lock set is get_free_pages(GFP_ATOMIC...)
6025 ** that shall not reenter the driver under any circumstance.
6026 **
6027 **==========================================================
6028 */
6029 static inline void ncr_queue_done_cmd(ncb_p np, Scsi_Cmnd *cmd)
6030 {
6031 unmap_scsi_data(np, cmd);
6032 cmd->host_scribble = (char *) np->done_list;
6033 np->done_list = cmd;
6034 }
6035
6036 static inline void ncr_flush_done_cmds(Scsi_Cmnd *lcmd)
6037 {
6038 Scsi_Cmnd *cmd;
6039
6040 while (lcmd) {
6041 cmd = lcmd;
6042 lcmd = (Scsi_Cmnd *) cmd->host_scribble;
6043 cmd->scsi_done(cmd);
6044 }
6045 }
6046
6047 /*==========================================================
6048 **
6049 **
6050 ** Prepare the next negotiation message for integrity check,
6051 ** if needed.
6052 **
6053 ** Fill in the part of message buffer that contains the
6054 ** negotiation and the nego_status field of the CCB.
6055 ** Returns the size of the message in bytes.
6056 **
6057 ** If tp->ppr_negotiation is 1 and a M_REJECT occurs, then
6058 ** we disable ppr_negotiation. If the first ppr_negotiation is
6059 ** successful, set this flag to 2.
6060 **
6061 **==========================================================
6062 */
6063 #ifdef SCSI_NCR_INTEGRITY_CHECKING
6064 static int ncr_ic_nego(ncb_p np, ccb_p cp, Scsi_Cmnd *cmd, u_char *msgptr)
6065 {
6066 tcb_p tp = &np->target[cp->target];
6067 int msglen = 0;
6068 int nego = 0;
6069 u_char new_width, new_offset, new_period;
6070 u_char no_increase;
6071
6072 if (tp->ppr_negotiation == 1) /* PPR message successful */
6073 tp->ppr_negotiation = 2;
6074
6075 if (tp->inq_done) {
6076
6077 if (!tp->ic_maximums_set) {
6078 tp->ic_maximums_set = 1;
6079
6080 /*
6081 * Check against target, host and user limits
6082 */
6083 if ( (tp->inq_byte7 & INQ7_WIDE16) &&
6084 np->maxwide && tp->usrwide)
6085 tp->ic_max_width = 1;
6086 else
6087 tp->ic_max_width = 0;
6088
6089
6090 if ((tp->inq_byte7 & INQ7_SYNC) && tp->maxoffs)
6091 tp->ic_min_sync = (tp->minsync < np->minsync) ?
6092 np->minsync : tp->minsync;
6093 else
6094 tp->ic_min_sync = 255;
6095
6096 tp->period = 1;
6097 tp->widedone = 1;
6098
6099 /*
6100 * Enable PPR negotiation - only if Ultra3 support
6101 * is accessible.
6102 */
6103
6104 #if 0
6105 if (tp->ic_max_width && (tp->ic_min_sync != 255 ))
6106 tp->ppr_negotiation = 1;
6107 #endif
6108 tp->ppr_negotiation = 0;
6109 if (np->features & FE_ULTRA3) {
6110 if (tp->ic_max_width && (tp->ic_min_sync == 0x09))
6111 tp->ppr_negotiation = 1;
6112 }
6113
6114 if (!tp->ppr_negotiation)
6115 cmd->ic_nego &= ~NS_PPR;
6116 }
6117
6118 if (DEBUG_FLAGS & DEBUG_IC) {
6119 printk("%s: cmd->ic_nego %d, 1st byte 0x%2X\n",
6120 ncr_name(np), cmd->ic_nego, cmd->cmnd[0]);
6121 }
6122
6123 /* Previous command recorded a parity or an initiator
6124 * detected error condition. Force bus to narrow for this
6125 * target. Clear flag. Negotation on request sense.
6126 * Note: kernel forces 2 bus resets :o( but clears itself out.
6127 * Minor bug? in scsi_obsolete.c (ugly)
6128 */
6129 if (np->check_integ_par) {
6130 printk("%s: Parity Error. Target set to narrow.\n",
6131 ncr_name(np));
6132 tp->ic_max_width = 0;
6133 tp->widedone = tp->period = 0;
6134 }
6135
6136 /* Initializing:
6137 * If ic_nego == NS_PPR, we are in the initial test for
6138 * PPR messaging support. If driver flag is clear, then
6139 * either we don't support PPR nego (narrow or async device)
6140 * or this is the second TUR and we have had a M. REJECT
6141 * or unexpected disconnect on the first PPR negotiation.
6142 * Do not negotiate, reset nego flags (in case a reset has
6143 * occurred), clear ic_nego and return.
6144 * General case: Kernel will clear flag on a fallback.
6145 * Do only SDTR or WDTR in the future.
6146 */
6147 if (!tp->ppr_negotiation && (cmd->ic_nego == NS_PPR )) {
6148 tp->ppr_negotiation = 0;
6149 cmd->ic_nego &= ~NS_PPR;
6150 tp->widedone = tp->period = 1;
6151 return msglen;
6152 }
6153 else if (( tp->ppr_negotiation && !(cmd->ic_nego & NS_PPR )) ||
6154 (!tp->ppr_negotiation && (cmd->ic_nego & NS_PPR )) ) {
6155 tp->ppr_negotiation = 0;
6156 cmd->ic_nego &= ~NS_PPR;
6157 }
6158
6159 /*
6160 * Always check the PPR nego. flag bit if ppr_negotiation
6161 * is set. If the ic_nego PPR bit is clear,
6162 * there must have been a fallback. Do only
6163 * WDTR / SDTR in the future.
6164 */
6165 if ((tp->ppr_negotiation) && (!(cmd->ic_nego & NS_PPR)))
6166 tp->ppr_negotiation = 0;
6167
6168 /* In case of a bus reset, ncr_negotiate will reset
6169 * the flags tp->widedone and tp->period to 0, forcing
6170 * a new negotiation. Do WDTR then SDTR. If PPR, do both.
6171 * Do NOT increase the period. It is possible for the Scsi_Cmnd
6172 * flags to be set to increase the period when a bus reset
6173 * occurs - we don't want to change anything.
6174 */
6175
6176 no_increase = 0;
6177
6178 if (tp->ppr_negotiation && (!tp->widedone) && (!tp->period) ) {
6179 cmd->ic_nego = NS_PPR;
6180 tp->widedone = tp->period = 1;
6181 no_increase = 1;
6182 }
6183 else if (!tp->widedone) {
6184 cmd->ic_nego = NS_WIDE;
6185 tp->widedone = 1;
6186 no_increase = 1;
6187 }
6188 else if (!tp->period) {
6189 cmd->ic_nego = NS_SYNC;
6190 tp->period = 1;
6191 no_increase = 1;
6192 }
6193
6194 new_width = cmd->ic_nego_width & tp->ic_max_width;
6195
6196 switch (cmd->ic_nego_sync) {
6197 case 2: /* increase the period */
6198 if (!no_increase) {
6199 if (tp->ic_min_sync <= 0x09)
6200 tp->ic_min_sync = 0x0A;
6201 else if (tp->ic_min_sync <= 0x0A)
6202 tp->ic_min_sync = 0x0C;
6203 else if (tp->ic_min_sync <= 0x0C)
6204 tp->ic_min_sync = 0x19;
6205 else if (tp->ic_min_sync <= 0x19)
6206 tp->ic_min_sync *= 2;
6207 else {
6208 tp->ic_min_sync = 255;
6209 cmd->ic_nego_sync = 0;
6210 tp->maxoffs = 0;
6211 }
6212 }
6213 new_period = tp->maxoffs?tp->ic_min_sync:0;
6214 new_offset = tp->maxoffs;
6215 break;
6216
6217 case 1: /* nego. to maximum */
6218 new_period = tp->maxoffs?tp->ic_min_sync:0;
6219 new_offset = tp->maxoffs;
6220 break;
6221
6222 case 0: /* nego to async */
6223 default:
6224 new_period = 0;
6225 new_offset = 0;
6226 break;
6227 };
6228
6229
6230 nego = NS_NOCHANGE;
6231 if (tp->ppr_negotiation) {
6232 u_char options_byte = 0;
6233
6234 /*
6235 ** Must make sure data is consistent.
6236 ** If period is 9 and sync, must be wide and DT bit set.
6237 ** else period must be larger. If the width is 0,
6238 ** reset bus to wide but increase the period to 0x0A.
6239 ** Note: The strange else clause is due to the integrity check.
6240 ** If fails at 0x09, wide, the I.C. code will redo at the same
6241 ** speed but a narrow bus. The driver must take care of slowing
6242 ** the bus speed down.
6243 **
6244 ** The maximum offset in ST mode is 31, in DT mode 62 (1010/1010_66 only)
6245 */
6246 if ( (new_period==0x09) && new_offset) {
6247 if (new_width)
6248 options_byte = 0x02;
6249 else {
6250 tp->ic_min_sync = 0x0A;
6251 new_period = 0x0A;
6252 cmd->ic_nego_width = 1;
6253 new_width = 1;
6254 }
6255 }
6256 if (!options_byte && new_offset > np->maxoffs_st)
6257 new_offset = np->maxoffs_st;
6258
6259 nego = NS_PPR;
6260
6261 msgptr[msglen++] = M_EXTENDED;
6262 msgptr[msglen++] = 6;
6263 msgptr[msglen++] = M_X_PPR_REQ;
6264 msgptr[msglen++] = new_period;
6265 msgptr[msglen++] = 0;
6266 msgptr[msglen++] = new_offset;
6267 msgptr[msglen++] = new_width;
6268 msgptr[msglen++] = options_byte;
6269
6270 }
6271 else {
6272 switch (cmd->ic_nego & ~NS_PPR) {
6273 case NS_WIDE:
6274 /*
6275 ** WDTR negotiation on if device supports
6276 ** wide or if wide device forced narrow
6277 ** due to a parity error.
6278 */
6279
6280 cmd->ic_nego_width &= tp->ic_max_width;
6281
6282 if (tp->ic_max_width | np->check_integ_par) {
6283 nego = NS_WIDE;
6284 msgptr[msglen++] = M_EXTENDED;
6285 msgptr[msglen++] = 2;
6286 msgptr[msglen++] = M_X_WIDE_REQ;
6287 msgptr[msglen++] = new_width;
6288 }
6289 break;
6290
6291 case NS_SYNC:
6292 /*
6293 ** negotiate synchronous transfers
6294 ** Target must support sync transfers.
6295 ** Min. period = 0x0A, maximum offset of 31=0x1f.
6296 */
6297
6298 if (tp->inq_byte7 & INQ7_SYNC) {
6299
6300 if (new_offset && (new_period < 0x0A)) {
6301 tp->ic_min_sync = 0x0A;
6302 new_period = 0x0A;
6303 }
6304 if (new_offset > np->maxoffs_st)
6305 new_offset = np->maxoffs_st;
6306 nego = NS_SYNC;
6307 msgptr[msglen++] = M_EXTENDED;
6308 msgptr[msglen++] = 3;
6309 msgptr[msglen++] = M_X_SYNC_REQ;
6310 msgptr[msglen++] = new_period;
6311 msgptr[msglen++] = new_offset;
6312 }
6313 else
6314 cmd->ic_nego_sync = 0;
6315 break;
6316
6317 case NS_NOCHANGE:
6318 break;
6319 }
6320 }
6321
6322 };
6323
6324 cp->nego_status = nego;
6325 np->check_integ_par = 0;
6326
6327 if (nego) {
6328 tp->nego_cp = cp;
6329 if (DEBUG_FLAGS & DEBUG_NEGO) {
6330 ncr_print_msg(cp, nego == NS_WIDE ?
6331 "wide/narrow msgout":
6332 (nego == NS_SYNC ? "sync/async msgout" : "ppr msgout"),
6333 msgptr);
6334 };
6335 };
6336
6337 return msglen;
6338 }
6339 #endif /* SCSI_NCR_INTEGRITY_CHECKING */
6340
6341 /*==========================================================
6342 **
6343 **
6344 ** Prepare the next negotiation message if needed.
6345 **
6346 ** Fill in the part of message buffer that contains the
6347 ** negotiation and the nego_status field of the CCB.
6348 ** Returns the size of the message in bytes.
6349 **
6350 **
6351 **==========================================================
6352 */
6353
6354
6355 static int ncr_prepare_nego(ncb_p np, ccb_p cp, u_char *msgptr)
6356 {
6357 tcb_p tp = &np->target[cp->target];
6358 int msglen = 0;
6359 int nego = 0;
6360 u_char width, offset, factor, last_byte;
6361
6362 if (!np->check_integrity) {
6363 /* If integrity checking disabled, enable PPR messaging
6364 * if device supports wide, sync and ultra 3
6365 */
6366 if (tp->ppr_negotiation == 1) /* PPR message successful */
6367 tp->ppr_negotiation = 2;
6368
6369 if ((tp->inq_done) && (!tp->ic_maximums_set)) {
6370 tp->ic_maximums_set = 1;
6371
6372 /*
6373 * Issue PPR only if board is capable
6374 * and set-up for Ultra3 transfers.
6375 */
6376 tp->ppr_negotiation = 0;
6377 if ( (np->features & FE_ULTRA3) &&
6378 (tp->usrwide) && (tp->maxoffs) &&
6379 (tp->minsync == 0x09) )
6380 tp->ppr_negotiation = 1;
6381 }
6382 }
6383
6384 if (tp->inq_done) {
6385 /*
6386 * Get the current width, offset and period
6387 */
6388 ncr_get_xfer_info( np, tp, &factor,
6389 &offset, &width);
6390
6391 /*
6392 ** negotiate wide transfers ?
6393 */
6394
6395 if (!tp->widedone) {
6396 if (tp->inq_byte7 & INQ7_WIDE16) {
6397 if (tp->ppr_negotiation)
6398 nego = NS_PPR;
6399 else
6400 nego = NS_WIDE;
6401
6402 width = tp->usrwide;
6403 #ifdef SCSI_NCR_INTEGRITY_CHECKING
6404 if (tp->ic_done)
6405 width &= tp->ic_max_width;
6406 #endif
6407 } else
6408 tp->widedone=1;
6409
6410 };
6411
6412 /*
6413 ** negotiate synchronous transfers?
6414 */
6415
6416 if ((nego != NS_WIDE) && !tp->period) {
6417 if (tp->inq_byte7 & INQ7_SYNC) {
6418 if (tp->ppr_negotiation)
6419 nego = NS_PPR;
6420 else
6421 nego = NS_SYNC;
6422
6423 /* Check for async flag */
6424 if (tp->maxoffs == 0) {
6425 offset = 0;
6426 factor = 0;
6427 }
6428 else {
6429 offset = tp->maxoffs;
6430 factor = tp->minsync;
6431 #ifdef SCSI_NCR_INTEGRITY_CHECKING
6432 if ((tp->ic_done) &&
6433 (factor < tp->ic_min_sync))
6434 factor = tp->ic_min_sync;
6435 #endif
6436 }
6437
6438 } else {
6439 offset = 0;
6440 factor = 0;
6441 tp->period =0xffff;
6442 PRINT_TARGET(np, cp->target);
6443 printk ("target did not report SYNC.\n");
6444 };
6445 };
6446 };
6447
6448 switch (nego) {
6449 case NS_PPR:
6450 /*
6451 ** Must make sure data is consistent.
6452 ** If period is 9 and sync, must be wide and DT bit set
6453 ** else period must be larger.
6454 ** Maximum offset is 31=0x1f is ST mode, 62 if DT mode
6455 */
6456 last_byte = 0;
6457 if ( (factor==9) && offset) {
6458 if (!width) {
6459 factor = 0x0A;
6460 }
6461 else
6462 last_byte = 0x02;
6463 }
6464 if (!last_byte && offset > np->maxoffs_st)
6465 offset = np->maxoffs_st;
6466
6467 msgptr[msglen++] = M_EXTENDED;
6468 msgptr[msglen++] = 6;
6469 msgptr[msglen++] = M_X_PPR_REQ;
6470 msgptr[msglen++] = factor;
6471 msgptr[msglen++] = 0;
6472 msgptr[msglen++] = offset;
6473 msgptr[msglen++] = width;
6474 msgptr[msglen++] = last_byte;
6475 break;
6476 case NS_SYNC:
6477 /*
6478 ** Never negotiate faster than Ultra 2 (25ns periods)
6479 */
6480 if (offset && (factor < 0x0A)) {
6481 factor = 0x0A;
6482 tp->minsync = 0x0A;
6483 }
6484 if (offset > np->maxoffs_st)
6485 offset = np->maxoffs_st;
6486
6487 msgptr[msglen++] = M_EXTENDED;
6488 msgptr[msglen++] = 3;
6489 msgptr[msglen++] = M_X_SYNC_REQ;
6490 msgptr[msglen++] = factor;
6491 msgptr[msglen++] = offset;
6492 break;
6493 case NS_WIDE:
6494 msgptr[msglen++] = M_EXTENDED;
6495 msgptr[msglen++] = 2;
6496 msgptr[msglen++] = M_X_WIDE_REQ;
6497 msgptr[msglen++] = width;
6498 break;
6499 };
6500
6501 cp->nego_status = nego;
6502
6503 if (nego) {
6504 tp->nego_cp = cp;
6505 if (DEBUG_FLAGS & DEBUG_NEGO) {
6506 ncr_print_msg(cp, nego == NS_WIDE ?
6507 "wide msgout":
6508 (nego == NS_SYNC ? "sync msgout" : "ppr msgout"),
6509 msgptr);
6510 };
6511 };
6512
6513 return msglen;
6514 }
6515
6516 /*==========================================================
6517 **
6518 **
6519 ** Start execution of a SCSI command.
6520 ** This is called from the generic SCSI driver.
6521 **
6522 **
6523 **==========================================================
6524 */
6525 static int ncr_queue_command (ncb_p np, Scsi_Cmnd *cmd)
6526 {
6527 /* Scsi_Device *device = cmd->device; */
6528 tcb_p tp = &np->target[cmd->target];
6529 lcb_p lp = ncr_lp(np, tp, cmd->lun);
6530 ccb_p cp;
6531
6532 u_char idmsg, *msgptr;
6533 u_int msglen;
6534 int direction;
6535 u_int32 lastp, goalp;
6536
6537 /*---------------------------------------------
6538 **
6539 ** Some shortcuts ...
6540 **
6541 **---------------------------------------------
6542 */
6543 if ((cmd->target == np->myaddr ) ||
6544 (cmd->target >= MAX_TARGET) ||
6545 (cmd->lun >= MAX_LUN )) {
6546 return(DID_BAD_TARGET);
6547 }
6548
6549 /*---------------------------------------------
6550 **
6551 ** Complete the 1st TEST UNIT READY command
6552 ** with error condition if the device is
6553 ** flagged NOSCAN, in order to speed up
6554 ** the boot.
6555 **
6556 **---------------------------------------------
6557 */
6558 if ((cmd->cmnd[0] == 0 || cmd->cmnd[0] == 0x12) &&
6559 (tp->usrflag & UF_NOSCAN)) {
6560 tp->usrflag &= ~UF_NOSCAN;
6561 return DID_BAD_TARGET;
6562 }
6563
6564 if (DEBUG_FLAGS & DEBUG_TINY) {
6565 PRINT_ADDR(cmd);
6566 printk ("CMD=%x ", cmd->cmnd[0]);
6567 }
6568
6569 /*---------------------------------------------------
6570 **
6571 ** Assign a ccb / bind cmd.
6572 ** If resetting, shorten settle_time if necessary
6573 ** in order to avoid spurious timeouts.
6574 ** If resetting or no free ccb,
6575 ** insert cmd into the waiting list.
6576 **
6577 **----------------------------------------------------
6578 */
6579 if (np->settle_time && cmd->timeout_per_command >= HZ) {
6580 u_long tlimit = ktime_get(cmd->timeout_per_command - HZ);
6581 if (ktime_dif(np->settle_time, tlimit) > 0)
6582 np->settle_time = tlimit;
6583 }
6584
6585 if (np->settle_time || !(cp=ncr_get_ccb (np, cmd->target, cmd->lun))) {
6586 insert_into_waiting_list(np, cmd);
6587 return(DID_OK);
6588 }
6589 cp->cmd = cmd;
6590
6591 /*---------------------------------------------------
6592 **
6593 ** Enable tagged queue if asked by scsi ioctl
6594 **
6595 **----------------------------------------------------
6596 */
6597 #if 0 /* This stuff was only useful for linux-1.2.13 */
6598 if (lp && !lp->numtags && cmd->device && cmd->device->tagged_queue) {
6599 lp->numtags = tp->usrtags;
6600 ncr_setup_tags (np, cp->target, cp->lun);
6601 }
6602 #endif
6603
6604 /*----------------------------------------------------
6605 **
6606 ** Build the identify / tag / sdtr message
6607 **
6608 **----------------------------------------------------
6609 */
6610
6611 idmsg = M_IDENTIFY | cp->lun;
6612
6613 if (cp ->tag != NO_TAG || (lp && !(tp->usrflag & UF_NODISC)))
6614 idmsg |= 0x40;
6615
6616 msgptr = cp->scsi_smsg;
6617 msglen = 0;
6618 msgptr[msglen++] = idmsg;
6619
6620 if (cp->tag != NO_TAG) {
6621 char order = np->order;
6622
6623 /*
6624 ** Force ordered tag if necessary to avoid timeouts
6625 ** and to preserve interactivity.
6626 */
6627 if (lp && ktime_exp(lp->tags_stime)) {
6628 lp->tags_si = !(lp->tags_si);
6629 if (lp->tags_sum[lp->tags_si]) {
6630 order = M_ORDERED_TAG;
6631 if ((DEBUG_FLAGS & DEBUG_TAGS)||bootverbose>0){
6632 PRINT_ADDR(cmd);
6633 printk("ordered tag forced.\n");
6634 }
6635 }
6636 lp->tags_stime = ktime_get(3*HZ);
6637 }
6638
6639 if (order == 0) {
6640 /*
6641 ** Ordered write ops, unordered read ops.
6642 */
6643 switch (cmd->cmnd[0]) {
6644 case 0x08: /* READ_SMALL (6) */
6645 case 0x28: /* READ_BIG (10) */
6646 case 0xa8: /* READ_HUGE (12) */
6647 order = M_SIMPLE_TAG;
6648 break;
6649 default:
6650 order = M_ORDERED_TAG;
6651 }
6652 }
6653 msgptr[msglen++] = order;
6654 /*
6655 ** For less than 128 tags, actual tags are numbered
6656 ** 1,3,5,..2*MAXTAGS+1,since we may have to deal
6657 ** with devices that have problems with #TAG 0 or too
6658 ** great #TAG numbers. For more tags (up to 256),
6659 ** we use directly our tag number.
6660 */
6661 #if MAX_TASKS > (512/4)
6662 msgptr[msglen++] = cp->tag;
6663 #else
6664 msgptr[msglen++] = (cp->tag << 1) + 1;
6665 #endif
6666 }
6667
6668 cp->host_flags = 0;
6669
6670 /*----------------------------------------------------
6671 **
6672 ** Build the data descriptors
6673 **
6674 **----------------------------------------------------
6675 */
6676
6677 direction = scsi_data_direction(cmd);
6678 if (direction != SCSI_DATA_NONE) {
6679 cp->segments = np->scatter (np, cp, cp->cmd);
6680 if (cp->segments < 0) {
6681 ncr_free_ccb(np, cp);
6682 return(DID_ERROR);
6683 }
6684 }
6685 else {
6686 cp->data_len = 0;
6687 cp->segments = 0;
6688 }
6689
6690 /*---------------------------------------------------
6691 **
6692 ** negotiation required?
6693 **
6694 ** (nego_status is filled by ncr_prepare_nego())
6695 **
6696 **---------------------------------------------------
6697 */
6698
6699 cp->nego_status = 0;
6700
6701 #ifdef SCSI_NCR_INTEGRITY_CHECKING
6702 if ((np->check_integrity && tp->ic_done) || !np->check_integrity) {
6703 if ((!tp->widedone || !tp->period) && !tp->nego_cp && lp) {
6704 msglen += ncr_prepare_nego (np, cp, msgptr + msglen);
6705 }
6706 }
6707 else if (np->check_integrity && (cmd->ic_in_progress)) {
6708 msglen += ncr_ic_nego (np, cp, cmd, msgptr + msglen);
6709 }
6710 else if (np->check_integrity && cmd->ic_complete) {
6711 u_long current_period;
6712 u_char current_offset, current_width, current_factor;
6713
6714 ncr_get_xfer_info (np, tp, ¤t_factor,
6715 ¤t_offset, ¤t_width);
6716
6717 tp->ic_max_width = current_width;
6718 tp->ic_min_sync = current_factor;
6719
6720 if (current_factor == 9) current_period = 125;
6721 else if (current_factor == 10) current_period = 250;
6722 else if (current_factor == 11) current_period = 303;
6723 else if (current_factor == 12) current_period = 500;
6724 else current_period = current_factor * 40;
6725
6726 /*
6727 * Negotiation for this target is complete. Update flags.
6728 */
6729 tp->period = current_period;
6730 tp->widedone = 1;
6731 tp->ic_done = 1;
6732
6733 printk("%s: Integrity Check Complete: \n", ncr_name(np));
6734
6735 printk("%s: %s %s SCSI", ncr_name(np),
6736 current_offset?"SYNC":"ASYNC",
6737 tp->ic_max_width?"WIDE":"NARROW");
6738 if (current_offset) {
6739 u_long mbs = 10000 * (tp->ic_max_width + 1);
6740
6741 printk(" %d.%d MB/s",
6742 (int) (mbs / current_period), (int) (mbs % current_period));
6743
6744 printk(" (%d ns, %d offset)\n",
6745 (int) current_period/10, current_offset);
6746 }
6747 else
6748 printk(" %d MB/s. \n ", (tp->ic_max_width+1)*5);
6749 }
6750 #else
6751 if ((!tp->widedone || !tp->period) && !tp->nego_cp && lp) {
6752 msglen += ncr_prepare_nego (np, cp, msgptr + msglen);
6753 }
6754 #endif /* SCSI_NCR_INTEGRITY_CHECKING */
6755
6756
6757 /*----------------------------------------------------
6758 **
6759 ** Determine xfer direction.
6760 **
6761 **----------------------------------------------------
6762 */
6763 if (!cp->data_len)
6764 direction = SCSI_DATA_NONE;
6765
6766 /*
6767 ** If data direction is UNKNOWN, speculate DATA_READ
6768 ** but prepare alternate pointers for WRITE in case
6769 ** of our speculation will be just wrong.
6770 ** SCRIPTS will swap values if needed.
6771 */
6772 switch(direction) {
6773 case SCSI_DATA_UNKNOWN:
6774 case SCSI_DATA_WRITE:
6775 goalp = NCB_SCRIPT_PHYS (np, data_out2) + 8;
6776 lastp = goalp - 8 - (cp->segments * (SCR_SG_SIZE*4));
6777 if (direction != SCSI_DATA_UNKNOWN)
6778 break;
6779 cp->phys.header.wgoalp = cpu_to_scr(goalp);
6780 cp->phys.header.wlastp = cpu_to_scr(lastp);
6781 /* fall through */
6782 case SCSI_DATA_READ:
6783 cp->host_flags |= HF_DATA_IN;
6784 goalp = NCB_SCRIPT_PHYS (np, data_in2) + 8;
6785 lastp = goalp - 8 - (cp->segments * (SCR_SG_SIZE*4));
6786 break;
6787 default:
6788 case SCSI_DATA_NONE:
6789 lastp = goalp = NCB_SCRIPTH_PHYS (np, no_data);
6790 break;
6791 }
6792
6793 /*
6794 ** Set all pointers values needed by SCRIPTS.
6795 ** If direction is unknown, start at data_io.
6796 */
6797 cp->phys.header.lastp = cpu_to_scr(lastp);
6798 cp->phys.header.goalp = cpu_to_scr(goalp);
6799
6800 if (direction == SCSI_DATA_UNKNOWN)
6801 cp->phys.header.savep =
6802 cpu_to_scr(NCB_SCRIPTH_PHYS (np, data_io));
6803 else
6804 cp->phys.header.savep= cpu_to_scr(lastp);
6805
6806 /*
6807 ** Save the initial data pointer in order to be able
6808 ** to redo the command.
6809 ** We also have to save the initial lastp, since it
6810 ** will be changed to DATA_IO if we don't know the data
6811 ** direction and the device completes the command with
6812 ** QUEUE FULL status (without entering the data phase).
6813 */
6814 cp->startp = cp->phys.header.savep;
6815 cp->lastp0 = cp->phys.header.lastp;
6816
6817 /*----------------------------------------------------
6818 **
6819 ** fill in ccb
6820 **
6821 **----------------------------------------------------
6822 **
6823 **
6824 ** physical -> virtual backlink
6825 ** Generic SCSI command
6826 */
6827
6828 /*
6829 ** Startqueue
6830 */
6831 cp->phys.header.go.start = cpu_to_scr(NCB_SCRIPT_PHYS (np,select));
6832 cp->phys.header.go.restart = cpu_to_scr(NCB_SCRIPT_PHYS (np,resel_dsa));
6833 /*
6834 ** select
6835 */
6836 cp->phys.select.sel_id = cp->target;
6837 cp->phys.select.sel_scntl3 = tp->wval;
6838 cp->phys.select.sel_sxfer = tp->sval;
6839 cp->phys.select.sel_scntl4 = tp->uval;
6840 /*
6841 ** message
6842 */
6843 cp->phys.smsg.addr = cpu_to_scr(CCB_PHYS (cp, scsi_smsg));
6844 cp->phys.smsg.size = cpu_to_scr(msglen);
6845
6846 /*
6847 ** command
6848 */
6849 memcpy(cp->cdb_buf, cmd->cmnd, MIN(cmd->cmd_len, sizeof(cp->cdb_buf)));
6850 cp->phys.cmd.addr = cpu_to_scr(CCB_PHYS (cp, cdb_buf[0]));
6851 cp->phys.cmd.size = cpu_to_scr(cmd->cmd_len);
6852
6853 /*
6854 ** status
6855 */
6856 cp->actualquirks = tp->quirks;
6857 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
6858 cp->scsi_status = S_ILLEGAL;
6859 cp->xerr_status = 0;
6860 cp->extra_bytes = 0;
6861
6862 /*
6863 ** extreme data pointer.
6864 ** shall be positive, so -1 is lower than lowest.:)
6865 */
6866 cp->ext_sg = -1;
6867 cp->ext_ofs = 0;
6868
6869 /*----------------------------------------------------
6870 **
6871 ** Critical region: start this job.
6872 **
6873 **----------------------------------------------------
6874 */
6875
6876 /*
6877 ** activate this job.
6878 */
6879
6880 /*
6881 ** insert next CCBs into start queue.
6882 ** 2 max at a time is enough to flush the CCB wait queue.
6883 */
6884 if (lp)
6885 ncr_start_next_ccb(np, lp, 2);
6886 else
6887 ncr_put_start_queue(np, cp);
6888
6889 /*
6890 ** Command is successfully queued.
6891 */
6892
6893 return(DID_OK);
6894 }
6895
6896
6897 /*==========================================================
6898 **
6899 **
6900 ** Insert a CCB into the start queue and wake up the
6901 ** SCRIPTS processor.
6902 **
6903 **
6904 **==========================================================
6905 */
6906
6907 static void ncr_start_next_ccb(ncb_p np, lcb_p lp, int maxn)
6908 {
6909 XPT_QUEHEAD *qp;
6910 ccb_p cp;
6911
6912 while (maxn-- && lp->queuedccbs < lp->queuedepth) {
6913 qp = xpt_remque_head(&lp->wait_ccbq);
6914 if (!qp)
6915 break;
6916 ++lp->queuedccbs;
6917 cp = xpt_que_entry(qp, struct ccb, link_ccbq);
6918 xpt_insque_tail(qp, &lp->busy_ccbq);
6919 lp->tasktbl[cp->tag == NO_TAG ? 0 : cp->tag] =
6920 cpu_to_scr(cp->p_ccb);
6921 ncr_put_start_queue(np, cp);
6922 }
6923 }
6924
6925 static void ncr_put_start_queue(ncb_p np, ccb_p cp)
6926 {
6927 u_short qidx;
6928
6929 #ifdef SCSI_NCR_IARB_SUPPORT
6930 /*
6931 ** If the previously queued CCB is not yet done,
6932 ** set the IARB hint. The SCRIPTS will go with IARB
6933 ** for this job when starting the previous one.
6934 ** We leave devices a chance to win arbitration by
6935 ** not using more than 'iarb_max' consecutive
6936 ** immediate arbitrations.
6937 */
6938 if (np->last_cp && np->iarb_count < np->iarb_max) {
6939 np->last_cp->host_flags |= HF_HINT_IARB;
6940 ++np->iarb_count;
6941 }
6942 else
6943 np->iarb_count = 0;
6944 np->last_cp = cp;
6945 #endif
6946
6947 /*
6948 ** insert into start queue.
6949 */
6950 qidx = np->squeueput + 2;
6951 if (qidx >= MAX_START*2) qidx = 0;
6952
6953 np->squeue [qidx] = cpu_to_scr(np->p_idletask);
6954 MEMORY_BARRIER();
6955 np->squeue [np->squeueput] = cpu_to_scr(cp->p_ccb);
6956
6957 np->squeueput = qidx;
6958 cp->queued = 1;
6959
6960 if (DEBUG_FLAGS & DEBUG_QUEUE)
6961 printk ("%s: queuepos=%d.\n", ncr_name (np), np->squeueput);
6962
6963 /*
6964 ** Script processor may be waiting for reselect.
6965 ** Wake it up.
6966 */
6967 MEMORY_BARRIER();
6968 OUTB (nc_istat, SIGP|np->istat_sem);
6969 }
6970
6971
6972 /*==========================================================
6973 **
6974 ** Soft reset the chip.
6975 **
6976 ** Some 896 and 876 chip revisions may hang-up if we set
6977 ** the SRST (soft reset) bit at the wrong time when SCRIPTS
6978 ** are running.
6979 ** So, we need to abort the current operation prior to
6980 ** soft resetting the chip.
6981 **
6982 **==========================================================
6983 */
6984
6985 static void ncr_chip_reset (ncb_p np)
6986 {
6987 OUTB (nc_istat, SRST);
6988 UDELAY (10);
6989 OUTB (nc_istat, 0);
6990 }
6991
6992 static void ncr_soft_reset(ncb_p np)
6993 {
6994 u_char istat;
6995 int i;
6996
6997 if (!(np->features & FE_ISTAT1) || !(INB (nc_istat1) & SRUN))
6998 goto do_chip_reset;
6999
7000 OUTB (nc_istat, CABRT);
7001 for (i = 100000 ; i ; --i) {
7002 istat = INB (nc_istat);
7003 if (istat & SIP) {
7004 INW (nc_sist);
7005 }
7006 else if (istat & DIP) {
7007 if (INB (nc_dstat) & ABRT);
7008 break;
7009 }
7010 UDELAY(5);
7011 }
7012 OUTB (nc_istat, 0);
7013 if (!i)
7014 printk("%s: unable to abort current chip operation, "
7015 "ISTAT=0x%02x.\n", ncr_name(np), istat);
7016 do_chip_reset:
7017 ncr_chip_reset(np);
7018 }
7019
7020 /*==========================================================
7021 **
7022 **
7023 ** Start reset process.
7024 ** The interrupt handler will reinitialize the chip.
7025 ** The timeout handler will wait for settle_time before
7026 ** clearing it and so resuming command processing.
7027 **
7028 **
7029 **==========================================================
7030 */
7031 static void ncr_start_reset(ncb_p np)
7032 {
7033 (void) ncr_reset_scsi_bus(np, 1, driver_setup.settle_delay);
7034 }
7035
7036 static int ncr_reset_scsi_bus(ncb_p np, int enab_int, int settle_delay)
7037 {
7038 u_int32 term;
7039 int retv = 0;
7040
7041 np->settle_time = ktime_get(settle_delay * HZ);
7042
7043 if (bootverbose > 1)
7044 printk("%s: resetting, "
7045 "command processing suspended for %d seconds\n",
7046 ncr_name(np), settle_delay);
7047
7048 ncr_soft_reset(np); /* Soft reset the chip */
7049 UDELAY (2000); /* The 895/6 need time for the bus mode to settle */
7050 if (enab_int)
7051 OUTW (nc_sien, RST);
7052 /*
7053 ** Enable Tolerant, reset IRQD if present and
7054 ** properly set IRQ mode, prior to resetting the bus.
7055 */
7056 OUTB (nc_stest3, TE);
7057 OUTB (nc_dcntl, (np->rv_dcntl & IRQM));
7058 OUTB (nc_scntl1, CRST);
7059 UDELAY (200);
7060
7061 if (!driver_setup.bus_check)
7062 goto out;
7063 /*
7064 ** Check for no terminators or SCSI bus shorts to ground.
7065 ** Read SCSI data bus, data parity bits and control signals.
7066 ** We are expecting RESET to be TRUE and other signals to be
7067 ** FALSE.
7068 */
7069 term = INB(nc_sstat0);
7070 term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */
7071 term |= ((INB(nc_sstat2) & 0x01) << 26) | /* sdp1 */
7072 ((INW(nc_sbdl) & 0xff) << 9) | /* d7-0 */
7073 ((INW(nc_sbdl) & 0xff00) << 10) | /* d15-8 */
7074 INB(nc_sbcl); /* req ack bsy sel atn msg cd io */
7075
7076 if (!(np->features & FE_WIDE))
7077 term &= 0x3ffff;
7078
7079 if (term != (2<<7)) {
7080 printk("%s: suspicious SCSI data while resetting the BUS.\n",
7081 ncr_name(np));
7082 printk("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
7083 "0x%lx, expecting 0x%lx\n",
7084 ncr_name(np),
7085 (np->features & FE_WIDE) ? "dp1,d15-8," : "",
7086 (u_long)term, (u_long)(2<<7));
7087 if (driver_setup.bus_check == 1)
7088 retv = 1;
7089 }
7090 out:
7091 OUTB (nc_scntl1, 0);
7092 return retv;
7093 }
7094
7095 /*==========================================================
7096 **
7097 **
7098 ** Reset the SCSI BUS.
7099 ** This is called from the generic SCSI driver.
7100 **
7101 **
7102 **==========================================================
7103 */
7104 static int ncr_reset_bus (ncb_p np, Scsi_Cmnd *cmd, int sync_reset)
7105 {
7106 /* Scsi_Device *device = cmd->device; */
7107 ccb_p cp;
7108 int found;
7109
7110 /*
7111 * Return immediately if reset is in progress.
7112 */
7113 if (np->settle_time) {
7114 return SCSI_RESET_PUNT;
7115 }
7116 /*
7117 * Start the reset process.
7118 * The script processor is then assumed to be stopped.
7119 * Commands will now be queued in the waiting list until a settle
7120 * delay of 2 seconds will be completed.
7121 */
7122 ncr_start_reset(np);
7123 /*
7124 * First, look in the wakeup list
7125 */
7126 for (found=0, cp=np->ccbc; cp; cp=cp->link_ccb) {
7127 /*
7128 ** look for the ccb of this command.
7129 */
7130 if (cp->host_status == HS_IDLE) continue;
7131 if (cp->cmd == cmd) {
7132 found = 1;
7133 break;
7134 }
7135 }
7136 /*
7137 * Then, look in the waiting list
7138 */
7139 if (!found && retrieve_from_waiting_list(0, np, cmd))
7140 found = 1;
7141 /*
7142 * Wake-up all awaiting commands with DID_RESET.
7143 */
7144 reset_waiting_list(np);
7145 /*
7146 * Wake-up all pending commands with HS_RESET -> DID_RESET.
7147 */
7148 ncr_wakeup(np, HS_RESET);
7149 /*
7150 * If the involved command was not in a driver queue, and the
7151 * scsi driver told us reset is synchronous, and the command is not
7152 * currently in the waiting list, complete it with DID_RESET status,
7153 * in order to keep it alive.
7154 */
7155 if (!found && sync_reset && !retrieve_from_waiting_list(0, np, cmd)) {
7156 SetScsiResult(cmd, DID_RESET, 0);
7157 ncr_queue_done_cmd(np, cmd);
7158 }
7159
7160 return SCSI_RESET_SUCCESS;
7161 }
7162
7163 /*==========================================================
7164 **
7165 **
7166 ** Abort an SCSI command.
7167 ** This is called from the generic SCSI driver.
7168 **
7169 **
7170 **==========================================================
7171 */
7172 static int ncr_abort_command (ncb_p np, Scsi_Cmnd *cmd)
7173 {
7174 /* Scsi_Device *device = cmd->device; */
7175 ccb_p cp;
7176
7177 /*
7178 * First, look for the scsi command in the waiting list
7179 */
7180 if (remove_from_waiting_list(np, cmd)) {
7181 SetScsiAbortResult(cmd);
7182 ncr_queue_done_cmd(np, cmd);
7183 return SCSI_ABORT_SUCCESS;
7184 }
7185
7186 /*
7187 * Then, look in the wakeup list
7188 */
7189 for (cp=np->ccbc; cp; cp=cp->link_ccb) {
7190 /*
7191 ** look for the ccb of this command.
7192 */
7193 if (cp->host_status == HS_IDLE) continue;
7194 if (cp->cmd == cmd)
7195 break;
7196 }
7197
7198 if (!cp) {
7199 return SCSI_ABORT_NOT_RUNNING;
7200 }
7201
7202 /*
7203 ** Keep track we have to abort this job.
7204 */
7205 cp->to_abort = 1;
7206
7207 /*
7208 ** Tell the SCRIPTS processor to stop
7209 ** and synchronize with us.
7210 */
7211 np->istat_sem = SEM;
7212
7213 /*
7214 ** If there are no requests, the script
7215 ** processor will sleep on SEL_WAIT_RESEL.
7216 ** Let's wake it up, since it may have to work.
7217 */
7218 OUTB (nc_istat, SIGP|SEM);
7219
7220 /*
7221 ** Tell user we are working for him.
7222 */
7223 return SCSI_ABORT_PENDING;
7224 }
7225
7226 /*==========================================================
7227 **
7228 ** Linux release module stuff.
7229 **
7230 ** Called before unloading the module
7231 ** Detach the host.
7232 ** We have to free resources and halt the NCR chip
7233 **
7234 **==========================================================
7235 */
7236
7237 #ifdef MODULE
7238 static int ncr_detach(ncb_p np)
7239 {
7240 int i;
7241
7242 printk("%s: detaching ...\n", ncr_name(np));
7243
7244 /*
7245 ** Stop the ncr_timeout process
7246 ** Set release_stage to 1 and wait that ncr_timeout() set it to 2.
7247 */
7248 np->release_stage = 1;
7249 for (i = 50 ; i && np->release_stage != 2 ; i--) MDELAY (100);
7250 if (np->release_stage != 2)
7251 printk("%s: the timer seems to be already stopped\n",
7252 ncr_name(np));
7253 else np->release_stage = 2;
7254
7255 /*
7256 ** Reset NCR chip.
7257 ** We should use ncr_soft_reset(), but we donnot want to do
7258 ** so, since we may not be safe if interrupts occur.
7259 */
7260
7261 printk("%s: resetting chip\n", ncr_name(np));
7262 ncr_chip_reset(np);
7263
7264 /*
7265 ** Restore bios setting for automatic clock detection.
7266 */
7267 OUTB(nc_dmode, np->sv_dmode);
7268 OUTB(nc_dcntl, np->sv_dcntl);
7269 OUTB(nc_ctest3, np->sv_ctest3);
7270 OUTB(nc_ctest4, np->sv_ctest4);
7271 OUTB(nc_ctest5, np->sv_ctest5);
7272 OUTB(nc_gpcntl, np->sv_gpcntl);
7273 OUTB(nc_stest2, np->sv_stest2);
7274
7275 ncr_selectclock(np, np->sv_scntl3);
7276 /*
7277 ** Free host resources
7278 */
7279 ncr_free_resources(np);
7280
7281 return 1;
7282 }
7283 #endif
7284
7285 /*==========================================================
7286 **
7287 **
7288 ** Complete execution of a SCSI command.
7289 ** Signal completion to the generic SCSI driver.
7290 **
7291 **
7292 **==========================================================
7293 */
7294
7295 void ncr_complete (ncb_p np, ccb_p cp)
7296 {
7297 Scsi_Cmnd *cmd;
7298 tcb_p tp;
7299 lcb_p lp;
7300
7301 /*
7302 ** Sanity check
7303 */
7304 if (!cp || !cp->cmd)
7305 return;
7306
7307 /*
7308 ** Print some debugging info.
7309 */
7310
7311 if (DEBUG_FLAGS & DEBUG_TINY)
7312 printk ("CCB=%lx STAT=%x/%x\n", (unsigned long)cp,
7313 cp->host_status,cp->scsi_status);
7314
7315 /*
7316 ** Get command, target and lun pointers.
7317 */
7318
7319 cmd = cp->cmd;
7320 cp->cmd = NULL;
7321 tp = &np->target[cp->target];
7322 lp = ncr_lp(np, tp, cp->lun);
7323
7324 /*
7325 ** We donnot queue more than 1 ccb per target
7326 ** with negotiation at any time. If this ccb was
7327 ** used for negotiation, clear this info in the tcb.
7328 */
7329
7330 if (cp == tp->nego_cp)
7331 tp->nego_cp = 0;
7332
7333 #ifdef SCSI_NCR_IARB_SUPPORT
7334 /*
7335 ** We just complete the last queued CCB.
7336 ** Clear this info that is no more relevant.
7337 */
7338 if (cp == np->last_cp)
7339 np->last_cp = 0;
7340 #endif
7341
7342 /*
7343 ** If auto-sense performed, change scsi status,
7344 ** Otherwise, compute the residual.
7345 */
7346 if (cp->host_flags & HF_AUTO_SENSE) {
7347 cp->scsi_status = cp->sv_scsi_status;
7348 cp->xerr_status = cp->sv_xerr_status;
7349 }
7350 else {
7351 cp->resid = 0;
7352 if (cp->xerr_status ||
7353 cp->phys.header.lastp != cp->phys.header.goalp)
7354 cp->resid = ncr_compute_residual(np, cp);
7355 }
7356
7357 /*
7358 ** Check for extended errors.
7359 */
7360
7361 if (cp->xerr_status) {
7362 if (cp->xerr_status & XE_PARITY_ERR) {
7363 PRINT_ADDR(cmd);
7364 printk ("unrecovered SCSI parity error.\n");
7365 }
7366 if (cp->xerr_status & XE_EXTRA_DATA) {
7367 PRINT_ADDR(cmd);
7368 printk ("extraneous data discarded.\n");
7369 }
7370 if (cp->xerr_status & XE_BAD_PHASE) {
7371 PRINT_ADDR(cmd);
7372 printk ("illegal scsi phase (4/5).\n");
7373 }
7374 if (cp->xerr_status & XE_SODL_UNRUN) {
7375 PRINT_ADDR(cmd);
7376 printk ("ODD transfer in DATA OUT phase.\n");
7377 }
7378 if (cp->xerr_status & XE_SWIDE_OVRUN){
7379 PRINT_ADDR(cmd);
7380 printk ("ODD transfer in DATA IN phase.\n");
7381 }
7382
7383 if (cp->host_status==HS_COMPLETE)
7384 cp->host_status = HS_FAIL;
7385 }
7386
7387 /*
7388 ** Print out any error for debugging purpose.
7389 */
7390 if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) {
7391 if (cp->host_status!=HS_COMPLETE || cp->scsi_status!=S_GOOD ||
7392 cp->resid) {
7393 PRINT_ADDR(cmd);
7394 printk ("ERROR: cmd=%x host_status=%x scsi_status=%x "
7395 "data_len=%d residual=%d\n",
7396 cmd->cmnd[0], cp->host_status, cp->scsi_status,
7397 cp->data_len, cp->resid);
7398 }
7399 }
7400
7401 #if LINUX_VERSION_CODE >= LinuxVersionCode(2,3,99)
7402 /*
7403 ** Move residual byte count to user structure.
7404 */
7405 cmd->resid = cp->resid;
7406 #endif
7407 /*
7408 ** Check the status.
7409 */
7410 if ( (cp->host_status == HS_COMPLETE)
7411 && (cp->scsi_status == S_GOOD ||
7412 cp->scsi_status == S_COND_MET)) {
7413 /*
7414 ** All went well (GOOD status).
7415 ** CONDITION MET status is returned on
7416 ** `Pre-Fetch' or `Search data' success.
7417 */
7418 SetScsiResult(cmd, DID_OK, cp->scsi_status);
7419
7420 /*
7421 ** Allocate the lcb if not yet.
7422 */
7423 if (!lp)
7424 ncr_alloc_lcb (np, cp->target, cp->lun);
7425
7426 /*
7427 ** On standard INQUIRY response (EVPD and CmDt
7428 ** not set), setup logical unit according to
7429 ** announced capabilities (we need the 1rst 8 bytes).
7430 */
7431 if (cmd->cmnd[0] == 0x12 && !(cmd->cmnd[1] & 0x3) &&
7432 cmd->request_bufflen - cp->resid > 7 && !cmd->use_sg) {
7433 sync_scsi_data(np, cmd); /* SYNC the data */
7434 ncr_setup_lcb (np, cp->target, cp->lun,
7435 (char *) cmd->request_buffer);
7436 }
7437
7438 /*
7439 ** If tags was reduced due to queue full,
7440 ** increase tags if 1000 good status received.
7441 */
7442 if (lp && lp->usetags && lp->numtags < lp->maxtags) {
7443 ++lp->num_good;
7444 if (lp->num_good >= 1000) {
7445 lp->num_good = 0;
7446 ++lp->numtags;
7447 ncr_setup_tags (np, cp->target, cp->lun);
7448 }
7449 }
7450 } else if ((cp->host_status == HS_COMPLETE)
7451 && (cp->scsi_status == S_CHECK_COND)) {
7452 /*
7453 ** Check condition code
7454 */
7455 SetScsiResult(cmd, DID_OK, S_CHECK_COND);
7456
7457 if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) {
7458 PRINT_ADDR(cmd);
7459 ncr_printl_hex("sense data:", cmd->sense_buffer, 14);
7460 }
7461 } else if ((cp->host_status == HS_COMPLETE)
7462 && (cp->scsi_status == S_CONFLICT)) {
7463 /*
7464 ** Reservation Conflict condition code
7465 */
7466 SetScsiResult(cmd, DID_OK, S_CONFLICT);
7467
7468 } else if ((cp->host_status == HS_COMPLETE)
7469 && (cp->scsi_status == S_BUSY ||
7470 cp->scsi_status == S_QUEUE_FULL)) {
7471
7472 /*
7473 ** Target is busy.
7474 */
7475 SetScsiResult(cmd, DID_OK, cp->scsi_status);
7476
7477 } else if ((cp->host_status == HS_SEL_TIMEOUT)
7478 || (cp->host_status == HS_TIMEOUT)) {
7479
7480 /*
7481 ** No response
7482 */
7483 SetScsiResult(cmd, DID_TIME_OUT, cp->scsi_status);
7484
7485 } else if (cp->host_status == HS_RESET) {
7486
7487 /*
7488 ** SCSI bus reset
7489 */
7490 SetScsiResult(cmd, DID_RESET, cp->scsi_status);
7491
7492 } else if (cp->host_status == HS_ABORTED) {
7493
7494 /*
7495 ** Transfer aborted
7496 */
7497 SetScsiAbortResult(cmd);
7498
7499 } else {
7500 int did_status;
7501
7502 /*
7503 ** Other protocol messes
7504 */
7505 PRINT_ADDR(cmd);
7506 printk ("COMMAND FAILED (%x %x) @%p.\n",
7507 cp->host_status, cp->scsi_status, cp);
7508
7509 did_status = DID_ERROR;
7510 if (cp->xerr_status & XE_PARITY_ERR)
7511 did_status = DID_PARITY;
7512
7513 SetScsiResult(cmd, did_status, cp->scsi_status);
7514 }
7515
7516 /*
7517 ** trace output
7518 */
7519
7520 if (tp->usrflag & UF_TRACE) {
7521 PRINT_ADDR(cmd);
7522 printk (" CMD:");
7523 ncr_print_hex(cmd->cmnd, cmd->cmd_len);
7524
7525 if (cp->host_status==HS_COMPLETE) {
7526 switch (cp->scsi_status) {
7527 case S_GOOD:
7528 printk (" GOOD");
7529 break;
7530 case S_CHECK_COND:
7531 printk (" SENSE:");
7532 ncr_print_hex(cmd->sense_buffer, 14);
7533 break;
7534 default:
7535 printk (" STAT: %x\n", cp->scsi_status);
7536 break;
7537 }
7538 } else printk (" HOSTERROR: %x", cp->host_status);
7539 printk ("\n");
7540 }
7541
7542 /*
7543 ** Free this ccb
7544 */
7545 ncr_free_ccb (np, cp);
7546
7547 /*
7548 ** requeue awaiting scsi commands for this lun.
7549 */
7550 if (lp && lp->queuedccbs < lp->queuedepth &&
7551 !xpt_que_empty(&lp->wait_ccbq))
7552 ncr_start_next_ccb(np, lp, 2);
7553
7554 /*
7555 ** requeue awaiting scsi commands for this controller.
7556 */
7557 if (np->waiting_list)
7558 requeue_waiting_list(np);
7559
7560 /*
7561 ** signal completion to generic driver.
7562 */
7563 ncr_queue_done_cmd(np, cmd);
7564 }
7565
7566 /*==========================================================
7567 **
7568 **
7569 ** Signal all (or one) control block done.
7570 **
7571 **
7572 **==========================================================
7573 */
7574
7575 /*
7576 ** The NCR has completed CCBs.
7577 ** Look at the DONE QUEUE.
7578 **
7579 ** On architectures that may reorder LOAD/STORE operations,
7580 ** a memory barrier may be needed after the reading of the
7581 ** so-called `flag' and prior to dealing with the data.
7582 */
7583 int ncr_wakeup_done (ncb_p np)
7584 {
7585 ccb_p cp;
7586 int i, n;
7587 u_long dsa;
7588
7589 n = 0;
7590 i = np->dqueueget;
7591 while (1) {
7592 dsa = scr_to_cpu(np->dqueue[i]);
7593 if (!dsa)
7594 break;
7595 np->dqueue[i] = 0;
7596 if ((i = i+2) >= MAX_START*2)
7597 i = 0;
7598
7599 cp = ncr_ccb_from_dsa(np, dsa);
7600 if (cp) {
7601 MEMORY_BARRIER();
7602 ncr_complete (np, cp);
7603 ++n;
7604 }
7605 else
7606 printk (KERN_ERR "%s: bad DSA (%lx) in done queue.\n",
7607 ncr_name(np), dsa);
7608 }
7609 np->dqueueget = i;
7610
7611 return n;
7612 }
7613
7614 /*
7615 ** Complete all active CCBs.
7616 */
7617 void ncr_wakeup (ncb_p np, u_long code)
7618 {
7619 ccb_p cp = np->ccbc;
7620
7621 while (cp) {
7622 if (cp->host_status != HS_IDLE) {
7623 cp->host_status = code;
7624 ncr_complete (np, cp);
7625 }
7626 cp = cp->link_ccb;
7627 }
7628 }
7629
7630 /*==========================================================
7631 **
7632 **
7633 ** Start NCR chip.
7634 **
7635 **
7636 **==========================================================
7637 */
7638
7639 void ncr_init (ncb_p np, int reset, char * msg, u_long code)
7640 {
7641 int i;
7642 u_long phys;
7643
7644 /*
7645 ** Reset chip if asked, otherwise just clear fifos.
7646 */
7647
7648 if (reset)
7649 ncr_soft_reset(np);
7650 else {
7651 OUTB (nc_stest3, TE|CSF);
7652 OUTONB (nc_ctest3, CLF);
7653 }
7654
7655 /*
7656 ** Message.
7657 */
7658
7659 if (msg) printk (KERN_INFO "%s: restart (%s).\n", ncr_name (np), msg);
7660
7661 /*
7662 ** Clear Start Queue
7663 */
7664 phys = np->p_squeue;
7665 np->queuedepth = MAX_START - 1; /* 1 entry needed as end marker */
7666 for (i = 0; i < MAX_START*2; i += 2) {
7667 np->squeue[i] = cpu_to_scr(np->p_idletask);
7668 np->squeue[i+1] = cpu_to_scr(phys + (i+2)*4);
7669 }
7670 np->squeue[MAX_START*2-1] = cpu_to_scr(phys);
7671
7672
7673 /*
7674 ** Start at first entry.
7675 */
7676 np->squeueput = 0;
7677 np->scripth0->startpos[0] = cpu_to_scr(phys);
7678
7679 /*
7680 ** Clear Done Queue
7681 */
7682 phys = vtobus(np->dqueue);
7683 for (i = 0; i < MAX_START*2; i += 2) {
7684 np->dqueue[i] = 0;
7685 np->dqueue[i+1] = cpu_to_scr(phys + (i+2)*4);
7686 }
7687 np->dqueue[MAX_START*2-1] = cpu_to_scr(phys);
7688
7689 /*
7690 ** Start at first entry.
7691 */
7692 np->scripth0->done_pos[0] = cpu_to_scr(phys);
7693 np->dqueueget = 0;
7694
7695 /*
7696 ** Wakeup all pending jobs.
7697 */
7698 ncr_wakeup (np, code);
7699
7700 /*
7701 ** Init chip.
7702 */
7703
7704 OUTB (nc_istat, 0x00 ); /* Remove Reset, abort */
7705 UDELAY (2000); /* The 895 needs time for the bus mode to settle */
7706
7707 OUTB (nc_scntl0, np->rv_scntl0 | 0xc0);
7708 /* full arb., ena parity, par->ATN */
7709 OUTB (nc_scntl1, 0x00); /* odd parity, and remove CRST!! */
7710
7711 ncr_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
7712
7713 OUTB (nc_scid , RRE|np->myaddr); /* Adapter SCSI address */
7714 OUTW (nc_respid, 1ul<<np->myaddr); /* Id to respond to */
7715 OUTB (nc_istat , SIGP ); /* Signal Process */
7716 OUTB (nc_dmode , np->rv_dmode); /* Burst length, dma mode */
7717 OUTB (nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */
7718
7719 OUTB (nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */
7720 OUTB (nc_ctest3, np->rv_ctest3); /* Write and invalidate */
7721 OUTB (nc_ctest4, np->rv_ctest4); /* Master parity checking */
7722
7723 if ((np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
7724 (np->device_id != PCI_DEVICE_ID_LSI_53C1010_66)){
7725 OUTB (nc_stest2, EXT|np->rv_stest2);
7726 /* Extended Sreq/Sack filtering, not supported in C1010/C1010_66 */
7727 }
7728 OUTB (nc_stest3, TE); /* TolerANT enable */
7729 OUTB (nc_stime0, 0x0c); /* HTH disabled STO 0.25 sec */
7730
7731 /*
7732 ** DEL 441 - 53C876 Rev 5 - Part Number 609-0392787/2788 - ITEM 2.
7733 ** Disable overlapped arbitration for all dual-function
7734 ** devices, regardless revision id.
7735 ** We may consider it is a post-chip-design feature. ;-)
7736 **
7737 ** Errata applies to all 896 and 1010 parts.
7738 */
7739 if (np->device_id == PCI_DEVICE_ID_NCR_53C875)
7740 OUTB (nc_ctest0, (1<<5));
7741 else if (np->device_id == PCI_DEVICE_ID_NCR_53C896 ||
7742 np->device_id == PCI_DEVICE_ID_LSI_53C1010 ||
7743 np->device_id == PCI_DEVICE_ID_LSI_53C1010_66 )
7744 np->rv_ccntl0 |= DPR;
7745
7746 /*
7747 ** C1010_66MHz rev 0 part requies AIPCNTL1 bit 3 to be set.
7748 */
7749 if (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)
7750 OUTB(nc_aipcntl1, (1<<3));
7751
7752 /*
7753 ** Write CCNTL0/CCNTL1 for chips capable of 64 bit addressing
7754 ** and/or hardware phase mismatch, since only such chips
7755 ** seem to support those IO registers.
7756 */
7757 if (np->features & (FE_DAC | FE_NOPM)) {
7758 OUTB (nc_ccntl0, np->rv_ccntl0);
7759 OUTB (nc_ccntl1, np->rv_ccntl1);
7760 }
7761
7762 /*
7763 ** If phase mismatch handled by scripts (53C895A or 53C896
7764 ** or 53C1010 or 53C1010_66), set PM jump addresses.
7765 */
7766
7767 if (np->features & FE_NOPM) {
7768 printk(KERN_INFO "%s: handling phase mismatch from SCRIPTS.\n",
7769 ncr_name(np));
7770 OUTL (nc_pmjad1, NCB_SCRIPTH_PHYS (np, pm_handle));
7771 OUTL (nc_pmjad2, NCB_SCRIPTH_PHYS (np, pm_handle));
7772 }
7773
7774 /*
7775 ** Enable GPIO0 pin for writing if LED support from SCRIPTS.
7776 ** Also set GPIO5 and clear GPIO6 if hardware LED control.
7777 */
7778
7779 if (np->features & FE_LED0)
7780 OUTB(nc_gpcntl, INB(nc_gpcntl) & ~0x01);
7781 else if (np->features & FE_LEDC)
7782 OUTB(nc_gpcntl, (INB(nc_gpcntl) & ~0x41) | 0x20);
7783
7784
7785 /*
7786 ** enable ints
7787 */
7788
7789 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
7790 OUTB (nc_dien , MDPE|BF|SSI|SIR|IID);
7791
7792 /*
7793 ** For 895/895A/896/c1010
7794 ** Enable SBMC interrupt and save current SCSI bus mode.
7795 */
7796 if ( (np->features & FE_ULTRA2) || (np->features & FE_ULTRA3) ) {
7797 OUTONW (nc_sien, SBMC);
7798 np->scsi_mode = INB (nc_stest4) & SMODE;
7799 }
7800
7801 /*
7802 ** Fill in target structure.
7803 ** Reinitialize usrsync.
7804 ** Reinitialize usrwide.
7805 ** Prepare sync negotiation according to actual SCSI bus mode.
7806 */
7807
7808 for (i=0;i<MAX_TARGET;i++) {
7809 tcb_p tp = &np->target[i];
7810
7811 tp->to_reset = 0;
7812
7813 tp->sval = 0;
7814 tp->wval = np->rv_scntl3;
7815 tp->uval = np->rv_scntl4;
7816
7817 if (tp->usrsync != 255) {
7818 if (tp->usrsync <= np->maxsync) {
7819 if (tp->usrsync < np->minsync) {
7820 tp->usrsync = np->minsync;
7821 }
7822 }
7823 else
7824 tp->usrsync = 255;
7825 };
7826
7827 if (tp->usrwide > np->maxwide)
7828 tp->usrwide = np->maxwide;
7829
7830 ncr_negotiate (np, tp);
7831 }
7832
7833 /*
7834 ** Download SCSI SCRIPTS to on-chip RAM if present,
7835 ** and start script processor.
7836 ** We do the download preferently from the CPU.
7837 ** For platforms that may not support PCI memory mapping,
7838 ** we use a simple SCRIPTS that performs MEMORY MOVEs.
7839 */
7840 if (np->base2_ba) {
7841 if (bootverbose)
7842 printk ("%s: Downloading SCSI SCRIPTS.\n",
7843 ncr_name(np));
7844 #ifdef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
7845 if (np->base2_ws == 8192)
7846 phys = NCB_SCRIPTH0_PHYS (np, start_ram64);
7847 else
7848 phys = NCB_SCRIPTH_PHYS (np, start_ram);
7849 #else
7850 if (np->base2_ws == 8192) {
7851 memcpy_to_pci(np->base2_va + 4096,
7852 np->scripth0, sizeof(struct scripth));
7853 OUTL (nc_mmws, np->scr_ram_seg);
7854 OUTL (nc_mmrs, np->scr_ram_seg);
7855 OUTL (nc_sfs, np->scr_ram_seg);
7856 phys = NCB_SCRIPTH_PHYS (np, start64);
7857 }
7858 else
7859 phys = NCB_SCRIPT_PHYS (np, init);
7860 memcpy_to_pci(np->base2_va, np->script0, sizeof(struct script));
7861 #endif /* SCSI_NCR_PCI_MEM_NOT_SUPPORTED */
7862 }
7863 else
7864 phys = NCB_SCRIPT_PHYS (np, init);
7865
7866 np->istat_sem = 0;
7867
7868 OUTL (nc_dsa, np->p_ncb);
7869 OUTL_DSP (phys);
7870 }
7871
7872 /*==========================================================
7873 **
7874 ** Prepare the negotiation values for wide and
7875 ** synchronous transfers.
7876 **
7877 **==========================================================
7878 */
7879
7880 static void ncr_negotiate (struct ncb* np, struct tcb* tp)
7881 {
7882 /*
7883 ** minsync unit is 4ns !
7884 */
7885
7886 u_long minsync = tp->usrsync;
7887
7888 /*
7889 ** SCSI bus mode limit
7890 */
7891
7892 if (np->scsi_mode && np->scsi_mode == SMODE_SE) {
7893 if (minsync < 12) minsync = 12;
7894 }
7895
7896 /*
7897 ** our limit ..
7898 */
7899
7900 if (minsync < np->minsync)
7901 minsync = np->minsync;
7902
7903 /*
7904 ** divider limit
7905 */
7906
7907 if (minsync > np->maxsync)
7908 minsync = 255;
7909
7910 tp->minsync = minsync;
7911 tp->maxoffs = (minsync<255 ? np->maxoffs : 0);
7912
7913 /*
7914 ** period=0: has to negotiate sync transfer
7915 */
7916
7917 tp->period=0;
7918
7919 /*
7920 ** widedone=0: has to negotiate wide transfer
7921 */
7922 tp->widedone=0;
7923 }
7924
7925 /*==========================================================
7926 **
7927 ** Get clock factor and sync divisor for a given
7928 ** synchronous factor period.
7929 ** Returns the clock factor (in sxfer) and scntl3
7930 ** synchronous divisor field.
7931 **
7932 **==========================================================
7933 */
7934
7935 static void ncr_getsync(ncb_p np, u_char sfac, u_char *fakp, u_char *scntl3p)
7936 {
7937 u_long clk = np->clock_khz; /* SCSI clock frequency in kHz */
7938 int div = np->clock_divn; /* Number of divisors supported */
7939 u_long fak; /* Sync factor in sxfer */
7940 u_long per; /* Period in tenths of ns */
7941 u_long kpc; /* (per * clk) */
7942
7943 /*
7944 ** Compute the synchronous period in tenths of nano-seconds
7945 ** from sfac.
7946 **
7947 ** Note, if sfac == 9, DT is being used. Double the period of 125
7948 ** to 250.
7949 */
7950 if (sfac <= 10) per = 250;
7951 else if (sfac == 11) per = 303;
7952 else if (sfac == 12) per = 500;
7953 else per = 40 * sfac;
7954
7955 /*
7956 ** Look for the greatest clock divisor that allows an
7957 ** input speed faster than the period.
7958 */
7959 kpc = per * clk;
7960 while (--div >= 0)
7961 if (kpc >= (div_10M[div] << 2)) break;
7962
7963 /*
7964 ** Calculate the lowest clock factor that allows an output
7965 ** speed not faster than the period.
7966 */
7967 fak = (kpc - 1) / div_10M[div] + 1;
7968
7969 #if 0 /* This optimization does not seem very useful */
7970
7971 per = (fak * div_10M[div]) / clk;
7972
7973 /*
7974 ** Why not to try the immediate lower divisor and to choose
7975 ** the one that allows the fastest output speed ?
7976 ** We dont want input speed too much greater than output speed.
7977 */
7978 if (div >= 1 && fak < 8) {
7979 u_long fak2, per2;
7980 fak2 = (kpc - 1) / div_10M[div-1] + 1;
7981 per2 = (fak2 * div_10M[div-1]) / clk;
7982 if (per2 < per && fak2 <= 8) {
7983 fak = fak2;
7984 per = per2;
7985 --div;
7986 }
7987 }
7988 #endif
7989
7990 if (fak < 4) fak = 4; /* Should never happen, too bad ... */
7991
7992 /*
7993 ** Compute and return sync parameters for the ncr
7994 */
7995 *fakp = fak - 4;
7996
7997 /*
7998 ** If sfac < 25, and 8xx parts, desire that the chip operate at
7999 ** least at Ultra speeds. Must set bit 7 of scntl3.
8000 ** For C1010, do not set this bit. If operating at Ultra3 speeds,
8001 ** set the U3EN bit instead.
8002 */
8003 if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
8004 (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)) {
8005 *scntl3p = (div+1) << 4;
8006 *fakp = 0;
8007 }
8008 else {
8009 *scntl3p = ((div+1) << 4) + (sfac < 25 ? 0x80 : 0);
8010 *fakp = fak - 4;
8011 }
8012 }
8013
8014 /*==========================================================
8015 **
8016 ** Utility routine to return the current bus width
8017 ** synchronous period and offset.
8018 ** Utilizes target sval, wval and uval
8019 **
8020 **==========================================================
8021 */
8022 static void ncr_get_xfer_info(ncb_p np, tcb_p tp, u_char *factor,
8023 u_char *offset, u_char *width)
8024 {
8025
8026 u_char idiv;
8027 u_long period;
8028
8029 *width = (tp->wval & EWS) ? 1 : 0;
8030
8031 if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
8032 (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66))
8033 *offset = (tp->sval & 0x3f);
8034 else
8035 *offset = (tp->sval & 0x1f);
8036
8037 /*
8038 * Midlayer signal to the driver that all of the scsi commands
8039 * for the integrity check have completed. Save the negotiated
8040 * parameters (extracted from sval, wval and uval).
8041 * See ncr_setsync for alg. details.
8042 */
8043
8044 idiv = (tp->wval>>4) & 0x07;
8045
8046 if ( *offset && idiv ) {
8047 if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
8048 (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)){
8049 if (tp->uval & 0x80)
8050 period = (2*div_10M[idiv-1])/np->clock_khz;
8051 else
8052 period = (4*div_10M[idiv-1])/np->clock_khz;
8053 }
8054 else
8055 period = (((tp->sval>>5)+4)*div_10M[idiv-1])/np->clock_khz;
8056 }
8057 else
8058 period = 0xffff;
8059
8060 if (period <= 125) *factor = 9;
8061 else if (period <= 250) *factor = 10;
8062 else if (period <= 303) *factor = 11;
8063 else if (period <= 500) *factor = 12;
8064 else *factor = (period + 40 - 1) / 40;
8065
8066 }
8067
8068
8069 /*==========================================================
8070 **
8071 ** Set actual values, sync status and patch all ccbs of
8072 ** a target according to new sync/wide agreement.
8073 **
8074 **==========================================================
8075 */
8076
8077 static void ncr_set_sync_wide_status (ncb_p np, u_char target)
8078 {
8079 ccb_p cp = np->ccbc;
8080 tcb_p tp = &np->target[target];
8081
8082 /*
8083 ** set actual value and sync_status
8084 **
8085 ** TEMP register contains current scripts address
8086 ** which is data type/direction/dependent.
8087 */
8088 OUTB (nc_sxfer, tp->sval);
8089 OUTB (nc_scntl3, tp->wval);
8090 if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
8091 (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66))
8092 OUTB (nc_scntl4, tp->uval);
8093
8094 /*
8095 ** patch ALL ccbs of this target.
8096 */
8097 for (cp = np->ccbc; cp; cp = cp->link_ccb) {
8098 if (cp->host_status == HS_IDLE)
8099 continue;
8100 if (cp->target != target)
8101 continue;
8102 cp->phys.select.sel_scntl3 = tp->wval;
8103 cp->phys.select.sel_sxfer = tp->sval;
8104 if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
8105 (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66))
8106 cp->phys.select.sel_scntl4 = tp->uval;
8107 };
8108 }
8109
8110 /*==========================================================
8111 **
8112 ** Switch sync mode for current job and it's target
8113 **
8114 **==========================================================
8115 */
8116
8117 static void ncr_setsync (ncb_p np, ccb_p cp, u_char scntl3, u_char sxfer,
8118 u_char scntl4)
8119 {
8120 tcb_p tp;
8121 u_char target = INB (nc_sdid) & 0x0f;
8122 u_char idiv;
8123 u_char offset;
8124
8125 assert (cp);
8126 if (!cp) return;
8127
8128 assert (target == (cp->target & 0xf));
8129
8130 tp = &np->target[target];
8131
8132 if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
8133 (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)) {
8134 offset = sxfer & 0x3f; /* bits 5-0 */
8135 scntl3 = (scntl3 & 0xf0) | (tp->wval & EWS);
8136 scntl4 = (scntl4 & 0x80);
8137 }
8138 else {
8139 offset = sxfer & 0x1f; /* bits 4-0 */
8140 if (!scntl3 || !offset)
8141 scntl3 = np->rv_scntl3;
8142
8143 scntl3 = (scntl3 & 0xf0) | (tp->wval & EWS) |
8144 (np->rv_scntl3 & 0x07);
8145 }
8146
8147
8148 /*
8149 ** Deduce the value of controller sync period from scntl3.
8150 ** period is in tenths of nano-seconds.
8151 */
8152
8153 idiv = ((scntl3 >> 4) & 0x7);
8154 if ( offset && idiv) {
8155 if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
8156 (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)) {
8157 /* Note: If extra data hold clocks are used,
8158 * the formulas below must be modified.
8159 * When scntl4 == 0, ST mode.
8160 */
8161 if (scntl4 & 0x80)
8162 tp->period = (2*div_10M[idiv-1])/np->clock_khz;
8163 else
8164 tp->period = (4*div_10M[idiv-1])/np->clock_khz;
8165 }
8166 else
8167 tp->period = (((sxfer>>5)+4)*div_10M[idiv-1])/np->clock_khz;
8168 }
8169 else
8170 tp->period = 0xffff;
8171
8172
8173 /*
8174 ** Stop there if sync parameters are unchanged
8175 */
8176 if (tp->sval == sxfer && tp->wval == scntl3 && tp->uval == scntl4) return;
8177 tp->sval = sxfer;
8178 tp->wval = scntl3;
8179 tp->uval = scntl4;
8180
8181 /*
8182 ** Bells and whistles ;-)
8183 ** Donnot announce negotiations due to auto-sense,
8184 ** unless user really want us to be verbose. :)
8185 */
8186 if ( bootverbose < 2 && (cp->host_flags & HF_AUTO_SENSE))
8187 goto next;
8188 PRINT_TARGET(np, target);
8189 if (offset) {
8190 unsigned f10 = 100000 << (tp->widedone ? tp->widedone -1 : 0);
8191 unsigned mb10 = (f10 + tp->period/2) / tp->period;
8192 char *scsi;
8193
8194 /*
8195 ** Disable extended Sreq/Sack filtering
8196 */
8197 if ((tp->period <= 2000) &&
8198 (np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
8199 (np->device_id != PCI_DEVICE_ID_LSI_53C1010_66))
8200 OUTOFFB (nc_stest2, EXT);
8201
8202 /*
8203 ** Bells and whistles ;-)
8204 */
8205 if (tp->period < 250) scsi = "FAST-80";
8206 else if (tp->period < 500) scsi = "FAST-40";
8207 else if (tp->period < 1000) scsi = "FAST-20";
8208 else if (tp->period < 2000) scsi = "FAST-10";
8209 else scsi = "FAST-5";
8210
8211 printk ("%s %sSCSI %d.%d MB/s (%d.%d ns, offset %d)\n", scsi,
8212 tp->widedone > 1 ? "WIDE " : "",
8213 mb10 / 10, mb10 % 10, tp->period / 10, tp->period % 10,
8214 offset);
8215 } else
8216 printk ("%sasynchronous.\n", tp->widedone > 1 ? "wide " : "");
8217 next:
8218 /*
8219 ** set actual value and sync_status
8220 ** patch ALL ccbs of this target.
8221 */
8222 ncr_set_sync_wide_status(np, target);
8223 }
8224
8225
8226 /*==========================================================
8227 **
8228 ** Switch wide mode for current job and it's target
8229 ** SCSI specs say: a SCSI device that accepts a WDTR
8230 ** message shall reset the synchronous agreement to
8231 ** asynchronous mode.
8232 **
8233 **==========================================================
8234 */
8235
8236 static void ncr_setwide (ncb_p np, ccb_p cp, u_char wide, u_char ack)
8237 {
8238 u_short target = INB (nc_sdid) & 0x0f;
8239 tcb_p tp;
8240 u_char scntl3;
8241 u_char sxfer;
8242
8243 assert (cp);
8244 if (!cp) return;
8245
8246 assert (target == (cp->target & 0xf));
8247
8248 tp = &np->target[target];
8249 tp->widedone = wide+1;
8250 scntl3 = (tp->wval & (~EWS)) | (wide ? EWS : 0);
8251
8252 sxfer = ack ? 0 : tp->sval;
8253
8254 /*
8255 ** Stop there if sync/wide parameters are unchanged
8256 */
8257 if (tp->sval == sxfer && tp->wval == scntl3) return;
8258 tp->sval = sxfer;
8259 tp->wval = scntl3;
8260
8261 /*
8262 ** Bells and whistles ;-)
8263 */
8264 if (bootverbose >= 2) {
8265 PRINT_TARGET(np, target);
8266 if (scntl3 & EWS)
8267 printk ("WIDE SCSI (16 bit) enabled.\n");
8268 else
8269 printk ("WIDE SCSI disabled.\n");
8270 }
8271
8272 /*
8273 ** set actual value and sync_status
8274 ** patch ALL ccbs of this target.
8275 */
8276 ncr_set_sync_wide_status(np, target);
8277 }
8278
8279
8280 /*==========================================================
8281 **
8282 ** Switch sync/wide mode for current job and it's target
8283 ** PPR negotiations only
8284 **
8285 **==========================================================
8286 */
8287
8288 static void ncr_setsyncwide (ncb_p np, ccb_p cp, u_char scntl3, u_char sxfer,
8289 u_char scntl4, u_char wide)
8290 {
8291 tcb_p tp;
8292 u_char target = INB (nc_sdid) & 0x0f;
8293 u_char idiv;
8294 u_char offset;
8295
8296 assert (cp);
8297 if (!cp) return;
8298
8299 assert (target == (cp->target & 0xf));
8300
8301 tp = &np->target[target];
8302 tp->widedone = wide+1;
8303
8304 if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
8305 (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)) {
8306 offset = sxfer & 0x3f; /* bits 5-0 */
8307 scntl3 = (scntl3 & 0xf0) | (wide ? EWS : 0);
8308 scntl4 = (scntl4 & 0x80);
8309 }
8310 else {
8311 offset = sxfer & 0x1f; /* bits 4-0 */
8312 if (!scntl3 || !offset)
8313 scntl3 = np->rv_scntl3;
8314
8315 scntl3 = (scntl3 & 0xf0) | (wide ? EWS : 0) |
8316 (np->rv_scntl3 & 0x07);
8317 }
8318
8319
8320 /*
8321 ** Deduce the value of controller sync period from scntl3.
8322 ** period is in tenths of nano-seconds.
8323 */
8324
8325 idiv = ((scntl3 >> 4) & 0x7);
8326 if ( offset && idiv) {
8327 if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
8328 (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)) {
8329 /* Note: If extra data hold clocks are used,
8330 * the formulas below must be modified.
8331 * When scntl4 == 0, ST mode.
8332 */
8333 if (scntl4 & 0x80)
8334 tp->period = (2*div_10M[idiv-1])/np->clock_khz;
8335 else
8336 tp->period = (4*div_10M[idiv-1])/np->clock_khz;
8337 }
8338 else
8339 tp->period = (((sxfer>>5)+4)*div_10M[idiv-1])/np->clock_khz;
8340 }
8341 else
8342 tp->period = 0xffff;
8343
8344
8345 /*
8346 ** Stop there if sync parameters are unchanged
8347 */
8348 if (tp->sval == sxfer && tp->wval == scntl3 && tp->uval == scntl4) return;
8349 tp->sval = sxfer;
8350 tp->wval = scntl3;
8351 tp->uval = scntl4;
8352
8353 /*
8354 ** Bells and whistles ;-)
8355 ** Donnot announce negotiations due to auto-sense,
8356 ** unless user really want us to be verbose. :)
8357 */
8358 if ( bootverbose < 2 && (cp->host_flags & HF_AUTO_SENSE))
8359 goto next;
8360 PRINT_TARGET(np, target);
8361 if (offset) {
8362 unsigned f10 = 100000 << (tp->widedone ? tp->widedone -1 : 0);
8363 unsigned mb10 = (f10 + tp->period/2) / tp->period;
8364 char *scsi;
8365
8366 /*
8367 ** Disable extended Sreq/Sack filtering
8368 */
8369 if ((tp->period <= 2000) &&
8370 (np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
8371 (np->device_id != PCI_DEVICE_ID_LSI_53C1010_66))
8372 OUTOFFB (nc_stest2, EXT);
8373
8374 /*
8375 ** Bells and whistles ;-)
8376 */
8377 if (tp->period < 250) scsi = "FAST-80";
8378 else if (tp->period < 500) scsi = "FAST-40";
8379 else if (tp->period < 1000) scsi = "FAST-20";
8380 else if (tp->period < 2000) scsi = "FAST-10";
8381 else scsi = "FAST-5";
8382
8383 printk ("%s %sSCSI %d.%d MB/s (%d.%d ns, offset %d)\n", scsi,
8384 tp->widedone > 1 ? "WIDE " : "",
8385 mb10 / 10, mb10 % 10, tp->period / 10, tp->period % 10,
8386 offset);
8387 } else
8388 printk ("%sasynchronous.\n", tp->widedone > 1 ? "wide " : "");
8389 next:
8390 /*
8391 ** set actual value and sync_status
8392 ** patch ALL ccbs of this target.
8393 */
8394 ncr_set_sync_wide_status(np, target);
8395 }
8396
8397
8398
8399
8400 /*==========================================================
8401 **
8402 ** Switch tagged mode for a target.
8403 **
8404 **==========================================================
8405 */
8406
8407 static void ncr_setup_tags (ncb_p np, u_char tn, u_char ln)
8408 {
8409 tcb_p tp = &np->target[tn];
8410 lcb_p lp = ncr_lp(np, tp, ln);
8411 u_short reqtags, maxdepth;
8412
8413 /*
8414 ** Just in case ...
8415 */
8416 if ((!tp) || (!lp))
8417 return;
8418
8419 /*
8420 ** If SCSI device queue depth is not yet set, leave here.
8421 */
8422 if (!lp->scdev_depth)
8423 return;
8424
8425 /*
8426 ** Donnot allow more tags than the SCSI driver can queue
8427 ** for this device.
8428 ** Donnot allow more tags than we can handle.
8429 */
8430 maxdepth = lp->scdev_depth;
8431 if (maxdepth > lp->maxnxs) maxdepth = lp->maxnxs;
8432 if (lp->maxtags > maxdepth) lp->maxtags = maxdepth;
8433 if (lp->numtags > maxdepth) lp->numtags = maxdepth;
8434
8435 /*
8436 ** only devices conformant to ANSI Version >= 2
8437 ** only devices capable of tagged commands
8438 ** only if enabled by user ..
8439 */
8440 if ((lp->inq_byte7 & INQ7_QUEUE) && lp->numtags > 1) {
8441 reqtags = lp->numtags;
8442 } else {
8443 reqtags = 1;
8444 };
8445
8446 /*
8447 ** Update max number of tags
8448 */
8449 lp->numtags = reqtags;
8450 if (lp->numtags > lp->maxtags)
8451 lp->maxtags = lp->numtags;
8452
8453 /*
8454 ** If we want to switch tag mode, we must wait
8455 ** for no CCB to be active.
8456 */
8457 if (reqtags > 1 && lp->usetags) { /* Stay in tagged mode */
8458 if (lp->queuedepth == reqtags) /* Already announced */
8459 return;
8460 lp->queuedepth = reqtags;
8461 }
8462 else if (reqtags <= 1 && !lp->usetags) { /* Stay in untagged mode */
8463 lp->queuedepth = reqtags;
8464 return;
8465 }
8466 else { /* Want to switch tag mode */
8467 if (lp->busyccbs) /* If not yet safe, return */
8468 return;
8469 lp->queuedepth = reqtags;
8470 lp->usetags = reqtags > 1 ? 1 : 0;
8471 }
8472
8473 /*
8474 ** Patch the lun mini-script, according to tag mode.
8475 */
8476 lp->resel_task = lp->usetags?
8477 cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_tag)) :
8478 cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_notag));
8479
8480 /*
8481 ** Announce change to user.
8482 */
8483 if (bootverbose) {
8484 PRINT_LUN(np, tn, ln);
8485 if (lp->usetags)
8486 printk("tagged command queue depth set to %d\n", reqtags);
8487 else
8488 printk("tagged command queueing disabled\n");
8489 }
8490 }
8491
8492 /*----------------------------------------------------
8493 **
8494 ** handle user commands
8495 **
8496 **----------------------------------------------------
8497 */
8498
8499 #ifdef SCSI_NCR_USER_COMMAND_SUPPORT
8500
8501 static void ncr_usercmd (ncb_p np)
8502 {
8503 u_char t;
8504 tcb_p tp;
8505 int ln;
8506 u_long size;
8507
8508 switch (np->user.cmd) {
8509 case 0: return;
8510
8511 case UC_SETDEBUG:
8512 #ifdef SCSI_NCR_DEBUG_INFO_SUPPORT
8513 ncr_debug = np->user.data;
8514 #endif
8515 break;
8516
8517 case UC_SETORDER:
8518 np->order = np->user.data;
8519 break;
8520
8521 case UC_SETVERBOSE:
8522 np->verbose = np->user.data;
8523 break;
8524
8525 default:
8526 /*
8527 ** We assume that other commands apply to targets.
8528 ** This should always be the case and avoid the below
8529 ** 4 lines to be repeated 5 times.
8530 */
8531 for (t = 0; t < MAX_TARGET; t++) {
8532 if (!((np->user.target >> t) & 1))
8533 continue;
8534 tp = &np->target[t];
8535
8536 switch (np->user.cmd) {
8537
8538 case UC_SETSYNC:
8539 tp->usrsync = np->user.data;
8540 ncr_negotiate (np, tp);
8541 break;
8542
8543 case UC_SETWIDE:
8544 size = np->user.data;
8545 if (size > np->maxwide)
8546 size=np->maxwide;
8547 tp->usrwide = size;
8548 ncr_negotiate (np, tp);
8549 break;
8550
8551 case UC_SETTAGS:
8552 tp->usrtags = np->user.data;
8553 for (ln = 0; ln < MAX_LUN; ln++) {
8554 lcb_p lp;
8555 lp = ncr_lp(np, tp, ln);
8556 if (!lp)
8557 continue;
8558 lp->numtags = np->user.data;
8559 lp->maxtags = lp->numtags;
8560 ncr_setup_tags (np, t, ln);
8561 }
8562 break;
8563
8564 case UC_RESETDEV:
8565 tp->to_reset = 1;
8566 np->istat_sem = SEM;
8567 OUTB (nc_istat, SIGP|SEM);
8568 break;
8569
8570 case UC_CLEARDEV:
8571 for (ln = 0; ln < MAX_LUN; ln++) {
8572 lcb_p lp;
8573 lp = ncr_lp(np, tp, ln);
8574 if (lp)
8575 lp->to_clear = 1;
8576 }
8577 np->istat_sem = SEM;
8578 OUTB (nc_istat, SIGP|SEM);
8579 break;
8580
8581 case UC_SETFLAG:
8582 tp->usrflag = np->user.data;
8583 break;
8584 }
8585 }
8586 break;
8587 }
8588 np->user.cmd=0;
8589 }
8590 #endif
8591
8592 /*==========================================================
8593 **
8594 **
8595 ** ncr timeout handler.
8596 **
8597 **
8598 **==========================================================
8599 **
8600 ** Misused to keep the driver running when
8601 ** interrupts are not configured correctly.
8602 **
8603 **----------------------------------------------------------
8604 */
8605
8606 static void ncr_timeout (ncb_p np)
8607 {
8608 u_long thistime = ktime_get(0);
8609
8610 /*
8611 ** If release process in progress, let's go
8612 ** Set the release stage from 1 to 2 to synchronize
8613 ** with the release process.
8614 */
8615
8616 if (np->release_stage) {
8617 if (np->release_stage == 1) np->release_stage = 2;
8618 return;
8619 }
8620
8621 #ifdef SCSI_NCR_PCIQ_BROKEN_INTR
8622 np->timer.expires = ktime_get((HZ+9)/10);
8623 #else
8624 np->timer.expires = ktime_get(SCSI_NCR_TIMER_INTERVAL);
8625 #endif
8626 add_timer(&np->timer);
8627
8628 /*
8629 ** If we are resetting the ncr, wait for settle_time before
8630 ** clearing it. Then command processing will be resumed.
8631 */
8632 if (np->settle_time) {
8633 if (np->settle_time <= thistime) {
8634 if (bootverbose > 1)
8635 printk("%s: command processing resumed\n", ncr_name(np));
8636 np->settle_time = 0;
8637 requeue_waiting_list(np);
8638 }
8639 return;
8640 }
8641
8642 /*
8643 ** Nothing to do for now, but that may come.
8644 */
8645 if (np->lasttime + 4*HZ < thistime) {
8646 np->lasttime = thistime;
8647 }
8648
8649 #ifdef SCSI_NCR_PCIQ_MAY_MISS_COMPLETIONS
8650 /*
8651 ** Some way-broken PCI bridges may lead to
8652 ** completions being lost when the clearing
8653 ** of the INTFLY flag by the CPU occurs
8654 ** concurrently with the chip raising this flag.
8655 ** If this ever happen, lost completions will
8656 ** be reaped here.
8657 */
8658 ncr_wakeup_done(np);
8659 #endif
8660
8661 #ifdef SCSI_NCR_PCIQ_BROKEN_INTR
8662 if (INB(nc_istat) & (INTF|SIP|DIP)) {
8663
8664 /*
8665 ** Process pending interrupts.
8666 */
8667 if (DEBUG_FLAGS & DEBUG_TINY) printk ("{");
8668 ncr_exception (np);
8669 if (DEBUG_FLAGS & DEBUG_TINY) printk ("}");
8670 }
8671 #endif /* SCSI_NCR_PCIQ_BROKEN_INTR */
8672 }
8673
8674 /*==========================================================
8675 **
8676 ** log message for real hard errors
8677 **
8678 ** "ncr0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc)."
8679 ** " reg: r0 r1 r2 r3 r4 r5 r6 ..... rf."
8680 **
8681 ** exception register:
8682 ** ds: dstat
8683 ** si: sist
8684 **
8685 ** SCSI bus lines:
8686 ** so: control lines as driver by NCR.
8687 ** si: control lines as seen by NCR.
8688 ** sd: scsi data lines as seen by NCR.
8689 **
8690 ** wide/fastmode:
8691 ** sxfer: (see the manual)
8692 ** scntl3: (see the manual)
8693 **
8694 ** current script command:
8695 ** dsp: script address (relative to start of script).
8696 ** dbc: first word of script command.
8697 **
8698 ** First 24 register of the chip:
8699 ** r0..rf
8700 **
8701 **==========================================================
8702 */
8703
8704 static void ncr_log_hard_error(ncb_p np, u_short sist, u_char dstat)
8705 {
8706 u_int32 dsp;
8707 int script_ofs;
8708 int script_size;
8709 char *script_name;
8710 u_char *script_base;
8711 int i;
8712
8713 dsp = INL (nc_dsp);
8714
8715 if (dsp > np->p_script && dsp <= np->p_script + sizeof(struct script)) {
8716 script_ofs = dsp - np->p_script;
8717 script_size = sizeof(struct script);
8718 script_base = (u_char *) np->script0;
8719 script_name = "script";
8720 }
8721 else if (np->p_scripth < dsp &&
8722 dsp <= np->p_scripth + sizeof(struct scripth)) {
8723 script_ofs = dsp - np->p_scripth;
8724 script_size = sizeof(struct scripth);
8725 script_base = (u_char *) np->scripth0;
8726 script_name = "scripth";
8727 } else {
8728 script_ofs = dsp;
8729 script_size = 0;
8730 script_base = 0;
8731 script_name = "mem";
8732 }
8733
8734 printk ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n",
8735 ncr_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist,
8736 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl), (unsigned)INB (nc_sbdl),
8737 (unsigned)INB (nc_sxfer),(unsigned)INB (nc_scntl3), script_name, script_ofs,
8738 (unsigned)INL (nc_dbc));
8739
8740 if (((script_ofs & 3) == 0) &&
8741 (unsigned)script_ofs < script_size) {
8742 printk ("%s: script cmd = %08x\n", ncr_name(np),
8743 scr_to_cpu((int) *(ncrcmd *)(script_base + script_ofs)));
8744 }
8745
8746 printk ("%s: regdump:", ncr_name(np));
8747 for (i=0; i<24;i++)
8748 printk (" %02x", (unsigned)INB_OFF(i));
8749 printk (".\n");
8750 }
8751
8752 /*============================================================
8753 **
8754 ** ncr chip exception handler.
8755 **
8756 **============================================================
8757 **
8758 ** In normal situations, interrupt conditions occur one at
8759 ** a time. But when something bad happens on the SCSI BUS,
8760 ** the chip may raise several interrupt flags before
8761 ** stopping and interrupting the CPU. The additionnal
8762 ** interrupt flags are stacked in some extra registers
8763 ** after the SIP and/or DIP flag has been raised in the
8764 ** ISTAT. After the CPU has read the interrupt condition
8765 ** flag from SIST or DSTAT, the chip unstacks the other
8766 ** interrupt flags and sets the corresponding bits in
8767 ** SIST or DSTAT. Since the chip starts stacking once the
8768 ** SIP or DIP flag is set, there is a small window of time
8769 ** where the stacking does not occur.
8770 **
8771 ** Typically, multiple interrupt conditions may happen in
8772 ** the following situations:
8773 **
8774 ** - SCSI parity error + Phase mismatch (PAR|MA)
8775 ** When an parity error is detected in input phase
8776 ** and the device switches to msg-in phase inside a
8777 ** block MOV.
8778 ** - SCSI parity error + Unexpected disconnect (PAR|UDC)
8779 ** When a stupid device does not want to handle the
8780 ** recovery of an SCSI parity error.
8781 ** - Some combinations of STO, PAR, UDC, ...
8782 ** When using non compliant SCSI stuff, when user is
8783 ** doing non compliant hot tampering on the BUS, when
8784 ** something really bad happens to a device, etc ...
8785 **
8786 ** The heuristic suggested by SYMBIOS to handle
8787 ** multiple interrupts is to try unstacking all
8788 ** interrupts conditions and to handle them on some
8789 ** priority based on error severity.
8790 ** This will work when the unstacking has been
8791 ** successful, but we cannot be 100 % sure of that,
8792 ** since the CPU may have been faster to unstack than
8793 ** the chip is able to stack. Hmmm ... But it seems that
8794 ** such a situation is very unlikely to happen.
8795 **
8796 ** If this happen, for example STO catched by the CPU
8797 ** then UDC happenning before the CPU have restarted
8798 ** the SCRIPTS, the driver may wrongly complete the
8799 ** same command on UDC, since the SCRIPTS didn't restart
8800 ** and the DSA still points to the same command.
8801 ** We avoid this situation by setting the DSA to an
8802 ** invalid value when the CCB is completed and before
8803 ** restarting the SCRIPTS.
8804 **
8805 ** Another issue is that we need some section of our
8806 ** recovery procedures to be somehow uninterruptible and
8807 ** that the SCRIPTS processor does not provides such a
8808 ** feature. For this reason, we handle recovery preferently
8809 ** from the C code and check against some SCRIPTS
8810 ** critical sections from the C code.
8811 **
8812 ** Hopefully, the interrupt handling of the driver is now
8813 ** able to resist to weird BUS error conditions, but donnot
8814 ** ask me for any guarantee that it will never fail. :-)
8815 ** Use at your own decision and risk.
8816 **
8817 **============================================================
8818 */
8819
8820 void ncr_exception (ncb_p np)
8821 {
8822 u_char istat, istatc;
8823 u_char dstat;
8824 u_short sist;
8825 int i;
8826
8827 /*
8828 ** interrupt on the fly ?
8829 **
8830 ** A `dummy read' is needed to ensure that the
8831 ** clear of the INTF flag reaches the device
8832 ** before the scanning of the DONE queue.
8833 */
8834 istat = INB (nc_istat);
8835 if (istat & INTF) {
8836 OUTB (nc_istat, (istat & SIGP) | INTF | np->istat_sem);
8837 istat = INB (nc_istat); /* DUMMY READ */
8838 if (DEBUG_FLAGS & DEBUG_TINY) printk ("F ");
8839 (void)ncr_wakeup_done (np);
8840 };
8841
8842 if (!(istat & (SIP|DIP)))
8843 return;
8844
8845 #if 0 /* We should never get this one */
8846 if (istat & CABRT)
8847 OUTB (nc_istat, CABRT);
8848 #endif
8849
8850 /*
8851 ** Steinbach's Guideline for Systems Programming:
8852 ** Never test for an error condition you don't know how to handle.
8853 */
8854
8855 /*========================================================
8856 ** PAR and MA interrupts may occur at the same time,
8857 ** and we need to know of both in order to handle
8858 ** this situation properly. We try to unstack SCSI
8859 ** interrupts for that reason. BTW, I dislike a LOT
8860 ** such a loop inside the interrupt routine.
8861 ** Even if DMA interrupt stacking is very unlikely to
8862 ** happen, we also try unstacking these ones, since
8863 ** this has no performance impact.
8864 **=========================================================
8865 */
8866 sist = 0;
8867 dstat = 0;
8868 istatc = istat;
8869 do {
8870 if (istatc & SIP)
8871 sist |= INW (nc_sist);
8872 if (istatc & DIP)
8873 dstat |= INB (nc_dstat);
8874 istatc = INB (nc_istat);
8875 istat |= istatc;
8876 } while (istatc & (SIP|DIP));
8877
8878 if (DEBUG_FLAGS & DEBUG_TINY)
8879 printk ("<%d|%x:%x|%x:%x>",
8880 (int)INB(nc_scr0),
8881 dstat,sist,
8882 (unsigned)INL(nc_dsp),
8883 (unsigned)INL(nc_dbc));
8884
8885 /*
8886 ** On paper, a memory barrier may be needed here.
8887 ** And since we are paranoid ... :)
8888 */
8889 MEMORY_BARRIER();
8890
8891 /*========================================================
8892 ** First, interrupts we want to service cleanly.
8893 **
8894 ** Phase mismatch (MA) is the most frequent interrupt
8895 ** for chip earlier than the 896 and so we have to service
8896 ** it as quickly as possible.
8897 ** A SCSI parity error (PAR) may be combined with a phase
8898 ** mismatch condition (MA).
8899 ** Programmed interrupts (SIR) are used to call the C code
8900 ** from SCRIPTS.
8901 ** The single step interrupt (SSI) is not used in this
8902 ** driver.
8903 **=========================================================
8904 */
8905
8906 if (!(sist & (STO|GEN|HTH|SGE|UDC|SBMC|RST)) &&
8907 !(dstat & (MDPE|BF|ABRT|IID))) {
8908 if (sist & PAR) ncr_int_par (np, sist);
8909 else if (sist & MA) ncr_int_ma (np);
8910 else if (dstat & SIR) ncr_int_sir (np);
8911 else if (dstat & SSI) OUTONB_STD ();
8912 else goto unknown_int;
8913 return;
8914 };
8915
8916 /*========================================================
8917 ** Now, interrupts that donnot happen in normal
8918 ** situations and that we may need to recover from.
8919 **
8920 ** On SCSI RESET (RST), we reset everything.
8921 ** On SCSI BUS MODE CHANGE (SBMC), we complete all
8922 ** active CCBs with RESET status, prepare all devices
8923 ** for negotiating again and restart the SCRIPTS.
8924 ** On STO and UDC, we complete the CCB with the corres-
8925 ** ponding status and restart the SCRIPTS.
8926 **=========================================================
8927 */
8928
8929 if (sist & RST) {
8930 ncr_init (np, 1, bootverbose ? "scsi reset" : NULL, HS_RESET);
8931 return;
8932 };
8933
8934 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
8935 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
8936
8937 if (!(sist & (GEN|HTH|SGE)) &&
8938 !(dstat & (MDPE|BF|ABRT|IID))) {
8939 if (sist & SBMC) ncr_int_sbmc (np);
8940 else if (sist & STO) ncr_int_sto (np);
8941 else if (sist & UDC) ncr_int_udc (np);
8942 else goto unknown_int;
8943 return;
8944 };
8945
8946 /*=========================================================
8947 ** Now, interrupts we are not able to recover cleanly.
8948 **
8949 ** Do the register dump.
8950 ** Log message for hard errors.
8951 ** Reset everything.
8952 **=========================================================
8953 */
8954 if (ktime_exp(np->regtime)) {
8955 np->regtime = ktime_get(10*HZ);
8956 for (i = 0; i<sizeof(np->regdump); i++)
8957 ((char*)&np->regdump)[i] = INB_OFF(i);
8958 np->regdump.nc_dstat = dstat;
8959 np->regdump.nc_sist = sist;
8960 };
8961
8962 ncr_log_hard_error(np, sist, dstat);
8963
8964 if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
8965 (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)) {
8966 u_char ctest4_o, ctest4_m;
8967 u_char shadow;
8968
8969 /*
8970 * Get shadow register data
8971 * Write 1 to ctest4
8972 */
8973 ctest4_o = INB(nc_ctest4);
8974
8975 OUTB(nc_ctest4, ctest4_o | 0x10);
8976
8977 ctest4_m = INB(nc_ctest4);
8978 shadow = INW_OFF(0x42);
8979
8980 OUTB(nc_ctest4, ctest4_o);
8981
8982 printk("%s: ctest4/sist original 0x%x/0x%X mod: 0x%X/0x%x\n",
8983 ncr_name(np), ctest4_o, sist, ctest4_m, shadow);
8984 }
8985
8986 if ((sist & (GEN|HTH|SGE)) ||
8987 (dstat & (MDPE|BF|ABRT|IID))) {
8988 ncr_start_reset(np);
8989 return;
8990 };
8991
8992 unknown_int:
8993 /*=========================================================
8994 ** We just miss the cause of the interrupt. :(
8995 ** Print a message. The timeout will do the real work.
8996 **=========================================================
8997 */
8998 printk( "%s: unknown interrupt(s) ignored, "
8999 "ISTAT=0x%x DSTAT=0x%x SIST=0x%x\n",
9000 ncr_name(np), istat, dstat, sist);
9001 }
9002
9003
9004 /*==========================================================
9005 **
9006 ** generic recovery from scsi interrupt
9007 **
9008 **==========================================================
9009 **
9010 ** The doc says that when the chip gets an SCSI interrupt,
9011 ** it tries to stop in an orderly fashion, by completing
9012 ** an instruction fetch that had started or by flushing
9013 ** the DMA fifo for a write to memory that was executing.
9014 ** Such a fashion is not enough to know if the instruction
9015 ** that was just before the current DSP value has been
9016 ** executed or not.
9017 **
9018 ** There are 3 small SCRIPTS sections that deal with the
9019 ** start queue and the done queue that may break any
9020 ** assomption from the C code if we are interrupted
9021 ** inside, so we reset if it happens. Btw, since these
9022 ** SCRIPTS sections are executed while the SCRIPTS hasn't
9023 ** started SCSI operations, it is very unlikely to happen.
9024 **
9025 ** All the driver data structures are supposed to be
9026 ** allocated from the same 4 GB memory window, so there
9027 ** is a 1 to 1 relationship between DSA and driver data
9028 ** structures. Since we are careful :) to invalidate the
9029 ** DSA when we complete a command or when the SCRIPTS
9030 ** pushes a DSA into a queue, we can trust it when it
9031 ** points to a CCB.
9032 **
9033 **----------------------------------------------------------
9034 */
9035 static void ncr_recover_scsi_int (ncb_p np, u_char hsts)
9036 {
9037 u_int32 dsp = INL (nc_dsp);
9038 u_int32 dsa = INL (nc_dsa);
9039 ccb_p cp = ncr_ccb_from_dsa(np, dsa);
9040
9041 /*
9042 ** If we haven't been interrupted inside the SCRIPTS
9043 ** critical pathes, we can safely restart the SCRIPTS
9044 ** and trust the DSA value if it matches a CCB.
9045 */
9046 if ((!(dsp > NCB_SCRIPT_PHYS (np, getjob_begin) &&
9047 dsp < NCB_SCRIPT_PHYS (np, getjob_end) + 1)) &&
9048 (!(dsp > NCB_SCRIPT_PHYS (np, ungetjob) &&
9049 dsp < NCB_SCRIPT_PHYS (np, reselect) + 1)) &&
9050 (!(dsp > NCB_SCRIPTH_PHYS (np, sel_for_abort) &&
9051 dsp < NCB_SCRIPTH_PHYS (np, sel_for_abort_1) + 1)) &&
9052 (!(dsp > NCB_SCRIPT_PHYS (np, done) &&
9053 dsp < NCB_SCRIPT_PHYS (np, done_end) + 1))) {
9054 if (cp) {
9055 cp->host_status = hsts;
9056 ncr_complete (np, cp);
9057 }
9058 OUTL (nc_dsa, DSA_INVALID);
9059 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
9060 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
9061 OUTL_DSP (NCB_SCRIPT_PHYS (np, start));
9062 }
9063 else
9064 goto reset_all;
9065
9066 return;
9067
9068 reset_all:
9069 ncr_start_reset(np);
9070 }
9071
9072 /*==========================================================
9073 **
9074 ** ncr chip exception handler for selection timeout
9075 **
9076 **==========================================================
9077 **
9078 ** There seems to be a bug in the 53c810.
9079 ** Although a STO-Interrupt is pending,
9080 ** it continues executing script commands.
9081 ** But it will fail and interrupt (IID) on
9082 ** the next instruction where it's looking
9083 ** for a valid phase.
9084 **
9085 **----------------------------------------------------------
9086 */
9087
9088 void ncr_int_sto (ncb_p np)
9089 {
9090 u_int32 dsp = INL (nc_dsp);
9091
9092 if (DEBUG_FLAGS & DEBUG_TINY) printk ("T");
9093
9094 if (dsp == NCB_SCRIPT_PHYS (np, wf_sel_done) + 8 ||
9095 !(driver_setup.recovery & 1))
9096 ncr_recover_scsi_int(np, HS_SEL_TIMEOUT);
9097 else
9098 ncr_start_reset(np);
9099 }
9100
9101 /*==========================================================
9102 **
9103 ** ncr chip exception handler for unexpected disconnect
9104 **
9105 **==========================================================
9106 **
9107 **----------------------------------------------------------
9108 */
9109 void ncr_int_udc (ncb_p np)
9110 {
9111 u_int32 dsa = INL (nc_dsa);
9112 ccb_p cp = ncr_ccb_from_dsa(np, dsa);
9113
9114 /*
9115 * Fix Up. Some disks respond to a PPR negotation with
9116 * a bus free instead of a message reject.
9117 * Disable ppr negotiation if this is first time
9118 * tried ppr negotiation.
9119 */
9120 if (cp) {
9121 tcb_p tp = &np->target[cp->target];
9122 if (tp->ppr_negotiation == 1)
9123 tp->ppr_negotiation = 0;
9124 }
9125
9126 printk ("%s: unexpected disconnect\n", ncr_name(np));
9127 ncr_recover_scsi_int(np, HS_UNEXPECTED);
9128 }
9129
9130 /*==========================================================
9131 **
9132 ** ncr chip exception handler for SCSI bus mode change
9133 **
9134 **==========================================================
9135 **
9136 ** spi2-r12 11.2.3 says a transceiver mode change must
9137 ** generate a reset event and a device that detects a reset
9138 ** event shall initiate a hard reset. It says also that a
9139 ** device that detects a mode change shall set data transfer
9140 ** mode to eight bit asynchronous, etc...
9141 ** So, just resetting should be enough.
9142 **
9143 **
9144 **----------------------------------------------------------
9145 */
9146
9147 static void ncr_int_sbmc (ncb_p np)
9148 {
9149 u_char scsi_mode = INB (nc_stest4) & SMODE;
9150
9151 printk("%s: SCSI bus mode change from %x to %x.\n",
9152 ncr_name(np), np->scsi_mode, scsi_mode);
9153
9154 np->scsi_mode = scsi_mode;
9155
9156
9157 /*
9158 ** Suspend command processing for 1 second and
9159 ** reinitialize all except the chip.
9160 */
9161 np->settle_time = ktime_get(1*HZ);
9162 ncr_init (np, 0, bootverbose ? "scsi mode change" : NULL, HS_RESET);
9163 }
9164
9165 /*==========================================================
9166 **
9167 ** ncr chip exception handler for SCSI parity error.
9168 **
9169 **==========================================================
9170 **
9171 ** When the chip detects a SCSI parity error and is
9172 ** currently executing a (CH)MOV instruction, it does
9173 ** not interrupt immediately, but tries to finish the
9174 ** transfer of the current scatter entry before
9175 ** interrupting. The following situations may occur:
9176 **
9177 ** - The complete scatter entry has been transferred
9178 ** without the device having changed phase.
9179 ** The chip will then interrupt with the DSP pointing
9180 ** to the instruction that follows the MOV.
9181 **
9182 ** - A phase mismatch occurs before the MOV finished
9183 ** and phase errors are to be handled by the C code.
9184 ** The chip will then interrupt with both PAR and MA
9185 ** conditions set.
9186 **
9187 ** - A phase mismatch occurs before the MOV finished and
9188 ** phase errors are to be handled by SCRIPTS (895A or 896).
9189 ** The chip will load the DSP with the phase mismatch
9190 ** JUMP address and interrupt the host processor.
9191 **
9192 **----------------------------------------------------------
9193 */
9194
9195 static void ncr_int_par (ncb_p np, u_short sist)
9196 {
9197 u_char hsts = INB (HS_PRT);
9198 u_int32 dsp = INL (nc_dsp);
9199 u_int32 dbc = INL (nc_dbc);
9200 u_int32 dsa = INL (nc_dsa);
9201 u_char sbcl = INB (nc_sbcl);
9202 u_char cmd = dbc >> 24;
9203 int phase = cmd & 7;
9204 ccb_p cp = ncr_ccb_from_dsa(np, dsa);
9205
9206 printk("%s: SCSI parity error detected: SCR1=%d DBC=%x SBCL=%x\n",
9207 ncr_name(np), hsts, dbc, sbcl);
9208
9209 /*
9210 ** Check that the chip is connected to the SCSI BUS.
9211 */
9212 if (!(INB (nc_scntl1) & ISCON)) {
9213 if (!(driver_setup.recovery & 1)) {
9214 ncr_recover_scsi_int(np, HS_FAIL);
9215 return;
9216 }
9217 goto reset_all;
9218 }
9219
9220 /*
9221 ** If the nexus is not clearly identified, reset the bus.
9222 ** We will try to do better later.
9223 */
9224 if (!cp)
9225 goto reset_all;
9226
9227 /*
9228 ** Check instruction was a MOV, direction was INPUT and
9229 ** ATN is asserted.
9230 */
9231 if ((cmd & 0xc0) || !(phase & 1) || !(sbcl & 0x8))
9232 goto reset_all;
9233
9234 /*
9235 ** Keep track of the parity error.
9236 */
9237 OUTONB (HF_PRT, HF_EXT_ERR);
9238 cp->xerr_status |= XE_PARITY_ERR;
9239
9240 /*
9241 ** Prepare the message to send to the device.
9242 */
9243 np->msgout[0] = (phase == 7) ? M_PARITY : M_ID_ERROR;
9244
9245 #ifdef SCSI_NCR_INTEGRITY_CHECKING
9246 /*
9247 ** Save error message. For integrity check use only.
9248 */
9249 if (np->check_integrity)
9250 np->check_integ_par = np->msgout[0];
9251 #endif
9252
9253 /*
9254 ** If the old phase was DATA IN or DT DATA IN phase,
9255 ** we have to deal with the 3 situations described above.
9256 ** For other input phases (MSG IN and STATUS), the device
9257 ** must resend the whole thing that failed parity checking
9258 ** or signal error. So, jumping to dispatcher should be OK.
9259 */
9260 if ((phase == 1) || (phase == 5)) {
9261 /* Phase mismatch handled by SCRIPTS */
9262 if (dsp == NCB_SCRIPTH_PHYS (np, pm_handle))
9263 OUTL_DSP (dsp);
9264 /* Phase mismatch handled by the C code */
9265 else if (sist & MA)
9266 ncr_int_ma (np);
9267 /* No phase mismatch occurred */
9268 else {
9269 OUTL (nc_temp, dsp);
9270 OUTL_DSP (NCB_SCRIPT_PHYS (np, dispatch));
9271 }
9272 }
9273 else
9274 OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack));
9275 return;
9276
9277 reset_all:
9278 ncr_start_reset(np);
9279 return;
9280 }
9281
9282 /*==========================================================
9283 **
9284 **
9285 ** ncr chip exception handler for phase errors.
9286 **
9287 **
9288 **==========================================================
9289 **
9290 ** We have to construct a new transfer descriptor,
9291 ** to transfer the rest of the current block.
9292 **
9293 **----------------------------------------------------------
9294 */
9295
9296 static void ncr_int_ma (ncb_p np)
9297 {
9298 u_int32 dbc;
9299 u_int32 rest;
9300 u_int32 dsp;
9301 u_int32 dsa;
9302 u_int32 nxtdsp;
9303 u_int32 *vdsp;
9304 u_int32 oadr, olen;
9305 u_int32 *tblp;
9306 u_int32 newcmd;
9307 u_int delta;
9308 u_char cmd;
9309 u_char hflags, hflags0;
9310 struct pm_ctx *pm;
9311 ccb_p cp;
9312
9313 dsp = INL (nc_dsp);
9314 dbc = INL (nc_dbc);
9315 dsa = INL (nc_dsa);
9316
9317 cmd = dbc >> 24;
9318 rest = dbc & 0xffffff;
9319 delta = 0;
9320
9321 /*
9322 ** locate matching cp.
9323 */
9324 cp = ncr_ccb_from_dsa(np, dsa);
9325
9326 if (DEBUG_FLAGS & DEBUG_PHASE)
9327 printk("CCB = %2x %2x %2x %2x %2x %2x\n",
9328 cp->cmd->cmnd[0], cp->cmd->cmnd[1], cp->cmd->cmnd[2],
9329 cp->cmd->cmnd[3], cp->cmd->cmnd[4], cp->cmd->cmnd[5]);
9330
9331 /*
9332 ** Donnot take into account dma fifo and various buffers in
9333 ** INPUT phase since the chip flushes everything before
9334 ** raising the MA interrupt for interrupted INPUT phases.
9335 ** For DATA IN phase, we will check for the SWIDE later.
9336 */
9337 if ((cmd & 7) != 1 && (cmd & 7) != 5) {
9338 u_int32 dfifo;
9339 u_char ss0, ss2;
9340
9341 /*
9342 ** If C1010, DFBC contains number of bytes in DMA fifo.
9343 ** else read DFIFO, CTEST[4-6] using 1 PCI bus ownership.
9344 */
9345 if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
9346 (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66))
9347 delta = INL(nc_dfbc) & 0xffff;
9348 else {
9349 dfifo = INL(nc_dfifo);
9350
9351 /*
9352 ** Calculate remaining bytes in DMA fifo.
9353 ** C1010 - always large fifo, value in dfbc
9354 ** Otherwise, (CTEST5 = dfifo >> 16)
9355 */
9356 if (dfifo & (DFS << 16))
9357 delta = ((((dfifo >> 8) & 0x300) |
9358 (dfifo & 0xff)) - rest) & 0x3ff;
9359 else
9360 delta = ((dfifo & 0xff) - rest) & 0x7f;
9361
9362 /*
9363 ** The data in the dma fifo has not been
9364 ** transferred to the target -> add the amount
9365 ** to the rest and clear the data.
9366 ** Check the sstat2 register in case of wide
9367 ** transfer.
9368 */
9369
9370 }
9371
9372 rest += delta;
9373 ss0 = INB (nc_sstat0);
9374 if (ss0 & OLF) rest++;
9375 if ((np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
9376 (np->device_id != PCI_DEVICE_ID_LSI_53C1010_66) && (ss0 & ORF))
9377 rest++;
9378 if (cp && (cp->phys.select.sel_scntl3 & EWS)) {
9379 ss2 = INB (nc_sstat2);
9380 if (ss2 & OLF1) rest++;
9381 if ((np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
9382 (np->device_id != PCI_DEVICE_ID_LSI_53C1010_66) && (ss2 & ORF))
9383 rest++;
9384 };
9385
9386 /*
9387 ** Clear fifos.
9388 */
9389 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* dma fifo */
9390 OUTB (nc_stest3, TE|CSF); /* scsi fifo */
9391 }
9392
9393 /*
9394 ** log the information
9395 */
9396
9397 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
9398 printk ("P%x%x RL=%d D=%d ", cmd&7, INB(nc_sbcl)&7,
9399 (unsigned) rest, (unsigned) delta);
9400
9401 /*
9402 ** try to find the interrupted script command,
9403 ** and the address at which to continue.
9404 */
9405 vdsp = 0;
9406 nxtdsp = 0;
9407 if (dsp > np->p_script &&
9408 dsp <= np->p_script + sizeof(struct script)) {
9409 vdsp = (u_int32 *)((char*)np->script0 + (dsp-np->p_script-8));
9410 nxtdsp = dsp;
9411 }
9412 else if (dsp > np->p_scripth &&
9413 dsp <= np->p_scripth + sizeof(struct scripth)) {
9414 vdsp = (u_int32 *)((char*)np->scripth0 + (dsp-np->p_scripth-8));
9415 nxtdsp = dsp;
9416 }
9417
9418 /*
9419 ** log the information
9420 */
9421 if (DEBUG_FLAGS & DEBUG_PHASE) {
9422 printk ("\nCP=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
9423 cp, (unsigned)dsp, (unsigned)nxtdsp, vdsp, cmd);
9424 };
9425
9426 if (!vdsp) {
9427 printk ("%s: interrupted SCRIPT address not found.\n",
9428 ncr_name (np));
9429 goto reset_all;
9430 }
9431
9432 if (!cp) {
9433 printk ("%s: SCSI phase error fixup: CCB already dequeued.\n",
9434 ncr_name (np));
9435 goto reset_all;
9436 }
9437
9438 /*
9439 ** get old startaddress and old length.
9440 */
9441
9442 oadr = scr_to_cpu(vdsp[1]);
9443
9444 if (cmd & 0x10) { /* Table indirect */
9445 tblp = (u_int32 *) ((char*) &cp->phys + oadr);
9446 olen = scr_to_cpu(tblp[0]);
9447 oadr = scr_to_cpu(tblp[1]);
9448 } else {
9449 tblp = (u_int32 *) 0;
9450 olen = scr_to_cpu(vdsp[0]) & 0xffffff;
9451 };
9452
9453 if (DEBUG_FLAGS & DEBUG_PHASE) {
9454 printk ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
9455 (unsigned) (scr_to_cpu(vdsp[0]) >> 24),
9456 tblp,
9457 (unsigned) olen,
9458 (unsigned) oadr);
9459 };
9460
9461 /*
9462 ** check cmd against assumed interrupted script command.
9463 ** If dt data phase, the MOVE instruction hasn't bit 4 of
9464 ** the phase.
9465 */
9466
9467 if (((cmd & 2) ? cmd : (cmd & ~4)) != (scr_to_cpu(vdsp[0]) >> 24)) {
9468 PRINT_ADDR(cp->cmd);
9469 printk ("internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
9470 (unsigned)cmd, (unsigned)scr_to_cpu(vdsp[0]) >> 24);
9471
9472 goto reset_all;
9473 };
9474
9475 /*
9476 ** if old phase not dataphase, leave here.
9477 ** C/D line is low if data.
9478 */
9479
9480 if (cmd & 0x02) {
9481 PRINT_ADDR(cp->cmd);
9482 printk ("phase change %x-%x %d@%08x resid=%d.\n",
9483 cmd&7, INB(nc_sbcl)&7, (unsigned)olen,
9484 (unsigned)oadr, (unsigned)rest);
9485 goto unexpected_phase;
9486 };
9487
9488 /*
9489 ** Choose the correct PM save area.
9490 **
9491 ** Look at the PM_SAVE SCRIPT if you want to understand
9492 ** this stuff. The equivalent code is implemented in
9493 ** SCRIPTS for the 895A and 896 that are able to handle
9494 ** PM from the SCRIPTS processor.
9495 */
9496
9497 hflags0 = INB (HF_PRT);
9498 hflags = hflags0;
9499
9500 if (hflags & (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED)) {
9501 if (hflags & HF_IN_PM0)
9502 nxtdsp = scr_to_cpu(cp->phys.pm0.ret);
9503 else if (hflags & HF_IN_PM1)
9504 nxtdsp = scr_to_cpu(cp->phys.pm1.ret);
9505
9506 if (hflags & HF_DP_SAVED)
9507 hflags ^= HF_ACT_PM;
9508 }
9509
9510 if (!(hflags & HF_ACT_PM)) {
9511 pm = &cp->phys.pm0;
9512 newcmd = NCB_SCRIPT_PHYS(np, pm0_data);
9513 }
9514 else {
9515 pm = &cp->phys.pm1;
9516 newcmd = NCB_SCRIPT_PHYS(np, pm1_data);
9517 }
9518
9519 hflags &= ~(HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED);
9520 if (hflags != hflags0)
9521 OUTB (HF_PRT, hflags);
9522
9523 /*
9524 ** fillin the phase mismatch context
9525 */
9526
9527 pm->sg.addr = cpu_to_scr(oadr + olen - rest);
9528 pm->sg.size = cpu_to_scr(rest);
9529 pm->ret = cpu_to_scr(nxtdsp);
9530
9531 /*
9532 ** If we have a SWIDE,
9533 ** - prepare the address to write the SWIDE from SCRIPTS,
9534 ** - compute the SCRIPTS address to restart from,
9535 ** - move current data pointer context by one byte.
9536 */
9537 nxtdsp = NCB_SCRIPT_PHYS (np, dispatch);
9538 if ( ((cmd & 7) == 1 || (cmd & 7) == 5)
9539 && cp && (cp->phys.select.sel_scntl3 & EWS) &&
9540 (INB (nc_scntl2) & WSR)) {
9541 u32 tmp;
9542
9543 #ifdef SYM_DEBUG_PM_WITH_WSR
9544 PRINT_ADDR(cp);
9545 printk ("MA interrupt with WSR set - "
9546 "pm->sg.addr=%x - pm->sg.size=%d\n",
9547 pm->sg.addr, pm->sg.size);
9548 #endif
9549 /*
9550 * Set up the table indirect for the MOVE
9551 * of the residual byte and adjust the data
9552 * pointer context.
9553 */
9554 tmp = scr_to_cpu(pm->sg.addr);
9555 cp->phys.wresid.addr = cpu_to_scr(tmp);
9556 pm->sg.addr = cpu_to_scr(tmp + 1);
9557 tmp = scr_to_cpu(pm->sg.size);
9558 cp->phys.wresid.size = cpu_to_scr((tmp&0xff000000) | 1);
9559 pm->sg.size = cpu_to_scr(tmp - 1);
9560
9561 /*
9562 * If only the residual byte is to be moved,
9563 * no PM context is needed.
9564 */
9565 if ((tmp&0xffffff) == 1)
9566 newcmd = pm->ret;
9567
9568 /*
9569 * Prepare the address of SCRIPTS that will
9570 * move the residual byte to memory.
9571 */
9572 nxtdsp = NCB_SCRIPTH_PHYS (np, wsr_ma_helper);
9573 }
9574
9575 if (DEBUG_FLAGS & DEBUG_PHASE) {
9576 PRINT_ADDR(cp->cmd);
9577 printk ("PM %x %x %x / %x %x %x.\n",
9578 hflags0, hflags, newcmd,
9579 (unsigned)scr_to_cpu(pm->sg.addr),
9580 (unsigned)scr_to_cpu(pm->sg.size),
9581 (unsigned)scr_to_cpu(pm->ret));
9582 }
9583
9584 /*
9585 ** Restart the SCRIPTS processor.
9586 */
9587
9588 OUTL (nc_temp, newcmd);
9589 OUTL_DSP (nxtdsp);
9590 return;
9591
9592 /*
9593 ** Unexpected phase changes that occurs when the current phase
9594 ** is not a DATA IN or DATA OUT phase are due to error conditions.
9595 ** Such event may only happen when the SCRIPTS is using a
9596 ** multibyte SCSI MOVE.
9597 **
9598 ** Phase change Some possible cause
9599 **
9600 ** COMMAND --> MSG IN SCSI parity error detected by target.
9601 ** COMMAND --> STATUS Bad command or refused by target.
9602 ** MSG OUT --> MSG IN Message rejected by target.
9603 ** MSG OUT --> COMMAND Bogus target that discards extended
9604 ** negotiation messages.
9605 **
9606 ** The code below does not care of the new phase and so
9607 ** trusts the target. Why to annoy it ?
9608 ** If the interrupted phase is COMMAND phase, we restart at
9609 ** dispatcher.
9610 ** If a target does not get all the messages after selection,
9611 ** the code assumes blindly that the target discards extended
9612 ** messages and clears the negotiation status.
9613 ** If the target does not want all our response to negotiation,
9614 ** we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
9615 ** bloat for such a should_not_happen situation).
9616 ** In all other situation, we reset the BUS.
9617 ** Are these assumptions reasonnable ? (Wait and see ...)
9618 */
9619 unexpected_phase:
9620 dsp -= 8;
9621 nxtdsp = 0;
9622
9623 switch (cmd & 7) {
9624 case 2: /* COMMAND phase */
9625 nxtdsp = NCB_SCRIPT_PHYS (np, dispatch);
9626 break;
9627 #if 0
9628 case 3: /* STATUS phase */
9629 nxtdsp = NCB_SCRIPT_PHYS (np, dispatch);
9630 break;
9631 #endif
9632 case 6: /* MSG OUT phase */
9633 /*
9634 ** If the device may want to use untagged when we want
9635 ** tagged, we prepare an IDENTIFY without disc. granted,
9636 ** since we will not be able to handle reselect.
9637 ** Otherwise, we just don't care.
9638 */
9639 if (dsp == NCB_SCRIPT_PHYS (np, send_ident)) {
9640 if (cp->tag != NO_TAG && olen - rest <= 3) {
9641 cp->host_status = HS_BUSY;
9642 np->msgout[0] = M_IDENTIFY | cp->lun;
9643 nxtdsp = NCB_SCRIPTH_PHYS (np, ident_break_atn);
9644 }
9645 else
9646 nxtdsp = NCB_SCRIPTH_PHYS (np, ident_break);
9647 }
9648 else if (dsp == NCB_SCRIPTH_PHYS (np, send_wdtr) ||
9649 dsp == NCB_SCRIPTH_PHYS (np, send_sdtr) ||
9650 dsp == NCB_SCRIPTH_PHYS (np, send_ppr)) {
9651 nxtdsp = NCB_SCRIPTH_PHYS (np, nego_bad_phase);
9652 }
9653 break;
9654 #if 0
9655 case 7: /* MSG IN phase */
9656 nxtdsp = NCB_SCRIPT_PHYS (np, clrack);
9657 break;
9658 #endif
9659 }
9660
9661 if (nxtdsp) {
9662 OUTL_DSP (nxtdsp);
9663 return;
9664 }
9665
9666 reset_all:
9667 ncr_start_reset(np);
9668 }
9669
9670 /*==========================================================
9671 **
9672 ** ncr chip handler for QUEUE FULL and CHECK CONDITION
9673 **
9674 **==========================================================
9675 **
9676 ** On QUEUE FULL status, we set the actual tagged command
9677 ** queue depth to the number of disconnected CCBs that is
9678 ** hopefully a good value to avoid further QUEUE FULL.
9679 **
9680 ** On CHECK CONDITION or COMMAND TERMINATED, we use the
9681 ** CCB of the failed command for performing a REQUEST
9682 ** SENSE SCSI command.
9683 **
9684 ** We do not want to change the order commands will be
9685 ** actually queued to the device after we received a
9686 ** QUEUE FULL status. We also want to properly deal with
9687 ** contingent allegiance condition. For these reasons,
9688 ** we remove from the start queue all commands for this
9689 ** LUN that haven't been yet queued to the device and
9690 ** put them back in the correponding LUN queue, then
9691 ** requeue the CCB that failed in front of the LUN queue.
9692 ** I just hope this not to be performed too often. :)
9693 **
9694 ** If we are using IMMEDIATE ARBITRATION, we clear the
9695 ** IARB hint for every commands we encounter in order not
9696 ** to be stuck with a won arbitration and no job to queue
9697 ** to a device.
9698 **----------------------------------------------------------
9699 */
9700
9701 static void ncr_sir_to_redo(ncb_p np, int num, ccb_p cp)
9702 {
9703 Scsi_Cmnd *cmd = cp->cmd;
9704 tcb_p tp = &np->target[cp->target];
9705 lcb_p lp = ncr_lp(np, tp, cp->lun);
9706 ccb_p cp2;
9707 int busyccbs = 1;
9708 u_int32 startp;
9709 u_char s_status = INB (SS_PRT);
9710 int msglen;
9711 int i, j;
9712
9713
9714 /*
9715 ** If the LCB is not yet available, then only
9716 ** 1 IO is accepted, so we should have it.
9717 */
9718 if (!lp)
9719 goto next;
9720 /*
9721 ** Remove all CCBs queued to the chip for that LUN and put
9722 ** them back in the LUN CCB wait queue.
9723 */
9724 busyccbs = lp->queuedccbs;
9725 i = (INL (nc_scratcha) - np->p_squeue) / 4;
9726 j = i;
9727 while (i != np->squeueput) {
9728 cp2 = ncr_ccb_from_dsa(np, scr_to_cpu(np->squeue[i]));
9729 assert(cp2);
9730 #ifdef SCSI_NCR_IARB_SUPPORT
9731 /* IARB hints may not be relevant any more. Forget them. */
9732 cp2->host_flags &= ~HF_HINT_IARB;
9733 #endif
9734 if (cp2 && cp2->target == cp->target && cp2->lun == cp->lun) {
9735 xpt_remque(&cp2->link_ccbq);
9736 xpt_insque_head(&cp2->link_ccbq, &lp->wait_ccbq);
9737 --lp->queuedccbs;
9738 cp2->queued = 0;
9739 }
9740 else {
9741 if (i != j)
9742 np->squeue[j] = np->squeue[i];
9743 if ((j += 2) >= MAX_START*2) j = 0;
9744 }
9745 if ((i += 2) >= MAX_START*2) i = 0;
9746 }
9747 if (i != j) /* Copy back the idle task if needed */
9748 np->squeue[j] = np->squeue[i];
9749 np->squeueput = j; /* Update our current start queue pointer */
9750
9751 /*
9752 ** Requeue the interrupted CCB in front of the
9753 ** LUN CCB wait queue to preserve ordering.
9754 */
9755 xpt_remque(&cp->link_ccbq);
9756 xpt_insque_head(&cp->link_ccbq, &lp->wait_ccbq);
9757 --lp->queuedccbs;
9758 cp->queued = 0;
9759
9760 next:
9761
9762 #ifdef SCSI_NCR_IARB_SUPPORT
9763 /* IARB hint may not be relevant any more. Forget it. */
9764 cp->host_flags &= ~HF_HINT_IARB;
9765 if (np->last_cp)
9766 np->last_cp = 0;
9767 #endif
9768
9769 /*
9770 ** Now we can restart the SCRIPTS processor safely.
9771 */
9772 OUTL_DSP (NCB_SCRIPT_PHYS (np, start));
9773
9774 switch(s_status) {
9775 default:
9776 case S_BUSY:
9777 ncr_complete(np, cp);
9778 break;
9779 case S_QUEUE_FULL:
9780 if (!lp || !lp->queuedccbs) {
9781 ncr_complete(np, cp);
9782 break;
9783 }
9784 if (bootverbose >= 1) {
9785 PRINT_ADDR(cmd);
9786 printk ("QUEUE FULL! %d busy, %d disconnected CCBs\n",
9787 busyccbs, lp->queuedccbs);
9788 }
9789 /*
9790 ** Decrease number of tags to the number of
9791 ** disconnected commands.
9792 */
9793 if (lp->queuedccbs < lp->numtags) {
9794 lp->numtags = lp->queuedccbs;
9795 lp->num_good = 0;
9796 ncr_setup_tags (np, cp->target, cp->lun);
9797 }
9798 /*
9799 ** Repair the offending CCB.
9800 */
9801 cp->phys.header.savep = cp->startp;
9802 cp->phys.header.lastp = cp->lastp0;
9803 cp->host_status = HS_BUSY;
9804 cp->scsi_status = S_ILLEGAL;
9805 cp->xerr_status = 0;
9806 cp->extra_bytes = 0;
9807 cp->host_flags &= (HF_PM_TO_C|HF_DATA_IN);
9808
9809 break;
9810
9811 case S_TERMINATED:
9812 case S_CHECK_COND:
9813 /*
9814 ** If we were requesting sense, give up.
9815 */
9816 if (cp->host_flags & HF_AUTO_SENSE) {
9817 ncr_complete(np, cp);
9818 break;
9819 }
9820
9821 /*
9822 ** Save SCSI status and extended error.
9823 ** Compute the data residual now.
9824 */
9825 cp->sv_scsi_status = cp->scsi_status;
9826 cp->sv_xerr_status = cp->xerr_status;
9827 cp->resid = ncr_compute_residual(np, cp);
9828
9829 /*
9830 ** Device returned CHECK CONDITION status.
9831 ** Prepare all needed data strutures for getting
9832 ** sense data.
9833 */
9834
9835 /*
9836 ** identify message
9837 */
9838 cp->scsi_smsg2[0] = M_IDENTIFY | cp->lun;
9839 msglen = 1;
9840
9841 /*
9842 ** If we are currently using anything different from
9843 ** async. 8 bit data transfers with that target,
9844 ** start a negotiation, since the device may want
9845 ** to report us a UNIT ATTENTION condition due to
9846 ** a cause we currently ignore, and we donnot want
9847 ** to be stuck with WIDE and/or SYNC data transfer.
9848 **
9849 ** cp->nego_status is filled by ncr_prepare_nego().
9850 **
9851 ** Do NOT negotiate if performing integrity check
9852 ** or if integrity check has completed, all check
9853 ** conditions will have been cleared.
9854 */
9855
9856 #ifdef SCSI_NCR_INTEGRITY_CHECKING
9857 if (DEBUG_FLAGS & DEBUG_IC) {
9858 printk("%s: ncr_sir_to_redo: ic_done %2X, in_progress %2X\n",
9859 ncr_name(np), tp->ic_done, cp->cmd->ic_in_progress);
9860 }
9861
9862 /*
9863 ** If parity error during integrity check,
9864 ** set the target width to narrow. Otherwise,
9865 ** do not negotiate on a request sense.
9866 */
9867 if ( np->check_integ_par && np->check_integrity
9868 && cp->cmd->ic_in_progress ) {
9869 cp->nego_status = 0;
9870 msglen +=
9871 ncr_ic_nego (np, cp, cmd ,&cp->scsi_smsg2[msglen]);
9872 }
9873
9874 if (!np->check_integrity ||
9875 (np->check_integrity &&
9876 (!cp->cmd->ic_in_progress && !tp->ic_done)) ) {
9877 ncr_negotiate(np, tp);
9878 cp->nego_status = 0;
9879 {
9880 u_char sync_offset;
9881 if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
9882 (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66))
9883 sync_offset = tp->sval & 0x3f;
9884 else
9885 sync_offset = tp->sval & 0x1f;
9886
9887 if ((tp->wval & EWS) || sync_offset)
9888 msglen +=
9889 ncr_prepare_nego (np, cp, &cp->scsi_smsg2[msglen]);
9890 }
9891
9892 }
9893 #else
9894 ncr_negotiate(np, tp);
9895 cp->nego_status = 0;
9896 if ((tp->wval & EWS) || (tp->sval & 0x1f))
9897 msglen +=
9898 ncr_prepare_nego (np, cp, &cp->scsi_smsg2[msglen]);
9899 #endif /* SCSI_NCR_INTEGRITY_CHECKING */
9900
9901 /*
9902 ** Message table indirect structure.
9903 */
9904 cp->phys.smsg.addr = cpu_to_scr(CCB_PHYS (cp, scsi_smsg2));
9905 cp->phys.smsg.size = cpu_to_scr(msglen);
9906
9907 /*
9908 ** sense command
9909 */
9910 cp->phys.cmd.addr = cpu_to_scr(CCB_PHYS (cp, sensecmd));
9911 cp->phys.cmd.size = cpu_to_scr(6);
9912
9913 /*
9914 ** patch requested size into sense command
9915 */
9916 cp->sensecmd[0] = 0x03;
9917 cp->sensecmd[1] = cp->lun << 5;
9918 cp->sensecmd[4] = sizeof(cp->sense_buf);
9919
9920 /*
9921 ** sense data
9922 */
9923 bzero(cp->sense_buf, sizeof(cp->sense_buf));
9924 cp->phys.sense.addr = cpu_to_scr(CCB_PHYS(cp,sense_buf[0]));
9925 cp->phys.sense.size = cpu_to_scr(sizeof(cp->sense_buf));
9926
9927 /*
9928 ** requeue the command.
9929 */
9930 startp = NCB_SCRIPTH_PHYS (np, sdata_in);
9931
9932 cp->phys.header.savep = cpu_to_scr(startp);
9933 cp->phys.header.goalp = cpu_to_scr(startp + 16);
9934 cp->phys.header.lastp = cpu_to_scr(startp);
9935 cp->phys.header.wgoalp = cpu_to_scr(startp + 16);
9936 cp->phys.header.wlastp = cpu_to_scr(startp);
9937
9938 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
9939 cp->scsi_status = S_ILLEGAL;
9940 cp->host_flags = (HF_AUTO_SENSE|HF_DATA_IN);
9941
9942 cp->phys.header.go.start =
9943 cpu_to_scr(NCB_SCRIPT_PHYS (np, select));
9944
9945 /*
9946 ** If lp not yet allocated, requeue the command.
9947 */
9948 if (!lp)
9949 ncr_put_start_queue(np, cp);
9950 break;
9951 }
9952
9953 /*
9954 ** requeue awaiting scsi commands for this lun.
9955 */
9956 if (lp)
9957 ncr_start_next_ccb(np, lp, 1);
9958
9959 return;
9960 }
9961
9962 /*----------------------------------------------------------
9963 **
9964 ** After a device has accepted some management message
9965 ** as BUS DEVICE RESET, ABORT TASK, etc ..., or when
9966 ** a device signals a UNIT ATTENTION condition, some
9967 ** tasks are thrown away by the device. We are required
9968 ** to reflect that on our tasks list since the device
9969 ** will never complete these tasks.
9970 **
9971 ** This function completes all disconnected CCBs for a
9972 ** given target that matches the following criteria:
9973 ** - lun=-1 means any logical UNIT otherwise a given one.
9974 ** - task=-1 means any task, otherwise a given one.
9975 **----------------------------------------------------------
9976 */
9977 static int ncr_clear_tasks(ncb_p np, u_char hsts,
9978 int target, int lun, int task)
9979 {
9980 int i = 0;
9981 ccb_p cp;
9982
9983 for (cp = np->ccbc; cp; cp = cp->link_ccb) {
9984 if (cp->host_status != HS_DISCONNECT)
9985 continue;
9986 if (cp->target != target)
9987 continue;
9988 if (lun != -1 && cp->lun != lun)
9989 continue;
9990 if (task != -1 && cp->tag != NO_TAG && cp->scsi_smsg[2] != task)
9991 continue;
9992 cp->host_status = hsts;
9993 cp->scsi_status = S_ILLEGAL;
9994 ncr_complete(np, cp);
9995 ++i;
9996 }
9997 return i;
9998 }
9999
10000 /*==========================================================
10001 **
10002 ** ncr chip handler for TASKS recovery.
10003 **
10004 **==========================================================
10005 **
10006 ** We cannot safely abort a command, while the SCRIPTS
10007 ** processor is running, since we just would be in race
10008 ** with it.
10009 **
10010 ** As long as we have tasks to abort, we keep the SEM
10011 ** bit set in the ISTAT. When this bit is set, the
10012 ** SCRIPTS processor interrupts (SIR_SCRIPT_STOPPED)
10013 ** each time it enters the scheduler.
10014 **
10015 ** If we have to reset a target, clear tasks of a unit,
10016 ** or to perform the abort of a disconnected job, we
10017 ** restart the SCRIPTS for selecting the target. Once
10018 ** selected, the SCRIPTS interrupts (SIR_TARGET_SELECTED).
10019 ** If it loses arbitration, the SCRIPTS will interrupt again
10020 ** the next time it will enter its scheduler, and so on ...
10021 **
10022 ** On SIR_TARGET_SELECTED, we scan for the more
10023 ** appropriate thing to do:
10024 **
10025 ** - If nothing, we just sent a M_ABORT message to the
10026 ** target to get rid of the useless SCSI bus ownership.
10027 ** According to the specs, no tasks shall be affected.
10028 ** - If the target is to be reset, we send it a M_RESET
10029 ** message.
10030 ** - If a logical UNIT is to be cleared , we send the
10031 ** IDENTIFY(lun) + M_ABORT.
10032 ** - If an untagged task is to be aborted, we send the
10033 ** IDENTIFY(lun) + M_ABORT.
10034 ** - If a tagged task is to be aborted, we send the
10035 ** IDENTIFY(lun) + task attributes + M_ABORT_TAG.
10036 **
10037 ** Once our 'kiss of death' :) message has been accepted
10038 ** by the target, the SCRIPTS interrupts again
10039 ** (SIR_ABORT_SENT). On this interrupt, we complete
10040 ** all the CCBs that should have been aborted by the
10041 ** target according to our message.
10042 **
10043 **----------------------------------------------------------
10044 */
10045 static void ncr_sir_task_recovery(ncb_p np, int num)
10046 {
10047 ccb_p cp;
10048 tcb_p tp;
10049 int target=-1, lun=-1, task;
10050 int i, k;
10051 u_char *p;
10052
10053 switch(num) {
10054 /*
10055 ** The SCRIPTS processor stopped before starting
10056 ** the next command in order to allow us to perform
10057 ** some task recovery.
10058 */
10059 case SIR_SCRIPT_STOPPED:
10060
10061 /*
10062 ** Do we have any target to reset or unit to clear ?
10063 */
10064 for (i = 0 ; i < MAX_TARGET ; i++) {
10065 tp = &np->target[i];
10066 if (tp->to_reset || (tp->l0p && tp->l0p->to_clear)) {
10067 target = i;
10068 break;
10069 }
10070 if (!tp->lmp)
10071 continue;
10072 for (k = 1 ; k < MAX_LUN ; k++) {
10073 if (tp->lmp[k] && tp->lmp[k]->to_clear) {
10074 target = i;
10075 break;
10076 }
10077 }
10078 if (target != -1)
10079 break;
10080 }
10081
10082 /*
10083 ** If not, look at the CCB list for any
10084 ** disconnected CCB to be aborted.
10085 */
10086 if (target == -1) {
10087 for (cp = np->ccbc; cp; cp = cp->link_ccb) {
10088 if (cp->host_status != HS_DISCONNECT)
10089 continue;
10090 if (cp->to_abort) {
10091 target = cp->target;
10092 break;
10093 }
10094 }
10095 }
10096
10097 /*
10098 ** If some target is to be selected,
10099 ** prepare and start the selection.
10100 */
10101 if (target != -1) {
10102 tp = &np->target[target];
10103 np->abrt_sel.sel_id = target;
10104 np->abrt_sel.sel_scntl3 = tp->wval;
10105 np->abrt_sel.sel_sxfer = tp->sval;
10106 np->abrt_sel.sel_scntl4 = tp->uval;
10107 OUTL(nc_dsa, np->p_ncb);
10108 OUTL_DSP (NCB_SCRIPTH_PHYS (np, sel_for_abort));
10109 return;
10110 }
10111
10112 /*
10113 ** Nothing is to be selected, so we donnot need
10114 ** to synchronize with the SCRIPTS anymore.
10115 ** Remove the SEM flag from the ISTAT.
10116 */
10117 np->istat_sem = 0;
10118 OUTB (nc_istat, SIGP);
10119
10120 /*
10121 ** Now look at CCBs to abort that haven't started yet.
10122 ** Remove all those CCBs from the start queue and
10123 ** complete them with appropriate status.
10124 ** Btw, the SCRIPTS processor is still stopped, so
10125 ** we are not in race.
10126 */
10127 for (cp = np->ccbc; cp; cp = cp->link_ccb) {
10128 if (cp->host_status != HS_BUSY &&
10129 cp->host_status != HS_NEGOTIATE)
10130 continue;
10131 if (!cp->to_abort)
10132 continue;
10133 #ifdef SCSI_NCR_IARB_SUPPORT
10134 /*
10135 ** If we are using IMMEDIATE ARBITRATION, we donnot
10136 ** want to cancel the last queued CCB, since the
10137 ** SCRIPTS may have anticipated the selection.
10138 */
10139 if (cp == np->last_cp) {
10140 cp->to_abort = 0;
10141 continue;
10142 }
10143 #endif
10144 /*
10145 ** Compute index of next position in the start
10146 ** queue the SCRIPTS will schedule.
10147 */
10148 i = (INL (nc_scratcha) - np->p_squeue) / 4;
10149
10150 /*
10151 ** Remove the job from the start queue.
10152 */
10153 k = -1;
10154 while (1) {
10155 if (i == np->squeueput)
10156 break;
10157 if (k == -1) { /* Not found yet */
10158 if (cp == ncr_ccb_from_dsa(np,
10159 scr_to_cpu(np->squeue[i])))
10160 k = i; /* Found */
10161 }
10162 else {
10163 /*
10164 ** Once found, we have to move
10165 ** back all jobs by 1 position.
10166 */
10167 np->squeue[k] = np->squeue[i];
10168 k += 2;
10169 if (k >= MAX_START*2)
10170 k = 0;
10171 }
10172
10173 i += 2;
10174 if (i >= MAX_START*2)
10175 i = 0;
10176 }
10177 /*
10178 ** If job removed, repair the start queue.
10179 */
10180 if (k != -1) {
10181 np->squeue[k] = np->squeue[i]; /* Idle task */
10182 np->squeueput = k; /* Start queue pointer */
10183 }
10184 cp->host_status = HS_ABORTED;
10185 cp->scsi_status = S_ILLEGAL;
10186 ncr_complete(np, cp);
10187 }
10188 break;
10189 /*
10190 ** The SCRIPTS processor has selected a target
10191 ** we may have some manual recovery to perform for.
10192 */
10193 case SIR_TARGET_SELECTED:
10194 target = (INB (nc_sdid) & 0xf);
10195 tp = &np->target[target];
10196
10197 np->abrt_tbl.addr = cpu_to_scr(vtobus(np->abrt_msg));
10198
10199 /*
10200 ** If the target is to be reset, prepare a
10201 ** M_RESET message and clear the to_reset flag
10202 ** since we donnot expect this operation to fail.
10203 */
10204 if (tp->to_reset) {
10205 np->abrt_msg[0] = M_RESET;
10206 np->abrt_tbl.size = 1;
10207 tp->to_reset = 0;
10208 break;
10209 }
10210
10211 /*
10212 ** Otherwise, look for some logical unit to be cleared.
10213 */
10214 if (tp->l0p && tp->l0p->to_clear)
10215 lun = 0;
10216 else if (tp->lmp) {
10217 for (k = 1 ; k < MAX_LUN ; k++) {
10218 if (tp->lmp[k] && tp->lmp[k]->to_clear) {
10219 lun = k;
10220 break;
10221 }
10222 }
10223 }
10224
10225 /*
10226 ** If a logical unit is to be cleared, prepare
10227 ** an IDENTIFY(lun) + ABORT MESSAGE.
10228 */
10229 if (lun != -1) {
10230 lcb_p lp = ncr_lp(np, tp, lun);
10231 lp->to_clear = 0; /* We donnot expect to fail here */
10232 np->abrt_msg[0] = M_IDENTIFY | lun;
10233 np->abrt_msg[1] = M_ABORT;
10234 np->abrt_tbl.size = 2;
10235 break;
10236 }
10237
10238 /*
10239 ** Otherwise, look for some disconnected job to
10240 ** abort for this target.
10241 */
10242 for (cp = np->ccbc; cp; cp = cp->link_ccb) {
10243 if (cp->host_status != HS_DISCONNECT)
10244 continue;
10245 if (cp->target != target)
10246 continue;
10247 if (cp->to_abort)
10248 break;
10249 }
10250
10251 /*
10252 ** If we have none, probably since the device has
10253 ** completed the command before we won abitration,
10254 ** send a M_ABORT message without IDENTIFY.
10255 ** According to the specs, the device must just
10256 ** disconnect the BUS and not abort any task.
10257 */
10258 if (!cp) {
10259 np->abrt_msg[0] = M_ABORT;
10260 np->abrt_tbl.size = 1;
10261 break;
10262 }
10263
10264 /*
10265 ** We have some task to abort.
10266 ** Set the IDENTIFY(lun)
10267 */
10268 np->abrt_msg[0] = M_IDENTIFY | cp->lun;
10269
10270 /*
10271 ** If we want to abort an untagged command, we
10272 ** will send a IDENTIFY + M_ABORT.
10273 ** Otherwise (tagged command), we will send
10274 ** a IDENTITFY + task attributes + ABORT TAG.
10275 */
10276 if (cp->tag == NO_TAG) {
10277 np->abrt_msg[1] = M_ABORT;
10278 np->abrt_tbl.size = 2;
10279 }
10280 else {
10281 np->abrt_msg[1] = cp->scsi_smsg[1];
10282 np->abrt_msg[2] = cp->scsi_smsg[2];
10283 np->abrt_msg[3] = M_ABORT_TAG;
10284 np->abrt_tbl.size = 4;
10285 }
10286 cp->to_abort = 0; /* We donnot expect to fail here */
10287 break;
10288
10289 /*
10290 ** The target has accepted our message and switched
10291 ** to BUS FREE phase as we expected.
10292 */
10293 case SIR_ABORT_SENT:
10294 target = (INB (nc_sdid) & 0xf);
10295 tp = &np->target[target];
10296
10297 /*
10298 ** If we didn't abort anything, leave here.
10299 */
10300 if (np->abrt_msg[0] == M_ABORT)
10301 break;
10302
10303 /*
10304 ** If we sent a M_RESET, then a hardware reset has
10305 ** been performed by the target.
10306 ** - Reset everything to async 8 bit
10307 ** - Tell ourself to negotiate next time :-)
10308 ** - Prepare to clear all disconnected CCBs for
10309 ** this target from our task list (lun=task=-1)
10310 */
10311 lun = -1;
10312 task = -1;
10313 if (np->abrt_msg[0] == M_RESET) {
10314 tp->sval = 0;
10315 tp->wval = np->rv_scntl3;
10316 tp->uval = np->rv_scntl4;
10317 ncr_set_sync_wide_status(np, target);
10318 ncr_negotiate(np, tp);
10319 }
10320
10321 /*
10322 ** Otherwise, check for the LUN and TASK(s)
10323 ** concerned by the cancelation.
10324 ** If it is not ABORT_TAG then it is CLEAR_QUEUE
10325 ** or an ABORT message :-)
10326 */
10327 else {
10328 lun = np->abrt_msg[0] & 0x3f;
10329 if (np->abrt_msg[1] == M_ABORT_TAG)
10330 task = np->abrt_msg[2];
10331 }
10332
10333 /*
10334 ** Complete all the CCBs the device should have
10335 ** aborted due to our 'kiss of death' message.
10336 */
10337 (void) ncr_clear_tasks(np, HS_ABORTED, target, lun, task);
10338 break;
10339
10340 /*
10341 ** We have performed a auto-sense that succeeded.
10342 ** If the device reports a UNIT ATTENTION condition
10343 ** due to a RESET condition, we must complete all
10344 ** disconnect CCBs for this unit since the device
10345 ** shall have thrown them away.
10346 ** Since I haven't time to guess what the specs are
10347 ** expecting for other UNIT ATTENTION conditions, I
10348 ** decided to only care about RESET conditions. :)
10349 */
10350 case SIR_AUTO_SENSE_DONE:
10351 cp = ncr_ccb_from_dsa(np, INL (nc_dsa));
10352 if (!cp)
10353 break;
10354 memcpy(cp->cmd->sense_buffer, cp->sense_buf,
10355 sizeof(cp->cmd->sense_buffer));
10356 p = &cp->cmd->sense_buffer[0];
10357
10358 if (p[0] != 0x70 || p[2] != 0x6 || p[12] != 0x29)
10359 break;
10360 #if 0
10361 (void) ncr_clear_tasks(np, HS_RESET, cp->target, cp->lun, -1);
10362 #endif
10363 break;
10364 }
10365
10366 /*
10367 ** Print to the log the message we intend to send.
10368 */
10369 if (num == SIR_TARGET_SELECTED) {
10370 PRINT_TARGET(np, target);
10371 ncr_printl_hex("control msgout:", np->abrt_msg,
10372 np->abrt_tbl.size);
10373 np->abrt_tbl.size = cpu_to_scr(np->abrt_tbl.size);
10374 }
10375
10376 /*
10377 ** Let the SCRIPTS processor continue.
10378 */
10379 OUTONB_STD ();
10380 }
10381
10382
10383 /*==========================================================
10384 **
10385 ** Gérard's alchemy:) that deals with with the data
10386 ** pointer for both MDP and the residual calculation.
10387 **
10388 **==========================================================
10389 **
10390 ** I didn't want to bloat the code by more than 200
10391 ** lignes for the handling of both MDP and the residual.
10392 ** This has been achieved by using a data pointer
10393 ** representation consisting in an index in the data
10394 ** array (dp_sg) and a negative offset (dp_ofs) that
10395 ** have the following meaning:
10396 **
10397 ** - dp_sg = MAX_SCATTER
10398 ** we are at the end of the data script.
10399 ** - dp_sg < MAX_SCATTER
10400 ** dp_sg points to the next entry of the scatter array
10401 ** we want to transfer.
10402 ** - dp_ofs < 0
10403 ** dp_ofs represents the residual of bytes of the
10404 ** previous entry scatter entry we will send first.
10405 ** - dp_ofs = 0
10406 ** no residual to send first.
10407 **
10408 ** The function ncr_evaluate_dp() accepts an arbitray
10409 ** offset (basically from the MDP message) and returns
10410 ** the corresponding values of dp_sg and dp_ofs.
10411 **
10412 **----------------------------------------------------------
10413 */
10414
10415 static int ncr_evaluate_dp(ncb_p np, ccb_p cp, u_int32 scr, int *ofs)
10416 {
10417 u_int32 dp_scr;
10418 int dp_ofs, dp_sg, dp_sgmin;
10419 int tmp;
10420 struct pm_ctx *pm;
10421
10422 /*
10423 ** Compute the resulted data pointer in term of a script
10424 ** address within some DATA script and a signed byte offset.
10425 */
10426 dp_scr = scr;
10427 dp_ofs = *ofs;
10428 if (dp_scr == NCB_SCRIPT_PHYS (np, pm0_data))
10429 pm = &cp->phys.pm0;
10430 else if (dp_scr == NCB_SCRIPT_PHYS (np, pm1_data))
10431 pm = &cp->phys.pm1;
10432 else
10433 pm = 0;
10434
10435 if (pm) {
10436 dp_scr = scr_to_cpu(pm->ret);
10437 dp_ofs -= scr_to_cpu(pm->sg.size);
10438 }
10439
10440 /*
10441 ** Deduce the index of the sg entry.
10442 ** Keep track of the index of the first valid entry.
10443 ** If result is dp_sg = MAX_SCATTER, then we are at the
10444 ** end of the data and vice-versa.
10445 */
10446 tmp = scr_to_cpu(cp->phys.header.goalp);
10447 dp_sg = MAX_SCATTER;
10448 if (dp_scr != tmp)
10449 dp_sg -= (tmp - 8 - (int)dp_scr) / (SCR_SG_SIZE*4);
10450 dp_sgmin = MAX_SCATTER - cp->segments;
10451
10452 /*
10453 ** Move to the sg entry the data pointer belongs to.
10454 **
10455 ** If we are inside the data area, we expect result to be:
10456 **
10457 ** Either,
10458 ** dp_ofs = 0 and dp_sg is the index of the sg entry
10459 ** the data pointer belongs to (or the end of the data)
10460 ** Or,
10461 ** dp_ofs < 0 and dp_sg is the index of the sg entry
10462 ** the data pointer belongs to + 1.
10463 */
10464 if (dp_ofs < 0) {
10465 int n;
10466 while (dp_sg > dp_sgmin) {
10467 --dp_sg;
10468 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
10469 n = dp_ofs + (tmp & 0xffffff);
10470 if (n > 0) {
10471 ++dp_sg;
10472 break;
10473 }
10474 dp_ofs = n;
10475 }
10476 }
10477 else if (dp_ofs > 0) {
10478 while (dp_sg < MAX_SCATTER) {
10479 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
10480 dp_ofs -= (tmp & 0xffffff);
10481 ++dp_sg;
10482 if (dp_ofs <= 0)
10483 break;
10484 }
10485 }
10486
10487 /*
10488 ** Make sure the data pointer is inside the data area.
10489 ** If not, return some error.
10490 */
10491 if (dp_sg < dp_sgmin || (dp_sg == dp_sgmin && dp_ofs < 0))
10492 goto out_err;
10493 else if (dp_sg > MAX_SCATTER || (dp_sg == MAX_SCATTER && dp_ofs > 0))
10494 goto out_err;
10495
10496 /*
10497 ** Save the extreme pointer if needed.
10498 */
10499 if (dp_sg > cp->ext_sg ||
10500 (dp_sg == cp->ext_sg && dp_ofs > cp->ext_ofs)) {
10501 cp->ext_sg = dp_sg;
10502 cp->ext_ofs = dp_ofs;
10503 }
10504
10505 /*
10506 ** Return data.
10507 */
10508 *ofs = dp_ofs;
10509 return dp_sg;
10510
10511 out_err:
10512 return -1;
10513 }
10514
10515 /*==========================================================
10516 **
10517 ** ncr chip handler for MODIFY DATA POINTER MESSAGE
10518 **
10519 **==========================================================
10520 **
10521 ** We also call this function on IGNORE WIDE RESIDUE
10522 ** messages that do not match a SWIDE full condition.
10523 ** Btw, we assume in that situation that such a message
10524 ** is equivalent to a MODIFY DATA POINTER (offset=-1).
10525 **
10526 **----------------------------------------------------------
10527 */
10528
10529 static void ncr_modify_dp(ncb_p np, tcb_p tp, ccb_p cp, int ofs)
10530 {
10531 int dp_ofs = ofs;
10532 u_int32 dp_scr = INL (nc_temp);
10533 u_int32 dp_ret;
10534 u_int32 tmp;
10535 u_char hflags;
10536 int dp_sg;
10537 struct pm_ctx *pm;
10538
10539 /*
10540 ** Not supported for auto_sense;
10541 */
10542 if (cp->host_flags & HF_AUTO_SENSE)
10543 goto out_reject;
10544
10545 /*
10546 ** Apply our alchemy:) (see comments in ncr_evaluate_dp()),
10547 ** to the resulted data pointer.
10548 */
10549 dp_sg = ncr_evaluate_dp(np, cp, dp_scr, &dp_ofs);
10550 if (dp_sg < 0)
10551 goto out_reject;
10552
10553 /*
10554 ** And our alchemy:) allows to easily calculate the data
10555 ** script address we want to return for the next data phase.
10556 */
10557 dp_ret = cpu_to_scr(cp->phys.header.goalp);
10558 dp_ret = dp_ret - 8 - (MAX_SCATTER - dp_sg) * (SCR_SG_SIZE*4);
10559
10560 /*
10561 ** If offset / scatter entry is zero we donnot need
10562 ** a context for the new current data pointer.
10563 */
10564 if (dp_ofs == 0) {
10565 dp_scr = dp_ret;
10566 goto out_ok;
10567 }
10568
10569 /*
10570 ** Get a context for the new current data pointer.
10571 */
10572 hflags = INB (HF_PRT);
10573
10574 if (hflags & HF_DP_SAVED)
10575 hflags ^= HF_ACT_PM;
10576
10577 if (!(hflags & HF_ACT_PM)) {
10578 pm = &cp->phys.pm0;
10579 dp_scr = NCB_SCRIPT_PHYS (np, pm0_data);
10580 }
10581 else {
10582 pm = &cp->phys.pm1;
10583 dp_scr = NCB_SCRIPT_PHYS (np, pm1_data);
10584 }
10585
10586 hflags &= ~(HF_DP_SAVED);
10587
10588 OUTB (HF_PRT, hflags);
10589
10590 /*
10591 ** Set up the new current data pointer.
10592 ** ofs < 0 there, and for the next data phase, we
10593 ** want to transfer part of the data of the sg entry
10594 ** corresponding to index dp_sg-1 prior to returning
10595 ** to the main data script.
10596 */
10597 pm->ret = cpu_to_scr(dp_ret);
10598 tmp = scr_to_cpu(cp->phys.data[dp_sg-1].addr);
10599 tmp += scr_to_cpu(cp->phys.data[dp_sg-1].size) + dp_ofs;
10600 pm->sg.addr = cpu_to_scr(tmp);
10601 pm->sg.size = cpu_to_scr(-dp_ofs);
10602
10603 out_ok:
10604 OUTL (nc_temp, dp_scr);
10605 OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack));
10606 return;
10607
10608 out_reject:
10609 OUTL_DSP (NCB_SCRIPTH_PHYS (np, msg_bad));
10610 }
10611
10612
10613 /*==========================================================
10614 **
10615 ** ncr chip calculation of the data residual.
10616 **
10617 **==========================================================
10618 **
10619 ** As I used to say, the requirement of data residual
10620 ** in SCSI is broken, useless and cannot be achieved
10621 ** without huge complexity.
10622 ** But most OSes and even the official CAM require it.
10623 ** When stupidity happens to be so widely spread inside
10624 ** a community, it gets hard to convince.
10625 **
10626 ** Anyway, I don't care, since I am not going to use
10627 ** any software that considers this data residual as
10628 ** a relevant information. :)
10629 **
10630 **----------------------------------------------------------
10631 */
10632
10633 static int ncr_compute_residual(ncb_p np, ccb_p cp)
10634 {
10635 int dp_sg, dp_sgmin, tmp;
10636 int resid=0;
10637 int dp_ofs = 0;
10638
10639 /*
10640 * Check for some data lost or just thrown away.
10641 * We are not required to be quite accurate in this
10642 * situation. Btw, if we are odd for output and the
10643 * device claims some more data, it may well happen
10644 * than our residual be zero. :-)
10645 */
10646 if (cp->xerr_status & (XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN)) {
10647 if (cp->xerr_status & XE_EXTRA_DATA)
10648 resid -= cp->extra_bytes;
10649 if (cp->xerr_status & XE_SODL_UNRUN)
10650 ++resid;
10651 if (cp->xerr_status & XE_SWIDE_OVRUN)
10652 --resid;
10653 }
10654
10655
10656 /*
10657 ** If SCRIPTS reaches its goal point, then
10658 ** there is no additionnal residual.
10659 */
10660 if (cp->phys.header.lastp == cp->phys.header.goalp)
10661 return resid;
10662
10663 /*
10664 ** If the last data pointer is data_io (direction
10665 ** unknown), then no data transfer should have
10666 ** taken place.
10667 */
10668 if (cp->phys.header.lastp == NCB_SCRIPTH_PHYS (np, data_io))
10669 return cp->data_len;
10670
10671 /*
10672 ** If no data transfer occurs, or if the data
10673 ** pointer is weird, return full residual.
10674 */
10675 if (cp->startp == cp->phys.header.lastp ||
10676 ncr_evaluate_dp(np, cp, scr_to_cpu(cp->phys.header.lastp),
10677 &dp_ofs) < 0) {
10678 return cp->data_len;
10679 }
10680
10681 /*
10682 ** We are now full comfortable in the computation
10683 ** of the data residual (2's complement).
10684 */
10685 dp_sgmin = MAX_SCATTER - cp->segments;
10686 resid = -cp->ext_ofs;
10687 for (dp_sg = cp->ext_sg; dp_sg < MAX_SCATTER; ++dp_sg) {
10688 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
10689 resid += (tmp & 0xffffff);
10690 }
10691
10692 /*
10693 ** Hopefully, the result is not too wrong.
10694 */
10695 return resid;
10696 }
10697
10698 /*==========================================================
10699 **
10700 ** Print out the containt of a SCSI message.
10701 **
10702 **==========================================================
10703 */
10704
10705 static int ncr_show_msg (u_char * msg)
10706 {
10707 u_char i;
10708 printk ("%x",*msg);
10709 if (*msg==M_EXTENDED) {
10710 for (i=1;i<8;i++) {
10711 if (i-1>msg[1]) break;
10712 printk ("-%x",msg[i]);
10713 };
10714 return (i+1);
10715 } else if ((*msg & 0xf0) == 0x20) {
10716 printk ("-%x",msg[1]);
10717 return (2);
10718 };
10719 return (1);
10720 }
10721
10722 static void ncr_print_msg (ccb_p cp, char *label, u_char *msg)
10723 {
10724 if (cp)
10725 PRINT_ADDR(cp->cmd);
10726 if (label)
10727 printk ("%s: ", label);
10728
10729 (void) ncr_show_msg (msg);
10730 printk (".\n");
10731 }
10732
10733 /*===================================================================
10734 **
10735 ** Negotiation for WIDE and SYNCHRONOUS DATA TRANSFER.
10736 **
10737 **===================================================================
10738 **
10739 ** Was Sie schon immer ueber transfermode negotiation wissen wollten ...
10740 **
10741 ** We try to negotiate sync and wide transfer only after
10742 ** a successful inquire command. We look at byte 7 of the
10743 ** inquire data to determine the capabilities of the target.
10744 **
10745 ** When we try to negotiate, we append the negotiation message
10746 ** to the identify and (maybe) simple tag message.
10747 ** The host status field is set to HS_NEGOTIATE to mark this
10748 ** situation.
10749 **
10750 ** If the target doesn't answer this message immediately
10751 ** (as required by the standard), the SIR_NEGO_FAILED interrupt
10752 ** will be raised eventually.
10753 ** The handler removes the HS_NEGOTIATE status, and sets the
10754 ** negotiated value to the default (async / nowide).
10755 **
10756 ** If we receive a matching answer immediately, we check it
10757 ** for validity, and set the values.
10758 **
10759 ** If we receive a Reject message immediately, we assume the
10760 ** negotiation has failed, and fall back to standard values.
10761 **
10762 ** If we receive a negotiation message while not in HS_NEGOTIATE
10763 ** state, it's a target initiated negotiation. We prepare a
10764 ** (hopefully) valid answer, set our parameters, and send back
10765 ** this answer to the target.
10766 **
10767 ** If the target doesn't fetch the answer (no message out phase),
10768 ** we assume the negotiation has failed, and fall back to default
10769 ** settings (SIR_NEGO_PROTO interrupt).
10770 **
10771 ** When we set the values, we adjust them in all ccbs belonging
10772 ** to this target, in the controller's register, and in the "phys"
10773 ** field of the controller's struct ncb.
10774 **
10775 **---------------------------------------------------------------------
10776 */
10777
10778 /*==========================================================
10779 **
10780 ** ncr chip handler for SYNCHRONOUS DATA TRANSFER
10781 ** REQUEST (SDTR) message.
10782 **
10783 **==========================================================
10784 **
10785 ** Read comments above.
10786 **
10787 **----------------------------------------------------------
10788 */
10789 static void ncr_sync_nego(ncb_p np, tcb_p tp, ccb_p cp)
10790 {
10791 u_char scntl3, scntl4;
10792 u_char chg, ofs, per, fak;
10793
10794 /*
10795 ** Synchronous request message received.
10796 */
10797
10798 if (DEBUG_FLAGS & DEBUG_NEGO) {
10799 ncr_print_msg(cp, "sync msg in", np->msgin);
10800 };
10801
10802 /*
10803 ** get requested values.
10804 */
10805
10806 chg = 0;
10807 per = np->msgin[3];
10808 ofs = np->msgin[4];
10809 if (ofs==0) per=255;
10810
10811 /*
10812 ** if target sends SDTR message,
10813 ** it CAN transfer synch.
10814 */
10815
10816 if (ofs)
10817 tp->inq_byte7 |= INQ7_SYNC;
10818
10819 /*
10820 ** check values against driver limits.
10821 */
10822
10823 if (per < np->minsync)
10824 {chg = 1; per = np->minsync;}
10825 if (per < tp->minsync)
10826 {chg = 1; per = tp->minsync;}
10827 if (ofs > np->maxoffs_st)
10828 {chg = 1; ofs = np->maxoffs_st;}
10829 if (ofs > tp->maxoffs)
10830 {chg = 1; ofs = tp->maxoffs;}
10831
10832 /*
10833 ** Check against controller limits.
10834 */
10835 fak = 7;
10836 scntl3 = 0;
10837 scntl4 = 0;
10838 if (ofs != 0) {
10839 ncr_getsync(np, per, &fak, &scntl3);
10840 if (fak > 7) {
10841 chg = 1;
10842 ofs = 0;
10843 }
10844 }
10845 if (ofs == 0) {
10846 fak = 7;
10847 per = 0;
10848 scntl3 = 0;
10849 scntl4 = 0;
10850 tp->minsync = 0;
10851 }
10852
10853 if (DEBUG_FLAGS & DEBUG_NEGO) {
10854 PRINT_ADDR(cp->cmd);
10855 printk ("sync: per=%d scntl3=0x%x scntl4=0x%x ofs=%d fak=%d chg=%d.\n",
10856 per, scntl3, scntl4, ofs, fak, chg);
10857 }
10858
10859 if (INB (HS_PRT) == HS_NEGOTIATE) {
10860 OUTB (HS_PRT, HS_BUSY);
10861 switch (cp->nego_status) {
10862 case NS_SYNC:
10863 /*
10864 ** This was an answer message
10865 */
10866 if (chg) {
10867 /*
10868 ** Answer wasn't acceptable.
10869 */
10870 ncr_setsync (np, cp, 0, 0xe0, 0);
10871 OUTL_DSP (NCB_SCRIPTH_PHYS (np, msg_bad));
10872 } else {
10873 /*
10874 ** Answer is ok.
10875 */
10876 if ((np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
10877 (np->device_id != PCI_DEVICE_ID_LSI_53C1010_66))
10878 ncr_setsync (np, cp, scntl3, (fak<<5)|ofs,0);
10879 else
10880 ncr_setsync (np, cp, scntl3, ofs, scntl4);
10881
10882 OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack));
10883 };
10884 return;
10885
10886 case NS_WIDE:
10887 ncr_setwide (np, cp, 0, 0);
10888 break;
10889 };
10890 };
10891
10892 /*
10893 ** It was a request. Set value and
10894 ** prepare an answer message
10895 */
10896
10897 if ((np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
10898 (np->device_id != PCI_DEVICE_ID_LSI_53C1010_66))
10899 ncr_setsync (np, cp, scntl3, (fak<<5)|ofs,0);
10900 else
10901 ncr_setsync (np, cp, scntl3, ofs, scntl4);
10902
10903 np->msgout[0] = M_EXTENDED;
10904 np->msgout[1] = 3;
10905 np->msgout[2] = M_X_SYNC_REQ;
10906 np->msgout[3] = per;
10907 np->msgout[4] = ofs;
10908
10909 cp->nego_status = NS_SYNC;
10910
10911 if (DEBUG_FLAGS & DEBUG_NEGO) {
10912 ncr_print_msg(cp, "sync msgout", np->msgout);
10913 }
10914
10915 np->msgin [0] = M_NOOP;
10916
10917 if (!ofs)
10918 OUTL_DSP (NCB_SCRIPTH_PHYS (np, msg_bad));
10919 else
10920 OUTL_DSP (NCB_SCRIPTH_PHYS (np, sdtr_resp));
10921 }
10922
10923 /*==========================================================
10924 **
10925 ** ncr chip handler for WIDE DATA TRANSFER REQUEST
10926 ** (WDTR) message.
10927 **
10928 **==========================================================
10929 **
10930 ** Read comments above.
10931 **
10932 **----------------------------------------------------------
10933 */
10934 static void ncr_wide_nego(ncb_p np, tcb_p tp, ccb_p cp)
10935 {
10936 u_char chg, wide;
10937
10938 /*
10939 ** Wide request message received.
10940 */
10941 if (DEBUG_FLAGS & DEBUG_NEGO) {
10942 ncr_print_msg(cp, "wide msgin", np->msgin);
10943 };
10944
10945 /*
10946 ** get requested values.
10947 */
10948
10949 chg = 0;
10950 wide = np->msgin[3];
10951
10952 /*
10953 ** if target sends WDTR message,
10954 ** it CAN transfer wide.
10955 */
10956
10957 if (wide)
10958 tp->inq_byte7 |= INQ7_WIDE16;
10959
10960 /*
10961 ** check values against driver limits.
10962 */
10963
10964 if (wide > tp->usrwide)
10965 {chg = 1; wide = tp->usrwide;}
10966
10967 if (DEBUG_FLAGS & DEBUG_NEGO) {
10968 PRINT_ADDR(cp->cmd);
10969 printk ("wide: wide=%d chg=%d.\n", wide, chg);
10970 }
10971
10972 if (INB (HS_PRT) == HS_NEGOTIATE) {
10973 OUTB (HS_PRT, HS_BUSY);
10974 switch (cp->nego_status) {
10975 case NS_WIDE:
10976 /*
10977 ** This was an answer message
10978 */
10979 if (chg) {
10980 /*
10981 ** Answer wasn't acceptable.
10982 */
10983 ncr_setwide (np, cp, 0, 1);
10984 OUTL_DSP (NCB_SCRIPTH_PHYS (np, msg_bad));
10985 } else {
10986 /*
10987 ** Answer is ok.
10988 */
10989 ncr_setwide (np, cp, wide, 1);
10990 OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack));
10991 };
10992 return;
10993
10994 case NS_SYNC:
10995 ncr_setsync (np, cp, 0, 0xe0, 0);
10996 break;
10997 };
10998 };
10999
11000 /*
11001 ** It was a request, set value and
11002 ** prepare an answer message
11003 */
11004
11005 ncr_setwide (np, cp, wide, 1);
11006
11007 np->msgout[0] = M_EXTENDED;
11008 np->msgout[1] = 2;
11009 np->msgout[2] = M_X_WIDE_REQ;
11010 np->msgout[3] = wide;
11011
11012 np->msgin [0] = M_NOOP;
11013
11014 cp->nego_status = NS_WIDE;
11015
11016 if (DEBUG_FLAGS & DEBUG_NEGO) {
11017 ncr_print_msg(cp, "wide msgout", np->msgout);
11018 }
11019
11020 OUTL_DSP (NCB_SCRIPTH_PHYS (np, wdtr_resp));
11021 }
11022 /*==========================================================
11023 **
11024 ** ncr chip handler for PARALLEL PROTOCOL REQUEST
11025 ** (PPR) message.
11026 **
11027 **==========================================================
11028 **
11029 ** Read comments above.
11030 **
11031 **----------------------------------------------------------
11032 */
11033 static void ncr_ppr_nego(ncb_p np, tcb_p tp, ccb_p cp)
11034 {
11035 u_char scntl3, scntl4;
11036 u_char chg, ofs, per, fak, wth, dt;
11037
11038 /*
11039 ** PPR message received.
11040 */
11041
11042 if (DEBUG_FLAGS & DEBUG_NEGO) {
11043 ncr_print_msg(cp, "ppr msg in", np->msgin);
11044 };
11045
11046 /*
11047 ** get requested values.
11048 */
11049
11050 chg = 0;
11051 per = np->msgin[3];
11052 ofs = np->msgin[5];
11053 wth = np->msgin[6];
11054 dt = np->msgin[7];
11055 if (ofs==0) per=255;
11056
11057 /*
11058 ** if target sends sync (wide),
11059 ** it CAN transfer synch (wide).
11060 */
11061
11062 if (ofs)
11063 tp->inq_byte7 |= INQ7_SYNC;
11064
11065 if (wth)
11066 tp->inq_byte7 |= INQ7_WIDE16;
11067
11068 /*
11069 ** check values against driver limits.
11070 */
11071
11072 if (wth > tp->usrwide)
11073 {chg = 1; wth = tp->usrwide;}
11074 if (per < np->minsync)
11075 {chg = 1; per = np->minsync;}
11076 if (per < tp->minsync)
11077 {chg = 1; per = tp->minsync;}
11078 if (ofs > tp->maxoffs)
11079 {chg = 1; ofs = tp->maxoffs;}
11080
11081 /*
11082 ** Check against controller limits.
11083 */
11084 fak = 7;
11085 scntl3 = 0;
11086 scntl4 = 0;
11087 if (ofs != 0) {
11088 scntl4 = dt ? 0x80 : 0;
11089 ncr_getsync(np, per, &fak, &scntl3);
11090 if (fak > 7) {
11091 chg = 1;
11092 ofs = 0;
11093 }
11094 }
11095 if (ofs == 0) {
11096 fak = 7;
11097 per = 0;
11098 scntl3 = 0;
11099 scntl4 = 0;
11100 tp->minsync = 0;
11101 }
11102
11103 /*
11104 ** If target responds with Ultra 3 speed
11105 ** but narrow or not DT, reject.
11106 ** If target responds with DT request
11107 ** but not Ultra3 speeds, reject message,
11108 ** reset min sync for target to 0x0A and
11109 ** set flags to re-negotiate.
11110 */
11111
11112 if ((per == 0x09) && ofs && (!wth || !dt))
11113 chg = 1;
11114 else if (( (per > 0x09) && dt) )
11115 chg = 2;
11116
11117 /* Not acceptable since beyond controller limit */
11118 if (!dt && ofs > np->maxoffs_st)
11119 {chg = 2; ofs = np->maxoffs_st;}
11120
11121 if (DEBUG_FLAGS & DEBUG_NEGO) {
11122 PRINT_ADDR(cp->cmd);
11123 printk ("ppr: wth=%d per=%d scntl3=0x%x scntl4=0x%x ofs=%d fak=%d chg=%d.\n",
11124 wth, per, scntl3, scntl4, ofs, fak, chg);
11125 }
11126
11127 if (INB (HS_PRT) == HS_NEGOTIATE) {
11128 OUTB (HS_PRT, HS_BUSY);
11129 switch (cp->nego_status) {
11130 case NS_PPR:
11131 /*
11132 ** This was an answer message
11133 */
11134 if (chg) {
11135 /*
11136 ** Answer wasn't acceptable.
11137 */
11138 if (chg == 2) {
11139 /* Send message reject and reset flags for
11140 ** host to re-negotiate with min period 0x0A.
11141 */
11142 tp->minsync = 0x0A;
11143 tp->period = 0;
11144 tp->widedone = 0;
11145 }
11146 ncr_setsyncwide (np, cp, 0, 0xe0, 0, 0);
11147 OUTL_DSP (NCB_SCRIPTH_PHYS (np, msg_bad));
11148 } else {
11149 /*
11150 ** Answer is ok.
11151 */
11152
11153 if ((np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
11154 (np->device_id != PCI_DEVICE_ID_LSI_53C1010_66))
11155 ncr_setsyncwide (np, cp, scntl3, (fak<<5)|ofs,0, wth);
11156 else
11157 ncr_setsyncwide (np, cp, scntl3, ofs, scntl4, wth);
11158
11159 OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack));
11160
11161 };
11162 return;
11163
11164 case NS_SYNC:
11165 ncr_setsync (np, cp, 0, 0xe0, 0);
11166 break;
11167
11168 case NS_WIDE:
11169 ncr_setwide (np, cp, 0, 0);
11170 break;
11171 };
11172 };
11173
11174 /*
11175 ** It was a request. Set value and
11176 ** prepare an answer message
11177 **
11178 ** If narrow or not DT and requesting Ultra3
11179 ** slow the bus down and force ST. If not
11180 ** requesting Ultra3, force ST.
11181 ** Max offset is 31=0x1f if ST mode.
11182 */
11183
11184 if ((per == 0x09) && ofs && (!wth || !dt)) {
11185 per = 0x0A;
11186 dt = 0;
11187 }
11188 else if ( (per > 0x09) && dt) {
11189 dt = 0;
11190 }
11191 if (!dt && ofs > np->maxoffs_st)
11192 ofs = np->maxoffs_st;
11193
11194 if ((np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
11195 (np->device_id != PCI_DEVICE_ID_LSI_53C1010_66))
11196 ncr_setsyncwide (np, cp, scntl3, (fak<<5)|ofs,0, wth);
11197 else
11198 ncr_setsyncwide (np, cp, scntl3, ofs, scntl4, wth);
11199
11200 np->msgout[0] = M_EXTENDED;
11201 np->msgout[1] = 6;
11202 np->msgout[2] = M_X_PPR_REQ;
11203 np->msgout[3] = per;
11204 np->msgout[4] = 0;
11205 np->msgout[5] = ofs;
11206 np->msgout[6] = wth;
11207 np->msgout[7] = dt;
11208
11209 cp->nego_status = NS_PPR;
11210
11211 if (DEBUG_FLAGS & DEBUG_NEGO) {
11212 ncr_print_msg(cp, "ppr msgout", np->msgout);
11213 }
11214
11215 np->msgin [0] = M_NOOP;
11216
11217 if (!ofs)
11218 OUTL_DSP (NCB_SCRIPTH_PHYS (np, msg_bad));
11219 else
11220 OUTL_DSP (NCB_SCRIPTH_PHYS (np, ppr_resp));
11221 }
11222
11223
11224
11225 /*
11226 ** Reset SYNC or WIDE to default settings.
11227 ** Called when a negotiation does not succeed either
11228 ** on rejection or on protocol error.
11229 */
11230 static void ncr_nego_default(ncb_p np, tcb_p tp, ccb_p cp)
11231 {
11232 /*
11233 ** any error in negotiation:
11234 ** fall back to default mode.
11235 */
11236 switch (cp->nego_status) {
11237
11238 case NS_SYNC:
11239 ncr_setsync (np, cp, 0, 0xe0, 0);
11240 break;
11241
11242 case NS_WIDE:
11243 ncr_setwide (np, cp, 0, 0);
11244 break;
11245
11246 case NS_PPR:
11247 /*
11248 * ppr_negotiation is set to 1 on the first ppr nego command.
11249 * If ppr is successful, it is reset to 2.
11250 * If unsuccessful it is reset to 0.
11251 */
11252 if (DEBUG_FLAGS & DEBUG_NEGO) {
11253 tcb_p tp=&np->target[cp->target];
11254 u_char factor, offset, width;
11255
11256 ncr_get_xfer_info ( np, tp, &factor, &offset, &width);
11257
11258 printk("Current factor %d offset %d width %d\n",
11259 factor, offset, width);
11260 }
11261 if (tp->ppr_negotiation == 2)
11262 ncr_setsyncwide (np, cp, 0, 0xe0, 0, 0);
11263 else if (tp->ppr_negotiation == 1) {
11264
11265 /* First ppr command has received a M REJECT.
11266 * Do not change the existing wide/sync parameter
11267 * values (asyn/narrow if this as the first nego;
11268 * may be different if target initiates nego.).
11269 */
11270 tp->ppr_negotiation = 0;
11271 }
11272 else
11273 {
11274 tp->ppr_negotiation = 0;
11275 ncr_setwide (np, cp, 0, 0);
11276 }
11277 break;
11278 };
11279 np->msgin [0] = M_NOOP;
11280 np->msgout[0] = M_NOOP;
11281 cp->nego_status = 0;
11282 }
11283
11284 /*==========================================================
11285 **
11286 ** ncr chip handler for MESSAGE REJECT received for
11287 ** a WIDE or SYNCHRONOUS negotiation.
11288 **
11289 ** clear the PPR negotiation flag, all future nego.
11290 ** will be SDTR and WDTR
11291 **
11292 **==========================================================
11293 **
11294 ** Read comments above.
11295 **
11296 **----------------------------------------------------------
11297 */
11298 static void ncr_nego_rejected(ncb_p np, tcb_p tp, ccb_p cp)
11299 {
11300 ncr_nego_default(np, tp, cp);
11301 OUTB (HS_PRT, HS_BUSY);
11302 }
11303
11304
11305 /*==========================================================
11306 **
11307 **
11308 ** ncr chip exception handler for programmed interrupts.
11309 **
11310 **
11311 **==========================================================
11312 */
11313
11314 void ncr_int_sir (ncb_p np)
11315 {
11316 u_char num = INB (nc_dsps);
11317 u_long dsa = INL (nc_dsa);
11318 ccb_p cp = ncr_ccb_from_dsa(np, dsa);
11319 u_char target = INB (nc_sdid) & 0x0f;
11320 tcb_p tp = &np->target[target];
11321 int tmp;
11322
11323 if (DEBUG_FLAGS & DEBUG_TINY) printk ("I#%d", num);
11324
11325 switch (num) {
11326 /*
11327 ** See comments in the SCRIPTS code.
11328 */
11329 #ifdef SCSI_NCR_PCIQ_SYNC_ON_INTR
11330 case SIR_DUMMY_INTERRUPT:
11331 goto out;
11332 #endif
11333
11334 /*
11335 ** The C code is currently trying to recover from something.
11336 ** Typically, user want to abort some command.
11337 */
11338 case SIR_SCRIPT_STOPPED:
11339 case SIR_TARGET_SELECTED:
11340 case SIR_ABORT_SENT:
11341 case SIR_AUTO_SENSE_DONE:
11342 ncr_sir_task_recovery(np, num);
11343 return;
11344 /*
11345 ** The device didn't go to MSG OUT phase after having
11346 ** been selected with ATN. We donnot want to handle
11347 ** that.
11348 */
11349 case SIR_SEL_ATN_NO_MSG_OUT:
11350 printk ("%s:%d: No MSG OUT phase after selection with ATN.\n",
11351 ncr_name (np), target);
11352 goto out_stuck;
11353 /*
11354 ** The device didn't switch to MSG IN phase after
11355 ** having reseleted the initiator.
11356 */
11357 case SIR_RESEL_NO_MSG_IN:
11358 /*
11359 ** After reselection, the device sent a message that wasn't
11360 ** an IDENTIFY.
11361 */
11362 case SIR_RESEL_NO_IDENTIFY:
11363 /*
11364 ** If devices reselecting without sending an IDENTIFY
11365 ** message still exist, this should help.
11366 ** We just assume lun=0, 1 CCB, no tag.
11367 */
11368 if (tp->l0p) {
11369 OUTL (nc_dsa, scr_to_cpu(tp->l0p->tasktbl[0]));
11370 OUTL_DSP (NCB_SCRIPT_PHYS (np, resel_go));
11371 return;
11372 }
11373 /*
11374 ** The device reselected a LUN we donnot know of.
11375 */
11376 case SIR_RESEL_BAD_LUN:
11377 np->msgout[0] = M_RESET;
11378 goto out;
11379 /*
11380 ** The device reselected for an untagged nexus and we
11381 ** haven't any.
11382 */
11383 case SIR_RESEL_BAD_I_T_L:
11384 np->msgout[0] = M_ABORT;
11385 goto out;
11386 /*
11387 ** The device reselected for a tagged nexus that we donnot
11388 ** have.
11389 */
11390 case SIR_RESEL_BAD_I_T_L_Q:
11391 np->msgout[0] = M_ABORT_TAG;
11392 goto out;
11393 /*
11394 ** The SCRIPTS let us know that the device has grabbed
11395 ** our message and will abort the job.
11396 */
11397 case SIR_RESEL_ABORTED:
11398 np->lastmsg = np->msgout[0];
11399 np->msgout[0] = M_NOOP;
11400 printk ("%s:%d: message %x sent on bad reselection.\n",
11401 ncr_name (np), target, np->lastmsg);
11402 goto out;
11403 /*
11404 ** The SCRIPTS let us know that a message has been
11405 ** successfully sent to the device.
11406 */
11407 case SIR_MSG_OUT_DONE:
11408 np->lastmsg = np->msgout[0];
11409 np->msgout[0] = M_NOOP;
11410 /* Should we really care of that */
11411 if (np->lastmsg == M_PARITY || np->lastmsg == M_ID_ERROR) {
11412 if (cp) {
11413 cp->xerr_status &= ~XE_PARITY_ERR;
11414 if (!cp->xerr_status)
11415 OUTOFFB (HF_PRT, HF_EXT_ERR);
11416 }
11417 }
11418 goto out;
11419 /*
11420 ** The device didn't send a GOOD SCSI status.
11421 ** We may have some work to do prior to allow
11422 ** the SCRIPTS processor to continue.
11423 */
11424 case SIR_BAD_STATUS:
11425 if (!cp)
11426 goto out;
11427 ncr_sir_to_redo(np, num, cp);
11428 return;
11429 /*
11430 ** We are asked by the SCRIPTS to prepare a
11431 ** REJECT message.
11432 */
11433 case SIR_REJECT_TO_SEND:
11434 ncr_print_msg(cp, "M_REJECT to send for ", np->msgin);
11435 np->msgout[0] = M_REJECT;
11436 goto out;
11437 /*
11438 ** We have been ODD at the end of a DATA IN
11439 ** transfer and the device didn't send a
11440 ** IGNORE WIDE RESIDUE message.
11441 ** It is a data overrun condition.
11442 */
11443 case SIR_SWIDE_OVERRUN:
11444 if (cp) {
11445 OUTONB (HF_PRT, HF_EXT_ERR);
11446 cp->xerr_status |= XE_SWIDE_OVRUN;
11447 }
11448 goto out;
11449 /*
11450 ** We have been ODD at the end of a DATA OUT
11451 ** transfer.
11452 ** It is a data underrun condition.
11453 */
11454 case SIR_SODL_UNDERRUN:
11455 if (cp) {
11456 OUTONB (HF_PRT, HF_EXT_ERR);
11457 cp->xerr_status |= XE_SODL_UNRUN;
11458 }
11459 goto out;
11460 /*
11461 ** The device wants us to tranfer more data than
11462 ** expected or in the wrong direction.
11463 ** The number of extra bytes is in scratcha.
11464 ** It is a data overrun condition.
11465 */
11466 case SIR_DATA_OVERRUN:
11467 if (cp) {
11468 OUTONB (HF_PRT, HF_EXT_ERR);
11469 cp->xerr_status |= XE_EXTRA_DATA;
11470 cp->extra_bytes += INL (nc_scratcha);
11471 }
11472 goto out;
11473 /*
11474 ** The device switched to an illegal phase (4/5).
11475 */
11476 case SIR_BAD_PHASE:
11477 if (cp) {
11478 OUTONB (HF_PRT, HF_EXT_ERR);
11479 cp->xerr_status |= XE_BAD_PHASE;
11480 }
11481 goto out;
11482 /*
11483 ** We received a message.
11484 */
11485 case SIR_MSG_RECEIVED:
11486 if (!cp)
11487 goto out_stuck;
11488 switch (np->msgin [0]) {
11489 /*
11490 ** We received an extended message.
11491 ** We handle MODIFY DATA POINTER, SDTR, WDTR
11492 ** and reject all other extended messages.
11493 */
11494 case M_EXTENDED:
11495 switch (np->msgin [2]) {
11496 case M_X_MODIFY_DP:
11497 if (DEBUG_FLAGS & DEBUG_POINTER)
11498 ncr_print_msg(cp,"modify DP",np->msgin);
11499 tmp = (np->msgin[3]<<24) + (np->msgin[4]<<16) +
11500 (np->msgin[5]<<8) + (np->msgin[6]);
11501 ncr_modify_dp(np, tp, cp, tmp);
11502 return;
11503 case M_X_SYNC_REQ:
11504 ncr_sync_nego(np, tp, cp);
11505 return;
11506 case M_X_WIDE_REQ:
11507 ncr_wide_nego(np, tp, cp);
11508 return;
11509 case M_X_PPR_REQ:
11510 ncr_ppr_nego(np, tp, cp);
11511 return;
11512 default:
11513 goto out_reject;
11514 }
11515 break;
11516 /*
11517 ** We received a 1/2 byte message not handled from SCRIPTS.
11518 ** We are only expecting MESSAGE REJECT and IGNORE WIDE
11519 ** RESIDUE messages that haven't been anticipated by
11520 ** SCRIPTS on SWIDE full condition. Unanticipated IGNORE
11521 ** WIDE RESIDUE messages are aliased as MODIFY DP (-1).
11522 */
11523 case M_IGN_RESIDUE:
11524 if (DEBUG_FLAGS & DEBUG_POINTER)
11525 ncr_print_msg(cp,"ign wide residue", np->msgin);
11526 ncr_modify_dp(np, tp, cp, -1);
11527 return;
11528 case M_REJECT:
11529 if (INB (HS_PRT) == HS_NEGOTIATE)
11530 ncr_nego_rejected(np, tp, cp);
11531 else {
11532 PRINT_ADDR(cp->cmd);
11533 printk ("M_REJECT received (%x:%x).\n",
11534 scr_to_cpu(np->lastmsg), np->msgout[0]);
11535 }
11536 goto out_clrack;
11537 break;
11538 default:
11539 goto out_reject;
11540 }
11541 break;
11542 /*
11543 ** We received an unknown message.
11544 ** Ignore all MSG IN phases and reject it.
11545 */
11546 case SIR_MSG_WEIRD:
11547 ncr_print_msg(cp, "WEIRD message received", np->msgin);
11548 OUTL_DSP (NCB_SCRIPTH_PHYS (np, msg_weird));
11549 return;
11550 /*
11551 ** Negotiation failed.
11552 ** Target does not send us the reply.
11553 ** Remove the HS_NEGOTIATE status.
11554 */
11555 case SIR_NEGO_FAILED:
11556 OUTB (HS_PRT, HS_BUSY);
11557 /*
11558 ** Negotiation failed.
11559 ** Target does not want answer message.
11560 */
11561 case SIR_NEGO_PROTO:
11562 ncr_nego_default(np, tp, cp);
11563 goto out;
11564 };
11565
11566 out:
11567 OUTONB_STD ();
11568 return;
11569 out_reject:
11570 OUTL_DSP (NCB_SCRIPTH_PHYS (np, msg_bad));
11571 return;
11572 out_clrack:
11573 OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack));
11574 return;
11575 out_stuck:
11576 return;
11577 }
11578
11579
11580 /*==========================================================
11581 **
11582 **
11583 ** Acquire a control block
11584 **
11585 **
11586 **==========================================================
11587 */
11588
11589 static ccb_p ncr_get_ccb (ncb_p np, u_char tn, u_char ln)
11590 {
11591 tcb_p tp = &np->target[tn];
11592 lcb_p lp = ncr_lp(np, tp, ln);
11593 u_short tag = NO_TAG;
11594 XPT_QUEHEAD *qp;
11595 ccb_p cp = (ccb_p) 0;
11596
11597 /*
11598 ** Allocate a new CCB if needed.
11599 */
11600 if (xpt_que_empty(&np->free_ccbq))
11601 (void) ncr_alloc_ccb(np);
11602
11603 /*
11604 ** Look for a free CCB
11605 */
11606 qp = xpt_remque_head(&np->free_ccbq);
11607 if (!qp)
11608 goto out;
11609 cp = xpt_que_entry(qp, struct ccb, link_ccbq);
11610
11611 /*
11612 ** If the LCB is not yet available and we already
11613 ** have queued a CCB for a LUN without LCB,
11614 ** give up. Otherwise all is fine. :-)
11615 */
11616 if (!lp) {
11617 if (xpt_que_empty(&np->b0_ccbq))
11618 xpt_insque_head(&cp->link_ccbq, &np->b0_ccbq);
11619 else
11620 goto out_free;
11621 } else {
11622 /*
11623 ** Tune tag mode if asked by user.
11624 */
11625 if (lp->queuedepth != lp->numtags) {
11626 ncr_setup_tags(np, tn, ln);
11627 }
11628
11629 /*
11630 ** Get a tag for this nexus if required.
11631 ** Keep from using more tags than we can handle.
11632 */
11633 if (lp->usetags) {
11634 if (lp->busyccbs < lp->maxnxs) {
11635 tag = lp->cb_tags[lp->ia_tag];
11636 ++lp->ia_tag;
11637 if (lp->ia_tag == MAX_TAGS)
11638 lp->ia_tag = 0;
11639 cp->tags_si = lp->tags_si;
11640 ++lp->tags_sum[cp->tags_si];
11641 }
11642 else
11643 goto out_free;
11644 }
11645
11646 /*
11647 ** Put the CCB in the LUN wait queue and
11648 ** count it as busy.
11649 */
11650 xpt_insque_tail(&cp->link_ccbq, &lp->wait_ccbq);
11651 ++lp->busyccbs;
11652 }
11653
11654 /*
11655 ** Remember all informations needed to free this CCB.
11656 */
11657 cp->to_abort = 0;
11658 cp->tag = tag;
11659 cp->target = tn;
11660 cp->lun = ln;
11661
11662 if (DEBUG_FLAGS & DEBUG_TAGS) {
11663 PRINT_LUN(np, tn, ln);
11664 printk ("ccb @%p using tag %d.\n", cp, tag);
11665 }
11666
11667 out:
11668 return cp;
11669 out_free:
11670 xpt_insque_head(&cp->link_ccbq, &np->free_ccbq);
11671 return (ccb_p) 0;
11672 }
11673
11674 /*==========================================================
11675 **
11676 **
11677 ** Release one control block
11678 **
11679 **
11680 **==========================================================
11681 */
11682
11683 static void ncr_free_ccb (ncb_p np, ccb_p cp)
11684 {
11685 tcb_p tp = &np->target[cp->target];
11686 lcb_p lp = ncr_lp(np, tp, cp->lun);
11687
11688 if (DEBUG_FLAGS & DEBUG_TAGS) {
11689 PRINT_LUN(np, cp->target, cp->lun);
11690 printk ("ccb @%p freeing tag %d.\n", cp, cp->tag);
11691 }
11692
11693 /*
11694 ** If lun control block available, make available
11695 ** the task slot and the tag if any.
11696 ** Decrement counters.
11697 */
11698 if (lp) {
11699 if (cp->tag != NO_TAG) {
11700 lp->cb_tags[lp->if_tag++] = cp->tag;
11701 if (lp->if_tag == MAX_TAGS)
11702 lp->if_tag = 0;
11703 --lp->tags_sum[cp->tags_si];
11704 lp->tasktbl[cp->tag] = cpu_to_scr(np->p_bad_i_t_l_q);
11705 } else {
11706 lp->tasktbl[0] = cpu_to_scr(np->p_bad_i_t_l);
11707 }
11708 --lp->busyccbs;
11709 if (cp->queued) {
11710 --lp->queuedccbs;
11711 }
11712 }
11713
11714 /*
11715 ** Make this CCB available.
11716 */
11717 xpt_remque(&cp->link_ccbq);
11718 xpt_insque_head(&cp->link_ccbq, &np->free_ccbq);
11719 cp -> host_status = HS_IDLE;
11720 cp -> queued = 0;
11721 }
11722
11723 /*------------------------------------------------------------------------
11724 ** Allocate a CCB and initialize its fixed part.
11725 **------------------------------------------------------------------------
11726 **------------------------------------------------------------------------
11727 */
11728 static ccb_p ncr_alloc_ccb(ncb_p np)
11729 {
11730 ccb_p cp = 0;
11731 int hcode;
11732
11733 /*
11734 ** Allocate memory for this CCB.
11735 */
11736 cp = m_calloc_dma(sizeof(struct ccb), "CCB");
11737 if (!cp)
11738 return 0;
11739
11740 /*
11741 ** Count it and initialyze it.
11742 */
11743 np->actccbs++;
11744
11745 /*
11746 ** Remember virtual and bus address of this ccb.
11747 */
11748 cp->p_ccb = vtobus(cp);
11749
11750 /*
11751 ** Insert this ccb into the hashed list.
11752 */
11753 hcode = CCB_HASH_CODE(cp->p_ccb);
11754 cp->link_ccbh = np->ccbh[hcode];
11755 np->ccbh[hcode] = cp;
11756
11757 /*
11758 ** Initialyze the start and restart actions.
11759 */
11760 cp->phys.header.go.start = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
11761 cp->phys.header.go.restart = cpu_to_scr(NCB_SCRIPTH_PHYS(np,bad_i_t_l));
11762
11763 /*
11764 ** Initilialyze some other fields.
11765 */
11766 cp->phys.smsg_ext.addr = cpu_to_scr(NCB_PHYS(np, msgin[2]));
11767
11768 /*
11769 ** Chain into wakeup list and free ccb queue.
11770 */
11771 cp->link_ccb = np->ccbc;
11772 np->ccbc = cp;
11773
11774 xpt_insque_head(&cp->link_ccbq, &np->free_ccbq);
11775
11776 return cp;
11777 }
11778
11779 /*------------------------------------------------------------------------
11780 ** Look up a CCB from a DSA value.
11781 **------------------------------------------------------------------------
11782 **------------------------------------------------------------------------
11783 */
11784 static ccb_p ncr_ccb_from_dsa(ncb_p np, u_long dsa)
11785 {
11786 int hcode;
11787 ccb_p cp;
11788
11789 hcode = CCB_HASH_CODE(dsa);
11790 cp = np->ccbh[hcode];
11791 while (cp) {
11792 if (cp->p_ccb == dsa)
11793 break;
11794 cp = cp->link_ccbh;
11795 }
11796
11797 return cp;
11798 }
11799
11800 /*==========================================================
11801 **
11802 **
11803 ** Allocation of resources for Targets/Luns/Tags.
11804 **
11805 **
11806 **==========================================================
11807 */
11808
11809
11810 /*------------------------------------------------------------------------
11811 ** Target control block initialisation.
11812 **------------------------------------------------------------------------
11813 ** This data structure is fully initialized after a SCSI command
11814 ** has been successfully completed for this target.
11815 **------------------------------------------------------------------------
11816 */
11817 static void ncr_init_tcb (ncb_p np, u_char tn)
11818 {
11819 /*
11820 ** Check some alignments required by the chip.
11821 */
11822 assert (( (offsetof(struct ncr_reg, nc_sxfer) ^
11823 offsetof(struct tcb , sval )) &3) == 0);
11824 assert (( (offsetof(struct ncr_reg, nc_scntl3) ^
11825 offsetof(struct tcb , wval )) &3) == 0);
11826 if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
11827 (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)){
11828 assert (( (offsetof(struct ncr_reg, nc_scntl4) ^
11829 offsetof(struct tcb , uval )) &3) == 0);
11830 }
11831 }
11832
11833 /*------------------------------------------------------------------------
11834 ** Lun control block allocation and initialization.
11835 **------------------------------------------------------------------------
11836 ** This data structure is allocated and initialized after a SCSI
11837 ** command has been successfully completed for this target/lun.
11838 **------------------------------------------------------------------------
11839 */
11840 static lcb_p ncr_alloc_lcb (ncb_p np, u_char tn, u_char ln)
11841 {
11842 tcb_p tp = &np->target[tn];
11843 lcb_p lp = ncr_lp(np, tp, ln);
11844
11845 /*
11846 ** Already done, return.
11847 */
11848 if (lp)
11849 return lp;
11850
11851 /*
11852 ** Initialize the target control block if not yet.
11853 */
11854 ncr_init_tcb(np, tn);
11855
11856 /*
11857 ** Allocate the lcb bus address array.
11858 ** Compute the bus address of this table.
11859 */
11860 if (ln && !tp->luntbl) {
11861 int i;
11862
11863 tp->luntbl = m_calloc_dma(256, "LUNTBL");
11864 if (!tp->luntbl)
11865 goto fail;
11866 for (i = 0 ; i < 64 ; i++)
11867 tp->luntbl[i] = cpu_to_scr(NCB_PHYS(np, resel_badlun));
11868 tp->b_luntbl = cpu_to_scr(vtobus(tp->luntbl));
11869 }
11870
11871 /*
11872 ** Allocate the table of pointers for LUN(s) > 0, if needed.
11873 */
11874 if (ln && !tp->lmp) {
11875 tp->lmp = m_calloc(MAX_LUN * sizeof(lcb_p), "LMP");
11876 if (!tp->lmp)
11877 goto fail;
11878 }
11879
11880 /*
11881 ** Allocate the lcb.
11882 ** Make it available to the chip.
11883 */
11884 lp = m_calloc_dma(sizeof(struct lcb), "LCB");
11885 if (!lp)
11886 goto fail;
11887 if (ln) {
11888 tp->lmp[ln] = lp;
11889 tp->luntbl[ln] = cpu_to_scr(vtobus(lp));
11890 }
11891 else {
11892 tp->l0p = lp;
11893 tp->b_lun0 = cpu_to_scr(vtobus(lp));
11894 }
11895
11896 /*
11897 ** Initialize the CCB queue headers.
11898 */
11899 xpt_que_init(&lp->busy_ccbq);
11900 xpt_que_init(&lp->wait_ccbq);
11901
11902 /*
11903 ** Set max CCBs to 1 and use the default task array
11904 ** by default.
11905 */
11906 lp->maxnxs = 1;
11907 lp->tasktbl = &lp->tasktbl_0;
11908 lp->b_tasktbl = cpu_to_scr(vtobus(lp->tasktbl));
11909 lp->tasktbl[0] = cpu_to_scr(np->p_notask);
11910 lp->resel_task = cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_notag));
11911
11912 /*
11913 ** Initialize command queuing control.
11914 */
11915 lp->busyccbs = 1;
11916 lp->queuedccbs = 1;
11917 lp->queuedepth = 1;
11918 fail:
11919 return lp;
11920 }
11921
11922
11923 /*------------------------------------------------------------------------
11924 ** Lun control block setup on INQUIRY data received.
11925 **------------------------------------------------------------------------
11926 ** We only support WIDE, SYNC for targets and CMDQ for logical units.
11927 ** This setup is done on each INQUIRY since we are expecting user
11928 ** will play with CHANGE DEFINITION commands. :-)
11929 **------------------------------------------------------------------------
11930 */
11931 static lcb_p ncr_setup_lcb (ncb_p np, u_char tn, u_char ln, u_char *inq_data)
11932 {
11933 tcb_p tp = &np->target[tn];
11934 lcb_p lp = ncr_lp(np, tp, ln);
11935 u_char inq_byte7;
11936 int i;
11937
11938 /*
11939 ** If no lcb, try to allocate it.
11940 */
11941 if (!lp && !(lp = ncr_alloc_lcb(np, tn, ln)))
11942 goto fail;
11943
11944 #if 0 /* No more used. Left here as provision */
11945 /*
11946 ** Get device quirks.
11947 */
11948 tp->quirks = 0;
11949 if (tp->quirks && bootverbose) {
11950 PRINT_LUN(np, tn, ln);
11951 printk ("quirks=%x.\n", tp->quirks);
11952 }
11953 #endif
11954
11955 /*
11956 ** Evaluate trustable target/unit capabilities.
11957 ** We only believe device version >= SCSI-2 that
11958 ** use appropriate response data format (2).
11959 ** But it seems that some CCS devices also
11960 ** support SYNC and I donnot want to frustrate
11961 ** anybody. ;-)
11962 */
11963 inq_byte7 = 0;
11964 if ((inq_data[2] & 0x7) >= 2 && (inq_data[3] & 0xf) == 2)
11965 inq_byte7 = inq_data[7];
11966 else if ((inq_data[2] & 0x7) == 1 && (inq_data[3] & 0xf) == 1)
11967 inq_byte7 = INQ7_SYNC;
11968
11969 /*
11970 ** Throw away announced LUN capabilities if we are told
11971 ** that there is no real device supported by the logical unit.
11972 */
11973 if ((inq_data[0] & 0xe0) > 0x20 || (inq_data[0] & 0x1f) == 0x1f)
11974 inq_byte7 &= (INQ7_SYNC | INQ7_WIDE16);
11975
11976 /*
11977 ** If user is wanting SYNC, force this feature.
11978 */
11979 if (driver_setup.force_sync_nego)
11980 inq_byte7 |= INQ7_SYNC;
11981
11982 /*
11983 ** Prepare negotiation if SIP capabilities have changed.
11984 */
11985 tp->inq_done = 1;
11986 if ((inq_byte7 ^ tp->inq_byte7) & (INQ7_SYNC | INQ7_WIDE16)) {
11987 tp->inq_byte7 = inq_byte7;
11988 ncr_negotiate(np, tp);
11989 }
11990
11991 /*
11992 ** If unit supports tagged commands, allocate and
11993 ** initialyze the task table if not yet.
11994 */
11995 if ((inq_byte7 & INQ7_QUEUE) && lp->tasktbl == &lp->tasktbl_0) {
11996 lp->tasktbl = m_calloc_dma(MAX_TASKS*4, "TASKTBL");
11997 if (!lp->tasktbl) {
11998 lp->tasktbl = &lp->tasktbl_0;
11999 goto fail;
12000 }
12001 lp->b_tasktbl = cpu_to_scr(vtobus(lp->tasktbl));
12002 for (i = 0 ; i < MAX_TASKS ; i++)
12003 lp->tasktbl[i] = cpu_to_scr(np->p_notask);
12004
12005 lp->cb_tags = m_calloc(MAX_TAGS, "CB_TAGS");
12006 if (!lp->cb_tags)
12007 goto fail;
12008 for (i = 0 ; i < MAX_TAGS ; i++)
12009 lp->cb_tags[i] = i;
12010
12011 lp->maxnxs = MAX_TAGS;
12012 lp->tags_stime = ktime_get(3*HZ);
12013 }
12014
12015 /*
12016 ** Adjust tagged queueing status if needed.
12017 */
12018 if ((inq_byte7 ^ lp->inq_byte7) & INQ7_QUEUE) {
12019 lp->inq_byte7 = inq_byte7;
12020 lp->numtags = lp->maxtags;
12021 ncr_setup_tags (np, tn, ln);
12022 }
12023
12024 fail:
12025 return lp;
12026 }
12027
12028 /*==========================================================
12029 **
12030 **
12031 ** Build Scatter Gather Block
12032 **
12033 **
12034 **==========================================================
12035 **
12036 ** The transfer area may be scattered among
12037 ** several non adjacent physical pages.
12038 **
12039 ** We may use MAX_SCATTER blocks.
12040 **
12041 **----------------------------------------------------------
12042 */
12043
12044 /*
12045 ** We try to reduce the number of interrupts caused
12046 ** by unexpected phase changes due to disconnects.
12047 ** A typical harddisk may disconnect before ANY block.
12048 ** If we wanted to avoid unexpected phase changes at all
12049 ** we had to use a break point every 512 bytes.
12050 ** Of course the number of scatter/gather blocks is
12051 ** limited.
12052 ** Under Linux, the scatter/gatter blocks are provided by
12053 ** the generic driver. We just have to copy addresses and
12054 ** sizes to the data segment array.
12055 */
12056
12057 /*
12058 ** For 64 bit systems, we use the 8 upper bits of the size field
12059 ** to provide bus address bits 32-39 to the SCRIPTS processor.
12060 ** This allows the 895A and 896 to address up to 1 TB of memory.
12061 ** For 32 bit chips on 64 bit systems, we must be provided with
12062 ** memory addresses that fit into the first 32 bit bus address
12063 ** range and so, this does not matter and we expect an error from
12064 ** the chip if this ever happen.
12065 **
12066 ** We use a separate function for the case Linux does not provide
12067 ** a scatter list in order to allow better code optimization
12068 ** for the case we have a scatter list (BTW, for now this just wastes
12069 ** about 40 bytes of code for x86, but my guess is that the scatter
12070 ** code will get more complex later).
12071 */
12072
12073 #ifdef SCSI_NCR_USE_64BIT_DAC
12074 #define SCATTER_ONE(data, badd, len) \
12075 (data)->addr = cpu_to_scr(badd); \
12076 (data)->size = cpu_to_scr((((badd) >> 8) & 0xff000000) + len);
12077 #else
12078 #define SCATTER_ONE(data, badd, len) \
12079 (data)->addr = cpu_to_scr(badd); \
12080 (data)->size = cpu_to_scr(len);
12081 #endif
12082
12083 #define CROSS_16MB(p, n) (((((u_long) p) + n - 1) ^ ((u_long) p)) & ~0xffffff)
12084
12085 static int ncr_scatter_no_sglist(ncb_p np, ccb_p cp, Scsi_Cmnd *cmd)
12086 {
12087 struct scr_tblmove *data = &cp->phys.data[MAX_SCATTER-1];
12088 int segment;
12089
12090 cp->data_len = cmd->request_bufflen;
12091
12092 if (cmd->request_bufflen) {
12093 u_long baddr = map_scsi_single_data(np, cmd);
12094
12095 SCATTER_ONE(data, baddr, cmd->request_bufflen);
12096 if (CROSS_16MB(baddr, cmd->request_bufflen)) {
12097 cp->host_flags |= HF_PM_TO_C;
12098 #ifdef DEBUG_896R1
12099 printk("He! we are crossing a 16 MB boundary (0x%lx, 0x%x)\n",
12100 baddr, cmd->request_bufflen);
12101 #endif
12102 }
12103 segment = 1;
12104 }
12105 else
12106 segment = 0;
12107
12108 return segment;
12109 }
12110
12111 /*
12112 ** DEL 472 - 53C896 Rev 1 - Part Number 609-0393055 - ITEM 5.
12113 **
12114 ** We disable data phase mismatch handling from SCRIPTS for data
12115 ** transfers that contains scatter/gather entries that cross
12116 ** a 16 MB boundary.
12117 ** We use a different scatter function for 896 rev. 1 that needs
12118 ** such a work-around. Doing so, we do not affect performance for
12119 ** other chips.
12120 ** This problem should not be triggered for disk IOs under Linux,
12121 ** since such IOs are performed using pages and buffers that are
12122 ** nicely power-of-two sized and aligned. But, since this may change
12123 ** at any time, a work-around was required.
12124 */
12125 static int ncr_scatter_896R1(ncb_p np, ccb_p cp, Scsi_Cmnd *cmd)
12126 {
12127 int segn;
12128 int use_sg = (int) cmd->use_sg;
12129
12130 cp->data_len = 0;
12131
12132 if (!use_sg)
12133 segn = ncr_scatter_no_sglist(np, cp, cmd);
12134 else if (use_sg > MAX_SCATTER)
12135 segn = -1;
12136 else {
12137 struct scatterlist *scatter = (struct scatterlist *)cmd->buffer;
12138 struct scr_tblmove *data;
12139
12140 use_sg = map_scsi_sg_data(np, cmd);
12141 data = &cp->phys.data[MAX_SCATTER - use_sg];
12142
12143 for (segn = 0; segn < use_sg; segn++) {
12144 u_long baddr = scsi_sg_dma_address(&scatter[segn]);
12145 unsigned int len = scsi_sg_dma_len(&scatter[segn]);
12146
12147 SCATTER_ONE(&data[segn],
12148 baddr,
12149 len);
12150 if (CROSS_16MB(baddr, scatter[segn].length)) {
12151 cp->host_flags |= HF_PM_TO_C;
12152 #ifdef DEBUG_896R1
12153 printk("He! we are crossing a 16 MB boundary (0x%lx, 0x%x)\n",
12154 baddr, scatter[segn].length);
12155 #endif
12156 }
12157 cp->data_len += len;
12158 }
12159 }
12160
12161 return segn;
12162 }
12163
12164 static int ncr_scatter(ncb_p np, ccb_p cp, Scsi_Cmnd *cmd)
12165 {
12166 int segment;
12167 int use_sg = (int) cmd->use_sg;
12168
12169 cp->data_len = 0;
12170
12171 if (!use_sg)
12172 segment = ncr_scatter_no_sglist(np, cp, cmd);
12173 else if (use_sg > MAX_SCATTER)
12174 segment = -1;
12175 else {
12176 struct scatterlist *scatter = (struct scatterlist *)cmd->buffer;
12177 struct scr_tblmove *data;
12178
12179 use_sg = map_scsi_sg_data(np, cmd);
12180 data = &cp->phys.data[MAX_SCATTER - use_sg];
12181
12182 for (segment = 0; segment < use_sg; segment++) {
12183 u_long baddr = scsi_sg_dma_address(&scatter[segment]);
12184 unsigned int len = scsi_sg_dma_len(&scatter[segment]);
12185
12186 SCATTER_ONE(&data[segment],
12187 baddr,
12188 len);
12189 cp->data_len += len;
12190 }
12191 }
12192
12193 return segment;
12194 }
12195
12196 /*==========================================================
12197 **
12198 **
12199 ** Test the pci bus snoop logic :-(
12200 **
12201 ** Has to be called with interrupts disabled.
12202 **
12203 **
12204 **==========================================================
12205 */
12206
12207 #ifndef SCSI_NCR_IOMAPPED
12208 static int __init ncr_regtest (struct ncb* np)
12209 {
12210 register volatile u_int32 data;
12211 /*
12212 ** ncr registers may NOT be cached.
12213 ** write 0xffffffff to a read only register area,
12214 ** and try to read it back.
12215 */
12216 data = 0xffffffff;
12217 OUTL_OFF(offsetof(struct ncr_reg, nc_dstat), data);
12218 data = INL_OFF(offsetof(struct ncr_reg, nc_dstat));
12219 #if 1
12220 if (data == 0xffffffff) {
12221 #else
12222 if ((data & 0xe2f0fffd) != 0x02000080) {
12223 #endif
12224 printk ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
12225 (unsigned) data);
12226 return (0x10);
12227 };
12228 return (0);
12229 }
12230 #endif
12231
12232 static int __init ncr_snooptest (struct ncb* np)
12233 {
12234 u_int32 ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc;
12235 u_char dstat;
12236 int i, err=0;
12237 #ifndef SCSI_NCR_IOMAPPED
12238 if (np->reg) {
12239 err |= ncr_regtest (np);
12240 if (err) return (err);
12241 }
12242 #endif
12243 restart_test:
12244 /*
12245 ** Enable Master Parity Checking as we intend
12246 ** to enable it for normal operations.
12247 */
12248 OUTB (nc_ctest4, (np->rv_ctest4 & MPEE));
12249 /*
12250 ** init
12251 */
12252 pc = NCB_SCRIPTH0_PHYS (np, snooptest);
12253 host_wr = 1;
12254 ncr_wr = 2;
12255 /*
12256 ** Set memory and register.
12257 */
12258 np->ncr_cache = cpu_to_scr(host_wr);
12259 OUTL (nc_temp, ncr_wr);
12260 /*
12261 ** Start script (exchange values)
12262 */
12263 OUTL (nc_dsa, np->p_ncb);
12264 OUTL_DSP (pc);
12265 /*
12266 ** Wait 'til done (with timeout)
12267 */
12268 for (i=0; i<NCR_SNOOP_TIMEOUT; i++)
12269 if (INB(nc_istat) & (INTF|SIP|DIP))
12270 break;
12271 if (i>=NCR_SNOOP_TIMEOUT) {
12272 printk ("CACHE TEST FAILED: timeout.\n");
12273 return (0x20);
12274 };
12275 /*
12276 ** Check for fatal DMA errors.
12277 */
12278 dstat = INB (nc_dstat);
12279 #if 1 /* Band aiding for broken hardwares that fail PCI parity */
12280 if ((dstat & MDPE) && (np->rv_ctest4 & MPEE)) {
12281 printk ("%s: PCI DATA PARITY ERROR DETECTED - "
12282 "DISABLING MASTER DATA PARITY CHECKING.\n",
12283 ncr_name(np));
12284 np->rv_ctest4 &= ~MPEE;
12285 goto restart_test;
12286 }
12287 #endif
12288 if (dstat & (MDPE|BF|IID)) {
12289 printk ("CACHE TEST FAILED: DMA error (dstat=0x%02x).", dstat);
12290 return (0x80);
12291 }
12292 /*
12293 ** Save termination position.
12294 */
12295 pc = INL (nc_dsp);
12296 /*
12297 ** Read memory and register.
12298 */
12299 host_rd = scr_to_cpu(np->ncr_cache);
12300 ncr_rd = INL (nc_scratcha);
12301 ncr_bk = INL (nc_temp);
12302 /*
12303 ** Check termination position.
12304 */
12305 if (pc != NCB_SCRIPTH0_PHYS (np, snoopend)+8) {
12306 printk ("CACHE TEST FAILED: script execution failed.\n");
12307 printk ("start=%08lx, pc=%08lx, end=%08lx\n",
12308 (u_long) NCB_SCRIPTH0_PHYS (np, snooptest), (u_long) pc,
12309 (u_long) NCB_SCRIPTH0_PHYS (np, snoopend) +8);
12310 return (0x40);
12311 };
12312 /*
12313 ** Show results.
12314 */
12315 if (host_wr != ncr_rd) {
12316 printk ("CACHE TEST FAILED: host wrote %d, ncr read %d.\n",
12317 (int) host_wr, (int) ncr_rd);
12318 err |= 1;
12319 };
12320 if (host_rd != ncr_wr) {
12321 printk ("CACHE TEST FAILED: ncr wrote %d, host read %d.\n",
12322 (int) ncr_wr, (int) host_rd);
12323 err |= 2;
12324 };
12325 if (ncr_bk != ncr_wr) {
12326 printk ("CACHE TEST FAILED: ncr wrote %d, read back %d.\n",
12327 (int) ncr_wr, (int) ncr_bk);
12328 err |= 4;
12329 };
12330 return (err);
12331 }
12332
12333 /*==========================================================
12334 **
12335 ** Determine the ncr's clock frequency.
12336 ** This is essential for the negotiation
12337 ** of the synchronous transfer rate.
12338 **
12339 **==========================================================
12340 **
12341 ** Note: we have to return the correct value.
12342 ** THERE IS NO SAFE DEFAULT VALUE.
12343 **
12344 ** Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
12345 ** 53C860 and 53C875 rev. 1 support fast20 transfers but
12346 ** do not have a clock doubler and so are provided with a
12347 ** 80 MHz clock. All other fast20 boards incorporate a doubler
12348 ** and so should be delivered with a 40 MHz clock.
12349 ** The recent fast40 chips (895/896/895A) and the
12350 ** fast80 chip (C1010) use a 40 Mhz base clock
12351 ** and provide a clock quadrupler (160 Mhz). The code below
12352 ** tries to deal as cleverly as possible with all this stuff.
12353 **
12354 **----------------------------------------------------------
12355 */
12356
12357 /*
12358 * Select NCR SCSI clock frequency
12359 */
12360 static void ncr_selectclock(ncb_p np, u_char scntl3)
12361 {
12362 if (np->multiplier < 2) {
12363 OUTB(nc_scntl3, scntl3);
12364 return;
12365 }
12366
12367 if (bootverbose >= 2)
12368 printk ("%s: enabling clock multiplier\n", ncr_name(np));
12369
12370 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */
12371
12372 if ( (np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
12373 (np->device_id != PCI_DEVICE_ID_LSI_53C1010_66) &&
12374 (np->multiplier > 2)) {
12375 int i = 20; /* Poll bit 5 of stest4 for quadrupler */
12376 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0)
12377 UDELAY (20);
12378 if (!i)
12379 printk("%s: the chip cannot lock the frequency\n",
12380 ncr_name(np));
12381
12382 } else /* Wait 120 micro-seconds for multiplier*/
12383 UDELAY (120);
12384
12385 OUTB(nc_stest3, HSC); /* Halt the scsi clock */
12386 OUTB(nc_scntl3, scntl3);
12387 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
12388 OUTB(nc_stest3, 0x00); /* Restart scsi clock */
12389 }
12390
12391
12392 /*
12393 * calculate NCR SCSI clock frequency (in KHz)
12394 */
12395 static unsigned __init ncrgetfreq (ncb_p np, int gen)
12396 {
12397 unsigned int ms = 0;
12398 unsigned int f;
12399 int count;
12400
12401 /*
12402 * Measure GEN timer delay in order
12403 * to calculate SCSI clock frequency
12404 *
12405 * This code will never execute too
12406 * many loop iterations (if DELAY is
12407 * reasonably correct). It could get
12408 * too low a delay (too high a freq.)
12409 * if the CPU is slow executing the
12410 * loop for some reason (an NMI, for
12411 * example). For this reason we will
12412 * if multiple measurements are to be
12413 * performed trust the higher delay
12414 * (lower frequency returned).
12415 */
12416 OUTW (nc_sien , 0x0);/* mask all scsi interrupts */
12417 /* enable general purpose timer */
12418 (void) INW (nc_sist); /* clear pending scsi interrupt */
12419 OUTB (nc_dien , 0); /* mask all dma interrupts */
12420 (void) INW (nc_sist); /* another one, just to be sure :) */
12421 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */
12422 OUTB (nc_stime1, 0); /* disable general purpose timer */
12423 OUTB (nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */
12424 /* Temporary fix for udelay issue with Alpha
12425 platform */
12426 while (!(INW(nc_sist) & GEN) && ms++ < 100000) {
12427 /* count 1ms */
12428 for (count = 0; count < 10; count++)
12429 UDELAY (100);
12430 }
12431 OUTB (nc_stime1, 0); /* disable general purpose timer */
12432 /*
12433 * set prescaler to divide by whatever 0 means
12434 * 0 ought to choose divide by 2, but appears
12435 * to set divide by 3.5 mode in my 53c810 ...
12436 */
12437 OUTB (nc_scntl3, 0);
12438
12439 /*
12440 * adjust for prescaler, and convert into KHz
12441 * scale values derived empirically.
12442 */
12443 f = ms ? ((1 << gen) * 4340) / ms : 0;
12444
12445 if (bootverbose >= 2)
12446 printk ("%s: Delay (GEN=%d): %u msec, %u KHz\n",
12447 ncr_name(np), gen, ms, f);
12448
12449 return f;
12450 }
12451
12452 static unsigned __init ncr_getfreq (ncb_p np)
12453 {
12454 u_int f1, f2;
12455 int gen = 11;
12456
12457 (void) ncrgetfreq (np, gen); /* throw away first result */
12458 f1 = ncrgetfreq (np, gen);
12459 f2 = ncrgetfreq (np, gen);
12460 if (f1 > f2) f1 = f2; /* trust lower result */
12461 return f1;
12462 }
12463
12464 /*
12465 * Get/probe NCR SCSI clock frequency
12466 */
12467 static void __init ncr_getclock (ncb_p np, int mult)
12468 {
12469 unsigned char scntl3 = np->sv_scntl3;
12470 unsigned char stest1 = np->sv_stest1;
12471 unsigned f1;
12472
12473 np->multiplier = 1;
12474 f1 = 40000;
12475
12476 /*
12477 ** True with 875/895/896/895A with clock multiplier selected
12478 */
12479 if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) {
12480 if (bootverbose >= 2)
12481 printk ("%s: clock multiplier found\n", ncr_name(np));
12482 np->multiplier = mult;
12483 }
12484
12485 /*
12486 ** If multiplier not found or scntl3 not 7,5,3,
12487 ** reset chip and get frequency from general purpose timer.
12488 ** Otherwise trust scntl3 BIOS setting.
12489 */
12490 if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
12491 OUTB (nc_stest1, 0); /* make sure doubler is OFF */
12492 f1 = ncr_getfreq (np);
12493
12494 if (bootverbose)
12495 printk ("%s: NCR clock is %uKHz\n", ncr_name(np), f1);
12496
12497 if (f1 < 55000) f1 = 40000;
12498 else f1 = 80000;
12499
12500 /*
12501 ** Suggest to also check the PCI clock frequency
12502 ** to make sure our frequency calculation algorithm
12503 ** is not too biased.
12504 */
12505 if (np->features & FE_66MHZ) {
12506 np->pciclock_min = (66000*55+80-1)/80;
12507 np->pciclock_max = (66000*55)/40;
12508 }
12509 else {
12510 np->pciclock_min = (33000*55+80-1)/80;
12511 np->pciclock_max = (33000*55)/40;
12512 }
12513
12514 if (f1 == 40000 && mult > 1) {
12515 if (bootverbose >= 2)
12516 printk ("%s: clock multiplier assumed\n", ncr_name(np));
12517 np->multiplier = mult;
12518 }
12519 } else {
12520 if ((scntl3 & 7) == 3) f1 = 40000;
12521 else if ((scntl3 & 7) == 5) f1 = 80000;
12522 else f1 = 160000;
12523
12524 f1 /= np->multiplier;
12525 }
12526
12527 /*
12528 ** Compute controller synchronous parameters.
12529 */
12530 f1 *= np->multiplier;
12531 np->clock_khz = f1;
12532 }
12533
12534 /*
12535 * Get/probe PCI clock frequency
12536 */
12537 static u_int __init ncr_getpciclock (ncb_p np)
12538 {
12539 static u_int f;
12540
12541 OUTB (nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
12542 f = ncr_getfreq (np);
12543 OUTB (nc_stest1, 0);
12544
12545 return f;
12546 }
12547
12548 /*===================== LINUX ENTRY POINTS SECTION ==========================*/
12549
12550 #ifndef uchar
12551 #define uchar unsigned char
12552 #endif
12553
12554 #ifndef ushort
12555 #define ushort unsigned short
12556 #endif
12557
12558 #ifndef ulong
12559 #define ulong unsigned long
12560 #endif
12561
12562 /* ---------------------------------------------------------------------
12563 **
12564 ** Driver setup from the boot command line
12565 **
12566 ** ---------------------------------------------------------------------
12567 */
12568
12569 #ifdef MODULE
12570 #define ARG_SEP ' '
12571 #else
12572 #define ARG_SEP ','
12573 #endif
12574
12575 #define OPT_TAGS 1
12576 #define OPT_MASTER_PARITY 2
12577 #define OPT_SCSI_PARITY 3
12578 #define OPT_DISCONNECTION 4
12579 #define OPT_SPECIAL_FEATURES 5
12580 #define OPT_RESERVED_1 6
12581 #define OPT_FORCE_SYNC_NEGO 7
12582 #define OPT_REVERSE_PROBE 8
12583 #define OPT_DEFAULT_SYNC 9
12584 #define OPT_VERBOSE 10
12585 #define OPT_DEBUG 11
12586 #define OPT_BURST_MAX 12
12587 #define OPT_LED_PIN 13
12588 #define OPT_MAX_WIDE 14
12589 #define OPT_SETTLE_DELAY 15
12590 #define OPT_DIFF_SUPPORT 16
12591 #define OPT_IRQM 17
12592 #define OPT_PCI_FIX_UP 18
12593 #define OPT_BUS_CHECK 19
12594 #define OPT_OPTIMIZE 20
12595 #define OPT_RECOVERY 21
12596 #define OPT_SAFE_SETUP 22
12597 #define OPT_USE_NVRAM 23
12598 #define OPT_EXCLUDE 24
12599 #define OPT_HOST_ID 25
12600
12601 #ifdef SCSI_NCR_IARB_SUPPORT
12602 #define OPT_IARB 26
12603 #endif
12604
12605 static char setup_token[] __initdata =
12606 "tags:" "mpar:"
12607 "spar:" "disc:"
12608 "specf:" "_rsvd1:"
12609 "fsn:" "revprob:"
12610 "sync:" "verb:"
12611 "debug:" "burst:"
12612 "led:" "wide:"
12613 "settle:" "diff:"
12614 "irqm:" "pcifix:"
12615 "buschk:" "optim:"
12616 "recovery:"
12617 "safe:" "nvram:"
12618 "excl:" "hostid:"
12619 #ifdef SCSI_NCR_IARB_SUPPORT
12620 "iarb:"
12621 #endif
12622 ; /* DONNOT REMOVE THIS ';' */
12623
12624 #ifdef MODULE
12625 #define ARG_SEP ' '
12626 #else
12627 #define ARG_SEP ','
12628 #endif
12629
12630 static int __init get_setup_token(char *p)
12631 {
12632 char *cur = setup_token;
12633 char *pc;
12634 int i = 0;
12635
12636 while (cur != NULL && (pc = strchr(cur, ':')) != NULL) {
12637 ++pc;
12638 ++i;
12639 if (!strncmp(p, cur, pc - cur))
12640 return i;
12641 cur = pc;
12642 }
12643 return 0;
12644 }
12645
12646
12647 int __init sym53c8xx_setup(char *str)
12648 {
12649 #ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT
12650 char *cur = str;
12651 char *pc, *pv;
12652 unsigned long val;
12653 int i, c;
12654 int xi = 0;
12655
12656 while (cur != NULL && (pc = strchr(cur, ':')) != NULL) {
12657 char *pe;
12658
12659 val = 0;
12660 pv = pc;
12661 c = *++pv;
12662
12663 if (c == 'n')
12664 val = 0;
12665 else if (c == 'y')
12666 val = 1;
12667 else
12668 val = (int) simple_strtoul(pv, &pe, 0);
12669
12670 switch (get_setup_token(cur)) {
12671 case OPT_TAGS:
12672 driver_setup.default_tags = val;
12673 if (pe && *pe == '/') {
12674 i = 0;
12675 while (*pe && *pe != ARG_SEP &&
12676 i < sizeof(driver_setup.tag_ctrl)-1) {
12677 driver_setup.tag_ctrl[i++] = *pe++;
12678 }
12679 driver_setup.tag_ctrl[i] = '\0';
12680 }
12681 break;
12682 case OPT_MASTER_PARITY:
12683 driver_setup.master_parity = val;
12684 break;
12685 case OPT_SCSI_PARITY:
12686 driver_setup.scsi_parity = val;
12687 break;
12688 case OPT_DISCONNECTION:
12689 driver_setup.disconnection = val;
12690 break;
12691 case OPT_SPECIAL_FEATURES:
12692 driver_setup.special_features = val;
12693 break;
12694 case OPT_FORCE_SYNC_NEGO:
12695 driver_setup.force_sync_nego = val;
12696 break;
12697 case OPT_REVERSE_PROBE:
12698 driver_setup.reverse_probe = val;
12699 break;
12700 case OPT_DEFAULT_SYNC:
12701 driver_setup.default_sync = val;
12702 break;
12703 case OPT_VERBOSE:
12704 driver_setup.verbose = val;
12705 break;
12706 case OPT_DEBUG:
12707 driver_setup.debug = val;
12708 break;
12709 case OPT_BURST_MAX:
12710 driver_setup.burst_max = val;
12711 break;
12712 case OPT_LED_PIN:
12713 driver_setup.led_pin = val;
12714 break;
12715 case OPT_MAX_WIDE:
12716 driver_setup.max_wide = val? 1:0;
12717 break;
12718 case OPT_SETTLE_DELAY:
12719 driver_setup.settle_delay = val;
12720 break;
12721 case OPT_DIFF_SUPPORT:
12722 driver_setup.diff_support = val;
12723 break;
12724 case OPT_IRQM:
12725 driver_setup.irqm = val;
12726 break;
12727 case OPT_PCI_FIX_UP:
12728 driver_setup.pci_fix_up = val;
12729 break;
12730 case OPT_BUS_CHECK:
12731 driver_setup.bus_check = val;
12732 break;
12733 case OPT_OPTIMIZE:
12734 driver_setup.optimize = val;
12735 break;
12736 case OPT_RECOVERY:
12737 driver_setup.recovery = val;
12738 break;
12739 case OPT_USE_NVRAM:
12740 driver_setup.use_nvram = val;
12741 break;
12742 case OPT_SAFE_SETUP:
12743 memcpy(&driver_setup, &driver_safe_setup,
12744 sizeof(driver_setup));
12745 break;
12746 case OPT_EXCLUDE:
12747 if (xi < SCSI_NCR_MAX_EXCLUDES)
12748 driver_setup.excludes[xi++] = val;
12749 break;
12750 case OPT_HOST_ID:
12751 driver_setup.host_id = val;
12752 break;
12753 #ifdef SCSI_NCR_IARB_SUPPORT
12754 case OPT_IARB:
12755 driver_setup.iarb = val;
12756 break;
12757 #endif
12758 default:
12759 printk("sym53c8xx_setup: unexpected boot option '%.*s' ignored\n", (int)(pc-cur+1), cur);
12760 break;
12761 }
12762
12763 if ((cur = strchr(cur, ARG_SEP)) != NULL)
12764 ++cur;
12765 }
12766 #endif /* SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT */
12767 return 1;
12768 }
12769
12770 #if LINUX_VERSION_CODE >= LinuxVersionCode(2,3,13)
12771 #ifndef MODULE
12772 __setup("sym53c8xx=", sym53c8xx_setup);
12773 #endif
12774 #endif
12775
12776 static int
12777 sym53c8xx_pci_init(Scsi_Host_Template *tpnt, pcidev_t pdev, ncr_device *device);
12778
12779 /*
12780 ** Linux entry point for SYM53C8XX devices detection routine.
12781 **
12782 ** Called by the middle-level scsi drivers at initialization time,
12783 ** or at module installation.
12784 **
12785 ** Read the PCI configuration and try to attach each
12786 ** detected NCR board.
12787 **
12788 ** If NVRAM is present, try to attach boards according to
12789 ** the used defined boot order.
12790 **
12791 ** Returns the number of boards successfully attached.
12792 */
12793
12794 static void __init ncr_print_driver_setup(void)
12795 {
12796 #define YesNo(y) y ? 'y' : 'n'
12797 printk (NAME53C8XX ": setup=disc:%c,specf:%d,tags:%d,sync:%d,"
12798 "burst:%d,wide:%c,diff:%d,revprob:%c,buschk:0x%x\n",
12799 YesNo(driver_setup.disconnection),
12800 driver_setup.special_features,
12801 driver_setup.default_tags,
12802 driver_setup.default_sync,
12803 driver_setup.burst_max,
12804 YesNo(driver_setup.max_wide),
12805 driver_setup.diff_support,
12806 YesNo(driver_setup.reverse_probe),
12807 driver_setup.bus_check);
12808
12809 printk (NAME53C8XX ": setup=mpar:%c,spar:%c,fsn=%c,verb:%d,debug:0x%x,"
12810 "led:%c,settle:%d,irqm:0x%x,nvram:0x%x,pcifix:0x%x\n",
12811 YesNo(driver_setup.master_parity),
12812 YesNo(driver_setup.scsi_parity),
12813 YesNo(driver_setup.force_sync_nego),
12814 driver_setup.verbose,
12815 driver_setup.debug,
12816 YesNo(driver_setup.led_pin),
12817 driver_setup.settle_delay,
12818 driver_setup.irqm,
12819 driver_setup.use_nvram,
12820 driver_setup.pci_fix_up);
12821 #undef YesNo
12822 }
12823
12824 /*===================================================================
12825 ** SYM53C8XX devices description table and chip ids list.
12826 **===================================================================
12827 */
12828
12829 static ncr_chip ncr_chip_table[] __initdata = SCSI_NCR_CHIP_TABLE;
12830 static ushort ncr_chip_ids[] __initdata = SCSI_NCR_CHIP_IDS;
12831
12832 #ifdef SCSI_NCR_PQS_PDS_SUPPORT
12833 /*===================================================================
12834 ** Detect all NCR PQS/PDS boards and keep track of their bus nr.
12835 **
12836 ** The NCR PQS or PDS card is constructed as a DEC bridge
12837 ** behind which sit a proprietary NCR memory controller and
12838 ** four or two 53c875s as separate devices. In its usual mode
12839 ** of operation, the 875s are slaved to the memory controller
12840 ** for all transfers. We can tell if an 875 is part of a
12841 ** PQS/PDS or not since if it is, it will be on the same bus
12842 ** as the memory controller. To operate with the Linux
12843 ** driver, the memory controller is disabled and the 875s
12844 ** freed to function independently. The only wrinkle is that
12845 ** the preset SCSI ID (which may be zero) must be read in from
12846 ** a special configuration space register of the 875
12847 **===================================================================
12848 */
12849 #define SCSI_NCR_MAX_PQS_BUS 16
12850 static int pqs_bus[SCSI_NCR_MAX_PQS_BUS] __initdata = { 0 };
12851
12852 static void __init ncr_detect_pqs_pds(void)
12853 {
12854 short index;
12855 pcidev_t dev = PCIDEV_NULL;
12856
12857 for(index=0; index < SCSI_NCR_MAX_PQS_BUS; index++) {
12858 u_char tmp;
12859
12860 dev = pci_find_device(0x101a, 0x0009, dev);
12861 if (dev == PCIDEV_NULL) {
12862 pqs_bus[index] = -1;
12863 break;
12864 }
12865 printk(KERN_INFO NAME53C8XX ": NCR PQS/PDS memory controller detected on bus %d\n", PciBusNumber(dev));
12866 pci_read_config_byte(dev, 0x44, &tmp);
12867 /* bit 1: allow individual 875 configuration */
12868 tmp |= 0x2;
12869 pci_write_config_byte(dev, 0x44, tmp);
12870 pci_read_config_byte(dev, 0x45, &tmp);
12871 /* bit 2: drive individual 875 interrupts to the bus */
12872 tmp |= 0x4;
12873 pci_write_config_byte(dev, 0x45, tmp);
12874
12875 pqs_bus[index] = PciBusNumber(dev);
12876 }
12877 }
12878 #endif /* SCSI_NCR_PQS_PDS_SUPPORT */
12879
12880 /*===================================================================
12881 ** Detect all 53c8xx hosts and then attach them.
12882 **
12883 ** If we are using NVRAM, once all hosts are detected, we need to
12884 ** check any NVRAM for boot order in case detect and boot order
12885 ** differ and attach them using the order in the NVRAM.
12886 **
12887 ** If no NVRAM is found or data appears invalid attach boards in
12888 ** the the order they are detected.
12889 **===================================================================
12890 */
12891 int __init sym53c8xx_detect(Scsi_Host_Template *tpnt)
12892 {
12893 pcidev_t pcidev;
12894 int i, j, chips, hosts, count;
12895 int attach_count = 0;
12896 ncr_device *devtbl, *devp;
12897 #ifdef SCSI_NCR_NVRAM_SUPPORT
12898 ncr_nvram nvram0, nvram, *nvp;
12899 #endif
12900
12901 /*
12902 ** PCI is required.
12903 */
12904 if (!pci_present())
12905 return 0;
12906
12907 /*
12908 ** Initialize driver general stuff.
12909 */
12910 #ifdef SCSI_NCR_PROC_INFO_SUPPORT
12911 #if LINUX_VERSION_CODE < LinuxVersionCode(2,3,27)
12912 tpnt->proc_dir = &proc_scsi_sym53c8xx;
12913 #else
12914 tpnt->proc_name = NAME53C8XX;
12915 #endif
12916 tpnt->proc_info = sym53c8xx_proc_info;
12917 #endif
12918
12919 #if defined(SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT) && defined(MODULE)
12920 if (sym53c8xx)
12921 sym53c8xx_setup(sym53c8xx);
12922 #endif
12923 #ifdef SCSI_NCR_DEBUG_INFO_SUPPORT
12924 ncr_debug = driver_setup.debug;
12925 #endif
12926
12927 if (initverbose >= 2)
12928 ncr_print_driver_setup();
12929
12930 /*
12931 ** Allocate the device table since we donnot want to
12932 ** overflow the kernel stack.
12933 ** 1 x 4K PAGE is enough for more than 40 devices for i386.
12934 */
12935 devtbl = m_calloc(PAGE_SIZE, "devtbl");
12936 if (!devtbl)
12937 return 0;
12938
12939 /*
12940 ** Detect all NCR PQS/PDS memory controllers.
12941 */
12942 #ifdef SCSI_NCR_PQS_PDS_SUPPORT
12943 ncr_detect_pqs_pds();
12944 #endif
12945
12946 /*
12947 ** Detect all 53c8xx hosts.
12948 ** Save the first Symbios NVRAM content if any
12949 ** for the boot order.
12950 */
12951 chips = sizeof(ncr_chip_ids) / sizeof(ncr_chip_ids[0]);
12952 hosts = PAGE_SIZE / sizeof(*devtbl);
12953 #ifdef SCSI_NCR_NVRAM_SUPPORT
12954 nvp = (driver_setup.use_nvram & 0x1) ? &nvram0 : 0;
12955 #endif
12956 j = 0;
12957 count = 0;
12958 pcidev = PCIDEV_NULL;
12959 while (1) {
12960 char *msg = "";
12961 if (count >= hosts)
12962 break;
12963 if (j >= chips)
12964 break;
12965 i = driver_setup.reverse_probe ? chips - 1 - j : j;
12966 pcidev = pci_find_device(PCI_VENDOR_ID_NCR, ncr_chip_ids[i],
12967 pcidev);
12968 if (pcidev == PCIDEV_NULL) {
12969 ++j;
12970 continue;
12971 }
12972 if (pci_enable_device(pcidev)) /* @!*!$&*!%-*#;! */
12973 continue;
12974 /* Some HW as the HP LH4 may report twice PCI devices */
12975 for (i = 0; i < count ; i++) {
12976 if (devtbl[i].slot.bus == PciBusNumber(pcidev) &&
12977 devtbl[i].slot.device_fn == PciDeviceFn(pcidev))
12978 break;
12979 }
12980 if (i != count) /* Ignore this device if we already have it */
12981 continue;
12982 devp = &devtbl[count];
12983 devp->host_id = driver_setup.host_id;
12984 devp->attach_done = 0;
12985 if (sym53c8xx_pci_init(tpnt, pcidev, devp)) {
12986 continue;
12987 }
12988 ++count;
12989 #ifdef SCSI_NCR_NVRAM_SUPPORT
12990 if (nvp) {
12991 ncr_get_nvram(devp, nvp);
12992 switch(nvp->type) {
12993 case SCSI_NCR_SYMBIOS_NVRAM:
12994 /*
12995 * Switch to the other nvram buffer, so that
12996 * nvram0 will contain the first Symbios
12997 * format NVRAM content with boot order.
12998 */
12999 nvp = &nvram;
13000 msg = "with Symbios NVRAM";
13001 break;
13002 case SCSI_NCR_TEKRAM_NVRAM:
13003 msg = "with Tekram NVRAM";
13004 break;
13005 }
13006 }
13007 #endif
13008 #ifdef SCSI_NCR_PQS_PDS_SUPPORT
13009 if (devp->pqs_pds)
13010 msg = "(NCR PQS/PDS)";
13011 #endif
13012 printk(KERN_INFO NAME53C8XX ": 53c%s detected %s\n",
13013 devp->chip.name, msg);
13014 }
13015
13016 /*
13017 ** If we have found a SYMBIOS NVRAM, use first the NVRAM boot
13018 ** sequence as device boot order.
13019 ** check devices in the boot record against devices detected.
13020 ** attach devices if we find a match. boot table records that
13021 ** do not match any detected devices will be ignored.
13022 ** devices that do not match any boot table will not be attached
13023 ** here but will attempt to be attached during the device table
13024 ** rescan.
13025 */
13026 #ifdef SCSI_NCR_NVRAM_SUPPORT
13027 if (!nvp || nvram0.type != SCSI_NCR_SYMBIOS_NVRAM)
13028 goto next;
13029 for (i = 0; i < 4; i++) {
13030 Symbios_host *h = &nvram0.data.Symbios.host[i];
13031 for (j = 0 ; j < count ; j++) {
13032 devp = &devtbl[j];
13033 if (h->device_fn != devp->slot.device_fn ||
13034 h->bus_nr != devp->slot.bus ||
13035 h->device_id != devp->chip.device_id)
13036 continue;
13037 if (devp->attach_done)
13038 continue;
13039 if (h->flags & SYMBIOS_INIT_SCAN_AT_BOOT) {
13040 ncr_get_nvram(devp, nvp);
13041 if (!ncr_attach (tpnt, attach_count, devp))
13042 attach_count++;
13043 }
13044 else if (!(driver_setup.use_nvram & 0x80))
13045 printk(KERN_INFO NAME53C8XX
13046 ": 53c%s state OFF thus not attached\n",
13047 devp->chip.name);
13048 else
13049 continue;
13050
13051 devp->attach_done = 1;
13052 break;
13053 }
13054 }
13055 next:
13056 #endif
13057
13058 /*
13059 ** Rescan device list to make sure all boards attached.
13060 ** Devices without boot records will not be attached yet
13061 ** so try to attach them here.
13062 */
13063 for (i= 0; i < count; i++) {
13064 devp = &devtbl[i];
13065 if (!devp->attach_done) {
13066 #ifdef SCSI_NCR_NVRAM_SUPPORT
13067 ncr_get_nvram(devp, nvp);
13068 #endif
13069 if (!ncr_attach (tpnt, attach_count, devp))
13070 attach_count++;
13071 }
13072 }
13073
13074 m_free(devtbl, PAGE_SIZE, "devtbl");
13075
13076 return attach_count;
13077 }
13078
13079 /*===================================================================
13080 ** Read and check the PCI configuration for any detected NCR
13081 ** boards and save data for attaching after all boards have
13082 ** been detected.
13083 **===================================================================
13084 */
13085 static int __init
13086 sym53c8xx_pci_init(Scsi_Host_Template *tpnt, pcidev_t pdev, ncr_device *device)
13087 {
13088 u_short vendor_id, device_id, command, status_reg;
13089 u_char cache_line_size, latency_timer;
13090 u_char suggested_cache_line_size = 0;
13091 u_char pci_fix_up = driver_setup.pci_fix_up;
13092 u_char revision;
13093 u_int irq;
13094 u_long base, base_c, base_2, base_2_c, io_port;
13095 int i;
13096 ncr_chip *chip;
13097
13098 printk(KERN_INFO NAME53C8XX ": at PCI bus %d, device %d, function %d\n",
13099 PciBusNumber(pdev),
13100 (int) (PciDeviceFn(pdev) & 0xf8) >> 3,
13101 (int) (PciDeviceFn(pdev) & 7));
13102
13103 #ifdef SCSI_NCR_DYNAMIC_DMA_MAPPING
13104 if (pci_set_dma_mask(pdev, (dma_addr_t) (0xffffffffUL))) {
13105 printk(KERN_WARNING NAME53C8XX
13106 "32 BIT PCI BUS DMA ADDRESSING NOT SUPPORTED\n");
13107 return -1;
13108 }
13109 #endif
13110
13111 /*
13112 ** Read info from the PCI config space.
13113 ** pci_read_config_xxx() functions are assumed to be used for
13114 ** successfully detected PCI devices.
13115 */
13116 vendor_id = PciVendorId(pdev);
13117 device_id = PciDeviceId(pdev);
13118 irq = PciIrqLine(pdev);
13119
13120 i = pci_get_base_address(pdev, 0, &io_port);
13121 io_port = pci_get_base_cookie(pdev, 0);
13122
13123 base_c = pci_get_base_cookie(pdev, i);
13124 i = pci_get_base_address(pdev, i, &base);
13125
13126 base_2_c = pci_get_base_cookie(pdev, i);
13127 (void) pci_get_base_address(pdev, i, &base_2);
13128
13129 pci_read_config_word(pdev, PCI_COMMAND, &command);
13130 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
13131 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_line_size);
13132 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &latency_timer);
13133 pci_read_config_word(pdev, PCI_STATUS, &status_reg);
13134
13135 #ifdef SCSI_NCR_PQS_PDS_SUPPORT
13136 /*
13137 ** Match the BUS number for PQS/PDS devices.
13138 ** Read the SCSI ID from a special register mapped
13139 ** into the configuration space of the individual
13140 ** 875s. This register is set up by the PQS bios
13141 */
13142 for(i = 0; i < SCSI_NCR_MAX_PQS_BUS && pqs_bus[i] != -1; i++) {
13143 u_char tmp;
13144 if (pqs_bus[i] == PciBusNumber(pdev)) {
13145 pci_read_config_byte(pdev, 0x84, &tmp);
13146 device->pqs_pds = 1;
13147 device->host_id = tmp;
13148 break;
13149 }
13150 }
13151 #endif /* SCSI_NCR_PQS_PDS_SUPPORT */
13152
13153 /*
13154 ** If user excludes this chip, donnot initialize it.
13155 */
13156 for (i = 0 ; i < SCSI_NCR_MAX_EXCLUDES ; i++) {
13157 if (driver_setup.excludes[i] ==
13158 (io_port & PCI_BASE_ADDRESS_IO_MASK))
13159 return -1;
13160 }
13161 /*
13162 ** Check if the chip is supported
13163 */
13164 chip = 0;
13165 for (i = 0; i < sizeof(ncr_chip_table)/sizeof(ncr_chip_table[0]); i++) {
13166 if (device_id != ncr_chip_table[i].device_id)
13167 continue;
13168 if (revision > ncr_chip_table[i].revision_id)
13169 continue;
13170 if (!(ncr_chip_table[i].features & FE_LDSTR))
13171 break;
13172 chip = &device->chip;
13173 memcpy(chip, &ncr_chip_table[i], sizeof(*chip));
13174 chip->revision_id = revision;
13175 break;
13176 }
13177
13178 /*
13179 ** Ignore Symbios chips controlled by SISL RAID controller.
13180 ** This controller sets value 0x52414944 at RAM end - 16.
13181 */
13182 #if defined(__i386__) && !defined(SCSI_NCR_PCI_MEM_NOT_SUPPORTED)
13183 if (chip && (base_2_c & PCI_BASE_ADDRESS_MEM_MASK)) {
13184 unsigned int ram_size, ram_val;
13185 u_long ram_ptr;
13186
13187 if (chip->features & FE_RAM8K)
13188 ram_size = 8192;
13189 else
13190 ram_size = 4096;
13191
13192 ram_ptr = remap_pci_mem(base_2_c & PCI_BASE_ADDRESS_MEM_MASK,
13193 ram_size);
13194 if (ram_ptr) {
13195 ram_val = readl_raw(ram_ptr + ram_size - 16);
13196 unmap_pci_mem(ram_ptr, ram_size);
13197 if (ram_val == 0x52414944) {
13198 printk(NAME53C8XX": not initializing, "
13199 "driven by SISL RAID controller.\n");
13200 return -1;
13201 }
13202 }
13203 }
13204 #endif /* i386 and PCI MEMORY accessible */
13205
13206 if (!chip) {
13207 printk(NAME53C8XX ": not initializing, device not supported\n");
13208 return -1;
13209 }
13210
13211 #ifdef __powerpc__
13212 /*
13213 ** Fix-up for power/pc.
13214 ** Should not be performed by the driver.
13215 */
13216 if ((command & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY))
13217 != (PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) {
13218 printk(NAME53C8XX ": setting%s%s...\n",
13219 (command & PCI_COMMAND_IO) ? "" : " PCI_COMMAND_IO",
13220 (command & PCI_COMMAND_MEMORY) ? "" : " PCI_COMMAND_MEMORY");
13221 command |= (PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
13222 pci_write_config_word(pdev, PCI_COMMAND, command);
13223 }
13224
13225 #if LINUX_VERSION_CODE < LinuxVersionCode(2,2,0)
13226 if ( is_prep ) {
13227 if (io_port >= 0x10000000) {
13228 printk(NAME53C8XX ": reallocating io_port (Wacky IBM)");
13229 io_port = (io_port & 0x00FFFFFF) | 0x01000000;
13230 pci_write_config_dword(pdev,
13231 PCI_BASE_ADDRESS_0, io_port);
13232 }
13233 if (base >= 0x10000000) {
13234 printk(NAME53C8XX ": reallocating base (Wacky IBM)");
13235 base = (base & 0x00FFFFFF) | 0x01000000;
13236 pci_write_config_dword(pdev,
13237 PCI_BASE_ADDRESS_1, base);
13238 }
13239 if (base_2 >= 0x10000000) {
13240 printk(NAME53C8XX ": reallocating base2 (Wacky IBM)");
13241 base_2 = (base_2 & 0x00FFFFFF) | 0x01000000;
13242 pci_write_config_dword(pdev,
13243 PCI_BASE_ADDRESS_2, base_2);
13244 }
13245 }
13246 #endif
13247 #endif /* __powerpc__ */
13248
13249 #if defined(__i386__) && !defined(MODULE)
13250 if (!cache_line_size) {
13251 #if LINUX_VERSION_CODE < LinuxVersionCode(2,1,75)
13252 extern char x86;
13253 switch(x86) {
13254 #else
13255 switch(boot_cpu_data.x86) {
13256 #endif
13257 case 4: suggested_cache_line_size = 4; break;
13258 case 6:
13259 case 5: suggested_cache_line_size = 8; break;
13260 }
13261 }
13262 #endif /* __i386__ */
13263
13264 /*
13265 ** Check availability of IO space, memory space.
13266 ** Enable master capability if not yet.
13267 **
13268 ** We shouldn't have to care about the IO region when
13269 ** we are using MMIO. But calling check_region() from
13270 ** both the ncr53c8xx and the sym53c8xx drivers prevents
13271 ** from attaching devices from the both drivers.
13272 ** If you have a better idea, let me know.
13273 */
13274 /* #ifdef SCSI_NCR_IOMAPPED */
13275 #if 1
13276 if (!(command & PCI_COMMAND_IO)) {
13277 printk(NAME53C8XX ": I/O base address (0x%lx) disabled.\n",
13278 (long) io_port);
13279 io_port = 0;
13280 }
13281 #endif
13282 if (!(command & PCI_COMMAND_MEMORY)) {
13283 printk(NAME53C8XX ": PCI_COMMAND_MEMORY not set.\n");
13284 base = 0;
13285 base_2 = 0;
13286 }
13287 io_port &= PCI_BASE_ADDRESS_IO_MASK;
13288 base &= PCI_BASE_ADDRESS_MEM_MASK;
13289 base_2 &= PCI_BASE_ADDRESS_MEM_MASK;
13290
13291 /* #ifdef SCSI_NCR_IOMAPPED */
13292 #if 1
13293 if (io_port && check_region (io_port, 128)) {
13294 printk(NAME53C8XX ": IO region 0x%lx[0..127] is in use\n",
13295 (long) io_port);
13296 io_port = 0;
13297 }
13298 if (!io_port)
13299 return -1;
13300 #endif
13301 #ifndef SCSI_NCR_IOMAPPED
13302 if (!base) {
13303 printk(NAME53C8XX ": MMIO base address disabled.\n");
13304 return -1;
13305 }
13306 #endif
13307
13308 /*
13309 ** Set MASTER capable and PARITY bit, if not yet.
13310 */
13311 if ((command & (PCI_COMMAND_MASTER | PCI_COMMAND_PARITY))
13312 != (PCI_COMMAND_MASTER | PCI_COMMAND_PARITY)) {
13313 printk(NAME53C8XX ": setting%s%s...(fix-up)\n",
13314 (command & PCI_COMMAND_MASTER) ? "" : " PCI_COMMAND_MASTER",
13315 (command & PCI_COMMAND_PARITY) ? "" : " PCI_COMMAND_PARITY");
13316 command |= (PCI_COMMAND_MASTER | PCI_COMMAND_PARITY);
13317 pci_write_config_word(pdev, PCI_COMMAND, command);
13318 }
13319
13320 /*
13321 ** Fix some features according to driver setup.
13322 */
13323 if (!(driver_setup.special_features & 1))
13324 chip->features &= ~FE_SPECIAL_SET;
13325 else {
13326 if (driver_setup.special_features & 2)
13327 chip->features &= ~FE_WRIE;
13328 if (driver_setup.special_features & 4)
13329 chip->features &= ~FE_NOPM;
13330 }
13331
13332 /*
13333 ** Work around for errant bit in 895A. The 66Mhz
13334 ** capable bit is set erroneously. Clear this bit.
13335 ** (Item 1 DEL 533)
13336 **
13337 ** Make sure Config space and Features agree.
13338 **
13339 ** Recall: writes are not normal to status register -
13340 ** write a 1 to clear and a 0 to leave unchanged.
13341 ** Can only reset bits.
13342 */
13343 if (chip->features & FE_66MHZ) {
13344 if (!(status_reg & PCI_STATUS_66MHZ))
13345 chip->features &= ~FE_66MHZ;
13346 }
13347 else {
13348 if (status_reg & PCI_STATUS_66MHZ) {
13349 status_reg = PCI_STATUS_66MHZ;
13350 pci_write_config_word(pdev, PCI_STATUS, status_reg);
13351 pci_read_config_word(pdev, PCI_STATUS, &status_reg);
13352 }
13353 }
13354
13355 /*
13356 ** Some features are required to be enabled in order to
13357 ** work around some chip problems. :) ;)
13358 ** (ITEM 12 of a DEL about the 896 I haven't yet).
13359 ** We must ensure the chip will use WRITE AND INVALIDATE.
13360 ** The revision number limit is for now arbitrary.
13361 */
13362 if (device_id == PCI_DEVICE_ID_NCR_53C896 && revision <= 0x10) {
13363 chip->features |= (FE_WRIE | FE_CLSE);
13364 pci_fix_up |= 3; /* Force appropriate PCI fix-up */
13365 }
13366
13367 #ifdef SCSI_NCR_PCI_FIX_UP_SUPPORT
13368 /*
13369 ** Try to fix up PCI config according to wished features.
13370 */
13371 if ((pci_fix_up & 1) && (chip->features & FE_CLSE) &&
13372 !cache_line_size && suggested_cache_line_size) {
13373 cache_line_size = suggested_cache_line_size;
13374 pci_write_config_byte(pdev,
13375 PCI_CACHE_LINE_SIZE, cache_line_size);
13376 printk(NAME53C8XX ": PCI_CACHE_LINE_SIZE set to %d (fix-up).\n",
13377 cache_line_size);
13378 }
13379
13380 if ((pci_fix_up & 2) && cache_line_size &&
13381 (chip->features & FE_WRIE) && !(command & PCI_COMMAND_INVALIDATE)) {
13382 printk(NAME53C8XX": setting PCI_COMMAND_INVALIDATE (fix-up)\n");
13383 command |= PCI_COMMAND_INVALIDATE;
13384 pci_write_config_word(pdev, PCI_COMMAND, command);
13385 }
13386
13387 /*
13388 ** Tune PCI LATENCY TIMER according to burst max length transfer.
13389 ** (latency timer >= burst length + 6, we add 10 to be quite sure)
13390 */
13391
13392 if (chip->burst_max && (latency_timer == 0 || (pci_fix_up & 4))) {
13393 uchar lt = (1 << chip->burst_max) + 6 + 10;
13394 if (latency_timer < lt) {
13395 printk(NAME53C8XX
13396 ": changing PCI_LATENCY_TIMER from %d to %d.\n",
13397 (int) latency_timer, (int) lt);
13398 latency_timer = lt;
13399 pci_write_config_byte(pdev,
13400 PCI_LATENCY_TIMER, latency_timer);
13401 }
13402 }
13403
13404 #endif /* SCSI_NCR_PCI_FIX_UP_SUPPORT */
13405
13406 /*
13407 ** Initialise ncr_device structure with items required by ncr_attach.
13408 */
13409 device->pdev = pdev;
13410 device->slot.bus = PciBusNumber(pdev);
13411 device->slot.device_fn = PciDeviceFn(pdev);
13412 device->slot.base = base;
13413 device->slot.base_2 = base_2;
13414 device->slot.base_c = base_c;
13415 device->slot.base_2_c = base_2_c;
13416 device->slot.io_port = io_port;
13417 device->slot.irq = irq;
13418 device->attach_done = 0;
13419
13420 return 0;
13421 }
13422
13423
13424 /*===================================================================
13425 ** Detect and try to read SYMBIOS and TEKRAM NVRAM.
13426 **
13427 ** Data can be used to order booting of boards.
13428 **
13429 ** Data is saved in ncr_device structure if NVRAM found. This
13430 ** is then used to find drive boot order for ncr_attach().
13431 **
13432 ** NVRAM data is passed to Scsi_Host_Template later during
13433 ** ncr_attach() for any device set up.
13434 *===================================================================
13435 */
13436 #ifdef SCSI_NCR_NVRAM_SUPPORT
13437 static void __init ncr_get_nvram(ncr_device *devp, ncr_nvram *nvp)
13438 {
13439 devp->nvram = nvp;
13440 if (!nvp)
13441 return;
13442 /*
13443 ** Get access to chip IO registers
13444 */
13445 #ifdef SCSI_NCR_IOMAPPED
13446 request_region(devp->slot.io_port, 128, NAME53C8XX);
13447 devp->slot.base_io = devp->slot.io_port;
13448 #else
13449 devp->slot.reg =
13450 (struct ncr_reg *) remap_pci_mem(devp->slot.base_c, 128);
13451 if (!devp->slot.reg)
13452 return;
13453 #endif
13454
13455 /*
13456 ** Try to read SYMBIOS nvram.
13457 ** Try to read TEKRAM nvram if Symbios nvram not found.
13458 */
13459 if (!sym_read_Symbios_nvram(&devp->slot, &nvp->data.Symbios))
13460 nvp->type = SCSI_NCR_SYMBIOS_NVRAM;
13461 else if (!sym_read_Tekram_nvram(&devp->slot, devp->chip.device_id,
13462 &nvp->data.Tekram))
13463 nvp->type = SCSI_NCR_TEKRAM_NVRAM;
13464 else {
13465 nvp->type = 0;
13466 devp->nvram = 0;
13467 }
13468
13469 /*
13470 ** Release access to chip IO registers
13471 */
13472 #ifdef SCSI_NCR_IOMAPPED
13473 release_region(devp->slot.base_io, 128);
13474 #else
13475 unmap_pci_mem((u_long) devp->slot.reg, 128ul);
13476 #endif
13477
13478 }
13479 #endif /* SCSI_NCR_NVRAM_SUPPORT */
13480
13481 /*
13482 ** Linux select queue depths function
13483 */
13484
13485 #define DEF_DEPTH (driver_setup.default_tags)
13486 #define ALL_TARGETS -2
13487 #define NO_TARGET -1
13488 #define ALL_LUNS -2
13489 #define NO_LUN -1
13490
13491 static int device_queue_depth(ncb_p np, int target, int lun)
13492 {
13493 int c, h, t, u, v;
13494 char *p = driver_setup.tag_ctrl;
13495 char *ep;
13496
13497 h = -1;
13498 t = NO_TARGET;
13499 u = NO_LUN;
13500 while ((c = *p++) != 0) {
13501 v = simple_strtoul(p, &ep, 0);
13502 switch(c) {
13503 case '/':
13504 ++h;
13505 t = ALL_TARGETS;
13506 u = ALL_LUNS;
13507 break;
13508 case 't':
13509 if (t != target)
13510 t = (target == v) ? v : NO_TARGET;
13511 u = ALL_LUNS;
13512 break;
13513 case 'u':
13514 if (u != lun)
13515 u = (lun == v) ? v : NO_LUN;
13516 break;
13517 case 'q':
13518 if (h == np->unit &&
13519 (t == ALL_TARGETS || t == target) &&
13520 (u == ALL_LUNS || u == lun))
13521 return v;
13522 break;
13523 case '-':
13524 t = ALL_TARGETS;
13525 u = ALL_LUNS;
13526 break;
13527 default:
13528 break;
13529 }
13530 p = ep;
13531 }
13532 return DEF_DEPTH;
13533 }
13534
13535 static void sym53c8xx_select_queue_depths(struct Scsi_Host *host, struct scsi_device *devlist)
13536 {
13537 struct scsi_device *device;
13538
13539 for (device = devlist; device; device = device->next) {
13540 ncb_p np;
13541 tcb_p tp;
13542 lcb_p lp;
13543 int numtags;
13544
13545 if (device->host != host)
13546 continue;
13547
13548 np = ((struct host_data *) host->hostdata)->ncb;
13549 tp = &np->target[device->id];
13550 lp = ncr_lp(np, tp, device->lun);
13551
13552 /*
13553 ** Select queue depth from driver setup.
13554 ** Donnot use more than configured by user.
13555 ** Use at least 2.
13556 ** Donnot use more than our maximum.
13557 */
13558 numtags = device_queue_depth(np, device->id, device->lun);
13559 if (numtags > tp->usrtags)
13560 numtags = tp->usrtags;
13561 if (!device->tagged_supported)
13562 numtags = 1;
13563 device->queue_depth = numtags;
13564 if (device->queue_depth < 2)
13565 device->queue_depth = 2;
13566 if (device->queue_depth > MAX_TAGS)
13567 device->queue_depth = MAX_TAGS;
13568
13569 /*
13570 ** Since the queue depth is not tunable under Linux,
13571 ** we need to know this value in order not to
13572 ** announce stupid things to user.
13573 */
13574 if (lp) {
13575 lp->numtags = lp->maxtags = numtags;
13576 lp->scdev_depth = device->queue_depth;
13577 }
13578 ncr_setup_tags (np, device->id, device->lun);
13579
13580 #ifdef DEBUG_SYM53C8XX
13581 printk("sym53c8xx_select_queue_depth: host=%d, id=%d, lun=%d, depth=%d\n",
13582 np->unit, device->id, device->lun, device->queue_depth);
13583 #endif
13584 }
13585 }
13586
13587 /*
13588 ** Linux entry point for info() function
13589 */
13590 const char *sym53c8xx_info (struct Scsi_Host *host)
13591 {
13592 return SCSI_NCR_DRIVER_NAME;
13593 }
13594
13595 /*
13596 ** Linux entry point of queuecommand() function
13597 */
13598
13599 int sym53c8xx_queue_command (Scsi_Cmnd *cmd, void (* done)(Scsi_Cmnd *))
13600 {
13601 ncb_p np = ((struct host_data *) cmd->host->hostdata)->ncb;
13602 unsigned long flags;
13603 int sts;
13604
13605 #ifdef DEBUG_SYM53C8XX
13606 printk("sym53c8xx_queue_command\n");
13607 #endif
13608
13609 cmd->scsi_done = done;
13610 cmd->host_scribble = NULL;
13611 cmd->SCp.ptr = NULL;
13612 cmd->SCp.buffer = NULL;
13613 #ifdef SCSI_NCR_DYNAMIC_DMA_MAPPING
13614 cmd->__data_mapped = 0;
13615 cmd->__data_mapping = 0;
13616 #endif
13617
13618 NCR_LOCK_NCB(np, flags);
13619
13620 if ((sts = ncr_queue_command(np, cmd)) != DID_OK) {
13621 SetScsiResult(cmd, sts, 0);
13622 #ifdef DEBUG_SYM53C8XX
13623 printk("sym53c8xx : command not queued - result=%d\n", sts);
13624 #endif
13625 }
13626 #ifdef DEBUG_SYM53C8XX
13627 else
13628 printk("sym53c8xx : command successfully queued\n");
13629 #endif
13630
13631 NCR_UNLOCK_NCB(np, flags);
13632
13633 if (sts != DID_OK) {
13634 unmap_scsi_data(np, cmd);
13635 done(cmd);
13636 }
13637
13638 return sts;
13639 }
13640
13641 /*
13642 ** Linux entry point of the interrupt handler.
13643 ** Since linux versions > 1.3.70, we trust the kernel for
13644 ** passing the internal host descriptor as 'dev_id'.
13645 ** Otherwise, we scan the host list and call the interrupt
13646 ** routine for each host that uses this IRQ.
13647 */
13648
13649 static void sym53c8xx_intr(int irq, void *dev_id, struct pt_regs * regs)
13650 {
13651 unsigned long flags;
13652 ncb_p np = (ncb_p) dev_id;
13653 Scsi_Cmnd *done_list;
13654
13655 #ifdef DEBUG_SYM53C8XX
13656 printk("sym53c8xx : interrupt received\n");
13657 #endif
13658
13659 if (DEBUG_FLAGS & DEBUG_TINY) printk ("[");
13660
13661 NCR_LOCK_NCB(np, flags);
13662 ncr_exception(np);
13663 done_list = np->done_list;
13664 np->done_list = 0;
13665 NCR_UNLOCK_NCB(np, flags);
13666
13667 if (DEBUG_FLAGS & DEBUG_TINY) printk ("]\n");
13668
13669 if (done_list) {
13670 NCR_LOCK_SCSI_DONE(np, flags);
13671 ncr_flush_done_cmds(done_list);
13672 NCR_UNLOCK_SCSI_DONE(np, flags);
13673 }
13674 }
13675
13676 /*
13677 ** Linux entry point of the timer handler
13678 */
13679
13680 static void sym53c8xx_timeout(unsigned long npref)
13681 {
13682 ncb_p np = (ncb_p) npref;
13683 unsigned long flags;
13684 Scsi_Cmnd *done_list;
13685
13686 NCR_LOCK_NCB(np, flags);
13687 ncr_timeout((ncb_p) np);
13688 done_list = np->done_list;
13689 np->done_list = 0;
13690 NCR_UNLOCK_NCB(np, flags);
13691
13692 if (done_list) {
13693 NCR_LOCK_SCSI_DONE(np, flags);
13694 ncr_flush_done_cmds(done_list);
13695 NCR_UNLOCK_SCSI_DONE(np, flags);
13696 }
13697 }
13698
13699 /*
13700 ** Linux entry point of reset() function
13701 */
13702
13703 #if defined SCSI_RESET_SYNCHRONOUS && defined SCSI_RESET_ASYNCHRONOUS
13704 int sym53c8xx_reset(Scsi_Cmnd *cmd, unsigned int reset_flags)
13705 #else
13706 int sym53c8xx_reset(Scsi_Cmnd *cmd)
13707 #endif
13708 {
13709 ncb_p np = ((struct host_data *) cmd->host->hostdata)->ncb;
13710 int sts;
13711 unsigned long flags;
13712 Scsi_Cmnd *done_list;
13713
13714 #if defined SCSI_RESET_SYNCHRONOUS && defined SCSI_RESET_ASYNCHRONOUS
13715 printk("sym53c8xx_reset: pid=%lu reset_flags=%x serial_number=%ld serial_number_at_timeout=%ld\n",
13716 cmd->pid, reset_flags, cmd->serial_number, cmd->serial_number_at_timeout);
13717 #else
13718 printk("sym53c8xx_reset: command pid %lu\n", cmd->pid);
13719 #endif
13720
13721 NCR_LOCK_NCB(np, flags);
13722
13723 /*
13724 * We have to just ignore reset requests in some situations.
13725 */
13726 #if defined SCSI_RESET_NOT_RUNNING
13727 if (cmd->serial_number != cmd->serial_number_at_timeout) {
13728 sts = SCSI_RESET_NOT_RUNNING;
13729 goto out;
13730 }
13731 #endif
13732 /*
13733 * If the mid-level driver told us reset is synchronous, it seems
13734 * that we must call the done() callback for the involved command,
13735 * even if this command was not queued to the low-level driver,
13736 * before returning SCSI_RESET_SUCCESS.
13737 */
13738
13739 #if defined SCSI_RESET_SYNCHRONOUS && defined SCSI_RESET_ASYNCHRONOUS
13740 sts = ncr_reset_bus(np, cmd,
13741 (reset_flags & (SCSI_RESET_SYNCHRONOUS | SCSI_RESET_ASYNCHRONOUS)) == SCSI_RESET_SYNCHRONOUS);
13742 #else
13743 sts = ncr_reset_bus(np, cmd, 0);
13744 #endif
13745
13746 /*
13747 * Since we always reset the controller, when we return success,
13748 * we add this information to the return code.
13749 */
13750 #if defined SCSI_RESET_HOST_RESET
13751 if (sts == SCSI_RESET_SUCCESS)
13752 sts |= SCSI_RESET_HOST_RESET;
13753 #endif
13754
13755 out:
13756 done_list = np->done_list;
13757 np->done_list = 0;
13758 NCR_UNLOCK_NCB(np, flags);
13759
13760 ncr_flush_done_cmds(done_list);
13761
13762 return sts;
13763 }
13764
13765 /*
13766 ** Linux entry point of abort() function
13767 */
13768
13769 int sym53c8xx_abort(Scsi_Cmnd *cmd)
13770 {
13771 ncb_p np = ((struct host_data *) cmd->host->hostdata)->ncb;
13772 int sts;
13773 unsigned long flags;
13774 Scsi_Cmnd *done_list;
13775
13776 #if defined SCSI_RESET_SYNCHRONOUS && defined SCSI_RESET_ASYNCHRONOUS
13777 printk("sym53c8xx_abort: pid=%lu serial_number=%ld serial_number_at_timeout=%ld\n",
13778 cmd->pid, cmd->serial_number, cmd->serial_number_at_timeout);
13779 #else
13780 printk("sym53c8xx_abort: command pid %lu\n", cmd->pid);
13781 #endif
13782
13783 NCR_LOCK_NCB(np, flags);
13784
13785 #if defined SCSI_RESET_SYNCHRONOUS && defined SCSI_RESET_ASYNCHRONOUS
13786 /*
13787 * We have to just ignore abort requests in some situations.
13788 */
13789 if (cmd->serial_number != cmd->serial_number_at_timeout) {
13790 sts = SCSI_ABORT_NOT_RUNNING;
13791 goto out;
13792 }
13793 #endif
13794
13795 sts = ncr_abort_command(np, cmd);
13796 out:
13797 done_list = np->done_list;
13798 np->done_list = 0;
13799 NCR_UNLOCK_NCB(np, flags);
13800
13801 ncr_flush_done_cmds(done_list);
13802
13803 return sts;
13804 }
13805
13806
13807 #ifdef MODULE
13808 int sym53c8xx_release(struct Scsi_Host *host)
13809 {
13810 #ifdef DEBUG_SYM53C8