File: /usr/src/linux/drivers/sound/cmpci.c
1 /*****************************************************************************/
2 /*
3 * cmpci.c -- C-Media PCI audio driver.
4 *
5 * Copyright (C) 1999 ChenLi Tien (cltien@cmedia.com.tw)
6 * C-media support (support@cmedia.com.tw)
7 *
8 * Based on the PCI drivers by Thomas Sailer (sailer@ife.ee.ethz.ch)
9 *
10 * For update, visit:
11 * http://members.home.net/puresoft/cmedia.html
12 * http://www.cmedia.com.tw
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
27 *
28 * Special thanks to David C. Niemi, Jan Pfeifer
29 *
30 *
31 * Module command line parameters:
32 * none so far
33 *
34 *
35 * Supported devices:
36 * /dev/dsp standard /dev/dsp device, (mostly) OSS compatible
37 * /dev/mixer standard /dev/mixer device, (mostly) OSS compatible
38 * /dev/midi simple MIDI UART interface, no ioctl
39 *
40 * The card has both an FM and a Wavetable synth, but I have to figure
41 * out first how to drive them...
42 *
43 * Revision history
44 * 06.05.98 0.1 Initial release
45 * 10.05.98 0.2 Fixed many bugs, esp. ADC rate calculation
46 * First stab at a simple midi interface (no bells&whistles)
47 * 13.05.98 0.3 Fix stupid cut&paste error: set_adc_rate was called instead of
48 * set_dac_rate in the FMODE_WRITE case in cm_open
49 * Fix hwptr out of bounds (now mpg123 works)
50 * 14.05.98 0.4 Don't allow excessive interrupt rates
51 * 08.06.98 0.5 First release using Alan Cox' soundcore instead of miscdevice
52 * 03.08.98 0.6 Do not include modversions.h
53 * Now mixer behaviour can basically be selected between
54 * "OSS documented" and "OSS actual" behaviour
55 * 31.08.98 0.7 Fix realplayer problems - dac.count issues
56 * 10.12.98 0.8 Fix drain_dac trying to wait on not yet initialized DMA
57 * 16.12.98 0.9 Fix a few f_file & FMODE_ bugs
58 * 06.01.99 0.10 remove the silly SA_INTERRUPT flag.
59 * hopefully killed the egcs section type conflict
60 * 12.03.99 0.11 cinfo.blocks should be reset after GETxPTR ioctl.
61 * reported by Johan Maes <joma@telindus.be>
62 * 22.03.99 0.12 return EAGAIN instead of EBUSY when O_NONBLOCK
63 * read/write cannot be executed
64 * 18.08.99 1.5 Only deallocate DMA buffer when unloading.
65 * 02.09.99 1.6 Enable SPDIF LOOP
66 * Change the mixer read back
67 * 21.09.99 2.33 Use RCS version as driver version.
68 * Add support for modem, S/PDIF loop and 4 channels.
69 * (8738 only)
70 * Fix bug cause x11amp cannot play.
71 *
72 * Fixes:
73 * Arnaldo Carvalho de Melo <acme@conectiva.com.br>
74 * 18/05/2001 - .bss nitpicks, fix a bug in set_dac_channels where it
75 * was calling prog_dmabuf with s->lock held, call missing
76 * unlock_kernel in cm_midi_release
77 *
78 * Carlos Eduardo Gorges <carlos@techlinux.com.br>
79 * Fri May 25 2001
80 * - SMP support ( spin[un]lock* revision )
81 * - speaker mixer support
82 * Mon Aug 13 2001
83 * - optimizations and cleanups
84 *
85 */
86 /*****************************************************************************/
87
88 #include <linux/version.h>
89 #include <linux/config.h>
90 #include <linux/module.h>
91 #include <linux/string.h>
92 #include <linux/ioport.h>
93 #include <linux/sched.h>
94 #include <linux/delay.h>
95 #include <linux/sound.h>
96 #include <linux/slab.h>
97 #include <linux/soundcard.h>
98 #include <linux/pci.h>
99 #include <linux/wrapper.h>
100 #include <asm/io.h>
101 #include <asm/dma.h>
102 #include <linux/init.h>
103 #include <linux/poll.h>
104 #include <linux/spinlock.h>
105 #include <linux/smp_lock.h>
106 #include <asm/uaccess.h>
107 #include <asm/hardirq.h>
108 #include <linux/bitops.h>
109
110 #include "dm.h"
111
112 /* --------------------------------------------------------------------- */
113 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
114 #undef DMABYTEIO
115 /* --------------------------------------------------------------------- */
116
117 #define CM_MAGIC ((PCI_VENDOR_ID_CMEDIA<<16)|PCI_DEVICE_ID_CMEDIA_CM8338A)
118
119 /* CM8338 registers definition ****************/
120
121 #define CODEC_CMI_FUNCTRL0 (0x00)
122 #define CODEC_CMI_FUNCTRL1 (0x04)
123 #define CODEC_CMI_CHFORMAT (0x08)
124 #define CODEC_CMI_INT_HLDCLR (0x0C)
125 #define CODEC_CMI_INT_STATUS (0x10)
126 #define CODEC_CMI_LEGACY_CTRL (0x14)
127 #define CODEC_CMI_MISC_CTRL (0x18)
128 #define CODEC_CMI_TDMA_POS (0x1C)
129 #define CODEC_CMI_MIXER (0x20)
130 #define CODEC_SB16_DATA (0x22)
131 #define CODEC_SB16_ADDR (0x23)
132 #define CODEC_CMI_MIXER1 (0x24)
133 #define CODEC_CMI_MIXER2 (0x25)
134 #define CODEC_CMI_AUX_VOL (0x26)
135 #define CODEC_CMI_MISC (0x27)
136 #define CODEC_CMI_AC97 (0x28)
137
138 #define CODEC_CMI_CH0_FRAME1 (0x80)
139 #define CODEC_CMI_CH0_FRAME2 (0x84)
140 #define CODEC_CMI_CH1_FRAME1 (0x88)
141 #define CODEC_CMI_CH1_FRAME2 (0x8C)
142
143 #define CODEC_CMI_EXT_REG (0xF0)
144
145 /* Mixer registers for SB16 ******************/
146
147 #define DSP_MIX_DATARESETIDX ((unsigned char)(0x00))
148
149 #define DSP_MIX_MASTERVOLIDX_L ((unsigned char)(0x30))
150 #define DSP_MIX_MASTERVOLIDX_R ((unsigned char)(0x31))
151 #define DSP_MIX_VOICEVOLIDX_L ((unsigned char)(0x32))
152 #define DSP_MIX_VOICEVOLIDX_R ((unsigned char)(0x33))
153 #define DSP_MIX_FMVOLIDX_L ((unsigned char)(0x34))
154 #define DSP_MIX_FMVOLIDX_R ((unsigned char)(0x35))
155 #define DSP_MIX_CDVOLIDX_L ((unsigned char)(0x36))
156 #define DSP_MIX_CDVOLIDX_R ((unsigned char)(0x37))
157 #define DSP_MIX_LINEVOLIDX_L ((unsigned char)(0x38))
158 #define DSP_MIX_LINEVOLIDX_R ((unsigned char)(0x39))
159
160 #define DSP_MIX_MICVOLIDX ((unsigned char)(0x3A))
161 #define DSP_MIX_SPKRVOLIDX ((unsigned char)(0x3B))
162
163 #define DSP_MIX_OUTMIXIDX ((unsigned char)(0x3C))
164
165 #define DSP_MIX_ADCMIXIDX_L ((unsigned char)(0x3D))
166 #define DSP_MIX_ADCMIXIDX_R ((unsigned char)(0x3E))
167
168 #define DSP_MIX_INGAINIDX_L ((unsigned char)(0x3F))
169 #define DSP_MIX_INGAINIDX_R ((unsigned char)(0x40))
170 #define DSP_MIX_OUTGAINIDX_L ((unsigned char)(0x41))
171 #define DSP_MIX_OUTGAINIDX_R ((unsigned char)(0x42))
172
173 #define DSP_MIX_AGCIDX ((unsigned char)(0x43))
174
175 #define DSP_MIX_TREBLEIDX_L ((unsigned char)(0x44))
176 #define DSP_MIX_TREBLEIDX_R ((unsigned char)(0x45))
177 #define DSP_MIX_BASSIDX_L ((unsigned char)(0x46))
178 #define DSP_MIX_BASSIDX_R ((unsigned char)(0x47))
179
180 #define CM_CH0_RESET 0x04
181 #define CM_CH1_RESET 0x08
182 #define CM_EXTENT_CODEC 0x100
183 #define CM_EXTENT_MIDI 0x2
184 #define CM_EXTENT_SYNTH 0x4
185 #define CM_INT_CH0 1
186 #define CM_INT_CH1 2
187
188 #define CM_CFMT_STEREO 0x01
189 #define CM_CFMT_16BIT 0x02
190 #define CM_CFMT_MASK 0x03
191 #define CM_CFMT_DACSHIFT 2
192 #define CM_CFMT_ADCSHIFT 0
193
194 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
195
196 #define CM_ENABLE_CH1 0x2
197 #define CM_ENABLE_CH0 0x1
198
199 /* MIDI buffer sizes **************************/
200
201 #define MIDIINBUF 256
202 #define MIDIOUTBUF 256
203
204 #define FMODE_MIDI_SHIFT 2
205 #define FMODE_MIDI_READ (FMODE_READ << FMODE_MIDI_SHIFT)
206 #define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
207
208 #define FMODE_DMFM 0x10
209
210 #define SND_DEV_DSP16 5
211
212 #define NR_DEVICE 3 /* maximum number of devices */
213
214 /*********************************************/
215
216 struct cm_state {
217 unsigned int magic; /* magic */
218 struct cm_state *next; /* we keep cm cards in a linked list */
219
220 int dev_audio; /* soundcore stuff */
221 int dev_mixer;
222 int dev_midi;
223 int dev_dmfm;
224
225 unsigned int iosb, iobase, iosynth,
226 iomidi, iogame, irq; /* hardware resources */
227 unsigned short deviceid; /* pci_id */
228
229 struct { /* mixer stuff */
230 unsigned int modcnt;
231 unsigned short vol[13];
232 } mix;
233
234 unsigned int rateadc, ratedac; /* wave stuff */
235 unsigned char fmt, enable;
236
237 spinlock_t lock;
238 struct semaphore open_sem;
239 mode_t open_mode;
240 wait_queue_head_t open_wait;
241
242 struct dmabuf {
243 void *rawbuf;
244 unsigned rawphys;
245 unsigned buforder;
246 unsigned numfrag;
247 unsigned fragshift;
248 unsigned hwptr, swptr;
249 unsigned total_bytes;
250 int count;
251 unsigned error; /* over/underrun */
252 wait_queue_head_t wait;
253
254 unsigned fragsize; /* redundant, but makes calculations easier */
255 unsigned dmasize;
256 unsigned fragsamples;
257 unsigned dmasamples;
258
259 unsigned mapped:1; /* OSS stuff */
260 unsigned ready:1;
261 unsigned endcleared:1;
262 unsigned ossfragshift;
263 int ossmaxfrags;
264 unsigned subdivision;
265 } dma_dac, dma_adc;
266
267 struct { /* midi stuff */
268 unsigned ird, iwr, icnt;
269 unsigned ord, owr, ocnt;
270 wait_queue_head_t iwait;
271 wait_queue_head_t owait;
272 struct timer_list timer;
273 unsigned char ibuf[MIDIINBUF];
274 unsigned char obuf[MIDIOUTBUF];
275 } midi;
276
277 int chip_version;
278 int max_channels;
279 int curr_channels;
280 int speakers; /* number of speakers */
281 int capability; /* HW capability, various for chip versions */
282
283 int status; /* HW or SW state */
284
285 int spdif_counter; /* spdif frame counter */
286 };
287
288 /* flags used for capability */
289 #define CAN_AC3_HW 0x00000001 /* 037 or later */
290 #define CAN_AC3_SW 0x00000002 /* 033 or later */
291 #define CAN_AC3 (CAN_AC3_HW | CAN_AC3_SW)
292 #define CAN_DUAL_DAC 0x00000004 /* 033 or later */
293 #define CAN_MULTI_CH_HW 0x00000008 /* 039 or later */
294 #define CAN_MULTI_CH (CAN_MULTI_CH_HW | CAN_DUAL_DAC)
295 #define CAN_LINE_AS_REAR 0x00000010 /* 033 or later */
296 #define CAN_LINE_AS_BASS 0x00000020 /* 039 or later */
297 #define CAN_MIC_AS_BASS 0x00000040 /* 039 or later */
298
299 /* flags used for status */
300 #define DO_AC3_HW 0x00000001
301 #define DO_AC3_SW 0x00000002
302 #define DO_AC3 (DO_AC3_HW | DO_AC3_SW)
303 #define DO_DUAL_DAC 0x00000004
304 #define DO_MULTI_CH_HW 0x00000008
305 #define DO_MULTI_CH (DO_MULTI_CH_HW | DO_DUAL_DAC)
306 #define DO_LINE_AS_REAR 0x00000010 /* 033 or later */
307 #define DO_LINE_AS_BASS 0x00000020 /* 039 or later */
308 #define DO_MIC_AS_BASS 0x00000040 /* 039 or later */
309 #define DO_SPDIF_OUT 0x00000100
310 #define DO_SPDIF_IN 0x00000200
311 #define DO_SPDIF_LOOP 0x00000400
312
313 static struct cm_state *devs;
314 static unsigned long wavetable_mem;
315
316 /* --------------------------------------------------------------------- */
317
318 static inline unsigned ld2(unsigned int x)
319 {
320 unsigned exp=16,l=5,r=0;
321 static const unsigned num[]={0x2,0x4,0x10,0x100,0x10000};
322
323 /* num: 2, 4, 16, 256, 65536 */
324 /* exp: 1, 2, 4, 8, 16 */
325
326 while(l--) {
327 if( x >= num[l] ) {
328 if(num[l]>2) x >>= exp;
329 r+=exp;
330 }
331 exp>>=1;
332 }
333
334 return r;
335 }
336
337 /* --------------------------------------------------------------------- */
338
339 static void maskb(unsigned int addr, unsigned int mask, unsigned int value)
340 {
341 outb((inb(addr) & mask) | value, addr);
342 }
343
344 static void maskw(unsigned int addr, unsigned int mask, unsigned int value)
345 {
346 outw((inw(addr) & mask) | value, addr);
347 }
348
349 static void maskl(unsigned int addr, unsigned int mask, unsigned int value)
350 {
351 outl((inl(addr) & mask) | value, addr);
352 }
353
354 static void set_dmadac1(struct cm_state *s, unsigned int addr, unsigned int count)
355 {
356 if (addr)
357 outl(addr, s->iobase + CODEC_CMI_CH0_FRAME1);
358 outw(count - 1, s->iobase + CODEC_CMI_CH0_FRAME2);
359 maskb(s->iobase + CODEC_CMI_FUNCTRL0, ~1, 0);
360 }
361
362 static void set_dmaadc(struct cm_state *s, unsigned int addr, unsigned int count)
363 {
364 outl(addr, s->iobase + CODEC_CMI_CH0_FRAME1);
365 outw(count - 1, s->iobase + CODEC_CMI_CH0_FRAME2);
366 maskb(s->iobase + CODEC_CMI_FUNCTRL0, ~0, 1);
367 }
368
369 static void set_dmadac(struct cm_state *s, unsigned int addr, unsigned int count)
370 {
371 outl(addr, s->iobase + CODEC_CMI_CH1_FRAME1);
372 outw(count - 1, s->iobase + CODEC_CMI_CH1_FRAME2);
373 maskb(s->iobase + CODEC_CMI_FUNCTRL0, ~2, 0);
374 if (s->status & DO_DUAL_DAC)
375 set_dmadac1(s, 0, count);
376 }
377
378 static void set_countadc(struct cm_state *s, unsigned count)
379 {
380 outw(count - 1, s->iobase + CODEC_CMI_CH0_FRAME2 + 2);
381 }
382
383 static void set_countdac(struct cm_state *s, unsigned count)
384 {
385 outw(count - 1, s->iobase + CODEC_CMI_CH1_FRAME2 + 2);
386 if (s->status & DO_DUAL_DAC)
387 set_countadc(s, count);
388 }
389
390 static inline unsigned get_dmadac(struct cm_state *s)
391 {
392 unsigned int curr_addr;
393
394 curr_addr = inw(s->iobase + CODEC_CMI_CH1_FRAME2) + 1;
395 curr_addr <<= sample_shift[(s->fmt >> CM_CFMT_DACSHIFT) & CM_CFMT_MASK];
396 curr_addr = s->dma_dac.dmasize - curr_addr;
397
398 return curr_addr;
399 }
400
401 static inline unsigned get_dmaadc(struct cm_state *s)
402 {
403 unsigned int curr_addr;
404
405 curr_addr = inw(s->iobase + CODEC_CMI_CH0_FRAME2) + 1;
406 curr_addr <<= sample_shift[(s->fmt >> CM_CFMT_ADCSHIFT) & CM_CFMT_MASK];
407 curr_addr = s->dma_adc.dmasize - curr_addr;
408
409 return curr_addr;
410 }
411
412 static void wrmixer(struct cm_state *s, unsigned char idx, unsigned char data)
413 {
414 outb(idx, s->iobase + CODEC_SB16_ADDR);
415 udelay(10);
416 outb(data, s->iobase + CODEC_SB16_DATA);
417 udelay(10);
418 }
419
420 static unsigned char rdmixer(struct cm_state *s, unsigned char idx)
421 {
422 unsigned char v;
423 unsigned long flags;
424
425 spin_lock_irqsave(&s->lock, flags);
426 outb(idx, s->iobase + CODEC_SB16_ADDR);
427 udelay(10);
428 v = inb(s->iobase + CODEC_SB16_DATA);
429 udelay(10);
430 spin_unlock_irqrestore(&s->lock, flags);
431 return v;
432 }
433
434 static void set_fmt_unlocked(struct cm_state *s, unsigned char mask, unsigned char data)
435 {
436 if (mask)
437 {
438 s->fmt = inb(s->iobase + CODEC_CMI_CHFORMAT);
439 udelay(10);
440 }
441 s->fmt = (s->fmt & mask) | data;
442 outb(s->fmt, s->iobase + CODEC_CMI_CHFORMAT);
443 udelay(10);
444 }
445
446 static void set_fmt(struct cm_state *s, unsigned char mask, unsigned char data)
447 {
448 unsigned long flags;
449
450 spin_lock_irqsave(&s->lock, flags);
451 set_fmt_unlocked(s,mask,data);
452 spin_unlock_irqrestore(&s->lock, flags);
453 }
454
455 static void frobindir(struct cm_state *s, unsigned char idx, unsigned char mask, unsigned char data)
456 {
457 outb(idx, s->iobase + CODEC_SB16_ADDR);
458 udelay(10);
459 outb((inb(s->iobase + CODEC_SB16_DATA) & mask) | data, s->iobase + CODEC_SB16_DATA);
460 udelay(10);
461 }
462
463 static struct {
464 unsigned rate;
465 unsigned lower;
466 unsigned upper;
467 unsigned char freq;
468 } rate_lookup[] =
469 {
470 { 5512, (0 + 5512) / 2, (5512 + 8000) / 2, 0 },
471 { 8000, (5512 + 8000) / 2, (8000 + 11025) / 2, 4 },
472 { 11025, (8000 + 11025) / 2, (11025 + 16000) / 2, 1 },
473 { 16000, (11025 + 16000) / 2, (16000 + 22050) / 2, 5 },
474 { 22050, (16000 + 22050) / 2, (22050 + 32000) / 2, 2 },
475 { 32000, (22050 + 32000) / 2, (32000 + 44100) / 2, 6 },
476 { 44100, (32000 + 44100) / 2, (44100 + 48000) / 2, 3 },
477 { 48000, (44100 + 48000) / 2, 48000, 7 }
478 };
479
480 static void set_spdifout_unlocked(struct cm_state *s, unsigned rate)
481 {
482 if (rate == 48000 || rate == 44100) {
483 // SPDIFI48K SPDF_ACc97
484 maskl(s->iobase + CODEC_CMI_MISC_CTRL, ~0x01008000, rate == 48000 ? 0x01008000 : 0);
485 // ENSPDOUT
486 maskb(s->iobase + CODEC_CMI_LEGACY_CTRL + 2, ~0, 0x80);
487 // SPDF_1 SPD2DAC
488 maskw(s->iobase + CODEC_CMI_FUNCTRL1, ~0, 0x240);
489 // CDPLAY
490 if (s->chip_version >= 39)
491 maskb(s->iobase + CODEC_CMI_MIXER1, ~0, 1);
492 s->status |= DO_SPDIF_OUT;
493 } else {
494 maskb(s->iobase + CODEC_CMI_LEGACY_CTRL + 2, ~0x80, 0);
495 maskw(s->iobase + CODEC_CMI_FUNCTRL1, ~0x240, 0);
496 if (s->chip_version >= 39)
497 maskb(s->iobase + CODEC_CMI_MIXER1, ~1, 0);
498 s->status &= ~DO_SPDIF_OUT;
499 }
500 }
501
502 static void set_spdifout(struct cm_state *s, unsigned rate)
503 {
504 unsigned long flags;
505
506 spin_lock_irqsave(&s->lock, flags);
507 set_spdifout_unlocked(s,rate);
508 spin_unlock_irqrestore(&s->lock, flags);
509 }
510
511 /* find parity for bit 4~30 */
512 static unsigned parity(unsigned data)
513 {
514 unsigned parity = 0;
515 int counter = 4;
516
517 data >>= 4; // start from bit 4
518 while (counter <= 30) {
519 if (data & 1)
520 parity++;
521 data >>= 1;
522 counter++;
523 }
524 return parity & 1;
525 }
526
527 static void set_ac3_unlocked(struct cm_state *s, unsigned rate)
528 {
529 /* enable AC3 */
530 if (rate == 48000 || rate == 44100) {
531 // mute DAC
532 maskb(s->iobase + CODEC_CMI_MIXER1, ~0, 0x40);
533 // AC3EN for 037, 0x10
534 maskb(s->iobase + CODEC_CMI_CHFORMAT + 2, ~0, 0x10);
535 // AC3EN for 039, 0x04
536 maskb(s->iobase + CODEC_CMI_MISC_CTRL + 2, ~0, 0x04);
537 if (s->capability & CAN_AC3_HW) {
538 // SPD24SEL for 037, 0x02
539 // SPD24SEL for 039, 0x20, but cannot be set
540 maskb(s->iobase + CODEC_CMI_CHFORMAT + 2, ~0, 0x02);
541 s->status |= DO_AC3_HW;
542 if (s->chip_version >= 39)
543 maskb(s->iobase + CODEC_CMI_MIXER1, ~1, 0);
544 } else {
545 // SPD32SEL for 037 & 039, 0x20
546 maskb(s->iobase + CODEC_CMI_MISC_CTRL + 2, ~0, 0x20);
547 // set 176K sample rate to fix 033 HW bug
548 if (s->chip_version == 33) {
549 if (rate == 48000)
550 maskb(s->iobase + CODEC_CMI_CHFORMAT + 1, ~0, 0x08);
551 else
552 maskb(s->iobase + CODEC_CMI_CHFORMAT + 1, ~0x08, 0);
553 }
554 s->status |= DO_AC3_SW;
555 }
556 } else {
557 maskb(s->iobase + CODEC_CMI_MIXER1, ~0x40, 0);
558 maskb(s->iobase + CODEC_CMI_CHFORMAT + 2, ~0x32, 0);
559 maskb(s->iobase + CODEC_CMI_MISC_CTRL + 2, ~0x24, 0);
560 maskb(s->iobase + CODEC_CMI_CHFORMAT + 1, ~0x08, 0);
561 if (s->chip_version == 33)
562 maskb(s->iobase + CODEC_CMI_CHFORMAT + 1, ~0x08, 0);
563 if (s->chip_version >= 39)
564 maskb(s->iobase + CODEC_CMI_MIXER1, ~0, 1);
565 s->status &= ~DO_AC3;
566 }
567 s->spdif_counter = 0;
568
569 }
570
571 static void set_ac3(struct cm_state *s, unsigned rate)
572 {
573 unsigned long flags;
574
575 spin_lock_irqsave(&s->lock, flags);
576 set_spdifout_unlocked(s, rate);
577 set_ac3_unlocked(s,rate);
578 spin_unlock_irqrestore(&s->lock, flags);
579 }
580
581 static void trans_ac3(struct cm_state *s, void *dest, const char *source, int size)
582 {
583 int i = size / 2;
584 unsigned long data;
585 unsigned long *dst = (unsigned long *) dest;
586 unsigned short *src = (unsigned short *)source;
587
588 do {
589 data = (unsigned long) *src++;
590 data <<= 12; // ok for 16-bit data
591 if (s->spdif_counter == 2 || s->spdif_counter == 3)
592 data |= 0x40000000; // indicate AC-3 raw data
593 if (parity(data))
594 data |= 0x80000000; // parity
595 if (s->spdif_counter == 0)
596 data |= 3; // preamble 'M'
597 else if (s->spdif_counter & 1)
598 data |= 5; // odd, 'W'
599 else
600 data |= 9; // even, 'M'
601 *dst++ = data;
602 s->spdif_counter++;
603 if (s->spdif_counter == 384)
604 s->spdif_counter = 0;
605 } while (--i);
606 }
607
608 static void set_adc_rate_unlocked(struct cm_state *s, unsigned rate)
609 {
610 unsigned char freq = 4;
611 int i;
612
613 if (rate > 48000)
614 rate = 48000;
615 if (rate < 8000)
616 rate = 8000;
617 for (i = 0; i < sizeof(rate_lookup) / sizeof(rate_lookup[0]); i++) {
618 if (rate > rate_lookup[i].lower && rate <= rate_lookup[i].upper) {
619 rate = rate_lookup[i].rate;
620 freq = rate_lookup[i].freq;
621 break;
622 }
623 }
624 s->rateadc = rate;
625 freq <<= 2;
626
627 maskb(s->iobase + CODEC_CMI_FUNCTRL1 + 1, ~0x1c, freq);
628 }
629
630 static void set_adc_rate(struct cm_state *s, unsigned rate)
631 {
632 unsigned long flags;
633 unsigned char freq = 4;
634 int i;
635
636 if (rate > 48000)
637 rate = 48000;
638 if (rate < 8000)
639 rate = 8000;
640 for (i = 0; i < sizeof(rate_lookup) / sizeof(rate_lookup[0]); i++) {
641 if (rate > rate_lookup[i].lower && rate <= rate_lookup[i].upper) {
642 rate = rate_lookup[i].rate;
643 freq = rate_lookup[i].freq;
644 break;
645 }
646 }
647 s->rateadc = rate;
648 freq <<= 2;
649
650 spin_lock_irqsave(&s->lock, flags);
651 maskb(s->iobase + CODEC_CMI_FUNCTRL1 + 1, ~0x1c, freq);
652 spin_unlock_irqrestore(&s->lock, flags);
653 }
654
655 static void set_dac_rate(struct cm_state *s, unsigned rate)
656 {
657 unsigned long flags;
658 unsigned char freq = 4;
659 int i;
660
661 if (rate > 48000)
662 rate = 48000;
663 if (rate < 8000)
664 rate = 8000;
665 for (i = 0; i < sizeof(rate_lookup) / sizeof(rate_lookup[0]); i++) {
666 if (rate > rate_lookup[i].lower && rate <= rate_lookup[i].upper) {
667 rate = rate_lookup[i].rate;
668 freq = rate_lookup[i].freq;
669 break;
670 }
671 }
672 s->ratedac = rate;
673 freq <<= 5;
674
675 spin_lock_irqsave(&s->lock, flags);
676 maskb(s->iobase + CODEC_CMI_FUNCTRL1 + 1, ~0xe0, freq);
677
678
679 if (s->curr_channels <= 2)
680 set_spdifout_unlocked(s, rate);
681 if (s->status & DO_DUAL_DAC)
682 set_adc_rate_unlocked(s, rate);
683
684 spin_unlock_irqrestore(&s->lock, flags);
685 }
686
687 /* --------------------------------------------------------------------- */
688 static inline void reset_adc(struct cm_state *s)
689 {
690 /* reset bus master */
691 outb(s->enable | CM_CH0_RESET, s->iobase + CODEC_CMI_FUNCTRL0 + 2);
692 udelay(10);
693 outb(s->enable & ~CM_CH0_RESET, s->iobase + CODEC_CMI_FUNCTRL0 + 2);
694 }
695
696 static inline void reset_dac(struct cm_state *s)
697 {
698 /* reset bus master */
699 outb(s->enable | CM_CH1_RESET, s->iobase + CODEC_CMI_FUNCTRL0 + 2);
700 outb(s->enable & ~CM_CH1_RESET, s->iobase + CODEC_CMI_FUNCTRL0 + 2);
701 if (s->status & DO_DUAL_DAC)
702 reset_adc(s);
703 }
704
705 static inline void pause_adc(struct cm_state *s)
706 {
707 maskb(s->iobase + CODEC_CMI_FUNCTRL0, ~0, 4);
708 }
709
710 static inline void pause_dac(struct cm_state *s)
711 {
712 maskb(s->iobase + CODEC_CMI_FUNCTRL0, ~0, 8);
713 if (s->status & DO_DUAL_DAC)
714 pause_adc(s);
715 }
716
717 static inline void disable_adc(struct cm_state *s)
718 {
719 /* disable channel */
720 s->enable &= ~CM_ENABLE_CH0;
721 outb(s->enable, s->iobase + CODEC_CMI_FUNCTRL0 + 2);
722 reset_adc(s);
723 }
724
725 static inline void disable_dac(struct cm_state *s)
726 {
727 /* disable channel */
728 s->enable &= ~CM_ENABLE_CH1;
729 outb(s->enable, s->iobase + CODEC_CMI_FUNCTRL0 + 2);
730 reset_dac(s);
731 if (s->status & DO_DUAL_DAC)
732 disable_adc(s);
733 }
734
735 static inline void enable_adc(struct cm_state *s)
736 {
737 if (!(s->enable & CM_ENABLE_CH0)) {
738 /* enable channel */
739 s->enable |= CM_ENABLE_CH0;
740 outb(s->enable, s->iobase + CODEC_CMI_FUNCTRL0 + 2);
741 }
742 maskb(s->iobase + CODEC_CMI_FUNCTRL0, ~4, 0);
743 }
744
745 static inline void enable_dac_unlocked(struct cm_state *s)
746 {
747 if (!(s->enable & CM_ENABLE_CH1)) {
748 /* enable channel */
749 s->enable |= CM_ENABLE_CH1;
750 outb(s->enable, s->iobase + CODEC_CMI_FUNCTRL0 + 2);
751 }
752 maskb(s->iobase + CODEC_CMI_FUNCTRL0, ~8, 0);
753
754 if (s->status & DO_DUAL_DAC)
755 enable_adc(s);
756 }
757
758 static inline void enable_dac(struct cm_state *s)
759 {
760 unsigned long flags;
761
762 spin_lock_irqsave(&s->lock, flags);
763 enable_dac_unlocked(s);
764 spin_unlock_irqrestore(&s->lock, flags);
765 }
766
767 static inline void stop_adc_unlocked(struct cm_state *s)
768 {
769 if (s->enable & CM_ENABLE_CH0) {
770 /* disable interrupt */
771 maskb(s->iobase + CODEC_CMI_INT_HLDCLR + 2, ~1, 0);
772 disable_adc(s);
773 }
774 }
775
776 static inline void stop_adc(struct cm_state *s)
777 {
778 unsigned long flags;
779
780 spin_lock_irqsave(&s->lock, flags);
781 stop_adc_unlocked(s);
782 spin_unlock_irqrestore(&s->lock, flags);
783
784 }
785
786 static inline void stop_dac_unlocked(struct cm_state *s)
787 {
788 if (s->enable & CM_ENABLE_CH1) {
789 /* disable interrupt */
790 maskb(s->iobase + CODEC_CMI_INT_HLDCLR + 2, ~2, 0);
791 disable_dac(s);
792 }
793 if (s->status & DO_DUAL_DAC)
794 stop_adc_unlocked(s);
795 }
796
797 static inline void stop_dac(struct cm_state *s)
798 {
799 unsigned long flags;
800
801 spin_lock_irqsave(&s->lock, flags);
802 stop_dac_unlocked(s);
803 spin_unlock_irqrestore(&s->lock, flags);
804 }
805
806 static void start_adc_unlocked(struct cm_state *s)
807 {
808 if ((s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
809 && s->dma_adc.ready) {
810 /* enable interrupt */
811 maskb(s->iobase + CODEC_CMI_INT_HLDCLR + 2, ~0, 1);
812 enable_adc(s);
813 }
814 }
815
816 static void start_adc(struct cm_state *s)
817 {
818 unsigned long flags;
819
820 spin_lock_irqsave(&s->lock, flags);
821 start_adc_unlocked(s);
822 spin_unlock_irqrestore(&s->lock, flags);
823 }
824
825 static void start_dac1_unlocked(struct cm_state *s)
826 {
827 if ((s->dma_adc.mapped || s->dma_adc.count > 0) && s->dma_adc.ready) {
828 /* enable interrupt */
829 // maskb(s->iobase + CODEC_CMI_INT_HLDCLR + 2, ~0, 1);
830 enable_dac_unlocked(s);
831 }
832 }
833
834 static void start_dac_unlocked(struct cm_state *s)
835 {
836 if ((s->dma_dac.mapped || s->dma_dac.count > 0) && s->dma_dac.ready) {
837 /* enable interrupt */
838 maskb(s->iobase + CODEC_CMI_INT_HLDCLR + 2, ~0, 2);
839 enable_dac_unlocked(s);
840 }
841 if (s->status & DO_DUAL_DAC)
842 start_dac1_unlocked(s);
843 }
844
845 static void start_dac(struct cm_state *s)
846 {
847 unsigned long flags;
848
849 spin_lock_irqsave(&s->lock, flags);
850 start_dac_unlocked(s);
851 spin_unlock_irqrestore(&s->lock, flags);
852 }
853
854 static int prog_dmabuf(struct cm_state *s, unsigned rec);
855
856 static int set_dac_channels(struct cm_state *s, int channels)
857 {
858 unsigned long flags;
859 spin_lock_irqsave(&s->lock, flags);
860
861 if ((channels > 2) && (channels <= s->max_channels)
862 && (((s->fmt >> CM_CFMT_DACSHIFT) & CM_CFMT_MASK) == (CM_CFMT_STEREO | CM_CFMT_16BIT))) {
863 set_spdifout_unlocked(s, 0);
864 if (s->capability & CAN_MULTI_CH_HW) {
865 // NXCHG
866 maskb(s->iobase + CODEC_CMI_LEGACY_CTRL + 3, ~0, 0x80);
867 // CHB3D or CHB3D5C
868 maskb(s->iobase + CODEC_CMI_CHFORMAT + 3, ~0xa0, channels > 4 ? 0x80 : 0x20);
869 // CHB3D6C
870 maskb(s->iobase + CODEC_CMI_LEGACY_CTRL + 1, ~0x80, channels == 6 ? 0x80 : 0);
871 // ENCENTER
872 maskb(s->iobase + CODEC_CMI_MISC_CTRL, ~0x80, channels == 6 ? 0x80 : 0);
873 s->status |= DO_MULTI_CH_HW;
874 } else if (s->capability & CAN_DUAL_DAC) {
875 unsigned char fmtm = ~0, fmts = 0;
876 ssize_t ret;
877
878 // ENDBDAC, turn on double DAC mode
879 // XCHGDAC, CH0 -> back, CH1->front
880 maskb(s->iobase + CODEC_CMI_MISC_CTRL + 2, ~0, 0xC0);
881 s->status |= DO_DUAL_DAC;
882 // prepare secondary buffer
883
884 spin_unlock_irqrestore(&s->lock, flags);
885 ret = prog_dmabuf(s, 1);
886 spin_lock_irqsave(&s->lock, flags);
887
888 if (ret) return ret;
889 // copy the hw state
890 fmtm &= ~((CM_CFMT_STEREO | CM_CFMT_16BIT) << CM_CFMT_DACSHIFT);
891 fmtm &= ~((CM_CFMT_STEREO | CM_CFMT_16BIT) << CM_CFMT_ADCSHIFT);
892 // the HW only support 16-bit stereo
893 fmts |= CM_CFMT_16BIT << CM_CFMT_DACSHIFT;
894 fmts |= CM_CFMT_16BIT << CM_CFMT_ADCSHIFT;
895 fmts |= CM_CFMT_STEREO << CM_CFMT_DACSHIFT;
896 fmts |= CM_CFMT_STEREO << CM_CFMT_ADCSHIFT;
897
898 set_fmt_unlocked(s, fmtm, fmts);
899 set_adc_rate_unlocked(s, s->ratedac);
900
901 }
902
903 if (s->speakers > 2)
904 maskb(s->iobase + CODEC_CMI_MISC_CTRL + 3, ~0x04, 0);
905 s->curr_channels = channels;
906 } else {
907 if (s->status & DO_MULTI_CH_HW) {
908 maskb(s->iobase + CODEC_CMI_LEGACY_CTRL + 3, ~0x80, 0);
909 maskb(s->iobase + CODEC_CMI_CHFORMAT + 3, ~0xa0, 0);
910 maskb(s->iobase + CODEC_CMI_LEGACY_CTRL + 1, ~0x80, 0);
911 } else if (s->status & DO_DUAL_DAC) {
912 maskb(s->iobase + CODEC_CMI_MISC_CTRL + 2, ~0x80, 0);
913 }
914 // N4SPK3D, enable 4 speaker mode (analog duplicate)
915 if (s->speakers > 2)
916 maskb(s->iobase + CODEC_CMI_MISC_CTRL + 3, ~0, 0x04);
917 s->status &= ~DO_MULTI_CH;
918 s->curr_channels = s->fmt & (CM_CFMT_STEREO << CM_CFMT_DACSHIFT) ? 2 : 1;
919 }
920
921 spin_unlock_irqrestore(&s->lock, flags);
922 return s->curr_channels;
923 }
924
925 /* --------------------------------------------------------------------- */
926
927 #define DMABUF_DEFAULTORDER (16-PAGE_SHIFT)
928 #define DMABUF_MINORDER 1
929
930 static void dealloc_dmabuf(struct dmabuf *db)
931 {
932 struct page *pstart, *pend;
933
934 if (db->rawbuf) {
935 /* undo marking the pages as reserved */
936 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
937 for (pstart = virt_to_page(db->rawbuf); pstart <= pend; pstart++)
938 mem_map_unreserve(pstart);
939 free_pages((unsigned long)db->rawbuf, db->buforder);
940 }
941 db->rawbuf = NULL;
942 db->mapped = db->ready = 0;
943 }
944
945 /* Ch1 is used for playback, Ch0 is used for recording */
946
947 static int prog_dmabuf(struct cm_state *s, unsigned rec)
948 {
949 struct dmabuf *db = rec ? &s->dma_adc : &s->dma_dac;
950 unsigned rate = rec ? s->rateadc : s->ratedac;
951 int order;
952 unsigned bytepersec;
953 unsigned bufs;
954 struct page *pstart, *pend;
955 unsigned char fmt;
956 unsigned long flags;
957
958 fmt = s->fmt;
959 if (rec) {
960 stop_adc(s);
961 fmt >>= CM_CFMT_ADCSHIFT;
962 } else {
963 stop_dac(s);
964 fmt >>= CM_CFMT_DACSHIFT;
965 }
966
967 fmt &= CM_CFMT_MASK;
968 db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
969 if (!db->rawbuf) {
970 db->ready = db->mapped = 0;
971 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
972 if ((db->rawbuf = (void *)__get_free_pages(GFP_KERNEL | GFP_DMA, order)))
973 break;
974 if (!db->rawbuf)
975 return -ENOMEM;
976 db->buforder = order;
977 db->rawphys = virt_to_bus(db->rawbuf);
978 if ((db->rawphys ^ (db->rawphys + (PAGE_SIZE << db->buforder) - 1)) & ~0xffff)
979 printk(KERN_DEBUG "cmpci: DMA buffer crosses 64k boundary: busaddr 0x%lx size %ld\n",
980 (long) db->rawphys, PAGE_SIZE << db->buforder);
981 if ((db->rawphys + (PAGE_SIZE << db->buforder) - 1) & ~0xffffff)
982 printk(KERN_DEBUG "cmpci: DMA buffer beyond 16MB: busaddr 0x%lx size %ld\n",
983 (long) db->rawphys, PAGE_SIZE << db->buforder);
984 /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
985 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
986 for (pstart = virt_to_page(db->rawbuf); pstart <= pend; pstart++)
987 mem_map_reserve(pstart);
988 }
989 bytepersec = rate << sample_shift[fmt];
990 bufs = PAGE_SIZE << db->buforder;
991 if (db->ossfragshift) {
992 if ((1000 << db->ossfragshift) < bytepersec)
993 db->fragshift = ld2(bytepersec/1000);
994 else
995 db->fragshift = db->ossfragshift;
996 } else {
997 db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1));
998 if (db->fragshift < 3)
999 db->fragshift = 3;
1000 }
1001 db->numfrag = bufs >> db->fragshift;
1002 while (db->numfrag < 4 && db->fragshift > 3) {
1003 db->fragshift--;
1004 db->numfrag = bufs >> db->fragshift;
1005 }
1006 db->fragsize = 1 << db->fragshift;
1007 if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
1008 db->numfrag = db->ossmaxfrags;
1009 /* to make fragsize >= 4096 */
1010 db->fragsamples = db->fragsize >> sample_shift[fmt];
1011 db->dmasize = db->numfrag << db->fragshift;
1012 db->dmasamples = db->dmasize >> sample_shift[fmt];
1013 memset(db->rawbuf, (fmt & CM_CFMT_16BIT) ? 0 : 0x80, db->dmasize);
1014 spin_lock_irqsave(&s->lock, flags);
1015 if (rec) {
1016 if (s->status & DO_DUAL_DAC)
1017 set_dmadac1(s, db->rawphys, db->dmasize >> sample_shift[fmt]);
1018 else
1019 set_dmaadc(s, db->rawphys, db->dmasize >> sample_shift[fmt]);
1020 /* program sample counts */
1021 set_countdac(s, db->fragsamples);
1022 } else {
1023 set_dmadac(s, db->rawphys, db->dmasize >> sample_shift[fmt]);
1024 /* program sample counts */
1025 set_countdac(s, db->fragsamples);
1026 }
1027 spin_unlock_irqrestore(&s->lock, flags);
1028 db->ready = 1;
1029 return 0;
1030 }
1031
1032 static inline void clear_advance(struct cm_state *s)
1033 {
1034 unsigned char c = (s->fmt & (CM_CFMT_16BIT << CM_CFMT_DACSHIFT)) ? 0 : 0x80;
1035 unsigned char *buf = s->dma_dac.rawbuf;
1036 unsigned char *buf1 = s->dma_adc.rawbuf;
1037 unsigned bsize = s->dma_dac.dmasize;
1038 unsigned bptr = s->dma_dac.swptr;
1039 unsigned len = s->dma_dac.fragsize;
1040
1041 if (bptr + len > bsize) {
1042 unsigned x = bsize - bptr;
1043 memset(buf + bptr, c, x);
1044 if (s->status & DO_DUAL_DAC)
1045 memset(buf1 + bptr, c, x);
1046 bptr = 0;
1047 len -= x;
1048 }
1049 memset(buf + bptr, c, len);
1050 if (s->status & DO_DUAL_DAC)
1051 memset(buf1 + bptr, c, len);
1052 }
1053
1054 /* call with spinlock held! */
1055 static void cm_update_ptr(struct cm_state *s)
1056 {
1057 unsigned hwptr;
1058 int diff;
1059
1060 /* update ADC pointer */
1061 if (s->dma_adc.ready) {
1062 if (s->status & DO_DUAL_DAC) {
1063 hwptr = get_dmaadc(s) % s->dma_adc.dmasize;
1064 diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
1065 s->dma_adc.hwptr = hwptr;
1066 s->dma_adc.total_bytes += diff;
1067 if (s->dma_adc.mapped) {
1068 s->dma_adc.count += diff;
1069 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1070 wake_up(&s->dma_adc.wait);
1071 } else {
1072 s->dma_adc.count -= diff;
1073 if (s->dma_adc.count <= 0) {
1074 pause_adc(s);
1075 s->dma_adc.error++;
1076 } else if (s->dma_adc.count <= (signed)s->dma_adc.fragsize && !s->dma_adc.endcleared) {
1077 clear_advance(s);
1078 s->dma_adc.endcleared = 1;
1079 }
1080 if (s->dma_dac.count + (signed)s->dma_dac.fragsize <= (signed)s->dma_dac.dmasize)
1081 wake_up(&s->dma_adc.wait);
1082 }
1083 } else {
1084 hwptr = get_dmaadc(s) % s->dma_adc.dmasize;
1085 diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
1086 s->dma_adc.hwptr = hwptr;
1087 s->dma_adc.total_bytes += diff;
1088 s->dma_adc.count += diff;
1089 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1090 wake_up(&s->dma_adc.wait);
1091 if (!s->dma_adc.mapped) {
1092 if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
1093 pause_adc(s);
1094 s->dma_adc.error++;
1095 }
1096 }
1097 }
1098 }
1099 /* update DAC pointer */
1100 if (s->dma_dac.ready) {
1101 hwptr = get_dmadac(s) % s->dma_dac.dmasize;
1102 diff = (s->dma_dac.dmasize + hwptr - s->dma_dac.hwptr) % s->dma_dac.dmasize;
1103 s->dma_dac.hwptr = hwptr;
1104 s->dma_dac.total_bytes += diff;
1105 if (s->dma_dac.mapped) {
1106 s->dma_dac.count += diff;
1107 if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
1108 wake_up(&s->dma_dac.wait);
1109 } else {
1110 s->dma_dac.count -= diff;
1111 if (s->dma_dac.count <= 0) {
1112 pause_dac(s);
1113 s->dma_dac.error++;
1114 } else if (s->dma_dac.count <= (signed)s->dma_dac.fragsize && !s->dma_dac.endcleared) {
1115 clear_advance(s);
1116 s->dma_dac.endcleared = 1;
1117 }
1118 if (s->dma_dac.count + (signed)s->dma_dac.fragsize <= (signed)s->dma_dac.dmasize)
1119 wake_up(&s->dma_dac.wait);
1120 }
1121 }
1122 }
1123
1124 #ifdef CONFIG_SOUND_CMPCI_MIDI
1125 /* hold spinlock for the following! */
1126 static void cm_handle_midi(struct cm_state *s)
1127 {
1128 unsigned char ch;
1129 int wake;
1130
1131 wake = 0;
1132 while (!(inb(s->iomidi+1) & 0x80)) {
1133 ch = inb(s->iomidi);
1134 if (s->midi.icnt < MIDIINBUF) {
1135 s->midi.ibuf[s->midi.iwr] = ch;
1136 s->midi.iwr = (s->midi.iwr + 1) % MIDIINBUF;
1137 s->midi.icnt++;
1138 }
1139 wake = 1;
1140 }
1141 if (wake)
1142 wake_up(&s->midi.iwait);
1143 wake = 0;
1144 while (!(inb(s->iomidi+1) & 0x40) && s->midi.ocnt > 0) {
1145 outb(s->midi.obuf[s->midi.ord], s->iomidi);
1146 s->midi.ord = (s->midi.ord + 1) % MIDIOUTBUF;
1147 s->midi.ocnt--;
1148 if (s->midi.ocnt < MIDIOUTBUF-16)
1149 wake = 1;
1150 }
1151 if (wake)
1152 wake_up(&s->midi.owait);
1153 }
1154 #endif
1155
1156 static void cm_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1157 {
1158 struct cm_state *s = (struct cm_state *)dev_id;
1159 unsigned int intsrc, intstat;
1160 unsigned char mask = 0;
1161
1162 /* fastpath out, to ease interrupt sharing */
1163 intsrc = inl(s->iobase + CODEC_CMI_INT_STATUS);
1164 if (!(intsrc & 0x80000000))
1165 return;
1166 spin_lock(&s->lock);
1167 intstat = inb(s->iobase + CODEC_CMI_INT_HLDCLR + 2);
1168 /* acknowledge interrupt */
1169 if (intsrc & CM_INT_CH0)
1170 mask |= 1;
1171 if (intsrc & CM_INT_CH1)
1172 mask |= 2;
1173 outb(intstat & ~mask, s->iobase + CODEC_CMI_INT_HLDCLR + 2);
1174 outb(intstat | mask, s->iobase + CODEC_CMI_INT_HLDCLR + 2);
1175 cm_update_ptr(s);
1176 #ifdef CONFIG_SOUND_CMPCI_MIDI
1177 cm_handle_midi(s);
1178 #endif
1179 spin_unlock(&s->lock);
1180 }
1181
1182 #ifdef CONFIG_SOUND_CMPCI_MIDI
1183 static void cm_midi_timer(unsigned long data)
1184 {
1185 struct cm_state *s = (struct cm_state *)data;
1186 unsigned long flags;
1187
1188 spin_lock_irqsave(&s->lock, flags);
1189 cm_handle_midi(s);
1190 spin_unlock_irqrestore(&s->lock, flags);
1191 s->midi.timer.expires = jiffies+1;
1192 add_timer(&s->midi.timer);
1193 }
1194 #endif
1195
1196 /* --------------------------------------------------------------------- */
1197
1198 static const char invalid_magic[] = KERN_CRIT "cmpci: invalid magic value\n";
1199
1200 #ifdef CONFIG_SOUND_CMPCI /* support multiple chips */
1201 #define VALIDATE_STATE(s)
1202 #else
1203 #define VALIDATE_STATE(s) \
1204 ({ \
1205 if (!(s) || (s)->magic != CM_MAGIC) { \
1206 printk(invalid_magic); \
1207 return -ENXIO; \
1208 } \
1209 })
1210 #endif
1211
1212 /* --------------------------------------------------------------------- */
1213
1214 #define MT_4 1
1215 #define MT_5MUTE 2
1216 #define MT_4MUTEMONO 3
1217 #define MT_6MUTE 4
1218 #define MT_5MUTEMONO 5
1219
1220 static const struct {
1221 unsigned left;
1222 unsigned right;
1223 unsigned type;
1224 unsigned rec;
1225 unsigned play;
1226 } mixtable[SOUND_MIXER_NRDEVICES] = {
1227 [SOUND_MIXER_CD] = { DSP_MIX_CDVOLIDX_L, DSP_MIX_CDVOLIDX_R, MT_5MUTE, 0x04, 0x02 },
1228 [SOUND_MIXER_LINE] = { DSP_MIX_LINEVOLIDX_L, DSP_MIX_LINEVOLIDX_R, MT_5MUTE, 0x10, 0x08 },
1229 [SOUND_MIXER_MIC] = { DSP_MIX_MICVOLIDX, DSP_MIX_MICVOLIDX, MT_5MUTEMONO, 0x01, 0x01 },
1230 [SOUND_MIXER_SYNTH] = { DSP_MIX_FMVOLIDX_L, DSP_MIX_FMVOLIDX_R, MT_5MUTE, 0x40, 0x00 },
1231 [SOUND_MIXER_VOLUME] = { DSP_MIX_MASTERVOLIDX_L, DSP_MIX_MASTERVOLIDX_R, MT_5MUTE, 0x00, 0x00 },
1232 [SOUND_MIXER_PCM] = { DSP_MIX_VOICEVOLIDX_L, DSP_MIX_VOICEVOLIDX_R, MT_5MUTE, 0x00, 0x00 },
1233 [SOUND_MIXER_SPEAKER]= { DSP_MIX_SPKRVOLIDX, DSP_MIX_SPKRVOLIDX, MT_5MUTEMONO, 0x01, 0x01 }
1234 };
1235
1236 static const unsigned char volidx[SOUND_MIXER_NRDEVICES] =
1237 {
1238 [SOUND_MIXER_CD] = 1,
1239 [SOUND_MIXER_LINE] = 2,
1240 [SOUND_MIXER_MIC] = 3,
1241 [SOUND_MIXER_SYNTH] = 4,
1242 [SOUND_MIXER_VOLUME] = 5,
1243 [SOUND_MIXER_PCM] = 6,
1244 [SOUND_MIXER_SPEAKER]= 7
1245 };
1246
1247 static unsigned mixer_recmask(struct cm_state *s)
1248 {
1249 int i, j, k;
1250
1251 j = rdmixer(s, DSP_MIX_ADCMIXIDX_L);
1252 j &= 0x7f;
1253 for (k = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1254 if (j & mixtable[i].rec)
1255 k |= 1 << i;
1256 return k;
1257 }
1258
1259 static int mixer_ioctl(struct cm_state *s, unsigned int cmd, unsigned long arg)
1260 {
1261 unsigned long flags;
1262 int i, val, j;
1263 unsigned char l, r, rl, rr;
1264
1265 VALIDATE_STATE(s);
1266 if (cmd == SOUND_MIXER_INFO) {
1267 mixer_info info;
1268 strncpy(info.id, "cmpci", sizeof(info.id));
1269 strncpy(info.name, "C-Media PCI", sizeof(info.name));
1270 info.modify_counter = s->mix.modcnt;
1271 if (copy_to_user((void *)arg, &info, sizeof(info)))
1272 return -EFAULT;
1273 return 0;
1274 }
1275 if (cmd == SOUND_OLD_MIXER_INFO) {
1276 _old_mixer_info info;
1277 strncpy(info.id, "cmpci", sizeof(info.id));
1278 strncpy(info.name, "C-Media cmpci", sizeof(info.name));
1279 if (copy_to_user((void *)arg, &info, sizeof(info)))
1280 return -EFAULT;
1281 return 0;
1282 }
1283 if (cmd == OSS_GETVERSION)
1284 return put_user(SOUND_VERSION, (int *)arg);
1285 if (_IOC_TYPE(cmd) != 'M' || _IOC_SIZE(cmd) != sizeof(int))
1286 return -EINVAL;
1287 if (_IOC_DIR(cmd) == _IOC_READ) {
1288 switch (_IOC_NR(cmd)) {
1289 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
1290 return put_user(mixer_recmask(s), (int *)arg);
1291
1292 case SOUND_MIXER_OUTSRC: /* Arg contains a bit for each recording source */
1293 return put_user(mixer_recmask(s), (int *)arg);//need fix
1294
1295 case SOUND_MIXER_DEVMASK: /* Arg contains a bit for each supported device */
1296 for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1297 if (mixtable[i].type)
1298 val |= 1 << i;
1299 return put_user(val, (int *)arg);
1300
1301 case SOUND_MIXER_RECMASK: /* Arg contains a bit for each supported recording source */
1302 for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1303 if (mixtable[i].rec)
1304 val |= 1 << i;
1305 return put_user(val, (int *)arg);
1306
1307 case SOUND_MIXER_OUTMASK: /* Arg contains a bit for each supported recording source */
1308 for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1309 if (mixtable[i].play)
1310 val |= 1 << i;
1311 return put_user(val, (int *)arg);
1312
1313 case SOUND_MIXER_STEREODEVS: /* Mixer channels supporting stereo */
1314 for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1315 if (mixtable[i].type && mixtable[i].type != MT_4MUTEMONO)
1316 val |= 1 << i;
1317 return put_user(val, (int *)arg);
1318
1319 case SOUND_MIXER_CAPS:
1320 return put_user(0, (int *)arg);
1321
1322 default:
1323 i = _IOC_NR(cmd);
1324 if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].type)
1325 return -EINVAL;
1326 if (!volidx[i])
1327 return -EINVAL;
1328 return put_user(s->mix.vol[volidx[i]-1], (int *)arg);
1329 }
1330 }
1331 if (_IOC_DIR(cmd) != (_IOC_READ|_IOC_WRITE))
1332 return -EINVAL;
1333 s->mix.modcnt++;
1334 switch (_IOC_NR(cmd)) {
1335 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
1336 if (get_user(val, (int *)arg))
1337 return -EFAULT;
1338 i = generic_hweight32(val);
1339 for (j = i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
1340 if (!(val & (1 << i)))
1341 continue;
1342 if (!mixtable[i].rec) {
1343 val &= ~(1 << i);
1344 continue;
1345 }
1346 j |= mixtable[i].rec;
1347 }
1348 spin_lock_irqsave(&s->lock, flags);
1349 wrmixer(s, DSP_MIX_ADCMIXIDX_L, j);
1350 wrmixer(s, DSP_MIX_ADCMIXIDX_R, (j & 1) | (j>>1));
1351 spin_unlock_irqrestore(&s->lock, flags);
1352 return 0;
1353
1354 case SOUND_MIXER_OUTSRC: /* Arg contains a bit for each recording source */
1355 if (get_user(val, (int *)arg))
1356 return -EFAULT;
1357 for (j = i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
1358 if (!(val & (1 << i)))
1359 continue;
1360 if (!mixtable[i].play) {
1361 val &= ~(1 << i);
1362 continue;
1363 }
1364 j |= mixtable[i].play;
1365 }
1366 spin_lock_irqsave(&s->lock, flags);
1367 frobindir(s, DSP_MIX_OUTMIXIDX, 0x1f, j);
1368 spin_unlock_irqrestore(&s->lock, flags);
1369 return 0;
1370
1371 default:
1372 i = _IOC_NR(cmd);
1373 if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].type)
1374 return -EINVAL;
1375 if (get_user(val, (int *)arg))
1376 return -EFAULT;
1377 l = val & 0xff;
1378 r = (val >> 8) & 0xff;
1379 if (l > 100)
1380 l = 100;
1381 if (r > 100)
1382 r = 100;
1383 spin_lock_irqsave(&s->lock, flags);
1384 switch (mixtable[i].type) {
1385 case MT_4:
1386 if (l >= 10)
1387 l -= 10;
1388 if (r >= 10)
1389 r -= 10;
1390 frobindir(s, mixtable[i].left, 0xf0, l / 6);
1391 frobindir(s, mixtable[i].right, 0xf0, l / 6);
1392 break;
1393
1394 case MT_4MUTEMONO:
1395 rl = (l < 4 ? 0 : (l - 5) / 3) & 31;
1396 rr = (rl >> 2) & 7;
1397 wrmixer(s, mixtable[i].left, rl<<3);
1398 maskb(s->iobase + CODEC_CMI_MIXER2, ~0x0e, rr<<1);
1399 break;
1400
1401 case MT_5MUTEMONO:
1402 r = l;
1403 rl = l < 4 ? 0 : (l - 5) / 3;
1404 rr = rl >> 2;
1405 wrmixer(s, mixtable[i].left, rl<<3);
1406 maskb(s->iobase + CODEC_CMI_MIXER2, ~0x0e, rr<<1);
1407 break;
1408
1409 case MT_5MUTE:
1410 rl = l < 4 ? 0 : (l - 5) / 3;
1411 rr = r < 4 ? 0 : (r - 5) / 3;
1412 wrmixer(s, mixtable[i].left, rl<<3);
1413 wrmixer(s, mixtable[i].right, rr<<3);
1414 break;
1415
1416 case MT_6MUTE:
1417 if (l < 6)
1418 rl = 0x00;
1419 else
1420 rl = l * 2 / 3;
1421 if (r < 6)
1422 rr = 0x00;
1423 else
1424 rr = r * 2 / 3;
1425 wrmixer(s, mixtable[i].left, rl);
1426 wrmixer(s, mixtable[i].right, rr);
1427 break;
1428 }
1429 spin_unlock_irqrestore(&s->lock, flags);
1430
1431 if (!volidx[i])
1432 return -EINVAL;
1433 s->mix.vol[volidx[i]-1] = val;
1434 return put_user(s->mix.vol[volidx[i]-1], (int *)arg);
1435 }
1436 }
1437
1438 /* --------------------------------------------------------------------- */
1439
1440 static int cm_open_mixdev(struct inode *inode, struct file *file)
1441 {
1442 int minor = MINOR(inode->i_rdev);
1443 struct cm_state *s = devs;
1444
1445 while (s && s->dev_mixer != minor)
1446 s = s->next;
1447 if (!s)
1448 return -ENODEV;
1449 VALIDATE_STATE(s);
1450 file->private_data = s;
1451 return 0;
1452 }
1453
1454 static int cm_release_mixdev(struct inode *inode, struct file *file)
1455 {
1456 struct cm_state *s = (struct cm_state *)file->private_data;
1457
1458 VALIDATE_STATE(s);
1459 return 0;
1460 }
1461
1462 static int cm_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1463 {
1464 return mixer_ioctl((struct cm_state *)file->private_data, cmd, arg);
1465 }
1466
1467 static /*const*/ struct file_operations cm_mixer_fops = {
1468 owner: THIS_MODULE,
1469 llseek: no_llseek,
1470 ioctl: cm_ioctl_mixdev,
1471 open: cm_open_mixdev,
1472 release: cm_release_mixdev,
1473 };
1474
1475
1476 /* --------------------------------------------------------------------- */
1477
1478 static int drain_dac(struct cm_state *s, int nonblock)
1479 {
1480 DECLARE_WAITQUEUE(wait, current);
1481 unsigned long flags;
1482 int count, tmo;
1483
1484 if (s->dma_dac.mapped || !s->dma_dac.ready)
1485 return 0;
1486 current->state = TASK_INTERRUPTIBLE;
1487 add_wait_queue(&s->dma_dac.wait, &wait);
1488 for (;;) {
1489 spin_lock_irqsave(&s->lock, flags);
1490 count = s->dma_dac.count;
1491 spin_unlock_irqrestore(&s->lock, flags);
1492 if (count <= 0)
1493 break;
1494 if (signal_pending(current))
1495 break;
1496 if (nonblock) {
1497 remove_wait_queue(&s->dma_dac.wait, &wait);
1498 current->state = TASK_RUNNING;
1499 return -EBUSY;
1500 }
1501 tmo = 3 * HZ * (count + s->dma_dac.fragsize) / 2 / s->ratedac;
1502 tmo >>= sample_shift[(s->fmt >> CM_CFMT_DACSHIFT) & CM_CFMT_MASK];
1503 if (!schedule_timeout(tmo + 1))
1504 printk(KERN_DEBUG "cmpci: dma timed out??\n");
1505 }
1506 remove_wait_queue(&s->dma_dac.wait, &wait);
1507 current->state = TASK_RUNNING;
1508 if (signal_pending(current))
1509 return -ERESTARTSYS;
1510 return 0;
1511 }
1512
1513 /* --------------------------------------------------------------------- */
1514
1515 static ssize_t cm_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1516 {
1517 struct cm_state *s = (struct cm_state *)file->private_data;
1518 ssize_t ret;
1519 unsigned long flags;
1520 unsigned swptr;
1521 int cnt;
1522
1523 VALIDATE_STATE(s);
1524 if (ppos != &file->f_pos)
1525 return -ESPIPE;
1526 if (s->dma_adc.mapped)
1527 return -ENXIO;
1528 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
1529 return ret;
1530 if (!access_ok(VERIFY_WRITE, buffer, count))
1531 return -EFAULT;
1532 ret = 0;
1533
1534 while (count > 0) {
1535 spin_lock_irqsave(&s->lock, flags);
1536 swptr = s->dma_adc.swptr;
1537 cnt = s->dma_adc.dmasize-swptr;
1538 if (s->dma_adc.count < cnt)
1539 cnt = s->dma_adc.count;
1540 spin_unlock_irqrestore(&s->lock, flags);
1541 if (cnt > count)
1542 cnt = count;
1543 if (cnt <= 0) {
1544 start_adc(s);
1545 if (file->f_flags & O_NONBLOCK)
1546 return ret ? ret : -EAGAIN;
1547 if (!interruptible_sleep_on_timeout(&s->dma_adc.wait, HZ)) {
1548 printk(KERN_DEBUG "cmpci: read: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1549 s->dma_adc.dmasize, s->dma_adc.fragsize, s->dma_adc.count,
1550 s->dma_adc.hwptr, s->dma_adc.swptr);
1551 spin_lock_irqsave(&s->lock, flags);
1552 stop_adc_unlocked(s);
1553 set_dmaadc(s, s->dma_adc.rawphys, s->dma_adc.dmasamples);
1554 /* program sample counts */
1555 set_countadc(s, s->dma_adc.fragsamples);
1556 s->dma_adc.count = s->dma_adc.hwptr = s->dma_adc.swptr = 0;
1557 spin_unlock_irqrestore(&s->lock, flags);
1558 }
1559 if (signal_pending(current))
1560 return ret ? ret : -ERESTARTSYS;
1561 continue;
1562 }
1563 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt))
1564 return ret ? ret : -EFAULT;
1565 swptr = (swptr + cnt) % s->dma_adc.dmasize;
1566 spin_lock_irqsave(&s->lock, flags);
1567 s->dma_adc.swptr = swptr;
1568 s->dma_adc.count -= cnt;
1569 count -= cnt;
1570 buffer += cnt;
1571 ret += cnt;
1572 start_adc_unlocked(s);
1573 spin_unlock_irqrestore(&s->lock, flags);
1574 }
1575 return ret;
1576 }
1577
1578 static ssize_t cm_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1579 {
1580 struct cm_state *s = (struct cm_state *)file->private_data;
1581 ssize_t ret;
1582 unsigned long flags;
1583 unsigned swptr;
1584 int cnt;
1585
1586 VALIDATE_STATE(s);
1587 if (ppos != &file->f_pos)
1588 return -ESPIPE;
1589 if (s->dma_dac.mapped)
1590 return -ENXIO;
1591 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
1592 return ret;
1593 if (!access_ok(VERIFY_READ, buffer, count))
1594 return -EFAULT;
1595 if (s->status & DO_DUAL_DAC) {
1596 if (s->dma_adc.mapped)
1597 return -ENXIO;
1598 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
1599 return ret;
1600 if (!access_ok(VERIFY_READ, buffer, count))
1601 return -EFAULT;
1602 }
1603 ret = 0;
1604
1605 while (count > 0) {
1606 spin_lock_irqsave(&s->lock, flags);
1607 if (s->dma_dac.count < 0) {
1608 s->dma_dac.count = 0;
1609 s->dma_dac.swptr = s->dma_dac.hwptr;
1610 }
1611 if (s->status & DO_DUAL_DAC) {
1612 s->dma_adc.swptr = s->dma_dac.swptr;
1613 s->dma_adc.count = s->dma_dac.count;
1614 s->dma_adc.endcleared = s->dma_dac.endcleared;
1615 }
1616 swptr = s->dma_dac.swptr;
1617 cnt = s->dma_dac.dmasize-swptr;
1618 if (s->status & DO_AC3_SW) {
1619 if (s->dma_dac.count + 2 * cnt > s->dma_dac.dmasize)
1620 cnt = (s->dma_dac.dmasize - s->dma_dac.count) / 2;
1621 } else {
1622 if (s->dma_dac.count + cnt > s->dma_dac.dmasize)
1623 cnt = s->dma_dac.dmasize - s->dma_dac.count;
1624 }
1625 spin_unlock_irqrestore(&s->lock, flags);
1626 if (cnt > count)
1627 cnt = count;
1628 if ((s->status & DO_DUAL_DAC) && (cnt > count / 2))
1629 cnt = count / 2;
1630 if (cnt <= 0) {
1631 start_dac(s);
1632 if (file->f_flags & O_NONBLOCK)
1633 return ret ? ret : -EAGAIN;
1634 if (!interruptible_sleep_on_timeout(&s->dma_dac.wait, HZ)) {
1635 printk(KERN_DEBUG "cmpci: write: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1636 s->dma_dac.dmasize, s->dma_dac.fragsize, s->dma_dac.count,
1637 s->dma_dac.hwptr, s->dma_dac.swptr);
1638 spin_lock_irqsave(&s->lock, flags);
1639 stop_dac_unlocked(s);
1640 set_dmadac(s, s->dma_dac.rawphys, s->dma_dac.dmasamples);
1641 /* program sample counts */
1642 set_countdac(s, s->dma_dac.fragsamples);
1643 s->dma_dac.count = s->dma_dac.hwptr = s->dma_dac.swptr = 0;
1644 if (s->status & DO_DUAL_DAC) {
1645 set_dmadac1(s, s->dma_adc.rawphys, s->dma_adc.dmasamples);
1646 s->dma_adc.count = s->dma_adc.hwptr = s->dma_adc.swptr = 0;
1647 }
1648 spin_unlock_irqrestore(&s->lock, flags);
1649 }
1650 if (signal_pending(current))
1651 return ret ? ret : -ERESTARTSYS;
1652 continue;
1653 }
1654 if (s->status & DO_AC3_SW) {
1655 // clip exceeded data, caught by 033 and 037
1656 if (swptr + 2 * cnt > s->dma_dac.dmasize)
1657 cnt = (s->dma_dac.dmasize - swptr) / 2;
1658 trans_ac3(s, s->dma_dac.rawbuf + swptr, buffer, cnt);
1659 swptr = (swptr + 2 * cnt) % s->dma_dac.dmasize;
1660 } else if (s->status & DO_DUAL_DAC) {
1661 int i;
1662 unsigned long *src, *dst0, *dst1;
1663
1664 src = (unsigned long *) buffer;
1665 dst0 = (unsigned long *) (s->dma_dac.rawbuf + swptr);
1666 dst1 = (unsigned long *) (s->dma_adc.rawbuf + swptr);
1667 // copy left/right sample at one time
1668 for (i = 0; i <= cnt / 4; i++) {
1669 *dst0++ = *src++;
1670 *dst1++ = *src++;
1671 }
1672 swptr = (swptr + cnt) % s->dma_dac.dmasize;
1673 } else {
1674 if (copy_from_user(s->dma_dac.rawbuf + swptr, buffer, cnt))
1675 return ret ? ret : -EFAULT;
1676 swptr = (swptr + cnt) % s->dma_dac.dmasize;
1677 }
1678 spin_lock_irqsave(&s->lock, flags);
1679 s->dma_dac.swptr = swptr;
1680 s->dma_dac.count += cnt;
1681 if (s->status & DO_AC3_SW)
1682 s->dma_dac.count += cnt;
1683 s->dma_dac.endcleared = 0;
1684 spin_unlock_irqrestore(&s->lock, flags);
1685 count -= cnt;
1686 buffer += cnt;
1687 ret += cnt;
1688 if (s->status & DO_DUAL_DAC) {
1689 count -= cnt;
1690 buffer += cnt;
1691 ret += cnt;
1692 }
1693 start_dac(s);
1694 }
1695 return ret;
1696 }
1697
1698 static unsigned int cm_poll(struct file *file, struct poll_table_struct *wait)
1699 {
1700 struct cm_state *s = (struct cm_state *)file->private_data;
1701 unsigned long flags;
1702 unsigned int mask = 0;
1703
1704 VALIDATE_STATE(s);
1705 if (file->f_mode & FMODE_WRITE)
1706 poll_wait(file, &s->dma_dac.wait, wait);
1707 if (file->f_mode & FMODE_READ)
1708 poll_wait(file, &s->dma_adc.wait, wait);
1709 spin_lock_irqsave(&s->lock, flags);
1710 cm_update_ptr(s);
1711 if (file->f_mode & FMODE_READ) {
1712 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1713 mask |= POLLIN | POLLRDNORM;
1714 }
1715 if (file->f_mode & FMODE_WRITE) {
1716 if (s->dma_dac.mapped) {
1717 if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
1718 mask |= POLLOUT | POLLWRNORM;
1719 } else {
1720 if ((signed)s->dma_dac.dmasize >= s->dma_dac.count + (signed)s->dma_dac.fragsize)
1721 mask |= POLLOUT | POLLWRNORM;
1722 }
1723 }
1724 spin_unlock_irqrestore(&s->lock, flags);
1725 return mask;
1726 }
1727
1728 static int cm_mmap(struct file *file, struct vm_area_struct *vma)
1729 {
1730 struct cm_state *s = (struct cm_state *)file->private_data;
1731 struct dmabuf *db;
1732 int ret = -EINVAL;
1733 unsigned long size;
1734
1735 VALIDATE_STATE(s);
1736 lock_kernel();
1737 if (vma->vm_flags & VM_WRITE) {
1738 if ((ret = prog_dmabuf(s, 0)) != 0)
1739 goto out;
1740 db = &s->dma_dac;
1741 } else if (vma->vm_flags & VM_READ) {
1742 if ((ret = prog_dmabuf(s, 1)) != 0)
1743 goto out;
1744 db = &s->dma_adc;
1745 } else
1746 goto out;
1747 ret = -EINVAL;
1748 if (vma->vm_pgoff != 0)
1749 goto out;
1750 size = vma->vm_end - vma->vm_start;
1751 if (size > (PAGE_SIZE << db->buforder))
1752 goto out;
1753 ret = -EINVAL;
1754 if (remap_page_range(vma->vm_start, virt_to_phys(db->rawbuf), size, vma->vm_page_prot))
1755 goto out;
1756 db->mapped = 1;
1757 ret = 0;
1758 out:
1759 unlock_kernel();
1760 return ret;
1761 }
1762
1763 static int cm_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1764 {
1765 struct cm_state *s = (struct cm_state *)file->private_data;
1766 unsigned long flags;
1767 audio_buf_info abinfo;
1768 count_info cinfo;
1769 int val, mapped, ret;
1770 unsigned char fmtm, fmtd;
1771
1772 VALIDATE_STATE(s);
1773 mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
1774 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1775 switch (cmd) {
1776 case OSS_GETVERSION:
1777 return put_user(SOUND_VERSION, (int *)arg);
1778
1779 case SNDCTL_DSP_SYNC:
1780 if (file->f_mode & FMODE_WRITE)
1781 return drain_dac(s, 0/*file->f_flags & O_NONBLOCK*/);
1782 return 0;
1783
1784 case SNDCTL_DSP_SETDUPLEX:
1785 return 0;
1786
1787 case SNDCTL_DSP_GETCAPS:
1788 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP | DSP_CAP_BIND, (int *)arg);
1789
1790 case SNDCTL_DSP_RESET:
1791 if (file->f_mode & FMODE_WRITE) {
1792 stop_dac(s);
1793 synchronize_irq();
1794 s->dma_dac.swptr = s->dma_dac.hwptr = s->dma_dac.count = s->dma_dac.total_bytes = 0;
1795 if (s->status & DO_DUAL_DAC)
1796 s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
1797 }
1798 if (file->f_mode & FMODE_READ) {
1799 stop_adc(s);
1800 synchronize_irq();
1801 s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
1802 }
1803 return 0;
1804
1805 case SNDCTL_DSP_SPEED:
1806 if (get_user(val, (int *)arg))
1807 return -EFAULT;
1808 if (val >= 0) {
1809 if (file->f_mode & FMODE_READ) {
1810 spin_lock_irqsave(&s->lock, flags);
1811 stop_adc_unlocked(s);
1812 s->dma_adc.ready = 0;
1813 set_adc_rate_unlocked(s, val);
1814 spin_unlock_irqrestore(&s->lock, flags);
1815 }
1816 if (file->f_mode & FMODE_WRITE) {
1817 stop_dac(s);
1818 s->dma_dac.ready = 0;
1819 if (s->status & DO_DUAL_DAC)
1820 s->dma_adc.ready = 0;
1821 set_dac_rate(s, val);
1822 }
1823 }
1824 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, (int *)arg);
1825
1826 case SNDCTL_DSP_STEREO:
1827 if (get_user(val, (int *)arg))
1828 return -EFAULT;
1829 fmtd = 0;
1830 fmtm = ~0;
1831 if (file->f_mode & FMODE_READ) {
1832 stop_adc(s);
1833 s->dma_adc.ready = 0;
1834 if (val)
1835 fmtd |= CM_CFMT_STEREO << CM_CFMT_ADCSHIFT;
1836 else
1837 fmtm &= ~(CM_CFMT_STEREO << CM_CFMT_ADCSHIFT);
1838 }
1839 if (file->f_mode & FMODE_WRITE) {
1840 stop_dac(s);
1841 s->dma_dac.ready = 0;
1842 if (val)
1843 fmtd |= CM_CFMT_STEREO << CM_CFMT_DACSHIFT;
1844 else
1845 fmtm &= ~(CM_CFMT_STEREO << CM_CFMT_DACSHIFT);
1846 if (s->status & DO_DUAL_DAC) {
1847 s->dma_adc.ready = 0;
1848 if (val)
1849 fmtd |= CM_CFMT_STEREO << CM_CFMT_ADCSHIFT;
1850 else
1851 fmtm &= ~(CM_CFMT_STEREO << CM_CFMT_ADCSHIFT);
1852 }
1853 }
1854 set_fmt(s, fmtm, fmtd);
1855 return 0;
1856
1857 case SNDCTL_DSP_CHANNELS:
1858 if (get_user(val, (int *)arg))
1859 return -EFAULT;
1860 if (val != 0) {
1861 fmtd = 0;
1862 fmtm = ~0;
1863 if (file->f_mode & FMODE_READ) {
1864 stop_adc(s);
1865 s->dma_adc.ready = 0;
1866 if (val >= 2)
1867 fmtd |= CM_CFMT_STEREO << CM_CFMT_ADCSHIFT;
1868 else
1869 fmtm &= ~(CM_CFMT_STEREO << CM_CFMT_ADCSHIFT);
1870 }
1871 if (file->f_mode & FMODE_WRITE) {
1872 stop_dac(s);
1873 s->dma_dac.ready = 0;
1874 if (val >= 2)
1875 fmtd |= CM_CFMT_STEREO << CM_CFMT_DACSHIFT;
1876 else
1877 fmtm &= ~(CM_CFMT_STEREO << CM_CFMT_DACSHIFT);
1878 if (s->status & DO_DUAL_DAC) {
1879 s->dma_adc.ready = 0;
1880 if (val >= 2)
1881 fmtd |= CM_CFMT_STEREO << CM_CFMT_ADCSHIFT;
1882 else
1883 fmtm &= ~(CM_CFMT_STEREO << CM_CFMT_ADCSHIFT);
1884 }
1885 }
1886 set_fmt(s, fmtm, fmtd);
1887 if ((s->capability & CAN_MULTI_CH)
1888 && (file->f_mode & FMODE_WRITE)) {
1889 val = set_dac_channels(s, val);
1890 return put_user(val, (int *)arg);
1891 }
1892 }
1893 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (CM_CFMT_STEREO << CM_CFMT_ADCSHIFT)
1894 : (CM_CFMT_STEREO << CM_CFMT_DACSHIFT))) ? 2 : 1, (int *)arg);
1895
1896 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1897 return put_user(AFMT_S16_LE|AFMT_U8|AFMT_AC3, (int *)arg);
1898
1899 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1900 if (get_user(val, (int *)arg))
1901 return -EFAULT;
1902 if (val != AFMT_QUERY) {
1903 fmtd = 0;
1904 fmtm = ~0;
1905 if (file->f_mode & FMODE_READ) {
1906 stop_adc(s);
1907 s->dma_adc.ready = 0;
1908 if (val == AFMT_S16_LE)
1909 fmtd |= CM_CFMT_16BIT << CM_CFMT_ADCSHIFT;
1910 else
1911 fmtm &= ~(CM_CFMT_16BIT << CM_CFMT_ADCSHIFT);
1912 }
1913 if (file->f_mode & FMODE_WRITE) {
1914 stop_dac(s);
1915 s->dma_dac.ready = 0;
1916 if (val == AFMT_S16_LE || val == AFMT_AC3)
1917 fmtd |= CM_CFMT_16BIT << CM_CFMT_DACSHIFT;
1918 else
1919 fmtm &= ~(CM_CFMT_16BIT << CM_CFMT_DACSHIFT);
1920 if (val == AFMT_AC3) {
1921 fmtd |= CM_CFMT_STEREO << CM_CFMT_DACSHIFT;
1922 set_ac3(s, s->ratedac);
1923 } else
1924 set_ac3(s, 0);
1925 if (s->status & DO_DUAL_DAC) {
1926 s->dma_adc.ready = 0;
1927 if (val == AFMT_S16_LE)
1928 fmtd |= CM_CFMT_STEREO << CM_CFMT_ADCSHIFT;
1929 else
1930 fmtm &= ~(CM_CFMT_STEREO << CM_CFMT_ADCSHIFT);
1931 }
1932 }
1933 set_fmt(s, fmtm, fmtd);
1934 }
1935 if (s->status & DO_AC3) return put_user(AFMT_AC3, (int *)arg);
1936 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (CM_CFMT_16BIT << CM_CFMT_ADCSHIFT)
1937 : (CM_CFMT_16BIT << CM_CFMT_DACSHIFT))) ? AFMT_S16_LE : AFMT_U8, (int *)arg);
1938
1939 case SNDCTL_DSP_POST:
1940 return 0;
1941
1942 case SNDCTL_DSP_GETTRIGGER:
1943 val = 0;
1944 if (s->status & DO_DUAL_DAC) {
1945 if (file->f_mode & FMODE_WRITE &&
1946 (s->enable & CM_ENABLE_CH1) &&
1947 (s->enable & CM_ENABLE_CH0))
1948 val |= PCM_ENABLE_OUTPUT;
1949 return put_user(val, (int *)arg);
1950 }
1951 if (file->f_mode & FMODE_READ && s->enable & CM_ENABLE_CH0)
1952 val |= PCM_ENABLE_INPUT;
1953 if (file->f_mode & FMODE_WRITE && s->enable & CM_ENABLE_CH1)
1954 val |= PCM_ENABLE_OUTPUT;
1955 return put_user(val, (int *)arg);
1956
1957 case SNDCTL_DSP_SETTRIGGER:
1958 if (get_user(val, (int *)arg))
1959 return -EFAULT;
1960 if (file->f_mode & FMODE_READ) {
1961 if (val & PCM_ENABLE_INPUT) {
1962 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
1963 return ret;
1964 start_adc(s);
1965 } else
1966 stop_adc(s);
1967 }
1968 if (file->f_mode & FMODE_WRITE) {
1969 if (val & PCM_ENABLE_OUTPUT) {
1970 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
1971 return ret;
1972 if (s->status & DO_DUAL_DAC) {
1973 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
1974 return ret;
1975 }
1976 start_dac(s);
1977 } else
1978 stop_dac(s);
1979 }
1980 return 0;
1981
1982 case SNDCTL_DSP_GETOSPACE:
1983 if (!(file->f_mode & FMODE_WRITE))
1984 return -EINVAL;
1985 if (!(s->enable & CM_ENABLE_CH1) && (val = prog_dmabuf(s, 0)) != 0)
1986 return val;
1987 spin_lock_irqsave(&s->lock, flags);
1988 cm_update_ptr(s);
1989 abinfo.fragsize = s->dma_dac.fragsize;
1990 abinfo.bytes = s->dma_dac.dmasize - s->dma_dac.count;
1991 abinfo.fragstotal = s->dma_dac.numfrag;
1992 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
1993 spin_unlock_irqrestore(&s->lock, flags);
1994 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1995
1996 case SNDCTL_DSP_GETISPACE:
1997 if (!(file->f_mode & FMODE_READ))
1998 return -EINVAL;
1999 if (!(s->enable & CM_ENABLE_CH0) && (val = prog_dmabuf(s, 1)) != 0)
2000 return val;
2001 spin_lock_irqsave(&s->lock, flags);
2002 cm_update_ptr(s);
2003 abinfo.fragsize = s->dma_adc.fragsize;
2004 abinfo.bytes = s->dma_adc.count;
2005 abinfo.fragstotal = s->dma_adc.numfrag;
2006 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
2007 spin_unlock_irqrestore(&s->lock, flags);
2008 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2009
2010 case SNDCTL_DSP_NONBLOCK:
2011 file->f_flags |= O_NONBLOCK;
2012 return 0;
2013
2014 case SNDCTL_DSP_GETODELAY:
2015 if (!(file->f_mode & FMODE_WRITE))
2016 return -EINVAL;
2017 spin_lock_irqsave(&s->lock, flags);
2018 cm_update_ptr(s);
2019 val = s->dma_dac.count;
2020 spin_unlock_irqrestore(&s->lock, flags);
2021 return put_user(val, (int *)arg);
2022
2023 case SNDCTL_DSP_GETIPTR:
2024 if (!(file->f_mode & FMODE_READ))
2025 return -EINVAL;
2026 spin_lock_irqsave(&s->lock, flags);
2027 cm_update_ptr(s);
2028 cinfo.bytes = s->dma_adc.total_bytes;
2029 cinfo.blocks = s->dma_adc.count >> s->dma_adc.fragshift;
2030 cinfo.ptr = s->dma_adc.hwptr;
2031 if (s->dma_adc.mapped)
2032 s->dma_adc.count &= s->dma_adc.fragsize-1;
2033 spin_unlock_irqrestore(&s->lock, flags);
2034 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
2035
2036 case SNDCTL_DSP_GETOPTR:
2037 if (!(file->f_mode & FMODE_WRITE))
2038 return -EINVAL;
2039 spin_lock_irqsave(&s->lock, flags);
2040 cm_update_ptr(s);
2041 cinfo.bytes = s->dma_dac.total_bytes;
2042 cinfo.blocks = s->dma_dac.count >> s->dma_dac.fragshift;
2043 cinfo.ptr = s->dma_dac.hwptr;
2044 if (s->dma_dac.mapped)
2045 s->dma_dac.count &= s->dma_dac.fragsize-1;
2046 if (s->status & DO_DUAL_DAC) {
2047 if (s->dma_adc.mapped)
2048 s->dma_adc.count &= s->dma_adc.fragsize-1;
2049 }
2050 spin_unlock_irqrestore(&s->lock, flags);
2051 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
2052
2053 case SNDCTL_DSP_GETBLKSIZE:
2054 if (file->f_mode & FMODE_WRITE) {
2055 if ((val = prog_dmabuf(s, 0)))
2056 return val;
2057 if (s->status & DO_DUAL_DAC) {
2058 if ((val = prog_dmabuf(s, 1)))
2059 return val;
2060 return put_user(2 * s->dma_dac.fragsize, (int *)arg);
2061 }
2062 return put_user(s->dma_dac.fragsize, (int *)arg);
2063 }
2064 if ((val = prog_dmabuf(s, 1)))
2065 return val;
2066 return put_user(s->dma_adc.fragsize, (int *)arg);
2067
2068 case SNDCTL_DSP_SETFRAGMENT:
2069 if (get_user(val, (int *)arg))
2070 return -EFAULT;
2071 if (file->f_mode & FMODE_READ) {
2072 s->dma_adc.ossfragshift = val & 0xffff;
2073 s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
2074 if (s->dma_adc.ossfragshift < 4)
2075 s->dma_adc.ossfragshift = 4;
2076 if (s->dma_adc.ossfragshift > 15)
2077 s->dma_adc.ossfragshift = 15;
2078 if (s->dma_adc.ossmaxfrags < 4)
2079 s->dma_adc.ossmaxfrags = 4;
2080 }
2081 if (file->f_mode & FMODE_WRITE) {
2082 s->dma_dac.ossfragshift = val & 0xffff;
2083 s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
2084 if (s->dma_dac.ossfragshift < 4)
2085 s->dma_dac.ossfragshift = 4;
2086 if (s->dma_dac.ossfragshift > 15)
2087 s->dma_dac.ossfragshift = 15;
2088 if (s->dma_dac.ossmaxfrags < 4)
2089 s->dma_dac.ossmaxfrags = 4;
2090 if (s->status & DO_DUAL_DAC) {
2091 s->dma_adc.ossfragshift = s->dma_dac.ossfragshift;
2092 s->dma_adc.ossmaxfrags = s->dma_dac.ossmaxfrags;
2093 }
2094 }
2095 return 0;
2096
2097 case SNDCTL_DSP_SUBDIVIDE:
2098 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
2099 (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
2100 return -EINVAL;
2101 if (get_user(val, (int *)arg))
2102 return -EFAULT;
2103 if (val != 1 && val != 2 && val != 4)
2104 return -EINVAL;
2105 if (file->f_mode & FMODE_READ)
2106 s->dma_adc.subdivision = val;
2107 if (file->f_mode & FMODE_WRITE) {
2108 s->dma_dac.subdivision = val;
2109 if (s->status & DO_DUAL_DAC)
2110 s->dma_adc.subdivision = val;
2111 }
2112 return 0;
2113
2114 case SOUND_PCM_READ_RATE:
2115 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, (int *)arg);
2116
2117 case SOUND_PCM_READ_CHANNELS:
2118 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (CM_CFMT_STEREO << CM_CFMT_ADCSHIFT) : (CM_CFMT_STEREO << CM_CFMT_DACSHIFT))) ? 2 : 1, (int *)arg);
2119
2120 case SOUND_PCM_READ_BITS:
2121 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (CM_CFMT_16BIT << CM_CFMT_ADCSHIFT) : (CM_CFMT_16BIT << CM_CFMT_DACSHIFT))) ? 16 : 8, (int *)arg);
2122
2123 case SOUND_PCM_READ_FILTER:
2124 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, (int *)arg);
2125
2126 case SNDCTL_DSP_GETCHANNELMASK:
2127 return put_user(DSP_BIND_FRONT|DSP_BIND_SURR|DSP_BIND_CENTER_LFE|DSP_BIND_SPDIF, (int *)arg);
2128
2129 case SNDCTL_DSP_BIND_CHANNEL:
2130 if (get_user(val, (int *)arg))
2131 return -EFAULT;
2132 if (val == DSP_BIND_QUERY) {
2133 val = DSP_BIND_FRONT;
2134 if (s->status & DO_SPDIF_OUT)
2135 val |= DSP_BIND_SPDIF;
2136 else {
2137 if (s->curr_channels == 4)
2138 val |= DSP_BIND_SURR;
2139 if (s->curr_channels > 4)
2140 val |= DSP_BIND_CENTER_LFE;
2141 }
2142 } else {
2143 if (file->f_mode & FMODE_READ) {
2144 stop_adc(s);
2145 s->dma_adc.ready = 0;
2146 }
2147 if (file->f_mode & FMODE_WRITE) {
2148 stop_dac(s);
2149 s->dma_dac.ready = 0;
2150 if (val & DSP_BIND_SPDIF) {
2151 set_spdifout(s, s->ratedac);
2152 set_dac_channels(s, s->fmt & (CM_CFMT_STEREO << CM_CFMT_DACSHIFT) ? 2 : 1);
2153 if (!(s->status & DO_SPDIF_OUT))
2154 val &= ~DSP_BIND_SPDIF;
2155 } else {
2156 int channels;
2157 int mask;
2158
2159 mask = val & (DSP_BIND_FRONT|DSP_BIND_SURR|DSP_BIND_CENTER_LFE);
2160 switch (mask) {
2161 case DSP_BIND_FRONT:
2162 channels = 2;
2163 break;
2164 case DSP_BIND_FRONT|DSP_BIND_SURR:
2165 channels = 4;
2166 break;
2167 case DSP_BIND_FRONT|DSP_BIND_SURR|DSP_BIND_CENTER_LFE:
2168 channels = 6;
2169 break;
2170 default:
2171 channels = s->fmt & (CM_CFMT_STEREO << CM_CFMT_DACSHIFT) ? 2 : 1;
2172 break;
2173 }
2174 set_dac_channels(s, channels);
2175 }
2176 }
2177 }
2178 return put_user(val, (int *)arg);
2179
2180 case SOUND_PCM_WRITE_FILTER:
2181 case SNDCTL_DSP_MAPINBUF:
2182 case SNDCTL_DSP_MAPOUTBUF:
2183 case SNDCTL_DSP_SETSYNCRO:
2184 return -EINVAL;
2185
2186 }
2187 return mixer_ioctl(s, cmd, arg);
2188 }
2189
2190 static int cm_open(struct inode *inode, struct file *file)
2191 {
2192 int minor = MINOR(inode->i_rdev);
2193 struct cm_state *s = devs;
2194 unsigned char fmtm = ~0, fmts = 0;
2195
2196 while (s && ((s->dev_audio ^ minor) & ~0xf))
2197 s = s->next;
2198 if (!s)
2199 return -ENODEV;
2200 VALIDATE_STATE(s);
2201 file->private_data = s;
2202 /* wait for device to become free */
2203 down(&s->open_sem);
2204 while (s->open_mode & file->f_mode) {
2205 if (file->f_flags & O_NONBLOCK) {
2206 up(&s->open_sem);
2207 return -EBUSY;
2208 }
2209 up(&s->open_sem);
2210 interruptible_sleep_on(&s->open_wait);
2211 if (signal_pending(current))
2212 return -ERESTARTSYS;
2213 down(&s->open_sem);
2214 }
2215 if (file->f_mode & FMODE_READ) {
2216 fmtm &= ~((CM_CFMT_STEREO | CM_CFMT_16BIT) << CM_CFMT_ADCSHIFT);
2217 if ((minor & 0xf) == SND_DEV_DSP16)
2218 fmts |= CM_CFMT_16BIT << CM_CFMT_ADCSHIFT;
2219 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
2220 set_adc_rate(s, 8000);
2221 }
2222 if (file->f_mode & FMODE_WRITE) {
2223 fmtm &= ~((CM_CFMT_STEREO | CM_CFMT_16BIT) << CM_CFMT_DACSHIFT);
2224 if ((minor & 0xf) == SND_DEV_DSP16)
2225 fmts |= CM_CFMT_16BIT << CM_CFMT_DACSHIFT;
2226 s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = s->dma_dac.subdivision = 0;
2227 set_dac_rate(s, 8000);
2228 // clear previous multichannel, spdif, ac3 state
2229 set_spdifout(s, 0);
2230 if (s->deviceid == PCI_DEVICE_ID_CMEDIA_CM8738) {
2231 set_ac3(s, 0);
2232 set_dac_channels(s, 1);
2233 }
2234 }
2235 set_fmt(s, fmtm, fmts);
2236 s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
2237 up(&s->open_sem);
2238 return 0;
2239 }
2240
2241 static int cm_release(struct inode *inode, struct file *file)
2242 {
2243 struct cm_state *s = (struct cm_state *)file->private_data;
2244
2245 VALIDATE_STATE(s);
2246 lock_kernel();
2247 if (file->f_mode & FMODE_WRITE)
2248 drain_dac(s, file->f_flags & O_NONBLOCK);
2249 down(&s->open_sem);
2250 if (file->f_mode & FMODE_WRITE) {
2251 stop_dac(s);
2252
2253 dealloc_dmabuf(&s->dma_dac);
2254 if (s->status & DO_DUAL_DAC)
2255 dealloc_dmabuf(&s->dma_adc);
2256
2257 if (s->status & DO_MULTI_CH)
2258 set_dac_channels(s, 0);
2259 if (s->status & DO_AC3)
2260 set_ac3(s, 0);
2261 if (s->status & DO_SPDIF_OUT)
2262 set_spdifout(s, 0);
2263 }
2264 if (file->f_mode & FMODE_READ) {
2265 stop_adc(s);
2266 dealloc_dmabuf(&s->dma_adc);
2267 }
2268 s->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
2269 up(&s->open_sem);
2270 wake_up(&s->open_wait);
2271 unlock_kernel();
2272 return 0;
2273 }
2274
2275 static /*const*/ struct file_operations cm_audio_fops = {
2276 owner: THIS_MODULE,
2277 llseek: no_llseek,
2278 read: cm_read,
2279 write: cm_write,
2280 poll: cm_poll,
2281 ioctl: cm_ioctl,
2282 mmap: cm_mmap,
2283 open: cm_open,
2284 release: cm_release,
2285 };
2286
2287 #ifdef CONFIG_SOUND_CMPCI_MIDI
2288 /* --------------------------------------------------------------------- */
2289
2290 static ssize_t cm_midi_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
2291 {
2292 struct cm_state *s = (struct cm_state *)file->private_data;
2293 DECLARE_WAITQUEUE(wait, current);
2294 ssize_t ret;
2295 unsigned long flags;
2296 unsigned ptr;
2297 int cnt;
2298
2299 VALIDATE_STATE(s);
2300 if (ppos != &file->f_pos)
2301 return -ESPIPE;
2302 if (!access_ok(VERIFY_WRITE, buffer, count))
2303 return -EFAULT;
2304 ret = 0;
2305 add_wait_queue(&s->midi.iwait, &wait);
2306 while (count > 0) {
2307 spin_lock_irqsave(&s->lock, flags);
2308 ptr = s->midi.ird;
2309 cnt = MIDIINBUF - ptr;
2310 if (s->midi.icnt < cnt)
2311 cnt = s->midi.icnt;
2312 spin_unlock_irqrestore(&s->lock, flags);
2313 if (cnt > count)
2314 cnt = count;
2315 if (cnt <= 0) {
2316 if (file->f_flags & O_NONBLOCK)
2317 {
2318 if (!ret)
2319 ret = -EAGAIN;
2320 break;
2321 }
2322 __set_current_state(TASK_INTERRUPTIBLE);
2323 schedule();
2324 if (signal_pending(current))
2325 {
2326 if (!ret)
2327 ret = -ERESTARTSYS;
2328 break;
2329 }
2330 continue;
2331 }
2332 if (copy_to_user(buffer, s->midi.ibuf + ptr, cnt))
2333 {
2334 if (!ret)
2335 ret = -EFAULT;
2336 break;
2337 }
2338 ptr = (ptr + cnt) % MIDIINBUF;
2339 spin_lock_irqsave(&s->lock, flags);
2340 s->midi.ird = ptr;
2341 s->midi.icnt -= cnt;
2342 spin_unlock_irqrestore(&s->lock, flags);
2343 count -= cnt;
2344 buffer += cnt;
2345 ret += cnt;
2346 break;
2347 }
2348 __set_current_state(TASK_RUNNING);
2349 remove_wait_queue(&s->midi.iwait, &wait);
2350 return ret;
2351 }
2352
2353 static ssize_t cm_midi_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
2354 {
2355 struct cm_state *s = (struct cm_state *)file->private_data;
2356 DECLARE_WAITQUEUE(wait, current);
2357 ssize_t ret;
2358 unsigned long flags;
2359 unsigned ptr;
2360 int cnt;
2361
2362 VALIDATE_STATE(s);
2363 if (ppos != &file->f_pos)
2364 return -ESPIPE;
2365 if (!access_ok(VERIFY_READ, buffer, count))
2366 return -EFAULT;
2367 if (count == 0)
2368 return 0;
2369 ret = 0;
2370 add_wait_queue(&s->midi.owait, &wait);
2371 while (count > 0) {
2372 spin_lock_irqsave(&s->lock, flags);
2373 ptr = s->midi.owr;
2374 cnt = MIDIOUTBUF - ptr;
2375 if (s->midi.ocnt + cnt > MIDIOUTBUF)
2376 cnt = MIDIOUTBUF - s->midi.ocnt;
2377 if (cnt <= 0)
2378 cm_handle_midi(s);
2379 spin_unlock_irqrestore(&s->lock, flags);
2380 if (cnt > count)
2381 cnt = count;
2382 if (cnt <= 0) {
2383 if (file->f_flags & O_NONBLOCK)
2384 {
2385 if (!ret)
2386 ret = -EAGAIN;
2387 break;
2388 }
2389 __set_current_state(TASK_INTERRUPTIBLE);
2390 schedule();
2391 if (signal_pending(current)) {
2392 if (!ret)
2393 ret = -ERESTARTSYS;
2394 break;
2395 }
2396 continue;
2397 }
2398 if (copy_from_user(s->midi.obuf + ptr, buffer, cnt))
2399 {
2400 if (!ret)
2401 ret = -EFAULT;
2402 break;
2403 }
2404 ptr = (ptr + cnt) % MIDIOUTBUF;
2405 spin_lock_irqsave(&s->lock, flags);
2406 s->midi.owr = ptr;
2407 s->midi.ocnt += cnt;
2408 spin_unlock_irqrestore(&s->lock, flags);
2409 count -= cnt;
2410 buffer += cnt;
2411 ret += cnt;
2412 spin_lock_irqsave(&s->lock, flags);
2413 cm_handle_midi(s);
2414 spin_unlock_irqrestore(&s->lock, flags);
2415 }
2416 __set_current_state(TASK_RUNNING);
2417 remove_wait_queue(&s->midi.owait, &wait);
2418 return ret;
2419 }
2420
2421 static unsigned int cm_midi_poll(struct file *file, struct poll_table_struct *wait)
2422 {
2423 struct cm_state *s = (struct cm_state *)file->private_data;
2424 unsigned long flags;
2425 unsigned int mask = 0;
2426
2427 VALIDATE_STATE(s);
2428 if (file->f_mode & FMODE_WRITE)
2429 poll_wait(file, &s->midi.owait, wait);
2430 if (file->f_mode & FMODE_READ)
2431 poll_wait(file, &s->midi.iwait, wait);
2432 spin_lock_irqsave(&s->lock, flags);
2433 if (file->f_mode & FMODE_READ) {
2434 if (s->midi.icnt > 0)
2435 mask |= POLLIN | POLLRDNORM;
2436 }
2437 if (file->f_mode & FMODE_WRITE) {
2438 if (s->midi.ocnt < MIDIOUTBUF)
2439 mask |= POLLOUT | POLLWRNORM;
2440 }
2441 spin_unlock_irqrestore(&s->lock, flags);
2442 return mask;
2443 }
2444
2445 static int cm_midi_open(struct inode *inode, struct file *file)
2446 {
2447 int minor = MINOR(inode->i_rdev);
2448 struct cm_state *s = devs;
2449 unsigned long flags;
2450
2451 while (s && s->dev_midi != minor)
2452 s = s->next;
2453 if (!s)
2454 return -ENODEV;
2455 VALIDATE_STATE(s);
2456 file->private_data = s;
2457 /* wait for device to become free */
2458 down(&s->open_sem);
2459 while (s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
2460 if (file->f_flags & O_NONBLOCK) {
2461 up(&s->open_sem);
2462 return -EBUSY;
2463 }
2464 up(&s->open_sem);
2465 interruptible_sleep_on(&s->open_wait);
2466 if (signal_pending(current))
2467 return -ERESTARTSYS;
2468 down(&s->open_sem);
2469 }
2470 spin_lock_irqsave(&s->lock, flags);
2471 if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2472 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2473 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2474 /* enable MPU-401 */
2475 maskb(s->iobase + CODEC_CMI_FUNCTRL1, ~0, 4);
2476 outb(0xff, s->iomidi+1); /* reset command */
2477 if (!(inb(s->iomidi+1) & 0x80))
2478 inb(s->iomidi);
2479 outb(0x3f, s->iomidi+1); /* uart command */
2480 if (!(inb(s->iomidi+1) & 0x80))
2481 inb(s->iomidi);
2482 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2483 init_timer(&s->midi.timer);
2484 s->midi.timer.expires = jiffies+1;
2485 s->midi.timer.data = (unsigned long)s;
2486 s->midi.timer.function = cm_midi_timer;
2487 add_timer(&s->midi.timer);
2488 }
2489 if (file->f_mode & FMODE_READ) {
2490 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2491 }
2492 if (file->f_mode & FMODE_WRITE) {
2493 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2494 }
2495 spin_unlock_irqrestore(&s->lock, flags);
2496 s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
2497 up(&s->open_sem);
2498 MOD_INC_USE_COUNT;
2499 return 0;
2500 }
2501
2502 static int cm_midi_release(struct inode *inode, struct file *file)
2503 {
2504 struct cm_state *s = (struct cm_state *)file->private_data;
2505 DECLARE_WAITQUEUE(wait, current);
2506 unsigned long flags;
2507 unsigned count, tmo;
2508
2509 VALIDATE_STATE(s);
2510 lock_kernel();
2511
2512 if (file->f_mode & FMODE_WRITE) {
2513 __set_current_state(TASK_INTERRUPTIBLE);
2514 add_wait_queue(&s->midi.owait, &wait);
2515 for (;;) {
2516 spin_lock_irqsave(&s->lock, flags);
2517 count = s->midi.ocnt;
2518 spin_unlock_irqrestore(&s->lock, flags);
2519 if (count <= 0)
2520 break;
2521 if (signal_pending(current))
2522 break;
2523 if (file->f_flags & O_NONBLOCK) {
2524 remove_wait_queue(&s->midi.owait, &wait);
2525 set_current_state(TASK_RUNNING);
2526 unlock_kernel();
2527 return -EBUSY;
2528 }
2529 tmo = (count * HZ) / 3100;
2530 if (!schedule_timeout(tmo ? : 1) && tmo)
2531 printk(KERN_DEBUG "cmpci: midi timed out??\n");
2532 }
2533 remove_wait_queue(&s->midi.owait, &wait);
2534 set_current_state(TASK_RUNNING);
2535 }
2536 down(&s->open_sem);
2537 s->open_mode &= (~(file->f_mode << FMODE_MIDI_SHIFT)) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE);
2538 spin_lock_irqsave(&s->lock, flags);
2539 if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2540 del_timer(&s->midi.timer);
2541 outb(0xff, s->iomidi+1); /* reset command */
2542 if (!(inb(s->iomidi+1) & 0x80))
2543 inb(s->iomidi);
2544 /* disable MPU-401 */
2545 maskb(s->iobase + CODEC_CMI_FUNCTRL1, ~4, 0);
2546 }
2547 spin_unlock_irqrestore(&s->lock, flags);
2548 up(&s->open_sem);
2549 wake_up(&s->open_wait);
2550 unlock_kernel();
2551 return 0;
2552 }
2553
2554 static /*const*/ struct file_operations cm_midi_fops = {
2555 owner: THIS_MODULE,
2556 llseek: no_llseek,
2557 read: cm_midi_read,
2558 write: cm_midi_write,
2559 poll: cm_midi_poll,
2560 open: cm_midi_open,
2561 release: cm_midi_release,
2562 };
2563 #endif
2564
2565 /* --------------------------------------------------------------------- */
2566
2567 #ifdef CONFIG_SOUND_CMPCI_FM
2568 static int cm_dmfm_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2569 {
2570 static const unsigned char op_offset[18] = {
2571 0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
2572 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D,
2573 0x10, 0x11, 0x12, 0x13, 0x14, 0x15
2574 };
2575 struct cm_state *s = (struct cm_state *)file->private_data;
2576 struct dm_fm_voice v;
2577 struct dm_fm_note n;
2578 struct dm_fm_params p;
2579 unsigned int io;
2580 unsigned int regb;
2581
2582 switch (cmd) {
2583 case FM_IOCTL_RESET:
2584 for (regb = 0xb0; regb < 0xb9; regb++) {
2585 outb(regb, s->iosynth);
2586 outb(0, s->iosynth+1);
2587 outb(regb, s->iosynth+2);
2588 outb(0, s->iosynth+3);
2589 }
2590 return 0;
2591
2592 case FM_IOCTL_PLAY_NOTE:
2593 if (copy_from_user(&n, (void *)arg, sizeof(n)))
2594 return -EFAULT;
2595 if (n.voice >= 18)
2596 return -EINVAL;
2597 if (n.voice >= 9) {
2598 regb = n.voice - 9;
2599 io = s->iosynth+2;
2600 } else {
2601 regb = n.voice;
2602 io = s->iosynth;
2603 }
2604 outb(0xa0 + regb, io);
2605 outb(n.fnum & 0xff, io+1);
2606 outb(0xb0 + regb, io);
2607 outb(((n.fnum >> 8) & 3) | ((n.octave & 7) << 2) | ((n.key_on & 1) << 5), io+1);
2608 return 0;
2609
2610 case FM_IOCTL_SET_VOICE:
2611 if (copy_from_user(&v, (void *)arg, sizeof(v)))
2612 return -EFAULT;
2613 if (v.voice >= 18)
2614 return -EINVAL;
2615 regb = op_offset[v.voice];
2616 io = s->iosynth + ((v.op & 1) << 1);
2617 outb(0x20 + regb, io);
2618 outb(((v.am & 1) << 7) | ((v.vibrato & 1) << 6) | ((v.do_sustain & 1) << 5) |
2619 ((v.kbd_scale & 1) << 4) | (v.harmonic & 0xf), io+1);
2620 outb(0x40 + regb, io);
2621 outb(((v.scale_level & 0x3) << 6) | (v.volume & 0x3f), io+1);
2622 outb(0x60 + regb, io);
2623 outb(((v.attack & 0xf) << 4) | (v.decay & 0xf), io+1);
2624 outb(0x80 + regb, io);
2625 outb(((v.sustain & 0xf) << 4) | (v.release & 0xf), io+1);
2626 outb(0xe0 + regb, io);
2627 outb(v.waveform & 0x7, io+1);
2628 if (n.voice >= 9) {
2629 regb = n.voice - 9;
2630 io = s->iosynth+2;
2631 } else {
2632 regb = n.voice;
2633 io = s->iosynth;
2634 }
2635 outb(0xc0 + regb, io);
2636 outb(((v.right & 1) << 5) | ((v.left & 1) << 4) | ((v.feedback & 7) << 1) |
2637 (v.connection & 1), io+1);
2638 return 0;
2639
2640 case FM_IOCTL_SET_PARAMS:
2641 if (copy_from_user(&p, (void *)arg, sizeof(p)))
2642 return -EFAULT;
2643 outb(0x08, s->iosynth);
2644 outb((p.kbd_split & 1) << 6, s->iosynth+1);
2645 outb(0xbd, s->iosynth);
2646 outb(((p.am_depth & 1) << 7) | ((p.vib_depth & 1) << 6) | ((p.rhythm & 1) << 5) | ((p.bass & 1) << 4) |
2647 ((p.snare & 1) << 3) | ((p.tomtom & 1) << 2) | ((p.cymbal & 1) << 1) | (p.hihat & 1), s->iosynth+1);
2648 return 0;
2649
2650 case FM_IOCTL_SET_OPL:
2651 outb(4, s->iosynth+2);
2652 outb(arg, s->iosynth+3);
2653 return 0;
2654
2655 case FM_IOCTL_SET_MODE:
2656 outb(5, s->iosynth+2);
2657 outb(arg & 1, s->iosynth+3);
2658 return 0;
2659 }
2660 return -EINVAL;
2661 }
2662
2663 static int cm_dmfm_open(struct inode *inode, struct file *file)
2664 {
2665 int minor = MINOR(inode->i_rdev);
2666 struct cm_state *s = devs;
2667
2668 while (s && s->dev_dmfm != minor)
2669 s = s->next;
2670 if (!s)
2671 return -ENODEV;
2672 VALIDATE_STATE(s);
2673 file->private_data = s;
2674 /* wait for device to become free */
2675 down(&s->open_sem);
2676 while (s->open_mode & FMODE_DMFM) {
2677 if (file->f_flags & O_NONBLOCK) {
2678 up(&s->open_sem);
2679 return -EBUSY;
2680 }
2681 up(&s->open_sem);
2682 interruptible_sleep_on(&s->open_wait);
2683 if (signal_pending(current))
2684 return -ERESTARTSYS;
2685 down(&s->open_sem);
2686 }
2687 /* init the stuff */
2688 outb(1, s->iosynth);
2689 outb(0x20, s->iosynth+1); /* enable waveforms */
2690 outb(4, s->iosynth+2);
2691 outb(0, s->iosynth+3); /* no 4op enabled */
2692 outb(5, s->iosynth+2);
2693 outb(1, s->iosynth+3); /* enable OPL3 */
2694 s->open_mode |= FMODE_DMFM;
2695 up(&s->open_sem);
2696 MOD_INC_USE_COUNT;
2697 return 0;
2698 }
2699
2700 static int cm_dmfm_release(struct inode *inode, struct file *file)
2701 {
2702 struct cm_state *s = (struct cm_state *)file->private_data;
2703 unsigned int regb;
2704
2705 VALIDATE_STATE(s);
2706 lock_kernel();
2707 down(&s->open_sem);
2708 s->open_mode &= ~FMODE_DMFM;
2709 for (regb = 0xb0; regb < 0xb9; regb++) {
2710 outb(regb, s->iosynth);
2711 outb(0, s->iosynth+1);
2712 outb(regb, s->iosynth+2);
2713 outb(0, s->iosynth+3);
2714 }
2715 up(&s->open_sem);
2716 wake_up(&s->open_wait);
2717 unlock_kernel();
2718 return 0;
2719 }
2720
2721 static /*const*/ struct file_operations cm_dmfm_fops = {
2722 owner: THIS_MODULE,
2723 llseek: no_llseek,
2724 ioctl: cm_dmfm_ioctl,
2725 open: cm_dmfm_open,
2726 release: cm_dmfm_release,
2727 };
2728 #endif /* CONFIG_SOUND_CMPCI_FM */
2729
2730
2731
2732 static struct initvol {
2733 int mixch;
2734 int vol;
2735 } initvol[] __initdata = {
2736 { SOUND_MIXER_WRITE_CD, 0x4f4f },
2737 { SOUND_MIXER_WRITE_LINE, 0x4f4f },
2738 { SOUND_MIXER_WRITE_MIC, 0x4f4f },
2739 { SOUND_MIXER_WRITE_SYNTH, 0x4f4f },
2740 { SOUND_MIXER_WRITE_VOLUME, 0x4f4f },
2741 { SOUND_MIXER_WRITE_PCM, 0x4f4f }
2742 };
2743
2744 /* check chip version and capability */
2745 static int query_chip(struct cm_state *s)
2746 {
2747 int ChipVersion = -1;
2748 unsigned char RegValue;
2749
2750 // check reg 0Ch, bit 24-31
2751 RegValue = inb(s->iobase + CODEC_CMI_INT_HLDCLR + 3);
2752 if (RegValue == 0) {
2753 // check reg 08h, bit 24-28
2754 RegValue = inb(s->iobase + CODEC_CMI_CHFORMAT + 3);
2755 RegValue &= 0x1f;
2756 if (RegValue == 0) {
2757 ChipVersion = 33;
2758 s->max_channels = 4;
2759 s->capability |= CAN_AC3_SW;
2760 s->capability |= CAN_DUAL_DAC;
2761 } else {
2762 ChipVersion = 37;
2763 s->max_channels = 4;
2764 s->capability |= CAN_AC3_HW;
2765 s->capability |= CAN_DUAL_DAC;
2766 }
2767 } else {
2768 // check reg 0Ch, bit 26
2769 if (RegValue & (1 << (26-24))) {
2770 ChipVersion = 39;
2771 if (RegValue & (1 << (24-24)))
2772 s->max_channels = 6;
2773 else
2774 s->max_channels = 4;
2775 s->capability |= CAN_AC3_HW;
2776 s->capability |= CAN_DUAL_DAC;
2777 s->capability |= CAN_MULTI_CH_HW;
2778 } else {
2779 ChipVersion = 55; // 4 or 6 channels
2780 s->max_channels = 6;
2781 s->capability |= CAN_AC3_HW;
2782 s->capability |= CAN_DUAL_DAC;
2783 s->capability |= CAN_MULTI_CH_HW;
2784 }
2785 }
2786 // still limited to number of speakers
2787 if (s->max_channels > s->speakers)
2788 s->max_channels = s->speakers;
2789 return ChipVersion;
2790 }
2791
2792 #ifdef CONFIG_SOUND_CMPCI_MIDI
2793 static int mpuio = CONFIG_SOUND_CMPCI_MPUIO;
2794 #else
2795 static int mpuio;
2796 #endif
2797 #ifdef CONFIG_SOUND_CMPCI_FM
2798 static int fmio = CONFIG_SOUND_CMPCI_FMIO;
2799 #else
2800 static int fmio;
2801 #endif
2802 #ifdef CONFIG_SOUND_CMPCI_SPDIFINVERSE
2803 static int spdif_inverse = 1;
2804 #else
2805 static int spdif_inverse;
2806 #endif
2807 #ifdef CONFIG_SOUND_CMPCI_SPDIFLOOP
2808 static int spdif_loop = 1;
2809 #else
2810 static int spdif_loop;
2811 #endif
2812 #ifdef CONFIG_SOUND_CMPCI_SPEAKERS
2813 static int speakers = CONFIG_SOUND_CMPCI_SPEAKERS;
2814 #else
2815 static int speakers = 2;
2816 #endif
2817 #ifdef CONFIG_SOUND_CMPCI_LINE_REAR
2818 static int use_line_as_rear = 1;
2819 #else
2820 static int use_line_as_rear;
2821 #endif
2822 #ifdef CONFIG_SOUND_CMPCI_LINE_BASS
2823 static int use_line_as_bass = 1;
2824 #else
2825 static int use_line_as_bass;
2826 #endif
2827 #ifdef CONFIG_SOUND_CMPCI_JOYSTICK
2828 static int joystick = 1;
2829 #else
2830 static int joystick;
2831 #endif
2832 MODULE_PARM(mpuio, "i");
2833 MODULE_PARM(fmio, "i");
2834 MODULE_PARM(spdif_inverse, "i");
2835 MODULE_PARM(spdif_loop, "i");
2836 MODULE_PARM(speakers, "i");
2837 MODULE_PARM(use_line_as_rear, "i");
2838 MODULE_PARM(use_line_as_bass, "i");
2839 MODULE_PARM(joystick, "i");
2840 MODULE_PARM_DESC(mpuio, "(0x330, 0x320, 0x310, 0x300) Base of MPU-401, 0 to disable");
2841 MODULE_PARM_DESC(fmio, "(0x388, 0x3C8, 0x3E0) Base of OPL3, 0 to disable");
2842 MODULE_PARM_DESC(spdif_inverse, "(1/0) Invert S/PDIF-in signal");
2843 MODULE_PARM_DESC(spdif_loop, "(1/0) Route S/PDIF-in to S/PDIF-out directly");
2844 MODULE_PARM_DESC(speakers, "(2-6) Number of speakers you connect");
2845 MODULE_PARM_DESC(use_line_as_rear, "(1/0) Use line-in jack as rear-out");
2846 MODULE_PARM_DESC(use_line_as_bass, "(1/0) Use line-in jack as bass/center");
2847 MODULE_PARM_DESC(joystick, "(1/0) Enable joystick interface, still need joystick driver");
2848
2849 void initialize_chip(struct pci_dev *pcidev)
2850 {
2851 struct cm_state *s;
2852 mm_segment_t fs;
2853 int i, val;
2854 unsigned char reg_mask = 0;
2855 struct {
2856 unsigned short deviceid;
2857 char *devicename;
2858 } devicetable[] =
2859 {
2860 { PCI_DEVICE_ID_CMEDIA_CM8338A, "CM8338A" },
2861 { PCI_DEVICE_ID_CMEDIA_CM8338B, "CM8338B" },
2862 { PCI_DEVICE_ID_CMEDIA_CM8738, "CM8738" },
2863 { PCI_DEVICE_ID_CMEDIA_CM8738B, "CM8738B" },
2864 };
2865 char *devicename = "unknown";
2866 {
2867 if (pci_enable_device(pcidev))
2868 return;
2869 if (pcidev->irq == 0)
2870 return;
2871 s = kmalloc(sizeof(*s), GFP_KERNEL);
2872 if (!s) {
2873 printk(KERN_WARNING "cmpci: out of memory\n");
2874 return;
2875 }
2876 /* search device name */
2877 for (i = 0; i < sizeof(devicetable) / sizeof(devicetable[0]); i++) {
2878 if (devicetable[i].deviceid == pcidev->device)
2879 {
2880 devicename = devicetable[i].devicename;
2881 break;
2882 }
2883 }
2884 memset(s, 0, sizeof(struct cm_state));
2885 init_waitqueue_head(&s->dma_adc.wait);
2886 init_waitqueue_head(&s->dma_dac.wait);
2887 init_waitqueue_head(&s->open_wait);
2888 init_waitqueue_head(&s->midi.iwait);
2889 init_waitqueue_head(&s->midi.owait);
2890 init_MUTEX(&s->open_sem);
2891 spin_lock_init(&s->lock);
2892 s->magic = CM_MAGIC;
2893 s->iobase = pci_resource_start(pcidev, 0);
2894 s->iosynth = fmio;
2895 s->iomidi = mpuio;
2896 s->status = 0;
2897 /* range check */
2898 if (speakers < 2)
2899 speakers = 2;
2900 else if (speakers > 6)
2901 speakers = 6;
2902 s->speakers = speakers;
2903 if (s->iobase == 0)
2904 return;
2905 s->irq = pcidev->irq;
2906
2907 if (!request_region(s->iobase, CM_EXTENT_CODEC, "cmpci")) {
2908 printk(KERN_ERR "cmpci: io ports %#x-%#x in use\n", s->iobase, s->iobase+CM_EXTENT_CODEC-1);
2909 goto err_region5;
2910 }
2911 #ifdef CONFIG_SOUND_CMPCI_MIDI
2912 /* disable MPU-401 */
2913 maskb(s->iobase + CODEC_CMI_FUNCTRL1, ~0x04, 0);
2914 if (s->iomidi) {
2915 if (!request_region(s->iomidi, CM_EXTENT_MIDI, "cmpci Midi")) {
2916 printk(KERN_ERR "cmpci: io ports %#x-%#x in use\n", s->iomidi, s->iomidi+CM_EXTENT_MIDI-1);
2917 s->iomidi = 0;
2918 } else {
2919 /* set IO based at 0x330 */
2920 switch (s->iomidi) {
2921 case 0x330:
2922 reg_mask = 0;
2923 break;
2924 case 0x320:
2925 reg_mask = 0x20;
2926 break;
2927 case 0x310:
2928 reg_mask = 0x40;
2929 break;
2930 case 0x300:
2931 reg_mask = 0x60;
2932 break;
2933 default:
2934 s->iomidi = 0;
2935 break;
2936 }
2937 outb((inb(s->iobase + CODEC_CMI_LEGACY_CTRL + 3) & ~0x60) | reg_mask, s->iobase + CODEC_CMI_LEGACY_CTRL + 3);
2938 /* enable MPU-401 */
2939 if (s->iomidi) {
2940 maskb(s->iobase + CODEC_CMI_FUNCTRL1, ~0, 0x04);
2941 }
2942 }
2943 }
2944 #endif
2945 #ifdef CONFIG_SOUND_CMPCI_FM
2946 /* disable FM */
2947 maskb(s->iobase + CODEC_CMI_MISC_CTRL + 2, ~8, 0);
2948 if (s->iosynth) {
2949 if (!request_region(s->iosynth, CM_EXTENT_SYNTH, "cmpci FM")) {
2950 printk(KERN_ERR "cmpci: io ports %#x-%#x in use\n", s->iosynth, s->iosynth+CM_EXTENT_SYNTH-1);
2951 s->iosynth = 0;
2952 } else {
2953 /* set IO based at 0x388 */
2954 switch (s->iosynth) {
2955 case 0x388:
2956 reg_mask = 0;
2957 break;
2958 case 0x3C8:
2959 reg_mask = 0x01;
2960 break;
2961 case 0x3E0:
2962 reg_mask = 0x02;
2963 break;
2964 case 0x3E8:
2965 reg_mask = 0x03;
2966 break;
2967 default:
2968 s->iosynth = 0;
2969 break;
2970 }
2971 maskb(s->iobase + CODEC_CMI_LEGACY_CTRL + 3, ~0x03, reg_mask);
2972 /* enable FM */
2973 if (s->iosynth) {
2974 maskb(s->iobase + CODEC_CMI_MISC_CTRL + 2, ~0, 8);
2975 }
2976 }
2977 }
2978 #endif
2979 /* enable joystick */
2980 if (joystick)
2981 maskb(s->iobase + CODEC_CMI_FUNCTRL1, ~0, 0x02);
2982 else
2983 maskb(s->iobase + CODEC_CMI_FUNCTRL1, ~0x02, 0);
2984 /* initialize codec registers */
2985 outb(0, s->iobase + CODEC_CMI_INT_HLDCLR + 2); /* disable ints */
2986 outb(0, s->iobase + CODEC_CMI_FUNCTRL0 + 2); /* disable channels */
2987 /* reset mixer */
2988 wrmixer(s, DSP_MIX_DATARESETIDX, 0);
2989
2990 /* request irq */
2991 if (request_irq(s->irq, cm_interrupt, SA_SHIRQ, "cmpci", s)) {
2992 printk(KERN_ERR "cmpci: irq %u in use\n", s->irq);
2993 goto err_irq;
2994 }
2995 printk(KERN_INFO "cmpci: found %s adapter at io %#06x irq %u\n",
2996 devicename, s->iobase, s->irq);
2997 /* register devices */
2998 if ((s->dev_audio = register_sound_dsp(&cm_audio_fops, -1)) < 0)
2999 goto err_dev1;
3000 if ((s->dev_mixer = register_sound_mixer(&cm_mixer_fops, -1)) < 0)
3001 goto err_dev2;
3002 #ifdef CONFIG_SOUND_CMPCI_MIDI
3003 if ((s->dev_midi = register_sound_midi(&cm_midi_fops, -1)) < 0)
3004 goto err_dev3;
3005 #endif
3006 #ifdef CONFIG_SOUND_CMPCI_FM
3007 if ((s->dev_dmfm = register_sound_special(&cm_dmfm_fops, 15 /* ?? */)) < 0)
3008 goto err_dev4;
3009 #endif
3010 pci_set_master(pcidev); /* enable bus mastering */
3011 /* initialize the chips */
3012 fs = get_fs();
3013 set_fs(KERNEL_DS);
3014 /* set mixer output */
3015 frobindir(s, DSP_MIX_OUTMIXIDX, 0x1f, 0x1f);
3016 /* set mixer input */
3017 val = SOUND_MASK_LINE|SOUND_MASK_SYNTH|SOUND_MASK_CD|SOUND_MASK_MIC;
3018 mixer_ioctl(s, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
3019 for (i = 0; i < sizeof(initvol)/sizeof(initvol[0]); i++) {
3020 val = initvol[i].vol;
3021 mixer_ioctl(s, initvol[i].mixch, (unsigned long)&val);
3022 }
3023 /* use channel 0 for record, channel 1 for play */
3024 maskb(s->iobase + CODEC_CMI_FUNCTRL0, ~2, 1);
3025 s->deviceid = pcidev->device;
3026
3027 if (pcidev->device == PCI_DEVICE_ID_CMEDIA_CM8738) {
3028
3029 /* chip version and hw capability check */
3030 s->chip_version = query_chip(s);
3031 printk(KERN_INFO "cmpci: chip version = 0%d\n", s->chip_version);
3032
3033 /* seet SPDIF-in inverse before enable SPDIF loop */
3034 if (spdif_inverse) {
3035 /* turn on spdif-in inverse */
3036 maskb(s->iobase + CODEC_CMI_CHFORMAT + 2, ~0, 1);
3037 printk(KERN_INFO "cmpci: Inverse SPDIF-in\n");
3038 } else {
3039 /* turn off spdif-ininverse */
3040 maskb(s->iobase + CODEC_CMI_CHFORMAT + 2, ~1, 0);
3041 }
3042
3043 /* enable SPDIF loop */
3044 if (spdif_loop) {
3045 s->status |= DO_SPDIF_LOOP;
3046 /* turn on spdif-in to spdif-out */
3047 maskb(s->iobase + CODEC_CMI_FUNCTRL1, ~0, 0x80);
3048 printk(KERN_INFO "cmpci: Enable SPDIF loop\n");
3049 } else {
3050 s->status &= ~DO_SPDIF_LOOP;
3051 /* turn off spdif-in to spdif-out */
3052 maskb(s->iobase + CODEC_CMI_FUNCTRL1, ~0x80, 0);
3053 }
3054 if (use_line_as_rear) {
3055 s->capability |= CAN_LINE_AS_REAR;
3056 s->status |= DO_LINE_AS_REAR;
3057 maskb(s->iobase + CODEC_CMI_MIXER1, ~0, 0x20);
3058 } else
3059 maskb(s->iobase + CODEC_CMI_MIXER1, ~0x20, 0);
3060 if (s->chip_version >= 39) {
3061 if (use_line_as_bass) {
3062 s->capability |= CAN_LINE_AS_BASS;
3063 s->status |= DO_LINE_AS_BASS;
3064 maskb(s->iobase + CODEC_CMI_LEGACY_CTRL + 1, ~0, 0x60);
3065 } else
3066 maskb(s->iobase + CODEC_CMI_LEGACY_CTRL + 1, ~0x60, 0);
3067 }
3068 } else {
3069 /* 8338 will fall here */
3070 s->max_channels = 2;
3071 }
3072 /* queue it for later freeing */
3073 s->next = devs;
3074 devs = s;
3075 return;
3076
3077 #ifdef CONFIG_SOUND_CMPCI_FM
3078 unregister_sound_special(s->dev_dmfm);
3079 err_dev4:
3080 #endif
3081 #ifdef CONFIG_SOUND_CMPCI_MIDI
3082 unregister_sound_midi(s->dev_midi);
3083 err_dev3:
3084 #endif
3085 unregister_sound_mixer(s->dev_mixer);
3086 err_dev2:
3087 unregister_sound_dsp(s->dev_audio);
3088 err_dev1:
3089 printk(KERN_ERR "cmpci: cannot register misc device\n");
3090 free_irq(s->irq, s);
3091 err_irq:
3092 #ifdef CONFIG_SOUND_CMPCI_FM
3093 if (s->iosynth) release_region(s->iosynth, CM_EXTENT_SYNTH);
3094 #endif
3095 #ifdef CONFIG_SOUND_CMPCI_MIDI
3096 if (s->iomidi) release_region(s->iomidi, CM_EXTENT_MIDI);
3097 #endif
3098 release_region(s->iobase, CM_EXTENT_CODEC);
3099 err_region5:
3100 kfree(s);
3101 }
3102 if (!devs) {
3103 if (wavetable_mem)
3104 free_pages(wavetable_mem, 20-PAGE_SHIFT);
3105 return;
3106 }
3107 return;
3108 }
3109
3110 static int __init init_cmpci(void)
3111 {
3112 struct pci_dev *pcidev = NULL;
3113 int index = 0;
3114
3115 #ifdef CONFIG_PCI
3116 if (!pci_present()) /* No PCI bus in this machine! */
3117 #endif
3118 return -ENODEV;
3119 printk(KERN_INFO "cmpci: version $Revision: 5.64 $ time " __TIME__ " " __DATE__ "\n");
3120
3121 while (index < NR_DEVICE && (
3122 (pcidev = pci_find_device(PCI_VENDOR_ID_CMEDIA, PCI_DEVICE_ID_CMEDIA_CM8738, pcidev)))) {
3123 initialize_chip(pcidev);
3124 index++;
3125 }
3126 while (index < NR_DEVICE && (
3127 (pcidev = pci_find_device(PCI_VENDOR_ID_CMEDIA, PCI_DEVICE_ID_CMEDIA_CM8338A, pcidev)))) {
3128 initialize_chip(pcidev);
3129 index++;
3130 }
3131 while (index < NR_DEVICE && (
3132 (pcidev = pci_find_device(PCI_VENDOR_ID_CMEDIA, PCI_DEVICE_ID_CMEDIA_CM8338B, pcidev)))) {
3133 initialize_chip(pcidev);
3134 index++;
3135 }
3136 return 0;
3137 }
3138
3139 /* --------------------------------------------------------------------- */
3140
3141 MODULE_AUTHOR("ChenLi Tien, cltien@cmedia.com.tw");
3142 MODULE_DESCRIPTION("CM8x38 Audio Driver");
3143
3144 static void __exit cleanup_cmpci(void)
3145 {
3146 struct cm_state *s;
3147
3148 while ((s = devs)) {
3149 devs = devs->next;
3150 outb(0, s->iobase + CODEC_CMI_INT_HLDCLR + 2); /* disable ints */
3151 synchronize_irq();
3152 outb(0, s->iobase + CODEC_CMI_FUNCTRL0 + 2); /* disable channels */
3153 free_irq(s->irq, s);
3154
3155 /* reset mixer */
3156 wrmixer(s, DSP_MIX_DATARESETIDX, 0);
3157
3158 release_region(s->iobase, CM_EXTENT_CODEC);
3159 #ifdef CONFIG_SOUND_CMPCI_MIDI
3160 if (s->iomidi) release_region(s->iomidi, CM_EXTENT_MIDI);
3161 #endif
3162 #ifdef CONFIG_SOUND_CMPCI_FM
3163 if (s->iosynth) release_region(s->iosynth, CM_EXTENT_SYNTH);
3164 #endif
3165 unregister_sound_dsp(s->dev_audio);
3166 unregister_sound_mixer(s->dev_mixer);
3167 #ifdef CONFIG_SOUND_CMPCI_MIDI
3168 unregister_sound_midi(s->dev_midi);
3169 #endif
3170 #ifdef CONFIG_SOUND_CMPCI_FM
3171 unregister_sound_special(s->dev_dmfm);
3172 #endif
3173 kfree(s);
3174 }
3175 if (wavetable_mem)
3176 free_pages(wavetable_mem, 20-PAGE_SHIFT);
3177 printk(KERN_INFO "cmpci: unloading\n");
3178 }
3179
3180 module_init(init_cmpci);
3181 module_exit(cleanup_cmpci);
3182