File: /usr/src/linux/drivers/sound/msnd_pinnacle.c
1 /*********************************************************************
2 *
3 * Turtle Beach MultiSound Sound Card Driver for Linux
4 * Linux 2.0/2.2 Version
5 *
6 * msnd_pinnacle.c / msnd_classic.c
7 *
8 * -- If MSND_CLASSIC is defined:
9 *
10 * -> driver for Turtle Beach Classic/Monterey/Tahiti
11 *
12 * -- Else
13 *
14 * -> driver for Turtle Beach Pinnacle/Fiji
15 *
16 * Copyright (C) 1998 Andrew Veliath
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31 *
32 * $Id: msnd_pinnacle.c,v 1.8 2000/12/30 00:33:21 sycamore Exp $
33 *
34 * 12-3-2000 Modified IO port validation Steve Sycamore
35 *
36 *
37 * $$$: msnd_pinnacle.c,v 1.75 1999/03/21 16:50:09 andrewtv $$$ $
38 *
39 ********************************************************************/
40
41 #include <linux/kernel.h>
42 #include <linux/config.h>
43 #include <linux/version.h>
44 #include <linux/module.h>
45 #include <linux/slab.h>
46 #include <linux/types.h>
47 #include <linux/delay.h>
48 #include <linux/init.h>
49 #include <linux/smp_lock.h>
50 #include <asm/irq.h>
51 #include <asm/io.h>
52 #include "sound_config.h"
53 #include "sound_firmware.h"
54 #ifdef MSND_CLASSIC
55 # ifndef __alpha__
56 # define SLOWIO
57 # endif
58 #endif
59 #include "msnd.h"
60 #ifdef MSND_CLASSIC
61 # ifdef CONFIG_MSNDCLAS_HAVE_BOOT
62 # define HAVE_DSPCODEH
63 # endif
64 # include "msnd_classic.h"
65 # define LOGNAME "msnd_classic"
66 #else
67 # ifdef CONFIG_MSNDPIN_HAVE_BOOT
68 # define HAVE_DSPCODEH
69 # endif
70 # include "msnd_pinnacle.h"
71 # define LOGNAME "msnd_pinnacle"
72 #endif
73
74 #ifndef CONFIG_MSND_WRITE_NDELAY
75 # define CONFIG_MSND_WRITE_NDELAY 1
76 #endif
77
78 #define get_play_delay_jiffies(size) ((size) * HZ * \
79 dev.play_sample_size / 8 / \
80 dev.play_sample_rate / \
81 dev.play_channels)
82
83 #define get_rec_delay_jiffies(size) ((size) * HZ * \
84 dev.rec_sample_size / 8 / \
85 dev.rec_sample_rate / \
86 dev.rec_channels)
87
88 static multisound_dev_t dev;
89
90 #ifndef HAVE_DSPCODEH
91 static char *dspini, *permini;
92 static int sizeof_dspini, sizeof_permini;
93 #endif
94
95 static int dsp_full_reset(void);
96 static void dsp_write_flush(void);
97
98 static __inline__ int chk_send_dsp_cmd(multisound_dev_t *dev, register BYTE cmd)
99 {
100 if (msnd_send_dsp_cmd(dev, cmd) == 0)
101 return 0;
102 dsp_full_reset();
103 return msnd_send_dsp_cmd(dev, cmd);
104 }
105
106 static void reset_play_queue(void)
107 {
108 int n;
109 LPDAQD lpDAQ;
110
111 dev.last_playbank = -1;
112 isa_writew(PCTODSP_OFFSET(0 * DAQDS__size), dev.DAPQ + JQS_wHead);
113 isa_writew(PCTODSP_OFFSET(0 * DAQDS__size), dev.DAPQ + JQS_wTail);
114
115 for (n = 0, lpDAQ = dev.base + DAPQ_DATA_BUFF; n < 3; ++n, lpDAQ += DAQDS__size) {
116 isa_writew(PCTODSP_BASED((DWORD)(DAP_BUFF_SIZE * n)), lpDAQ + DAQDS_wStart);
117 isa_writew(0, lpDAQ + DAQDS_wSize);
118 isa_writew(1, lpDAQ + DAQDS_wFormat);
119 isa_writew(dev.play_sample_size, lpDAQ + DAQDS_wSampleSize);
120 isa_writew(dev.play_channels, lpDAQ + DAQDS_wChannels);
121 isa_writew(dev.play_sample_rate, lpDAQ + DAQDS_wSampleRate);
122 isa_writew(HIMT_PLAY_DONE * 0x100 + n, lpDAQ + DAQDS_wIntMsg);
123 isa_writew(n, lpDAQ + DAQDS_wFlags);
124 }
125 }
126
127 static void reset_record_queue(void)
128 {
129 int n;
130 LPDAQD lpDAQ;
131 unsigned long flags;
132
133 dev.last_recbank = 2;
134 isa_writew(PCTODSP_OFFSET(0 * DAQDS__size), dev.DARQ + JQS_wHead);
135 isa_writew(PCTODSP_OFFSET(dev.last_recbank * DAQDS__size), dev.DARQ + JQS_wTail);
136
137 /* Critical section: bank 1 access */
138 spin_lock_irqsave(&dev.lock, flags);
139 outb(HPBLKSEL_1, dev.io + HP_BLKS);
140 isa_memset_io(dev.base, 0, DAR_BUFF_SIZE * 3);
141 outb(HPBLKSEL_0, dev.io + HP_BLKS);
142 spin_unlock_irqrestore(&dev.lock, flags);
143
144 for (n = 0, lpDAQ = dev.base + DARQ_DATA_BUFF; n < 3; ++n, lpDAQ += DAQDS__size) {
145 isa_writew(PCTODSP_BASED((DWORD)(DAR_BUFF_SIZE * n)) + 0x4000, lpDAQ + DAQDS_wStart);
146 isa_writew(DAR_BUFF_SIZE, lpDAQ + DAQDS_wSize);
147 isa_writew(1, lpDAQ + DAQDS_wFormat);
148 isa_writew(dev.rec_sample_size, lpDAQ + DAQDS_wSampleSize);
149 isa_writew(dev.rec_channels, lpDAQ + DAQDS_wChannels);
150 isa_writew(dev.rec_sample_rate, lpDAQ + DAQDS_wSampleRate);
151 isa_writew(HIMT_RECORD_DONE * 0x100 + n, lpDAQ + DAQDS_wIntMsg);
152 isa_writew(n, lpDAQ + DAQDS_wFlags);
153 }
154 }
155
156 static void reset_queues(void)
157 {
158 if (dev.mode & FMODE_WRITE) {
159 msnd_fifo_make_empty(&dev.DAPF);
160 reset_play_queue();
161 }
162 if (dev.mode & FMODE_READ) {
163 msnd_fifo_make_empty(&dev.DARF);
164 reset_record_queue();
165 }
166 }
167
168 static int dsp_set_format(struct file *file, int val)
169 {
170 int data, i;
171 LPDAQD lpDAQ, lpDARQ;
172
173 lpDAQ = dev.base + DAPQ_DATA_BUFF;
174 lpDARQ = dev.base + DARQ_DATA_BUFF;
175
176 switch (val) {
177 case AFMT_U8:
178 case AFMT_S16_LE:
179 data = val;
180 break;
181 default:
182 data = DEFSAMPLESIZE;
183 break;
184 }
185
186 for (i = 0; i < 3; ++i, lpDAQ += DAQDS__size, lpDARQ += DAQDS__size) {
187 if (file->f_mode & FMODE_WRITE)
188 isa_writew(data, lpDAQ + DAQDS_wSampleSize);
189 if (file->f_mode & FMODE_READ)
190 isa_writew(data, lpDARQ + DAQDS_wSampleSize);
191 }
192 if (file->f_mode & FMODE_WRITE)
193 dev.play_sample_size = data;
194 if (file->f_mode & FMODE_READ)
195 dev.rec_sample_size = data;
196
197 return data;
198 }
199
200 static int dsp_get_frag_size(void)
201 {
202 int size;
203 size = dev.fifosize / 4;
204 if (size > 32 * 1024)
205 size = 32 * 1024;
206 return size;
207 }
208
209 static int dsp_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
210 {
211 int val, i, data, tmp;
212 LPDAQD lpDAQ, lpDARQ;
213 audio_buf_info abinfo;
214 unsigned long flags;
215
216 lpDAQ = dev.base + DAPQ_DATA_BUFF;
217 lpDARQ = dev.base + DARQ_DATA_BUFF;
218
219 switch (cmd) {
220 case SNDCTL_DSP_SUBDIVIDE:
221 case SNDCTL_DSP_SETFRAGMENT:
222 case SNDCTL_DSP_SETDUPLEX:
223 case SNDCTL_DSP_POST:
224 return 0;
225
226 case SNDCTL_DSP_GETIPTR:
227 case SNDCTL_DSP_GETOPTR:
228 case SNDCTL_DSP_MAPINBUF:
229 case SNDCTL_DSP_MAPOUTBUF:
230 return -EINVAL;
231
232 case SNDCTL_DSP_GETOSPACE:
233 if (!(file->f_mode & FMODE_WRITE))
234 return -EINVAL;
235 spin_lock_irqsave(&dev.lock, flags);
236 abinfo.fragsize = dsp_get_frag_size();
237 abinfo.bytes = dev.DAPF.n - dev.DAPF.len;
238 abinfo.fragstotal = dev.DAPF.n / abinfo.fragsize;
239 abinfo.fragments = abinfo.bytes / abinfo.fragsize;
240 spin_unlock_irqrestore(&dev.lock, flags);
241 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
242
243 case SNDCTL_DSP_GETISPACE:
244 if (!(file->f_mode & FMODE_READ))
245 return -EINVAL;
246 spin_lock_irqsave(&dev.lock, flags);
247 abinfo.fragsize = dsp_get_frag_size();
248 abinfo.bytes = dev.DARF.n - dev.DARF.len;
249 abinfo.fragstotal = dev.DARF.n / abinfo.fragsize;
250 abinfo.fragments = abinfo.bytes / abinfo.fragsize;
251 spin_unlock_irqrestore(&dev.lock, flags);
252 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
253
254 case SNDCTL_DSP_RESET:
255 dev.nresets = 0;
256 reset_queues();
257 return 0;
258
259 case SNDCTL_DSP_SYNC:
260 dsp_write_flush();
261 return 0;
262
263 case SNDCTL_DSP_GETBLKSIZE:
264 tmp = dsp_get_frag_size();
265 if (put_user(tmp, (int *)arg))
266 return -EFAULT;
267 return 0;
268
269 case SNDCTL_DSP_GETFMTS:
270 val = AFMT_S16_LE | AFMT_U8;
271 if (put_user(val, (int *)arg))
272 return -EFAULT;
273 return 0;
274
275 case SNDCTL_DSP_SETFMT:
276 if (get_user(val, (int *)arg))
277 return -EFAULT;
278
279 if (file->f_mode & FMODE_WRITE)
280 data = val == AFMT_QUERY
281 ? dev.play_sample_size
282 : dsp_set_format(file, val);
283 else
284 data = val == AFMT_QUERY
285 ? dev.rec_sample_size
286 : dsp_set_format(file, val);
287
288 if (put_user(data, (int *)arg))
289 return -EFAULT;
290 return 0;
291
292 case SNDCTL_DSP_NONBLOCK:
293 if (!test_bit(F_DISABLE_WRITE_NDELAY, &dev.flags) &&
294 file->f_mode & FMODE_WRITE)
295 dev.play_ndelay = 1;
296 if (file->f_mode & FMODE_READ)
297 dev.rec_ndelay = 1;
298 return 0;
299
300 case SNDCTL_DSP_GETCAPS:
301 val = DSP_CAP_DUPLEX | DSP_CAP_BATCH;
302 if (put_user(val, (int *)arg))
303 return -EFAULT;
304 return 0;
305
306 case SNDCTL_DSP_SPEED:
307 if (get_user(val, (int *)arg))
308 return -EFAULT;
309
310 if (val < 8000)
311 val = 8000;
312
313 if (val > 48000)
314 val = 48000;
315
316 data = val;
317
318 for (i = 0; i < 3; ++i, lpDAQ += DAQDS__size, lpDARQ += DAQDS__size) {
319 if (file->f_mode & FMODE_WRITE)
320 isa_writew(data, lpDAQ + DAQDS_wSampleRate);
321 if (file->f_mode & FMODE_READ)
322 isa_writew(data, lpDARQ + DAQDS_wSampleRate);
323 }
324 if (file->f_mode & FMODE_WRITE)
325 dev.play_sample_rate = data;
326 if (file->f_mode & FMODE_READ)
327 dev.rec_sample_rate = data;
328
329 if (put_user(data, (int *)arg))
330 return -EFAULT;
331 return 0;
332
333 case SNDCTL_DSP_CHANNELS:
334 case SNDCTL_DSP_STEREO:
335 if (get_user(val, (int *)arg))
336 return -EFAULT;
337
338 if (cmd == SNDCTL_DSP_CHANNELS) {
339 switch (val) {
340 case 1:
341 case 2:
342 data = val;
343 break;
344 default:
345 val = data = 2;
346 break;
347 }
348 } else {
349 switch (val) {
350 case 0:
351 data = 1;
352 break;
353 default:
354 val = 1;
355 case 1:
356 data = 2;
357 break;
358 }
359 }
360
361 for (i = 0; i < 3; ++i, lpDAQ += DAQDS__size, lpDARQ += DAQDS__size) {
362 if (file->f_mode & FMODE_WRITE)
363 isa_writew(data, lpDAQ + DAQDS_wChannels);
364 if (file->f_mode & FMODE_READ)
365 isa_writew(data, lpDARQ + DAQDS_wChannels);
366 }
367 if (file->f_mode & FMODE_WRITE)
368 dev.play_channels = data;
369 if (file->f_mode & FMODE_READ)
370 dev.rec_channels = data;
371
372 if (put_user(val, (int *)arg))
373 return -EFAULT;
374 return 0;
375 }
376
377 return -EINVAL;
378 }
379
380 static int mixer_get(int d)
381 {
382 if (d > 31)
383 return -EINVAL;
384
385 switch (d) {
386 case SOUND_MIXER_VOLUME:
387 case SOUND_MIXER_PCM:
388 case SOUND_MIXER_LINE:
389 case SOUND_MIXER_IMIX:
390 case SOUND_MIXER_LINE1:
391 #ifndef MSND_CLASSIC
392 case SOUND_MIXER_MIC:
393 case SOUND_MIXER_SYNTH:
394 #endif
395 return (dev.left_levels[d] >> 8) * 100 / 0xff |
396 (((dev.right_levels[d] >> 8) * 100 / 0xff) << 8);
397 default:
398 return 0;
399 }
400 }
401
402 #define update_volm(a,b) \
403 isa_writew((dev.left_levels[a] >> 1) * \
404 isa_readw(dev.SMA + SMA_wCurrMastVolLeft) / 0xffff, \
405 dev.SMA + SMA_##b##Left); \
406 isa_writew((dev.right_levels[a] >> 1) * \
407 isa_readw(dev.SMA + SMA_wCurrMastVolRight) / 0xffff, \
408 dev.SMA + SMA_##b##Right);
409
410 #define update_potm(d,s,ar) \
411 isa_writeb((dev.left_levels[d] >> 8) * \
412 isa_readw(dev.SMA + SMA_wCurrMastVolLeft) / 0xffff, \
413 dev.SMA + SMA_##s##Left); \
414 isa_writeb((dev.right_levels[d] >> 8) * \
415 isa_readw(dev.SMA + SMA_wCurrMastVolRight) / 0xffff, \
416 dev.SMA + SMA_##s##Right); \
417 if (msnd_send_word(&dev, 0, 0, ar) == 0) \
418 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
419
420 #define update_pot(d,s,ar) \
421 isa_writeb(dev.left_levels[d] >> 8, \
422 dev.SMA + SMA_##s##Left); \
423 isa_writeb(dev.right_levels[d] >> 8, \
424 dev.SMA + SMA_##s##Right); \
425 if (msnd_send_word(&dev, 0, 0, ar) == 0) \
426 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
427
428 static int mixer_set(int d, int value)
429 {
430 int left = value & 0x000000ff;
431 int right = (value & 0x0000ff00) >> 8;
432 int bLeft, bRight;
433 int wLeft, wRight;
434 int updatemaster = 0;
435
436 if (d > 31)
437 return -EINVAL;
438
439 bLeft = left * 0xff / 100;
440 wLeft = left * 0xffff / 100;
441
442 bRight = right * 0xff / 100;
443 wRight = right * 0xffff / 100;
444
445 dev.left_levels[d] = wLeft;
446 dev.right_levels[d] = wRight;
447
448 switch (d) {
449 /* master volume unscaled controls */
450 case SOUND_MIXER_LINE: /* line pot control */
451 /* scaled by IMIX in digital mix */
452 isa_writeb(bLeft, dev.SMA + SMA_bInPotPosLeft);
453 isa_writeb(bRight, dev.SMA + SMA_bInPotPosRight);
454 if (msnd_send_word(&dev, 0, 0, HDEXAR_IN_SET_POTS) == 0)
455 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
456 break;
457 #ifndef MSND_CLASSIC
458 case SOUND_MIXER_MIC: /* mic pot control */
459 /* scaled by IMIX in digital mix */
460 isa_writeb(bLeft, dev.SMA + SMA_bMicPotPosLeft);
461 isa_writeb(bRight, dev.SMA + SMA_bMicPotPosRight);
462 if (msnd_send_word(&dev, 0, 0, HDEXAR_MIC_SET_POTS) == 0)
463 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
464 break;
465 #endif
466 case SOUND_MIXER_VOLUME: /* master volume */
467 isa_writew(wLeft, dev.SMA + SMA_wCurrMastVolLeft);
468 isa_writew(wRight, dev.SMA + SMA_wCurrMastVolRight);
469 /* fall through */
470
471 case SOUND_MIXER_LINE1: /* aux pot control */
472 /* scaled by master volume */
473 /* fall through */
474
475 /* digital controls */
476 case SOUND_MIXER_SYNTH: /* synth vol (dsp mix) */
477 case SOUND_MIXER_PCM: /* pcm vol (dsp mix) */
478 case SOUND_MIXER_IMIX: /* input monitor (dsp mix) */
479 /* scaled by master volume */
480 updatemaster = 1;
481 break;
482
483 default:
484 return 0;
485 }
486
487 if (updatemaster) {
488 /* update master volume scaled controls */
489 update_volm(SOUND_MIXER_PCM, wCurrPlayVol);
490 update_volm(SOUND_MIXER_IMIX, wCurrInVol);
491 #ifndef MSND_CLASSIC
492 update_volm(SOUND_MIXER_SYNTH, wCurrMHdrVol);
493 #endif
494 update_potm(SOUND_MIXER_LINE1, bAuxPotPos, HDEXAR_AUX_SET_POTS);
495 }
496
497 return mixer_get(d);
498 }
499
500 static void mixer_setup(void)
501 {
502 update_pot(SOUND_MIXER_LINE, bInPotPos, HDEXAR_IN_SET_POTS);
503 update_potm(SOUND_MIXER_LINE1, bAuxPotPos, HDEXAR_AUX_SET_POTS);
504 update_volm(SOUND_MIXER_PCM, wCurrPlayVol);
505 update_volm(SOUND_MIXER_IMIX, wCurrInVol);
506 #ifndef MSND_CLASSIC
507 update_pot(SOUND_MIXER_MIC, bMicPotPos, HDEXAR_MIC_SET_POTS);
508 update_volm(SOUND_MIXER_SYNTH, wCurrMHdrVol);
509 #endif
510 }
511
512 static unsigned long set_recsrc(unsigned long recsrc)
513 {
514 if (dev.recsrc == recsrc)
515 return dev.recsrc;
516 #ifdef HAVE_NORECSRC
517 else if (recsrc == 0)
518 dev.recsrc = 0;
519 #endif
520 else
521 dev.recsrc ^= recsrc;
522
523 #ifndef MSND_CLASSIC
524 if (dev.recsrc & SOUND_MASK_IMIX) {
525 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_ANA_IN) == 0)
526 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
527 }
528 else if (dev.recsrc & SOUND_MASK_SYNTH) {
529 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_SYNTH_IN) == 0)
530 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
531 }
532 else if ((dev.recsrc & SOUND_MASK_DIGITAL1) && test_bit(F_HAVEDIGITAL, &dev.flags)) {
533 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_DAT_IN) == 0)
534 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
535 }
536 else {
537 #ifdef HAVE_NORECSRC
538 /* Select no input (?) */
539 dev.recsrc = 0;
540 #else
541 dev.recsrc = SOUND_MASK_IMIX;
542 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_ANA_IN) == 0)
543 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
544 #endif
545 }
546 #endif /* MSND_CLASSIC */
547
548 return dev.recsrc;
549 }
550
551 static unsigned long force_recsrc(unsigned long recsrc)
552 {
553 dev.recsrc = 0;
554 return set_recsrc(recsrc);
555 }
556
557 #define set_mixer_info() \
558 strncpy(info.id, "MSNDMIXER", sizeof(info.id)); \
559 strncpy(info.name, "MultiSound Mixer", sizeof(info.name));
560
561 static int mixer_ioctl(unsigned int cmd, unsigned long arg)
562 {
563 if (cmd == SOUND_MIXER_INFO) {
564 mixer_info info;
565 set_mixer_info();
566 info.modify_counter = dev.mixer_mod_count;
567 return copy_to_user((void *)arg, &info, sizeof(info));
568 } else if (cmd == SOUND_OLD_MIXER_INFO) {
569 _old_mixer_info info;
570 set_mixer_info();
571 return copy_to_user((void *)arg, &info, sizeof(info));
572 } else if (cmd == SOUND_MIXER_PRIVATE1) {
573 dev.nresets = 0;
574 dsp_full_reset();
575 return 0;
576 } else if (((cmd >> 8) & 0xff) == 'M') {
577 int val = 0;
578
579 if (_SIOC_DIR(cmd) & _SIOC_WRITE) {
580 switch (cmd & 0xff) {
581 case SOUND_MIXER_RECSRC:
582 if (get_user(val, (int *)arg))
583 return -EFAULT;
584 val = set_recsrc(val);
585 break;
586
587 default:
588 if (get_user(val, (int *)arg))
589 return -EFAULT;
590 val = mixer_set(cmd & 0xff, val);
591 break;
592 }
593 ++dev.mixer_mod_count;
594 return put_user(val, (int *)arg);
595 } else {
596 switch (cmd & 0xff) {
597 case SOUND_MIXER_RECSRC:
598 val = dev.recsrc;
599 break;
600
601 case SOUND_MIXER_DEVMASK:
602 case SOUND_MIXER_STEREODEVS:
603 val = SOUND_MASK_PCM |
604 SOUND_MASK_LINE |
605 SOUND_MASK_IMIX |
606 SOUND_MASK_LINE1 |
607 #ifndef MSND_CLASSIC
608 SOUND_MASK_MIC |
609 SOUND_MASK_SYNTH |
610 #endif
611 SOUND_MASK_VOLUME;
612 break;
613
614 case SOUND_MIXER_RECMASK:
615 #ifdef MSND_CLASSIC
616 val = 0;
617 #else
618 val = SOUND_MASK_IMIX |
619 SOUND_MASK_SYNTH;
620 if (test_bit(F_HAVEDIGITAL, &dev.flags))
621 val |= SOUND_MASK_DIGITAL1;
622 #endif
623 break;
624
625 case SOUND_MIXER_CAPS:
626 val = SOUND_CAP_EXCL_INPUT;
627 break;
628
629 default:
630 if ((val = mixer_get(cmd & 0xff)) < 0)
631 return -EINVAL;
632 break;
633 }
634 }
635
636 return put_user(val, (int *)arg);
637 }
638
639 return -EINVAL;
640 }
641
642 static int dev_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
643 {
644 int minor = MINOR(inode->i_rdev);
645
646 if (cmd == OSS_GETVERSION) {
647 int sound_version = SOUND_VERSION;
648 return put_user(sound_version, (int *)arg);
649 }
650
651 if (minor == dev.dsp_minor)
652 return dsp_ioctl(file, cmd, arg);
653 else if (minor == dev.mixer_minor)
654 return mixer_ioctl(cmd, arg);
655
656 return -EINVAL;
657 }
658
659 static void dsp_write_flush(void)
660 {
661 if (!(dev.mode & FMODE_WRITE) || !test_bit(F_WRITING, &dev.flags))
662 return;
663 set_bit(F_WRITEFLUSH, &dev.flags);
664 interruptible_sleep_on_timeout(
665 &dev.writeflush,
666 get_play_delay_jiffies(dev.DAPF.len));
667 clear_bit(F_WRITEFLUSH, &dev.flags);
668 if (!signal_pending(current)) {
669 current->state = TASK_INTERRUPTIBLE;
670 schedule_timeout(get_play_delay_jiffies(DAP_BUFF_SIZE));
671 }
672 clear_bit(F_WRITING, &dev.flags);
673 }
674
675 static void dsp_halt(struct file *file)
676 {
677 if ((file ? file->f_mode : dev.mode) & FMODE_READ) {
678 clear_bit(F_READING, &dev.flags);
679 chk_send_dsp_cmd(&dev, HDEX_RECORD_STOP);
680 msnd_disable_irq(&dev);
681 if (file) {
682 printk(KERN_DEBUG LOGNAME ": Stopping read for %p\n", file);
683 dev.mode &= ~FMODE_READ;
684 }
685 clear_bit(F_AUDIO_READ_INUSE, &dev.flags);
686 }
687 if ((file ? file->f_mode : dev.mode) & FMODE_WRITE) {
688 if (test_bit(F_WRITING, &dev.flags)) {
689 dsp_write_flush();
690 chk_send_dsp_cmd(&dev, HDEX_PLAY_STOP);
691 }
692 msnd_disable_irq(&dev);
693 if (file) {
694 printk(KERN_DEBUG LOGNAME ": Stopping write for %p\n", file);
695 dev.mode &= ~FMODE_WRITE;
696 }
697 clear_bit(F_AUDIO_WRITE_INUSE, &dev.flags);
698 }
699 }
700
701 static int dsp_release(struct file *file)
702 {
703 dsp_halt(file);
704 return 0;
705 }
706
707 static int dsp_open(struct file *file)
708 {
709 if ((file ? file->f_mode : dev.mode) & FMODE_WRITE) {
710 set_bit(F_AUDIO_WRITE_INUSE, &dev.flags);
711 clear_bit(F_WRITING, &dev.flags);
712 msnd_fifo_make_empty(&dev.DAPF);
713 reset_play_queue();
714 if (file) {
715 printk(KERN_DEBUG LOGNAME ": Starting write for %p\n", file);
716 dev.mode |= FMODE_WRITE;
717 }
718 msnd_enable_irq(&dev);
719 }
720 if ((file ? file->f_mode : dev.mode) & FMODE_READ) {
721 set_bit(F_AUDIO_READ_INUSE, &dev.flags);
722 clear_bit(F_READING, &dev.flags);
723 msnd_fifo_make_empty(&dev.DARF);
724 reset_record_queue();
725 if (file) {
726 printk(KERN_DEBUG LOGNAME ": Starting read for %p\n", file);
727 dev.mode |= FMODE_READ;
728 }
729 msnd_enable_irq(&dev);
730 }
731 return 0;
732 }
733
734 static void set_default_play_audio_parameters(void)
735 {
736 dev.play_sample_size = DEFSAMPLESIZE;
737 dev.play_sample_rate = DEFSAMPLERATE;
738 dev.play_channels = DEFCHANNELS;
739 }
740
741 static void set_default_rec_audio_parameters(void)
742 {
743 dev.rec_sample_size = DEFSAMPLESIZE;
744 dev.rec_sample_rate = DEFSAMPLERATE;
745 dev.rec_channels = DEFCHANNELS;
746 }
747
748 static void set_default_audio_parameters(void)
749 {
750 set_default_play_audio_parameters();
751 set_default_rec_audio_parameters();
752 }
753
754 static int dev_open(struct inode *inode, struct file *file)
755 {
756 int minor = MINOR(inode->i_rdev);
757 int err = 0;
758
759 if (minor == dev.dsp_minor) {
760 if ((file->f_mode & FMODE_WRITE &&
761 test_bit(F_AUDIO_WRITE_INUSE, &dev.flags)) ||
762 (file->f_mode & FMODE_READ &&
763 test_bit(F_AUDIO_READ_INUSE, &dev.flags)))
764 return -EBUSY;
765
766 if ((err = dsp_open(file)) >= 0) {
767 dev.nresets = 0;
768 if (file->f_mode & FMODE_WRITE) {
769 set_default_play_audio_parameters();
770 if (!test_bit(F_DISABLE_WRITE_NDELAY, &dev.flags))
771 dev.play_ndelay = (file->f_flags & O_NDELAY) ? 1 : 0;
772 else
773 dev.play_ndelay = 0;
774 }
775 if (file->f_mode & FMODE_READ) {
776 set_default_rec_audio_parameters();
777 dev.rec_ndelay = (file->f_flags & O_NDELAY) ? 1 : 0;
778 }
779 }
780 }
781 else if (minor == dev.mixer_minor) {
782 /* nothing */
783 } else
784 err = -EINVAL;
785
786 return err;
787 }
788
789 static int dev_release(struct inode *inode, struct file *file)
790 {
791 int minor = MINOR(inode->i_rdev);
792 int err = 0;
793
794 lock_kernel();
795 if (minor == dev.dsp_minor)
796 err = dsp_release(file);
797 else if (minor == dev.mixer_minor) {
798 /* nothing */
799 } else
800 err = -EINVAL;
801 unlock_kernel();
802 return err;
803 }
804
805 static __inline__ int pack_DARQ_to_DARF(register int bank)
806 {
807 register int size, n, timeout = 3;
808 register WORD wTmp;
809 LPDAQD DAQD;
810
811 /* Increment the tail and check for queue wrap */
812 wTmp = isa_readw(dev.DARQ + JQS_wTail) + PCTODSP_OFFSET(DAQDS__size);
813 if (wTmp > isa_readw(dev.DARQ + JQS_wSize))
814 wTmp = 0;
815 while (wTmp == isa_readw(dev.DARQ + JQS_wHead) && timeout--)
816 udelay(1);
817 isa_writew(wTmp, dev.DARQ + JQS_wTail);
818
819 /* Get our digital audio queue struct */
820 DAQD = bank * DAQDS__size + dev.base + DARQ_DATA_BUFF;
821
822 /* Get length of data */
823 size = isa_readw(DAQD + DAQDS_wSize);
824
825 /* Read data from the head (unprotected bank 1 access okay
826 since this is only called inside an interrupt) */
827 outb(HPBLKSEL_1, dev.io + HP_BLKS);
828 if ((n = msnd_fifo_write(
829 &dev.DARF,
830 (char *)(dev.base + bank * DAR_BUFF_SIZE),
831 size, 0)) <= 0) {
832 outb(HPBLKSEL_0, dev.io + HP_BLKS);
833 return n;
834 }
835 outb(HPBLKSEL_0, dev.io + HP_BLKS);
836
837 return 1;
838 }
839
840 static __inline__ int pack_DAPF_to_DAPQ(register int start)
841 {
842 register WORD DAPQ_tail;
843 register int protect = start, nbanks = 0;
844 LPDAQD DAQD;
845
846 DAPQ_tail = isa_readw(dev.DAPQ + JQS_wTail);
847 while (DAPQ_tail != isa_readw(dev.DAPQ + JQS_wHead) || start) {
848 register int bank_num = DAPQ_tail / PCTODSP_OFFSET(DAQDS__size);
849 register int n;
850 unsigned long flags;
851
852 /* Write the data to the new tail */
853 if (protect) {
854 /* Critical section: protect fifo in non-interrupt */
855 spin_lock_irqsave(&dev.lock, flags);
856 if ((n = msnd_fifo_read(
857 &dev.DAPF,
858 (char *)(dev.base + bank_num * DAP_BUFF_SIZE),
859 DAP_BUFF_SIZE, 0)) < 0) {
860 spin_unlock_irqrestore(&dev.lock, flags);
861 return n;
862 }
863 spin_unlock_irqrestore(&dev.lock, flags);
864 } else {
865 if ((n = msnd_fifo_read(
866 &dev.DAPF,
867 (char *)(dev.base + bank_num * DAP_BUFF_SIZE),
868 DAP_BUFF_SIZE, 0)) < 0) {
869 return n;
870 }
871 }
872 if (!n)
873 break;
874
875 if (start)
876 start = 0;
877
878 /* Get our digital audio queue struct */
879 DAQD = bank_num * DAQDS__size + dev.base + DAPQ_DATA_BUFF;
880
881 /* Write size of this bank */
882 isa_writew(n, DAQD + DAQDS_wSize);
883 ++nbanks;
884
885 /* Then advance the tail */
886 DAPQ_tail = (++bank_num % 3) * PCTODSP_OFFSET(DAQDS__size);
887 isa_writew(DAPQ_tail, dev.DAPQ + JQS_wTail);
888 /* Tell the DSP to play the bank */
889 msnd_send_dsp_cmd(&dev, HDEX_PLAY_START);
890 }
891 return nbanks;
892 }
893
894 static int dsp_read(char *buf, size_t len)
895 {
896 int count = len;
897
898 while (count > 0) {
899 int n;
900 unsigned long flags;
901
902 /* Critical section: protect fifo in non-interrupt */
903 spin_lock_irqsave(&dev.lock, flags);
904 if ((n = msnd_fifo_read(&dev.DARF, buf, count, 1)) < 0) {
905 printk(KERN_WARNING LOGNAME ": FIFO read error\n");
906 spin_unlock_irqrestore(&dev.lock, flags);
907 return n;
908 }
909 spin_unlock_irqrestore(&dev.lock, flags);
910 buf += n;
911 count -= n;
912
913 if (!test_bit(F_READING, &dev.flags) && dev.mode & FMODE_READ) {
914 dev.last_recbank = -1;
915 if (chk_send_dsp_cmd(&dev, HDEX_RECORD_START) == 0)
916 set_bit(F_READING, &dev.flags);
917 }
918
919 if (dev.rec_ndelay)
920 return count == len ? -EAGAIN : len - count;
921
922 if (count > 0) {
923 set_bit(F_READBLOCK, &dev.flags);
924 if (!interruptible_sleep_on_timeout(
925 &dev.readblock,
926 get_rec_delay_jiffies(DAR_BUFF_SIZE)))
927 clear_bit(F_READING, &dev.flags);
928 clear_bit(F_READBLOCK, &dev.flags);
929 if (signal_pending(current))
930 return -EINTR;
931 }
932 }
933
934 return len - count;
935 }
936
937 static int dsp_write(const char *buf, size_t len)
938 {
939 int count = len;
940
941 while (count > 0) {
942 int n;
943 unsigned long flags;
944
945 /* Critical section: protect fifo in non-interrupt */
946 spin_lock_irqsave(&dev.lock, flags);
947 if ((n = msnd_fifo_write(&dev.DAPF, buf, count, 1)) < 0) {
948 printk(KERN_WARNING LOGNAME ": FIFO write error\n");
949 spin_unlock_irqrestore(&dev.lock, flags);
950 return n;
951 }
952 spin_unlock_irqrestore(&dev.lock, flags);
953 buf += n;
954 count -= n;
955
956 if (!test_bit(F_WRITING, &dev.flags) && (dev.mode & FMODE_WRITE)) {
957 dev.last_playbank = -1;
958 if (pack_DAPF_to_DAPQ(1) > 0)
959 set_bit(F_WRITING, &dev.flags);
960 }
961
962 if (dev.play_ndelay)
963 return count == len ? -EAGAIN : len - count;
964
965 if (count > 0) {
966 set_bit(F_WRITEBLOCK, &dev.flags);
967 interruptible_sleep_on_timeout(
968 &dev.writeblock,
969 get_play_delay_jiffies(DAP_BUFF_SIZE));
970 clear_bit(F_WRITEBLOCK, &dev.flags);
971 if (signal_pending(current))
972 return -EINTR;
973 }
974 }
975
976 return len - count;
977 }
978
979 static ssize_t dev_read(struct file *file, char *buf, size_t count, loff_t *off)
980 {
981 int minor = MINOR(file->f_dentry->d_inode->i_rdev);
982 if (minor == dev.dsp_minor)
983 return dsp_read(buf, count);
984 else
985 return -EINVAL;
986 }
987
988 static ssize_t dev_write(struct file *file, const char *buf, size_t count, loff_t *off)
989 {
990 int minor = MINOR(file->f_dentry->d_inode->i_rdev);
991 if (minor == dev.dsp_minor)
992 return dsp_write(buf, count);
993 else
994 return -EINVAL;
995 }
996
997 static __inline__ void eval_dsp_msg(register WORD wMessage)
998 {
999 switch (HIBYTE(wMessage)) {
1000 case HIMT_PLAY_DONE:
1001 if (dev.last_playbank == LOBYTE(wMessage) || !test_bit(F_WRITING, &dev.flags))
1002 break;
1003 dev.last_playbank = LOBYTE(wMessage);
1004
1005 if (pack_DAPF_to_DAPQ(0) <= 0) {
1006 if (!test_bit(F_WRITEBLOCK, &dev.flags)) {
1007 if (test_and_clear_bit(F_WRITEFLUSH, &dev.flags))
1008 wake_up_interruptible(&dev.writeflush);
1009 }
1010 clear_bit(F_WRITING, &dev.flags);
1011 }
1012
1013 if (test_bit(F_WRITEBLOCK, &dev.flags))
1014 wake_up_interruptible(&dev.writeblock);
1015 break;
1016
1017 case HIMT_RECORD_DONE:
1018 if (dev.last_recbank == LOBYTE(wMessage))
1019 break;
1020 dev.last_recbank = LOBYTE(wMessage);
1021
1022 pack_DARQ_to_DARF(dev.last_recbank);
1023
1024 if (test_bit(F_READBLOCK, &dev.flags))
1025 wake_up_interruptible(&dev.readblock);
1026 break;
1027
1028 case HIMT_DSP:
1029 switch (LOBYTE(wMessage)) {
1030 #ifndef MSND_CLASSIC
1031 case HIDSP_PLAY_UNDER:
1032 #endif
1033 case HIDSP_INT_PLAY_UNDER:
1034 /* printk(KERN_DEBUG LOGNAME ": Play underflow\n"); */
1035 clear_bit(F_WRITING, &dev.flags);
1036 break;
1037
1038 case HIDSP_INT_RECORD_OVER:
1039 /* printk(KERN_DEBUG LOGNAME ": Record overflow\n"); */
1040 clear_bit(F_READING, &dev.flags);
1041 break;
1042
1043 default:
1044 /* printk(KERN_DEBUG LOGNAME ": DSP message %d 0x%02x\n",
1045 LOBYTE(wMessage), LOBYTE(wMessage)); */
1046 break;
1047 }
1048 break;
1049
1050 case HIMT_MIDI_IN_UCHAR:
1051 if (dev.midi_in_interrupt)
1052 (*dev.midi_in_interrupt)(&dev);
1053 break;
1054
1055 default:
1056 /* printk(KERN_DEBUG LOGNAME ": HIMT message %d 0x%02x\n", HIBYTE(wMessage), HIBYTE(wMessage)); */
1057 break;
1058 }
1059 }
1060
1061 static void intr(int irq, void *dev_id, struct pt_regs *regs)
1062 {
1063 /* Send ack to DSP */
1064 inb(dev.io + HP_RXL);
1065
1066 /* Evaluate queued DSP messages */
1067 while (isa_readw(dev.DSPQ + JQS_wTail) != isa_readw(dev.DSPQ + JQS_wHead)) {
1068 register WORD wTmp;
1069
1070 eval_dsp_msg(isa_readw(dev.pwDSPQData + 2*isa_readw(dev.DSPQ + JQS_wHead)));
1071
1072 if ((wTmp = isa_readw(dev.DSPQ + JQS_wHead) + 1) > isa_readw(dev.DSPQ + JQS_wSize))
1073 isa_writew(0, dev.DSPQ + JQS_wHead);
1074 else
1075 isa_writew(wTmp, dev.DSPQ + JQS_wHead);
1076 }
1077 }
1078
1079 static struct file_operations dev_fileops = {
1080 owner: THIS_MODULE,
1081 read: dev_read,
1082 write: dev_write,
1083 ioctl: dev_ioctl,
1084 open: dev_open,
1085 release: dev_release,
1086 };
1087
1088 static int reset_dsp(void)
1089 {
1090 int timeout = 100;
1091
1092 outb(HPDSPRESET_ON, dev.io + HP_DSPR);
1093 mdelay(1);
1094 #ifndef MSND_CLASSIC
1095 dev.info = inb(dev.io + HP_INFO);
1096 #endif
1097 outb(HPDSPRESET_OFF, dev.io + HP_DSPR);
1098 mdelay(1);
1099 while (timeout-- > 0) {
1100 if (inb(dev.io + HP_CVR) == HP_CVR_DEF)
1101 return 0;
1102 mdelay(1);
1103 }
1104 printk(KERN_ERR LOGNAME ": Cannot reset DSP\n");
1105
1106 return -EIO;
1107 }
1108
1109 static int __init probe_multisound(void)
1110 {
1111 #ifndef MSND_CLASSIC
1112 char *xv, *rev = NULL;
1113 char *pin = "Pinnacle", *fiji = "Fiji";
1114 char *pinfiji = "Pinnacle/Fiji";
1115 #endif
1116
1117 if (check_region(dev.io, dev.numio)) {
1118 printk(KERN_ERR LOGNAME ": I/O port conflict\n");
1119 return -ENODEV;
1120 }
1121 request_region(dev.io, dev.numio, "probing");
1122
1123 if (reset_dsp() < 0) {
1124 release_region(dev.io, dev.numio);
1125 return -ENODEV;
1126 }
1127
1128 #ifdef MSND_CLASSIC
1129 dev.name = "Classic/Tahiti/Monterey";
1130 printk(KERN_INFO LOGNAME ": %s, "
1131 #else
1132 switch (dev.info >> 4) {
1133 case 0xf: xv = "<= 1.15"; break;
1134 case 0x1: xv = "1.18/1.2"; break;
1135 case 0x2: xv = "1.3"; break;
1136 case 0x3: xv = "1.4"; break;
1137 default: xv = "unknown"; break;
1138 }
1139
1140 switch (dev.info & 0x7) {
1141 case 0x0: rev = "I"; dev.name = pin; break;
1142 case 0x1: rev = "F"; dev.name = pin; break;
1143 case 0x2: rev = "G"; dev.name = pin; break;
1144 case 0x3: rev = "H"; dev.name = pin; break;
1145 case 0x4: rev = "E"; dev.name = fiji; break;
1146 case 0x5: rev = "C"; dev.name = fiji; break;
1147 case 0x6: rev = "D"; dev.name = fiji; break;
1148 case 0x7:
1149 rev = "A-B (Fiji) or A-E (Pinnacle)";
1150 dev.name = pinfiji;
1151 break;
1152 }
1153 printk(KERN_INFO LOGNAME ": %s revision %s, Xilinx version %s, "
1154 #endif /* MSND_CLASSIC */
1155 "I/O 0x%x-0x%x, IRQ %d, memory mapped to 0x%lX-0x%lX\n",
1156 dev.name,
1157 #ifndef MSND_CLASSIC
1158 rev, xv,
1159 #endif
1160 dev.io, dev.io + dev.numio - 1,
1161 dev.irq,
1162 dev.base, dev.base + 0x7fff);
1163
1164 release_region(dev.io, dev.numio);
1165 return 0;
1166 }
1167
1168 static int init_sma(void)
1169 {
1170 static int initted;
1171 WORD mastVolLeft, mastVolRight;
1172 unsigned long flags;
1173
1174 #ifdef MSND_CLASSIC
1175 outb(dev.memid, dev.io + HP_MEMM);
1176 #endif
1177 outb(HPBLKSEL_0, dev.io + HP_BLKS);
1178 if (initted) {
1179 mastVolLeft = isa_readw(dev.SMA + SMA_wCurrMastVolLeft);
1180 mastVolRight = isa_readw(dev.SMA + SMA_wCurrMastVolRight);
1181 } else
1182 mastVolLeft = mastVolRight = 0;
1183 isa_memset_io(dev.base, 0, 0x8000);
1184
1185 /* Critical section: bank 1 access */
1186 spin_lock_irqsave(&dev.lock, flags);
1187 outb(HPBLKSEL_1, dev.io + HP_BLKS);
1188 isa_memset_io(dev.base, 0, 0x8000);
1189 outb(HPBLKSEL_0, dev.io + HP_BLKS);
1190 spin_unlock_irqrestore(&dev.lock, flags);
1191
1192 dev.pwDSPQData = (dev.base + DSPQ_DATA_BUFF);
1193 dev.pwMODQData = (dev.base + MODQ_DATA_BUFF);
1194 dev.pwMIDQData = (dev.base + MIDQ_DATA_BUFF);
1195
1196 /* Motorola 56k shared memory base */
1197 dev.SMA = dev.base + SMA_STRUCT_START;
1198
1199 /* Digital audio play queue */
1200 dev.DAPQ = dev.base + DAPQ_OFFSET;
1201 msnd_init_queue(dev.DAPQ, DAPQ_DATA_BUFF, DAPQ_BUFF_SIZE);
1202
1203 /* Digital audio record queue */
1204 dev.DARQ = dev.base + DARQ_OFFSET;
1205 msnd_init_queue(dev.DARQ, DARQ_DATA_BUFF, DARQ_BUFF_SIZE);
1206
1207 /* MIDI out queue */
1208 dev.MODQ = dev.base + MODQ_OFFSET;
1209 msnd_init_queue(dev.MODQ, MODQ_DATA_BUFF, MODQ_BUFF_SIZE);
1210
1211 /* MIDI in queue */
1212 dev.MIDQ = dev.base + MIDQ_OFFSET;
1213 msnd_init_queue(dev.MIDQ, MIDQ_DATA_BUFF, MIDQ_BUFF_SIZE);
1214
1215 /* DSP -> host message queue */
1216 dev.DSPQ = dev.base + DSPQ_OFFSET;
1217 msnd_init_queue(dev.DSPQ, DSPQ_DATA_BUFF, DSPQ_BUFF_SIZE);
1218
1219 /* Setup some DSP values */
1220 #ifndef MSND_CLASSIC
1221 isa_writew(1, dev.SMA + SMA_wCurrPlayFormat);
1222 isa_writew(dev.play_sample_size, dev.SMA + SMA_wCurrPlaySampleSize);
1223 isa_writew(dev.play_channels, dev.SMA + SMA_wCurrPlayChannels);
1224 isa_writew(dev.play_sample_rate, dev.SMA + SMA_wCurrPlaySampleRate);
1225 #endif
1226 isa_writew(dev.play_sample_rate, dev.SMA + SMA_wCalFreqAtoD);
1227 isa_writew(mastVolLeft, dev.SMA + SMA_wCurrMastVolLeft);
1228 isa_writew(mastVolRight, dev.SMA + SMA_wCurrMastVolRight);
1229 #ifndef MSND_CLASSIC
1230 isa_writel(0x00010000, dev.SMA + SMA_dwCurrPlayPitch);
1231 isa_writel(0x00000001, dev.SMA + SMA_dwCurrPlayRate);
1232 #endif
1233 isa_writew(0x303, dev.SMA + SMA_wCurrInputTagBits);
1234
1235 initted = 1;
1236
1237 return 0;
1238 }
1239
1240 static int __init calibrate_adc(WORD srate)
1241 {
1242 isa_writew(srate, dev.SMA + SMA_wCalFreqAtoD);
1243 if (dev.calibrate_signal == 0)
1244 isa_writew(isa_readw(dev.SMA + SMA_wCurrHostStatusFlags)
1245 | 0x0001, dev.SMA + SMA_wCurrHostStatusFlags);
1246 else
1247 isa_writew(isa_readw(dev.SMA + SMA_wCurrHostStatusFlags)
1248 & ~0x0001, dev.SMA + SMA_wCurrHostStatusFlags);
1249 if (msnd_send_word(&dev, 0, 0, HDEXAR_CAL_A_TO_D) == 0 &&
1250 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ) == 0) {
1251 current->state = TASK_INTERRUPTIBLE;
1252 schedule_timeout(HZ / 3);
1253 return 0;
1254 }
1255 printk(KERN_WARNING LOGNAME ": ADC calibration failed\n");
1256
1257 return -EIO;
1258 }
1259
1260 static int upload_dsp_code(void)
1261 {
1262 outb(HPBLKSEL_0, dev.io + HP_BLKS);
1263 #ifndef HAVE_DSPCODEH
1264 INITCODESIZE = mod_firmware_load(INITCODEFILE, &INITCODE);
1265 if (!INITCODE) {
1266 printk(KERN_ERR LOGNAME ": Error loading " INITCODEFILE);
1267 return -EBUSY;
1268 }
1269
1270 PERMCODESIZE = mod_firmware_load(PERMCODEFILE, &PERMCODE);
1271 if (!PERMCODE) {
1272 printk(KERN_ERR LOGNAME ": Error loading " PERMCODEFILE);
1273 vfree(INITCODE);
1274 return -EBUSY;
1275 }
1276 #endif
1277 isa_memcpy_toio(dev.base, PERMCODE, PERMCODESIZE);
1278 if (msnd_upload_host(&dev, INITCODE, INITCODESIZE) < 0) {
1279 printk(KERN_WARNING LOGNAME ": Error uploading to DSP\n");
1280 return -ENODEV;
1281 }
1282 #ifdef HAVE_DSPCODEH
1283 printk(KERN_INFO LOGNAME ": DSP firmware uploaded (resident)\n");
1284 #else
1285 printk(KERN_INFO LOGNAME ": DSP firmware uploaded\n");
1286 #endif
1287
1288 #ifndef HAVE_DSPCODEH
1289 vfree(INITCODE);
1290 vfree(PERMCODE);
1291 #endif
1292
1293 return 0;
1294 }
1295
1296 #ifdef MSND_CLASSIC
1297 static void reset_proteus(void)
1298 {
1299 outb(HPPRORESET_ON, dev.io + HP_PROR);
1300 mdelay(TIME_PRO_RESET);
1301 outb(HPPRORESET_OFF, dev.io + HP_PROR);
1302 mdelay(TIME_PRO_RESET_DONE);
1303 }
1304 #endif
1305
1306 static int initialize(void)
1307 {
1308 int err, timeout;
1309
1310 #ifdef MSND_CLASSIC
1311 outb(HPWAITSTATE_0, dev.io + HP_WAIT);
1312 outb(HPBITMODE_16, dev.io + HP_BITM);
1313
1314 reset_proteus();
1315 #endif
1316 if ((err = init_sma()) < 0) {
1317 printk(KERN_WARNING LOGNAME ": Cannot initialize SMA\n");
1318 return err;
1319 }
1320
1321 if ((err = reset_dsp()) < 0)
1322 return err;
1323
1324 if ((err = upload_dsp_code()) < 0) {
1325 printk(KERN_WARNING LOGNAME ": Cannot upload DSP code\n");
1326 return err;
1327 }
1328
1329 timeout = 200;
1330 while (isa_readw(dev.base)) {
1331 mdelay(1);
1332 if (!timeout--) {
1333 printk(KERN_DEBUG LOGNAME ": DSP reset timeout\n");
1334 return -EIO;
1335 }
1336 }
1337
1338 mixer_setup();
1339
1340 return 0;
1341 }
1342
1343 static int dsp_full_reset(void)
1344 {
1345 int rv;
1346
1347 if (test_bit(F_RESETTING, &dev.flags) || ++dev.nresets > 10)
1348 return 0;
1349
1350 set_bit(F_RESETTING, &dev.flags);
1351 printk(KERN_INFO LOGNAME ": DSP reset\n");
1352 dsp_halt(NULL); /* Unconditionally halt */
1353 if ((rv = initialize()))
1354 printk(KERN_WARNING LOGNAME ": DSP reset failed\n");
1355 force_recsrc(dev.recsrc);
1356 dsp_open(NULL);
1357 clear_bit(F_RESETTING, &dev.flags);
1358
1359 return rv;
1360 }
1361
1362 static int __init attach_multisound(void)
1363 {
1364 int err;
1365
1366 if ((err = request_irq(dev.irq, intr, 0, dev.name, &dev)) < 0) {
1367 printk(KERN_ERR LOGNAME ": Couldn't grab IRQ %d\n", dev.irq);
1368 return err;
1369 }
1370 request_region(dev.io, dev.numio, dev.name);
1371
1372 if ((err = dsp_full_reset()) < 0) {
1373 release_region(dev.io, dev.numio);
1374 free_irq(dev.irq, &dev);
1375 return err;
1376 }
1377
1378 if ((err = msnd_register(&dev)) < 0) {
1379 printk(KERN_ERR LOGNAME ": Unable to register MultiSound\n");
1380 release_region(dev.io, dev.numio);
1381 free_irq(dev.irq, &dev);
1382 return err;
1383 }
1384
1385 if ((dev.dsp_minor = register_sound_dsp(&dev_fileops, -1)) < 0) {
1386 printk(KERN_ERR LOGNAME ": Unable to register DSP operations\n");
1387 msnd_unregister(&dev);
1388 release_region(dev.io, dev.numio);
1389 free_irq(dev.irq, &dev);
1390 return dev.dsp_minor;
1391 }
1392
1393 if ((dev.mixer_minor = register_sound_mixer(&dev_fileops, -1)) < 0) {
1394 printk(KERN_ERR LOGNAME ": Unable to register mixer operations\n");
1395 unregister_sound_mixer(dev.mixer_minor);
1396 msnd_unregister(&dev);
1397 release_region(dev.io, dev.numio);
1398 free_irq(dev.irq, &dev);
1399 return dev.mixer_minor;
1400 }
1401
1402 dev.ext_midi_dev = dev.hdr_midi_dev = -1;
1403
1404 disable_irq(dev.irq);
1405 calibrate_adc(dev.play_sample_rate);
1406 #ifndef MSND_CLASSIC
1407 force_recsrc(SOUND_MASK_IMIX);
1408 #endif
1409
1410 return 0;
1411 }
1412
1413 static void __exit unload_multisound(void)
1414 {
1415 release_region(dev.io, dev.numio);
1416 free_irq(dev.irq, &dev);
1417 unregister_sound_mixer(dev.mixer_minor);
1418 unregister_sound_dsp(dev.dsp_minor);
1419 msnd_unregister(&dev);
1420 }
1421
1422 #ifndef MSND_CLASSIC
1423
1424 /* Pinnacle/Fiji Logical Device Configuration */
1425
1426 static int __init msnd_write_cfg(int cfg, int reg, int value)
1427 {
1428 outb(reg, cfg);
1429 outb(value, cfg + 1);
1430 if (value != inb(cfg + 1)) {
1431 printk(KERN_ERR LOGNAME ": msnd_write_cfg: I/O error\n");
1432 return -EIO;
1433 }
1434 return 0;
1435 }
1436
1437 static int __init msnd_write_cfg_io0(int cfg, int num, WORD io)
1438 {
1439 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1440 return -EIO;
1441 if (msnd_write_cfg(cfg, IREG_IO0_BASEHI, HIBYTE(io)))
1442 return -EIO;
1443 if (msnd_write_cfg(cfg, IREG_IO0_BASELO, LOBYTE(io)))
1444 return -EIO;
1445 return 0;
1446 }
1447
1448 static int __init msnd_write_cfg_io1(int cfg, int num, WORD io)
1449 {
1450 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1451 return -EIO;
1452 if (msnd_write_cfg(cfg, IREG_IO1_BASEHI, HIBYTE(io)))
1453 return -EIO;
1454 if (msnd_write_cfg(cfg, IREG_IO1_BASELO, LOBYTE(io)))
1455 return -EIO;
1456 return 0;
1457 }
1458
1459 static int __init msnd_write_cfg_irq(int cfg, int num, WORD irq)
1460 {
1461 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1462 return -EIO;
1463 if (msnd_write_cfg(cfg, IREG_IRQ_NUMBER, LOBYTE(irq)))
1464 return -EIO;
1465 if (msnd_write_cfg(cfg, IREG_IRQ_TYPE, IRQTYPE_EDGE))
1466 return -EIO;
1467 return 0;
1468 }
1469
1470 static int __init msnd_write_cfg_mem(int cfg, int num, int mem)
1471 {
1472 WORD wmem;
1473
1474 mem >>= 8;
1475 mem &= 0xfff;
1476 wmem = (WORD)mem;
1477 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1478 return -EIO;
1479 if (msnd_write_cfg(cfg, IREG_MEMBASEHI, HIBYTE(wmem)))
1480 return -EIO;
1481 if (msnd_write_cfg(cfg, IREG_MEMBASELO, LOBYTE(wmem)))
1482 return -EIO;
1483 if (wmem && msnd_write_cfg(cfg, IREG_MEMCONTROL, (MEMTYPE_HIADDR | MEMTYPE_16BIT)))
1484 return -EIO;
1485 return 0;
1486 }
1487
1488 static int __init msnd_activate_logical(int cfg, int num)
1489 {
1490 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1491 return -EIO;
1492 if (msnd_write_cfg(cfg, IREG_ACTIVATE, LD_ACTIVATE))
1493 return -EIO;
1494 return 0;
1495 }
1496
1497 static int __init msnd_write_cfg_logical(int cfg, int num, WORD io0, WORD io1, WORD irq, int mem)
1498 {
1499 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1500 return -EIO;
1501 if (msnd_write_cfg_io0(cfg, num, io0))
1502 return -EIO;
1503 if (msnd_write_cfg_io1(cfg, num, io1))
1504 return -EIO;
1505 if (msnd_write_cfg_irq(cfg, num, irq))
1506 return -EIO;
1507 if (msnd_write_cfg_mem(cfg, num, mem))
1508 return -EIO;
1509 if (msnd_activate_logical(cfg, num))
1510 return -EIO;
1511 return 0;
1512 }
1513
1514 typedef struct msnd_pinnacle_cfg_device {
1515 WORD io0, io1, irq;
1516 int mem;
1517 } msnd_pinnacle_cfg_t[4];
1518
1519 static int __init msnd_pinnacle_cfg_devices(int cfg, int reset, msnd_pinnacle_cfg_t device)
1520 {
1521 int i;
1522
1523 /* Reset devices if told to */
1524 if (reset) {
1525 printk(KERN_INFO LOGNAME ": Resetting all devices\n");
1526 for (i = 0; i < 4; ++i)
1527 if (msnd_write_cfg_logical(cfg, i, 0, 0, 0, 0))
1528 return -EIO;
1529 }
1530
1531 /* Configure specified devices */
1532 for (i = 0; i < 4; ++i) {
1533
1534 switch (i) {
1535 case 0: /* DSP */
1536 if (!(device[i].io0 && device[i].irq && device[i].mem))
1537 continue;
1538 break;
1539 case 1: /* MPU */
1540 if (!(device[i].io0 && device[i].irq))
1541 continue;
1542 printk(KERN_INFO LOGNAME
1543 ": Configuring MPU to I/O 0x%x IRQ %d\n",
1544 device[i].io0, device[i].irq);
1545 break;
1546 case 2: /* IDE */
1547 if (!(device[i].io0 && device[i].io1 && device[i].irq))
1548 continue;
1549 printk(KERN_INFO LOGNAME
1550 ": Configuring IDE to I/O 0x%x, 0x%x IRQ %d\n",
1551 device[i].io0, device[i].io1, device[i].irq);
1552 break;
1553 case 3: /* Joystick */
1554 if (!(device[i].io0))
1555 continue;
1556 printk(KERN_INFO LOGNAME
1557 ": Configuring joystick to I/O 0x%x\n",
1558 device[i].io0);
1559 break;
1560 }
1561
1562 /* Configure the device */
1563 if (msnd_write_cfg_logical(cfg, i, device[i].io0, device[i].io1, device[i].irq, device[i].mem))
1564 return -EIO;
1565 }
1566
1567 return 0;
1568 }
1569 #endif
1570
1571 #ifdef MODULE
1572 MODULE_AUTHOR ("Andrew Veliath <andrewtv@usa.net>");
1573 MODULE_DESCRIPTION ("Turtle Beach " LONGNAME " Linux Driver");
1574 MODULE_PARM (io, "i");
1575 MODULE_PARM (irq, "i");
1576 MODULE_PARM (mem, "i");
1577 MODULE_PARM (write_ndelay, "i");
1578 MODULE_PARM (fifosize, "i");
1579 MODULE_PARM (calibrate_signal, "i");
1580 #ifndef MSND_CLASSIC
1581 MODULE_PARM (digital, "i");
1582 MODULE_PARM (cfg, "i");
1583 MODULE_PARM (reset, "i");
1584 MODULE_PARM (mpu_io, "i");
1585 MODULE_PARM (mpu_irq, "i");
1586 MODULE_PARM (ide_io0, "i");
1587 MODULE_PARM (ide_io1, "i");
1588 MODULE_PARM (ide_irq, "i");
1589 MODULE_PARM (joystick_io, "i");
1590 #endif
1591
1592 static int io __initdata = -1;
1593 static int irq __initdata = -1;
1594 static int mem __initdata = -1;
1595 static int write_ndelay __initdata = -1;
1596
1597 #ifndef MSND_CLASSIC
1598 /* Pinnacle/Fiji non-PnP Config Port */
1599 static int cfg __initdata = -1;
1600
1601 /* Extra Peripheral Configuration */
1602 static int reset __initdata = 0;
1603 static int mpu_io __initdata = 0;
1604 static int mpu_irq __initdata = 0;
1605 static int ide_io0 __initdata = 0;
1606 static int ide_io1 __initdata = 0;
1607 static int ide_irq __initdata = 0;
1608 static int joystick_io __initdata = 0;
1609
1610 /* If we have the digital daugherboard... */
1611 static int digital __initdata = 0;
1612 #endif
1613
1614 static int fifosize __initdata = DEFFIFOSIZE;
1615 static int calibrate_signal __initdata = 0;
1616
1617 #else /* not a module */
1618
1619 static int write_ndelay __initdata = -1;
1620
1621 #ifdef MSND_CLASSIC
1622 static int io __initdata = CONFIG_MSNDCLAS_IO;
1623 static int irq __initdata = CONFIG_MSNDCLAS_IRQ;
1624 static int mem __initdata = CONFIG_MSNDCLAS_MEM;
1625 #else /* Pinnacle/Fiji */
1626
1627 static int io __initdata = CONFIG_MSNDPIN_IO;
1628 static int irq __initdata = CONFIG_MSNDPIN_IRQ;
1629 static int mem __initdata = CONFIG_MSNDPIN_MEM;
1630
1631 /* Pinnacle/Fiji non-PnP Config Port */
1632 #ifdef CONFIG_MSNDPIN_NONPNP
1633 # ifndef CONFIG_MSNDPIN_CFG
1634 # define CONFIG_MSNDPIN_CFG 0x250
1635 # endif
1636 #else
1637 # ifdef CONFIG_MSNDPIN_CFG
1638 # undef CONFIG_MSNDPIN_CFG
1639 # endif
1640 # define CONFIG_MSNDPIN_CFG -1
1641 #endif
1642 static int cfg __initdata = CONFIG_MSNDPIN_CFG;
1643 /* If not a module, we don't need to bother with reset=1 */
1644 static int reset;
1645
1646 /* Extra Peripheral Configuration (Default: Disable) */
1647 #ifndef CONFIG_MSNDPIN_MPU_IO
1648 # define CONFIG_MSNDPIN_MPU_IO 0
1649 #endif
1650 static int mpu_io __initdata = CONFIG_MSNDPIN_MPU_IO;
1651
1652 #ifndef CONFIG_MSNDPIN_MPU_IRQ
1653 # define CONFIG_MSNDPIN_MPU_IRQ 0
1654 #endif
1655 static int mpu_irq __initdata = CONFIG_MSNDPIN_MPU_IRQ;
1656
1657 #ifndef CONFIG_MSNDPIN_IDE_IO0
1658 # define CONFIG_MSNDPIN_IDE_IO0 0
1659 #endif
1660 static int ide_io0 __initdata = CONFIG_MSNDPIN_IDE_IO0;
1661
1662 #ifndef CONFIG_MSNDPIN_IDE_IO1
1663 # define CONFIG_MSNDPIN_IDE_IO1 0
1664 #endif
1665 static int ide_io1 __initdata = CONFIG_MSNDPIN_IDE_IO1;
1666
1667 #ifndef CONFIG_MSNDPIN_IDE_IRQ
1668 # define CONFIG_MSNDPIN_IDE_IRQ 0
1669 #endif
1670 static int ide_irq __initdata = CONFIG_MSNDPIN_IDE_IRQ;
1671
1672 #ifndef CONFIG_MSNDPIN_JOYSTICK_IO
1673 # define CONFIG_MSNDPIN_JOYSTICK_IO 0
1674 #endif
1675 static int joystick_io __initdata = CONFIG_MSNDPIN_JOYSTICK_IO;
1676
1677 /* Have SPDIF (Digital) Daughterboard */
1678 #ifndef CONFIG_MSNDPIN_DIGITAL
1679 # define CONFIG_MSNDPIN_DIGITAL 0
1680 #endif
1681 static int digital __initdata = CONFIG_MSNDPIN_DIGITAL;
1682
1683 #endif /* MSND_CLASSIC */
1684
1685 #ifndef CONFIG_MSND_FIFOSIZE
1686 # define CONFIG_MSND_FIFOSIZE DEFFIFOSIZE
1687 #endif
1688 static int fifosize __initdata = CONFIG_MSND_FIFOSIZE;
1689
1690 #ifndef CONFIG_MSND_CALSIGNAL
1691 # define CONFIG_MSND_CALSIGNAL 0
1692 #endif
1693 static int
1694 calibrate_signal __initdata = CONFIG_MSND_CALSIGNAL;
1695 #endif /* MODULE */
1696
1697
1698 static int __init msnd_init(void)
1699 {
1700 int err;
1701 #ifndef MSND_CLASSIC
1702 static msnd_pinnacle_cfg_t pinnacle_devs;
1703 #endif /* MSND_CLASSIC */
1704
1705 printk(KERN_INFO LOGNAME ": Turtle Beach " LONGNAME " Linux Driver Version "
1706 VERSION ", Copyright (C) 1998 Andrew Veliath\n");
1707
1708 if (io == -1 || irq == -1 || mem == -1)
1709 printk(KERN_WARNING LOGNAME ": io, irq and mem must be set\n");
1710
1711 #ifdef MSND_CLASSIC
1712 if (io == -1 ||
1713 !(io == 0x290 ||
1714 io == 0x260 ||
1715 io == 0x250 ||
1716 io == 0x240 ||
1717 io == 0x230 ||
1718 io == 0x220 ||
1719 io == 0x210 ||
1720 io == 0x3e0)) {
1721 printk(KERN_ERR LOGNAME ": \"io\" - DSP I/O base must be set to 0x210, 0x220, 0x230, 0x240, 0x250, 0x260, 0x290, or 0x3E0\n");
1722 return -EINVAL;
1723 }
1724 #else
1725 if (io == -1 ||
1726 io < 0x100 ||
1727 io > 0x3e0 ||
1728 (io % 0x10) != 0) {
1729 printk(KERN_ERR LOGNAME ": \"io\" - DSP I/O base must within the range 0x100 to 0x3E0 and must be evenly divisible by 0x10\n");
1730 return -EINVAL;
1731 }
1732 #endif /* MSND_CLASSIC */
1733
1734 if (irq == -1 ||
1735 !(irq == 5 ||
1736 irq == 7 ||
1737 irq == 9 ||
1738 irq == 10 ||
1739 irq == 11 ||
1740 irq == 12)) {
1741 printk(KERN_ERR LOGNAME ": \"irq\" - must be set to 5, 7, 9, 10, 11 or 12\n");
1742 return -EINVAL;
1743 }
1744
1745 if (mem == -1 ||
1746 !(mem == 0xb0000 ||
1747 mem == 0xc8000 ||
1748 mem == 0xd0000 ||
1749 mem == 0xd8000 ||
1750 mem == 0xe0000 ||
1751 mem == 0xe8000)) {
1752 printk(KERN_ERR LOGNAME ": \"mem\" - must be set to "
1753 "0xb0000, 0xc8000, 0xd0000, 0xd8000, 0xe0000 or 0xe8000\n");
1754 return -EINVAL;
1755 }
1756
1757 #ifdef MSND_CLASSIC
1758 switch (irq) {
1759 case 5: dev.irqid = HPIRQ_5; break;
1760 case 7: dev.irqid = HPIRQ_7; break;
1761 case 9: dev.irqid = HPIRQ_9; break;
1762 case 10: dev.irqid = HPIRQ_10; break;
1763 case 11: dev.irqid = HPIRQ_11; break;
1764 case 12: dev.irqid = HPIRQ_12; break;
1765 }
1766
1767 switch (mem) {
1768 case 0xb0000: dev.memid = HPMEM_B000; break;
1769 case 0xc8000: dev.memid = HPMEM_C800; break;
1770 case 0xd0000: dev.memid = HPMEM_D000; break;
1771 case 0xd8000: dev.memid = HPMEM_D800; break;
1772 case 0xe0000: dev.memid = HPMEM_E000; break;
1773 case 0xe8000: dev.memid = HPMEM_E800; break;
1774 }
1775 #else
1776 if (cfg == -1) {
1777 printk(KERN_INFO LOGNAME ": Assuming PnP mode\n");
1778 } else if (cfg != 0x250 && cfg != 0x260 && cfg != 0x270) {
1779 printk(KERN_INFO LOGNAME ": Config port must be 0x250, 0x260 or 0x270 (or unspecified for PnP mode)\n");
1780 return -EINVAL;
1781 } else {
1782 printk(KERN_INFO LOGNAME ": Non-PnP mode: configuring at port 0x%x\n", cfg);
1783
1784 /* DSP */
1785 pinnacle_devs[0].io0 = io;
1786 pinnacle_devs[0].irq = irq;
1787 pinnacle_devs[0].mem = mem;
1788
1789 /* The following are Pinnacle specific */
1790
1791 /* MPU */
1792 pinnacle_devs[1].io0 = mpu_io;
1793 pinnacle_devs[1].irq = mpu_irq;
1794
1795 /* IDE */
1796 pinnacle_devs[2].io0 = ide_io0;
1797 pinnacle_devs[2].io1 = ide_io1;
1798 pinnacle_devs[2].irq = ide_irq;
1799
1800 /* Joystick */
1801 pinnacle_devs[3].io0 = joystick_io;
1802
1803 if (check_region(cfg, 2)) {
1804 printk(KERN_ERR LOGNAME ": Config port 0x%x conflict\n", cfg);
1805 return -EIO;
1806 }
1807
1808 request_region(cfg, 2, "Pinnacle/Fiji Config");
1809 if (msnd_pinnacle_cfg_devices(cfg, reset, pinnacle_devs)) {
1810 printk(KERN_ERR LOGNAME ": Device configuration error\n");
1811 release_region(cfg, 2);
1812 return -EIO;
1813 }
1814 release_region(cfg, 2);
1815 }
1816 #endif /* MSND_CLASSIC */
1817
1818 if (fifosize < 16)
1819 fifosize = 16;
1820
1821 if (fifosize > 1024)
1822 fifosize = 1024;
1823
1824 set_default_audio_parameters();
1825 #ifdef MSND_CLASSIC
1826 dev.type = msndClassic;
1827 #else
1828 dev.type = msndPinnacle;
1829 #endif
1830 dev.io = io;
1831 dev.numio = DSP_NUMIO;
1832 dev.irq = irq;
1833 dev.base = mem;
1834 dev.fifosize = fifosize * 1024;
1835 dev.calibrate_signal = calibrate_signal ? 1 : 0;
1836 dev.recsrc = 0;
1837 dev.dspq_data_buff = DSPQ_DATA_BUFF;
1838 dev.dspq_buff_size = DSPQ_BUFF_SIZE;
1839 if (write_ndelay == -1)
1840 write_ndelay = CONFIG_MSND_WRITE_NDELAY;
1841 if (write_ndelay)
1842 clear_bit(F_DISABLE_WRITE_NDELAY, &dev.flags);
1843 else
1844 set_bit(F_DISABLE_WRITE_NDELAY, &dev.flags);
1845 #ifndef MSND_CLASSIC
1846 if (digital)
1847 set_bit(F_HAVEDIGITAL, &dev.flags);
1848 #endif
1849 init_waitqueue_head(&dev.writeblock);
1850 init_waitqueue_head(&dev.readblock);
1851 init_waitqueue_head(&dev.writeflush);
1852 msnd_fifo_init(&dev.DAPF);
1853 msnd_fifo_init(&dev.DARF);
1854 spin_lock_init(&dev.lock);
1855 printk(KERN_INFO LOGNAME ": %u byte audio FIFOs (x2)\n", dev.fifosize);
1856 if ((err = msnd_fifo_alloc(&dev.DAPF, dev.fifosize)) < 0) {
1857 printk(KERN_ERR LOGNAME ": Couldn't allocate write FIFO\n");
1858 return err;
1859 }
1860
1861 if ((err = msnd_fifo_alloc(&dev.DARF, dev.fifosize)) < 0) {
1862 printk(KERN_ERR LOGNAME ": Couldn't allocate read FIFO\n");
1863 msnd_fifo_free(&dev.DAPF);
1864 return err;
1865 }
1866
1867 if ((err = probe_multisound()) < 0) {
1868 printk(KERN_ERR LOGNAME ": Probe failed\n");
1869 msnd_fifo_free(&dev.DAPF);
1870 msnd_fifo_free(&dev.DARF);
1871 return err;
1872 }
1873
1874 if ((err = attach_multisound()) < 0) {
1875 printk(KERN_ERR LOGNAME ": Attach failed\n");
1876 msnd_fifo_free(&dev.DAPF);
1877 msnd_fifo_free(&dev.DARF);
1878 return err;
1879 }
1880
1881 return 0;
1882 }
1883
1884 static void __exit msdn_cleanup(void)
1885 {
1886 unload_multisound();
1887 msnd_fifo_free(&dev.DAPF);
1888 msnd_fifo_free(&dev.DARF);
1889 }
1890
1891 module_init(msnd_init);
1892 module_exit(msdn_cleanup);
1893