File: /usr/src/linux/drivers/sound/trident.c
1 /*
2 * OSS driver for Linux 2.4.x for
3 *
4 * Trident 4D-Wave
5 * SiS 7018
6 * ALi 5451
7 * Tvia/IGST CyberPro 5050
8 *
9 * Driver: Alan Cox <alan@redhat.com>
10 *
11 * Built from:
12 * Low level code: <audio@tridentmicro.com> from ALSA
13 * Framework: Thomas Sailer <sailer@ife.ee.ethz.ch>
14 * Extended by: Zach Brown <zab@redhat.com>
15 *
16 * Hacked up by:
17 * Aaron Holtzman <aholtzma@ess.engr.uvic.ca>
18 * Ollie Lho <ollie@sis.com.tw> SiS 7018 Audio Core Support
19 * Ching-Ling Lee <cling-li@ali.com.tw> ALi 5451 Audio Core Support
20 * Matt Wu <mattwu@acersoftech.com.cn> ALi 5451 Audio Core Support
21 * Peter Wächtler <pwaechtler@loewe-komp.de> CyberPro5050 support
22 *
23 *
24 * This program is free software; you can redistribute it and/or modify
25 * it under the terms of the GNU General Public License as published by
26 * the Free Software Foundation; either version 2 of the License, or
27 * (at your option) any later version.
28 *
29 * This program is distributed in the hope that it will be useful,
30 * but WITHOUT ANY WARRANTY; without even the implied warranty of
31 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
32 * GNU General Public License for more details.
33 *
34 * You should have received a copy of the GNU General Public License
35 * along with this program; if not, write to the Free Software
36 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
37 *
38 * History
39 * v0.14.9c
40 * August 10 2001 Peter Wächtler <pwaechtler@loewe-komp.de>
41 * added support for Tvia (formerly Integraphics/IGST) CyberPro5050
42 * this chip is often found in settop boxes (combined video+audio)
43 * v0.14.9b
44 * Switch to static inline not extern inline (gcc 3)
45 * v0.14.9a
46 * Aug 6 2001 Alan Cox
47 * 0.14.9 crashed on rmmod due to a timer/bh left running. Simplified
48 * the existing logic (the BH doesnt help as ac97 is lock_irqsave)
49 * and used del_timer_sync to clean up
50 * Fixed a problem where the ALi change broke my generic card
51 * v0.14.9
52 * Jul 10 2001 Matt Wu
53 * Add H/W Volume Control
54 * v0.14.8a
55 * July 7 2001 Alan Cox
56 * Moved Matt Wu's ac97 register cache into the card structure
57 * v0.14.8
58 * Apr 30 2001 Matt Wu
59 * Set EBUF1 and EBUF2 to still mode
60 * Add dc97/ac97 reset function
61 * Fix power management: ali_restore_regs
62 * unreleased
63 * Mar 09 2001 Matt Wu
64 * Add cache for ac97 access
65 * v0.14.7
66 * Feb 06 2001 Matt Wu
67 * Fix ac97 initialization
68 * Fix bug: an extra tail will be played when playing
69 * Jan 05 2001 Matt Wu
70 * Implement multi-channels and S/PDIF in support for ALi 1535+
71 * v0.14.6
72 * Nov 1 2000 Ching-Ling Lee
73 * Fix the bug of memory leak when switching 5.1-channels to 2 channels.
74 * Add lock protection into dynamic changing format of data.
75 * Oct 18 2000 Ching-Ling Lee
76 * 5.1-channels support for ALi
77 * June 28 2000 Ching-Ling Lee
78 * S/PDIF out/in(playback/record) support for ALi 1535+, using /proc to be selected by user
79 * Simple Power Management support for ALi
80 * v0.14.5 May 23 2000 Ollie Lho
81 * Misc bug fix from the Net
82 * v0.14.4 May 20 2000 Aaron Holtzman
83 * Fix kfree'd memory access in release
84 * Fix race in open while looking for a free virtual channel slot
85 * remove open_wait wq (which appears to be unused)
86 * v0.14.3 May 10 2000 Ollie Lho
87 * fixed a small bug in trident_update_ptr, xmms 1.0.1 no longer uses 100% CPU
88 * v0.14.2 Mar 29 2000 Ching-Ling Lee
89 * Add clear to silence advance in trident_update_ptr
90 * fix invalid data of the end of the sound
91 * v0.14.1 Mar 24 2000 Ching-Ling Lee
92 * ALi 5451 support added, playback and recording O.K.
93 * ALi 5451 originally developed and structured based on sonicvibes, and
94 * suggested to merge into this file by Alan Cox.
95 * v0.14 Mar 15 2000 Ollie Lho
96 * 5.1 channel output support with channel binding. What's the Matrix ?
97 * v0.13.1 Mar 10 2000 Ollie Lho
98 * few minor bugs on dual codec support, needs more testing
99 * v0.13 Mar 03 2000 Ollie Lho
100 * new pci_* for 2.4 kernel, back ported to 2.2
101 * v0.12 Feb 23 2000 Ollie Lho
102 * Preliminary Recording support
103 * v0.11.2 Feb 19 2000 Ollie Lho
104 * removed incomplete full-dulplex support
105 * v0.11.1 Jan 28 2000 Ollie Lho
106 * small bug in setting sample rate for 4d-nx (reported by Aaron)
107 * v0.11 Jan 27 2000 Ollie Lho
108 * DMA bug, scheduler latency, second try
109 * v0.10 Jan 24 2000 Ollie Lho
110 * DMA bug fixed, found kernel scheduling problem
111 * v0.09 Jan 20 2000 Ollie Lho
112 * Clean up of channel register access routine (prepare for channel binding)
113 * v0.08 Jan 14 2000 Ollie Lho
114 * Isolation of AC97 codec code
115 * v0.07 Jan 13 2000 Ollie Lho
116 * Get rid of ugly old low level access routines (e.g. CHRegs.lp****)
117 * v0.06 Jan 11 2000 Ollie Lho
118 * Preliminary support for dual (more ?) AC97 codecs
119 * v0.05 Jan 08 2000 Luca Montecchiani <m.luca@iname.com>
120 * adapt to 2.3.x new __setup/__init call
121 * v0.04 Dec 31 1999 Ollie Lho
122 * Multiple Open, using Middle Loop Interrupt to smooth playback
123 * v0.03 Dec 24 1999 Ollie Lho
124 * mem leak in prog_dmabuf and dealloc_dmabuf removed
125 * v0.02 Dec 15 1999 Ollie Lho
126 * SiS 7018 support added, playback O.K.
127 * v0.01 Alan Cox et. al.
128 * Initial Release in kernel 2.3.30, does not work
129 *
130 * ToDo
131 * Clean up of low level channel register access code. (done)
132 * Fix the bug on dma buffer management in update_ptr, read/write, drain_dac (done)
133 * Dual AC97 codecs support (done)
134 * Recording support (done)
135 * Mmap support
136 * "Channel Binding" ioctl extension (done)
137 * new pci device driver interface for 2.4 kernel (done)
138 *
139 * Lock order (high->low)
140 * lock - hardware lock
141 * open_sem - guard opens
142 * sem - guard dmabuf, write re-entry etc
143 */
144
145 #include <linux/config.h>
146 #include <linux/module.h>
147 #include <linux/version.h>
148 #include <linux/string.h>
149 #include <linux/ctype.h>
150 #include <linux/ioport.h>
151 #include <linux/sched.h>
152 #include <linux/delay.h>
153 #include <linux/sound.h>
154 #include <linux/slab.h>
155 #include <linux/soundcard.h>
156 #include <linux/pci.h>
157 #include <asm/io.h>
158 #include <asm/dma.h>
159 #include <linux/init.h>
160 #include <linux/poll.h>
161 #include <linux/spinlock.h>
162 #include <linux/smp_lock.h>
163 #include <linux/ac97_codec.h>
164 #include <linux/wrapper.h>
165 #include <asm/uaccess.h>
166 #include <asm/hardirq.h>
167 #include <linux/bitops.h>
168 #include <linux/proc_fs.h>
169 #include <linux/interrupt.h>
170
171 #if defined CONFIG_ALPHA_NAUTILUS || CONFIG_ALPHA_GENERIC
172 #include <asm/hwrpb.h>
173 #endif
174
175 #include "trident.h"
176
177 #include <linux/pm.h>
178
179 #define DRIVER_VERSION "0.14.9c"
180
181 /* magic numbers to protect our data structures */
182 #define TRIDENT_CARD_MAGIC 0x5072696E /* "Prin" */
183 #define TRIDENT_STATE_MAGIC 0x63657373 /* "cess" */
184
185 #define TRIDENT_DMA_MASK 0x3fffffff /* DMA buffer mask for pci_alloc_consist */
186
187 #define NR_HW_CH 32
188
189 /* maxinum nuber of AC97 codecs connected, AC97 2.0 defined 4, but 7018 and 4D-NX only
190 have 2 SDATA_IN lines (currently) */
191 #define NR_AC97 2
192
193 /* minor number of /dev/swmodem (temporary, experimental) */
194 #define SND_DEV_SWMODEM 7
195
196 static const unsigned ali_multi_channels_5_1[] = { /*ALI_SURR_LEFT_CHANNEL, ALI_SURR_RIGHT_CHANNEL,*/ ALI_CENTER_CHANNEL, ALI_LEF_CHANNEL, ALI_SURR_LEFT_CHANNEL, ALI_SURR_RIGHT_CHANNEL};
197
198 static const unsigned sample_size[] = { 1, 2, 2, 4 };
199 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
200
201 static const char invalid_magic[] = KERN_CRIT "trident: invalid magic value in %s\n";
202
203 enum {
204 TRIDENT_4D_DX = 0,
205 TRIDENT_4D_NX,
206 SIS_7018,
207 ALI_5451,
208 CYBER5050
209 };
210
211 static char * card_names[] = {
212 "Trident 4DWave DX",
213 "Trident 4DWave NX",
214 "SiS 7018 PCI Audio",
215 "ALi Audio Accelerator",
216 "Tvia/IGST CyberPro 5050"
217 };
218
219 static struct pci_device_id trident_pci_tbl [] __devinitdata = {
220 {PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_TRIDENT_4DWAVE_DX,
221 PCI_ANY_ID, PCI_ANY_ID, 0, 0, TRIDENT_4D_DX},
222 {PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_TRIDENT_4DWAVE_NX,
223 PCI_ANY_ID, PCI_ANY_ID, 0, 0, TRIDENT_4D_NX},
224 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7018,
225 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7018},
226 {PCI_VENDOR_ID_ALI, PCI_DEVICE_ID_ALI_5451,
227 PCI_ANY_ID, PCI_ANY_ID, 0, 0, ALI_5451},
228 { PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_5050,
229 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CYBER5050},
230 {0,}
231 };
232
233 MODULE_DEVICE_TABLE (pci, trident_pci_tbl);
234
235 /* "software" or virtual channel, an instance of opened /dev/dsp */
236 struct trident_state {
237 unsigned int magic;
238 struct trident_card *card; /* Card info */
239
240 /* file mode */
241 mode_t open_mode;
242
243 /* virtual channel number */
244 int virt;
245
246 struct dmabuf {
247 /* wave sample stuff */
248 unsigned int rate;
249 unsigned char fmt, enable;
250
251 /* hardware channel */
252 struct trident_channel *channel;
253
254 /* OSS buffer management stuff */
255 void *rawbuf;
256 dma_addr_t dma_handle;
257 unsigned buforder;
258 unsigned numfrag;
259 unsigned fragshift;
260
261 /* our buffer acts like a circular ring */
262 unsigned hwptr; /* where dma last started, updated by update_ptr */
263 unsigned swptr; /* where driver last clear/filled, updated by read/write */
264 int count; /* bytes to be comsumed or been generated by dma machine */
265 unsigned total_bytes; /* total bytes dmaed by hardware */
266
267 unsigned error; /* number of over/underruns */
268 wait_queue_head_t wait; /* put process on wait queue when no more space in buffer */
269
270 /* redundant, but makes calculations easier */
271 unsigned fragsize;
272 unsigned dmasize;
273 unsigned fragsamples;
274
275 /* OSS stuff */
276 unsigned mapped:1;
277 unsigned ready:1;
278 unsigned endcleared:1;
279 unsigned update_flag;
280 unsigned ossfragshift;
281 int ossmaxfrags;
282 unsigned subdivision;
283
284 } dmabuf;
285
286 /* 5.1channels */
287 struct trident_state *other_states[4];
288 int multi_channels_adjust_count;
289 unsigned chans_num;
290 unsigned fmt_flag:1;
291 /* Guard against mmap/write/read races */
292 struct semaphore sem;
293
294 };
295
296 /* hardware channels */
297 struct trident_channel {
298 int num; /* channel number */
299 u32 lba; /* Loop Begine Address, where dma buffer starts */
300 u32 eso; /* End Sample Offset, wehre dma buffer ends (in the unit of samples) */
301 u32 delta; /* delta value, sample rate / 48k for playback, 48k/sample rate for recording */
302 u16 attribute; /* control where PCM data go and come */
303 u16 fm_vol;
304 u32 control; /* signed/unsigned, 8/16 bits, mono/stereo */
305 };
306
307 struct trident_pcm_bank_address {
308 u32 start;
309 u32 stop;
310 u32 aint;
311 u32 aint_en;
312 };
313 static struct trident_pcm_bank_address bank_a_addrs =
314 {
315 T4D_START_A,
316 T4D_STOP_A,
317 T4D_AINT_A,
318 T4D_AINTEN_A
319 };
320 static struct trident_pcm_bank_address bank_b_addrs =
321 {
322 T4D_START_B,
323 T4D_STOP_B,
324 T4D_AINT_B,
325 T4D_AINTEN_B
326 };
327 struct trident_pcm_bank {
328 /* register addresses to control bank operations */
329 struct trident_pcm_bank_address *addresses;
330 /* each bank has 32 channels */
331 u32 bitmap; /* channel allocation bitmap */
332 struct trident_channel channels[32];
333 };
334
335 struct trident_card {
336 unsigned int magic;
337
338 /* We keep trident cards in a linked list */
339 struct trident_card *next;
340
341 /* single open lock mechanism, only used for recording */
342 struct semaphore open_sem;
343
344 /* The trident has a certain amount of cross channel interaction
345 so we use a single per card lock */
346 spinlock_t lock;
347
348 /* PCI device stuff */
349 struct pci_dev * pci_dev;
350 u16 pci_id;
351 u8 revision;
352
353 /* soundcore stuff */
354 int dev_audio;
355
356 /* structures for abstraction of hardware facilities, codecs, banks and channels*/
357 struct ac97_codec *ac97_codec[NR_AC97];
358 struct trident_pcm_bank banks[NR_BANKS];
359 struct trident_state *states[NR_HW_CH];
360
361 /* hardware resources */
362 unsigned long iobase;
363 u32 irq;
364
365 /* Function support */
366 struct trident_channel *(*alloc_pcm_channel)(struct trident_card *);
367 struct trident_channel *(*alloc_rec_pcm_channel)(struct trident_card *);
368 void (*free_pcm_channel)(struct trident_card *, unsigned int chan);
369 void (*address_interrupt)(struct trident_card *);
370
371 /* Added by Matt Wu 01-05-2001 for spdif in */
372 int multi_channel_use_count;
373 int rec_channel_use_count;
374 u16 mixer_regs[64][NR_AC97]; /* Made card local by Alan */
375 int mixer_regs_ready;
376
377 /* Added for hardware volume control */
378 int hwvolctl;
379 struct timer_list timer;
380 };
381
382 /* table to map from CHANNELMASK to channel attribute for SiS 7018 */
383 static u16 mask2attr [] =
384 {
385 PCM_LR, PCM_LR, SURR_LR, CENTER_LFE,
386 HSET, MIC, MODEM_LINE1, MODEM_LINE2,
387 I2S_LR, SPDIF_LR
388 };
389 /* table to map from channel attribute to CHANNELMASK for SiS 7018 */
390 static int attr2mask [] = {
391 DSP_BIND_MODEM1, DSP_BIND_MODEM2, DSP_BIND_FRONT, DSP_BIND_HANDSET,
392 DSP_BIND_I2S, DSP_BIND_CENTER_LFE, DSP_BIND_SURR, DSP_BIND_SPDIF
393 };
394
395 /* Added by Matt Wu 01-05-2001 for spdif in */
396 static int ali_close_multi_channels(void);
397 static void ali_delay(struct trident_card *card,int interval);
398 static void ali_detect_spdif_rate(struct trident_card *card);
399
400 static void ali_ac97_write(struct ac97_codec *codec, u8 reg, u16 val);
401 static u16 ali_ac97_read(struct ac97_codec *codec, u8 reg);
402
403 static struct trident_card *devs;
404
405 static void trident_ac97_set(struct ac97_codec *codec, u8 reg, u16 val);
406 static u16 trident_ac97_get(struct ac97_codec *codec, u8 reg);
407
408 static int trident_open_mixdev(struct inode *inode, struct file *file);
409 static int trident_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd,
410 unsigned long arg);
411
412 static void ali_ac97_set(struct trident_card *card, int secondary, u8 reg, u16 val);
413 static u16 ali_ac97_get(struct trident_card *card, int secondary, u8 reg);
414 static void ali_set_spdif_out_rate(struct trident_card *card, unsigned int rate);
415 static void ali_enable_special_channel(struct trident_state *stat);
416 static struct trident_channel *ali_alloc_rec_pcm_channel(struct trident_card *card);
417 static struct trident_channel *ali_alloc_pcm_channel(struct trident_card *card);
418 static void ali_restore_regs(struct trident_card *card);
419 static void ali_save_regs(struct trident_card *card);
420 static int trident_suspend(struct pci_dev *dev, u32 unused);
421 static int trident_resume(struct pci_dev *dev);
422 static void ali_free_pcm_channel(struct trident_card *card, unsigned int channel);
423 static int ali_setup_multi_channels(struct trident_card *card, int chan_nums);
424 static unsigned int ali_get_spdif_in_rate(struct trident_card *card);
425 static void ali_setup_spdif_in(struct trident_card *card);
426 static void ali_disable_spdif_in(struct trident_card *card);
427 static void ali_disable_special_channel(struct trident_card *card, int ch);
428 static void ali_setup_spdif_out(struct trident_card *card, int flag);
429 static int ali_write_5_1(struct trident_state *state, const char *buffer,int cnt_for_multi_channel, unsigned int *copy_count, unsigned int *state_cnt);
430 static int ali_allocate_other_states_resources(struct trident_state *state, int chan_nums);
431 static void ali_free_other_states_resources(struct trident_state *state);
432
433
434 /* save registers for ALi Power Management */
435 static struct ali_saved_registers {
436 unsigned long global_regs[ALI_GLOBAL_REGS];
437 unsigned long channel_regs[ALI_CHANNELS][ALI_CHANNEL_REGS];
438 unsigned mixer_regs[ALI_MIXER_REGS];
439 } ali_registers;
440
441 #define seek_offset(dma_ptr, buffer, cnt, offset, copy_count) (dma_ptr) += (offset); \
442 (buffer) += (offset); \
443 (cnt) -= (offset); \
444 (copy_count) += (offset);
445
446 #define lock_set_fmt(state) {spin_lock_irqsave(&state->card->lock, flags); \
447 if (state->fmt_flag) { \
448 spin_unlock_irqrestore(&state->card->lock, flags); \
449 return -EFAULT; \
450 } \
451 state->fmt_flag = 1; \
452 spin_unlock_irqrestore(&state->card->lock, flags);}
453
454 #define unlock_set_fmt(state) {spin_lock_irqsave(&state->card->lock, flags); \
455 state->fmt_flag = 0; \
456 spin_unlock_irqrestore(&state->card->lock, flags);}
457
458 static int trident_enable_loop_interrupts(struct trident_card * card)
459 {
460 u32 global_control;
461
462 global_control = inl(TRID_REG(card, T4D_LFO_GC_CIR));
463
464 switch (card->pci_id)
465 {
466 case PCI_DEVICE_ID_SI_7018:
467 global_control |= (ENDLP_IE | MIDLP_IE| BANK_B_EN);
468 break;
469 case PCI_DEVICE_ID_ALI_5451:
470 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
471 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
472 case PCI_DEVICE_ID_INTERG_5050:
473 global_control |= (ENDLP_IE | MIDLP_IE);
474 break;
475 default:
476 return FALSE;
477 }
478
479 outl(global_control, TRID_REG(card, T4D_LFO_GC_CIR));
480
481 #ifdef DEBUG
482 printk("trident: Enable Loop Interrupts, globctl = 0x%08X\n",
483 inl(TRID_REG(card, T4D_LFO_GC_CIR)));
484 #endif
485 return (TRUE);
486 }
487
488 static int trident_disable_loop_interrupts(struct trident_card * card)
489 {
490 u32 global_control;
491
492 global_control = inl(TRID_REG(card, T4D_LFO_GC_CIR));
493 global_control &= ~(ENDLP_IE | MIDLP_IE);
494 outl(global_control, TRID_REG(card, T4D_LFO_GC_CIR));
495
496 #ifdef DEBUG
497 printk("trident: Disabled Loop Interrupts, globctl = 0x%08X\n",
498 global_control);
499 #endif
500 return (TRUE);
501 }
502
503 static void trident_enable_voice_irq(struct trident_card * card, unsigned int channel)
504 {
505 unsigned int mask = 1 << (channel & 0x1f);
506 struct trident_pcm_bank *bank = &card->banks[channel >> 5];
507 u32 reg, addr = bank->addresses->aint_en;
508
509 reg = inl(TRID_REG(card, addr));
510 reg |= mask;
511 outl(reg, TRID_REG(card, addr));
512
513 #ifdef DEBUG
514 reg = inl(TRID_REG(card, addr));
515 printk("trident: enabled IRQ on channel %d, %s = 0x%08x(addr:%X)\n",
516 channel, addr==T4D_AINTEN_B? "AINTEN_B":"AINTEN_A",reg,addr);
517 #endif
518 }
519
520 static void trident_disable_voice_irq(struct trident_card * card, unsigned int channel)
521 {
522 unsigned int mask = 1 << (channel & 0x1f);
523 struct trident_pcm_bank *bank = &card->banks[channel >> 5];
524 u32 reg, addr = bank->addresses->aint_en;
525
526 reg = inl(TRID_REG(card, addr));
527 reg &= ~mask;
528 outl(reg, TRID_REG(card, addr));
529
530 /* Ack the channel in case the interrupt was set before we disable it. */
531 outl(mask, TRID_REG(card, bank->addresses->aint));
532
533 #ifdef DEBUG
534 reg = inl(TRID_REG(card, addr));
535 printk("trident: disabled IRQ on channel %d, %s = 0x%08x(addr:%X)\n",
536 channel, addr==T4D_AINTEN_B? "AINTEN_B":"AINTEN_A",reg,addr);
537 #endif
538 }
539
540 static void trident_start_voice(struct trident_card * card, unsigned int channel)
541 {
542 unsigned int mask = 1 << (channel & 0x1f);
543 struct trident_pcm_bank *bank = &card->banks[channel >> 5];
544 u32 addr = bank->addresses->start;
545
546 #ifdef DEBUG
547 u32 reg;
548 #endif
549
550 outl(mask, TRID_REG(card, addr));
551
552 #ifdef DEBUG
553 reg = inl(TRID_REG(card, addr));
554 printk("trident: start voice on channel %d, %s = 0x%08x(addr:%X)\n",
555 channel, addr==T4D_START_B? "START_B":"START_A",reg,addr);
556 #endif
557 }
558
559 static void trident_stop_voice(struct trident_card * card, unsigned int channel)
560 {
561 unsigned int mask = 1 << (channel & 0x1f);
562 struct trident_pcm_bank *bank = &card->banks[channel >> 5];
563 u32 addr = bank->addresses->stop;
564
565 #ifdef DEBUG
566 u32 reg;
567 #endif
568
569 outl(mask, TRID_REG(card, addr));
570
571 #ifdef DEBUG
572 reg = inl(TRID_REG(card, addr));
573 printk("trident: stop voice on channel %d, %s = 0x%08x(addr:%X)\n",
574 channel, addr==T4D_STOP_B? "STOP_B":"STOP_A",reg,addr);
575 #endif
576 }
577
578 static u32 trident_get_interrupt_mask (struct trident_card * card, unsigned int channel)
579 {
580 struct trident_pcm_bank *bank = &card->banks[channel];
581 u32 addr = bank->addresses->aint;
582 return inl(TRID_REG(card, addr));
583 }
584
585 static int trident_check_channel_interrupt(struct trident_card * card, unsigned int channel)
586 {
587 unsigned int mask = 1 << (channel & 0x1f);
588 u32 reg = trident_get_interrupt_mask (card, channel >> 5);
589
590 #ifdef DEBUG
591 if (reg & mask)
592 printk("trident: channel %d has interrupt, %s = 0x%08x\n",
593 channel,reg==T4D_AINT_B? "AINT_B":"AINT_A", reg);
594 #endif
595 return (reg & mask) ? TRUE : FALSE;
596 }
597
598 static void trident_ack_channel_interrupt(struct trident_card * card, unsigned int channel)
599 {
600 unsigned int mask = 1 << (channel & 0x1f);
601 struct trident_pcm_bank *bank = &card->banks[channel >> 5];
602 u32 reg, addr = bank->addresses->aint;
603
604 reg = inl(TRID_REG(card, addr));
605 reg &= mask;
606 outl(reg, TRID_REG(card, addr));
607
608 #ifdef DEBUG
609 reg = inl(TRID_REG(card, T4D_AINT_B));
610 printk("trident: Ack channel %d interrupt, AINT_B = 0x%08x\n",
611 channel, reg);
612 #endif
613 }
614
615 static struct trident_channel * trident_alloc_pcm_channel(struct trident_card *card)
616 {
617 struct trident_pcm_bank *bank;
618 int idx;
619
620 bank = &card->banks[BANK_B];
621
622 for (idx = 31; idx >= 0; idx--) {
623 if (!(bank->bitmap & (1 << idx))) {
624 struct trident_channel *channel = &bank->channels[idx];
625 bank->bitmap |= 1 << idx;
626 channel->num = idx + 32;
627 return channel;
628 }
629 }
630
631 /* no more free channels available */
632 printk(KERN_ERR "trident: no more channels available on Bank B.\n");
633 return NULL;
634 }
635
636 static void trident_free_pcm_channel(struct trident_card *card, unsigned int channel)
637 {
638 int bank;
639
640 if (channel < 31 || channel > 63)
641 return;
642
643 bank = channel >> 5;
644 channel = channel & 0x1f;
645
646 card->banks[bank].bitmap &= ~(1 << (channel));
647 }
648
649 static struct trident_channel * cyber_alloc_pcm_channel(struct trident_card *card)
650 {
651 struct trident_pcm_bank *bank;
652 int idx;
653
654 /* The cyberpro 5050 has only 32 voices and one bank */
655 /* .. at least they are not documented (if you want to call that
656 * crap documentation), perhaps broken ? */
657
658 bank = &card->banks[BANK_A];
659
660 for (idx = 31; idx >= 0; idx--) {
661 if (!(bank->bitmap & (1 << idx))) {
662 struct trident_channel *channel = &bank->channels[idx];
663 bank->bitmap |= 1 << idx;
664 channel->num = idx;
665 return channel;
666 }
667 }
668
669 /* no more free channels available */
670 printk(KERN_ERR "cyberpro5050: no more channels available on Bank A.\n");
671 return NULL;
672 }
673
674 static void cyber_free_pcm_channel(struct trident_card *card, unsigned int channel)
675 {
676 if (channel > 31)
677 return;
678 card->banks[BANK_A].bitmap &= ~(1 << (channel));
679 }
680
681 static inline void cyber_outidx(int port,int idx,int data)
682 {
683 outb(idx,port);
684 outb(data,port+1);
685 }
686
687 static inline int cyber_inidx(int port,int idx)
688 {
689 outb(idx,port);
690 return inb(port+1);
691 }
692
693 static int cyber_init_ritual(struct trident_card *card)
694 {
695 /* some black magic, taken from SDK samples */
696 /* remove this and nothing will work */
697 int portDat;
698 int ret = 0;
699 unsigned long flags;
700
701 /*
702 * Keep interrupts off for the configure - we don't want to
703 * clash with another cyberpro config event
704 */
705
706 save_flags(flags);
707 cli();
708 portDat = cyber_inidx(CYBER_PORT_AUDIO, CYBER_IDX_AUDIO_ENABLE);
709 /* enable, if it was disabled */
710 if( (portDat & CYBER_BMSK_AUENZ) != CYBER_BMSK_AUENZ_ENABLE ) {
711 printk(KERN_INFO "cyberpro5050: enabling audio controller\n" );
712 cyber_outidx( CYBER_PORT_AUDIO, CYBER_IDX_AUDIO_ENABLE,
713 portDat | CYBER_BMSK_AUENZ_ENABLE );
714 /* check again if hardware is enabled now */
715 portDat = cyber_inidx(CYBER_PORT_AUDIO, CYBER_IDX_AUDIO_ENABLE);
716 }
717 if( (portDat & CYBER_BMSK_AUENZ) != CYBER_BMSK_AUENZ_ENABLE )
718 {
719 printk(KERN_ERR "cyberpro5050: initAudioAccess: no success\n" );
720 ret = -1;
721 }
722 else
723 {
724 cyber_outidx( CYBER_PORT_AUDIO, CYBER_IDX_IRQ_ENABLE, CYBER_BMSK_AUDIO_INT_ENABLE );
725 cyber_outidx( CYBER_PORT_AUDIO, 0xbf, 0x01 );
726 cyber_outidx( CYBER_PORT_AUDIO, 0xba, 0x20 );
727 cyber_outidx( CYBER_PORT_AUDIO, 0xbb, 0x08 );
728 cyber_outidx( CYBER_PORT_AUDIO, 0xbf, 0x02 );
729 cyber_outidx( CYBER_PORT_AUDIO, 0xb3, 0x06 );
730 cyber_outidx( CYBER_PORT_AUDIO, 0xbf, 0x00 );
731 }
732 restore_flags(flags);
733 return ret;
734 }
735
736 /* called with spin lock held */
737
738 static int trident_load_channel_registers(struct trident_card *card, u32 *data, unsigned int channel)
739 {
740 int i;
741
742 if (channel > 63)
743 return FALSE;
744
745 /* select hardware channel to write */
746 outb(channel, TRID_REG(card, T4D_LFO_GC_CIR));
747
748 /* Output the channel registers, but don't write register
749 three to an ALI chip. */
750 for (i = 0; i < CHANNEL_REGS; i++) {
751 if (i == 3 && card->pci_id == PCI_DEVICE_ID_ALI_5451)
752 continue;
753 outl(data[i], TRID_REG(card, CHANNEL_START + 4*i));
754 }
755 if (card->pci_id == PCI_DEVICE_ID_ALI_5451 ||
756 card->pci_id == PCI_DEVICE_ID_INTERG_5050) {
757 outl(ALI_EMOD_Still, TRID_REG(card, ALI_EBUF1));
758 outl(ALI_EMOD_Still, TRID_REG(card, ALI_EBUF2));
759 }
760 return TRUE;
761 }
762
763 /* called with spin lock held */
764 static int trident_write_voice_regs(struct trident_state *state)
765 {
766 unsigned int data[CHANNEL_REGS + 1];
767 struct trident_channel *channel;
768
769 channel = state->dmabuf.channel;
770
771 data[1] = channel->lba;
772 data[4] = channel->control;
773
774 switch (state->card->pci_id)
775 {
776 case PCI_DEVICE_ID_ALI_5451:
777 data[0] = 0; /* Current Sample Offset */
778 data[2] = (channel->eso << 16) | (channel->delta & 0xffff);
779 data[3] = 0;
780 break;
781 case PCI_DEVICE_ID_SI_7018:
782 case PCI_DEVICE_ID_INTERG_5050:
783 data[0] = 0; /* Current Sample Offset */
784 data[2] = (channel->eso << 16) | (channel->delta & 0xffff);
785 data[3] = (channel->attribute << 16) | (channel->fm_vol & 0xffff);
786 break;
787 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
788 data[0] = 0; /* Current Sample Offset */
789 data[2] = (channel->eso << 16) | (channel->delta & 0xffff);
790 data[3] = channel->fm_vol & 0xffff;
791 break;
792 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
793 data[0] = (channel->delta << 24);
794 data[2] = ((channel->delta << 16) & 0xff000000) | (channel->eso & 0x00ffffff);
795 data[3] = channel->fm_vol & 0xffff;
796 break;
797 default:
798 return FALSE;
799 }
800
801 return trident_load_channel_registers(state->card, data, channel->num);
802 }
803
804 static int compute_rate_play(u32 rate)
805 {
806 int delta;
807 /* We special case 44100 and 8000 since rounding with the equation
808 does not give us an accurate enough value. For 11025 and 22050
809 the equation gives us the best answer. All other frequencies will
810 also use the equation. JDW */
811 if (rate == 44100)
812 delta = 0xeb3;
813 else if (rate == 8000)
814 delta = 0x2ab;
815 else if (rate == 48000)
816 delta = 0x1000;
817 else
818 delta = (((rate << 12) + rate) / 48000) & 0x0000ffff;
819 return delta;
820 }
821
822 static int compute_rate_rec(u32 rate)
823 {
824 int delta;
825
826 if (rate == 44100)
827 delta = 0x116a;
828 else if (rate == 8000)
829 delta = 0x6000;
830 else if (rate == 48000)
831 delta = 0x1000;
832 else
833 delta = ((48000 << 12) / rate) & 0x0000ffff;
834
835 return delta;
836 }
837 /* set playback sample rate */
838 static unsigned int trident_set_dac_rate(struct trident_state * state, unsigned int rate)
839 {
840 struct dmabuf *dmabuf = &state->dmabuf;
841
842 if (rate > 48000)
843 rate = 48000;
844 if (rate < 4000)
845 rate = 4000;
846
847 dmabuf->rate = rate;
848 dmabuf->channel->delta = compute_rate_play(rate);
849
850 trident_write_voice_regs(state);
851
852 #ifdef DEBUG
853 printk("trident: called trident_set_dac_rate : rate = %d\n", rate);
854 #endif
855
856 return rate;
857 }
858
859 /* set recording sample rate */
860 static unsigned int trident_set_adc_rate(struct trident_state * state, unsigned int rate)
861 {
862 struct dmabuf *dmabuf = &state->dmabuf;
863
864 if (rate > 48000)
865 rate = 48000;
866 if (rate < 4000)
867 rate = 4000;
868
869 dmabuf->rate = rate;
870 dmabuf->channel->delta = compute_rate_rec(rate);
871
872 trident_write_voice_regs(state);
873
874 #ifdef DEBUG
875 printk("trident: called trident_set_adc_rate : rate = %d\n", rate);
876 #endif
877 return rate;
878 }
879
880 /* prepare channel attributes for playback */
881 static void trident_play_setup(struct trident_state *state)
882 {
883 struct dmabuf *dmabuf = &state->dmabuf;
884 struct trident_channel *channel = dmabuf->channel;
885
886 channel->lba = dmabuf->dma_handle;
887 channel->delta = compute_rate_play(dmabuf->rate);
888
889 channel->eso = dmabuf->dmasize >> sample_shift[dmabuf->fmt];
890 channel->eso -= 1;
891
892 if (state->card->pci_id != PCI_DEVICE_ID_SI_7018) {
893 channel->attribute = 0;
894 if (state->card->pci_id == PCI_DEVICE_ID_ALI_5451) {
895 if ((channel->num == ALI_SPDIF_IN_CHANNEL) || (channel->num == ALI_PCM_IN_CHANNEL))
896 ali_disable_special_channel(state->card, channel->num);
897 else if ((inl(TRID_REG(state->card, ALI_GLOBAL_CONTROL)) & ALI_SPDIF_OUT_CH_ENABLE)
898 && (channel->num == ALI_SPDIF_OUT_CHANNEL))
899 {
900 ali_set_spdif_out_rate(state->card, state->dmabuf.rate);
901 state->dmabuf.channel->delta = 0x1000;
902 }
903 }
904 }
905
906 channel->fm_vol = 0x0;
907
908 channel->control = CHANNEL_LOOP;
909 if (dmabuf->fmt & TRIDENT_FMT_16BIT) {
910 /* 16-bits */
911 channel->control |= CHANNEL_16BITS;
912 /* signed */
913 channel->control |= CHANNEL_SIGNED;
914 }
915 if (dmabuf->fmt & TRIDENT_FMT_STEREO)
916 /* stereo */
917 channel->control |= CHANNEL_STEREO;
918 #ifdef DEBUG
919 printk("trident: trident_play_setup, LBA = 0x%08x, "
920 "Delta = 0x%08x, ESO = 0x%08x, Control = 0x%08x\n",
921 channel->lba, channel->delta, channel->eso, channel->control);
922 #endif
923 trident_write_voice_regs(state);
924 }
925
926 /* prepare channel attributes for recording */
927 static void trident_rec_setup(struct trident_state *state)
928 {
929 u16 w;
930 u8 bval;
931
932 struct trident_card *card = state->card;
933 struct dmabuf *dmabuf = &state->dmabuf;
934 struct trident_channel *channel = dmabuf->channel;
935 unsigned int rate;
936
937 /* Enable AC-97 ADC (capture) */
938 switch (card->pci_id)
939 {
940 case PCI_DEVICE_ID_ALI_5451:
941 ali_enable_special_channel(state);
942 break;
943 case PCI_DEVICE_ID_SI_7018:
944 /* for 7018, the ac97 is always in playback/record (duplex) mode */
945 break;
946 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
947 w = inb(TRID_REG(card, DX_ACR2_AC97_COM_STAT));
948 outb(w | 0x48, TRID_REG(card, DX_ACR2_AC97_COM_STAT));
949 /* enable and set record channel */
950 outb(0x80 | channel->num, TRID_REG(card, T4D_REC_CH));
951 break;
952 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
953 w = inw(TRID_REG(card, T4D_MISCINT));
954 outw(w | 0x1000, TRID_REG(card, T4D_MISCINT));
955 /* enable and set record channel */
956 outb(0x80 | channel->num, TRID_REG(card, T4D_REC_CH));
957 break;
958 case PCI_DEVICE_ID_INTERG_5050:
959 /* don't know yet, using special channel 22 in GC1(0xd4)? */
960 break;
961 default:
962 return;
963 }
964
965 channel->lba = dmabuf->dma_handle;
966 channel->delta = compute_rate_rec(dmabuf->rate);
967 if ((card->pci_id == PCI_DEVICE_ID_ALI_5451) && (channel->num == ALI_SPDIF_IN_CHANNEL)) {
968 rate = ali_get_spdif_in_rate(card);
969 if (rate == 0)
970 {
971 printk(KERN_WARNING "trident: ALi 5451 S/PDIF input setup error!\n");
972 rate = 48000;
973 }
974 bval = inb(TRID_REG(card,ALI_SPDIF_CTRL));
975 if (bval & 0x10)
976 {
977 outb(bval,TRID_REG(card,ALI_SPDIF_CTRL));
978 printk(KERN_WARNING "trident: cleared ALi 5451 S/PDIF parity error flag.\n");
979 }
980
981 if (rate != 48000)
982 channel->delta = ((rate << 12) / dmabuf->rate) & 0x0000ffff;
983 }
984
985 channel->eso = dmabuf->dmasize >> sample_shift[dmabuf->fmt];
986 channel->eso -= 1;
987
988 if (state->card->pci_id != PCI_DEVICE_ID_SI_7018) {
989 channel->attribute = 0;
990 }
991
992 channel->fm_vol = 0x0;
993
994 channel->control = CHANNEL_LOOP;
995 if (dmabuf->fmt & TRIDENT_FMT_16BIT) {
996 /* 16-bits */
997 channel->control |= CHANNEL_16BITS;
998 /* signed */
999 channel->control |= CHANNEL_SIGNED;
1000 }
1001 if (dmabuf->fmt & TRIDENT_FMT_STEREO)
1002 /* stereo */
1003 channel->control |= CHANNEL_STEREO;
1004 #ifdef DEBUG
1005 printk("trident: trident_rec_setup, LBA = 0x%08x, "
1006 "Delat = 0x%08x, ESO = 0x%08x, Control = 0x%08x\n",
1007 channel->lba, channel->delta, channel->eso, channel->control);
1008 #endif
1009 trident_write_voice_regs(state);
1010 }
1011
1012 /* get current playback/recording dma buffer pointer (byte offset from LBA),
1013 called with spinlock held! */
1014 static inline unsigned trident_get_dma_addr(struct trident_state *state)
1015 {
1016 struct dmabuf *dmabuf = &state->dmabuf;
1017 u32 cso;
1018
1019 if (!dmabuf->enable)
1020 return 0;
1021
1022 outb(dmabuf->channel->num, TRID_REG(state->card, T4D_LFO_GC_CIR));
1023
1024 switch (state->card->pci_id)
1025 {
1026 case PCI_DEVICE_ID_ALI_5451:
1027 case PCI_DEVICE_ID_SI_7018:
1028 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
1029 case PCI_DEVICE_ID_INTERG_5050:
1030 /* 16 bits ESO, CSO for 7018 and DX */
1031 cso = inw(TRID_REG(state->card, CH_DX_CSO_ALPHA_FMS + 2));
1032 break;
1033 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
1034 /* 24 bits ESO, CSO for NX */
1035 cso = inl(TRID_REG(state->card, CH_NX_DELTA_CSO)) & 0x00ffffff;
1036 break;
1037 default:
1038 return 0;
1039 }
1040
1041 #ifdef DEBUG
1042 printk("trident: trident_get_dma_addr: chip reported channel: %d, "
1043 "cso = 0x%04x\n",
1044 dmabuf->channel->num, cso);
1045 #endif
1046 /* ESO and CSO are in units of Samples, convert to byte offset */
1047 cso <<= sample_shift[dmabuf->fmt];
1048
1049 return (cso % dmabuf->dmasize);
1050 }
1051
1052 /* Stop recording (lock held) */
1053 static inline void __stop_adc(struct trident_state *state)
1054 {
1055 struct dmabuf *dmabuf = &state->dmabuf;
1056 unsigned int chan_num = dmabuf->channel->num;
1057 struct trident_card *card = state->card;
1058
1059 dmabuf->enable &= ~ADC_RUNNING;
1060 trident_stop_voice(card, chan_num);
1061 trident_disable_voice_irq(card, chan_num);
1062 }
1063
1064 static void stop_adc(struct trident_state *state)
1065 {
1066 struct trident_card *card = state->card;
1067 unsigned long flags;
1068
1069 spin_lock_irqsave(&card->lock, flags);
1070 __stop_adc(state);
1071 spin_unlock_irqrestore(&card->lock, flags);
1072 }
1073
1074 static void start_adc(struct trident_state *state)
1075 {
1076 struct dmabuf *dmabuf = &state->dmabuf;
1077 unsigned int chan_num = dmabuf->channel->num;
1078 struct trident_card *card = state->card;
1079 unsigned long flags;
1080
1081 spin_lock_irqsave(&card->lock, flags);
1082 if ((dmabuf->mapped || dmabuf->count < (signed)dmabuf->dmasize) && dmabuf->ready) {
1083 dmabuf->enable |= ADC_RUNNING;
1084 trident_enable_voice_irq(card, chan_num);
1085 trident_start_voice(card, chan_num);
1086 }
1087 spin_unlock_irqrestore(&card->lock, flags);
1088 }
1089
1090 /* stop playback (lock held) */
1091 static inline void __stop_dac(struct trident_state *state)
1092 {
1093 struct dmabuf *dmabuf = &state->dmabuf;
1094 unsigned int chan_num = dmabuf->channel->num;
1095 struct trident_card *card = state->card;
1096
1097 dmabuf->enable &= ~DAC_RUNNING;
1098 trident_stop_voice(card, chan_num);
1099 if (state->chans_num == 6) {
1100 trident_stop_voice(card, state->other_states[0]->dmabuf.channel->num);
1101 trident_stop_voice(card, state->other_states[1]->dmabuf.channel->num);
1102 trident_stop_voice(card, state->other_states[2]->dmabuf.channel->num);
1103 trident_stop_voice(card, state->other_states[3]->dmabuf.channel->num);
1104 }
1105 trident_disable_voice_irq(card, chan_num);
1106 }
1107
1108 static void stop_dac(struct trident_state *state)
1109 {
1110 struct trident_card *card = state->card;
1111 unsigned long flags;
1112
1113 spin_lock_irqsave(&card->lock, flags);
1114 __stop_dac(state);
1115 spin_unlock_irqrestore(&card->lock, flags);
1116 }
1117
1118 static void start_dac(struct trident_state *state)
1119 {
1120 struct dmabuf *dmabuf = &state->dmabuf;
1121 unsigned int chan_num = dmabuf->channel->num;
1122 struct trident_card *card = state->card;
1123 unsigned long flags;
1124
1125 spin_lock_irqsave(&card->lock, flags);
1126 if ((dmabuf->mapped || dmabuf->count > 0) && dmabuf->ready) {
1127 dmabuf->enable |= DAC_RUNNING;
1128 trident_enable_voice_irq(card, chan_num);
1129 trident_start_voice(card, chan_num);
1130 if (state->chans_num == 6) {
1131 trident_start_voice(card, state->other_states[0]->dmabuf.channel->num);
1132 trident_start_voice(card, state->other_states[1]->dmabuf.channel->num);
1133 trident_start_voice(card, state->other_states[2]->dmabuf.channel->num);
1134 trident_start_voice(card, state->other_states[3]->dmabuf.channel->num);
1135 }
1136 }
1137 spin_unlock_irqrestore(&card->lock, flags);
1138 }
1139
1140 #define DMABUF_DEFAULTORDER (15-PAGE_SHIFT)
1141 #define DMABUF_MINORDER 1
1142
1143 /* allocate DMA buffer, playback and recording buffer should be allocated seperately */
1144 static int alloc_dmabuf(struct trident_state *state)
1145 {
1146 struct dmabuf *dmabuf = &state->dmabuf;
1147 void *rawbuf = NULL;
1148 int order;
1149 struct page *page, *pend;
1150
1151 /* alloc as big a chunk as we can, FIXME: is this necessary ?? */
1152 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
1153 if ((rawbuf = pci_alloc_consistent(state->card->pci_dev,
1154 PAGE_SIZE << order,
1155 &dmabuf->dma_handle)))
1156 break;
1157 if (!rawbuf)
1158 return -ENOMEM;
1159
1160 #ifdef DEBUG
1161 printk("trident: allocated %ld (order = %d) bytes at %p\n",
1162 PAGE_SIZE << order, order, rawbuf);
1163 #endif
1164
1165 dmabuf->ready = dmabuf->mapped = 0;
1166 dmabuf->rawbuf = rawbuf;
1167 dmabuf->buforder = order;
1168
1169 /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
1170 pend = virt_to_page(rawbuf + (PAGE_SIZE << order) - 1);
1171 for (page = virt_to_page(rawbuf); page <= pend; page++)
1172 mem_map_reserve(page);
1173
1174 return 0;
1175 }
1176
1177 /* free DMA buffer */
1178 static void dealloc_dmabuf(struct trident_state *state)
1179 {
1180 struct dmabuf *dmabuf = &state->dmabuf;
1181 struct page *page, *pend;
1182
1183 if (dmabuf->rawbuf) {
1184 /* undo marking the pages as reserved */
1185 pend = virt_to_page(dmabuf->rawbuf + (PAGE_SIZE << dmabuf->buforder) - 1);
1186 for (page = virt_to_page(dmabuf->rawbuf); page <= pend; page++)
1187 mem_map_unreserve(page);
1188 pci_free_consistent(state->card->pci_dev, PAGE_SIZE << dmabuf->buforder,
1189 dmabuf->rawbuf, dmabuf->dma_handle);
1190 }
1191 dmabuf->rawbuf = NULL;
1192 dmabuf->mapped = dmabuf->ready = 0;
1193 }
1194
1195 static int prog_dmabuf(struct trident_state *state, unsigned rec)
1196 {
1197 struct dmabuf *dmabuf = &state->dmabuf;
1198 unsigned bytepersec;
1199 struct trident_state *s = state;
1200 unsigned bufsize, dma_nums;
1201 unsigned long flags;
1202 int ret, i, order;
1203 struct page *page, *pend;
1204
1205 lock_set_fmt(state);
1206 if (state->chans_num == 6)
1207 dma_nums = 5;
1208 else dma_nums = 1;
1209
1210 for (i = 0; i < dma_nums; i++) {
1211 if (i > 0) {
1212 s = state->other_states[i - 1];
1213 dmabuf = &s->dmabuf;
1214 dmabuf->fmt = state->dmabuf.fmt;
1215 dmabuf->rate = state->dmabuf.rate;
1216 }
1217
1218 spin_lock_irqsave(&s->card->lock, flags);
1219 dmabuf->hwptr = dmabuf->swptr = dmabuf->total_bytes = 0;
1220 dmabuf->count = dmabuf->error = 0;
1221 spin_unlock_irqrestore(&s->card->lock, flags);
1222
1223 /* allocate DMA buffer if not allocated yet */
1224 if (!dmabuf->rawbuf) {
1225 if (i == 0) {
1226 if ((ret = alloc_dmabuf(state))) {
1227 unlock_set_fmt(state);
1228 return ret;
1229 }
1230 }
1231 else {
1232 if ((order = state->dmabuf.buforder - 1) >= DMABUF_MINORDER) {
1233 dmabuf->rawbuf = pci_alloc_consistent(state->card->pci_dev,
1234 PAGE_SIZE << order,
1235 &dmabuf->dma_handle);
1236 }
1237 if (!dmabuf->rawbuf) {
1238 free_pages((unsigned long)state->dmabuf.rawbuf, state->dmabuf.buforder);
1239 state->dmabuf.rawbuf = NULL;
1240 i-=2;
1241 for (; i >= 0; i--) {
1242 pci_free_consistent(state->card->pci_dev,
1243 PAGE_SIZE << state->other_states[i]->dmabuf.buforder,
1244 state->other_states[i]->dmabuf.rawbuf,
1245 state->other_states[i]->dmabuf.dma_handle);
1246 }
1247 unlock_set_fmt(state);
1248 return -ENOMEM;
1249 }
1250 dmabuf->ready = dmabuf->mapped = 0;
1251 dmabuf->buforder = order;
1252 pend = virt_to_page(dmabuf->rawbuf + (PAGE_SIZE << order) - 1);
1253 for (page = virt_to_page(dmabuf->rawbuf); page <= pend; page++)
1254 mem_map_reserve(page);
1255 }
1256 }
1257 /* FIXME: figure out all this OSS fragment stuff */
1258 bytepersec = dmabuf->rate << sample_shift[dmabuf->fmt];
1259 bufsize = PAGE_SIZE << dmabuf->buforder;
1260 if (dmabuf->ossfragshift) {
1261 if ((1000 << dmabuf->ossfragshift) < bytepersec)
1262 dmabuf->fragshift = ld2(bytepersec/1000);
1263 else
1264 dmabuf->fragshift = dmabuf->ossfragshift;
1265 } else {
1266 /* lets hand out reasonable big ass buffers by default */
1267 dmabuf->fragshift = (dmabuf->buforder + PAGE_SHIFT -2);
1268 }
1269 dmabuf->numfrag = bufsize >> dmabuf->fragshift;
1270 while (dmabuf->numfrag < 4 && dmabuf->fragshift > 3) {
1271 dmabuf->fragshift--;
1272 dmabuf->numfrag = bufsize >> dmabuf->fragshift;
1273 }
1274 dmabuf->fragsize = 1 << dmabuf->fragshift;
1275 if (dmabuf->ossmaxfrags >= 4 && dmabuf->ossmaxfrags < dmabuf->numfrag)
1276 dmabuf->numfrag = dmabuf->ossmaxfrags;
1277 dmabuf->fragsamples = dmabuf->fragsize >> sample_shift[dmabuf->fmt];
1278 dmabuf->dmasize = dmabuf->numfrag << dmabuf->fragshift;
1279
1280 memset(dmabuf->rawbuf, (dmabuf->fmt & TRIDENT_FMT_16BIT) ? 0 : 0x80,
1281 dmabuf->dmasize);
1282
1283 spin_lock_irqsave(&s->card->lock, flags);
1284 if (rec) {
1285 trident_rec_setup(s);
1286 } else {
1287 trident_play_setup(s);
1288 }
1289 spin_unlock_irqrestore(&s->card->lock, flags);
1290
1291 /* set the ready flag for the dma buffer */
1292 dmabuf->ready = 1;
1293
1294 #ifdef DEBUG
1295 printk("trident: prog_dmabuf(%d), sample rate = %d, format = %d, numfrag = %d, "
1296 "fragsize = %d dmasize = %d\n",
1297 dmabuf->channel->num, dmabuf->rate, dmabuf->fmt, dmabuf->numfrag,
1298 dmabuf->fragsize, dmabuf->dmasize);
1299 #endif
1300 }
1301 unlock_set_fmt(state);
1302 return 0;
1303 }
1304
1305 /* we are doing quantum mechanics here, the buffer can only be empty, half or full filled i.e.
1306 |------------|------------| or |xxxxxxxxxxxx|------------| or |xxxxxxxxxxxx|xxxxxxxxxxxx|
1307 but we almost always get this
1308 |xxxxxx------|------------| or |xxxxxxxxxxxx|xxxxx-------|
1309 so we have to clear the tail space to "silence"
1310 |xxxxxx000000|------------| or |xxxxxxxxxxxx|xxxxxx000000|
1311 */
1312 static void trident_clear_tail(struct trident_state *state)
1313 {
1314 struct dmabuf *dmabuf = &state->dmabuf;
1315 unsigned swptr;
1316 unsigned char silence = (dmabuf->fmt & TRIDENT_FMT_16BIT) ? 0 : 0x80;
1317 unsigned int len;
1318 unsigned long flags;
1319
1320 spin_lock_irqsave(&state->card->lock, flags);
1321 swptr = dmabuf->swptr;
1322 spin_unlock_irqrestore(&state->card->lock, flags);
1323
1324 if (swptr == 0 || swptr == dmabuf->dmasize / 2 || swptr == dmabuf->dmasize)
1325 return;
1326
1327 if (swptr < dmabuf->dmasize/2)
1328 len = dmabuf->dmasize/2 - swptr;
1329 else
1330 len = dmabuf->dmasize - swptr;
1331
1332 memset(dmabuf->rawbuf + swptr, silence, len);
1333 if(state->card->pci_id != PCI_DEVICE_ID_ALI_5451)
1334 {
1335 spin_lock_irqsave(&state->card->lock, flags);
1336 dmabuf->swptr += len;
1337 dmabuf->count += len;
1338 spin_unlock_irqrestore(&state->card->lock, flags);
1339 }
1340
1341 /* restart the dma machine in case it is halted */
1342 start_dac(state);
1343 }
1344
1345 static int drain_dac(struct trident_state *state, int nonblock)
1346 {
1347 DECLARE_WAITQUEUE(wait, current);
1348 struct dmabuf *dmabuf = &state->dmabuf;
1349 unsigned long flags;
1350 unsigned long tmo;
1351 int count;
1352 unsigned long diff = 0;
1353
1354 if (dmabuf->mapped || !dmabuf->ready)
1355 return 0;
1356
1357 add_wait_queue(&dmabuf->wait, &wait);
1358 for (;;) {
1359 /* It seems that we have to set the current state to TASK_INTERRUPTIBLE
1360 every time to make the process really go to sleep */
1361 current->state = TASK_INTERRUPTIBLE;
1362
1363 spin_lock_irqsave(&state->card->lock, flags);
1364 count = dmabuf->count;
1365 spin_unlock_irqrestore(&state->card->lock, flags);
1366
1367 if (count <= 0)
1368 break;
1369
1370 if (signal_pending(current))
1371 break;
1372
1373 if (nonblock) {
1374 remove_wait_queue(&dmabuf->wait, &wait);
1375 current->state = TASK_RUNNING;
1376 return -EBUSY;
1377 }
1378
1379 /* No matter how much data is left in the buffer, we have to wait until
1380 CSO == ESO/2 or CSO == ESO when address engine interrupts */
1381 if (state->card->pci_id == PCI_DEVICE_ID_ALI_5451 ||
1382 state->card->pci_id == PCI_DEVICE_ID_INTERG_5050)
1383 {
1384 diff = dmabuf->swptr - trident_get_dma_addr(state) + dmabuf->dmasize ;
1385 diff = diff % (dmabuf->dmasize);
1386 tmo = (diff * HZ) / dmabuf->rate;
1387 }
1388 else
1389 {
1390 tmo = (dmabuf->dmasize * HZ) / dmabuf->rate;
1391 }
1392 tmo >>= sample_shift[dmabuf->fmt];
1393 if (!schedule_timeout(tmo ? tmo : 1) && tmo){
1394 break;
1395 }
1396 }
1397 remove_wait_queue(&dmabuf->wait, &wait);
1398 current->state = TASK_RUNNING;
1399 if (signal_pending(current))
1400 return -ERESTARTSYS;
1401
1402 return 0;
1403 }
1404
1405 /* update buffer manangement pointers, especially, dmabuf->count and dmabuf->hwptr */
1406 static void trident_update_ptr(struct trident_state *state)
1407 {
1408 struct dmabuf *dmabuf = &state->dmabuf;
1409 unsigned hwptr, swptr;
1410 int clear_cnt = 0;
1411 int diff;
1412 unsigned char silence;
1413 unsigned half_dmasize;
1414
1415 /* update hardware pointer */
1416 hwptr = trident_get_dma_addr(state);
1417 diff = (dmabuf->dmasize + hwptr - dmabuf->hwptr) % dmabuf->dmasize;
1418 dmabuf->hwptr = hwptr;
1419 dmabuf->total_bytes += diff;
1420
1421 /* error handling and process wake up for ADC */
1422 if (dmabuf->enable == ADC_RUNNING) {
1423 if (dmabuf->mapped) {
1424 dmabuf->count -= diff;
1425 if (dmabuf->count >= (signed)dmabuf->fragsize)
1426 wake_up(&dmabuf->wait);
1427 } else {
1428 dmabuf->count += diff;
1429
1430 if (dmabuf->count < 0 || dmabuf->count > dmabuf->dmasize) {
1431 /* buffer underrun or buffer overrun, we have no way to recover
1432 it here, just stop the machine and let the process force hwptr
1433 and swptr to sync */
1434 __stop_adc(state);
1435 dmabuf->error++;
1436 }
1437 if (dmabuf->count < (signed)dmabuf->dmasize/2)
1438 wake_up(&dmabuf->wait);
1439 }
1440 }
1441
1442 /* error handling and process wake up for DAC */
1443 if (dmabuf->enable == DAC_RUNNING) {
1444 if (dmabuf->mapped) {
1445 dmabuf->count += diff;
1446 if (dmabuf->count >= (signed)dmabuf->fragsize)
1447 wake_up(&dmabuf->wait);
1448 } else {
1449 dmabuf->count -= diff;
1450
1451 if (dmabuf->count < 0 || dmabuf->count > dmabuf->dmasize) {
1452 /* buffer underrun or buffer overrun, we have no way to recover
1453 it here, just stop the machine and let the process force hwptr
1454 and swptr to sync */
1455 __stop_dac(state);
1456 dmabuf->error++;
1457 }
1458 else if (!dmabuf->endcleared) {
1459 swptr = dmabuf->swptr;
1460 silence = (dmabuf->fmt & TRIDENT_FMT_16BIT ? 0 : 0x80);
1461 if (dmabuf->update_flag & ALI_ADDRESS_INT_UPDATE) {
1462 /* We must clear end data of 1/2 dmabuf if needed.
1463 According to 1/2 algorithm of Address Engine Interrupt,
1464 check the validation of the data of half dmasize. */
1465 half_dmasize = dmabuf->dmasize / 2;
1466 if ((diff = hwptr - half_dmasize) < 0 )
1467 diff = hwptr;
1468 if ((dmabuf->count + diff) < half_dmasize) {
1469 //there is invalid data in the end of half buffer
1470 if ((clear_cnt = half_dmasize - swptr) < 0)
1471 clear_cnt += half_dmasize;
1472 //clear the invalid data
1473 memset (dmabuf->rawbuf + swptr,
1474 silence, clear_cnt);
1475 if (state->chans_num == 6) {
1476 clear_cnt = clear_cnt / 2;
1477 swptr = swptr / 2;
1478 memset (state->other_states[0]->dmabuf.rawbuf + swptr,
1479 silence, clear_cnt);
1480 memset (state->other_states[1]->dmabuf.rawbuf + swptr,
1481 silence, clear_cnt);
1482 memset (state->other_states[2]->dmabuf.rawbuf + swptr,
1483 silence, clear_cnt);
1484 memset (state->other_states[3]->dmabuf.rawbuf + swptr,
1485 silence, clear_cnt);
1486 }
1487 dmabuf->endcleared = 1;
1488 }
1489 } else if (dmabuf->count < (signed) dmabuf->fragsize) {
1490 clear_cnt = dmabuf->fragsize;
1491 if ((swptr + clear_cnt) > dmabuf->dmasize)
1492 clear_cnt = dmabuf->dmasize - swptr;
1493 memset (dmabuf->rawbuf + swptr, silence, clear_cnt);
1494 if (state->chans_num == 6) {
1495 clear_cnt = clear_cnt / 2;
1496 swptr = swptr / 2;
1497 memset (state->other_states[0]->dmabuf.rawbuf + swptr,
1498 silence, clear_cnt);
1499 memset (state->other_states[1]->dmabuf.rawbuf + swptr,
1500 silence, clear_cnt);
1501 memset (state->other_states[2]->dmabuf.rawbuf + swptr,
1502 silence, clear_cnt);
1503 memset (state->other_states[3]->dmabuf.rawbuf + swptr,
1504 silence, clear_cnt);
1505 }
1506 dmabuf->endcleared = 1;
1507 }
1508 }
1509 /* trident_update_ptr is called by interrupt handler or by process via
1510 ioctl/poll, we only wake up the waiting process when we have more
1511 than 1/2 buffer free (always true for interrupt handler) */
1512 if (dmabuf->count < (signed)dmabuf->dmasize/2)
1513 wake_up(&dmabuf->wait);
1514 }
1515 }
1516 dmabuf->update_flag &= ~ALI_ADDRESS_INT_UPDATE;
1517 }
1518
1519 static void trident_address_interrupt(struct trident_card *card)
1520 {
1521 int i;
1522 struct trident_state *state;
1523
1524 /* Update the pointers for all channels we are running. */
1525 /* FIXME: should read interrupt status only once */
1526 for (i = 0; i < NR_HW_CH; i++) {
1527 if (trident_check_channel_interrupt(card, 63 - i)) {
1528 trident_ack_channel_interrupt(card, 63 - i);
1529 if ((state = card->states[i]) != NULL) {
1530 trident_update_ptr(state);
1531 } else {
1532 printk("trident: spurious channel irq %d.\n",
1533 63 - i);
1534 trident_stop_voice(card, 63 - i);
1535 trident_disable_voice_irq(card, 63 - i);
1536 }
1537 }
1538 }
1539 }
1540
1541 static void ali_hwvol_control(struct trident_card *card, int opt)
1542 {
1543 u16 dwTemp, volume[2], mute, diff, *pVol[2];
1544
1545 dwTemp = ali_ac97_read(card->ac97_codec[0], 0x02);
1546 mute = dwTemp & 0x8000;
1547 volume[0] = dwTemp & 0x001f;
1548 volume[1] = (dwTemp & 0x1f00) >> 8;
1549 if (volume[0] < volume [1]) {
1550 pVol[0] = &volume[0];
1551 pVol[1] = &volume[1];
1552 } else {
1553 pVol[1] = &volume[0];
1554 pVol[0] = &volume[1];
1555 }
1556 diff = *(pVol[1]) - *(pVol[0]);
1557
1558 if (opt == 1) { // MUTE
1559 dwTemp ^= 0x8000;
1560 ali_ac97_write(card->ac97_codec[0], 0x02, dwTemp);
1561 } else if (opt == 2) { // Down
1562 if (mute)
1563 return;
1564 if (*(pVol[1]) < 0x001f) {
1565 (*pVol[1])++;
1566 *(pVol[0]) = *(pVol[1]) - diff;
1567 }
1568 dwTemp &= 0xe0e0;
1569 dwTemp |= (volume[0]) | (volume[1] << 8);
1570 ali_ac97_write(card->ac97_codec[0], 0x02, dwTemp);
1571 card->ac97_codec[0]->mixer_state[0] = ((32-volume[0])*25/8) | (((32-volume[1])*25/8) << 8);
1572 } else if (opt == 4) { // Up
1573 if (mute)
1574 return;
1575 if (*(pVol[0]) >0) {
1576 (*pVol[0])--;
1577 *(pVol[1]) = *(pVol[0]) + diff;
1578 }
1579 dwTemp &= 0xe0e0;
1580 dwTemp |= (volume[0]) | (volume[1] << 8);
1581 ali_ac97_write(card->ac97_codec[0], 0x02, dwTemp);
1582 card->ac97_codec[0]->mixer_state[0] = ((32-volume[0])*25/8) | (((32-volume[1])*25/8) << 8);
1583 }
1584 else
1585 {
1586 /* Nothing needs doing */
1587 }
1588 }
1589
1590 /*
1591 * Re-enable reporting of vol change after 0.1 seconds
1592 */
1593
1594 static void ali_timeout(unsigned long ptr)
1595 {
1596 struct trident_card *card = (struct trident_card *)ptr;
1597 u16 temp = 0;
1598
1599 /* Enable GPIO IRQ (MISCINT bit 18h)*/
1600 temp = inw(TRID_REG(card, T4D_MISCINT + 2));
1601 temp |= 0x0004;
1602 outw(temp, TRID_REG(card, T4D_MISCINT + 2));
1603 }
1604
1605 /*
1606 * Set up the timer to clear the vol change notification
1607 */
1608
1609 static void ali_set_timer(struct trident_card *card)
1610 {
1611 /* Add Timer Routine to Enable GPIO IRQ */
1612 del_timer(&card->timer); /* Never queue twice */
1613 card->timer.function = ali_timeout;
1614 card->timer.data = (unsigned long) card;
1615 card->timer.expires = jiffies + HZ/10;
1616 add_timer(&card->timer);
1617 }
1618
1619 /*
1620 * Process a GPIO event
1621 */
1622
1623 static void ali_queue_task(struct trident_card *card, int opt)
1624 {
1625 u16 temp;
1626
1627 /* Disable GPIO IRQ (MISCINT bit 18h)*/
1628 temp = inw(TRID_REG(card, T4D_MISCINT + 2));
1629 temp &= (u16)(~0x0004);
1630 outw(temp, TRID_REG(card, T4D_MISCINT + 2));
1631
1632 /* Adjust the volume */
1633 ali_hwvol_control(card, opt);
1634
1635 /* Set the timer for 1/10th sec */
1636 ali_set_timer(card);
1637 }
1638
1639 static void cyber_address_interrupt(struct trident_card *card)
1640 {
1641 int i,irq_status;
1642 struct trident_state *state;
1643
1644 /* Update the pointers for all channels we are running. */
1645 /* FIXED: read interrupt status only once */
1646 irq_status=inl(TRID_REG(card, T4D_AINT_A) );
1647 #ifdef DEBUG
1648 printk("cyber_address_interrupt: irq_status 0x%X\n",irq_status);
1649 #endif
1650 for (i = 0; i < NR_HW_CH; i++) {
1651 if (irq_status & ( 1 << (31 - i)) ) {
1652
1653 /* clear bit by writing a 1, zeroes are ignored */
1654 outl( (1 <<(31-i)), TRID_REG(card, T4D_AINT_A));
1655
1656 #ifdef DEBUG
1657 printk("cyber_interrupt: channel %d\n", 31-i);
1658 #endif
1659 if ((state = card->states[i]) != NULL) {
1660 trident_update_ptr(state);
1661 } else {
1662 printk("cyber5050: spurious channel irq %d.\n",
1663 31 - i);
1664 trident_stop_voice(card, 31 - i);
1665 trident_disable_voice_irq(card, 31 - i);
1666 }
1667 }
1668 }
1669 }
1670
1671 static void trident_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1672 {
1673 struct trident_card *card = (struct trident_card *)dev_id;
1674 u32 event;
1675 u32 gpio;
1676
1677 spin_lock(&card->lock);
1678 event = inl(TRID_REG(card, T4D_MISCINT));
1679
1680 #ifdef DEBUG
1681 printk("trident: trident_interrupt called, MISCINT = 0x%08x\n", event);
1682 #endif
1683
1684 if (event & ADDRESS_IRQ) {
1685 card->address_interrupt(card);
1686 }
1687
1688 if(card->pci_id == PCI_DEVICE_ID_ALI_5451)
1689 {
1690 /* GPIO IRQ (H/W Volume Control) */
1691 event = inl(TRID_REG(card, T4D_MISCINT));
1692 if (event & (1<<25)) {
1693 gpio = inl(TRID_REG(card, ALI_GPIO));
1694 if (!timer_pending(&card->timer))
1695 ali_queue_task(card, gpio&0x07);
1696 }
1697 event = inl(TRID_REG(card, T4D_MISCINT));
1698 outl(event | (ST_TARGET_REACHED | MIXER_OVERFLOW | MIXER_UNDERFLOW), TRID_REG(card, T4D_MISCINT));
1699 spin_unlock(&card->lock);
1700 return;
1701 }
1702
1703 /* manually clear interrupt status, bad hardware design, blame T^2 */
1704 outl((ST_TARGET_REACHED | MIXER_OVERFLOW | MIXER_UNDERFLOW),
1705 TRID_REG(card, T4D_MISCINT));
1706 spin_unlock(&card->lock);
1707 }
1708
1709 /* in this loop, dmabuf.count signifies the amount of data that is waiting to be copied to
1710 the user's buffer. it is filled by the dma machine and drained by this loop. */
1711 static ssize_t trident_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1712 {
1713 struct trident_state *state = (struct trident_state *)file->private_data;
1714 struct dmabuf *dmabuf = &state->dmabuf;
1715 ssize_t ret = 0;
1716 unsigned long flags;
1717 unsigned swptr;
1718 int cnt;
1719
1720 #ifdef DEBUG
1721 printk("trident: trident_read called, count = %d\n", count);
1722 #endif
1723
1724 VALIDATE_STATE(state);
1725 if (ppos != &file->f_pos)
1726 return -ESPIPE;
1727
1728 if (dmabuf->mapped)
1729 return -ENXIO;
1730 if (!access_ok(VERIFY_WRITE, buffer, count))
1731 return -EFAULT;
1732
1733 down(&state->sem);
1734 if (!dmabuf->ready && (ret = prog_dmabuf(state, 1)))
1735 goto out;
1736
1737 while (count > 0) {
1738 spin_lock_irqsave(&state->card->lock, flags);
1739 if (dmabuf->count > (signed) dmabuf->dmasize) {
1740 /* buffer overrun, we are recovering from sleep_on_timeout,
1741 resync hwptr and swptr, make process flush the buffer */
1742 dmabuf->count = dmabuf->dmasize;
1743 dmabuf->swptr = dmabuf->hwptr;
1744 }
1745 swptr = dmabuf->swptr;
1746 cnt = dmabuf->dmasize - swptr;
1747 if (dmabuf->count < cnt)
1748 cnt = dmabuf->count;
1749 spin_unlock_irqrestore(&state->card->lock, flags);
1750
1751 if (cnt > count)
1752 cnt = count;
1753 if (cnt <= 0) {
1754 unsigned long tmo;
1755 /* buffer is empty, start the dma machine and wait for data to be
1756 recorded */
1757 start_adc(state);
1758 if (file->f_flags & O_NONBLOCK) {
1759 if (!ret) ret = -EAGAIN;
1760 goto out;
1761 }
1762
1763 up(&state->sem);
1764 /* No matter how much space left in the buffer, we have to wait until
1765 CSO == ESO/2 or CSO == ESO when address engine interrupts */
1766 tmo = (dmabuf->dmasize * HZ) / (dmabuf->rate * 2);
1767 tmo >>= sample_shift[dmabuf->fmt];
1768 /* There are two situations when sleep_on_timeout returns, one is when
1769 the interrupt is serviced correctly and the process is waked up by
1770 ISR ON TIME. Another is when timeout is expired, which means that
1771 either interrupt is NOT serviced correctly (pending interrupt) or it
1772 is TOO LATE for the process to be scheduled to run (scheduler latency)
1773 which results in a (potential) buffer overrun. And worse, there is
1774 NOTHING we can do to prevent it. */
1775 if (!interruptible_sleep_on_timeout(&dmabuf->wait, tmo)) {
1776 #ifdef DEBUG
1777 printk(KERN_ERR "trident: recording schedule timeout, "
1778 "dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1779 dmabuf->dmasize, dmabuf->fragsize, dmabuf->count,
1780 dmabuf->hwptr, dmabuf->swptr);
1781 #endif
1782 /* a buffer overrun, we delay the recovery until next time the
1783 while loop begin and we REALLY have space to record */
1784 }
1785 if (signal_pending(current)) {
1786 if(!ret) ret = -ERESTARTSYS;
1787 goto out;
1788 }
1789 down(&state->sem);
1790 if(dmabuf->mapped)
1791 {
1792 if(!ret)
1793 ret = -ENXIO;
1794 goto out;
1795 }
1796 continue;
1797 }
1798
1799 if (copy_to_user(buffer, dmabuf->rawbuf + swptr, cnt)) {
1800 if (!ret) ret = -EFAULT;
1801 goto out;
1802 }
1803
1804 swptr = (swptr + cnt) % dmabuf->dmasize;
1805
1806 spin_lock_irqsave(&state->card->lock, flags);
1807 dmabuf->swptr = swptr;
1808 dmabuf->count -= cnt;
1809 spin_unlock_irqrestore(&state->card->lock, flags);
1810
1811 count -= cnt;
1812 buffer += cnt;
1813 ret += cnt;
1814 start_adc(state);
1815 }
1816 out:
1817 up(&state->sem);
1818 return ret;
1819 }
1820
1821 /* in this loop, dmabuf.count signifies the amount of data that is waiting to be dma to
1822 the soundcard. it is drained by the dma machine and filled by this loop. */
1823
1824 static ssize_t trident_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1825 {
1826 struct trident_state *state = (struct trident_state *)file->private_data;
1827 struct dmabuf *dmabuf = &state->dmabuf;
1828 ssize_t ret;
1829 unsigned long flags;
1830 unsigned swptr;
1831 int cnt;
1832 unsigned int state_cnt;
1833 unsigned int copy_count;
1834
1835 #ifdef DEBUG
1836 printk("trident: trident_write called, count = %d\n", count);
1837 #endif
1838 VALIDATE_STATE(state);
1839 if (ppos != &file->f_pos)
1840 return -ESPIPE;
1841
1842 /*
1843 * Guard against an mmap or ioctl while writing
1844 */
1845
1846 down(&state->sem);
1847
1848 if (dmabuf->mapped)
1849 {
1850 ret = -ENXIO;
1851 goto out;
1852 }
1853 if (!dmabuf->ready && (ret = prog_dmabuf(state, 0)))
1854 goto out;
1855
1856 if (!access_ok(VERIFY_READ, buffer, count))
1857 {
1858 ret= -EFAULT;
1859 goto out;
1860 }
1861
1862 ret = 0;
1863
1864 while (count > 0) {
1865 spin_lock_irqsave(&state->card->lock, flags);
1866 if (dmabuf->count < 0) {
1867 /* buffer underrun, we are recovering from sleep_on_timeout,
1868 resync hwptr and swptr */
1869 dmabuf->count = 0;
1870 dmabuf->swptr = dmabuf->hwptr;
1871 }
1872 swptr = dmabuf->swptr;
1873 cnt = dmabuf->dmasize - swptr;
1874 if (dmabuf->count + cnt > dmabuf->dmasize)
1875 cnt = dmabuf->dmasize - dmabuf->count;
1876 spin_unlock_irqrestore(&state->card->lock, flags);
1877
1878 if (cnt > count)
1879 cnt = count;
1880 if (cnt <= 0) {
1881 unsigned long tmo;
1882 /* buffer is full, start the dma machine and wait for data to be
1883 played */
1884 start_dac(state);
1885 if (file->f_flags & O_NONBLOCK) {
1886 if (!ret) ret = -EAGAIN;
1887 goto out;
1888 }
1889 /* No matter how much data left in the buffer, we have to wait until
1890 CSO == ESO/2 or CSO == ESO when address engine interrupts */
1891 lock_set_fmt(state);
1892 tmo = (dmabuf->dmasize * HZ) / (dmabuf->rate * 2);
1893 tmo >>= sample_shift[dmabuf->fmt];
1894 unlock_set_fmt(state);
1895 up(&state->sem);
1896
1897 /* There are two situations when sleep_on_timeout returns, one is when
1898 the interrupt is serviced correctly and the process is waked up by
1899 ISR ON TIME. Another is when timeout is expired, which means that
1900 either interrupt is NOT serviced correctly (pending interrupt) or it
1901 is TOO LATE for the process to be scheduled to run (scheduler latency)
1902 which results in a (potential) buffer underrun. And worse, there is
1903 NOTHING we can do to prevent it. */
1904 if (!interruptible_sleep_on_timeout(&dmabuf->wait, tmo)) {
1905 #ifdef DEBUG
1906 printk(KERN_ERR "trident: playback schedule timeout, "
1907 "dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1908 dmabuf->dmasize, dmabuf->fragsize, dmabuf->count,
1909 dmabuf->hwptr, dmabuf->swptr);
1910 #endif
1911 /* a buffer underrun, we delay the recovery until next time the
1912 while loop begin and we REALLY have data to play */
1913 }
1914 if (signal_pending(current)) {
1915 if (!ret) ret = -ERESTARTSYS;
1916 goto out;
1917 }
1918 down(&state->sem);
1919 if(dmabuf->mapped)
1920 {
1921 if(!ret)
1922 ret = -ENXIO;
1923 goto out;
1924 }
1925 continue;
1926 }
1927 lock_set_fmt(state);
1928 if (state->chans_num == 6) {
1929 copy_count = 0;
1930 state_cnt = 0;
1931 if (ali_write_5_1(state, buffer, cnt, ©_count, &state_cnt) == -EFAULT) {
1932 if (state_cnt){
1933 swptr = (swptr + state_cnt) % dmabuf->dmasize;
1934 spin_lock_irqsave(&state->card->lock, flags);
1935 dmabuf->swptr = swptr;
1936 dmabuf->count += state_cnt;
1937 dmabuf->endcleared = 0;
1938 spin_unlock_irqrestore(&state->card->lock, flags);
1939 }
1940 ret += copy_count;
1941 if (!ret) ret = -EFAULT;
1942 unlock_set_fmt(state);
1943 goto out;
1944 }
1945 }
1946 else {
1947 if (copy_from_user(dmabuf->rawbuf + swptr, buffer, cnt)) {
1948 if (!ret) ret = -EFAULT;
1949 unlock_set_fmt(state);
1950 goto out;
1951 }
1952 state_cnt = cnt;
1953 }
1954 unlock_set_fmt(state);
1955
1956 swptr = (swptr + state_cnt) % dmabuf->dmasize;
1957
1958 spin_lock_irqsave(&state->card->lock, flags);
1959 dmabuf->swptr = swptr;
1960 dmabuf->count += state_cnt;
1961 dmabuf->endcleared = 0;
1962 spin_unlock_irqrestore(&state->card->lock, flags);
1963
1964 count -= cnt;
1965 buffer += cnt;
1966 ret += cnt;
1967 start_dac(state);
1968 }
1969 out:
1970 up(&state->sem);
1971 return ret;
1972 }
1973
1974
1975 /* No kernel lock - we have our own spinlock */
1976 static unsigned int trident_poll(struct file *file, struct poll_table_struct *wait)
1977 {
1978 struct trident_state *state = (struct trident_state *)file->private_data;
1979 struct dmabuf *dmabuf = &state->dmabuf;
1980 unsigned long flags;
1981 unsigned int mask = 0;
1982
1983 VALIDATE_STATE(state);
1984
1985 /*
1986 * Guard against a parallel poll and write causing multiple
1987 * prog_dmabuf events
1988 */
1989
1990 down(&state->sem);
1991
1992 if (file->f_mode & FMODE_WRITE) {
1993 if (!dmabuf->ready && prog_dmabuf(state, 0))
1994 {
1995 up(&state->sem);
1996 return 0;
1997 }
1998 poll_wait(file, &dmabuf->wait, wait);
1999 }
2000 if (file->f_mode & FMODE_READ) {
2001 if (!dmabuf->ready && prog_dmabuf(state, 1))
2002 {
2003 up(&state->sem);
2004 return 0;
2005 }
2006 poll_wait(file, &dmabuf->wait, wait);
2007 }
2008
2009 up(&state->sem);
2010
2011 spin_lock_irqsave(&state->card->lock, flags);
2012 trident_update_ptr(state);
2013 if (file->f_mode & FMODE_READ) {
2014 if (dmabuf->count >= (signed)dmabuf->fragsize)
2015 mask |= POLLIN | POLLRDNORM;
2016 }
2017 if (file->f_mode & FMODE_WRITE) {
2018 if (dmabuf->mapped) {
2019 if (dmabuf->count >= (signed)dmabuf->fragsize)
2020 mask |= POLLOUT | POLLWRNORM;
2021 } else {
2022 if ((signed)dmabuf->dmasize >= dmabuf->count + (signed)dmabuf->fragsize)
2023 mask |= POLLOUT | POLLWRNORM;
2024 }
2025 }
2026 spin_unlock_irqrestore(&state->card->lock, flags);
2027
2028 return mask;
2029 }
2030
2031 static int trident_mmap(struct file *file, struct vm_area_struct *vma)
2032 {
2033 struct trident_state *state = (struct trident_state *)file->private_data;
2034 struct dmabuf *dmabuf = &state->dmabuf;
2035 int ret = -EINVAL;
2036 unsigned long size;
2037
2038 VALIDATE_STATE(state);
2039 lock_kernel();
2040
2041 /*
2042 * Lock against poll read write or mmap creating buffers. Also lock
2043 * a read or write against an mmap.
2044 */
2045
2046 down(&state->sem);
2047
2048 if (vma->vm_flags & VM_WRITE) {
2049 if ((ret = prog_dmabuf(state, 0)) != 0)
2050 goto out;
2051 } else if (vma->vm_flags & VM_READ) {
2052 if ((ret = prog_dmabuf(state, 1)) != 0)
2053 goto out;
2054 } else
2055 goto out;
2056
2057 ret = -EINVAL;
2058 if (vma->vm_pgoff != 0)
2059 goto out;
2060 size = vma->vm_end - vma->vm_start;
2061 if (size > (PAGE_SIZE << dmabuf->buforder))
2062 goto out;
2063 ret = -EAGAIN;
2064 if (remap_page_range(vma->vm_start, virt_to_phys(dmabuf->rawbuf),
2065 size, vma->vm_page_prot))
2066 goto out;
2067 dmabuf->mapped = 1;
2068 ret = 0;
2069 out:
2070 up(&state->sem);
2071 unlock_kernel();
2072 return ret;
2073 }
2074
2075 static int trident_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2076 {
2077 struct trident_state *state = (struct trident_state *)file->private_data;
2078 struct dmabuf *dmabuf = &state->dmabuf;
2079 unsigned long flags;
2080 audio_buf_info abinfo;
2081 count_info cinfo;
2082 int val, mapped, ret = 0;
2083
2084 struct trident_card *card = state->card;
2085
2086 VALIDATE_STATE(state);
2087 mapped = ((file->f_mode & FMODE_WRITE) && dmabuf->mapped) ||
2088 ((file->f_mode & FMODE_READ) && dmabuf->mapped);
2089 #ifdef DEBUG
2090 printk("trident: trident_ioctl, command = %2d, arg = 0x%08x\n",
2091 _IOC_NR(cmd), arg ? *(int *)arg : 0);
2092 #endif
2093
2094 switch (cmd)
2095 {
2096 case OSS_GETVERSION:
2097 ret = put_user(SOUND_VERSION, (int *)arg);
2098 break;
2099
2100 case SNDCTL_DSP_RESET:
2101 /* FIXME: spin_lock ? */
2102 if (file->f_mode & FMODE_WRITE) {
2103 stop_dac(state);
2104 synchronize_irq();
2105 dmabuf->ready = 0;
2106 dmabuf->swptr = dmabuf->hwptr = 0;
2107 dmabuf->count = dmabuf->total_bytes = 0;
2108 }
2109 if (file->f_mode & FMODE_READ) {
2110 stop_adc(state);
2111 synchronize_irq();
2112 dmabuf->ready = 0;
2113 dmabuf->swptr = dmabuf->hwptr = 0;
2114 dmabuf->count = dmabuf->total_bytes = 0;
2115 }
2116 break;
2117
2118 case SNDCTL_DSP_SYNC:
2119 if (file->f_mode & FMODE_WRITE)
2120 ret = drain_dac(state, file->f_flags & O_NONBLOCK);
2121 break;
2122
2123 case SNDCTL_DSP_SPEED: /* set smaple rate */
2124 if (get_user(val, (int *)arg))
2125 {
2126 ret = -EFAULT;
2127 break;
2128 }
2129 if (val >= 0) {
2130 if (file->f_mode & FMODE_WRITE) {
2131 stop_dac(state);
2132 dmabuf->ready = 0;
2133 spin_lock_irqsave(&state->card->lock, flags);
2134 trident_set_dac_rate(state, val);
2135 spin_unlock_irqrestore(&state->card->lock, flags);
2136 }
2137 if (file->f_mode & FMODE_READ) {
2138 stop_adc(state);
2139 dmabuf->ready = 0;
2140 spin_lock_irqsave(&state->card->lock, flags);
2141 trident_set_adc_rate(state, val);
2142 spin_unlock_irqrestore(&state->card->lock, flags);
2143 }
2144 }
2145 ret = put_user(dmabuf->rate, (int *)arg);
2146 break;
2147
2148 case SNDCTL_DSP_STEREO: /* set stereo or mono channel */
2149 if (get_user(val, (int *)arg))
2150 {
2151 ret = -EFAULT;
2152 break;
2153 }
2154 lock_set_fmt(state);
2155 if (file->f_mode & FMODE_WRITE) {
2156 stop_dac(state);
2157 dmabuf->ready = 0;
2158 if (val)
2159 dmabuf->fmt |= TRIDENT_FMT_STEREO;
2160 else
2161 dmabuf->fmt &= ~TRIDENT_FMT_STEREO;
2162 }
2163 if (file->f_mode & FMODE_READ) {
2164 stop_adc(state);
2165 dmabuf->ready = 0;
2166 if (val)
2167 dmabuf->fmt |= TRIDENT_FMT_STEREO;
2168 else
2169 dmabuf->fmt &= ~TRIDENT_FMT_STEREO;
2170 }
2171 unlock_set_fmt(state);
2172 break;
2173
2174 case SNDCTL_DSP_GETBLKSIZE:
2175 if (file->f_mode & FMODE_WRITE) {
2176 if ((val = prog_dmabuf(state, 0)))
2177 ret = val;
2178 else
2179 ret = put_user(dmabuf->fragsize, (int *)arg);
2180 break;
2181 }
2182 if (file->f_mode & FMODE_READ) {
2183 if ((val = prog_dmabuf(state, 1)))
2184 ret = val;
2185 else
2186 ret = put_user(dmabuf->fragsize, (int *)arg);
2187 break;
2188 }
2189
2190 case SNDCTL_DSP_GETFMTS: /* Returns a mask of supported sample format*/
2191 ret = put_user(AFMT_S16_LE|AFMT_U16_LE|AFMT_S8|AFMT_U8, (int *)arg);
2192 break;
2193
2194 case SNDCTL_DSP_SETFMT: /* Select sample format */
2195 if (get_user(val, (int *)arg))
2196 {
2197 ret = -EFAULT;
2198 break;
2199 }
2200 lock_set_fmt(state);
2201 if (val != AFMT_QUERY) {
2202 if (file->f_mode & FMODE_WRITE) {
2203 stop_dac(state);
2204 dmabuf->ready = 0;
2205 if (val == AFMT_S16_LE)
2206 dmabuf->fmt |= TRIDENT_FMT_16BIT;
2207 else
2208 dmabuf->fmt &= ~TRIDENT_FMT_16BIT;
2209 }
2210 if (file->f_mode & FMODE_READ) {
2211 stop_adc(state);
2212 dmabuf->ready = 0;
2213 if (val == AFMT_S16_LE)
2214 dmabuf->fmt |= TRIDENT_FMT_16BIT;
2215 else
2216 dmabuf->fmt &= ~TRIDENT_FMT_16BIT;
2217 }
2218 }
2219 unlock_set_fmt(state);
2220 ret = put_user((dmabuf->fmt & TRIDENT_FMT_16BIT) ?
2221 AFMT_S16_LE : AFMT_U8, (int *)arg);
2222 break;
2223
2224 case SNDCTL_DSP_CHANNELS:
2225 if (get_user(val, (int *)arg))
2226 {
2227 ret = -EFAULT;
2228 break;
2229 }
2230 if (val != 0) {
2231 lock_set_fmt(state);
2232 if (file->f_mode & FMODE_WRITE) {
2233 stop_dac(state);
2234 dmabuf->ready = 0;
2235
2236 //prevent from memory leak
2237 if ((state->chans_num > 2) && (state->chans_num != val)) {
2238 ali_free_other_states_resources(state);
2239 state->chans_num = 1;
2240 }
2241
2242 if (val >= 2)
2243 {
2244
2245 dmabuf->fmt |= TRIDENT_FMT_STEREO;
2246 if ((val == 6) && (state->card->pci_id == PCI_DEVICE_ID_ALI_5451)) {
2247
2248 if( card->rec_channel_use_count > 0 )
2249 {
2250 printk(KERN_ERR "trident: Record is working on the card!\n");
2251 ret = -EBUSY;
2252 break;
2253 }
2254
2255 ret = ali_setup_multi_channels(state->card, 6);
2256 if (ret < 0) {
2257 unlock_set_fmt(state);
2258 break;
2259 }
2260 down(&state->card->open_sem);
2261 ret = ali_allocate_other_states_resources(state, 6);
2262 if (ret < 0) {
2263 up(&state->card->open_sem);
2264 unlock_set_fmt(state);
2265 break;
2266 }
2267 state->card->multi_channel_use_count ++;
2268 up(&state->card->open_sem);
2269 }
2270 else val = 2; /*yield to 2-channels*/
2271 }
2272 else
2273 dmabuf->fmt &= ~TRIDENT_FMT_STEREO;
2274 state->chans_num = val;
2275 }
2276 if (file->f_mode & FMODE_READ) {
2277 stop_adc(state);
2278 dmabuf->ready = 0;
2279 if (val >= 2) {
2280 if (!((file->f_mode & FMODE_WRITE) && (val == 6)))
2281 val = 2;
2282 dmabuf->fmt |= TRIDENT_FMT_STEREO;
2283 }
2284 else
2285 dmabuf->fmt &= ~TRIDENT_FMT_STEREO;
2286 state->chans_num = val;
2287 }
2288 unlock_set_fmt(state);
2289 }
2290 ret = put_user(val, (int *)arg);
2291 break;
2292
2293 case SNDCTL_DSP_POST:
2294 /* Cause the working fragment to be output */
2295 break;
2296
2297 case SNDCTL_DSP_SUBDIVIDE:
2298 if (dmabuf->subdivision)
2299 {
2300 ret = -EINVAL;
2301 break;
2302 }
2303 if (get_user(val, (int *)arg))
2304 {
2305 ret = -EFAULT;
2306 break;
2307 }
2308 if (val != 1 && val != 2 && val != 4)
2309 {
2310 ret = -EINVAL;
2311 break;
2312 }
2313 dmabuf->subdivision = val;
2314 break;
2315
2316 case SNDCTL_DSP_SETFRAGMENT:
2317 if (get_user(val, (int *)arg))
2318 {
2319 ret = -EFAULT;
2320 break;
2321 }
2322
2323 dmabuf->ossfragshift = val & 0xffff;
2324 dmabuf->ossmaxfrags = (val >> 16) & 0xffff;
2325 if (dmabuf->ossfragshift < 4)
2326 dmabuf->ossfragshift = 4;
2327 if (dmabuf->ossfragshift > 15)
2328 dmabuf->ossfragshift = 15;
2329 if (dmabuf->ossmaxfrags < 4)
2330 dmabuf->ossmaxfrags = 4;
2331
2332 break;
2333
2334 case SNDCTL_DSP_GETOSPACE:
2335 if (!(file->f_mode & FMODE_WRITE))
2336 {
2337 ret = -EINVAL;
2338 break;
2339 }
2340 if (!dmabuf->ready && (val = prog_dmabuf(state, 0)) != 0)
2341 {
2342 ret = val;
2343 break;
2344 }
2345 spin_lock_irqsave(&state->card->lock, flags);
2346 trident_update_ptr(state);
2347 abinfo.fragsize = dmabuf->fragsize;
2348 abinfo.bytes = dmabuf->dmasize - dmabuf->count;
2349 abinfo.fragstotal = dmabuf->numfrag;
2350 abinfo.fragments = abinfo.bytes >> dmabuf->fragshift;
2351 spin_unlock_irqrestore(&state->card->lock, flags);
2352 ret = copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2353 break;
2354
2355 case SNDCTL_DSP_GETISPACE:
2356 if (!(file->f_mode & FMODE_READ))
2357 {
2358 ret = -EINVAL;
2359 break;
2360 }
2361 if (!dmabuf->ready && (val = prog_dmabuf(state, 1)) != 0)
2362 {
2363 ret = val;
2364 break;
2365 }
2366 spin_lock_irqsave(&state->card->lock, flags);
2367 trident_update_ptr(state);
2368 abinfo.fragsize = dmabuf->fragsize;
2369 abinfo.bytes = dmabuf->count;
2370 abinfo.fragstotal = dmabuf->numfrag;
2371 abinfo.fragments = abinfo.bytes >> dmabuf->fragshift;
2372 spin_unlock_irqrestore(&state->card->lock, flags);
2373 ret = copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2374 break;
2375
2376 case SNDCTL_DSP_NONBLOCK:
2377 file->f_flags |= O_NONBLOCK;
2378 break;
2379
2380 case SNDCTL_DSP_GETCAPS:
2381 ret = put_user(DSP_CAP_REALTIME|DSP_CAP_TRIGGER|DSP_CAP_MMAP|DSP_CAP_BIND,
2382 (int *)arg);
2383 break;
2384
2385 case SNDCTL_DSP_GETTRIGGER:
2386 val = 0;
2387 if ((file->f_mode & FMODE_READ) && dmabuf->enable)
2388 val |= PCM_ENABLE_INPUT;
2389 if ((file->f_mode & FMODE_WRITE) && dmabuf->enable)
2390 val |= PCM_ENABLE_OUTPUT;
2391 ret = put_user(val, (int *)arg);
2392 break;
2393
2394 case SNDCTL_DSP_SETTRIGGER:
2395 if (get_user(val, (int *)arg))
2396 {
2397 ret = -EFAULT;
2398 break;
2399 }
2400 if (file->f_mode & FMODE_READ) {
2401 if (val & PCM_ENABLE_INPUT) {
2402 if (!dmabuf->ready && (ret = prog_dmabuf(state, 1)))
2403 break;
2404 start_adc(state);
2405 } else
2406 stop_adc(state);
2407 }
2408 if (file->f_mode & FMODE_WRITE) {
2409 if (val & PCM_ENABLE_OUTPUT) {
2410 if (!dmabuf->ready && (ret = prog_dmabuf(state, 0)))
2411 break;
2412 start_dac(state);
2413 } else
2414 stop_dac(state);
2415 }
2416 break;
2417
2418 case SNDCTL_DSP_GETIPTR:
2419 if (!(file->f_mode & FMODE_READ))
2420 {
2421 ret = -EINVAL;
2422 break;
2423 }
2424 if (!dmabuf->ready && (val = prog_dmabuf(state, 1)) != 0)
2425 {
2426 ret = val;
2427 break;
2428 }
2429 spin_lock_irqsave(&state->card->lock, flags);
2430 trident_update_ptr(state);
2431 cinfo.bytes = dmabuf->total_bytes;
2432 cinfo.blocks = dmabuf->count >> dmabuf->fragshift;
2433 cinfo.ptr = dmabuf->hwptr;
2434 if (dmabuf->mapped)
2435 dmabuf->count &= dmabuf->fragsize-1;
2436 spin_unlock_irqrestore(&state->card->lock, flags);
2437 ret = copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
2438 break;
2439
2440 case SNDCTL_DSP_GETOPTR:
2441 if (!(file->f_mode & FMODE_WRITE))
2442 {
2443 ret = -EINVAL;
2444 break;
2445 }
2446 if (!dmabuf->ready && (val = prog_dmabuf(state, 0)) != 0)
2447 {
2448 ret = val;
2449 break;
2450 }
2451
2452 spin_lock_irqsave(&state->card->lock, flags);
2453 trident_update_ptr(state);
2454 cinfo.bytes = dmabuf->total_bytes;
2455 cinfo.blocks = dmabuf->count >> dmabuf->fragshift;
2456 cinfo.ptr = dmabuf->hwptr;
2457 if (dmabuf->mapped)
2458 dmabuf->count &= dmabuf->fragsize-1;
2459 spin_unlock_irqrestore(&state->card->lock, flags);
2460 ret = copy_to_user((void *)arg, &cinfo, sizeof(cinfo))?-EFAULT:0;
2461 break;
2462
2463 case SNDCTL_DSP_SETDUPLEX:
2464 ret = -EINVAL;
2465 break;
2466
2467 case SNDCTL_DSP_GETODELAY:
2468 if (!(file->f_mode & FMODE_WRITE))
2469 {
2470 ret = -EINVAL;
2471 break;
2472 }
2473 if (!dmabuf->ready && (val = prog_dmabuf(state, 0)) != 0)
2474 {
2475 ret = val;
2476 break;
2477 }
2478 spin_lock_irqsave(&state->card->lock, flags);
2479 trident_update_ptr(state);
2480 val = dmabuf->count;
2481 spin_unlock_irqrestore(&state->card->lock, flags);
2482 ret = put_user(val, (int *)arg);
2483 break;
2484
2485 case SOUND_PCM_READ_RATE:
2486 ret = put_user(dmabuf->rate, (int *)arg);
2487 break;
2488
2489 case SOUND_PCM_READ_CHANNELS:
2490 ret = put_user((dmabuf->fmt & TRIDENT_FMT_STEREO) ? 2 : 1,
2491 (int *)arg);
2492 break;
2493
2494 case SOUND_PCM_READ_BITS:
2495 ret = put_user((dmabuf->fmt & TRIDENT_FMT_16BIT) ?
2496 AFMT_S16_LE : AFMT_U8, (int *)arg);
2497 break;
2498
2499 case SNDCTL_DSP_GETCHANNELMASK:
2500 ret = put_user(DSP_BIND_FRONT|DSP_BIND_SURR|DSP_BIND_CENTER_LFE,
2501 (int *)arg);
2502 break;
2503
2504 case SNDCTL_DSP_BIND_CHANNEL:
2505 if (state->card->pci_id != PCI_DEVICE_ID_SI_7018)
2506 {
2507 ret = -EINVAL;
2508 break;
2509 }
2510
2511 if (get_user(val, (int *)arg))
2512 {
2513 ret = -EFAULT;
2514 break;
2515 }
2516 if (val == DSP_BIND_QUERY) {
2517 val = dmabuf->channel->attribute | 0x3c00;
2518 val = attr2mask[val >> 8];
2519 } else {
2520 dmabuf->ready = 0;
2521 if (file->f_mode & FMODE_READ)
2522 dmabuf->channel->attribute = (CHANNEL_REC|SRC_ENABLE);
2523 if (file->f_mode & FMODE_WRITE)
2524 dmabuf->channel->attribute = (CHANNEL_SPC_PB|SRC_ENABLE);
2525 dmabuf->channel->attribute |= mask2attr[ffs(val)];
2526 }
2527 ret = put_user(val, (int *)arg);
2528 break;
2529
2530 case SNDCTL_DSP_MAPINBUF:
2531 case SNDCTL_DSP_MAPOUTBUF:
2532 case SNDCTL_DSP_SETSYNCRO:
2533 case SOUND_PCM_WRITE_FILTER:
2534 case SOUND_PCM_READ_FILTER:
2535 default:
2536 ret = -EINVAL;
2537 break;
2538
2539 }
2540 return ret;
2541 }
2542
2543 static int trident_open(struct inode *inode, struct file *file)
2544 {
2545 int i = 0;
2546 int minor = MINOR(inode->i_rdev);
2547 struct trident_card *card = devs;
2548 struct trident_state *state = NULL;
2549 struct dmabuf *dmabuf = NULL;
2550
2551 /* Added by Matt Wu 01-05-2001 */
2552 if(file->f_mode & FMODE_READ)
2553 {
2554 if(card->pci_id == PCI_DEVICE_ID_ALI_5451) {
2555 if (card->multi_channel_use_count > 0)
2556 return -EBUSY;
2557 }
2558 }
2559
2560 /* find an available virtual channel (instance of /dev/dsp) */
2561 while (card != NULL) {
2562 down(&card->open_sem);
2563 if(file->f_mode & FMODE_READ)
2564 {
2565 /* Skip opens on cards that are in 6 channel mode */
2566 if (card->multi_channel_use_count > 0)
2567 {
2568 up(&card->open_sem);
2569 card = card->next;
2570 continue;
2571 }
2572 }
2573 for (i = 0; i < NR_HW_CH; i++) {
2574 if (card->states[i] == NULL) {
2575 state = card->states[i] = (struct trident_state *)
2576 kmalloc(sizeof(struct trident_state), GFP_KERNEL);
2577 if (state == NULL) {
2578 return -ENOMEM;
2579 }
2580 memset(state, 0, sizeof(struct trident_state));
2581 init_MUTEX(&state->sem);
2582 dmabuf = &state->dmabuf;
2583 goto found_virt;
2584 }
2585 }
2586 up(&card->open_sem);
2587 card = card->next;
2588 }
2589 /* no more virtual channel avaiable */
2590 if (!state) {
2591 return -ENODEV;
2592 }
2593 found_virt:
2594 /* found a free virtual channel, allocate hardware channels */
2595 if(file->f_mode & FMODE_READ)
2596 dmabuf->channel = card->alloc_rec_pcm_channel(card);
2597 else
2598 dmabuf->channel = card->alloc_pcm_channel(card);
2599
2600 if (dmabuf->channel == NULL) {
2601 kfree (card->states[i]);
2602 card->states[i] = NULL;
2603 return -ENODEV;
2604 }
2605
2606 /* initialize the virtual channel */
2607 state->virt = i;
2608 state->card = card;
2609 state->magic = TRIDENT_STATE_MAGIC;
2610 init_waitqueue_head(&dmabuf->wait);
2611 file->private_data = state;
2612
2613 /* set default sample format. According to OSS Programmer's Guide /dev/dsp
2614 should be default to unsigned 8-bits, mono, with sample rate 8kHz and
2615 /dev/dspW will accept 16-bits sample */
2616 if (file->f_mode & FMODE_WRITE) {
2617 dmabuf->fmt &= ~TRIDENT_FMT_MASK;
2618 if ((minor & 0x0f) == SND_DEV_DSP16)
2619 dmabuf->fmt |= TRIDENT_FMT_16BIT;
2620 dmabuf->ossfragshift = 0;
2621 dmabuf->ossmaxfrags = 0;
2622 dmabuf->subdivision = 0;
2623 if (card->pci_id == PCI_DEVICE_ID_SI_7018) {
2624 /* set default channel attribute to normal playback */
2625 dmabuf->channel->attribute = CHANNEL_PB;
2626 }
2627 trident_set_dac_rate(state, 8000);
2628 }
2629
2630 if (file->f_mode & FMODE_READ) {
2631 /* FIXME: Trident 4d can only record in signed 16-bits stereo, 48kHz sample,
2632 to be dealed with in trident_set_adc_rate() ?? */
2633 dmabuf->fmt &= ~TRIDENT_FMT_MASK;
2634 if ((minor & 0x0f) == SND_DEV_DSP16)
2635 dmabuf->fmt |= TRIDENT_FMT_16BIT;
2636 dmabuf->ossfragshift = 0;
2637 dmabuf->ossmaxfrags = 0;
2638 dmabuf->subdivision = 0;
2639 if (card->pci_id == PCI_DEVICE_ID_SI_7018) {
2640 /* set default channel attribute to 0x8a80, record from
2641 PCM L/R FIFO and mono = (left + right + 1)/2*/
2642 dmabuf->channel->attribute =
2643 (CHANNEL_REC|PCM_LR|MONO_MIX);
2644 }
2645 trident_set_adc_rate(state, 8000);
2646
2647 /* Added by Matt Wu 01-05-2001 */
2648 if(card->pci_id == PCI_DEVICE_ID_ALI_5451)
2649 card->rec_channel_use_count ++;
2650 }
2651
2652 state->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
2653 up(&card->open_sem);
2654
2655 #ifdef DEBUG
2656 printk(KERN_ERR "trident: open virtual channel %d, hard channel %d\n",
2657 state->virt, dmabuf->channel->num);
2658 #endif
2659
2660 return 0;
2661 }
2662
2663 static int trident_release(struct inode *inode, struct file *file)
2664 {
2665 struct trident_state *state = (struct trident_state *)file->private_data;
2666 struct trident_card *card;
2667 struct dmabuf *dmabuf;
2668 unsigned long flags;
2669
2670 lock_kernel();
2671 card = state->card;
2672 dmabuf = &state->dmabuf;
2673 VALIDATE_STATE(state);
2674
2675 if (file->f_mode & FMODE_WRITE) {
2676 trident_clear_tail(state);
2677 drain_dac(state, file->f_flags & O_NONBLOCK);
2678 }
2679
2680 #ifdef DEBUG
2681 printk(KERN_ERR "trident: closing virtual channel %d, hard channel %d\n",
2682 state->virt, dmabuf->channel->num);
2683 #endif
2684
2685 /* stop DMA state machine and free DMA buffers/channels */
2686 down(&card->open_sem);
2687
2688 if (file->f_mode & FMODE_WRITE) {
2689 stop_dac(state);
2690 lock_set_fmt(state);
2691
2692 unlock_set_fmt(state);
2693 dealloc_dmabuf(state);
2694 state->card->free_pcm_channel(state->card, dmabuf->channel->num);
2695
2696 /* Added by Matt Wu */
2697 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
2698 if (state->chans_num > 2) {
2699 if (card->multi_channel_use_count-- < 0)
2700 card->multi_channel_use_count = 0;
2701 if (card->multi_channel_use_count == 0)
2702 ali_close_multi_channels();
2703 ali_free_other_states_resources(state);
2704 }
2705 }
2706 }
2707 if (file->f_mode & FMODE_READ) {
2708 stop_adc(state);
2709 dealloc_dmabuf(state);
2710 state->card->free_pcm_channel(state->card, dmabuf->channel->num);
2711
2712 /* Added by Matt Wu */
2713 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
2714 if( card->rec_channel_use_count-- < 0 )
2715 card->rec_channel_use_count = 0;
2716 }
2717 }
2718
2719 card->states[state->virt] = NULL;
2720 kfree(state);
2721
2722 /* we're covered by the open_sem */
2723 up(&card->open_sem);
2724 unlock_kernel();
2725
2726 return 0;
2727 }
2728
2729 static /*const*/ struct file_operations trident_audio_fops = {
2730 owner: THIS_MODULE,
2731 llseek: no_llseek,
2732 read: trident_read,
2733 write: trident_write,
2734 poll: trident_poll,
2735 ioctl: trident_ioctl,
2736 mmap: trident_mmap,
2737 open: trident_open,
2738 release: trident_release,
2739 };
2740
2741 /* trident specific AC97 functions */
2742 /* Write AC97 codec registers */
2743 static void trident_ac97_set(struct ac97_codec *codec, u8 reg, u16 val)
2744 {
2745 struct trident_card *card = (struct trident_card *)codec->private_data;
2746 unsigned int address, mask, busy;
2747 unsigned short count = 0xffff;
2748 unsigned long flags;
2749 u32 data;
2750
2751 data = ((u32) val) << 16;
2752
2753 switch (card->pci_id)
2754 {
2755 default:
2756 case PCI_DEVICE_ID_SI_7018:
2757 address = SI_AC97_WRITE;
2758 mask = SI_AC97_BUSY_WRITE | SI_AC97_AUDIO_BUSY;
2759 if (codec->id)
2760 mask |= SI_AC97_SECONDARY;
2761 busy = SI_AC97_BUSY_WRITE;
2762 break;
2763 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
2764 address = DX_ACR0_AC97_W;
2765 mask = busy = DX_AC97_BUSY_WRITE;
2766 break;
2767 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
2768 address = NX_ACR1_AC97_W;
2769 mask = NX_AC97_BUSY_WRITE;
2770 if (codec->id)
2771 mask |= NX_AC97_WRITE_SECONDARY;
2772 busy = NX_AC97_BUSY_WRITE;
2773 break;
2774 case PCI_DEVICE_ID_INTERG_5050:
2775 address = SI_AC97_WRITE;
2776 mask = busy = SI_AC97_BUSY_WRITE;
2777 if (codec->id)
2778 mask |= SI_AC97_SECONDARY;
2779 break;
2780 }
2781
2782 spin_lock_irqsave(&card->lock, flags);
2783 do {
2784 if ((inw(TRID_REG(card, address)) & busy) == 0)
2785 break;
2786 } while (count--);
2787
2788
2789 data |= (mask | (reg & AC97_REG_ADDR));
2790
2791 if (count == 0) {
2792 printk(KERN_ERR "trident: AC97 CODEC write timed out.\n");
2793 spin_unlock_irqrestore(&card->lock, flags);
2794 return;
2795 }
2796
2797 outl(data, TRID_REG(card, address));
2798 spin_unlock_irqrestore(&card->lock, flags);
2799 }
2800
2801 /* Read AC97 codec registers */
2802 static u16 trident_ac97_get(struct ac97_codec *codec, u8 reg)
2803 {
2804 struct trident_card *card = (struct trident_card *)codec->private_data;
2805 unsigned int address, mask, busy;
2806 unsigned short count = 0xffff;
2807 unsigned long flags;
2808 u32 data;
2809
2810 switch (card->pci_id)
2811 {
2812 default:
2813 case PCI_DEVICE_ID_SI_7018:
2814 address = SI_AC97_READ;
2815 mask = SI_AC97_BUSY_READ | SI_AC97_AUDIO_BUSY;
2816 if (codec->id)
2817 mask |= SI_AC97_SECONDARY;
2818 busy = SI_AC97_BUSY_READ;
2819 break;
2820 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
2821 address = DX_ACR1_AC97_R;
2822 mask = busy = DX_AC97_BUSY_READ;
2823 break;
2824 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
2825 if (codec->id)
2826 address = NX_ACR3_AC97_R_SECONDARY;
2827 else
2828 address = NX_ACR2_AC97_R_PRIMARY;
2829 mask = NX_AC97_BUSY_READ;
2830 busy = NX_AC97_BUSY_READ | NX_AC97_BUSY_DATA;
2831 break;
2832 case PCI_DEVICE_ID_INTERG_5050:
2833 address = SI_AC97_READ;
2834 mask = busy = SI_AC97_BUSY_READ;
2835 if (codec->id)
2836 mask |= SI_AC97_SECONDARY;
2837 break;
2838 }
2839
2840 data = (mask | (reg & AC97_REG_ADDR));
2841
2842 spin_lock_irqsave(&card->lock, flags);
2843 outl(data, TRID_REG(card, address));
2844 do {
2845 data = inl(TRID_REG(card, address));
2846 if ((data & busy) == 0)
2847 break;
2848 } while (count--);
2849 spin_unlock_irqrestore(&card->lock, flags);
2850
2851 if (count == 0) {
2852 printk(KERN_ERR "trident: AC97 CODEC read timed out.\n");
2853 data = 0;
2854 }
2855 return ((u16) (data >> 16));
2856 }
2857
2858 /* Write AC97 codec registers for ALi*/
2859 static void ali_ac97_set(struct trident_card *card, int secondary, u8 reg, u16 val)
2860 {
2861 unsigned int address, mask;
2862 unsigned int wCount1 = 0xffff;
2863 unsigned int wCount2= 0xffff;
2864 unsigned long chk1, chk2;
2865 unsigned long flags;
2866 u32 data;
2867
2868 data = ((u32) val) << 16;
2869
2870 if(!card)
2871 BUG();
2872
2873 address = ALI_AC97_WRITE;
2874 mask = ALI_AC97_WRITE_ACTION | ALI_AC97_AUDIO_BUSY;
2875 if (secondary)
2876 mask |= ALI_AC97_SECONDARY;
2877 if (card->revision == ALI_5451_V02)
2878 mask |= ALI_AC97_WRITE_MIXER_REGISTER;
2879
2880 spin_lock_irqsave(&card->lock, flags);
2881 while (wCount1--) {
2882 if ((inw(TRID_REG(card, address)) & ALI_AC97_BUSY_WRITE) == 0) {
2883 data |= (mask | (reg & AC97_REG_ADDR));
2884
2885 chk1 = inl(TRID_REG(card, ALI_STIMER));
2886 chk2 = inl(TRID_REG(card, ALI_STIMER));
2887 while (wCount2-- && (chk1 == chk2))
2888 chk2 = inl(TRID_REG(card, ALI_STIMER));
2889 if (wCount2 == 0) {
2890 spin_unlock_irqrestore(&card->lock, flags);
2891 return;
2892 }
2893 outl(data, TRID_REG(card, address)); //write!
2894 spin_unlock_irqrestore(&card->lock, flags);
2895 return; //success
2896 }
2897 inw(TRID_REG(card, address)); //wait for a read cycle
2898 }
2899
2900 printk(KERN_ERR "ali: AC97 CODEC write timed out.\n");
2901 spin_unlock_irqrestore(&card->lock, flags);
2902 return;
2903 }
2904
2905 /* Read AC97 codec registers for ALi*/
2906 static u16 ali_ac97_get(struct trident_card *card, int secondary, u8 reg)
2907 {
2908 unsigned int address, mask;
2909 unsigned int wCount1 = 0xffff;
2910 unsigned int wCount2= 0xffff;
2911 unsigned long chk1, chk2;
2912 unsigned long flags;
2913 u32 data;
2914
2915 if(!card)
2916 BUG();
2917
2918 address = ALI_AC97_READ;
2919 if (card->revision == ALI_5451_V02) {
2920 address = ALI_AC97_WRITE;
2921 }
2922 mask = ALI_AC97_READ_ACTION | ALI_AC97_AUDIO_BUSY;
2923 if (secondary)
2924 mask |= ALI_AC97_SECONDARY;
2925
2926 spin_lock_irqsave(&card->lock, flags);
2927 data = (mask | (reg & AC97_REG_ADDR));
2928 while (wCount1--) {
2929 if ((inw(TRID_REG(card, address)) & ALI_AC97_BUSY_READ) == 0) {
2930 chk1 = inl(TRID_REG(card, ALI_STIMER));
2931 chk2 = inl(TRID_REG(card, ALI_STIMER));
2932 while (wCount2-- && (chk1 == chk2))
2933 chk2 = inl(TRID_REG(card, ALI_STIMER));
2934 if (wCount2 == 0) {
2935 printk(KERN_ERR "ali: AC97 CODEC read timed out.\n");
2936 spin_unlock_irqrestore(&card->lock, flags);
2937 return 0;
2938 }
2939 outl(data, TRID_REG(card, address)); //read!
2940 wCount2 = 0xffff;
2941 while (wCount2--) {
2942 if ((inw(TRID_REG(card, address)) & ALI_AC97_BUSY_READ) == 0) {
2943 data = inl(TRID_REG(card, address));
2944 spin_unlock_irqrestore(&card->lock, flags);
2945 return ((u16) (data >> 16));
2946 }
2947 }
2948 }
2949 inw(TRID_REG(card, address)); //wait a read cycle
2950 }
2951 spin_unlock_irqrestore(&card->lock, flags);
2952 printk(KERN_ERR "ali: AC97 CODEC read timed out.\n");
2953 return 0;
2954 }
2955
2956 static void ali_enable_special_channel(struct trident_state *stat)
2957 {
2958 struct trident_card *card = stat->card;
2959 unsigned long s_channels;
2960
2961 s_channels = inl(TRID_REG(card, ALI_GLOBAL_CONTROL));
2962 s_channels |= (1<<stat->dmabuf.channel->num);
2963 outl(s_channels, TRID_REG(card, ALI_GLOBAL_CONTROL));
2964 }
2965
2966 static u16 ali_ac97_read(struct ac97_codec *codec, u8 reg)
2967 {
2968 int id;
2969 u16 data;
2970 struct trident_card *card = NULL;
2971
2972 /* Added by Matt Wu */
2973 if (!codec)
2974 BUG();
2975
2976 card = (struct trident_card *)codec->private_data;
2977
2978 if(!card->mixer_regs_ready)
2979 return ali_ac97_get(card, codec->id, reg);
2980
2981 if(codec->id)
2982 id = 1;
2983 else
2984 id = 0;
2985
2986 data = card->mixer_regs[reg/2][id];
2987 return data;
2988 }
2989
2990 static void ali_ac97_write(struct ac97_codec *codec, u8 reg, u16 val)
2991 {
2992 int id;
2993 struct trident_card *card;
2994
2995 /* Added by Matt Wu */
2996 if (!codec)
2997 BUG();
2998
2999 card = (struct trident_card *)codec->private_data;
3000
3001 if (!card->mixer_regs_ready)
3002 {
3003 ali_ac97_set(card, codec->id, reg, val);
3004 return;
3005 }
3006
3007 if(codec->id)
3008 id = 1;
3009 else
3010 id = 0;
3011
3012 card->mixer_regs[reg/2][id] = val;
3013 ali_ac97_set(card, codec->id, reg, val);
3014 }
3015
3016 /*
3017 flag: ALI_SPDIF_OUT_TO_SPDIF_OUT
3018 ALI_PCM_TO_SPDIF_OUT
3019 */
3020
3021 static void ali_setup_spdif_out(struct trident_card *card, int flag)
3022 {
3023 unsigned long spdif;
3024 unsigned char ch;
3025
3026 char temp;
3027 struct pci_dev *pci_dev = NULL;
3028
3029 pci_dev = pci_find_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, pci_dev);
3030 if (pci_dev == NULL)
3031 return;
3032 pci_read_config_byte(pci_dev, 0x61, &temp);
3033 temp |= 0x40;
3034 pci_write_config_byte(pci_dev, 0x61, temp);
3035 pci_read_config_byte(pci_dev, 0x7d, &temp);
3036 temp |= 0x01;
3037 pci_write_config_byte(pci_dev, 0x7d, temp);
3038 pci_read_config_byte(pci_dev, 0x7e, &temp);
3039 temp &= (~0x20);
3040 temp |= 0x10;
3041 pci_write_config_byte(pci_dev, 0x7e, temp);
3042
3043 ch = inb(TRID_REG(card, ALI_SCTRL));
3044 outb(ch | ALI_SPDIF_OUT_ENABLE, TRID_REG(card, ALI_SCTRL));
3045 ch = inb(TRID_REG(card, ALI_SPDIF_CTRL));
3046 outb(ch & ALI_SPDIF_OUT_CH_STATUS, TRID_REG(card, ALI_SPDIF_CTRL));
3047
3048 if (flag & ALI_SPDIF_OUT_TO_SPDIF_OUT) {
3049 spdif = inw(TRID_REG(card, ALI_GLOBAL_CONTROL));
3050 spdif |= ALI_SPDIF_OUT_CH_ENABLE;
3051 spdif &= ALI_SPDIF_OUT_SEL_SPDIF;
3052 outw(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL));
3053 spdif = inw(TRID_REG(card, ALI_SPDIF_CS));
3054 if (flag & ALI_SPDIF_OUT_NON_PCM)
3055 spdif |= 0x0002;
3056 else spdif &= (~0x0002);
3057 outw(spdif, TRID_REG(card, ALI_SPDIF_CS));
3058 }
3059 else {
3060 spdif = inw(TRID_REG(card, ALI_GLOBAL_CONTROL));
3061 spdif |= ALI_SPDIF_OUT_SEL_PCM;
3062 outw(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL));
3063 }
3064 }
3065
3066 static void ali_disable_special_channel(struct trident_card *card, int ch)
3067 {
3068 unsigned long sc;
3069
3070 sc = inl(TRID_REG(card, ALI_GLOBAL_CONTROL));
3071 sc &= ~(1 << ch);
3072 outl(sc, TRID_REG(card, ALI_GLOBAL_CONTROL));
3073 }
3074
3075 static void ali_disable_spdif_in(struct trident_card *card)
3076 {
3077 unsigned long spdif;
3078
3079 spdif = inl(TRID_REG(card, ALI_GLOBAL_CONTROL));
3080 spdif &= (~ALI_SPDIF_IN_SUPPORT);
3081 outl(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL));
3082
3083 ali_disable_special_channel(card, ALI_SPDIF_IN_CHANNEL);
3084 }
3085
3086 static void ali_setup_spdif_in(struct trident_card *card)
3087 {
3088 unsigned long spdif;
3089
3090 //Set SPDIF IN Supported
3091 spdif = inl(TRID_REG(card, ALI_GLOBAL_CONTROL));
3092 spdif |= ALI_SPDIF_IN_SUPPORT;
3093 outl(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL));
3094
3095 //Set SPDIF IN Rec
3096 spdif = inl(TRID_REG(card, ALI_GLOBAL_CONTROL));
3097 spdif |= ALI_SPDIF_IN_CH_ENABLE;
3098 outl(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL));
3099
3100 spdif = inb(TRID_REG(card, ALI_SPDIF_CTRL));
3101 spdif |= ALI_SPDIF_IN_CH_STATUS;
3102 outb(spdif, TRID_REG(card, ALI_SPDIF_CTRL));
3103 /*
3104 spdif = inb(TRID_REG(card, ALI_SPDIF_CTRL));
3105 spdif |= ALI_SPDIF_IN_FUNC_ENABLE;
3106 outb(spdif, TRID_REG(card, ALI_SPDIF_CTRL));
3107 */
3108 }
3109
3110 static void ali_delay(struct trident_card *card,int interval)
3111 {
3112 unsigned long begintimer,currenttimer;
3113
3114 begintimer = inl(TRID_REG(card, ALI_STIMER));
3115 currenttimer = inl(TRID_REG(card, ALI_STIMER));
3116
3117 while (currenttimer < begintimer + interval)
3118 currenttimer = inl(TRID_REG(card, ALI_STIMER));
3119 }
3120
3121 static void ali_detect_spdif_rate(struct trident_card *card)
3122 {
3123 u16 wval = 0;
3124 u16 count = 0;
3125 u8 bval = 0, R1 = 0, R2 = 0;
3126
3127 bval = inb(TRID_REG(card,ALI_SPDIF_CTRL));
3128 bval |= 0x02;
3129 outb(bval,TRID_REG(card,ALI_SPDIF_CTRL));
3130
3131 bval = inb(TRID_REG(card,ALI_SPDIF_CTRL + 1));
3132 bval |= 0x1F;
3133 outb(bval,TRID_REG(card,ALI_SPDIF_CTRL + 1));
3134
3135 while (((R1 < 0x0B )||(R1 > 0x0E)) && (R1 != 0x12) && count <= 50000)
3136 {
3137 count ++;
3138
3139 ali_delay(card, 6);
3140
3141 bval = inb(TRID_REG(card,ALI_SPDIF_CTRL + 1));
3142 R1 = bval & 0x1F;
3143 }
3144
3145 if (count > 50000)
3146 {
3147 printk(KERN_WARNING "trident: Error in ali_detect_spdif_rate!\n");
3148 return;
3149 }
3150
3151 count = 0;
3152
3153 while (count <= 50000)
3154 {
3155 count ++;
3156
3157 ali_delay(card, 6);
3158
3159 bval = inb(TRID_REG(card,ALI_SPDIF_CTRL + 1));
3160 R2 = bval & 0x1F;
3161
3162 if(R2 != R1)
3163 R1 = R2;
3164 else
3165 break;
3166 }
3167
3168 if (count > 50000)
3169 {
3170 printk(KERN_WARNING "trident: Error in ali_detect_spdif_rate!\n");
3171 return;
3172 }
3173
3174 switch (R2)
3175 {
3176 case 0x0b:
3177 case 0x0c:
3178 case 0x0d:
3179 case 0x0e:
3180 wval = inw(TRID_REG(card,ALI_SPDIF_CTRL + 2));
3181 wval &= 0xE0F0;
3182 wval |= (u16)0x09 << 8 | (u16)0x05;
3183 outw(wval,TRID_REG(card,ALI_SPDIF_CTRL + 2));
3184
3185 bval = inb(TRID_REG(card,ALI_SPDIF_CS +3)) & 0xF0;
3186 outb(bval|0x02,TRID_REG(card,ALI_SPDIF_CS + 3));
3187 break;
3188
3189 case 0x12:
3190 wval = inw(TRID_REG(card,ALI_SPDIF_CTRL + 2));
3191 wval &= 0xE0F0;
3192 wval |= (u16)0x0E << 8 | (u16)0x08;
3193 outw(wval,TRID_REG(card,ALI_SPDIF_CTRL + 2));
3194
3195 bval = inb(TRID_REG(card,ALI_SPDIF_CS +3)) & 0xF0;
3196 outb(bval|0x03,TRID_REG(card,ALI_SPDIF_CS + 3));
3197 break;
3198
3199 default:
3200 break;
3201 }
3202
3203 }
3204
3205 static unsigned int ali_get_spdif_in_rate(struct trident_card *card)
3206 {
3207 u32 dwRate = 0;
3208 u8 bval = 0;
3209
3210 ali_detect_spdif_rate(card);
3211
3212 bval = inb(TRID_REG(card,ALI_SPDIF_CTRL));
3213 bval &= 0x7F;
3214 bval |= 0x40;
3215 outb(bval,TRID_REG(card,ALI_SPDIF_CTRL));
3216
3217 bval = inb(TRID_REG(card,ALI_SPDIF_CS + 3));
3218 bval &= 0x0F;
3219
3220 switch (bval)
3221 {
3222 case 0:
3223 dwRate = 44100;
3224 break;
3225 case 1:
3226 dwRate = 48000;
3227 break;
3228 case 2:
3229 dwRate = 32000;
3230 break;
3231 default:
3232 // Error occurs
3233 break;
3234 }
3235
3236 return dwRate;
3237
3238 }
3239
3240 static int ali_close_multi_channels(void)
3241 {
3242 char temp = 0;
3243 struct pci_dev *pci_dev = NULL;
3244
3245 pci_dev = pci_find_device(PCI_VENDOR_ID_AL,PCI_DEVICE_ID_AL_M1533, pci_dev);
3246 if (pci_dev == NULL)
3247 return -1;
3248 temp = 0x80;
3249 pci_write_config_byte(pci_dev, 0x59, ~temp);
3250
3251 pci_dev = pci_find_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101, pci_dev);
3252 if (pci_dev == NULL)
3253 return -1;
3254
3255 temp = 0x20;
3256 pci_write_config_byte(pci_dev, 0xB8, ~temp);
3257
3258 return 0;
3259 }
3260
3261 static int ali_setup_multi_channels(struct trident_card *card, int chan_nums)
3262 {
3263 unsigned long dwValue;
3264 char temp = 0;
3265 struct pci_dev *pci_dev = NULL;
3266
3267 pci_dev = pci_find_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, pci_dev);
3268 if (pci_dev == NULL)
3269 return -1;
3270 temp = 0x80;
3271 pci_write_config_byte(pci_dev, 0x59, temp);
3272
3273 pci_dev = pci_find_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101, pci_dev);
3274 if (pci_dev == NULL)
3275 return -1;
3276 temp = 0x20;
3277 pci_write_config_byte(pci_dev, (int)0xB8,(u8) temp);
3278 if (chan_nums == 6) {
3279 dwValue = inl(TRID_REG(card, ALI_SCTRL)) | 0x000f0000;
3280 outl(dwValue, TRID_REG(card, ALI_SCTRL));
3281 mdelay(4);
3282 dwValue = inl(TRID_REG(card, ALI_SCTRL));
3283 if (dwValue & 0x2000000) {
3284 ali_ac97_write(card->ac97_codec[0], 0x02, 8080);
3285 ali_ac97_write(card->ac97_codec[0], 0x36, 0);
3286 ali_ac97_write(card->ac97_codec[0], 0x38, 0);
3287 ali_ac97_write(card->ac97_codec[1], 0x36, 0);
3288 ali_ac97_write(card->ac97_codec[1], 0x38, 0);
3289 ali_ac97_write(card->ac97_codec[1], 0x02, 0x0606);
3290 ali_ac97_write(card->ac97_codec[1], 0x18, 0x0303);
3291 ali_ac97_write(card->ac97_codec[1], 0x74, 0x3);
3292 return 1;
3293 }
3294 }
3295 return -EINVAL;
3296 }
3297
3298 static void ali_free_pcm_channel(struct trident_card *card, unsigned int channel)
3299 {
3300 int bank;
3301
3302 if (channel > 31)
3303 return;
3304
3305 bank = channel >> 5;
3306 channel = channel & 0x1f;
3307
3308 card->banks[bank].bitmap &= ~(1 << (channel));
3309 }
3310
3311 static int ali_allocate_other_states_resources(struct trident_state *state, int chan_nums)
3312 {
3313 struct trident_card *card = state->card;
3314 struct trident_state *s;
3315 int i, state_count = 0;
3316 struct trident_pcm_bank *bank;
3317 struct trident_channel *channel;
3318
3319 bank = &card->banks[BANK_A];
3320
3321 if (chan_nums == 6) {
3322 for(i = 0;(i < ALI_CHANNELS) && (state_count != 4); i++) {
3323 if (!card->states[i]) {
3324 if (!(bank->bitmap & (1 << ali_multi_channels_5_1[state_count]))) {
3325 bank->bitmap |= (1 << ali_multi_channels_5_1[state_count]);
3326 channel = &bank->channels[ali_multi_channels_5_1[state_count]];
3327 channel->num = ali_multi_channels_5_1[state_count];
3328 }
3329 else {
3330 state_count--;
3331 for (; state_count >= 0; state_count--) {
3332 kfree(state->other_states[state_count]);
3333 ali_free_pcm_channel(card, ali_multi_channels_5_1[state_count]);
3334 }
3335 return -EBUSY;
3336 }
3337 s = card->states[i] = (struct trident_state *)
3338 kmalloc(sizeof(struct trident_state), GFP_KERNEL);
3339 if (!s) {
3340 ali_free_pcm_channel(card, ali_multi_channels_5_1[state_count]);
3341 state_count--;
3342 for (; state_count >= 0; state_count--) {
3343 ali_free_pcm_channel(card, ali_multi_channels_5_1[state_count]);
3344 kfree(state->other_states[state_count]);
3345 }
3346 return -ENOMEM;
3347 }
3348 memset(s, 0, sizeof(struct trident_state));
3349
3350 s->dmabuf.channel = channel;
3351 s->dmabuf.ossfragshift = s->dmabuf.ossmaxfrags = s->dmabuf.subdivision = 0;
3352 init_waitqueue_head(&s->dmabuf.wait);
3353 s->magic = card->magic;
3354 s->card = card;
3355 s->virt = i;
3356 ali_enable_special_channel(s);
3357 state->other_states[state_count++] = s;
3358 }
3359 }
3360
3361 if (state_count != 4) {
3362 state_count--;
3363 for (; state_count >= 0; state_count--) {
3364 kfree(state->other_states[state_count]);
3365 ali_free_pcm_channel(card, ali_multi_channels_5_1[state_count]);
3366 }
3367 return -EBUSY;
3368 }
3369 }
3370 return 0;
3371 }
3372
3373 static void ali_save_regs(struct trident_card *card)
3374 {
3375 unsigned long flags;
3376 int i, j;
3377
3378 save_flags(flags);
3379 cli();
3380
3381 ali_registers.global_regs[0x2c] = inl(TRID_REG(card,T4D_MISCINT));
3382 //ali_registers.global_regs[0x20] = inl(TRID_REG(card,T4D_START_A));
3383 ali_registers.global_regs[0x21] = inl(TRID_REG(card,T4D_STOP_A));
3384
3385 //disable all IRQ bits
3386 outl(ALI_DISABLE_ALL_IRQ, TRID_REG(card, T4D_MISCINT));
3387
3388 for (i = 1; i < ALI_MIXER_REGS; i++)
3389 ali_registers.mixer_regs[i] = ali_ac97_read (card->ac97_codec[0], i*2);
3390
3391 for (i = 0; i < ALI_GLOBAL_REGS; i++)
3392 {
3393 if ((i*4 == T4D_MISCINT) || (i*4 == T4D_STOP_A))
3394 continue;
3395 ali_registers.global_regs[i] = inl(TRID_REG(card, i*4));
3396 }
3397
3398 for (i = 0; i < ALI_CHANNELS; i++)
3399 {
3400 outb(i,TRID_REG(card, T4D_LFO_GC_CIR));
3401 for (j = 0; j < ALI_CHANNEL_REGS; j++)
3402 ali_registers.channel_regs[i][j] = inl(TRID_REG(card, j*4 + 0xe0));
3403 }
3404
3405 //Stop all HW channel
3406 outl(ALI_STOP_ALL_CHANNELS, TRID_REG(card, T4D_STOP_A));
3407
3408 restore_flags(flags);
3409 }
3410
3411 static void ali_restore_regs(struct trident_card *card)
3412 {
3413 unsigned long flags;
3414 int i, j;
3415
3416 save_flags(flags);
3417 cli();
3418
3419 for (i = 1; i < ALI_MIXER_REGS; i++)
3420 ali_ac97_write(card->ac97_codec[0], i*2, ali_registers.mixer_regs[i]);
3421
3422 for (i = 0; i < ALI_CHANNELS; i++)
3423 {
3424 outb(i,TRID_REG(card, T4D_LFO_GC_CIR));
3425 for (j = 0; j < ALI_CHANNEL_REGS; j++)
3426 outl(ali_registers.channel_regs[i][j], TRID_REG(card, j*4 + 0xe0));
3427 }
3428
3429 for (i = 0; i < ALI_GLOBAL_REGS; i++)
3430 {
3431 if ((i*4 == T4D_MISCINT) || (i*4 == T4D_STOP_A) || (i*4 == T4D_START_A))
3432 continue;
3433 outl(ali_registers.global_regs[i], TRID_REG(card, i*4));
3434 }
3435
3436 //start HW channel
3437 outl(ali_registers.global_regs[0x20], TRID_REG(card,T4D_START_A));
3438 //restore IRQ enable bits
3439 outl(ali_registers.global_regs[0x2c], TRID_REG(card,T4D_MISCINT));
3440
3441 restore_flags(flags);
3442 }
3443
3444 static int trident_suspend(struct pci_dev *dev, u32 unused)
3445 {
3446 struct trident_card *card = (struct trident_card *) dev;
3447
3448 if(card->pci_id == PCI_DEVICE_ID_ALI_5451) {
3449 ali_save_regs(card);
3450 }
3451 return 0;
3452 }
3453
3454 static int trident_resume(struct pci_dev *dev)
3455 {
3456 struct trident_card *card = (struct trident_card *) dev;
3457
3458 if(card->pci_id == PCI_DEVICE_ID_ALI_5451) {
3459 ali_restore_regs(card);
3460 }
3461 return 0;
3462 }
3463
3464 static struct trident_channel *ali_alloc_pcm_channel(struct trident_card *card)
3465 {
3466 struct trident_pcm_bank *bank;
3467 int idx;
3468
3469 bank = &card->banks[BANK_A];
3470
3471 if (inl(TRID_REG(card, ALI_GLOBAL_CONTROL)) & (ALI_SPDIF_OUT_CH_ENABLE)) {
3472 idx = ALI_SPDIF_OUT_CHANNEL;
3473 if (!(bank->bitmap & (1 << idx))) {
3474 struct trident_channel *channel = &bank->channels[idx];
3475 bank->bitmap |= 1 << idx;
3476 channel->num = idx;
3477 return channel;
3478 }
3479 }
3480
3481 for (idx = ALI_PCM_OUT_CHANNEL_FIRST; idx <= ALI_PCM_OUT_CHANNEL_LAST ; idx++) {
3482 if (!(bank->bitmap & (1 << idx))) {
3483 struct trident_channel *channel = &bank->channels[idx];
3484 bank->bitmap |= 1 << idx;
3485 channel->num = idx;
3486 return channel;
3487 }
3488 }
3489
3490 /* no more free channels avaliable */
3491 // printk(KERN_ERR "ali: no more channels available on Bank A.\n");
3492 return NULL;
3493 }
3494
3495 static struct trident_channel *ali_alloc_rec_pcm_channel(struct trident_card *card)
3496 {
3497 struct trident_pcm_bank *bank;
3498 int idx;
3499
3500 if (inl(TRID_REG(card, ALI_GLOBAL_CONTROL)) & ALI_SPDIF_IN_SUPPORT)
3501 idx = ALI_SPDIF_IN_CHANNEL;
3502 else idx = ALI_PCM_IN_CHANNEL;
3503
3504 bank = &card->banks[BANK_A];
3505
3506 if (!(bank->bitmap & (1 << idx))) {
3507 struct trident_channel *channel = &bank->channels[idx];
3508 bank->bitmap |= 1 << idx;
3509 channel->num = idx;
3510 return channel;
3511 }
3512
3513 /* no free recordable channels avaliable */
3514 // printk(KERN_ERR "ali: no recordable channels available on Bank A.\n");
3515 return NULL;
3516 }
3517
3518 static void ali_set_spdif_out_rate(struct trident_card *card, unsigned int rate)
3519 {
3520 unsigned char ch_st_sel;
3521 unsigned short status_rate;
3522
3523 switch(rate) {
3524 case 44100:
3525 status_rate = 0;
3526 break;
3527 case 32000:
3528 status_rate = 0x300;
3529 break;
3530 case 48000:
3531 default:
3532 status_rate = 0x200;
3533 break;
3534 }
3535
3536 ch_st_sel = inb(TRID_REG(card, ALI_SPDIF_CTRL)) & ALI_SPDIF_OUT_CH_STATUS; //select spdif_out
3537
3538 ch_st_sel |= 0x80; //select right
3539 outb(ch_st_sel, TRID_REG(card, ALI_SPDIF_CTRL));
3540 outb(status_rate | 0x20, TRID_REG(card, ALI_SPDIF_CS + 2));
3541
3542 ch_st_sel &= (~0x80); //select left
3543 outb(ch_st_sel, TRID_REG(card, ALI_SPDIF_CTRL));
3544 outw(status_rate | 0x10, TRID_REG(card, ALI_SPDIF_CS + 2));
3545 }
3546
3547 static void ali_address_interrupt(struct trident_card *card)
3548 {
3549 int i, channel;
3550 struct trident_state *state;
3551 u32 mask, channel_mask;
3552
3553 mask = trident_get_interrupt_mask (card, 0);
3554 for (i = 0; i < NR_HW_CH; i++) {
3555 if ((state = card->states[i]) == NULL)
3556 continue;
3557 channel = state->dmabuf.channel->num;
3558 if ((channel_mask = 1 << channel) & mask) {
3559 mask &= ~channel_mask;
3560 trident_ack_channel_interrupt(card, channel);
3561 udelay(100);
3562 state->dmabuf.update_flag |= ALI_ADDRESS_INT_UPDATE;
3563 trident_update_ptr(state);
3564 }
3565 }
3566 if (mask) {
3567 for (i = 0; i < NR_HW_CH; i++) {
3568 if (mask & (1 << i)) {
3569 printk("ali: spurious channel irq %d.\n", i);
3570 trident_ack_channel_interrupt(card, i);
3571 trident_stop_voice(card, i);
3572 trident_disable_voice_irq(card, i);
3573 }
3574 }
3575 }
3576 }
3577
3578 /* Updating the values of counters of other_states' DMAs without lock
3579 protection is no harm because all DMAs of multi-channels and interrupt
3580 depend on a master state's DMA, and changing the counters of the master
3581 state DMA is protected by a spinlock.
3582 */
3583 static int ali_write_5_1(struct trident_state *state, const char *buf, int cnt_for_multi_channel, unsigned int *copy_count, unsigned int *state_cnt)
3584 {
3585
3586 struct dmabuf *dmabuf = &state->dmabuf;
3587 struct dmabuf *dmabuf_temp;
3588 const char *buffer = buf;
3589 unsigned swptr, other_dma_nums, sample_s;
3590 unsigned int i, loop;
3591
3592 other_dma_nums = 4;
3593 sample_s = sample_size[dmabuf->fmt] >> 1;
3594 swptr = dmabuf->swptr;
3595
3596 if ((i = state->multi_channels_adjust_count) > 0) {
3597 if (i == 1) {
3598 if (copy_from_user(dmabuf->rawbuf + swptr, buffer, sample_s))
3599 return -EFAULT;
3600 seek_offset(swptr, buffer, cnt_for_multi_channel, sample_s, *copy_count);
3601 i--;
3602 (*state_cnt) += sample_s;
3603 state->multi_channels_adjust_count++;
3604 }
3605 else i = i - (state->chans_num - other_dma_nums);
3606 for (; (i < other_dma_nums) && (cnt_for_multi_channel > 0); i++) {
3607 dmabuf_temp = &state->other_states[i]->dmabuf;
3608 if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr, buffer, sample_s))
3609 return -EFAULT;
3610 seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel, sample_s, *copy_count);
3611 }
3612 if (cnt_for_multi_channel == 0)
3613 state->multi_channels_adjust_count += i;
3614 }
3615 if (cnt_for_multi_channel > 0) {
3616 loop = cnt_for_multi_channel / (state->chans_num * sample_s);
3617 for (i = 0; i < loop; i++) {
3618 if (copy_from_user(dmabuf->rawbuf + swptr, buffer, sample_s * 2))
3619 return -EFAULT;
3620 seek_offset(swptr, buffer, cnt_for_multi_channel, sample_s * 2, *copy_count);
3621 (*state_cnt) += (sample_s * 2);
3622
3623 dmabuf_temp = &state->other_states[0]->dmabuf;
3624 if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr, buffer, sample_s))
3625 return -EFAULT;
3626 seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel, sample_s, *copy_count);
3627
3628 dmabuf_temp = &state->other_states[1]->dmabuf;
3629 if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr, buffer, sample_s))
3630 return -EFAULT;
3631 seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel, sample_s, *copy_count);
3632
3633 dmabuf_temp = &state->other_states[2]->dmabuf;
3634 if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr, buffer, sample_s))
3635 return -EFAULT;
3636 seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel, sample_s, *copy_count);
3637
3638 dmabuf_temp = &state->other_states[3]->dmabuf;
3639 if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr, buffer, sample_s))
3640 return -EFAULT;
3641 seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel, sample_s, *copy_count);
3642 }
3643
3644 if (cnt_for_multi_channel > 0) {
3645 state->multi_channels_adjust_count = cnt_for_multi_channel / sample_s;
3646
3647 if (copy_from_user(dmabuf->rawbuf + swptr, buffer, sample_s))
3648 return -EFAULT;
3649 seek_offset(swptr, buffer, cnt_for_multi_channel, sample_s, *copy_count);
3650 (*state_cnt) += sample_s;
3651
3652 if (cnt_for_multi_channel > 0) {
3653 if (copy_from_user(dmabuf->rawbuf + swptr, buffer, sample_s))
3654 return -EFAULT;
3655 seek_offset(swptr, buffer, cnt_for_multi_channel, sample_s, *copy_count);
3656 (*state_cnt) += sample_s;
3657
3658 if (cnt_for_multi_channel > 0) {
3659 loop = state->multi_channels_adjust_count - (state->chans_num - other_dma_nums);
3660 for (i = 0; i < loop; i++) {
3661 dmabuf_temp = &state->other_states[i]->dmabuf;
3662 if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr, buffer, sample_s))
3663 return -EFAULT;
3664 seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel, sample_s, *copy_count);
3665 }
3666 }
3667 }
3668 }
3669 else
3670 state->multi_channels_adjust_count = 0;
3671 }
3672 for (i = 0; i < other_dma_nums; i++) {
3673 dmabuf_temp = &state->other_states[i]->dmabuf;
3674 dmabuf_temp->swptr = dmabuf_temp->swptr % dmabuf_temp->dmasize;
3675 }
3676 return *state_cnt;
3677 }
3678
3679 static void ali_free_other_states_resources(struct trident_state *state)
3680 {
3681 int i;
3682 struct trident_card *card = state->card;
3683 struct trident_state *s;
3684 unsigned other_states_count;
3685
3686 other_states_count = state->chans_num - 2; /* except PCM L/R channels*/
3687 for ( i = 0; i < other_states_count; i++) {
3688 s = state->other_states[i];
3689 dealloc_dmabuf(s);
3690 ali_disable_special_channel(s->card, s->dmabuf.channel->num);
3691 state->card->free_pcm_channel(s->card, s->dmabuf.channel->num);
3692 card->states[s->virt] = NULL;
3693 kfree(s);
3694 }
3695 }
3696
3697 #ifdef CONFIG_PROC_FS
3698 struct proc_dir_entry *res = NULL;
3699 static int ali_write_proc(struct file *file, const char *buffer, unsigned long count, void *data)
3700 {
3701 struct trident_card *card = (struct trident_card *)data;
3702 unsigned long flags;
3703 char c;
3704
3705 if (count<0)
3706 return -EINVAL;
3707 if (count == 0)
3708 return 0;
3709 if (get_user(c, buffer))
3710 return -EFAULT;
3711
3712 spin_lock_irqsave(&card->lock, flags);
3713 switch (c) {
3714 case '0':
3715 ali_setup_spdif_out(card, ALI_PCM_TO_SPDIF_OUT);
3716 ali_disable_special_channel(card, ALI_SPDIF_OUT_CHANNEL);
3717 break;
3718 case '1':
3719 ali_setup_spdif_out(card, ALI_SPDIF_OUT_TO_SPDIF_OUT|ALI_SPDIF_OUT_PCM);
3720 break;
3721 case '2':
3722 ali_setup_spdif_out(card, ALI_SPDIF_OUT_TO_SPDIF_OUT|ALI_SPDIF_OUT_NON_PCM);
3723 break;
3724 case '3':
3725 ali_disable_spdif_in(card); //default
3726 break;
3727 case '4':
3728 ali_setup_spdif_in(card);
3729 break;
3730 }
3731 spin_unlock_irqrestore(&card->lock, flags);
3732
3733 return count;
3734 }
3735 #endif
3736
3737 /* OSS /dev/mixer file operation methods */
3738 static int trident_open_mixdev(struct inode *inode, struct file *file)
3739 {
3740 int i = 0;
3741 int minor = MINOR(inode->i_rdev);
3742 struct trident_card *card = devs;
3743
3744 for (card = devs; card != NULL; card = card->next)
3745 for (i = 0; i < NR_AC97; i++)
3746 if (card->ac97_codec[i] != NULL &&
3747 card->ac97_codec[i]->dev_mixer == minor)
3748 goto match;
3749
3750 if (!card) {
3751 return -ENODEV;
3752 }
3753 match:
3754 file->private_data = card->ac97_codec[i];
3755
3756
3757 return 0;
3758 }
3759
3760 static int trident_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd,
3761 unsigned long arg)
3762 {
3763 struct ac97_codec *codec = (struct ac97_codec *)file->private_data;
3764
3765 return codec->mixer_ioctl(codec, cmd, arg);
3766 }
3767
3768 static /*const*/ struct file_operations trident_mixer_fops = {
3769 owner: THIS_MODULE,
3770 llseek: no_llseek,
3771 ioctl: trident_ioctl_mixdev,
3772 open: trident_open_mixdev,
3773 };
3774
3775 static int ali_reset_5451(struct trident_card *card)
3776 {
3777 struct pci_dev *pci_dev = NULL;
3778 unsigned int dwVal;
3779 unsigned short wCount, wReg;
3780
3781 pci_dev = pci_find_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, pci_dev);
3782 if (pci_dev == NULL)
3783 return -1;
3784
3785 pci_read_config_dword(pci_dev, 0x7c, &dwVal);
3786 pci_write_config_dword(pci_dev, 0x7c, dwVal | 0x08000000);
3787 udelay(5000);
3788 pci_read_config_dword(pci_dev, 0x7c, &dwVal);
3789 pci_write_config_dword(pci_dev, 0x7c, dwVal & 0xf7ffffff);
3790 udelay(5000);
3791
3792 pci_dev = card->pci_dev;
3793 if (pci_dev == NULL)
3794 return -1;
3795
3796 pci_read_config_dword(pci_dev, 0x44, &dwVal);
3797 pci_write_config_dword(pci_dev, 0x44, dwVal | 0x000c0000);
3798 udelay(500);
3799 pci_read_config_dword(pci_dev, 0x44, &dwVal);
3800 pci_write_config_dword(pci_dev, 0x44, dwVal & 0xfffbffff);
3801 udelay(5000);
3802
3803 wCount = 200;
3804 while(wCount--) {
3805 wReg = ali_ac97_get(card, 0, AC97_POWER_CONTROL);
3806 if((wReg & 0x000f) == 0x000f)
3807 return 0;
3808 udelay(500);
3809 }
3810 return 0;
3811 }
3812
3813 /* AC97 codec initialisation. */
3814 static int __init trident_ac97_init(struct trident_card *card)
3815 {
3816 int num_ac97 = 0;
3817 unsigned long ready_2nd = 0;
3818 struct ac97_codec *codec;
3819 int i = 0;
3820
3821
3822 /* initialize controller side of AC link, and find out if secondary codes
3823 really exist */
3824 switch (card->pci_id)
3825 {
3826 case PCI_DEVICE_ID_ALI_5451:
3827 if (ali_reset_5451(card))
3828 {
3829 printk(KERN_ERR "trident_ac97_init: error resetting 5451.\n");
3830 return -1;
3831 }
3832 outl(0x80000001,TRID_REG(card, ALI_GLOBAL_CONTROL));
3833 outl(0x00000000,TRID_REG(card, T4D_AINTEN_A));
3834 outl(0xffffffff,TRID_REG(card, T4D_AINT_A));
3835 outl(0x00000000,TRID_REG(card, T4D_MUSICVOL_WAVEVOL));
3836 outb(0x10, TRID_REG(card, ALI_MPUR2));
3837 ready_2nd = inl(TRID_REG(card, ALI_SCTRL));
3838 ready_2nd &= 0x3fff;
3839 outl(ready_2nd | PCMOUT | 0x8000, TRID_REG(card, ALI_SCTRL));
3840 ready_2nd = inl(TRID_REG(card, ALI_SCTRL));
3841 ready_2nd &= SI_AC97_SECONDARY_READY;
3842 if (card->revision < ALI_5451_V02)
3843 ready_2nd = 0;
3844 break;
3845 case PCI_DEVICE_ID_SI_7018:
3846 /* disable AC97 GPIO interrupt */
3847 outl(0x00, TRID_REG(card, SI_AC97_GPIO));
3848 /* when power up the AC link is in cold reset mode so stop it */
3849 outl(PCMOUT|SURROUT|CENTEROUT|LFEOUT|SECONDARY_ID,
3850 TRID_REG(card, SI_SERIAL_INTF_CTRL));
3851 /* it take a long time to recover from a cold reset (especially when you have
3852 more than one codec) */
3853 udelay(2000);
3854 ready_2nd = inl(TRID_REG(card, SI_SERIAL_INTF_CTRL));
3855 ready_2nd &= SI_AC97_SECONDARY_READY;
3856 break;
3857 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
3858 /* playback on */
3859 outl(DX_AC97_PLAYBACK, TRID_REG(card, DX_ACR2_AC97_COM_STAT));
3860 break;
3861 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
3862 /* enable AC97 Output Slot 3,4 (PCM Left/Right Playback) */
3863 outl(NX_AC97_PCM_OUTPUT, TRID_REG(card, NX_ACR0_AC97_COM_STAT));
3864 ready_2nd = inl(TRID_REG(card, NX_ACR0_AC97_COM_STAT));
3865 ready_2nd &= NX_AC97_SECONDARY_READY;
3866 break;
3867 case PCI_DEVICE_ID_INTERG_5050:
3868 /* disable AC97 GPIO interrupt */
3869 outl(0x00, TRID_REG(card, SI_AC97_GPIO));
3870 /* when power up, the AC link is in cold reset mode, so stop it */
3871 outl(PCMOUT|SURROUT|CENTEROUT|LFEOUT,
3872 TRID_REG(card, SI_SERIAL_INTF_CTRL));
3873 /* it take a long time to recover from a cold reset (especially when you have
3874 more than one codec) */
3875 udelay(2000);
3876 ready_2nd = inl(TRID_REG(card, SI_SERIAL_INTF_CTRL));
3877 ready_2nd &= SI_AC97_SECONDARY_READY;
3878 break;
3879 }
3880
3881 for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++) {
3882 if ((codec = kmalloc(sizeof(struct ac97_codec), GFP_KERNEL)) == NULL)
3883 return -ENOMEM;
3884 memset(codec, 0, sizeof(struct ac97_codec));
3885
3886 /* initialize some basic codec information, other fields will be filled
3887 in ac97_probe_codec */
3888 codec->private_data = card;
3889 codec->id = num_ac97;
3890
3891 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
3892 codec->codec_read = ali_ac97_read;
3893 codec->codec_write = ali_ac97_write;
3894 }
3895 else {
3896 codec->codec_read = trident_ac97_get;
3897 codec->codec_write = trident_ac97_set;
3898 }
3899
3900 if (ac97_probe_codec(codec) == 0)
3901 break;
3902
3903 if ((codec->dev_mixer = register_sound_mixer(&trident_mixer_fops, -1)) < 0) {
3904 printk(KERN_ERR "trident: couldn't register mixer!\n");
3905 kfree(codec);
3906 break;
3907 }
3908
3909 card->ac97_codec[num_ac97] = codec;
3910
3911 /* if there is no secondary codec at all, don't probe any more */
3912 if (!ready_2nd)
3913 break;
3914 }
3915
3916 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
3917 for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++) {
3918 if (card->ac97_codec[num_ac97] == NULL)
3919 break;
3920 for (i=0; i<64;i++)
3921 card->mixer_regs[i][num_ac97] = ali_ac97_get(card, num_ac97,i*2);
3922 }
3923 }
3924 return num_ac97+1;
3925 }
3926
3927 /* install the driver, we do not allocate hardware channel nor DMA buffer now, they are defered
3928 until "ACCESS" time (in prog_dmabuf called by open/read/write/ioctl/mmap) */
3929 static int __init trident_probe(struct pci_dev *pci_dev, const struct pci_device_id *pci_id)
3930 {
3931 unsigned long iobase;
3932 struct trident_card *card;
3933 dma_addr_t mask;
3934 u8 bits;
3935 u8 revision;
3936 int i = 0;
3937 u16 temp;
3938 struct pci_dev *pci_dev_m1533 = NULL;
3939
3940 if (pci_enable_device(pci_dev))
3941 return -ENODEV;
3942
3943 if (pci_set_dma_mask(pci_dev, TRIDENT_DMA_MASK)) {
3944 printk(KERN_ERR "trident: architecture does not support"
3945 " 30bit PCI busmaster DMA\n");
3946 return -ENODEV;
3947 }
3948 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &revision);
3949
3950 if (pci_id->device == PCI_DEVICE_ID_INTERG_5050)
3951 iobase = pci_resource_start(pci_dev, 1);
3952 else
3953 iobase = pci_resource_start(pci_dev, 0);
3954
3955 if (check_region(iobase, 256)) {
3956 printk(KERN_ERR "trident: can't allocate I/O space at 0x%4.4lx\n",
3957 iobase);
3958 return -ENODEV;
3959 }
3960
3961 if ((card = kmalloc(sizeof(struct trident_card), GFP_KERNEL)) == NULL) {
3962 printk(KERN_ERR "trident: out of memory\n");
3963 return -ENOMEM;
3964 }
3965 memset(card, 0, sizeof(*card));
3966
3967 card->iobase = iobase;
3968 card->pci_dev = pci_dev;
3969 card->pci_id = pci_id->device;
3970 card->revision = revision;
3971 card->irq = pci_dev->irq;
3972 card->next = devs;
3973 card->magic = TRIDENT_CARD_MAGIC;
3974 card->banks[BANK_A].addresses = &bank_a_addrs;
3975 card->banks[BANK_A].bitmap = 0UL;
3976 card->banks[BANK_B].addresses = &bank_b_addrs;
3977 card->banks[BANK_B].bitmap = 0UL;
3978
3979 init_MUTEX(&card->open_sem);
3980 spin_lock_init(&card->lock);
3981 init_timer(&card->timer);
3982
3983 devs = card;
3984
3985 pci_set_master(pci_dev);
3986
3987 printk(KERN_INFO "trident: %s found at IO 0x%04lx, IRQ %d\n",
3988 card_names[pci_id->driver_data], card->iobase, card->irq);
3989
3990 if(card->pci_id == PCI_DEVICE_ID_ALI_5451) {
3991 /* ALi channel Management */
3992 card->alloc_pcm_channel = ali_alloc_pcm_channel;
3993 card->alloc_rec_pcm_channel = ali_alloc_rec_pcm_channel;
3994 card->free_pcm_channel = ali_free_pcm_channel;
3995
3996 card->address_interrupt = ali_address_interrupt;
3997
3998 /* Added by Matt Wu 01-05-2001 for spdif in */
3999 card->multi_channel_use_count = 0;
4000 card->rec_channel_use_count = 0;
4001
4002 /* ALi SPDIF OUT function */
4003 if(card->revision == ALI_5451_V02) {
4004 ali_setup_spdif_out(card, ALI_PCM_TO_SPDIF_OUT);
4005 #ifdef CONFIG_PROC_FS
4006 res = create_proc_entry("ALi5451", 0, NULL);
4007 if (res) {
4008 res->write_proc = ali_write_proc;
4009 res->data = card;
4010 }
4011 #endif
4012 }
4013
4014 /* Add H/W Volume Control By Matt Wu Jul. 06, 2001 */
4015 card->hwvolctl = 0;
4016 pci_dev_m1533 = pci_find_device(PCI_VENDOR_ID_AL,PCI_DEVICE_ID_AL_M1533, pci_dev_m1533);
4017 if (pci_dev_m1533 == NULL)
4018 return -ENODEV;
4019 pci_read_config_byte(pci_dev_m1533, 0x63, &bits);
4020 if (bits & (1<<5))
4021 card->hwvolctl = 1;
4022 if (card->hwvolctl)
4023 {
4024 /* Clear m1533 pci cfg 78h bit 30 to zero, which makes
4025 GPIO11/12/13 work as ACGP_UP/DOWN/MUTE. */
4026 pci_read_config_byte(pci_dev_m1533, 0x7b, &bits);
4027 bits &= 0xbf; /*clear bit 6 */
4028 pci_write_config_byte(pci_dev_m1533, 0x7b, bits);
4029 }
4030 }
4031 else if(card->pci_id == PCI_DEVICE_ID_INTERG_5050)
4032 {
4033 card->alloc_pcm_channel = cyber_alloc_pcm_channel;
4034 card->alloc_rec_pcm_channel = cyber_alloc_pcm_channel;
4035 card->free_pcm_channel = cyber_free_pcm_channel;
4036 card->address_interrupt = cyber_address_interrupt;
4037 cyber_init_ritual(card);
4038 }
4039 else
4040 {
4041 card->alloc_pcm_channel = trident_alloc_pcm_channel;
4042 card->alloc_rec_pcm_channel = trident_alloc_pcm_channel;
4043 card->free_pcm_channel = trident_free_pcm_channel;
4044 card->address_interrupt = trident_address_interrupt;
4045 }
4046
4047 /* claim our iospace and irq */
4048 request_region(card->iobase, 256, card_names[pci_id->driver_data]);
4049 if (request_irq(card->irq, &trident_interrupt, SA_SHIRQ,
4050 card_names[pci_id->driver_data], card)) {
4051 printk(KERN_ERR "trident: unable to allocate irq %d\n", card->irq);
4052 release_region(card->iobase, 256);
4053 kfree(card);
4054 return -ENODEV;
4055 }
4056 /* register /dev/dsp */
4057 if ((card->dev_audio = register_sound_dsp(&trident_audio_fops, -1)) < 0) {
4058 printk(KERN_ERR "trident: couldn't register DSP device!\n");
4059 release_region(iobase, 256);
4060 free_irq(card->irq, card);
4061 kfree(card);
4062 return -ENODEV;
4063 }
4064 card->mixer_regs_ready = 0;
4065 /* initialize AC97 codec and register /dev/mixer */
4066 if (trident_ac97_init(card) <= 0) {
4067 /* unregister audio devices */
4068 for (i = 0; i < NR_AC97; i++) {
4069 if (card->ac97_codec[i] != NULL) {
4070 unregister_sound_mixer(card->ac97_codec[i]->dev_mixer);
4071 kfree (card->ac97_codec[i]);
4072 }
4073 }
4074 unregister_sound_dsp(card->dev_audio);
4075 release_region(iobase, 256);
4076 free_irq(card->irq, card);
4077 kfree(card);
4078 return -ENODEV;
4079 }
4080 card->mixer_regs_ready = 1;
4081 outl(0x00, TRID_REG(card, T4D_MUSICVOL_WAVEVOL));
4082
4083 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
4084 /* Add H/W Volume Control By Matt Wu Jul. 06, 2001 */
4085 if(card->hwvolctl)
4086 {
4087 /* Enable GPIO IRQ (MISCINT bit 18h)*/
4088 temp = inw(TRID_REG(card, T4D_MISCINT + 2));
4089 temp |= 0x0004;
4090 outw(temp, TRID_REG(card, T4D_MISCINT + 2));
4091
4092 /* Enable H/W Volume Control GLOVAL CONTROL bit 0*/
4093 temp = inw(TRID_REG(card, ALI_GLOBAL_CONTROL));
4094 temp |= 0x0001;
4095 outw(temp, TRID_REG(card, ALI_GLOBAL_CONTROL));
4096
4097 }
4098 if(card->revision == ALI_5451_V02)
4099 ali_close_multi_channels();
4100 /* edited by HMSEO for GT sound */
4101 #if defined CONFIG_ALPHA_NAUTILUS || CONFIG_ALPHA_GENERIC
4102 {
4103 u16 ac97_data;
4104 extern struct hwrpb_struct *hwrpb;
4105
4106 if ((hwrpb->sys_type) == 201) {
4107 printk(KERN_INFO "trident: Running on Alpha system type Nautilus\n");
4108 ac97_data = ali_ac97_get(card, 0, AC97_POWER_CONTROL);
4109 ali_ac97_set(card, 0, AC97_POWER_CONTROL, ac97_data |
4110 }
4111 }
4112 #endif
4113 /* edited by HMSEO for GT sound*/
4114 }
4115
4116 pci_set_drvdata(pci_dev, card);
4117
4118 /* Enable Address Engine Interrupts */
4119 trident_enable_loop_interrupts(card);
4120
4121 return 0;
4122 }
4123
4124 static void __exit trident_remove(struct pci_dev *pci_dev)
4125 {
4126 int i;
4127 struct trident_card *card = pci_get_drvdata(pci_dev);
4128
4129 /*
4130 * Kill running timers before unload. We can't have them
4131 * going off after rmmod!
4132 */
4133 if(card->hwvolctl)
4134 del_timer_sync(&card->timer);
4135
4136 /* ALi S/PDIF and Power Management */
4137 if(card->pci_id == PCI_DEVICE_ID_ALI_5451) {
4138 ali_setup_spdif_out(card, ALI_PCM_TO_SPDIF_OUT);
4139 ali_disable_special_channel(card, ALI_SPDIF_OUT_CHANNEL);
4140 ali_disable_spdif_in(card);
4141 #ifdef CONFIG_PROC_FS
4142 remove_proc_entry("ALi5451", NULL);
4143 #endif
4144 }
4145
4146 /* Kill interrupts, and SP/DIF */
4147 trident_disable_loop_interrupts(card);
4148
4149 /* free hardware resources */
4150 free_irq(card->irq, card);
4151 release_region(card->iobase, 256);
4152
4153 /* unregister audio devices */
4154 for (i = 0; i < NR_AC97; i++)
4155 if (card->ac97_codec[i] != NULL) {
4156 unregister_sound_mixer(card->ac97_codec[i]->dev_mixer);
4157 kfree (card->ac97_codec[i]);
4158 }
4159 unregister_sound_dsp(card->dev_audio);
4160
4161 kfree(card);
4162
4163 pci_set_drvdata(pci_dev, NULL);
4164 }
4165
4166 MODULE_AUTHOR("Alan Cox, Aaron Holtzman, Ollie Lho, Ching Ling Lee");
4167 MODULE_DESCRIPTION("Trident 4DWave/SiS 7018/ALi 5451 and Tvia/IGST CyberPro5050 PCI Audio Driver");
4168
4169 #define TRIDENT_MODULE_NAME "trident"
4170
4171 static struct pci_driver trident_pci_driver = {
4172 name: TRIDENT_MODULE_NAME,
4173 id_table: trident_pci_tbl,
4174 probe: trident_probe,
4175 remove: trident_remove,
4176 suspend: trident_suspend,
4177 resume: trident_resume
4178 };
4179
4180 static int __init trident_init_module (void)
4181 {
4182 if (!pci_present()) /* No PCI bus in this machine! */
4183 return -ENODEV;
4184
4185 printk(KERN_INFO "Trident 4DWave/SiS 7018/ALi 5451,Tvia CyberPro 5050 PCI Audio, version "
4186 DRIVER_VERSION ", " __TIME__ " " __DATE__ "\n");
4187
4188 if (!pci_register_driver(&trident_pci_driver)) {
4189 pci_unregister_driver(&trident_pci_driver);
4190 return -ENODEV;
4191 }
4192 return 0;
4193 }
4194
4195 static void __exit trident_cleanup_module (void)
4196 {
4197 pci_unregister_driver(&trident_pci_driver);
4198 }
4199
4200 module_init(trident_init_module);
4201 module_exit(trident_cleanup_module);
4202