File: /usr/src/linux/drivers/usb/serial/whiteheat.h
1 /*
2 * USB ConnectTech WhiteHEAT driver
3 *
4 * Copyright (C) 1999, 2000
5 * Greg Kroah-Hartman (greg@kroah.com)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * See Documentation/usb/usb-serial.txt for more information on using this driver
13 *
14 */
15
16 #ifndef __LINUX_USB_SERIAL_WHITEHEAT_H
17 #define __LINUX_USB_SERIAL_WHITEHEAT_H
18
19
20 #define FALSE 0
21 #define TRUE 1
22
23 /* WhiteHEAT commands */
24 #define WHITEHEAT_OPEN 1 /* open the port */
25 #define WHITEHEAT_CLOSE 2 /* close the port */
26 #define WHITEHEAT_SETUP_PORT 3 /* change port settings */
27 #define WHITEHEAT_SET_RTS 4 /* turn RTS on or off */
28 #define WHITEHEAT_SET_DTR 5 /* turn DTR on or off */
29 #define WHITEHEAT_SET_BREAK 6 /* turn BREAK on or off */
30 #define WHITEHEAT_DUMP 7 /* dump memory */
31 #define WHITEHEAT_STATUS 8 /* get status */
32 #define WHITEHEAT_PURGE 9 /* clear the UART fifos */
33 #define WHITEHEAT_GET_DTR_RTS 10 /* get the state of DTR and RTS for a port */
34 #define WHITEHEAT_GET_HW_INFO 11 /* get EEPROM info and hardware ID */
35 #define WHITEHEAT_REPORT_TX_DONE 12 /* get the next TX done */
36 #define WHITEHEAT_EVENT 13 /* unsolicited status events */
37 #define WHITEHEAT_ECHO 14 /* send data to the indicated IN endpoint */
38 #define WHITEHEAT_DO_TEST 15 /* perform the specified test */
39 #define WHITEHEAT_CMD_COMPLETE 16 /* reply for certain commands */
40 #define WHITEHEAT_CMD_FAILURE 17 /* reply for failed commands */
41
42 /* Data for the WHITEHEAT_SETUP_PORT command */
43 #define WHITEHEAT_CTS_FLOW 0x08
44 #define WHITEHEAT_RTS_FLOW 0x80
45 #define WHITEHEAT_DSR_FLOW 0x10
46 #define WHITEHEAT_DTR_FLOW 0x02
47 struct whiteheat_port_settings {
48 __u8 port; /* port number (1 to N) */
49 __u32 baud; /* any value allowed, default 9600, arrives little endian, range is 7 - 460800 */
50 __u8 bits; /* 5, 6, 7, or 8, default 8 */
51 __u8 stop; /* 1 or 2, default 1 (2 = 1.5 if bits = 5) */
52 __u8 parity; /* 'n, e, o, 0, or 1' (ascii), default 'n'
53 * n = none e = even o = odd
54 * 0 = force 0 1 = force 1 */
55 __u8 sflow; /* 'n, r, t, or b' (ascii), default 'n'
56 * n = none
57 * r = receive (XOFF/XON transmitted when receiver fills / empties)
58 * t = transmit (XOFF/XON received will stop/start TX)
59 * b = both */
60 __u8 xoff; /* XOFF byte value, default 0x13 */
61 __u8 xon; /* XON byte value, default 0x11 */
62 __u8 hflow; /* bits indicate mode as follows:
63 * CTS (0x08) (CTS off/on will control/cause TX off/on)
64 * DSR (0x10) (DSR off/on will control/cause TX off/on)
65 * RTS (0x80) (RTS off/on when receiver fills/empties)
66 * DTR (0x02) (DTR off/on when receiver fills/empties) */
67 __u8 lloop; /* local loopback 0 or 1, default 0 */
68 } __attribute__ ((packed));
69
70 /* data for WHITEHEAT_SET_RTS, WHITEHEAT_SET_DTR, and WHITEHEAT_SET_BREAK commands */
71 struct whiteheat_rdb_set {
72 __u8 port; /* port number (1 to N) */
73 __u8 state; /* 0 = off, non-zero = on */
74 };
75
76 /* data for:
77 WHITEHEAT_OPEN
78 WHITEHEAT_CLOSE
79 WHITEHEAT_STATUS
80 WHITEHEAT_GET_DTR_RTS
81 WHITEHEAT_REPORT_TX_DONE */
82 struct whiteheat_min_set {
83 __u8 port; /* port number (1 to N) */
84 };
85
86 /* data for WHITEHEAT_PURGE command */
87 #define WHITEHEAT_PURGE_INPUT 0x01
88 #define WHITEHEAT_PURGE_OUTPUT 0x02
89 struct whiteheat_purge_set {
90 __u8 port; /* port number (1 to N) */
91 __u8 what; /* bit pattern of what to purge */
92 };
93
94 /* data for WHITEHEAT_DUMP command */
95 struct whiteheat_dump_info {
96 __u8 mem_type; /* memory type: 'd' = data, 'i' = idata, 'b' = bdata, 'x' = xdata */
97 __u16 addr; /* memory address to dump, address range depends on the above mem_type:
98 * 'd' = 0 to ff (80 to FF is SFR's)
99 * 'i' = 80 to ff
100 * 'b' = 20 to 2f (bits returned as bytes)
101 * 'x' = 0000 to ffff (also code space) */
102 __u16 length; /* number of bytes to dump, max 64 */
103 };
104
105 /* data for WHITEHEAT_ECHO command */
106 struct whiteheat_echo_set {
107 __u8 port; /* port number (1 to N) */
108 __u8 length; /* length of message to echo */
109 __u8 echo_data[61]; /* data to echo */
110 };
111
112 /* data returned from WHITEHEAT_STATUS command */
113 #define WHITEHEAT_OVERRUN_ERROR 0x02
114 #define WHITEHEAT_PARITY_ERROR 0x04
115 #define WHITEHEAT_FRAMING_ERROR 0x08
116 #define WHITEHEAT_BREAK_ERROR 0x10
117
118 #define WHITEHEAT_OHFLOW 0x01 /* TX is stopped by CTS (waiting for CTS to go ON) */
119 #define WHITEHEAT_IHFLOW 0x02 /* remote TX is stopped by RTS */
120 #define WHITEHEAT_OSFLOW 0x04 /* TX is stopped by XOFF received (waiting for XON to occur) */
121 #define WHITEHEAT_ISFLOW 0x08 /* remote TX is stopped by XOFF transmitted */
122 #define WHITEHEAT_TX_DONE 0x80 /* TX has completed */
123
124 #define WHITEHEAT_MODEM_EVENT 0x01
125 #define WHITEHEAT_ERROR_EVENT 0x02
126 #define WHITEHEAT_FLOW_EVENT 0x04
127 #define WHITEHEAT_CONNECT_EVENT 0x08
128 struct whiteheat_status_info {
129 __u8 port; /* port number (1 to N) */
130 __u8 event; /* indicates which of the following bytes are the current event */
131 __u8 modem; /* modem signal status (copy of UART MSR register) */
132 __u8 error; /* PFO and RX break (copy of UART LSR register) */
133 __u8 flow; /* flow control state */
134 __u8 connect; /* connect state, non-zero value indicates connected */
135 };
136
137 /* data returned from WHITEHEAT_EVENT command */
138 struct whiteheat_event {
139 __u8 port; /* port number (1 to N) */
140 __u8 event; /* indicates which of the following bytes are the current event */
141 __u8 info; /* either modem, error, flow, or connect information */
142 };
143
144 /* data retured by the WHITEHEAT_GET_HW_INFO command */
145 struct whiteheat_hw_info {
146 __u8 hw_id; /* hardware id number, WhiteHEAT = 0 */
147 __u8 sw_major_rev; /* major version number */
148 __u8 sw_minor_rev; /* minor version number */
149 struct whiteheat_hw_eeprom_info {
150 __u8 b0; /* B0 */
151 __u8 vendor_id_low; /* vendor id (low byte) */
152 __u8 vendor_id_high; /* vendor id (high byte) */
153 __u8 product_id_low; /* product id (low byte) */
154 __u8 product_id_high; /* product id (high byte) */
155 __u8 device_id_low; /* device id (low byte) */
156 __u8 device_id_high; /* device id (high byte) */
157 __u8 not_used_1;
158 __u8 serial_number_0; /* serial number (low byte) */
159 __u8 serial_number_1; /* serial number */
160 __u8 serial_number_2; /* serial number */
161 __u8 serial_number_3; /* serial number (high byte) */
162 __u8 not_used_2;
163 __u8 not_used_3;
164 __u8 checksum_low; /* checksum (low byte) */
165 __u8 checksum_high; /* checksum (high byte */
166 } hw_eeprom_info; /* EEPROM contents */
167 };
168
169 #endif
170
171