File: /usr/src/linux/drivers/usb/usb-ohci.c
1 /*
2 * URB OHCI HCD (Host Controller Driver) for USB.
3 *
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2001 David Brownell <dbrownell@users.sourceforge.net>
6 *
7 * [ Initialisation is based on Linus' ]
8 * [ uhci code and gregs ohci fragments ]
9 * [ (C) Copyright 1999 Linus Torvalds ]
10 * [ (C) Copyright 1999 Gregory P. Smith]
11 *
12 *
13 * History:
14 *
15 * 2001/09/19 USB_ZERO_PACKET support (Jean Tourrilhes)
16 * 2001/07/17 power management and pmac cleanup (Benjamin Herrenschmidt)
17 * 2001/03/24 td/ed hashing to remove bus_to_virt (Steve Longerbeam);
18 pci_map_single (db)
19 * 2001/03/21 td and dev/ed allocation uses new pci_pool API (db)
20 * 2001/03/07 hcca allocation uses pci_alloc_consistent (Steve Longerbeam)
21 *
22 * 2000/09/26 fixed races in removing the private portion of the urb
23 * 2000/09/07 disable bulk and control lists when unlinking the last
24 * endpoint descriptor in order to avoid unrecoverable errors on
25 * the Lucent chips. (rwc@sgi)
26 * 2000/08/29 use bandwidth claiming hooks (thanks Randy!), fix some
27 * urb unlink probs, indentation fixes
28 * 2000/08/11 various oops fixes mostly affecting iso and cleanup from
29 * device unplugs.
30 * 2000/06/28 use PCI hotplug framework, for better power management
31 * and for Cardbus support (David Brownell)
32 * 2000/earlier: fixes for NEC/Lucent chips; suspend/resume handling
33 * when the controller loses power; handle UE; cleanup; ...
34 *
35 * v5.2 1999/12/07 URB 3rd preview,
36 * v5.1 1999/11/30 URB 2nd preview, cpia, (usb-scsi)
37 * v5.0 1999/11/22 URB Technical preview, Paul Mackerras powerbook susp/resume
38 * i386: HUB, Keyboard, Mouse, Printer
39 *
40 * v4.3 1999/10/27 multiple HCs, bulk_request
41 * v4.2 1999/09/05 ISO API alpha, new dev alloc, neg Error-codes
42 * v4.1 1999/08/27 Randy Dunlap's - ISO API first impl.
43 * v4.0 1999/08/18
44 * v3.0 1999/06/25
45 * v2.1 1999/05/09 code clean up
46 * v2.0 1999/05/04
47 * v1.0 1999/04/27 initial release
48 */
49
50 #include <linux/config.h>
51 #include <linux/module.h>
52 #include <linux/pci.h>
53 #include <linux/kernel.h>
54 #include <linux/delay.h>
55 #include <linux/ioport.h>
56 #include <linux/sched.h>
57 #include <linux/slab.h>
58 #include <linux/smp_lock.h>
59 #include <linux/errno.h>
60 #include <linux/init.h>
61 #include <linux/timer.h>
62 #include <linux/list.h>
63 #include <linux/interrupt.h> /* for in_interrupt() */
64 #undef DEBUG
65 #include <linux/usb.h>
66
67 #include <asm/io.h>
68 #include <asm/irq.h>
69 #include <asm/system.h>
70 #include <asm/unaligned.h>
71
72 #define OHCI_USE_NPS // force NoPowerSwitching mode
73 // #define OHCI_VERBOSE_DEBUG /* not always helpful */
74
75 #include "usb-ohci.h"
76
77
78 #ifdef CONFIG_PMAC_PBOOK
79 #include <asm/feature.h>
80 #include <asm/pci-bridge.h>
81 #ifndef CONFIG_PM
82 #define CONFIG_PM
83 #endif
84 #endif
85
86
87 /*
88 * Version Information
89 */
90 #define DRIVER_VERSION "v5.3"
91 #define DRIVER_AUTHOR "Roman Weissgaerber <weissg@vienna.at>, David Brownell"
92 #define DRIVER_DESC "USB OHCI Host Controller Driver"
93
94 /* For initializing controller (mask in an HCFS mode too) */
95 #define OHCI_CONTROL_INIT \
96 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
97
98 #define OHCI_UNLINK_TIMEOUT (HZ / 10)
99
100 static LIST_HEAD (ohci_hcd_list);
101 static spinlock_t usb_ed_lock = SPIN_LOCK_UNLOCKED;
102
103
104 /*-------------------------------------------------------------------------*/
105
106 /* AMD-756 (D2 rev) reports corrupt register contents in some cases.
107 * The erratum (#4) description is incorrect. AMD's workaround waits
108 * till some bits (mostly reserved) are clear; ok for all revs.
109 */
110 #define read_roothub(hc, register, mask) ({ \
111 u32 temp = readl (&hc->regs->roothub.register); \
112 if (hc->flags & OHCI_QUIRK_AMD756) \
113 while (temp & mask) \
114 temp = readl (&hc->regs->roothub.register); \
115 temp; })
116
117 static u32 roothub_a (struct ohci *hc)
118 { return read_roothub (hc, a, 0xfc0fe000); }
119 static inline u32 roothub_b (struct ohci *hc)
120 { return readl (&hc->regs->roothub.b); }
121 static inline u32 roothub_status (struct ohci *hc)
122 { return readl (&hc->regs->roothub.status); }
123 static u32 roothub_portstatus (struct ohci *hc, int i)
124 { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
125
126
127 /*-------------------------------------------------------------------------*
128 * URB support functions
129 *-------------------------------------------------------------------------*/
130
131 /* free HCD-private data associated with this URB */
132
133 static void urb_free_priv (struct ohci *hc, urb_priv_t * urb_priv)
134 {
135 int i;
136 int last = urb_priv->length - 1;
137 int len;
138 int dir;
139 struct td *td;
140
141 if (last >= 0) {
142
143 /* ISOC, BULK, INTR data buffer starts at td 0
144 * CTRL setup starts at td 0 */
145 td = urb_priv->td [0];
146
147 len = td->urb->transfer_buffer_length,
148 dir = usb_pipeout (td->urb->pipe)
149 ? PCI_DMA_TODEVICE
150 : PCI_DMA_FROMDEVICE;
151
152 /* unmap CTRL URB setup */
153 if (usb_pipecontrol (td->urb->pipe)) {
154 pci_unmap_single (hc->ohci_dev,
155 td->data_dma, 8, PCI_DMA_TODEVICE);
156
157 /* CTRL data buffer starts at td 1 if len > 0 */
158 if (len && last > 0)
159 td = urb_priv->td [1];
160 }
161
162 /* unmap data buffer */
163 if (len && td->data_dma)
164 pci_unmap_single (hc->ohci_dev, td->data_dma, len, dir);
165
166 for (i = 0; i <= last; i++) {
167 td = urb_priv->td [i];
168 if (td)
169 td_free (hc, td);
170 }
171 }
172
173 kfree (urb_priv);
174 }
175
176 static void urb_rm_priv_locked (urb_t * urb)
177 {
178 urb_priv_t * urb_priv = urb->hcpriv;
179
180 if (urb_priv) {
181 urb->hcpriv = NULL;
182
183 #ifdef DO_TIMEOUTS
184 if (urb->timeout) {
185 list_del (&urb->urb_list);
186 urb->timeout -= jiffies;
187 }
188 #endif
189
190 /* Release int/iso bandwidth */
191 if (urb->bandwidth) {
192 switch (usb_pipetype(urb->pipe)) {
193 case PIPE_INTERRUPT:
194 usb_release_bandwidth (urb->dev, urb, 0);
195 break;
196 case PIPE_ISOCHRONOUS:
197 usb_release_bandwidth (urb->dev, urb, 1);
198 break;
199 default:
200 break;
201 }
202 }
203
204 urb_free_priv ((struct ohci *)urb->dev->bus->hcpriv, urb_priv);
205 usb_dec_dev_use (urb->dev);
206 urb->dev = NULL;
207 }
208 }
209
210 static void urb_rm_priv (urb_t * urb)
211 {
212 unsigned long flags;
213
214 spin_lock_irqsave (&usb_ed_lock, flags);
215 urb_rm_priv_locked (urb);
216 spin_unlock_irqrestore (&usb_ed_lock, flags);
217 }
218
219 /*-------------------------------------------------------------------------*/
220
221 #ifdef DEBUG
222 static int sohci_get_current_frame_number (struct usb_device * dev);
223
224 /* debug| print the main components of an URB
225 * small: 0) header + data packets 1) just header */
226
227 static void urb_print (urb_t * urb, char * str, int small)
228 {
229 unsigned int pipe= urb->pipe;
230
231 if (!urb->dev || !urb->dev->bus) {
232 dbg("%s URB: no dev", str);
233 return;
234 }
235
236 #ifndef OHCI_VERBOSE_DEBUG
237 if (urb->status != 0)
238 #endif
239 dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,flags:%4x,len:%d/%d,stat:%d(%x)",
240 str,
241 sohci_get_current_frame_number (urb->dev),
242 usb_pipedevice (pipe),
243 usb_pipeendpoint (pipe),
244 usb_pipeout (pipe)? 'O': 'I',
245 usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
246 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
247 urb->transfer_flags,
248 urb->actual_length,
249 urb->transfer_buffer_length,
250 urb->status, urb->status);
251 #ifdef OHCI_VERBOSE_DEBUG
252 if (!small) {
253 int i, len;
254
255 if (usb_pipecontrol (pipe)) {
256 printk (KERN_DEBUG __FILE__ ": cmd(8):");
257 for (i = 0; i < 8 ; i++)
258 printk (" %02x", ((__u8 *) urb->setup_packet) [i]);
259 printk ("\n");
260 }
261 if (urb->transfer_buffer_length > 0 && urb->transfer_buffer) {
262 printk (KERN_DEBUG __FILE__ ": data(%d/%d):",
263 urb->actual_length,
264 urb->transfer_buffer_length);
265 len = usb_pipeout (pipe)?
266 urb->transfer_buffer_length: urb->actual_length;
267 for (i = 0; i < 16 && i < len; i++)
268 printk (" %02x", ((__u8 *) urb->transfer_buffer) [i]);
269 printk ("%s stat:%d\n", i < len? "...": "", urb->status);
270 }
271 }
272 #endif
273 }
274
275 /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
276 void ep_print_int_eds (ohci_t * ohci, char * str) {
277 int i, j;
278 __u32 * ed_p;
279 for (i= 0; i < 32; i++) {
280 j = 5;
281 ed_p = &(ohci->hcca->int_table [i]);
282 if (*ed_p == 0)
283 continue;
284 printk (KERN_DEBUG __FILE__ ": %s branch int %2d(%2x):", str, i, i);
285 while (*ed_p != 0 && j--) {
286 ed_t *ed = dma_to_ed (ohci, le32_to_cpup(ed_p));
287 printk (" ed: %4x;", ed->hwINFO);
288 ed_p = &ed->hwNextED;
289 }
290 printk ("\n");
291 }
292 }
293
294
295 static void ohci_dump_intr_mask (char *label, __u32 mask)
296 {
297 dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
298 label,
299 mask,
300 (mask & OHCI_INTR_MIE) ? " MIE" : "",
301 (mask & OHCI_INTR_OC) ? " OC" : "",
302 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
303 (mask & OHCI_INTR_FNO) ? " FNO" : "",
304 (mask & OHCI_INTR_UE) ? " UE" : "",
305 (mask & OHCI_INTR_RD) ? " RD" : "",
306 (mask & OHCI_INTR_SF) ? " SF" : "",
307 (mask & OHCI_INTR_WDH) ? " WDH" : "",
308 (mask & OHCI_INTR_SO) ? " SO" : ""
309 );
310 }
311
312 static void maybe_print_eds (char *label, __u32 value)
313 {
314 if (value)
315 dbg ("%s %08x", label, value);
316 }
317
318 static char *hcfs2string (int state)
319 {
320 switch (state) {
321 case OHCI_USB_RESET: return "reset";
322 case OHCI_USB_RESUME: return "resume";
323 case OHCI_USB_OPER: return "operational";
324 case OHCI_USB_SUSPEND: return "suspend";
325 }
326 return "?";
327 }
328
329 // dump control and status registers
330 static void ohci_dump_status (ohci_t *controller)
331 {
332 struct ohci_regs *regs = controller->regs;
333 __u32 temp;
334
335 temp = readl (®s->revision) & 0xff;
336 if (temp != 0x10)
337 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
338
339 temp = readl (®s->control);
340 dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
341 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
342 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
343 (temp & OHCI_CTRL_IR) ? " IR" : "",
344 hcfs2string (temp & OHCI_CTRL_HCFS),
345 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
346 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
347 (temp & OHCI_CTRL_IE) ? " IE" : "",
348 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
349 temp & OHCI_CTRL_CBSR
350 );
351
352 temp = readl (®s->cmdstatus);
353 dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
354 (temp & OHCI_SOC) >> 16,
355 (temp & OHCI_OCR) ? " OCR" : "",
356 (temp & OHCI_BLF) ? " BLF" : "",
357 (temp & OHCI_CLF) ? " CLF" : "",
358 (temp & OHCI_HCR) ? " HCR" : ""
359 );
360
361 ohci_dump_intr_mask ("intrstatus", readl (®s->intrstatus));
362 ohci_dump_intr_mask ("intrenable", readl (®s->intrenable));
363 // intrdisable always same as intrenable
364 // ohci_dump_intr_mask ("intrdisable", readl (®s->intrdisable));
365
366 maybe_print_eds ("ed_periodcurrent", readl (®s->ed_periodcurrent));
367
368 maybe_print_eds ("ed_controlhead", readl (®s->ed_controlhead));
369 maybe_print_eds ("ed_controlcurrent", readl (®s->ed_controlcurrent));
370
371 maybe_print_eds ("ed_bulkhead", readl (®s->ed_bulkhead));
372 maybe_print_eds ("ed_bulkcurrent", readl (®s->ed_bulkcurrent));
373
374 maybe_print_eds ("donehead", readl (®s->donehead));
375 }
376
377 static void ohci_dump_roothub (ohci_t *controller, int verbose)
378 {
379 __u32 temp, ndp, i;
380
381 temp = roothub_a (controller);
382 ndp = (temp & RH_A_NDP);
383
384 if (verbose) {
385 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
386 ((temp & RH_A_POTPGT) >> 24) & 0xff,
387 (temp & RH_A_NOCP) ? " NOCP" : "",
388 (temp & RH_A_OCPM) ? " OCPM" : "",
389 (temp & RH_A_DT) ? " DT" : "",
390 (temp & RH_A_NPS) ? " NPS" : "",
391 (temp & RH_A_PSM) ? " PSM" : "",
392 ndp
393 );
394 temp = roothub_b (controller);
395 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
396 temp,
397 (temp & RH_B_PPCM) >> 16,
398 (temp & RH_B_DR)
399 );
400 temp = roothub_status (controller);
401 dbg ("roothub.status: %08x%s%s%s%s%s%s",
402 temp,
403 (temp & RH_HS_CRWE) ? " CRWE" : "",
404 (temp & RH_HS_OCIC) ? " OCIC" : "",
405 (temp & RH_HS_LPSC) ? " LPSC" : "",
406 (temp & RH_HS_DRWE) ? " DRWE" : "",
407 (temp & RH_HS_OCI) ? " OCI" : "",
408 (temp & RH_HS_LPS) ? " LPS" : ""
409 );
410 }
411
412 for (i = 0; i < ndp; i++) {
413 temp = roothub_portstatus (controller, i);
414 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
415 i,
416 temp,
417 (temp & RH_PS_PRSC) ? " PRSC" : "",
418 (temp & RH_PS_OCIC) ? " OCIC" : "",
419 (temp & RH_PS_PSSC) ? " PSSC" : "",
420 (temp & RH_PS_PESC) ? " PESC" : "",
421 (temp & RH_PS_CSC) ? " CSC" : "",
422
423 (temp & RH_PS_LSDA) ? " LSDA" : "",
424 (temp & RH_PS_PPS) ? " PPS" : "",
425 (temp & RH_PS_PRS) ? " PRS" : "",
426 (temp & RH_PS_POCI) ? " POCI" : "",
427 (temp & RH_PS_PSS) ? " PSS" : "",
428
429 (temp & RH_PS_PES) ? " PES" : "",
430 (temp & RH_PS_CCS) ? " CCS" : ""
431 );
432 }
433 }
434
435 static void ohci_dump (ohci_t *controller, int verbose)
436 {
437 dbg ("OHCI controller usb-%s state", controller->ohci_dev->slot_name);
438
439 // dumps some of the state we know about
440 ohci_dump_status (controller);
441 if (verbose)
442 ep_print_int_eds (controller, "hcca");
443 dbg ("hcca frame #%04x", controller->hcca->frame_no);
444 ohci_dump_roothub (controller, 1);
445 }
446
447
448 #endif
449
450 /*-------------------------------------------------------------------------*
451 * Interface functions (URB)
452 *-------------------------------------------------------------------------*/
453
454 /* return a request to the completion handler */
455
456 static int sohci_return_urb (struct ohci *hc, urb_t * urb)
457 {
458 urb_priv_t * urb_priv = urb->hcpriv;
459 urb_t * urbt;
460 unsigned long flags;
461 int i;
462
463 if (!urb_priv)
464 return -1; /* urb already unlinked */
465
466 /* just to be sure */
467 if (!urb->complete) {
468 urb_rm_priv (urb);
469 return -1;
470 }
471
472 #ifdef DEBUG
473 urb_print (urb, "RET", usb_pipeout (urb->pipe));
474 #endif
475
476 switch (usb_pipetype (urb->pipe)) {
477 case PIPE_INTERRUPT:
478 pci_unmap_single (hc->ohci_dev,
479 urb_priv->td [0]->data_dma,
480 urb->transfer_buffer_length,
481 usb_pipeout (urb->pipe)
482 ? PCI_DMA_TODEVICE
483 : PCI_DMA_FROMDEVICE);
484 urb->complete (urb);
485
486 /* implicitly requeued */
487 urb->actual_length = 0;
488 urb->status = USB_ST_URB_PENDING;
489 if (urb_priv->state != URB_DEL)
490 td_submit_urb (urb);
491 break;
492
493 case PIPE_ISOCHRONOUS:
494 for (urbt = urb->next; urbt && (urbt != urb); urbt = urbt->next);
495 if (urbt) { /* send the reply and requeue URB */
496 pci_unmap_single (hc->ohci_dev,
497 urb_priv->td [0]->data_dma,
498 urb->transfer_buffer_length,
499 usb_pipeout (urb->pipe)
500 ? PCI_DMA_TODEVICE
501 : PCI_DMA_FROMDEVICE);
502 urb->complete (urb);
503 spin_lock_irqsave (&usb_ed_lock, flags);
504 urb->actual_length = 0;
505 urb->status = USB_ST_URB_PENDING;
506 urb->start_frame = urb_priv->ed->last_iso + 1;
507 if (urb_priv->state != URB_DEL) {
508 for (i = 0; i < urb->number_of_packets; i++) {
509 urb->iso_frame_desc[i].actual_length = 0;
510 urb->iso_frame_desc[i].status = -EXDEV;
511 }
512 td_submit_urb (urb);
513 }
514 spin_unlock_irqrestore (&usb_ed_lock, flags);
515
516 } else { /* unlink URB, call complete */
517 urb_rm_priv (urb);
518 urb->complete (urb);
519 }
520 break;
521
522 case PIPE_BULK:
523 case PIPE_CONTROL: /* unlink URB, call complete */
524 urb_rm_priv (urb);
525 urb->complete (urb);
526 break;
527 }
528 return 0;
529 }
530
531 /*-------------------------------------------------------------------------*/
532
533 /* get a transfer request */
534
535 static int sohci_submit_urb (urb_t * urb)
536 {
537 ohci_t * ohci;
538 ed_t * ed;
539 urb_priv_t * urb_priv;
540 unsigned int pipe = urb->pipe;
541 int maxps = usb_maxpacket (urb->dev, pipe, usb_pipeout (pipe));
542 int i, size = 0;
543 unsigned long flags;
544 int bustime = 0;
545 int mem_flags = ALLOC_FLAGS;
546
547 if (!urb->dev || !urb->dev->bus)
548 return -ENODEV;
549
550 if (urb->hcpriv) /* urb already in use */
551 return -EINVAL;
552
553 // if(usb_endpoint_halted (urb->dev, usb_pipeendpoint (pipe), usb_pipeout (pipe)))
554 // return -EPIPE;
555
556 usb_inc_dev_use (urb->dev);
557 ohci = (ohci_t *) urb->dev->bus->hcpriv;
558
559 #ifdef DEBUG
560 urb_print (urb, "SUB", usb_pipein (pipe));
561 #endif
562
563 /* handle a request to the virtual root hub */
564 if (usb_pipedevice (pipe) == ohci->rh.devnum)
565 return rh_submit_urb (urb);
566
567 /* when controller's hung, permit only roothub cleanup attempts
568 * such as powering down ports */
569 if (ohci->disabled) {
570 usb_dec_dev_use (urb->dev);
571 return -ESHUTDOWN;
572 }
573
574 /* every endpoint has a ed, locate and fill it */
575 if (!(ed = ep_add_ed (urb->dev, pipe, urb->interval, 1, mem_flags))) {
576 usb_dec_dev_use (urb->dev);
577 return -ENOMEM;
578 }
579
580 /* for the private part of the URB we need the number of TDs (size) */
581 switch (usb_pipetype (pipe)) {
582 case PIPE_BULK: /* one TD for every 4096 Byte */
583 size = (urb->transfer_buffer_length - 1) / 4096 + 1;
584
585 /* If the transfer size is multiple of the pipe mtu,
586 * we may need an extra TD to create a empty frame
587 * Jean II */
588 if ((urb->transfer_flags & USB_ZERO_PACKET) &&
589 usb_pipeout (pipe) &&
590 (urb->transfer_buffer_length != 0) &&
591 ((urb->transfer_buffer_length % maxps) == 0))
592 size++;
593 break;
594 case PIPE_ISOCHRONOUS: /* number of packets from URB */
595 size = urb->number_of_packets;
596 if (size <= 0) {
597 usb_dec_dev_use (urb->dev);
598 return -EINVAL;
599 }
600 for (i = 0; i < urb->number_of_packets; i++) {
601 urb->iso_frame_desc[i].actual_length = 0;
602 urb->iso_frame_desc[i].status = -EXDEV;
603 }
604 break;
605 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
606 size = (urb->transfer_buffer_length == 0)? 2:
607 (urb->transfer_buffer_length - 1) / 4096 + 3;
608 break;
609 case PIPE_INTERRUPT: /* one TD */
610 size = 1;
611 break;
612 }
613
614 /* allocate the private part of the URB */
615 urb_priv = kmalloc (sizeof (urb_priv_t) + size * sizeof (td_t *),
616 in_interrupt() ? GFP_ATOMIC : GFP_KERNEL);
617 if (!urb_priv) {
618 usb_dec_dev_use (urb->dev);
619 return -ENOMEM;
620 }
621 memset (urb_priv, 0, sizeof (urb_priv_t) + size * sizeof (td_t *));
622
623 /* fill the private part of the URB */
624 urb_priv->length = size;
625 urb_priv->ed = ed;
626
627 /* allocate the TDs (updating hash chains) */
628 spin_lock_irqsave (&usb_ed_lock, flags);
629 for (i = 0; i < size; i++) {
630 urb_priv->td[i] = td_alloc (ohci, SLAB_ATOMIC);
631 if (!urb_priv->td[i]) {
632 urb_priv->length = i;
633 urb_free_priv (ohci, urb_priv);
634 spin_unlock_irqrestore (&usb_ed_lock, flags);
635 usb_dec_dev_use (urb->dev);
636 return -ENOMEM;
637 }
638 }
639
640 if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
641 urb_free_priv (ohci, urb_priv);
642 spin_unlock_irqrestore (&usb_ed_lock, flags);
643 usb_dec_dev_use (urb->dev);
644 return -EINVAL;
645 }
646
647 /* allocate and claim bandwidth if needed; ISO
648 * needs start frame index if it was't provided.
649 */
650 switch (usb_pipetype (pipe)) {
651 case PIPE_ISOCHRONOUS:
652 if (urb->transfer_flags & USB_ISO_ASAP) {
653 urb->start_frame = ((ed->state == ED_OPER)
654 ? (ed->last_iso + 1)
655 : (le16_to_cpu (ohci->hcca->frame_no) + 10)) & 0xffff;
656 }
657 /* FALLTHROUGH */
658 case PIPE_INTERRUPT:
659 if (urb->bandwidth == 0) {
660 bustime = usb_check_bandwidth (urb->dev, urb);
661 }
662 if (bustime < 0) {
663 urb_free_priv (ohci, urb_priv);
664 spin_unlock_irqrestore (&usb_ed_lock, flags);
665 usb_dec_dev_use (urb->dev);
666 return bustime;
667 }
668 usb_claim_bandwidth (urb->dev, urb, bustime, usb_pipeisoc (urb->pipe));
669 #ifdef DO_TIMEOUTS
670 urb->timeout = 0;
671 #endif
672 }
673
674 urb->actual_length = 0;
675 urb->hcpriv = urb_priv;
676 urb->status = USB_ST_URB_PENDING;
677
678 /* link the ed into a chain if is not already */
679 if (ed->state != ED_OPER)
680 ep_link (ohci, ed);
681
682 /* fill the TDs and link it to the ed */
683 td_submit_urb (urb);
684
685 #ifdef DO_TIMEOUTS
686 /* maybe add to ordered list of timeouts */
687 if (urb->timeout) {
688 struct list_head *entry;
689
690 // FIXME: usb-uhci uses relative timeouts (like this),
691 // while uhci uses absolute ones (probably better).
692 // Pick one solution and change the affected drivers.
693 urb->timeout += jiffies;
694
695 list_for_each (entry, &ohci->timeout_list) {
696 struct urb *next_urb;
697
698 next_urb = list_entry (entry, struct urb, urb_list);
699 if (time_after_eq (urb->timeout, next_urb->timeout))
700 break;
701 }
702 list_add (&urb->urb_list, entry);
703
704 /* drive timeouts by SF (messy, but works) */
705 writel (OHCI_INTR_SF, &ohci->regs->intrenable);
706 }
707 #endif
708
709 spin_unlock_irqrestore (&usb_ed_lock, flags);
710
711 return 0;
712 }
713
714 /*-------------------------------------------------------------------------*/
715
716 /* deactivate all TDs and remove the private part of the URB */
717 /* interrupt callers must use async unlink mode */
718
719 static int sohci_unlink_urb (urb_t * urb)
720 {
721 unsigned long flags;
722 ohci_t * ohci;
723
724 if (!urb) /* just to be sure */
725 return -EINVAL;
726
727 if (!urb->dev || !urb->dev->bus)
728 return -ENODEV;
729
730 ohci = (ohci_t *) urb->dev->bus->hcpriv;
731
732 #ifdef DEBUG
733 urb_print (urb, "UNLINK", 1);
734 #endif
735
736 /* handle a request to the virtual root hub */
737 if (usb_pipedevice (urb->pipe) == ohci->rh.devnum)
738 return rh_unlink_urb (urb);
739
740 if (urb->hcpriv && (urb->status == USB_ST_URB_PENDING)) {
741 if (!ohci->disabled) {
742 urb_priv_t * urb_priv;
743
744 /* interrupt code may not sleep; it must use
745 * async status return to unlink pending urbs.
746 */
747 if (!(urb->transfer_flags & USB_ASYNC_UNLINK)
748 && in_interrupt ()) {
749 err ("bug in call from %p; use async!",
750 __builtin_return_address(0));
751 return -EWOULDBLOCK;
752 }
753
754 /* flag the urb and its TDs for deletion in some
755 * upcoming SF interrupt delete list processing
756 */
757 spin_lock_irqsave (&usb_ed_lock, flags);
758 urb_priv = urb->hcpriv;
759
760 if (!urb_priv || (urb_priv->state == URB_DEL)) {
761 spin_unlock_irqrestore (&usb_ed_lock, flags);
762 return 0;
763 }
764
765 urb_priv->state = URB_DEL;
766 ep_rm_ed (urb->dev, urb_priv->ed);
767 urb_priv->ed->state |= ED_URB_DEL;
768
769 if (!(urb->transfer_flags & USB_ASYNC_UNLINK)) {
770 DECLARE_WAIT_QUEUE_HEAD (unlink_wakeup);
771 DECLARE_WAITQUEUE (wait, current);
772 int timeout = OHCI_UNLINK_TIMEOUT;
773
774 add_wait_queue (&unlink_wakeup, &wait);
775 urb_priv->wait = &unlink_wakeup;
776 spin_unlock_irqrestore (&usb_ed_lock, flags);
777
778 /* wait until all TDs are deleted */
779 set_current_state(TASK_UNINTERRUPTIBLE);
780 while (timeout && (urb->status == USB_ST_URB_PENDING))
781 timeout = schedule_timeout (timeout);
782 current->state = TASK_RUNNING;
783 remove_wait_queue (&unlink_wakeup, &wait);
784 if (urb->status == USB_ST_URB_PENDING) {
785 err ("unlink URB timeout");
786 return -ETIMEDOUT;
787 }
788 } else {
789 /* usb_dec_dev_use done in dl_del_list() */
790 urb->status = -EINPROGRESS;
791 spin_unlock_irqrestore (&usb_ed_lock, flags);
792 }
793 } else {
794 urb_rm_priv (urb);
795 if (urb->transfer_flags & USB_ASYNC_UNLINK) {
796 urb->status = -ECONNRESET;
797 if (urb->complete)
798 urb->complete (urb);
799 } else
800 urb->status = -ENOENT;
801 }
802 }
803 return 0;
804 }
805
806 /*-------------------------------------------------------------------------*/
807
808 /* allocate private data space for a usb device */
809
810 static int sohci_alloc_dev (struct usb_device *usb_dev)
811 {
812 struct ohci_device * dev;
813
814 dev = dev_alloc ((struct ohci *) usb_dev->bus->hcpriv, ALLOC_FLAGS);
815 if (!dev)
816 return -ENOMEM;
817
818 usb_dev->hcpriv = dev;
819 return 0;
820 }
821
822 /*-------------------------------------------------------------------------*/
823
824 /* may be called from interrupt context */
825 /* frees private data space of usb device */
826
827 static int sohci_free_dev (struct usb_device * usb_dev)
828 {
829 unsigned long flags;
830 int i, cnt = 0;
831 ed_t * ed;
832 struct ohci_device * dev = usb_to_ohci (usb_dev);
833 ohci_t * ohci = usb_dev->bus->hcpriv;
834
835 if (!dev)
836 return 0;
837
838 if (usb_dev->devnum >= 0) {
839
840 /* driver disconnects should have unlinked all urbs
841 * (freeing all the TDs, unlinking EDs) but we need
842 * to defend against bugs that prevent that.
843 */
844 spin_lock_irqsave (&usb_ed_lock, flags);
845 for(i = 0; i < NUM_EDS; i++) {
846 ed = &(dev->ed[i]);
847 if (ed->state != ED_NEW) {
848 if (ed->state == ED_OPER) {
849 /* driver on that interface didn't unlink an urb */
850 dbg ("driver usb-%s dev %d ed 0x%x unfreed URB",
851 ohci->ohci_dev->slot_name, usb_dev->devnum, i);
852 ep_unlink (ohci, ed);
853 }
854 ep_rm_ed (usb_dev, ed);
855 ed->state = ED_DEL;
856 cnt++;
857 }
858 }
859 spin_unlock_irqrestore (&usb_ed_lock, flags);
860
861 /* if the controller is running, tds for those unlinked
862 * urbs get freed by dl_del_list at the next SF interrupt
863 */
864 if (cnt > 0) {
865
866 if (ohci->disabled) {
867 /* FIXME: Something like this should kick in,
868 * though it's currently an exotic case ...
869 * the controller won't ever be touching
870 * these lists again!!
871 dl_del_list (ohci,
872 le16_to_cpu (ohci->hcca->frame_no) & 1);
873 */
874 warn ("TD leak, %d", cnt);
875
876 } else if (!in_interrupt ()) {
877 DECLARE_WAIT_QUEUE_HEAD (freedev_wakeup);
878 DECLARE_WAITQUEUE (wait, current);
879 int timeout = OHCI_UNLINK_TIMEOUT;
880
881 /* SF interrupt handler calls dl_del_list */
882 add_wait_queue (&freedev_wakeup, &wait);
883 dev->wait = &freedev_wakeup;
884 set_current_state(TASK_UNINTERRUPTIBLE);
885 while (timeout && dev->ed_cnt)
886 timeout = schedule_timeout (timeout);
887 current->state = TASK_RUNNING;
888 remove_wait_queue (&freedev_wakeup, &wait);
889 if (dev->ed_cnt) {
890 err ("free device %d timeout", usb_dev->devnum);
891 return -ETIMEDOUT;
892 }
893 } else {
894 /* likely some interface's driver has a refcount bug */
895 err ("bus %s devnum %d deletion in interrupt",
896 ohci->ohci_dev->slot_name, usb_dev->devnum);
897 BUG ();
898 }
899 }
900 }
901
902 /* free device, and associated EDs */
903 dev_free (ohci, dev);
904
905 return 0;
906 }
907
908 /*-------------------------------------------------------------------------*/
909
910 /* tell us the current USB frame number */
911
912 static int sohci_get_current_frame_number (struct usb_device *usb_dev)
913 {
914 ohci_t * ohci = usb_dev->bus->hcpriv;
915
916 return le16_to_cpu (ohci->hcca->frame_no);
917 }
918
919 /*-------------------------------------------------------------------------*/
920
921 struct usb_operations sohci_device_operations = {
922 sohci_alloc_dev,
923 sohci_free_dev,
924 sohci_get_current_frame_number,
925 sohci_submit_urb,
926 sohci_unlink_urb
927 };
928
929 /*-------------------------------------------------------------------------*
930 * ED handling functions
931 *-------------------------------------------------------------------------*/
932
933 /* search for the right branch to insert an interrupt ed into the int tree
934 * do some load ballancing;
935 * returns the branch and
936 * sets the interval to interval = 2^integer (ld (interval)) */
937
938 static int ep_int_ballance (ohci_t * ohci, int interval, int load)
939 {
940 int i, branch = 0;
941
942 /* search for the least loaded interrupt endpoint branch of all 32 branches */
943 for (i = 0; i < 32; i++)
944 if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i]) branch = i;
945
946 branch = branch % interval;
947 for (i = branch; i < 32; i += interval) ohci->ohci_int_load [i] += load;
948
949 return branch;
950 }
951
952 /*-------------------------------------------------------------------------*/
953
954 /* 2^int( ld (inter)) */
955
956 static int ep_2_n_interval (int inter)
957 {
958 int i;
959 for (i = 0; ((inter >> i) > 1 ) && (i < 5); i++);
960 return 1 << i;
961 }
962
963 /*-------------------------------------------------------------------------*/
964
965 /* the int tree is a binary tree
966 * in order to process it sequentially the indexes of the branches have to be mapped
967 * the mapping reverses the bits of a word of num_bits length */
968
969 static int ep_rev (int num_bits, int word)
970 {
971 int i, wout = 0;
972
973 for (i = 0; i < num_bits; i++) wout |= (((word >> i) & 1) << (num_bits - i - 1));
974 return wout;
975 }
976
977 /*-------------------------------------------------------------------------*/
978
979 /* link an ed into one of the HC chains */
980
981 static int ep_link (ohci_t * ohci, ed_t * edi)
982 {
983 int int_branch;
984 int i;
985 int inter;
986 int interval;
987 int load;
988 __u32 * ed_p;
989 volatile ed_t * ed = edi;
990
991 ed->state = ED_OPER;
992
993 switch (ed->type) {
994 case PIPE_CONTROL:
995 ed->hwNextED = 0;
996 if (ohci->ed_controltail == NULL) {
997 writel (ed->dma, &ohci->regs->ed_controlhead);
998 } else {
999 ohci->ed_controltail->hwNextED = cpu_to_le32 (ed->dma);
1000 }
1001 ed->ed_prev = ohci->ed_controltail;
1002 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
1003 !ohci->ed_rm_list[1] && !ohci->sleeping) {
1004 ohci->hc_control |= OHCI_CTRL_CLE;
1005 writel (ohci->hc_control, &ohci->regs->control);
1006 }
1007 ohci->ed_controltail = edi;
1008 break;
1009
1010 case PIPE_BULK:
1011 ed->hwNextED = 0;
1012 if (ohci->ed_bulktail == NULL) {
1013 writel (ed->dma, &ohci->regs->ed_bulkhead);
1014 } else {
1015 ohci->ed_bulktail->hwNextED = cpu_to_le32 (ed->dma);
1016 }
1017 ed->ed_prev = ohci->ed_bulktail;
1018 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
1019 !ohci->ed_rm_list[1] && !ohci->sleeping) {
1020 ohci->hc_control |= OHCI_CTRL_BLE;
1021 writel (ohci->hc_control, &ohci->regs->control);
1022 }
1023 ohci->ed_bulktail = edi;
1024 break;
1025
1026 case PIPE_INTERRUPT:
1027 load = ed->int_load;
1028 interval = ep_2_n_interval (ed->int_period);
1029 ed->int_interval = interval;
1030 int_branch = ep_int_ballance (ohci, interval, load);
1031 ed->int_branch = int_branch;
1032
1033 for (i = 0; i < ep_rev (6, interval); i += inter) {
1034 inter = 1;
1035 for (ed_p = &(ohci->hcca->int_table[ep_rev (5, i) + int_branch]);
1036 (*ed_p != 0) && ((dma_to_ed (ohci, le32_to_cpup (ed_p)))->int_interval >= interval);
1037 ed_p = &((dma_to_ed (ohci, le32_to_cpup (ed_p)))->hwNextED))
1038 inter = ep_rev (6, (dma_to_ed (ohci, le32_to_cpup (ed_p)))->int_interval);
1039 ed->hwNextED = *ed_p;
1040 *ed_p = cpu_to_le32 (ed->dma);
1041 }
1042 #ifdef DEBUG
1043 ep_print_int_eds (ohci, "LINK_INT");
1044 #endif
1045 break;
1046
1047 case PIPE_ISOCHRONOUS:
1048 ed->hwNextED = 0;
1049 ed->int_interval = 1;
1050 if (ohci->ed_isotail != NULL) {
1051 ohci->ed_isotail->hwNextED = cpu_to_le32 (ed->dma);
1052 ed->ed_prev = ohci->ed_isotail;
1053 } else {
1054 for ( i = 0; i < 32; i += inter) {
1055 inter = 1;
1056 for (ed_p = &(ohci->hcca->int_table[ep_rev (5, i)]);
1057 *ed_p != 0;
1058 ed_p = &((dma_to_ed (ohci, le32_to_cpup (ed_p)))->hwNextED))
1059 inter = ep_rev (6, (dma_to_ed (ohci, le32_to_cpup (ed_p)))->int_interval);
1060 *ed_p = cpu_to_le32 (ed->dma);
1061 }
1062 ed->ed_prev = NULL;
1063 }
1064 ohci->ed_isotail = edi;
1065 #ifdef DEBUG
1066 ep_print_int_eds (ohci, "LINK_ISO");
1067 #endif
1068 break;
1069 }
1070 return 0;
1071 }
1072
1073 /*-------------------------------------------------------------------------*/
1074
1075 /* unlink an ed from one of the HC chains.
1076 * just the link to the ed is unlinked.
1077 * the link from the ed still points to another operational ed or 0
1078 * so the HC can eventually finish the processing of the unlinked ed */
1079
1080 static int ep_unlink (ohci_t * ohci, ed_t * ed)
1081 {
1082 int int_branch;
1083 int i;
1084 int inter;
1085 int interval;
1086 __u32 * ed_p;
1087
1088 ed->hwINFO |= cpu_to_le32 (OHCI_ED_SKIP);
1089
1090 switch (ed->type) {
1091 case PIPE_CONTROL:
1092 if (ed->ed_prev == NULL) {
1093 if (!ed->hwNextED) {
1094 ohci->hc_control &= ~OHCI_CTRL_CLE;
1095 writel (ohci->hc_control, &ohci->regs->control);
1096 }
1097 writel (le32_to_cpup (&ed->hwNextED), &ohci->regs->ed_controlhead);
1098 } else {
1099 ed->ed_prev->hwNextED = ed->hwNextED;
1100 }
1101 if (ohci->ed_controltail == ed) {
1102 ohci->ed_controltail = ed->ed_prev;
1103 } else {
1104 (dma_to_ed (ohci, le32_to_cpup (&ed->hwNextED)))->ed_prev = ed->ed_prev;
1105 }
1106 break;
1107
1108 case PIPE_BULK:
1109 if (ed->ed_prev == NULL) {
1110 if (!ed->hwNextED) {
1111 ohci->hc_control &= ~OHCI_CTRL_BLE;
1112 writel (ohci->hc_control, &ohci->regs->control);
1113 }
1114 writel (le32_to_cpup (&ed->hwNextED), &ohci->regs->ed_bulkhead);
1115 } else {
1116 ed->ed_prev->hwNextED = ed->hwNextED;
1117 }
1118 if (ohci->ed_bulktail == ed) {
1119 ohci->ed_bulktail = ed->ed_prev;
1120 } else {
1121 (dma_to_ed (ohci, le32_to_cpup (&ed->hwNextED)))->ed_prev = ed->ed_prev;
1122 }
1123 break;
1124
1125 case PIPE_INTERRUPT:
1126 int_branch = ed->int_branch;
1127 interval = ed->int_interval;
1128
1129 for (i = 0; i < ep_rev (6, interval); i += inter) {
1130 for (ed_p = &(ohci->hcca->int_table[ep_rev (5, i) + int_branch]), inter = 1;
1131 (*ed_p != 0) && (*ed_p != ed->hwNextED);
1132 ed_p = &((dma_to_ed (ohci, le32_to_cpup (ed_p)))->hwNextED),
1133 inter = ep_rev (6, (dma_to_ed (ohci, le32_to_cpup (ed_p)))->int_interval)) {
1134 if((dma_to_ed (ohci, le32_to_cpup (ed_p))) == ed) {
1135 *ed_p = ed->hwNextED;
1136 break;
1137 }
1138 }
1139 }
1140 for (i = int_branch; i < 32; i += interval)
1141 ohci->ohci_int_load[i] -= ed->int_load;
1142 #ifdef DEBUG
1143 ep_print_int_eds (ohci, "UNLINK_INT");
1144 #endif
1145 break;
1146
1147 case PIPE_ISOCHRONOUS:
1148 if (ohci->ed_isotail == ed)
1149 ohci->ed_isotail = ed->ed_prev;
1150 if (ed->hwNextED != 0)
1151 (dma_to_ed (ohci, le32_to_cpup (&ed->hwNextED)))->ed_prev = ed->ed_prev;
1152
1153 if (ed->ed_prev != NULL) {
1154 ed->ed_prev->hwNextED = ed->hwNextED;
1155 } else {
1156 for (i = 0; i < 32; i++) {
1157 for (ed_p = &(ohci->hcca->int_table[ep_rev (5, i)]);
1158 *ed_p != 0;
1159 ed_p = &((dma_to_ed (ohci, le32_to_cpup (ed_p)))->hwNextED)) {
1160 // inter = ep_rev (6, (dma_to_ed (ohci, le32_to_cpup (ed_p)))->int_interval);
1161 if((dma_to_ed (ohci, le32_to_cpup (ed_p))) == ed) {
1162 *ed_p = ed->hwNextED;
1163 break;
1164 }
1165 }
1166 }
1167 }
1168 #ifdef DEBUG
1169 ep_print_int_eds (ohci, "UNLINK_ISO");
1170 #endif
1171 break;
1172 }
1173 ed->state = ED_UNLINK;
1174 return 0;
1175 }
1176
1177
1178 /*-------------------------------------------------------------------------*/
1179
1180 /* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
1181 * but the USB stack is a little bit stateless so we do it at every transaction
1182 * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
1183 * in all other cases the state is left unchanged
1184 * the ed info fields are setted anyway even though most of them should not change */
1185
1186 static ed_t * ep_add_ed (
1187 struct usb_device * usb_dev,
1188 unsigned int pipe,
1189 int interval,
1190 int load,
1191 int mem_flags
1192 )
1193 {
1194 ohci_t * ohci = usb_dev->bus->hcpriv;
1195 td_t * td;
1196 ed_t * ed_ret;
1197 volatile ed_t * ed;
1198 unsigned long flags;
1199
1200
1201 spin_lock_irqsave (&usb_ed_lock, flags);
1202
1203 ed = ed_ret = &(usb_to_ohci (usb_dev)->ed[(usb_pipeendpoint (pipe) << 1) |
1204 (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))]);
1205
1206 if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
1207 /* pending delete request */
1208 spin_unlock_irqrestore (&usb_ed_lock, flags);
1209 return NULL;
1210 }
1211
1212 if (ed->state == ED_NEW) {
1213 ed->hwINFO = cpu_to_le32 (OHCI_ED_SKIP); /* skip ed */
1214 /* dummy td; end of td list for ed */
1215 td = td_alloc (ohci, SLAB_ATOMIC);
1216 /* hash the ed for later reverse mapping */
1217 if (!td || !hash_add_ed (ohci, (ed_t *)ed)) {
1218 /* out of memory */
1219 if (td)
1220 td_free(ohci, td);
1221 spin_unlock_irqrestore (&usb_ed_lock, flags);
1222 return NULL;
1223 }
1224 ed->hwTailP = cpu_to_le32 (td->td_dma);
1225 ed->hwHeadP = ed->hwTailP;
1226 ed->state = ED_UNLINK;
1227 ed->type = usb_pipetype (pipe);
1228 usb_to_ohci (usb_dev)->ed_cnt++;
1229 }
1230
1231 ohci->dev[usb_pipedevice (pipe)] = usb_dev;
1232
1233 ed->hwINFO = cpu_to_le32 (usb_pipedevice (pipe)
1234 | usb_pipeendpoint (pipe) << 7
1235 | (usb_pipeisoc (pipe)? 0x8000: 0)
1236 | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
1237 | usb_pipeslow (pipe) << 13
1238 | usb_maxpacket (usb_dev, pipe, usb_pipeout (pipe)) << 16);
1239
1240 if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) {
1241 ed->int_period = interval;
1242 ed->int_load = load;
1243 }
1244
1245 spin_unlock_irqrestore (&usb_ed_lock, flags);
1246 return ed_ret;
1247 }
1248
1249 /*-------------------------------------------------------------------------*/
1250
1251 /* request the removal of an endpoint
1252 * put the ep on the rm_list and request a stop of the bulk or ctrl list
1253 * real removal is done at the next start frame (SF) hardware interrupt */
1254
1255 static void ep_rm_ed (struct usb_device * usb_dev, ed_t * ed)
1256 {
1257 unsigned int frame;
1258 ohci_t * ohci = usb_dev->bus->hcpriv;
1259
1260 if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL))
1261 return;
1262
1263 ed->hwINFO |= cpu_to_le32 (OHCI_ED_SKIP);
1264
1265 if (!ohci->disabled) {
1266 switch (ed->type) {
1267 case PIPE_CONTROL: /* stop control list */
1268 ohci->hc_control &= ~OHCI_CTRL_CLE;
1269 writel (ohci->hc_control, &ohci->regs->control);
1270 break;
1271 case PIPE_BULK: /* stop bulk list */
1272 ohci->hc_control &= ~OHCI_CTRL_BLE;
1273 writel (ohci->hc_control, &ohci->regs->control);
1274 break;
1275 }
1276 }
1277
1278 frame = le16_to_cpu (ohci->hcca->frame_no) & 0x1;
1279 ed->ed_rm_list = ohci->ed_rm_list[frame];
1280 ohci->ed_rm_list[frame] = ed;
1281
1282 if (!ohci->disabled && !ohci->sleeping) {
1283 /* enable SOF interrupt */
1284 writel (OHCI_INTR_SF, &ohci->regs->intrstatus);
1285 writel (OHCI_INTR_SF, &ohci->regs->intrenable);
1286 }
1287 }
1288
1289 /*-------------------------------------------------------------------------*
1290 * TD handling functions
1291 *-------------------------------------------------------------------------*/
1292
1293 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
1294
1295 static void
1296 td_fill (ohci_t * ohci, unsigned int info,
1297 dma_addr_t data, int len,
1298 urb_t * urb, int index)
1299 {
1300 volatile td_t * td, * td_pt;
1301 urb_priv_t * urb_priv = urb->hcpriv;
1302
1303 if (index >= urb_priv->length) {
1304 err("internal OHCI error: TD index > length");
1305 return;
1306 }
1307
1308 /* use this td as the next dummy */
1309 td_pt = urb_priv->td [index];
1310 td_pt->hwNextTD = 0;
1311
1312 /* fill the old dummy TD */
1313 td = urb_priv->td [index] = dma_to_td (ohci,
1314 le32_to_cpup (&urb_priv->ed->hwTailP) & ~0xf);
1315
1316 td->ed = urb_priv->ed;
1317 td->next_dl_td = NULL;
1318 td->index = index;
1319 td->urb = urb;
1320 td->data_dma = data;
1321 if (!len)
1322 data = 0;
1323
1324 td->hwINFO = cpu_to_le32 (info);
1325 if ((td->ed->type) == PIPE_ISOCHRONOUS) {
1326 td->hwCBP = cpu_to_le32 (data & 0xFFFFF000);
1327 td->ed->last_iso = info & 0xffff;
1328 } else {
1329 td->hwCBP = cpu_to_le32 (data);
1330 }
1331 if (data)
1332 td->hwBE = cpu_to_le32 (data + len - 1);
1333 else
1334 td->hwBE = 0;
1335 td->hwNextTD = cpu_to_le32 (td_pt->td_dma);
1336 td->hwPSW [0] = cpu_to_le16 ((data & 0x0FFF) | 0xE000);
1337
1338 /* append to queue */
1339 td->ed->hwTailP = td->hwNextTD;
1340 }
1341
1342 /*-------------------------------------------------------------------------*/
1343
1344 /* prepare all TDs of a transfer */
1345
1346 static void td_submit_urb (urb_t * urb)
1347 {
1348 urb_priv_t * urb_priv = urb->hcpriv;
1349 ohci_t * ohci = (ohci_t *) urb->dev->bus->hcpriv;
1350 dma_addr_t data;
1351 int data_len = urb->transfer_buffer_length;
1352 int maxps = usb_maxpacket (urb->dev, urb->pipe, usb_pipeout (urb->pipe));
1353 int cnt = 0;
1354 __u32 info = 0;
1355 unsigned int toggle = 0;
1356
1357 /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
1358 if(usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe), usb_pipeout(urb->pipe))) {
1359 toggle = TD_T_TOGGLE;
1360 } else {
1361 toggle = TD_T_DATA0;
1362 usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), usb_pipeout(urb->pipe), 1);
1363 }
1364
1365 urb_priv->td_cnt = 0;
1366
1367 if (data_len) {
1368 data = pci_map_single (ohci->ohci_dev,
1369 urb->transfer_buffer, data_len,
1370 usb_pipeout (urb->pipe)
1371 ? PCI_DMA_TODEVICE
1372 : PCI_DMA_FROMDEVICE
1373 );
1374 } else
1375 data = 0;
1376
1377 switch (usb_pipetype (urb->pipe)) {
1378 case PIPE_BULK:
1379 info = usb_pipeout (urb->pipe)?
1380 TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
1381 while(data_len > 4096) {
1382 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, urb, cnt);
1383 data += 4096; data_len -= 4096; cnt++;
1384 }
1385 info = usb_pipeout (urb->pipe)?
1386 TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
1387 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, urb, cnt);
1388 cnt++;
1389
1390 /* If the transfer size is multiple of the pipe mtu,
1391 * we may need an extra TD to create a empty frame
1392 * Note : another way to check this condition is
1393 * to test if(urb_priv->length > cnt) - Jean II */
1394 if ((urb->transfer_flags & USB_ZERO_PACKET) &&
1395 usb_pipeout (urb->pipe) &&
1396 (urb->transfer_buffer_length != 0) &&
1397 ((urb->transfer_buffer_length % maxps) == 0)) {
1398 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), 0, 0, urb, cnt);
1399 cnt++;
1400 }
1401
1402 if (!ohci->sleeping)
1403 writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
1404 break;
1405
1406 case PIPE_INTERRUPT:
1407 info = usb_pipeout (urb->pipe)?
1408 TD_CC | TD_DP_OUT | toggle: TD_CC | TD_R | TD_DP_IN | toggle;
1409 td_fill (ohci, info, data, data_len, urb, cnt++);
1410 break;
1411
1412 case PIPE_CONTROL:
1413 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
1414 td_fill (ohci, info,
1415 pci_map_single (ohci->ohci_dev,
1416 urb->setup_packet, 8,
1417 PCI_DMA_TODEVICE),
1418 8, urb, cnt++);
1419 if (data_len > 0) {
1420 info = usb_pipeout (urb->pipe)?
1421 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
1422 /* NOTE: mishandles transfers >8K, some >4K */
1423 td_fill (ohci, info, data, data_len, urb, cnt++);
1424 }
1425 info = usb_pipeout (urb->pipe)?
1426 TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
1427 td_fill (ohci, info, data, 0, urb, cnt++);
1428 if (!ohci->sleeping)
1429 writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
1430 break;
1431
1432 case PIPE_ISOCHRONOUS:
1433 for (cnt = 0; cnt < urb->number_of_packets; cnt++) {
1434 td_fill (ohci, TD_CC|TD_ISO | ((urb->start_frame + cnt) & 0xffff),
1435 data + urb->iso_frame_desc[cnt].offset,
1436 urb->iso_frame_desc[cnt].length, urb, cnt);
1437 }
1438 break;
1439 }
1440 if (urb_priv->length != cnt)
1441 dbg("TD LENGTH %d != CNT %d", urb_priv->length, cnt);
1442 }
1443
1444 /*-------------------------------------------------------------------------*
1445 * Done List handling functions
1446 *-------------------------------------------------------------------------*/
1447
1448
1449 /* calculate the transfer length and update the urb */
1450
1451 static void dl_transfer_length(td_t * td)
1452 {
1453 __u32 tdINFO, tdBE, tdCBP;
1454 __u16 tdPSW;
1455 urb_t * urb = td->urb;
1456 urb_priv_t * urb_priv = urb->hcpriv;
1457 int dlen = 0;
1458 int cc = 0;
1459
1460 tdINFO = le32_to_cpup (&td->hwINFO);
1461 tdBE = le32_to_cpup (&td->hwBE);
1462 tdCBP = le32_to_cpup (&td->hwCBP);
1463
1464
1465 if (tdINFO & TD_ISO) {
1466 tdPSW = le16_to_cpu (td->hwPSW[0]);
1467 cc = (tdPSW >> 12) & 0xF;
1468 if (cc < 0xE) {
1469 if (usb_pipeout(urb->pipe)) {
1470 dlen = urb->iso_frame_desc[td->index].length;
1471 } else {
1472 dlen = tdPSW & 0x3ff;
1473 }
1474 urb->actual_length += dlen;
1475 urb->iso_frame_desc[td->index].actual_length = dlen;
1476 if (!(urb->transfer_flags & USB_DISABLE_SPD) && (cc == TD_DATAUNDERRUN))
1477 cc = TD_CC_NOERROR;
1478
1479 urb->iso_frame_desc[td->index].status = cc_to_error[cc];
1480 }
1481 } else { /* BULK, INT, CONTROL DATA */
1482 if (!(usb_pipetype (urb->pipe) == PIPE_CONTROL &&
1483 ((td->index == 0) || (td->index == urb_priv->length - 1)))) {
1484 if (tdBE != 0) {
1485 if (td->hwCBP == 0)
1486 urb->actual_length += tdBE - td->data_dma + 1;
1487 else
1488 urb->actual_length += tdCBP - td->data_dma;
1489 }
1490 }
1491 }
1492 }
1493
1494 /* handle an urb that is being unlinked */
1495
1496 static void dl_del_urb (urb_t * urb)
1497 {
1498 wait_queue_head_t * wait_head = ((urb_priv_t *)(urb->hcpriv))->wait;
1499
1500 urb_rm_priv_locked (urb);
1501
1502 if (urb->transfer_flags & USB_ASYNC_UNLINK) {
1503 urb->status = -ECONNRESET;
1504 if (urb->complete)
1505 urb->complete (urb);
1506 } else {
1507 urb->status = -ENOENT;
1508
1509 /* unblock sohci_unlink_urb */
1510 if (wait_head)
1511 wake_up (wait_head);
1512 }
1513 }
1514
1515 /*-------------------------------------------------------------------------*/
1516
1517 /* replies to the request have to be on a FIFO basis so
1518 * we reverse the reversed done-list */
1519
1520 static td_t * dl_reverse_done_list (ohci_t * ohci)
1521 {
1522 __u32 td_list_hc;
1523 td_t * td_rev = NULL;
1524 td_t * td_list = NULL;
1525 urb_priv_t * urb_priv = NULL;
1526 unsigned long flags;
1527
1528 spin_lock_irqsave (&usb_ed_lock, flags);
1529
1530 td_list_hc = le32_to_cpup (&ohci->hcca->done_head) & 0xfffffff0;
1531 ohci->hcca->done_head = 0;
1532
1533 while (td_list_hc) {
1534 td_list = dma_to_td (ohci, td_list_hc);
1535
1536 if (TD_CC_GET (le32_to_cpup (&td_list->hwINFO))) {
1537 urb_priv = (urb_priv_t *) td_list->urb->hcpriv;
1538 dbg(" USB-error/status: %x : %p",
1539 TD_CC_GET (le32_to_cpup (&td_list->hwINFO)), td_list);
1540 if (td_list->ed->hwHeadP & cpu_to_le32 (0x1)) {
1541 if (urb_priv && ((td_list->index + 1) < urb_priv->length)) {
1542 td_list->ed->hwHeadP =
1543 (urb_priv->td[urb_priv->length - 1]->hwNextTD & cpu_to_le32 (0xfffffff0)) |
1544 (td_list->ed->hwHeadP & cpu_to_le32 (0x2));
1545 urb_priv->td_cnt += urb_priv->length - td_list->index - 1;
1546 } else
1547 td_list->ed->hwHeadP &= cpu_to_le32 (0xfffffff2);
1548 }
1549 }
1550
1551 td_list->next_dl_td = td_rev;
1552 td_rev = td_list;
1553 td_list_hc = le32_to_cpup (&td_list->hwNextTD) & 0xfffffff0;
1554 }
1555 spin_unlock_irqrestore (&usb_ed_lock, flags);
1556 return td_list;
1557 }
1558
1559 /*-------------------------------------------------------------------------*/
1560
1561 /* there are some pending requests to remove
1562 * - some of the eds (if ed->state & ED_DEL (set by sohci_free_dev)
1563 * - some URBs/TDs if urb_priv->state == URB_DEL */
1564
1565 static void dl_del_list (ohci_t * ohci, unsigned int frame)
1566 {
1567 unsigned long flags;
1568 ed_t * ed;
1569 __u32 edINFO;
1570 __u32 tdINFO;
1571 td_t * td = NULL, * td_next = NULL, * tdHeadP = NULL, * tdTailP;
1572 __u32 * td_p;
1573 int ctrl = 0, bulk = 0;
1574
1575 spin_lock_irqsave (&usb_ed_lock, flags);
1576
1577 for (ed = ohci->ed_rm_list[frame]; ed != NULL; ed = ed->ed_rm_list) {
1578
1579 tdTailP = dma_to_td (ohci, le32_to_cpup (&ed->hwTailP) & 0xfffffff0);
1580 tdHeadP = dma_to_td (ohci, le32_to_cpup (&ed->hwHeadP) & 0xfffffff0);
1581 edINFO = le32_to_cpup (&ed->hwINFO);
1582 td_p = &ed->hwHeadP;
1583
1584 for (td = tdHeadP; td != tdTailP; td = td_next) {
1585 urb_t * urb = td->urb;
1586 urb_priv_t * urb_priv = td->urb->hcpriv;
1587
1588 td_next = dma_to_td (ohci, le32_to_cpup (&td->hwNextTD) & 0xfffffff0);
1589 if ((urb_priv->state == URB_DEL) || (ed->state & ED_DEL)) {
1590 tdINFO = le32_to_cpup (&td->hwINFO);
1591 if (TD_CC_GET (tdINFO) < 0xE)
1592 dl_transfer_length (td);
1593 *td_p = td->hwNextTD | (*td_p & cpu_to_le32 (0x3));
1594
1595 /* URB is done; clean up */
1596 if (++(urb_priv->td_cnt) == urb_priv->length)
1597 dl_del_urb (urb);
1598 } else {
1599 td_p = &td->hwNextTD;
1600 }
1601 }
1602
1603 if (ed->state & ED_DEL) { /* set by sohci_free_dev */
1604 struct ohci_device * dev = usb_to_ohci (ohci->dev[edINFO & 0x7F]);
1605 td_free (ohci, tdTailP); /* free dummy td */
1606 ed->hwINFO = cpu_to_le32 (OHCI_ED_SKIP);
1607 ed->state = ED_NEW;
1608 hash_free_ed(ohci, ed);
1609 /* if all eds are removed wake up sohci_free_dev */
1610 if (!--dev->ed_cnt) {
1611 wait_queue_head_t *wait_head = dev->wait;
1612
1613 dev->wait = 0;
1614 if (wait_head)
1615 wake_up (wait_head);
1616 }
1617 } else {
1618 ed->state &= ~ED_URB_DEL;
1619 tdHeadP = dma_to_td (ohci, le32_to_cpup (&ed->hwHeadP) & 0xfffffff0);
1620
1621 if (tdHeadP == tdTailP) {
1622 if (ed->state == ED_OPER)
1623 ep_unlink(ohci, ed);
1624 td_free (ohci, tdTailP);
1625 ed->hwINFO = cpu_to_le32 (OHCI_ED_SKIP);
1626 ed->state = ED_NEW;
1627 hash_free_ed(ohci, ed);
1628 --(usb_to_ohci (ohci->dev[edINFO & 0x7F]))->ed_cnt;
1629 } else
1630 ed->hwINFO &= ~cpu_to_le32 (OHCI_ED_SKIP);
1631 }
1632
1633 switch (ed->type) {
1634 case PIPE_CONTROL:
1635 ctrl = 1;
1636 break;
1637 case PIPE_BULK:
1638 bulk = 1;
1639 break;
1640 }
1641 }
1642
1643 /* maybe reenable control and bulk lists */
1644 if (!ohci->disabled) {
1645 if (ctrl) /* reset control list */
1646 writel (0, &ohci->regs->ed_controlcurrent);
1647 if (bulk) /* reset bulk list */
1648 writel (0, &ohci->regs->ed_bulkcurrent);
1649 if (!ohci->ed_rm_list[!frame] && !ohci->sleeping) {
1650 if (ohci->ed_controltail)
1651 ohci->hc_control |= OHCI_CTRL_CLE;
1652 if (ohci->ed_bulktail)
1653 ohci->hc_control |= OHCI_CTRL_BLE;
1654 writel (ohci->hc_control, &ohci->regs->control);
1655 }
1656 }
1657
1658 ohci->ed_rm_list[frame] = NULL;
1659 spin_unlock_irqrestore (&usb_ed_lock, flags);
1660 }
1661
1662
1663
1664 /*-------------------------------------------------------------------------*/
1665
1666 /* td done list */
1667
1668 static void dl_done_list (ohci_t * ohci, td_t * td_list)
1669 {
1670 td_t * td_list_next = NULL;
1671 ed_t * ed;
1672 int cc = 0;
1673 urb_t * urb;
1674 urb_priv_t * urb_priv;
1675 __u32 tdINFO, edHeadP, edTailP;
1676
1677 unsigned long flags;
1678
1679 while (td_list) {
1680 td_list_next = td_list->next_dl_td;
1681
1682 urb = td_list->urb;
1683 urb_priv = urb->hcpriv;
1684 tdINFO = le32_to_cpup (&td_list->hwINFO);
1685
1686 ed = td_list->ed;
1687
1688 dl_transfer_length(td_list);
1689
1690 /* error code of transfer */
1691 cc = TD_CC_GET (tdINFO);
1692 if (cc == TD_CC_STALL)
1693 usb_endpoint_halt(urb->dev,
1694 usb_pipeendpoint(urb->pipe),
1695 usb_pipeout(urb->pipe));
1696
1697 if (!(urb->transfer_flags & USB_DISABLE_SPD)
1698 && (cc == TD_DATAUNDERRUN))
1699 cc = TD_CC_NOERROR;
1700
1701 if (++(urb_priv->td_cnt) == urb_priv->length) {
1702 if ((ed->state & (ED_OPER | ED_UNLINK))
1703 && (urb_priv->state != URB_DEL)) {
1704 urb->status = cc_to_error[cc];
1705 sohci_return_urb (ohci, urb);
1706 } else {
1707 spin_lock_irqsave (&usb_ed_lock, flags);
1708 dl_del_urb (urb);
1709 spin_unlock_irqrestore (&usb_ed_lock, flags);
1710 }
1711 }
1712
1713 spin_lock_irqsave (&usb_ed_lock, flags);
1714 if (ed->state != ED_NEW) {
1715 edHeadP = le32_to_cpup (&ed->hwHeadP) & 0xfffffff0;
1716 edTailP = le32_to_cpup (&ed->hwTailP);
1717
1718 /* unlink eds if they are not busy */
1719 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
1720 ep_unlink (ohci, ed);
1721 }
1722 spin_unlock_irqrestore (&usb_ed_lock, flags);
1723
1724 td_list = td_list_next;
1725 }
1726 }
1727
1728
1729
1730
1731 /*-------------------------------------------------------------------------*
1732 * Virtual Root Hub
1733 *-------------------------------------------------------------------------*/
1734
1735 /* Device descriptor */
1736 static __u8 root_hub_dev_des[] =
1737 {
1738 0x12, /* __u8 bLength; */
1739 0x01, /* __u8 bDescriptorType; Device */
1740 0x10, /* __u16 bcdUSB; v1.1 */
1741 0x01,
1742 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
1743 0x00, /* __u8 bDeviceSubClass; */
1744 0x00, /* __u8 bDeviceProtocol; */
1745 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
1746 0x00, /* __u16 idVendor; */
1747 0x00,
1748 0x00, /* __u16 idProduct; */
1749 0x00,
1750 0x00, /* __u16 bcdDevice; */
1751 0x00,
1752 0x00, /* __u8 iManufacturer; */
1753 0x02, /* __u8 iProduct; */
1754 0x01, /* __u8 iSerialNumber; */
1755 0x01 /* __u8 bNumConfigurations; */
1756 };
1757
1758
1759 /* Configuration descriptor */
1760 static __u8 root_hub_config_des[] =
1761 {
1762 0x09, /* __u8 bLength; */
1763 0x02, /* __u8 bDescriptorType; Configuration */
1764 0x19, /* __u16 wTotalLength; */
1765 0x00,
1766 0x01, /* __u8 bNumInterfaces; */
1767 0x01, /* __u8 bConfigurationValue; */
1768 0x00, /* __u8 iConfiguration; */
1769 0x40, /* __u8 bmAttributes;
1770 Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
1771 0x00, /* __u8 MaxPower; */
1772
1773 /* interface */
1774 0x09, /* __u8 if_bLength; */
1775 0x04, /* __u8 if_bDescriptorType; Interface */
1776 0x00, /* __u8 if_bInterfaceNumber; */
1777 0x00, /* __u8 if_bAlternateSetting; */
1778 0x01, /* __u8 if_bNumEndpoints; */
1779 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
1780 0x00, /* __u8 if_bInterfaceSubClass; */
1781 0x00, /* __u8 if_bInterfaceProtocol; */
1782 0x00, /* __u8 if_iInterface; */
1783
1784 /* endpoint */
1785 0x07, /* __u8 ep_bLength; */
1786 0x05, /* __u8 ep_bDescriptorType; Endpoint */
1787 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
1788 0x03, /* __u8 ep_bmAttributes; Interrupt */
1789 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
1790 0x00,
1791 0xff /* __u8 ep_bInterval; 255 ms */
1792 };
1793
1794 /* Hub class-specific descriptor is constructed dynamically */
1795
1796
1797 /*-------------------------------------------------------------------------*/
1798
1799 /* prepare Interrupt pipe data; HUB INTERRUPT ENDPOINT */
1800
1801 static int rh_send_irq (ohci_t * ohci, void * rh_data, int rh_len)
1802 {
1803 int num_ports;
1804 int i;
1805 int ret;
1806 int len;
1807
1808 __u8 data[8];
1809
1810 num_ports = roothub_a (ohci) & RH_A_NDP;
1811 if (num_ports > MAX_ROOT_PORTS) {
1812 err ("bogus NDP=%d for OHCI usb-%s", num_ports,
1813 ohci->ohci_dev->slot_name);
1814 err ("rereads as NDP=%d",
1815 readl (&ohci->regs->roothub.a) & RH_A_NDP);
1816 /* retry later; "should not happen" */
1817 return 0;
1818 }
1819 *(__u8 *) data = (roothub_status (ohci) & (RH_HS_LPSC | RH_HS_OCIC))
1820 ? 1: 0;
1821 ret = *(__u8 *) data;
1822
1823 for ( i = 0; i < num_ports; i++) {
1824 *(__u8 *) (data + (i + 1) / 8) |=
1825 ((roothub_portstatus (ohci, i) &
1826 (RH_PS_CSC | RH_PS_PESC | RH_PS_PSSC | RH_PS_OCIC | RH_PS_PRSC))
1827 ? 1: 0) << ((i + 1) % 8);
1828 ret += *(__u8 *) (data + (i + 1) / 8);
1829 }
1830 len = i/8 + 1;
1831
1832 if (ret > 0) {
1833 memcpy(rh_data, data,
1834 min_t(unsigned int, len,
1835 min_t(unsigned int, rh_len, sizeof(data))));
1836 return len;
1837 }
1838 return 0;
1839 }
1840
1841 /*-------------------------------------------------------------------------*/
1842
1843 /* Virtual Root Hub INTs are polled by this timer every "interval" ms */
1844
1845 static void rh_int_timer_do (unsigned long ptr)
1846 {
1847 int len;
1848
1849 urb_t * urb = (urb_t *) ptr;
1850 ohci_t * ohci = urb->dev->bus->hcpriv;
1851
1852 if (ohci->disabled)
1853 return;
1854
1855 /* ignore timers firing during PM suspend, etc */
1856 if ((ohci->hc_control & OHCI_CTRL_HCFS) != OHCI_USB_OPER)
1857 goto out;
1858
1859 if(ohci->rh.send) {
1860 len = rh_send_irq (ohci, urb->transfer_buffer, urb->transfer_buffer_length);
1861 if (len > 0) {
1862 urb->actual_length = len;
1863 #ifdef DEBUG
1864 urb_print (urb, "RET-t(rh)", usb_pipeout (urb->pipe));
1865 #endif
1866 if (urb->complete)
1867 urb->complete (urb);
1868 }
1869 }
1870 out:
1871 rh_init_int_timer (urb);
1872 }
1873
1874 /*-------------------------------------------------------------------------*/
1875
1876 /* Root Hub INTs are polled by this timer */
1877
1878 static int rh_init_int_timer (urb_t * urb)
1879 {
1880 ohci_t * ohci = urb->dev->bus->hcpriv;
1881
1882 ohci->rh.interval = urb->interval;
1883 init_timer (&ohci->rh.rh_int_timer);
1884 ohci->rh.rh_int_timer.function = rh_int_timer_do;
1885 ohci->rh.rh_int_timer.data = (unsigned long) urb;
1886 ohci->rh.rh_int_timer.expires =
1887 jiffies + (HZ * (urb->interval < 30? 30: urb->interval)) / 1000;
1888 add_timer (&ohci->rh.rh_int_timer);
1889
1890 return 0;
1891 }
1892
1893 /*-------------------------------------------------------------------------*/
1894
1895 #define OK(x) len = (x); break
1896 #define WR_RH_STAT(x) writel((x), &ohci->regs->roothub.status)
1897 #define WR_RH_PORTSTAT(x) writel((x), &ohci->regs->roothub.portstatus[wIndex-1])
1898 #define RD_RH_STAT roothub_status(ohci)
1899 #define RD_RH_PORTSTAT roothub_portstatus(ohci,wIndex-1)
1900
1901 /* request to virtual root hub */
1902
1903 static int rh_submit_urb (urb_t * urb)
1904 {
1905 struct usb_device * usb_dev = urb->dev;
1906 ohci_t * ohci = usb_dev->bus->hcpriv;
1907 unsigned int pipe = urb->pipe;
1908 devrequest * cmd = (devrequest *) urb->setup_packet;
1909 void * data = urb->transfer_buffer;
1910 int leni = urb->transfer_buffer_length;
1911 int len = 0;
1912 int status = TD_CC_NOERROR;
1913
1914 __u32 datab[4];
1915 __u8 * data_buf = (__u8 *) datab;
1916
1917 __u16 bmRType_bReq;
1918 __u16 wValue;
1919 __u16 wIndex;
1920 __u16 wLength;
1921
1922 if (usb_pipeint(pipe)) {
1923 ohci->rh.urb = urb;
1924 ohci->rh.send = 1;
1925 ohci->rh.interval = urb->interval;
1926 rh_init_int_timer(urb);
1927 urb->status = cc_to_error [TD_CC_NOERROR];
1928
1929 return 0;
1930 }
1931
1932 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
1933 wValue = le16_to_cpu (cmd->value);
1934 wIndex = le16_to_cpu (cmd->index);
1935 wLength = le16_to_cpu (cmd->length);
1936
1937 switch (bmRType_bReq) {
1938 /* Request Destination:
1939 without flags: Device,
1940 RH_INTERFACE: interface,
1941 RH_ENDPOINT: endpoint,
1942 RH_CLASS means HUB here,
1943 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
1944 */
1945
1946 case RH_GET_STATUS:
1947 *(__u16 *) data_buf = cpu_to_le16 (1); OK (2);
1948 case RH_GET_STATUS | RH_INTERFACE:
1949 *(__u16 *) data_buf = cpu_to_le16 (0); OK (2);
1950 case RH_GET_STATUS | RH_ENDPOINT:
1951 *(__u16 *) data_buf = cpu_to_le16 (0); OK (2);
1952 case RH_GET_STATUS | RH_CLASS:
1953 *(__u32 *) data_buf = cpu_to_le32 (
1954 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1955 OK (4);
1956 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1957 *(__u32 *) data_buf = cpu_to_le32 (RD_RH_PORTSTAT); OK (4);
1958
1959 case RH_CLEAR_FEATURE | RH_ENDPOINT:
1960 switch (wValue) {
1961 case (RH_ENDPOINT_STALL): OK (0);
1962 }
1963 break;
1964
1965 case RH_CLEAR_FEATURE | RH_CLASS:
1966 switch (wValue) {
1967 case RH_C_HUB_LOCAL_POWER:
1968 OK(0);
1969 case (RH_C_HUB_OVER_CURRENT):
1970 WR_RH_STAT(RH_HS_OCIC); OK (0);
1971 }
1972 break;
1973
1974 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1975 switch (wValue) {
1976 case (RH_PORT_ENABLE):
1977 WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
1978 case (RH_PORT_SUSPEND):
1979 WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
1980 case (RH_PORT_POWER):
1981 WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
1982 case (RH_C_PORT_CONNECTION):
1983 WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
1984 case (RH_C_PORT_ENABLE):
1985 WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
1986 case (RH_C_PORT_SUSPEND):
1987 WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
1988 case (RH_C_PORT_OVER_CURRENT):
1989 WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
1990 case (RH_C_PORT_RESET):
1991 WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
1992 }
1993 break;
1994
1995 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1996 switch (wValue) {
1997 case (RH_PORT_SUSPEND):
1998 WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
1999 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
2000 if (RD_RH_PORTSTAT & RH_PS_CCS)
2001 WR_RH_PORTSTAT (RH_PS_PRS);
2002 OK (0);
2003 case (RH_PORT_POWER):
2004 WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
2005 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
2006 if (RD_RH_PORTSTAT & RH_PS_CCS)
2007 WR_RH_PORTSTAT (RH_PS_PES );
2008 OK (0);
2009 }
2010 break;
2011
2012 case RH_SET_ADDRESS: ohci->rh.devnum = wValue; OK(0);
2013
2014 case RH_GET_DESCRIPTOR:
2015 switch ((wValue & 0xff00) >> 8) {
2016 case (0x01): /* device descriptor */
2017 len = min_t(unsigned int,
2018 leni,
2019 min_t(unsigned int,
2020 sizeof (root_hub_dev_des),
2021 wLength));
2022 data_buf = root_hub_dev_des; OK(len);
2023 case (0x02): /* configuration descriptor */
2024 len = min_t(unsigned int,
2025 leni,
2026 min_t(unsigned int,
2027 sizeof (root_hub_config_des),
2028 wLength));
2029 data_buf = root_hub_config_des; OK(len);
2030 case (0x03): /* string descriptors */
2031 len = usb_root_hub_string (wValue & 0xff,
2032 (int)(long) ohci->regs, "OHCI",
2033 data, wLength);
2034 if (len > 0) {
2035 data_buf = data;
2036 OK(min_t(int, leni, len));
2037 }
2038 // else fallthrough
2039 default:
2040 status = TD_CC_STALL;
2041 }
2042 break;
2043
2044 case RH_GET_DESCRIPTOR | RH_CLASS:
2045 {
2046 __u32 temp = roothub_a (ohci);
2047
2048 data_buf [0] = 9; // min length;
2049 data_buf [1] = 0x29;
2050 data_buf [2] = temp & RH_A_NDP;
2051 data_buf [3] = 0;
2052 if (temp & RH_A_PSM) /* per-port power switching? */
2053 data_buf [3] |= 0x1;
2054 if (temp & RH_A_NOCP) /* no overcurrent reporting? */
2055 data_buf [3] |= 0x10;
2056 else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
2057 data_buf [3] |= 0x8;
2058
2059 datab [1] = 0;
2060 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
2061 temp = roothub_b (ohci);
2062 data_buf [7] = temp & RH_B_DR;
2063 if (data_buf [2] < 7) {
2064 data_buf [8] = 0xff;
2065 } else {
2066 data_buf [0] += 2;
2067 data_buf [8] = (temp & RH_B_DR) >> 8;
2068 data_buf [10] = data_buf [9] = 0xff;
2069 }
2070
2071 len = min_t(unsigned int, leni,
2072 min_t(unsigned int, data_buf [0], wLength));
2073 OK (len);
2074 }
2075
2076 case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
2077
2078 case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
2079
2080 default:
2081 dbg ("unsupported root hub command");
2082 status = TD_CC_STALL;
2083 }
2084
2085 #ifdef DEBUG
2086 // ohci_dump_roothub (ohci, 0);
2087 #endif
2088
2089 len = min_t(int, len, leni);
2090 if (data != data_buf)
2091 memcpy (data, data_buf, len);
2092 urb->actual_length = len;
2093 urb->status = cc_to_error [status];
2094
2095 #ifdef DEBUG
2096 urb_print (urb, "RET(rh)", usb_pipeout (urb->pipe));
2097 #endif
2098
2099 urb->hcpriv = NULL;
2100 usb_dec_dev_use (usb_dev);
2101 urb->dev = NULL;
2102 if (urb->complete)
2103 urb->complete (urb);
2104 return 0;
2105 }
2106
2107 /*-------------------------------------------------------------------------*/
2108
2109 static int rh_unlink_urb (urb_t * urb)
2110 {
2111 ohci_t * ohci = urb->dev->bus->hcpriv;
2112
2113 if (ohci->rh.urb == urb) {
2114 ohci->rh.send = 0;
2115 del_timer (&ohci->rh.rh_int_timer);
2116 ohci->rh.urb = NULL;
2117
2118 urb->hcpriv = NULL;
2119 usb_dec_dev_use(urb->dev);
2120 urb->dev = NULL;
2121 if (urb->transfer_flags & USB_ASYNC_UNLINK) {
2122 urb->status = -ECONNRESET;
2123 if (urb->complete)
2124 urb->complete (urb);
2125 } else
2126 urb->status = -ENOENT;
2127 }
2128 return 0;
2129 }
2130
2131 /*-------------------------------------------------------------------------*
2132 * HC functions
2133 *-------------------------------------------------------------------------*/
2134
2135 /* reset the HC and BUS */
2136
2137 static int hc_reset (ohci_t * ohci)
2138 {
2139 int timeout = 30;
2140 int smm_timeout = 50; /* 0,5 sec */
2141
2142 if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
2143 writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
2144 dbg("USB HC TakeOver from SMM");
2145 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
2146 wait_ms (10);
2147 if (--smm_timeout == 0) {
2148 err("USB HC TakeOver failed!");
2149 return -1;
2150 }
2151 }
2152 }
2153
2154 /* Disable HC interrupts */
2155 writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
2156
2157 dbg("USB HC reset_hc usb-%s: ctrl = 0x%x ;",
2158 ohci->ohci_dev->slot_name,
2159 readl (&ohci->regs->control));
2160
2161 /* Reset USB (needed by some controllers) */
2162 writel (0, &ohci->regs->control);
2163
2164 /* HC Reset requires max 10 ms delay */
2165 writel (OHCI_HCR, &ohci->regs->cmdstatus);
2166 while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
2167 if (--timeout == 0) {
2168 err("USB HC reset timed out!");
2169 return -1;
2170 }
2171 udelay (1);
2172 }
2173 return 0;
2174 }
2175
2176 /*-------------------------------------------------------------------------*/
2177
2178 /* Start an OHCI controller, set the BUS operational
2179 * enable interrupts
2180 * connect the virtual root hub */
2181
2182 static int hc_start (ohci_t * ohci)
2183 {
2184 __u32 mask;
2185 unsigned int fminterval;
2186 struct usb_device * usb_dev;
2187 struct ohci_device * dev;
2188
2189 ohci->disabled = 1;
2190
2191 /* Tell the controller where the control and bulk lists are
2192 * The lists are empty now. */
2193
2194 writel (0, &ohci->regs->ed_controlhead);
2195 writel (0, &ohci->regs->ed_bulkhead);
2196
2197 writel (ohci->hcca_dma, &ohci->regs->hcca); /* a reset clears this */
2198
2199 fminterval = 0x2edf;
2200 writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
2201 fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
2202 writel (fminterval, &ohci->regs->fminterval);
2203 writel (0x628, &ohci->regs->lsthresh);
2204
2205 /* start controller operations */
2206 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
2207 ohci->disabled = 0;
2208 writel (ohci->hc_control, &ohci->regs->control);
2209
2210 /* Choose the interrupts we care about now, others later on demand */
2211 mask = OHCI_INTR_MIE | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
2212 writel (mask, &ohci->regs->intrenable);
2213 writel (mask, &ohci->regs->intrstatus);
2214
2215 #ifdef OHCI_USE_NPS
2216 /* required for AMD-756 and some Mac platforms */
2217 writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
2218 &ohci->regs->roothub.a);
2219 writel (RH_HS_LPSC, &ohci->regs->roothub.status);
2220 #endif /* OHCI_USE_NPS */
2221
2222 // POTPGT delay is bits 24-31, in 2 ms units.
2223 mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
2224
2225 /* connect the virtual root hub */
2226 ohci->rh.devnum = 0;
2227 usb_dev = usb_alloc_dev (NULL, ohci->bus);
2228 if (!usb_dev) {
2229 ohci->disabled = 1;
2230 return -ENOMEM;
2231 }
2232
2233 dev = usb_to_ohci (usb_dev);
2234 ohci->bus->root_hub = usb_dev;
2235 usb_connect (usb_dev);
2236 if (usb_new_device (usb_dev) != 0) {
2237 usb_free_dev (usb_dev);
2238 ohci->disabled = 1;
2239 return -ENODEV;
2240 }
2241
2242 return 0;
2243 }
2244
2245 /*-------------------------------------------------------------------------*/
2246
2247 /* called only from interrupt handler */
2248
2249 static void check_timeouts (struct ohci *ohci)
2250 {
2251 spin_lock (&usb_ed_lock);
2252 while (!list_empty (&ohci->timeout_list)) {
2253 struct urb *urb;
2254
2255 urb = list_entry (ohci->timeout_list.next, struct urb, urb_list);
2256 if (time_after (jiffies, urb->timeout))
2257 break;
2258
2259 list_del_init (&urb->urb_list);
2260 if (urb->status != -EINPROGRESS)
2261 continue;
2262
2263 urb->transfer_flags |= USB_TIMEOUT_KILLED | USB_ASYNC_UNLINK;
2264 spin_unlock (&usb_ed_lock);
2265
2266 // outside the interrupt handler (in a timer...)
2267 // this reference would race interrupts
2268 sohci_unlink_urb (urb);
2269
2270 spin_lock (&usb_ed_lock);
2271 }
2272 spin_unlock (&usb_ed_lock);
2273 }
2274
2275
2276 /*-------------------------------------------------------------------------*/
2277
2278 /* an interrupt happens */
2279
2280 static void hc_interrupt (int irq, void * __ohci, struct pt_regs * r)
2281 {
2282 ohci_t * ohci = __ohci;
2283 struct ohci_regs * regs = ohci->regs;
2284 int ints;
2285
2286 if ((ohci->hcca->done_head != 0) && !(le32_to_cpup (&ohci->hcca->done_head) & 0x01)) {
2287 ints = OHCI_INTR_WDH;
2288 } else if ((ints = (readl (®s->intrstatus) & readl (®s->intrenable))) == 0) {
2289 return;
2290 }
2291
2292 // dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no));
2293
2294 if (ints & OHCI_INTR_UE) {
2295 ohci->disabled++;
2296 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
2297 ohci->ohci_dev->slot_name);
2298 // e.g. due to PCI Master/Target Abort
2299
2300 #ifdef DEBUG
2301 ohci_dump (ohci, 1);
2302 #else
2303 // FIXME: be optimistic, hope that bug won't repeat often.
2304 // Make some non-interrupt context restart the controller.
2305 // Count and limit the retries though; either hardware or
2306 // software errors can go forever...
2307 #endif
2308 hc_reset (ohci);
2309 }
2310
2311 if (ints & OHCI_INTR_WDH) {
2312 writel (OHCI_INTR_WDH, ®s->intrdisable);
2313 dl_done_list (ohci, dl_reverse_done_list (ohci));
2314 writel (OHCI_INTR_WDH, ®s->intrenable);
2315 }
2316
2317 if (ints & OHCI_INTR_SO) {
2318 dbg("USB Schedule overrun");
2319 writel (OHCI_INTR_SO, ®s->intrenable);
2320 }
2321
2322 // FIXME: this assumes SOF (1/ms) interrupts don't get lost...
2323 if (ints & OHCI_INTR_SF) {
2324 unsigned int frame = le16_to_cpu (ohci->hcca->frame_no) & 1;
2325 writel (OHCI_INTR_SF, ®s->intrdisable);
2326 if (ohci->ed_rm_list[!frame] != NULL) {
2327 dl_del_list (ohci, !frame);
2328 }
2329 if (ohci->ed_rm_list[frame] != NULL)
2330 writel (OHCI_INTR_SF, ®s->intrenable);
2331 }
2332
2333 if (!list_empty (&ohci->timeout_list)) {
2334 check_timeouts (ohci);
2335 // FIXME: enable SF as needed in a timer;
2336 // don't make lots of 1ms interrupts
2337 // On unloaded USB, think 4k ~= 4-5msec
2338 if (!list_empty (&ohci->timeout_list))
2339 writel (OHCI_INTR_SF, ®s->intrenable);
2340 }
2341
2342 writel (ints, ®s->intrstatus);
2343 writel (OHCI_INTR_MIE, ®s->intrenable);
2344 }
2345
2346 /*-------------------------------------------------------------------------*/
2347
2348 /* allocate OHCI */
2349
2350 static ohci_t * __devinit hc_alloc_ohci (struct pci_dev *dev, void * mem_base)
2351 {
2352 ohci_t * ohci;
2353 struct usb_bus * bus;
2354
2355 ohci = (ohci_t *) kmalloc (sizeof *ohci, GFP_KERNEL);
2356 if (!ohci)
2357 return NULL;
2358
2359 memset (ohci, 0, sizeof (ohci_t));
2360
2361 ohci->hcca = pci_alloc_consistent (dev, sizeof *ohci->hcca,
2362 &ohci->hcca_dma);
2363 if (!ohci->hcca) {
2364 kfree (ohci);
2365 return NULL;
2366 }
2367 memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
2368
2369 ohci->disabled = 1;
2370 ohci->sleeping = 0;
2371 ohci->irq = -1;
2372 ohci->regs = mem_base;
2373
2374 ohci->ohci_dev = dev;
2375 dev->driver_data = ohci;
2376
2377 INIT_LIST_HEAD (&ohci->ohci_hcd_list);
2378 list_add (&ohci->ohci_hcd_list, &ohci_hcd_list);
2379
2380 INIT_LIST_HEAD (&ohci->timeout_list);
2381
2382 bus = usb_alloc_bus (&sohci_device_operations);
2383 if (!bus) {
2384 kfree (ohci);
2385 return NULL;
2386 }
2387
2388 ohci->bus = bus;
2389 bus->hcpriv = (void *) ohci;
2390
2391 return ohci;
2392 }
2393
2394
2395 /*-------------------------------------------------------------------------*/
2396
2397 /* De-allocate all resources.. */
2398
2399 static void hc_release_ohci (ohci_t * ohci)
2400 {
2401 dbg ("USB HC release ohci usb-%s", ohci->ohci_dev->slot_name);
2402
2403 /* disconnect all devices */
2404 if (ohci->bus->root_hub)
2405 usb_disconnect (&ohci->bus->root_hub);
2406
2407 if (!ohci->disabled)
2408 hc_reset (ohci);
2409
2410 if (ohci->irq >= 0) {
2411 free_irq (ohci->irq, ohci);
2412 ohci->irq = -1;
2413 }
2414 ohci->ohci_dev->driver_data = 0;
2415
2416 usb_deregister_bus (ohci->bus);
2417 usb_free_bus (ohci->bus);
2418
2419 list_del (&ohci->ohci_hcd_list);
2420 INIT_LIST_HEAD (&ohci->ohci_hcd_list);
2421
2422 ohci_mem_cleanup (ohci);
2423
2424 /* unmap the IO address space */
2425 iounmap (ohci->regs);
2426
2427 pci_free_consistent (ohci->ohci_dev, sizeof *ohci->hcca,
2428 ohci->hcca, ohci->hcca_dma);
2429 kfree (ohci);
2430 }
2431
2432 /*-------------------------------------------------------------------------*/
2433
2434 /* Increment the module usage count, start the control thread and
2435 * return success. */
2436
2437 static struct pci_driver ohci_pci_driver;
2438
2439 static int __devinit
2440 hc_found_ohci (struct pci_dev *dev, int irq,
2441 void *mem_base, const struct pci_device_id *id)
2442 {
2443 ohci_t * ohci;
2444 u8 latency, limit;
2445 char buf[8], *bufp = buf;
2446 int ret;
2447
2448 #ifndef __sparc__
2449 sprintf(buf, "%d", irq);
2450 #else
2451 bufp = __irq_itoa(irq);
2452 #endif
2453 printk(KERN_INFO __FILE__ ": USB OHCI at membase 0x%lx, IRQ %s\n",
2454 (unsigned long) mem_base, bufp);
2455 printk(KERN_INFO __FILE__ ": usb-%s, %s\n", dev->slot_name, dev->name);
2456
2457 ohci = hc_alloc_ohci (dev, mem_base);
2458 if (!ohci) {
2459 return -ENOMEM;
2460 }
2461 if ((ret = ohci_mem_init (ohci)) < 0) {
2462 hc_release_ohci (ohci);
2463 return ret;
2464 }
2465 ohci->flags = id->driver_data;
2466 if (ohci->flags & OHCI_QUIRK_AMD756)
2467 printk (KERN_INFO __FILE__ ": AMD756 erratum 4 workaround\n");
2468
2469 /* bad pci latencies can contribute to overruns */
2470 pci_read_config_byte (dev, PCI_LATENCY_TIMER, &latency);
2471 if (latency) {
2472 pci_read_config_byte (dev, PCI_MAX_LAT, &limit);
2473 if (limit && limit < latency) {
2474 dbg ("PCI latency reduced to max %d", limit);
2475 pci_write_config_byte (dev, PCI_LATENCY_TIMER, limit);
2476 ohci->pci_latency = limit;
2477 } else {
2478 /* it might already have been reduced */
2479 ohci->pci_latency = latency;
2480 }
2481 }
2482
2483 if (hc_reset (ohci) < 0) {
2484 hc_release_ohci (ohci);
2485 return -ENODEV;
2486 }
2487
2488 /* FIXME this is a second HC reset; why?? */
2489 writel (ohci->hc_control = OHCI_USB_RESET, &ohci->regs->control);
2490 wait_ms (10);
2491
2492 usb_register_bus (ohci->bus);
2493
2494 if (request_irq (irq, hc_interrupt, SA_SHIRQ,
2495 ohci_pci_driver.name, ohci) != 0) {
2496 err ("request interrupt %s failed", bufp);
2497 hc_release_ohci (ohci);
2498 return -EBUSY;
2499 }
2500 ohci->irq = irq;
2501
2502 if (hc_start (ohci) < 0) {
2503 err ("can't start usb-%s", dev->slot_name);
2504 hc_release_ohci (ohci);
2505 return -EBUSY;
2506 }
2507
2508 #ifdef DEBUG
2509 ohci_dump (ohci, 1);
2510 #endif
2511 return 0;
2512 }
2513
2514 /*-------------------------------------------------------------------------*/
2515
2516 #ifdef CONFIG_PM
2517
2518 /* controller died; cleanup debris, then restart */
2519 /* must not be called from interrupt context */
2520
2521 static void hc_restart (ohci_t *ohci)
2522 {
2523 int temp;
2524 int i;
2525
2526 if (ohci->pci_latency)
2527 pci_write_config_byte (ohci->ohci_dev, PCI_LATENCY_TIMER, ohci->pci_latency);
2528
2529 ohci->disabled = 1;
2530 ohci->sleeping = 0;
2531 if (ohci->bus->root_hub)
2532 usb_disconnect (&ohci->bus->root_hub);
2533
2534 /* empty the interrupt branches */
2535 for (i = 0; i < NUM_INTS; i++) ohci->ohci_int_load[i] = 0;
2536 for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table[i] = 0;
2537
2538 /* no EDs to remove */
2539 ohci->ed_rm_list [0] = NULL;
2540 ohci->ed_rm_list [1] = NULL;
2541
2542 /* empty control and bulk lists */
2543 ohci->ed_isotail = NULL;
2544 ohci->ed_controltail = NULL;
2545 ohci->ed_bulktail = NULL;
2546
2547 if ((temp = hc_reset (ohci)) < 0 || (temp = hc_start (ohci)) < 0) {
2548 err ("can't restart usb-%s, %d", ohci->ohci_dev->slot_name, temp);
2549 } else
2550 dbg ("restart usb-%s completed", ohci->ohci_dev->slot_name);
2551 }
2552
2553 #endif /* CONFIG_PM */
2554
2555 /*-------------------------------------------------------------------------*/
2556
2557 /* configured so that an OHCI device is always provided */
2558 /* always called with process context; sleeping is OK */
2559
2560 static int __devinit
2561 ohci_pci_probe (struct pci_dev *dev, const struct pci_device_id *id)
2562 {
2563 unsigned long mem_resource, mem_len;
2564 void *mem_base;
2565
2566 if (pci_enable_device(dev) < 0)
2567 return -ENODEV;
2568
2569 if (!dev->irq) {
2570 err("found OHCI device with no IRQ assigned. check BIOS settings!");
2571 return -ENODEV;
2572 }
2573
2574 /* we read its hardware registers as memory */
2575 mem_resource = pci_resource_start(dev, 0);
2576 mem_len = pci_resource_len(dev, 0);
2577 if (!request_mem_region (mem_resource, mem_len, ohci_pci_driver.name)) {
2578 dbg ("controller already in use");
2579 return -EBUSY;
2580 }
2581
2582 mem_base = ioremap_nocache (mem_resource, mem_len);
2583 if (!mem_base) {
2584 err("Error mapping OHCI memory");
2585 return -EFAULT;
2586 }
2587
2588 /* controller writes into our memory */
2589 pci_set_master (dev);
2590
2591 return hc_found_ohci (dev, dev->irq, mem_base, id);
2592 }
2593
2594 /*-------------------------------------------------------------------------*/
2595
2596 /* may be called from interrupt context [interface spec] */
2597 /* may be called without controller present */
2598 /* may be called with controller, bus, and devices active */
2599
2600 static void __devexit
2601 ohci_pci_remove (struct pci_dev *dev)
2602 {
2603 ohci_t *ohci = (ohci_t *) dev->driver_data;
2604
2605 dbg ("remove %s controller usb-%s%s%s",
2606 hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS),
2607 dev->slot_name,
2608 ohci->disabled ? " (disabled)" : "",
2609 in_interrupt () ? " in interrupt" : ""
2610 );
2611 #ifdef DEBUG
2612 ohci_dump (ohci, 1);
2613 #endif
2614
2615 /* don't wake up sleeping controllers, or block in interrupt context */
2616 if ((ohci->hc_control & OHCI_CTRL_HCFS) != OHCI_USB_OPER || in_interrupt ()) {
2617 dbg ("controller being disabled");
2618 ohci->disabled = 1;
2619 }
2620
2621 /* on return, USB will always be reset (if present) */
2622 if (ohci->disabled)
2623 writel (ohci->hc_control = OHCI_USB_RESET,
2624 &ohci->regs->control);
2625
2626 hc_release_ohci (ohci);
2627
2628 release_mem_region (pci_resource_start (dev, 0), pci_resource_len (dev, 0));
2629 }
2630
2631
2632 #ifdef CONFIG_PM
2633
2634 /*-------------------------------------------------------------------------*/
2635
2636 static int
2637 ohci_pci_suspend (struct pci_dev *dev, u32 state)
2638 {
2639 ohci_t *ohci = (ohci_t *) dev->driver_data;
2640 unsigned long flags;
2641 u16 cmd;
2642
2643 if ((ohci->hc_control & OHCI_CTRL_HCFS) != OHCI_USB_OPER) {
2644 dbg ("can't suspend usb-%s (state is %s)", dev->slot_name,
2645 hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS));
2646 return -EIO;
2647 }
2648
2649 /* act as if usb suspend can always be used */
2650 info ("USB suspend: usb-%s", dev->slot_name);
2651 ohci->sleeping = 1;
2652
2653 /* First stop processing */
2654 spin_lock_irqsave (&usb_ed_lock, flags);
2655 ohci->hc_control &= ~(OHCI_CTRL_PLE|OHCI_CTRL_CLE|OHCI_CTRL_BLE|OHCI_CTRL_IE);
2656 writel (ohci->hc_control, &ohci->regs->control);
2657 writel (OHCI_INTR_SF, &ohci->regs->intrstatus);
2658 (void) readl (&ohci->regs->intrstatus);
2659 spin_unlock_irqrestore (&usb_ed_lock, flags);
2660
2661 /* Wait a frame or two */
2662 mdelay(1);
2663 if (!readl (&ohci->regs->intrstatus) & OHCI_INTR_SF)
2664 mdelay (1);
2665
2666 #ifdef CONFIG_PMAC_PBOOK
2667 if (_machine == _MACH_Pmac)
2668 disable_irq (ohci->irq);
2669 /* else, 2.4 assumes shared irqs -- don't disable */
2670 #endif
2671 /* Enable remote wakeup */
2672 writel (readl(&ohci->regs->intrenable) | OHCI_INTR_RD, &ohci->regs->intrenable);
2673
2674 /* Suspend chip and let things settle down a bit */
2675 ohci->hc_control = OHCI_USB_SUSPEND;
2676 writel (ohci->hc_control, &ohci->regs->control);
2677 (void) readl (&ohci->regs->control);
2678 mdelay (500); /* No schedule here ! */
2679 switch (readl (&ohci->regs->control) & OHCI_CTRL_HCFS) {
2680 case OHCI_USB_RESET:
2681 dbg("Bus in reset phase ???");
2682 break;
2683 case OHCI_USB_RESUME:
2684 dbg("Bus in resume phase ???");
2685 break;
2686 case OHCI_USB_OPER:
2687 dbg("Bus in operational phase ???");
2688 break;
2689 case OHCI_USB_SUSPEND:
2690 dbg("Bus suspended");
2691 break;
2692 }
2693 /* In some rare situations, Apple's OHCI have happily trashed
2694 * memory during sleep. We disable it's bus master bit during
2695 * suspend
2696 */
2697 pci_read_config_word (dev, PCI_COMMAND, &cmd);
2698 cmd &= ~PCI_COMMAND_MASTER;
2699 pci_write_config_word (dev, PCI_COMMAND, cmd);
2700 #ifdef CONFIG_PMAC_PBOOK
2701 {
2702 struct device_node *of_node;
2703
2704 /* Disable USB PAD & cell clock */
2705 of_node = pci_device_to_OF_node (ohci->ohci_dev);
2706 if (of_node && _machine == _MACH_Pmac)
2707 feature_set_usb_power (of_node, 0);
2708 }
2709 #endif
2710 return 0;
2711 }
2712
2713 /*-------------------------------------------------------------------------*/
2714
2715 static int
2716 ohci_pci_resume (struct pci_dev *dev)
2717 {
2718 ohci_t *ohci = (ohci_t *) dev->driver_data;
2719 int temp;
2720 unsigned long flags;
2721
2722 /* guard against multiple resumes */
2723 atomic_inc (&ohci->resume_count);
2724 if (atomic_read (&ohci->resume_count) != 1) {
2725 err ("concurrent PCI resumes for usb-%s", dev->slot_name);
2726 atomic_dec (&ohci->resume_count);
2727 return 0;
2728 }
2729
2730 #ifdef CONFIG_PMAC_PBOOK
2731 {
2732 struct device_node *of_node;
2733
2734 /* Re-enable USB PAD & cell clock */
2735 of_node = pci_device_to_OF_node (ohci->ohci_dev);
2736 if (of_node && _machine == _MACH_Pmac)
2737 feature_set_usb_power (of_node, 1);
2738 }
2739 #endif
2740
2741 /* did we suspend, or were we powered off? */
2742 ohci->hc_control = readl (&ohci->regs->control);
2743 temp = ohci->hc_control & OHCI_CTRL_HCFS;
2744
2745 #ifdef DEBUG
2746 /* the registers may look crazy here */
2747 ohci_dump_status (ohci);
2748 #endif
2749
2750 /* Re-enable bus mastering */
2751 pci_set_master(ohci->ohci_dev);
2752
2753 switch (temp) {
2754
2755 case OHCI_USB_RESET: // lost power
2756 info ("USB restart: usb-%s", dev->slot_name);
2757 hc_restart (ohci);
2758 break;
2759
2760 case OHCI_USB_SUSPEND: // host wakeup
2761 case OHCI_USB_RESUME: // remote wakeup
2762 info ("USB continue: usb-%s from %s wakeup", dev->slot_name,
2763 (temp == OHCI_USB_SUSPEND)
2764 ? "host" : "remote");
2765 ohci->hc_control = OHCI_USB_RESUME;
2766 writel (ohci->hc_control, &ohci->regs->control);
2767 (void) readl (&ohci->regs->control);
2768 mdelay (20); /* no schedule here ! */
2769 /* Some controllers (lucent) need a longer delay here */
2770 mdelay (15);
2771 temp = readl (&ohci->regs->control);
2772 temp = ohci->hc_control & OHCI_CTRL_HCFS;
2773 if (temp != OHCI_USB_RESUME) {
2774 err ("controller usb-%s won't resume", dev->slot_name);
2775 ohci->disabled = 1;
2776 return -EIO;
2777 }
2778
2779 /* Some chips likes being resumed first */
2780 writel (OHCI_USB_OPER, &ohci->regs->control);
2781 (void) readl (&ohci->regs->control);
2782 mdelay (3);
2783
2784 /* Then re-enable operations */
2785 spin_lock_irqsave (&usb_ed_lock, flags);
2786 ohci->disabled = 0;
2787 ohci->sleeping = 0;
2788 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
2789 if (!ohci->ed_rm_list[0] && !ohci->ed_rm_list[1]) {
2790 if (ohci->ed_controltail)
2791 ohci->hc_control |= OHCI_CTRL_CLE;
2792 if (ohci->ed_bulktail)
2793 ohci->hc_control |= OHCI_CTRL_BLE;
2794 }
2795 writel (ohci->hc_control, &ohci->regs->control);
2796 writel (OHCI_INTR_SF, &ohci->regs->intrstatus);
2797 writel (OHCI_INTR_SF, &ohci->regs->intrenable);
2798 /* Check for a pending done list */
2799 writel (OHCI_INTR_WDH, &ohci->regs->intrdisable);
2800 (void) readl (&ohci->regs->intrdisable);
2801 spin_unlock_irqrestore (&usb_ed_lock, flags);
2802 #ifdef CONFIG_PMAC_PBOOK
2803 if (_machine == _MACH_Pmac)
2804 enable_irq (ohci->irq);
2805 #endif
2806 if (ohci->hcca->done_head)
2807 dl_done_list (ohci, dl_reverse_done_list (ohci));
2808 writel (OHCI_INTR_WDH, &ohci->regs->intrenable);
2809 writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
2810 writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
2811 break;
2812
2813 default:
2814 warn ("odd PCI resume for usb-%s", dev->slot_name);
2815 }
2816
2817 /* controller is operational, extra resumes are harmless */
2818 atomic_dec (&ohci->resume_count);
2819
2820 return 0;
2821 }
2822
2823 #endif /* CONFIG_PM */
2824
2825
2826 /*-------------------------------------------------------------------------*/
2827
2828 static const struct pci_device_id __devinitdata ohci_pci_ids [] = { {
2829
2830 /*
2831 * AMD-756 [Viper] USB has a serious erratum when used with
2832 * lowspeed devices like mice.
2833 */
2834 vendor: 0x1022,
2835 device: 0x740c,
2836 subvendor: PCI_ANY_ID,
2837 subdevice: PCI_ANY_ID,
2838
2839 driver_data: OHCI_QUIRK_AMD756,
2840
2841 } , {
2842
2843 /* handle any USB OHCI controller */
2844 class: ((PCI_CLASS_SERIAL_USB << 8) | 0x10),
2845 class_mask: ~0,
2846
2847 /* no matter who makes it */
2848 vendor: PCI_ANY_ID,
2849 device: PCI_ANY_ID,
2850 subvendor: PCI_ANY_ID,
2851 subdevice: PCI_ANY_ID,
2852
2853 }, { /* end: all zeroes */ }
2854 };
2855
2856 MODULE_DEVICE_TABLE (pci, ohci_pci_ids);
2857
2858 static struct pci_driver ohci_pci_driver = {
2859 name: "usb-ohci",
2860 id_table: &ohci_pci_ids [0],
2861
2862 probe: ohci_pci_probe,
2863 remove: ohci_pci_remove,
2864
2865 #ifdef CONFIG_PM
2866 suspend: ohci_pci_suspend,
2867 resume: ohci_pci_resume,
2868 #endif /* PM */
2869 };
2870
2871
2872 /*-------------------------------------------------------------------------*/
2873
2874 static int __init ohci_hcd_init (void)
2875 {
2876 return pci_module_init (&ohci_pci_driver);
2877 }
2878
2879 /*-------------------------------------------------------------------------*/
2880
2881 static void __exit ohci_hcd_cleanup (void)
2882 {
2883 pci_unregister_driver (&ohci_pci_driver);
2884 }
2885
2886 module_init (ohci_hcd_init);
2887 module_exit (ohci_hcd_cleanup);
2888
2889
2890 MODULE_AUTHOR( DRIVER_AUTHOR );
2891 MODULE_DESCRIPTION( DRIVER_DESC );
2892 MODULE_LICENSE("GPL");
2893