File: /usr/src/linux/drivers/video/aty/atyfb.h
1
2 /*
3 * ATI Frame Buffer Device Driver Core Definitions
4 */
5
6 #include <linux/config.h>
7
8
9 /*
10 * Elements of the hardware specific atyfb_par structure
11 */
12
13 struct crtc {
14 u32 vxres;
15 u32 vyres;
16 u32 xoffset;
17 u32 yoffset;
18 u32 bpp;
19 u32 h_tot_disp;
20 u32 h_sync_strt_wid;
21 u32 v_tot_disp;
22 u32 v_sync_strt_wid;
23 u32 off_pitch;
24 u32 gen_cntl;
25 u32 dp_pix_width; /* acceleration */
26 u32 dp_chain_mask; /* acceleration */
27 };
28
29 struct pll_514 {
30 u8 m;
31 u8 n;
32 };
33
34 struct pll_18818
35 {
36 u32 program_bits;
37 u32 locationAddr;
38 u32 period_in_ps;
39 u32 post_divider;
40 };
41
42 struct pll_ct {
43 u8 pll_ref_div;
44 u8 pll_gen_cntl;
45 u8 mclk_fb_div;
46 u8 pll_vclk_cntl;
47 u8 vclk_post_div;
48 u8 vclk_fb_div;
49 u8 pll_ext_cntl;
50 u32 dsp_config; /* Mach64 GTB DSP */
51 u32 dsp_on_off; /* Mach64 GTB DSP */
52 u8 mclk_post_div_real;
53 u8 vclk_post_div_real;
54 };
55
56 union aty_pll {
57 struct pll_ct ct;
58 struct pll_514 ibm514;
59 struct pll_18818 ics2595;
60 };
61
62
63 /*
64 * The hardware parameters for each card
65 */
66
67 struct atyfb_par {
68 struct crtc crtc;
69 union aty_pll pll;
70 u32 accel_flags;
71 };
72
73 struct aty_cursor {
74 int enable;
75 int on;
76 int vbl_cnt;
77 int blink_rate;
78 u32 offset;
79 struct {
80 u16 x, y;
81 } pos, hot, size;
82 u32 color[2];
83 u8 bits[8][64];
84 u8 mask[8][64];
85 u8 *ram;
86 struct timer_list *timer;
87 };
88
89 struct fb_info_aty {
90 struct fb_info fb_info;
91 struct fb_info_aty *next;
92 unsigned long ati_regbase_phys;
93 unsigned long ati_regbase;
94 unsigned long frame_buffer_phys;
95 unsigned long frame_buffer;
96 unsigned long clk_wr_offset;
97 struct pci_mmap_map *mmap_map;
98 struct aty_cursor *cursor;
99 struct aty_cmap_regs *aty_cmap_regs;
100 struct { u8 red, green, blue, pad; } palette[256];
101 struct atyfb_par default_par;
102 struct atyfb_par current_par;
103 u32 features;
104 u32 total_vram;
105 u32 ref_clk_per;
106 u32 pll_per;
107 u32 mclk_per;
108 u8 bus_type;
109 u8 ram_type;
110 u8 mem_refresh_rate;
111 const struct aty_dac_ops *dac_ops;
112 const struct aty_pll_ops *pll_ops;
113 struct display disp;
114 struct display_switch dispsw;
115 union {
116 #ifdef FBCON_HAS_CFB16
117 u16 cfb16[16];
118 #endif
119 #ifdef FBCON_HAS_CFB24
120 u32 cfb24[16];
121 #endif
122 #ifdef FBCON_HAS_CFB32
123 u32 cfb32[16];
124 #endif
125 } fbcon_cmap;
126 u8 blitter_may_be_busy;
127 #ifdef __sparc__
128 u8 mmaped;
129 int open;
130 int vtconsole;
131 int consolecnt;
132 #endif
133 #ifdef CONFIG_PMAC_PBOOK
134 unsigned char *save_framebuffer;
135 unsigned long save_pll[64];
136 #endif
137 };
138
139
140 /*
141 * ATI Mach64 features
142 */
143
144 #define M64_HAS(feature) ((info)->features & (M64F_##feature))
145
146 #define M64F_RESET_3D 0x00000001
147 #define M64F_MAGIC_FIFO 0x00000002
148 #define M64F_GTB_DSP 0x00000004
149 #define M64F_FIFO_24 0x00000008
150 #define M64F_SDRAM_MAGIC_PLL 0x00000010
151 #define M64F_MAGIC_POSTDIV 0x00000020
152 #define M64F_INTEGRATED 0x00000040
153 #define M64F_CT_BUS 0x00000080
154 #define M64F_VT_BUS 0x00000100
155 #define M64F_MOBIL_BUS 0x00000200
156 #define M64F_GX 0x00000400
157 #define M64F_CT 0x00000800
158 #define M64F_VT 0x00001000
159 #define M64F_GT 0x00002000
160 #define M64F_MAGIC_VRAM_SIZE 0x00004000
161 #define M64F_G3_PB_1_1 0x00008000
162 #define M64F_G3_PB_1024x768 0x00010000
163 #define M64F_EXTRA_BRIGHT 0x00020000
164 #define M64F_LT_SLEEP 0x00040000
165 #define M64F_XL_DLL 0x00080000
166
167
168 /*
169 * Register access
170 */
171
172 static inline u32 aty_ld_le32(int regindex,
173 const struct fb_info_aty *info)
174 {
175 /* Hack for bloc 1, should be cleanly optimized by compiler */
176 if (regindex >= 0x400)
177 regindex -= 0x800;
178
179 #if defined(__mc68000__)
180 return le32_to_cpu(*((volatile u32 *)(info->ati_regbase+regindex)));
181 #else
182 return readl (info->ati_regbase + regindex);
183 #endif
184 }
185
186 static inline void aty_st_le32(int regindex, u32 val,
187 const struct fb_info_aty *info)
188 {
189 /* Hack for bloc 1, should be cleanly optimized by compiler */
190 if (regindex >= 0x400)
191 regindex -= 0x800;
192
193 #if defined(__mc68000__)
194 *((volatile u32 *)(info->ati_regbase+regindex)) = cpu_to_le32(val);
195 #else
196 writel (val, info->ati_regbase + regindex);
197 #endif
198 }
199
200 static inline u8 aty_ld_8(int regindex,
201 const struct fb_info_aty *info)
202 {
203 /* Hack for bloc 1, should be cleanly optimized by compiler */
204 if (regindex >= 0x400)
205 regindex -= 0x800;
206
207 return readb (info->ati_regbase + regindex);
208 }
209
210 static inline void aty_st_8(int regindex, u8 val,
211 const struct fb_info_aty *info)
212 {
213 /* Hack for bloc 1, should be cleanly optimized by compiler */
214 if (regindex >= 0x400)
215 regindex -= 0x800;
216
217 writeb (val, info->ati_regbase + regindex);
218 }
219
220 static inline u8 aty_ld_pll(int offset, const struct fb_info_aty *info)
221 {
222 u8 res;
223
224 /* write addr byte */
225 aty_st_8(CLOCK_CNTL + 1, (offset << 2), info);
226 /* read the register value */
227 res = aty_ld_8(CLOCK_CNTL + 2, info);
228 return res;
229 }
230
231
232 /*
233 * DAC operations
234 */
235
236 struct aty_dac_ops {
237 int (*set_dac)(const struct fb_info_aty *info, const union aty_pll *pll,
238 u32 bpp, u32 accel);
239 };
240
241 extern const struct aty_dac_ops aty_dac_ibm514; /* IBM RGB514 */
242 extern const struct aty_dac_ops aty_dac_ati68860b; /* ATI 68860-B */
243 extern const struct aty_dac_ops aty_dac_att21c498; /* AT&T 21C498 */
244 extern const struct aty_dac_ops aty_dac_unsupported; /* unsupported */
245 extern const struct aty_dac_ops aty_dac_ct; /* Integrated */
246
247
248 /*
249 * Clock operations
250 */
251
252 struct aty_pll_ops {
253 int (*var_to_pll)(const struct fb_info_aty *info, u32 vclk_per, u8 bpp,
254 union aty_pll *pll);
255 u32 (*pll_to_var)(const struct fb_info_aty *info,
256 const union aty_pll *pll);
257 void (*set_pll)(const struct fb_info_aty *info, const union aty_pll *pll);
258 };
259
260 extern const struct aty_pll_ops aty_pll_ati18818_1; /* ATI 18818 */
261 extern const struct aty_pll_ops aty_pll_stg1703; /* STG 1703 */
262 extern const struct aty_pll_ops aty_pll_ch8398; /* Chrontel 8398 */
263 extern const struct aty_pll_ops aty_pll_att20c408; /* AT&T 20C408 */
264 extern const struct aty_pll_ops aty_pll_ibm514; /* IBM RGB514 */
265 extern const struct aty_pll_ops aty_pll_unsupported; /* unsupported */
266 extern const struct aty_pll_ops aty_pll_ct; /* Integrated */
267
268
269 extern void aty_set_pll_ct(const struct fb_info_aty *info,
270 const union aty_pll *pll);
271 extern void aty_calc_pll_ct(const struct fb_info_aty *info,
272 struct pll_ct *pll);
273
274
275 /*
276 * Hardware cursor support
277 */
278
279 extern struct aty_cursor *aty_init_cursor(struct fb_info_aty *fb);
280 extern void atyfb_cursor(struct display *p, int mode, int x, int y);
281 extern void aty_set_cursor_color(struct fb_info_aty *fb);
282 extern void aty_set_cursor_shape(struct fb_info_aty *fb);
283 extern int atyfb_set_font(struct display *d, int width, int height);
284
285
286 /*
287 * Hardware acceleration
288 */
289
290 static inline void wait_for_fifo(u16 entries, const struct fb_info_aty *info)
291 {
292 while ((aty_ld_le32(FIFO_STAT, info) & 0xffff) >
293 ((u32)(0x8000 >> entries)));
294 }
295
296 static inline void wait_for_idle(struct fb_info_aty *info)
297 {
298 wait_for_fifo(16, info);
299 while ((aty_ld_le32(GUI_STAT, info) & 1)!= 0);
300 info->blitter_may_be_busy = 0;
301 }
302
303 extern void aty_reset_engine(const struct fb_info_aty *info);
304 extern void aty_init_engine(const struct atyfb_par *par,
305 struct fb_info_aty *info);
306 extern void aty_rectfill(int dstx, int dsty, u_int width, u_int height,
307 u_int color, struct fb_info_aty *info);
308
309
310 /*
311 * Text console acceleration
312 */
313
314 extern const struct display_switch fbcon_aty8;
315 extern const struct display_switch fbcon_aty16;
316 extern const struct display_switch fbcon_aty24;
317 extern const struct display_switch fbcon_aty32;
318
319